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[mirror_ubuntu-hirsute-kernel.git] / drivers / regulator / qcom_smd-regulator.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (c) 2015, Sony Mobile Communications AB.
4 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
5 */
6
7 #include <linux/module.h>
8 #include <linux/of.h>
9 #include <linux/of_device.h>
10 #include <linux/platform_device.h>
11 #include <linux/regulator/driver.h>
12 #include <linux/soc/qcom/smd-rpm.h>
13
14 struct qcom_rpm_reg {
15 struct device *dev;
16
17 struct qcom_smd_rpm *rpm;
18
19 u32 type;
20 u32 id;
21
22 struct regulator_desc desc;
23
24 int is_enabled;
25 int uV;
26 u32 load;
27
28 unsigned int enabled_updated:1;
29 unsigned int uv_updated:1;
30 unsigned int load_updated:1;
31 };
32
33 struct rpm_regulator_req {
34 __le32 key;
35 __le32 nbytes;
36 __le32 value;
37 };
38
39 #define RPM_KEY_SWEN 0x6e657773 /* "swen" */
40 #define RPM_KEY_UV 0x00007675 /* "uv" */
41 #define RPM_KEY_MA 0x0000616d /* "ma" */
42
43 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg)
44 {
45 struct rpm_regulator_req req[3];
46 int reqlen = 0;
47 int ret;
48
49 if (vreg->enabled_updated) {
50 req[reqlen].key = cpu_to_le32(RPM_KEY_SWEN);
51 req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
52 req[reqlen].value = cpu_to_le32(vreg->is_enabled);
53 reqlen++;
54 }
55
56 if (vreg->uv_updated && vreg->is_enabled) {
57 req[reqlen].key = cpu_to_le32(RPM_KEY_UV);
58 req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
59 req[reqlen].value = cpu_to_le32(vreg->uV);
60 reqlen++;
61 }
62
63 if (vreg->load_updated && vreg->is_enabled) {
64 req[reqlen].key = cpu_to_le32(RPM_KEY_MA);
65 req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
66 req[reqlen].value = cpu_to_le32(vreg->load / 1000);
67 reqlen++;
68 }
69
70 if (!reqlen)
71 return 0;
72
73 ret = qcom_rpm_smd_write(vreg->rpm, QCOM_SMD_RPM_ACTIVE_STATE,
74 vreg->type, vreg->id,
75 req, sizeof(req[0]) * reqlen);
76 if (!ret) {
77 vreg->enabled_updated = 0;
78 vreg->uv_updated = 0;
79 vreg->load_updated = 0;
80 }
81
82 return ret;
83 }
84
85 static int rpm_reg_enable(struct regulator_dev *rdev)
86 {
87 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
88 int ret;
89
90 vreg->is_enabled = 1;
91 vreg->enabled_updated = 1;
92
93 ret = rpm_reg_write_active(vreg);
94 if (ret)
95 vreg->is_enabled = 0;
96
97 return ret;
98 }
99
100 static int rpm_reg_is_enabled(struct regulator_dev *rdev)
101 {
102 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
103
104 return vreg->is_enabled;
105 }
106
107 static int rpm_reg_disable(struct regulator_dev *rdev)
108 {
109 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
110 int ret;
111
112 vreg->is_enabled = 0;
113 vreg->enabled_updated = 1;
114
115 ret = rpm_reg_write_active(vreg);
116 if (ret)
117 vreg->is_enabled = 1;
118
119 return ret;
120 }
121
122 static int rpm_reg_get_voltage(struct regulator_dev *rdev)
123 {
124 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
125
126 return vreg->uV;
127 }
128
129 static int rpm_reg_set_voltage(struct regulator_dev *rdev,
130 int min_uV,
131 int max_uV,
132 unsigned *selector)
133 {
134 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
135 int ret;
136 int old_uV = vreg->uV;
137
138 vreg->uV = min_uV;
139 vreg->uv_updated = 1;
140
141 ret = rpm_reg_write_active(vreg);
142 if (ret)
143 vreg->uV = old_uV;
144
145 return ret;
146 }
147
148 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
149 {
150 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
151 u32 old_load = vreg->load;
152 int ret;
153
154 vreg->load = load_uA;
155 vreg->load_updated = 1;
156 ret = rpm_reg_write_active(vreg);
157 if (ret)
158 vreg->load = old_load;
159
160 return ret;
161 }
162
163 static const struct regulator_ops rpm_smps_ldo_ops = {
164 .enable = rpm_reg_enable,
165 .disable = rpm_reg_disable,
166 .is_enabled = rpm_reg_is_enabled,
167 .list_voltage = regulator_list_voltage_linear_range,
168
169 .get_voltage = rpm_reg_get_voltage,
170 .set_voltage = rpm_reg_set_voltage,
171
172 .set_load = rpm_reg_set_load,
173 };
174
175 static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
176 .enable = rpm_reg_enable,
177 .disable = rpm_reg_disable,
178 .is_enabled = rpm_reg_is_enabled,
179
180 .get_voltage = rpm_reg_get_voltage,
181 .set_voltage = rpm_reg_set_voltage,
182
183 .set_load = rpm_reg_set_load,
184 };
185
186 static const struct regulator_ops rpm_switch_ops = {
187 .enable = rpm_reg_enable,
188 .disable = rpm_reg_disable,
189 .is_enabled = rpm_reg_is_enabled,
190 };
191
192 static const struct regulator_ops rpm_bob_ops = {
193 .enable = rpm_reg_enable,
194 .disable = rpm_reg_disable,
195 .is_enabled = rpm_reg_is_enabled,
196
197 .get_voltage = rpm_reg_get_voltage,
198 .set_voltage = rpm_reg_set_voltage,
199 };
200
201 static const struct regulator_ops rpm_mp5496_ops = {
202 .enable = rpm_reg_enable,
203 .disable = rpm_reg_disable,
204 .is_enabled = rpm_reg_is_enabled,
205 .list_voltage = regulator_list_voltage_linear_range,
206
207 .set_voltage = rpm_reg_set_voltage,
208 };
209
210 static const struct regulator_desc pma8084_hfsmps = {
211 .linear_ranges = (struct linear_range[]) {
212 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
213 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
214 },
215 .n_linear_ranges = 2,
216 .n_voltages = 159,
217 .ops = &rpm_smps_ldo_ops,
218 };
219
220 static const struct regulator_desc pma8084_ftsmps = {
221 .linear_ranges = (struct linear_range[]) {
222 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
223 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
224 },
225 .n_linear_ranges = 2,
226 .n_voltages = 262,
227 .ops = &rpm_smps_ldo_ops,
228 };
229
230 static const struct regulator_desc pma8084_pldo = {
231 .linear_ranges = (struct linear_range[]) {
232 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
233 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
234 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
235 },
236 .n_linear_ranges = 3,
237 .n_voltages = 164,
238 .ops = &rpm_smps_ldo_ops,
239 };
240
241 static const struct regulator_desc pma8084_nldo = {
242 .linear_ranges = (struct linear_range[]) {
243 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
244 },
245 .n_linear_ranges = 1,
246 .n_voltages = 64,
247 .ops = &rpm_smps_ldo_ops,
248 };
249
250 static const struct regulator_desc pma8084_switch = {
251 .ops = &rpm_switch_ops,
252 };
253
254 static const struct regulator_desc pm8x41_hfsmps = {
255 .linear_ranges = (struct linear_range[]) {
256 REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
257 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
258 },
259 .n_linear_ranges = 2,
260 .n_voltages = 159,
261 .ops = &rpm_smps_ldo_ops,
262 };
263
264 static const struct regulator_desc pm8841_ftsmps = {
265 .linear_ranges = (struct linear_range[]) {
266 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
267 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
268 },
269 .n_linear_ranges = 2,
270 .n_voltages = 262,
271 .ops = &rpm_smps_ldo_ops,
272 };
273
274 static const struct regulator_desc pm8941_boost = {
275 .linear_ranges = (struct linear_range[]) {
276 REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
277 },
278 .n_linear_ranges = 1,
279 .n_voltages = 31,
280 .ops = &rpm_smps_ldo_ops,
281 };
282
283 static const struct regulator_desc pm8941_pldo = {
284 .linear_ranges = (struct linear_range[]) {
285 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
286 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
287 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
288 },
289 .n_linear_ranges = 3,
290 .n_voltages = 164,
291 .ops = &rpm_smps_ldo_ops,
292 };
293
294 static const struct regulator_desc pm8941_nldo = {
295 .linear_ranges = (struct linear_range[]) {
296 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
297 },
298 .n_linear_ranges = 1,
299 .n_voltages = 64,
300 .ops = &rpm_smps_ldo_ops,
301 };
302
303 static const struct regulator_desc pm8941_lnldo = {
304 .fixed_uV = 1740000,
305 .n_voltages = 1,
306 .ops = &rpm_smps_ldo_ops_fixed,
307 };
308
309 static const struct regulator_desc pm8941_switch = {
310 .ops = &rpm_switch_ops,
311 };
312
313 static const struct regulator_desc pm8916_pldo = {
314 .linear_ranges = (struct linear_range[]) {
315 REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
316 },
317 .n_linear_ranges = 1,
318 .n_voltages = 209,
319 .ops = &rpm_smps_ldo_ops,
320 };
321
322 static const struct regulator_desc pm8916_nldo = {
323 .linear_ranges = (struct linear_range[]) {
324 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
325 },
326 .n_linear_ranges = 1,
327 .n_voltages = 94,
328 .ops = &rpm_smps_ldo_ops,
329 };
330
331 static const struct regulator_desc pm8916_buck_lvo_smps = {
332 .linear_ranges = (struct linear_range[]) {
333 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
334 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
335 },
336 .n_linear_ranges = 2,
337 .n_voltages = 128,
338 .ops = &rpm_smps_ldo_ops,
339 };
340
341 static const struct regulator_desc pm8916_buck_hvo_smps = {
342 .linear_ranges = (struct linear_range[]) {
343 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
344 },
345 .n_linear_ranges = 1,
346 .n_voltages = 32,
347 .ops = &rpm_smps_ldo_ops,
348 };
349
350 static const struct regulator_desc pm8950_hfsmps = {
351 .linear_ranges = (struct linear_range[]) {
352 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
353 REGULATOR_LINEAR_RANGE(1550000, 96, 127, 25000),
354 },
355 .n_linear_ranges = 2,
356 .n_voltages = 128,
357 .ops = &rpm_smps_ldo_ops,
358 };
359
360 static const struct regulator_desc pm8950_ftsmps2p5 = {
361 .linear_ranges = (struct linear_range[]) {
362 REGULATOR_LINEAR_RANGE(80000, 0, 255, 5000),
363 REGULATOR_LINEAR_RANGE(160000, 256, 460, 10000),
364 },
365 .n_linear_ranges = 2,
366 .n_voltages = 461,
367 .ops = &rpm_smps_ldo_ops,
368 };
369
370 static const struct regulator_desc pm8950_ult_nldo = {
371 .linear_ranges = (struct linear_range[]) {
372 REGULATOR_LINEAR_RANGE(375000, 0, 202, 12500),
373 },
374 .n_linear_ranges = 1,
375 .n_voltages = 203,
376 .ops = &rpm_smps_ldo_ops,
377 };
378
379 static const struct regulator_desc pm8950_ult_pldo = {
380 .linear_ranges = (struct linear_range[]) {
381 REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500),
382 },
383 .n_linear_ranges = 1,
384 .n_voltages = 128,
385 .ops = &rpm_smps_ldo_ops,
386 };
387
388 static const struct regulator_desc pm8950_pldo_lv = {
389 .linear_ranges = (struct linear_range[]) {
390 REGULATOR_LINEAR_RANGE(1500000, 0, 16, 25000),
391 },
392 .n_linear_ranges = 1,
393 .n_voltages = 17,
394 .ops = &rpm_smps_ldo_ops,
395 };
396
397 static const struct regulator_desc pm8950_pldo = {
398 .linear_ranges = (struct linear_range[]) {
399 REGULATOR_LINEAR_RANGE(975000, 0, 164, 12500),
400 },
401 .n_linear_ranges = 1,
402 .n_voltages = 165,
403 .ops = &rpm_smps_ldo_ops,
404 };
405
406
407 static const struct regulator_desc pm8994_hfsmps = {
408 .linear_ranges = (struct linear_range[]) {
409 REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
410 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
411 },
412 .n_linear_ranges = 2,
413 .n_voltages = 159,
414 .ops = &rpm_smps_ldo_ops,
415 };
416
417 static const struct regulator_desc pm8994_ftsmps = {
418 .linear_ranges = (struct linear_range[]) {
419 REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000),
420 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
421 },
422 .n_linear_ranges = 2,
423 .n_voltages = 350,
424 .ops = &rpm_smps_ldo_ops,
425 };
426
427 static const struct regulator_desc pm8994_nldo = {
428 .linear_ranges = (struct linear_range[]) {
429 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
430 },
431 .n_linear_ranges = 1,
432 .n_voltages = 64,
433 .ops = &rpm_smps_ldo_ops,
434 };
435
436 static const struct regulator_desc pm8994_pldo = {
437 .linear_ranges = (struct linear_range[]) {
438 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
439 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
440 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
441 },
442 .n_linear_ranges = 3,
443 .n_voltages = 164,
444 .ops = &rpm_smps_ldo_ops,
445 };
446
447 static const struct regulator_desc pm8994_switch = {
448 .ops = &rpm_switch_ops,
449 };
450
451 static const struct regulator_desc pm8994_lnldo = {
452 .fixed_uV = 1740000,
453 .n_voltages = 1,
454 .ops = &rpm_smps_ldo_ops_fixed,
455 };
456
457 static const struct regulator_desc pmi8994_ftsmps = {
458 .linear_ranges = (struct linear_range[]) {
459 REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000),
460 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
461 },
462 .n_linear_ranges = 2,
463 .n_voltages = 350,
464 .ops = &rpm_smps_ldo_ops,
465 };
466
467 static const struct regulator_desc pmi8994_hfsmps = {
468 .linear_ranges = (struct linear_range[]) {
469 REGULATOR_LINEAR_RANGE(350000, 0, 80, 12500),
470 REGULATOR_LINEAR_RANGE(700000, 81, 141, 25000),
471 },
472 .n_linear_ranges = 2,
473 .n_voltages = 142,
474 .ops = &rpm_smps_ldo_ops,
475 };
476
477 static const struct regulator_desc pmi8994_bby = {
478 .linear_ranges = (struct linear_range[]) {
479 REGULATOR_LINEAR_RANGE(3000000, 0, 44, 50000),
480 },
481 .n_linear_ranges = 1,
482 .n_voltages = 45,
483 .ops = &rpm_bob_ops,
484 };
485
486 static const struct regulator_desc pm8998_ftsmps = {
487 .linear_ranges = (struct linear_range[]) {
488 REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
489 },
490 .n_linear_ranges = 1,
491 .n_voltages = 259,
492 .ops = &rpm_smps_ldo_ops,
493 };
494
495 static const struct regulator_desc pm8998_hfsmps = {
496 .linear_ranges = (struct linear_range[]) {
497 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
498 },
499 .n_linear_ranges = 1,
500 .n_voltages = 216,
501 .ops = &rpm_smps_ldo_ops,
502 };
503
504 static const struct regulator_desc pm8998_nldo = {
505 .linear_ranges = (struct linear_range[]) {
506 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
507 },
508 .n_linear_ranges = 1,
509 .n_voltages = 128,
510 .ops = &rpm_smps_ldo_ops,
511 };
512
513 static const struct regulator_desc pm8998_pldo = {
514 .linear_ranges = (struct linear_range[]) {
515 REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
516 },
517 .n_linear_ranges = 1,
518 .n_voltages = 256,
519 .ops = &rpm_smps_ldo_ops,
520 };
521
522 static const struct regulator_desc pm8998_pldo_lv = {
523 .linear_ranges = (struct linear_range[]) {
524 REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
525 },
526 .n_linear_ranges = 1,
527 .n_voltages = 128,
528 .ops = &rpm_smps_ldo_ops,
529 };
530
531 static const struct regulator_desc pm8998_switch = {
532 .ops = &rpm_switch_ops,
533 };
534
535 static const struct regulator_desc pmi8998_bob = {
536 .linear_ranges = (struct linear_range[]) {
537 REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
538 },
539 .n_linear_ranges = 1,
540 .n_voltages = 84,
541 .ops = &rpm_bob_ops,
542 };
543
544 static const struct regulator_desc pms405_hfsmps3 = {
545 .linear_ranges = (struct linear_range[]) {
546 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
547 },
548 .n_linear_ranges = 1,
549 .n_voltages = 216,
550 .ops = &rpm_smps_ldo_ops,
551 };
552
553 static const struct regulator_desc pms405_nldo300 = {
554 .linear_ranges = (struct linear_range[]) {
555 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
556 },
557 .n_linear_ranges = 1,
558 .n_voltages = 128,
559 .ops = &rpm_smps_ldo_ops,
560 };
561
562 static const struct regulator_desc pms405_nldo1200 = {
563 .linear_ranges = (struct linear_range[]) {
564 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
565 },
566 .n_linear_ranges = 1,
567 .n_voltages = 128,
568 .ops = &rpm_smps_ldo_ops,
569 };
570
571 static const struct regulator_desc pms405_pldo50 = {
572 .linear_ranges = (struct linear_range[]) {
573 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
574 },
575 .n_linear_ranges = 1,
576 .n_voltages = 129,
577 .ops = &rpm_smps_ldo_ops,
578 };
579
580 static const struct regulator_desc pms405_pldo150 = {
581 .linear_ranges = (struct linear_range[]) {
582 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
583 },
584 .n_linear_ranges = 1,
585 .n_voltages = 129,
586 .ops = &rpm_smps_ldo_ops,
587 };
588
589 static const struct regulator_desc pms405_pldo600 = {
590 .linear_ranges = (struct linear_range[]) {
591 REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000),
592 },
593 .n_linear_ranges = 1,
594 .n_voltages = 99,
595 .ops = &rpm_smps_ldo_ops,
596 };
597
598 static const struct regulator_desc mp5496_smpa2 = {
599 .linear_ranges = (struct linear_range[]) {
600 REGULATOR_LINEAR_RANGE(725000, 0, 27, 12500),
601 },
602 .n_linear_ranges = 1,
603 .n_voltages = 28,
604 .ops = &rpm_mp5496_ops,
605 };
606
607 static const struct regulator_desc mp5496_ldoa2 = {
608 .linear_ranges = (struct linear_range[]) {
609 REGULATOR_LINEAR_RANGE(1800000, 0, 60, 25000),
610 },
611 .n_linear_ranges = 1,
612 .n_voltages = 61,
613 .ops = &rpm_mp5496_ops,
614 };
615
616 struct rpm_regulator_data {
617 const char *name;
618 u32 type;
619 u32 id;
620 const struct regulator_desc *desc;
621 const char *supply;
622 };
623
624 static const struct rpm_regulator_data rpm_mp5496_regulators[] = {
625 { "s2", QCOM_SMD_RPM_SMPA, 2, &mp5496_smpa2, "s2" },
626 { "l2", QCOM_SMD_RPM_LDOA, 2, &mp5496_ldoa2, "l2" },
627 {}
628 };
629
630 static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
631 { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
632 { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
633 { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
634 { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
635 { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
636 { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
637 { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
638 { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
639 {}
640 };
641
642 static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
643 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
644 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
645 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
646 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
647 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
648 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
649 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
650 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
651 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
652 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
653 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
654 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
655 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
656 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
657 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
658 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
659 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
660 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
661 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
662 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
663 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
664 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
665 {}
666 };
667
668 static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
669 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
670 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
671 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
672 { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
673
674 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
675 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
676 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
677 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
678 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
679 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
680 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
681 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
682 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
683 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
684 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
685 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
686 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
687 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
688 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
689 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
690 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
691 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
692 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
693 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
694 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
695 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
696 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
697 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
698
699 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
700 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
701 { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
702
703 { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
704 { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
705
706 {}
707 };
708
709 static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
710 { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
711 { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
712 { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
713 { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
714 { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
715 { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
716 { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
717 { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
718 { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
719 { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
720 { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
721 { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
722
723 { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
724 { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
725 { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
726 { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
727 { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
728 { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
729 { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
730 { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
731 { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
732 { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
733 { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
734 { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
735 { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
736 { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
737 { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
738 { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
739 { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
740 { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
741 { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
742 { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
743 { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
744 { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
745 { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
746 { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
747 { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
748 { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
749 { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
750
751 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
752 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
753 { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
754 { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
755 { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
756
757 {}
758 };
759
760 static const struct rpm_regulator_data rpm_pm8950_regulators[] = {
761 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8950_hfsmps, "vdd_s1" },
762 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8950_hfsmps, "vdd_s2" },
763 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8950_hfsmps, "vdd_s3" },
764 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8950_hfsmps, "vdd_s4" },
765 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8950_ftsmps2p5, "vdd_s5" },
766 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_hfsmps, "vdd_s6" },
767
768 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8950_ult_nldo, "vdd_l1_l19" },
769 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8950_ult_nldo, "vdd_l2_l23" },
770 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8950_ult_nldo, "vdd_l3" },
771 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16" },
772 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" },
773 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" },
774 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" },
775 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
776 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
777 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_nldo, "vdd_l9_l10_l13_l14_l15_l18"},
778 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"},
779 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"},
780 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"},
781 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"},
782 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"},
783 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16"},
784 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"},
785 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"},
786 { "l19", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l1_l19"},
787 { "l20", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l20"},
788 { "l21", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l21"},
789 { "l22", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l8_l11_l12_l17_l22"},
790 { "l23", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l2_l23"},
791 {}
792 };
793
794 static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
795 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" },
796 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" },
797 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" },
798 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" },
799 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" },
800 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" },
801 { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" },
802 { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" },
803 { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" },
804 { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" },
805 { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" },
806 { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" },
807 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" },
808 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" },
809 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" },
810 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" },
811 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" },
812 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" },
813 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" },
814 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" },
815 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
816 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
817 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" },
818 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" },
819 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
820 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" },
821 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" },
822 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" },
823 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" },
824 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
825 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
826 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" },
827 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" },
828 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
829 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
830 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
831 { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" },
832 { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" },
833 { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" },
834 { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" },
835 { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" },
836 { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" },
837 { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" },
838 { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" },
839 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" },
840 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" },
841
842 {}
843 };
844
845 static const struct rpm_regulator_data rpm_pmi8994_regulators[] = {
846 { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" },
847 { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" },
848 { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" },
849 { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" },
850 {}
851 };
852
853 static const struct rpm_regulator_data rpm_pm8998_regulators[] = {
854 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" },
855 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" },
856 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" },
857 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" },
858 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" },
859 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" },
860 { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" },
861 { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" },
862 { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" },
863 { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" },
864 { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" },
865 { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" },
866 { "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" },
867 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" },
868 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" },
869 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" },
870 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" },
871 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" },
872 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" },
873 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
874 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" },
875 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" },
876 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" },
877 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" },
878 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
879 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" },
880 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
881 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
882 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" },
883 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" },
884 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" },
885 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" },
886 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" },
887 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" },
888 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" },
889 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" },
890 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" },
891 { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" },
892 { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" },
893 { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" },
894 { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" },
895 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" },
896 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" },
897 {}
898 };
899
900 static const struct rpm_regulator_data rpm_pmi8998_regulators[] = {
901 { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" },
902 {}
903 };
904
905 static const struct rpm_regulator_data rpm_pms405_regulators[] = {
906 { "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" },
907 { "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" },
908 { "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" },
909 { "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" },
910 { "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" },
911 { "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" },
912 { "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" },
913 { "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" },
914 { "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" },
915 { "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" },
916 { "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" },
917 { "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" },
918 { "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" },
919 { "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" },
920 { "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" },
921 { "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
922 { "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
923 { "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
924 {}
925 };
926
927 static const struct of_device_id rpm_of_match[] = {
928 { .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators },
929 { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
930 { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
931 { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
932 { .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators },
933 { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
934 { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators },
935 { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
936 { .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators },
937 { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators },
938 { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators },
939 {}
940 };
941 MODULE_DEVICE_TABLE(of, rpm_of_match);
942
943 static int rpm_reg_probe(struct platform_device *pdev)
944 {
945 const struct rpm_regulator_data *reg;
946 const struct of_device_id *match;
947 struct regulator_config config = { };
948 struct regulator_dev *rdev;
949 struct qcom_rpm_reg *vreg;
950 struct qcom_smd_rpm *rpm;
951
952 rpm = dev_get_drvdata(pdev->dev.parent);
953 if (!rpm) {
954 dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
955 return -ENODEV;
956 }
957
958 match = of_match_device(rpm_of_match, &pdev->dev);
959 if (!match) {
960 dev_err(&pdev->dev, "failed to match device\n");
961 return -ENODEV;
962 }
963
964 for (reg = match->data; reg->name; reg++) {
965 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
966 if (!vreg)
967 return -ENOMEM;
968
969 vreg->dev = &pdev->dev;
970 vreg->type = reg->type;
971 vreg->id = reg->id;
972 vreg->rpm = rpm;
973
974 memcpy(&vreg->desc, reg->desc, sizeof(vreg->desc));
975
976 vreg->desc.id = -1;
977 vreg->desc.owner = THIS_MODULE;
978 vreg->desc.type = REGULATOR_VOLTAGE;
979 vreg->desc.name = reg->name;
980 vreg->desc.supply_name = reg->supply;
981 vreg->desc.of_match = reg->name;
982
983 config.dev = &pdev->dev;
984 config.driver_data = vreg;
985 rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
986 if (IS_ERR(rdev)) {
987 dev_err(&pdev->dev, "failed to register %s\n", reg->name);
988 return PTR_ERR(rdev);
989 }
990 }
991
992 return 0;
993 }
994
995 static struct platform_driver rpm_reg_driver = {
996 .probe = rpm_reg_probe,
997 .driver = {
998 .name = "qcom_rpm_smd_regulator",
999 .of_match_table = rpm_of_match,
1000 },
1001 };
1002
1003 static int __init rpm_reg_init(void)
1004 {
1005 return platform_driver_register(&rpm_reg_driver);
1006 }
1007 subsys_initcall(rpm_reg_init);
1008
1009 static void __exit rpm_reg_exit(void)
1010 {
1011 platform_driver_unregister(&rpm_reg_driver);
1012 }
1013 module_exit(rpm_reg_exit)
1014
1015 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
1016 MODULE_LICENSE("GPL v2");