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1 /*
2 * Remote processor machine-specific module for DA8XX
3 *
4 * Copyright (C) 2013 Texas Instruments, Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 */
10
11 #include <linux/bitops.h>
12 #include <linux/clk.h>
13 #include <linux/err.h>
14 #include <linux/interrupt.h>
15 #include <linux/io.h>
16 #include <linux/irq.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/remoteproc.h>
21
22 #include <mach/clock.h> /* for davinci_clk_reset_assert/deassert() */
23
24 #include "remoteproc_internal.h"
25
26 static char *da8xx_fw_name;
27 module_param(da8xx_fw_name, charp, S_IRUGO);
28 MODULE_PARM_DESC(da8xx_fw_name,
29 "Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')");
30
31 /*
32 * OMAP-L138 Technical References:
33 * http://www.ti.com/product/omap-l138
34 */
35 #define SYSCFG_CHIPSIG0 BIT(0)
36 #define SYSCFG_CHIPSIG1 BIT(1)
37 #define SYSCFG_CHIPSIG2 BIT(2)
38 #define SYSCFG_CHIPSIG3 BIT(3)
39 #define SYSCFG_CHIPSIG4 BIT(4)
40
41 /**
42 * struct da8xx_rproc - da8xx remote processor instance state
43 * @rproc: rproc handle
44 * @dsp_clk: placeholder for platform's DSP clk
45 * @ack_fxn: chip-specific ack function for ack'ing irq
46 * @irq_data: ack_fxn function parameter
47 * @chipsig: virt ptr to DSP interrupt registers (CHIPSIG & CHIPSIG_CLR)
48 * @bootreg: virt ptr to DSP boot address register (HOST1CFG)
49 * @irq: irq # used by this instance
50 */
51 struct da8xx_rproc {
52 struct rproc *rproc;
53 struct clk *dsp_clk;
54 void (*ack_fxn)(struct irq_data *data);
55 struct irq_data *irq_data;
56 void __iomem *chipsig;
57 void __iomem *bootreg;
58 int irq;
59 };
60
61 /**
62 * handle_event() - inbound virtqueue message workqueue function
63 *
64 * This function is registered as a kernel thread and is scheduled by the
65 * kernel handler.
66 */
67 static irqreturn_t handle_event(int irq, void *p)
68 {
69 struct rproc *rproc = (struct rproc *)p;
70
71 /* Process incoming buffers on all our vrings */
72 rproc_vq_interrupt(rproc, 0);
73 rproc_vq_interrupt(rproc, 1);
74
75 return IRQ_HANDLED;
76 }
77
78 /**
79 * da8xx_rproc_callback() - inbound virtqueue message handler
80 *
81 * This handler is invoked directly by the kernel whenever the remote
82 * core (DSP) has modified the state of a virtqueue. There is no
83 * "payload" message indicating the virtqueue index as is the case with
84 * mailbox-based implementations on OMAP4. As such, this handler "polls"
85 * each known virtqueue index for every invocation.
86 */
87 static irqreturn_t da8xx_rproc_callback(int irq, void *p)
88 {
89 struct rproc *rproc = (struct rproc *)p;
90 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
91 u32 chipsig;
92
93 chipsig = readl(drproc->chipsig);
94 if (chipsig & SYSCFG_CHIPSIG0) {
95 /* Clear interrupt level source */
96 writel(SYSCFG_CHIPSIG0, drproc->chipsig + 4);
97
98 /*
99 * ACK intr to AINTC.
100 *
101 * It has already been ack'ed by the kernel before calling
102 * this function, but since the ARM<->DSP interrupts in the
103 * CHIPSIG register are "level" instead of "pulse" variety,
104 * we need to ack it after taking down the level else we'll
105 * be called again immediately after returning.
106 */
107 drproc->ack_fxn(drproc->irq_data);
108
109 return IRQ_WAKE_THREAD;
110 }
111
112 return IRQ_HANDLED;
113 }
114
115 static int da8xx_rproc_start(struct rproc *rproc)
116 {
117 struct device *dev = rproc->dev.parent;
118 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
119 struct clk *dsp_clk = drproc->dsp_clk;
120
121 /* hw requires the start (boot) address be on 1KB boundary */
122 if (rproc->bootaddr & 0x3ff) {
123 dev_err(dev, "invalid boot address: must be aligned to 1KB\n");
124
125 return -EINVAL;
126 }
127
128 writel(rproc->bootaddr, drproc->bootreg);
129
130 clk_enable(dsp_clk);
131 davinci_clk_reset_deassert(dsp_clk);
132
133 return 0;
134 }
135
136 static int da8xx_rproc_stop(struct rproc *rproc)
137 {
138 struct da8xx_rproc *drproc = rproc->priv;
139
140 davinci_clk_reset_assert(drproc->dsp_clk);
141 clk_disable(drproc->dsp_clk);
142
143 return 0;
144 }
145
146 /* kick a virtqueue */
147 static void da8xx_rproc_kick(struct rproc *rproc, int vqid)
148 {
149 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
150
151 /* Interrupt remote proc */
152 writel(SYSCFG_CHIPSIG2, drproc->chipsig);
153 }
154
155 static const struct rproc_ops da8xx_rproc_ops = {
156 .start = da8xx_rproc_start,
157 .stop = da8xx_rproc_stop,
158 .kick = da8xx_rproc_kick,
159 };
160
161 static int da8xx_rproc_probe(struct platform_device *pdev)
162 {
163 struct device *dev = &pdev->dev;
164 struct da8xx_rproc *drproc;
165 struct rproc *rproc;
166 struct irq_data *irq_data;
167 struct resource *bootreg_res;
168 struct resource *chipsig_res;
169 struct clk *dsp_clk;
170 void __iomem *chipsig;
171 void __iomem *bootreg;
172 int irq;
173 int ret;
174
175 irq = platform_get_irq(pdev, 0);
176 if (irq < 0) {
177 dev_err(dev, "platform_get_irq(pdev, 0) error: %d\n", irq);
178 return irq;
179 }
180
181 irq_data = irq_get_irq_data(irq);
182 if (!irq_data) {
183 dev_err(dev, "irq_get_irq_data(%d): NULL\n", irq);
184 return -EINVAL;
185 }
186
187 bootreg_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
188 bootreg = devm_ioremap_resource(dev, bootreg_res);
189 if (IS_ERR(bootreg))
190 return PTR_ERR(bootreg);
191
192 chipsig_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
193 chipsig = devm_ioremap_resource(dev, chipsig_res);
194 if (IS_ERR(chipsig))
195 return PTR_ERR(chipsig);
196
197 dsp_clk = devm_clk_get(dev, NULL);
198 if (IS_ERR(dsp_clk)) {
199 dev_err(dev, "clk_get error: %ld\n", PTR_ERR(dsp_clk));
200
201 return PTR_ERR(dsp_clk);
202 }
203
204 rproc = rproc_alloc(dev, "dsp", &da8xx_rproc_ops, da8xx_fw_name,
205 sizeof(*drproc));
206 if (!rproc)
207 return -ENOMEM;
208
209 drproc = rproc->priv;
210 drproc->rproc = rproc;
211 drproc->dsp_clk = dsp_clk;
212 rproc->has_iommu = false;
213
214 platform_set_drvdata(pdev, rproc);
215
216 /* everything the ISR needs is now setup, so hook it up */
217 ret = devm_request_threaded_irq(dev, irq, da8xx_rproc_callback,
218 handle_event, 0, "da8xx-remoteproc",
219 rproc);
220 if (ret) {
221 dev_err(dev, "devm_request_threaded_irq error: %d\n", ret);
222 goto free_rproc;
223 }
224
225 /*
226 * rproc_add() can end up enabling the DSP's clk with the DSP
227 * *not* in reset, but da8xx_rproc_start() needs the DSP to be
228 * held in reset at the time it is called.
229 */
230 ret = davinci_clk_reset_assert(drproc->dsp_clk);
231 if (ret)
232 goto free_rproc;
233
234 drproc->chipsig = chipsig;
235 drproc->bootreg = bootreg;
236 drproc->ack_fxn = irq_data->chip->irq_ack;
237 drproc->irq_data = irq_data;
238 drproc->irq = irq;
239
240 ret = rproc_add(rproc);
241 if (ret) {
242 dev_err(dev, "rproc_add failed: %d\n", ret);
243 goto free_rproc;
244 }
245
246 return 0;
247
248 free_rproc:
249 rproc_free(rproc);
250
251 return ret;
252 }
253
254 static int da8xx_rproc_remove(struct platform_device *pdev)
255 {
256 struct rproc *rproc = platform_get_drvdata(pdev);
257 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
258
259 /*
260 * The devm subsystem might end up releasing things before
261 * freeing the irq, thus allowing an interrupt to sneak in while
262 * the device is being removed. This should prevent that.
263 */
264 disable_irq(drproc->irq);
265
266 rproc_del(rproc);
267 rproc_free(rproc);
268
269 return 0;
270 }
271
272 static struct platform_driver da8xx_rproc_driver = {
273 .probe = da8xx_rproc_probe,
274 .remove = da8xx_rproc_remove,
275 .driver = {
276 .name = "davinci-rproc",
277 },
278 };
279
280 module_platform_driver(da8xx_rproc_driver);
281
282 MODULE_LICENSE("GPL v2");
283 MODULE_DESCRIPTION("DA8XX Remote Processor control driver");