drivers/remoteproc/da8xx_remoteproc.c

   1 /*
   2  * Remote processor machine-specific module for DA8XX
   3  *
   4  * Copyright (C) 2013 Texas Instruments, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * version 2 as published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/bitops.h>
  12 #include <linux/clk.h>
  13 #include <linux/err.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/io.h>
  16 #include <linux/irq.h>
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/of_reserved_mem.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/remoteproc.h>
  22
  23 #include <mach/clock.h>   /* for davinci_clk_reset_assert/deassert() */
  24
  25 #include "remoteproc_internal.h"
  26
  27 static char *da8xx_fw_name;
  28 module_param(da8xx_fw_name, charp, S_IRUGO);
  29 MODULE_PARM_DESC(da8xx_fw_name,
  30                  "Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')");
  31
  32 /*
  33  * OMAP-L138 Technical References:
  34  * http://www.ti.com/product/omap-l138
  35  */
  36 #define SYSCFG_CHIPSIG0 BIT(0)
  37 #define SYSCFG_CHIPSIG1 BIT(1)
  38 #define SYSCFG_CHIPSIG2 BIT(2)
  39 #define SYSCFG_CHIPSIG3 BIT(3)
  40 #define SYSCFG_CHIPSIG4 BIT(4)
  41
  42 #define DA8XX_RPROC_LOCAL_ADDRESS_MASK  (SZ_16M - 1)
  43
  44 /**
  45  * struct da8xx_rproc_mem - internal memory structure
  46  * @cpu_addr: MPU virtual address of the memory region
  47  * @bus_addr: Bus address used to access the memory region
  48  * @dev_addr: Device address of the memory region from DSP view
  49  * @size: Size of the memory region
  50  */
  51 struct da8xx_rproc_mem {
  52         void __iomem *cpu_addr;
  53         phys_addr_t bus_addr;
  54         u32 dev_addr;
  55         size_t size;
  56 };
  57
  58 /**
  59  * struct da8xx_rproc - da8xx remote processor instance state
  60  * @rproc: rproc handle
  61  * @mem: internal memory regions data
  62  * @num_mems: number of internal memory regions
  63  * @dsp_clk: placeholder for platform's DSP clk
  64  * @ack_fxn: chip-specific ack function for ack'ing irq
  65  * @irq_data: ack_fxn function parameter
  66  * @chipsig: virt ptr to DSP interrupt registers (CHIPSIG & CHIPSIG_CLR)
  67  * @bootreg: virt ptr to DSP boot address register (HOST1CFG)
  68  * @irq: irq # used by this instance
  69  */
  70 struct da8xx_rproc {
  71         struct rproc *rproc;
  72         struct da8xx_rproc_mem *mem;
  73         int num_mems;
  74         struct clk *dsp_clk;
  75         void (*ack_fxn)(struct irq_data *data);
  76         struct irq_data *irq_data;
  77         void __iomem *chipsig;
  78         void __iomem *bootreg;
  79         int irq;
  80 };
  81
  82 /**
  83  * handle_event() - inbound virtqueue message workqueue function
  84  *
  85  * This function is registered as a kernel thread and is scheduled by the
  86  * kernel handler.
  87  */
  88 static irqreturn_t handle_event(int irq, void *p)
  89 {
  90         struct rproc *rproc = (struct rproc *)p;
  91
  92         /* Process incoming buffers on all our vrings */
  93         rproc_vq_interrupt(rproc, 0);
  94         rproc_vq_interrupt(rproc, 1);
  95
  96         return IRQ_HANDLED;
  97 }
  98
  99 /**
 100  * da8xx_rproc_callback() - inbound virtqueue message handler
 101  *
 102  * This handler is invoked directly by the kernel whenever the remote
 103  * core (DSP) has modified the state of a virtqueue.  There is no
 104  * "payload" message indicating the virtqueue index as is the case with
 105  * mailbox-based implementations on OMAP4.  As such, this handler "polls"
 106  * each known virtqueue index for every invocation.
 107  */
 108 static irqreturn_t da8xx_rproc_callback(int irq, void *p)
 109 {
 110         struct rproc *rproc = (struct rproc *)p;
 111         struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
 112         u32 chipsig;
 113
 114         chipsig = readl(drproc->chipsig);
 115         if (chipsig & SYSCFG_CHIPSIG0) {
 116                 /* Clear interrupt level source */
 117                 writel(SYSCFG_CHIPSIG0, drproc->chipsig + 4);
 118
 119                 /*
 120                  * ACK intr to AINTC.
 121                  *
 122                  * It has already been ack'ed by the kernel before calling
 123                  * this function, but since the ARM<->DSP interrupts in the
 124                  * CHIPSIG register are "level" instead of "pulse" variety,
 125                  * we need to ack it after taking down the level else we'll
 126                  * be called again immediately after returning.
 127                  */
 128                 drproc->ack_fxn(drproc->irq_data);
 129
 130                 return IRQ_WAKE_THREAD;
 131         }
 132
 133         return IRQ_HANDLED;
 134 }
 135
 136 static int da8xx_rproc_start(struct rproc *rproc)
 137 {
 138         struct device *dev = rproc->dev.parent;
 139         struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
 140         struct clk *dsp_clk = drproc->dsp_clk;
 141
 142         /* hw requires the start (boot) address be on 1KB boundary */
 143         if (rproc->bootaddr & 0x3ff) {
 144                 dev_err(dev, "invalid boot address: must be aligned to 1KB\n");
 145
 146                 return -EINVAL;
 147         }
 148
 149         writel(rproc->bootaddr, drproc->bootreg);
 150
 151         clk_enable(dsp_clk);
 152         davinci_clk_reset_deassert(dsp_clk);
 153
 154         return 0;
 155 }
 156
 157 static int da8xx_rproc_stop(struct rproc *rproc)
 158 {
 159         struct da8xx_rproc *drproc = rproc->priv;
 160
 161         davinci_clk_reset_assert(drproc->dsp_clk);
 162         clk_disable(drproc->dsp_clk);
 163
 164         return 0;
 165 }
 166
 167 /* kick a virtqueue */
 168 static void da8xx_rproc_kick(struct rproc *rproc, int vqid)
 169 {
 170         struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
 171
 172         /* Interrupt remote proc */
 173         writel(SYSCFG_CHIPSIG2, drproc->chipsig);
 174 }
 175
 176 static const struct rproc_ops da8xx_rproc_ops = {
 177         .start = da8xx_rproc_start,
 178         .stop = da8xx_rproc_stop,
 179         .kick = da8xx_rproc_kick,
 180 };
 181
 182 static int da8xx_rproc_get_internal_memories(struct platform_device *pdev,
 183                                              struct da8xx_rproc *drproc)
 184 {
 185         static const char * const mem_names[] = {"l2sram", "l1pram", "l1dram"};
 186         int num_mems = ARRAY_SIZE(mem_names);
 187         struct device *dev = &pdev->dev;
 188         struct resource *res;
 189         int i;
 190
 191         drproc->mem = devm_kcalloc(dev, num_mems, sizeof(*drproc->mem),
 192                                    GFP_KERNEL);
 193         if (!drproc->mem)
 194                 return -ENOMEM;
 195
 196         for (i = 0; i < num_mems; i++) {
 197                 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 198                                                    mem_names[i]);
 199                 drproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res);
 200                 if (IS_ERR(drproc->mem[i].cpu_addr)) {
 201                         dev_err(dev, "failed to parse and map %s memory\n",
 202                                 mem_names[i]);
 203                         return PTR_ERR(drproc->mem[i].cpu_addr);
 204                 }
 205                 drproc->mem[i].bus_addr = res->start;
 206                 drproc->mem[i].dev_addr =
 207                                 res->start & DA8XX_RPROC_LOCAL_ADDRESS_MASK;
 208                 drproc->mem[i].size = resource_size(res);
 209
 210                 dev_dbg(dev, "memory %8s: bus addr %pa size 0x%x va %p da 0x%x\n",
 211                         mem_names[i], &drproc->mem[i].bus_addr,
 212                         drproc->mem[i].size, drproc->mem[i].cpu_addr,
 213                         drproc->mem[i].dev_addr);
 214         }
 215         drproc->num_mems = num_mems;
 216
 217         return 0;
 218 }
 219
 220 static int da8xx_rproc_probe(struct platform_device *pdev)
 221 {
 222         struct device *dev = &pdev->dev;
 223         struct da8xx_rproc *drproc;
 224         struct rproc *rproc;
 225         struct irq_data *irq_data;
 226         struct resource *bootreg_res;
 227         struct resource *chipsig_res;
 228         struct clk *dsp_clk;
 229         void __iomem *chipsig;
 230         void __iomem *bootreg;
 231         int irq;
 232         int ret;
 233
 234         irq = platform_get_irq(pdev, 0);
 235         if (irq < 0) {
 236                 dev_err(dev, "platform_get_irq(pdev, 0) error: %d\n", irq);
 237                 return irq;
 238         }
 239
 240         irq_data = irq_get_irq_data(irq);
 241         if (!irq_data) {
 242                 dev_err(dev, "irq_get_irq_data(%d): NULL\n", irq);
 243                 return -EINVAL;
 244         }
 245
 246         bootreg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 247                                                    "host1cfg");
 248         bootreg = devm_ioremap_resource(dev, bootreg_res);
 249         if (IS_ERR(bootreg))
 250                 return PTR_ERR(bootreg);
 251
 252         chipsig_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 253                                                    "chipsig");
 254         chipsig = devm_ioremap_resource(dev, chipsig_res);
 255         if (IS_ERR(chipsig))
 256                 return PTR_ERR(chipsig);
 257
 258         dsp_clk = devm_clk_get(dev, NULL);
 259         if (IS_ERR(dsp_clk)) {
 260                 dev_err(dev, "clk_get error: %ld\n", PTR_ERR(dsp_clk));
 261
 262                 return PTR_ERR(dsp_clk);
 263         }
 264
 265         if (dev->of_node) {
 266                 ret = of_reserved_mem_device_init(dev);
 267                 if (ret) {
 268                         dev_err(dev, "device does not have specific CMA pool: %d\n",
 269                                 ret);
 270                         return ret;
 271                 }
 272         }
 273
 274         rproc = rproc_alloc(dev, "dsp", &da8xx_rproc_ops, da8xx_fw_name,
 275                 sizeof(*drproc));
 276         if (!rproc) {
 277                 ret = -ENOMEM;
 278                 goto free_mem;
 279         }
 280
 281         drproc = rproc->priv;
 282         drproc->rproc = rproc;
 283         drproc->dsp_clk = dsp_clk;
 284         rproc->has_iommu = false;
 285
 286         ret = da8xx_rproc_get_internal_memories(pdev, drproc);
 287         if (ret)
 288                 goto free_rproc;
 289
 290         platform_set_drvdata(pdev, rproc);
 291
 292         /* everything the ISR needs is now setup, so hook it up */
 293         ret = devm_request_threaded_irq(dev, irq, da8xx_rproc_callback,
 294                                         handle_event, 0, "da8xx-remoteproc",
 295                                         rproc);
 296         if (ret) {
 297                 dev_err(dev, "devm_request_threaded_irq error: %d\n", ret);
 298                 goto free_rproc;
 299         }
 300
 301         /*
 302          * rproc_add() can end up enabling the DSP's clk with the DSP
 303          * *not* in reset, but da8xx_rproc_start() needs the DSP to be
 304          * held in reset at the time it is called.
 305          */
 306         ret = davinci_clk_reset_assert(drproc->dsp_clk);
 307         if (ret)
 308                 goto free_rproc;
 309
 310         drproc->chipsig = chipsig;
 311         drproc->bootreg = bootreg;
 312         drproc->ack_fxn = irq_data->chip->irq_ack;
 313         drproc->irq_data = irq_data;
 314         drproc->irq = irq;
 315
 316         ret = rproc_add(rproc);
 317         if (ret) {
 318                 dev_err(dev, "rproc_add failed: %d\n", ret);
 319                 goto free_rproc;
 320         }
 321
 322         return 0;
 323
 324 free_rproc:
 325         rproc_free(rproc);
 326 free_mem:
 327         if (dev->of_node)
 328                 of_reserved_mem_device_release(dev);
 329         return ret;
 330 }
 331
 332 static int da8xx_rproc_remove(struct platform_device *pdev)
 333 {
 334         struct rproc *rproc = platform_get_drvdata(pdev);
 335         struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
 336         struct device *dev = &pdev->dev;
 337
 338         /*
 339          * The devm subsystem might end up releasing things before
 340          * freeing the irq, thus allowing an interrupt to sneak in while
 341          * the device is being removed.  This should prevent that.
 342          */
 343         disable_irq(drproc->irq);
 344
 345         rproc_del(rproc);
 346         rproc_free(rproc);
 347         if (dev->of_node)
 348                 of_reserved_mem_device_release(dev);
 349
 350         return 0;
 351 }
 352
 353 static const struct of_device_id davinci_rproc_of_match[] __maybe_unused = {
 354         { .compatible = "ti,da850-dsp", },
 355         { /* sentinel */ },
 356 };
 357 MODULE_DEVICE_TABLE(of, davinci_rproc_of_match);
 358
 359 static struct platform_driver da8xx_rproc_driver = {
 360         .probe = da8xx_rproc_probe,
 361         .remove = da8xx_rproc_remove,
 362         .driver = {
 363                 .name = "davinci-rproc",
 364                 .of_match_table = of_match_ptr(davinci_rproc_of_match),
 365         },
 366 };
 367
 368 module_platform_driver(da8xx_rproc_driver);
 369
 370 MODULE_LICENSE("GPL v2");
 371 MODULE_DESCRIPTION("DA8XX Remote Processor control driver");