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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (c) 2019 MediaTek Inc.
4 */
5
6 #ifndef __RPROC_MTK_COMMON_H
7 #define __RPROC_MTK_COMMON_H
8
9 #include <linux/interrupt.h>
10 #include <linux/kernel.h>
11 #include <linux/platform_device.h>
12 #include <linux/remoteproc.h>
13 #include <linux/remoteproc/mtk_scp.h>
14
15 #define MT8183_SW_RSTN 0x0
16 #define MT8183_SW_RSTN_BIT BIT(0)
17 #define MT8183_SCP_TO_HOST 0x1C
18 #define MT8183_SCP_IPC_INT_BIT BIT(0)
19 #define MT8183_SCP_WDT_INT_BIT BIT(8)
20 #define MT8183_HOST_TO_SCP 0x28
21 #define MT8183_HOST_IPC_INT_BIT BIT(0)
22 #define MT8183_WDT_CFG 0x84
23 #define MT8183_SCP_CLK_SW_SEL 0x4000
24 #define MT8183_SCP_CLK_DIV_SEL 0x4024
25 #define MT8183_SCP_SRAM_PDN 0x402C
26 #define MT8183_SCP_L1_SRAM_PD 0x4080
27 #define MT8183_SCP_TCM_TAIL_SRAM_PD 0x4094
28
29 #define MT8183_SCP_CACHE_SEL(x) (0x14000 + (x) * 0x3000)
30 #define MT8183_SCP_CACHE_CON MT8183_SCP_CACHE_SEL(0)
31 #define MT8183_SCP_DCACHE_CON MT8183_SCP_CACHE_SEL(1)
32 #define MT8183_SCP_CACHESIZE_8KB BIT(8)
33 #define MT8183_SCP_CACHE_CON_WAYEN BIT(10)
34
35 #define MT8192_L2TCM_SRAM_PD_0 0x10C0
36 #define MT8192_L2TCM_SRAM_PD_1 0x10C4
37 #define MT8192_L2TCM_SRAM_PD_2 0x10C8
38 #define MT8192_L1TCM_SRAM_PDN 0x102C
39 #define MT8192_CPU0_SRAM_PD 0x1080
40
41 #define MT8192_SCP2APMCU_IPC_SET 0x4080
42 #define MT8192_SCP2APMCU_IPC_CLR 0x4084
43 #define MT8192_SCP_IPC_INT_BIT BIT(0)
44 #define MT8192_SCP2SPM_IPC_CLR 0x4094
45 #define MT8192_GIPC_IN_SET 0x4098
46 #define MT8192_HOST_IPC_INT_BIT BIT(0)
47
48 #define MT8192_CORE0_SW_RSTN_CLR 0x10000
49 #define MT8192_CORE0_SW_RSTN_SET 0x10004
50 #define MT8192_CORE0_MEM_ATT_PREDEF 0x10008
51 #define MT8192_CORE0_WDT_IRQ 0x10030
52 #define MT8192_CORE0_WDT_CFG 0x10034
53
54 #define SCP_FW_VER_LEN 32
55 #define SCP_SHARE_BUFFER_SIZE 288
56
57 struct scp_run {
58 u32 signaled;
59 s8 fw_ver[SCP_FW_VER_LEN];
60 u32 dec_capability;
61 u32 enc_capability;
62 wait_queue_head_t wq;
63 };
64
65 struct scp_ipi_desc {
66 /* For protecting handler. */
67 struct mutex lock;
68 scp_ipi_handler_t handler;
69 void *priv;
70 };
71
72 struct mtk_scp;
73
74 struct mtk_scp_of_data {
75 int (*scp_before_load)(struct mtk_scp *scp);
76 void (*scp_irq_handler)(struct mtk_scp *scp);
77 void (*scp_reset_assert)(struct mtk_scp *scp);
78 void (*scp_reset_deassert)(struct mtk_scp *scp);
79 void (*scp_stop)(struct mtk_scp *scp);
80 void *(*scp_da_to_va)(struct mtk_scp *scp, u64 da, size_t len);
81
82 u32 host_to_scp_reg;
83 u32 host_to_scp_int_bit;
84
85 size_t ipi_buf_offset;
86 };
87
88 struct mtk_scp {
89 struct device *dev;
90 struct rproc *rproc;
91 struct clk *clk;
92 void __iomem *reg_base;
93 void __iomem *sram_base;
94 size_t sram_size;
95 phys_addr_t sram_phys;
96 void __iomem *l1tcm_base;
97 size_t l1tcm_size;
98 phys_addr_t l1tcm_phys;
99
100 const struct mtk_scp_of_data *data;
101
102 struct mtk_share_obj __iomem *recv_buf;
103 struct mtk_share_obj __iomem *send_buf;
104 struct scp_run run;
105 /* To prevent multiple ipi_send run concurrently. */
106 struct mutex send_lock;
107 struct scp_ipi_desc ipi_desc[SCP_IPI_MAX];
108 bool ipi_id_ack[SCP_IPI_MAX];
109 wait_queue_head_t ack_wq;
110
111 void *cpu_addr;
112 dma_addr_t dma_addr;
113 size_t dram_size;
114
115 struct rproc_subdev *rpmsg_subdev;
116 };
117
118 /**
119 * struct mtk_share_obj - SRAM buffer shared with AP and SCP
120 *
121 * @id: IPI id
122 * @len: share buffer length
123 * @share_buf: share buffer data
124 */
125 struct mtk_share_obj {
126 u32 id;
127 u32 len;
128 u8 share_buf[SCP_SHARE_BUFFER_SIZE];
129 };
130
131 void scp_memcpy_aligned(void __iomem *dst, const void *src, unsigned int len);
132 void scp_ipi_lock(struct mtk_scp *scp, u32 id);
133 void scp_ipi_unlock(struct mtk_scp *scp, u32 id);
134
135 #endif