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1 # SPDX-License-Identifier: GPL-2.0-only
2 config ARCH_HAS_RESET_CONTROLLER
3 bool
4
5 menuconfig RESET_CONTROLLER
6 bool "Reset Controller Support"
7 default y if ARCH_HAS_RESET_CONTROLLER
8 help
9 Generic Reset Controller support.
10
11 This framework is designed to abstract reset handling of devices
12 via GPIOs or SoC-internal reset controller modules.
13
14 If unsure, say no.
15
16 if RESET_CONTROLLER
17
18 config RESET_A10SR
19 tristate "Altera Arria10 System Resource Reset"
20 depends on MFD_ALTERA_A10SR
21 help
22 This option enables support for the external reset functions for
23 peripheral PHYs on the Altera Arria10 System Resource Chip.
24
25 config RESET_ATH79
26 bool "AR71xx Reset Driver" if COMPILE_TEST
27 default ATH79
28 help
29 This enables the ATH79 reset controller driver that supports the
30 AR71xx SoC reset controller.
31
32 config RESET_AXS10X
33 bool "AXS10x Reset Driver" if COMPILE_TEST
34 default ARC_PLAT_AXS10X
35 help
36 This enables the reset controller driver for AXS10x.
37
38 config RESET_BCM6345
39 bool "BCM6345 Reset Controller"
40 depends on BMIPS_GENERIC || COMPILE_TEST
41 default BMIPS_GENERIC
42 help
43 This enables the reset controller driver for BCM6345 SoCs.
44
45 config RESET_BERLIN
46 tristate "Berlin Reset Driver"
47 depends on ARCH_BERLIN || COMPILE_TEST
48 default m if ARCH_BERLIN
49 help
50 This enables the reset controller driver for Marvell Berlin SoCs.
51
52 config RESET_BRCMSTB
53 tristate "Broadcom STB reset controller"
54 depends on ARCH_BRCMSTB || COMPILE_TEST
55 default ARCH_BRCMSTB
56 help
57 This enables the reset controller driver for Broadcom STB SoCs using
58 a SUN_TOP_CTRL_SW_INIT style controller.
59
60 config RESET_BRCMSTB_RESCAL
61 bool "Broadcom STB RESCAL reset controller"
62 depends on HAS_IOMEM
63 depends on ARCH_BRCMSTB || COMPILE_TEST
64 default ARCH_BRCMSTB
65 help
66 This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
67 BCM7216.
68
69 config RESET_HSDK
70 bool "Synopsys HSDK Reset Driver"
71 depends on HAS_IOMEM
72 depends on ARC_SOC_HSDK || COMPILE_TEST
73 help
74 This enables the reset controller driver for HSDK board.
75
76 config RESET_IMX7
77 tristate "i.MX7/8 Reset Driver"
78 depends on HAS_IOMEM
79 depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST
80 default y if SOC_IMX7D
81 select MFD_SYSCON
82 help
83 This enables the reset controller driver for i.MX7 SoCs.
84
85 config RESET_INTEL_GW
86 bool "Intel Reset Controller Driver"
87 depends on X86 || COMPILE_TEST
88 depends on OF && HAS_IOMEM
89 select REGMAP_MMIO
90 help
91 This enables the reset controller driver for Intel Gateway SoCs.
92 Say Y to control the reset signals provided by reset controller.
93 Otherwise, say N.
94
95 config RESET_K210
96 bool "Reset controller driver for Canaan Kendryte K210 SoC"
97 depends on (SOC_CANAAN || COMPILE_TEST) && OF
98 select MFD_SYSCON
99 default SOC_CANAAN
100 help
101 Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
102 Say Y if you want to control reset signals provided by this
103 controller.
104
105 config RESET_LANTIQ
106 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
107 default SOC_TYPE_XWAY
108 help
109 This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
110
111 config RESET_LPC18XX
112 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
113 default ARCH_LPC18XX
114 help
115 This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
116
117 config RESET_MCHP_SPARX5
118 bool "Microchip Sparx5 reset driver"
119 depends on HAS_IOMEM || COMPILE_TEST
120 default y if SPARX5_SWITCH
121 select MFD_SYSCON
122 help
123 This driver supports switch core reset for the Microchip Sparx5 SoC.
124
125 config RESET_MESON
126 tristate "Meson Reset Driver"
127 depends on ARCH_MESON || COMPILE_TEST
128 default ARCH_MESON
129 help
130 This enables the reset driver for Amlogic Meson SoCs.
131
132 config RESET_MESON_AUDIO_ARB
133 tristate "Meson Audio Memory Arbiter Reset Driver"
134 depends on ARCH_MESON || COMPILE_TEST
135 help
136 This enables the reset driver for Audio Memory Arbiter of
137 Amlogic's A113 based SoCs
138
139 config RESET_NPCM
140 bool "NPCM BMC Reset Driver" if COMPILE_TEST
141 default ARCH_NPCM
142 help
143 This enables the reset controller driver for Nuvoton NPCM
144 BMC SoCs.
145
146 config RESET_OXNAS
147 bool
148
149 config RESET_PISTACHIO
150 bool "Pistachio Reset Driver" if COMPILE_TEST
151 default MACH_PISTACHIO
152 help
153 This enables the reset driver for ImgTec Pistachio SoCs.
154
155 config RESET_QCOM_AOSS
156 tristate "Qcom AOSS Reset Driver"
157 depends on ARCH_QCOM || COMPILE_TEST
158 help
159 This enables the AOSS (always on subsystem) reset driver
160 for Qualcomm SDM845 SoCs. Say Y if you want to control
161 reset signals provided by AOSS for Modem, Venus, ADSP,
162 GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
163
164 config RESET_QCOM_PDC
165 tristate "Qualcomm PDC Reset Driver"
166 depends on ARCH_QCOM || COMPILE_TEST
167 help
168 This enables the PDC (Power Domain Controller) reset driver
169 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
170 to control reset signals provided by PDC for Modem, Compute,
171 Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
172
173 config RESET_RASPBERRYPI
174 tristate "Raspberry Pi 4 Firmware Reset Driver"
175 depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
176 default USB_XHCI_PCI
177 help
178 Raspberry Pi 4's co-processor controls some of the board's HW
179 initialization process, but it's up to Linux to trigger it when
180 relevant. This driver provides a reset controller capable of
181 interfacing with RPi4's co-processor and model these firmware
182 initialization routines as reset lines.
183
184 config RESET_SCMI
185 tristate "Reset driver controlled via ARM SCMI interface"
186 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
187 default ARM_SCMI_PROTOCOL
188 help
189 This driver provides support for reset signal/domains that are
190 controlled by firmware that implements the SCMI interface.
191
192 This driver uses SCMI Message Protocol to interact with the
193 firmware controlling all the reset signals.
194
195 config RESET_SIMPLE
196 bool "Simple Reset Controller Driver" if COMPILE_TEST
197 default ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC
198 help
199 This enables a simple reset controller driver for reset lines that
200 that can be asserted and deasserted by toggling bits in a contiguous,
201 exclusive register space.
202
203 Currently this driver supports:
204 - Altera SoCFPGAs
205 - ASPEED BMC SoCs
206 - Bitmain BM1880 SoC
207 - Realtek SoCs
208 - RCC reset controller in STM32 MCUs
209 - Allwinner SoCs
210 - ZTE's zx2967 family
211 - SiFive FU740 SoCs
212
213 config RESET_SOCFPGA
214 bool "SoCFPGA Reset Driver" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA)
215 default ARM && ARCH_INTEL_SOCFPGA
216 select RESET_SIMPLE
217 help
218 This enables the reset driver for the SoCFPGA ARMv7 platforms. This
219 driver gets initialized early during platform init calls.
220
221 config RESET_SUNXI
222 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
223 default ARCH_SUNXI
224 select RESET_SIMPLE
225 help
226 This enables the reset driver for Allwinner SoCs.
227
228 config RESET_TI_SCI
229 tristate "TI System Control Interface (TI-SCI) reset driver"
230 depends on TI_SCI_PROTOCOL
231 help
232 This enables the reset driver support over TI System Control Interface
233 available on some new TI's SoCs. If you wish to use reset resources
234 managed by the TI System Controller, say Y here. Otherwise, say N.
235
236 config RESET_TI_SYSCON
237 tristate "TI SYSCON Reset Driver"
238 depends on HAS_IOMEM
239 select MFD_SYSCON
240 help
241 This enables the reset driver support for TI devices with
242 memory-mapped reset registers as part of a syscon device node. If
243 you wish to use the reset framework for such memory-mapped devices,
244 say Y here. Otherwise, say N.
245
246 config RESET_UNIPHIER
247 tristate "Reset controller driver for UniPhier SoCs"
248 depends on ARCH_UNIPHIER || COMPILE_TEST
249 depends on OF && MFD_SYSCON
250 default ARCH_UNIPHIER
251 help
252 Support for reset controllers on UniPhier SoCs.
253 Say Y if you want to control reset signals provided by System Control
254 block, Media I/O block, Peripheral Block.
255
256 config RESET_UNIPHIER_GLUE
257 tristate "Reset driver in glue layer for UniPhier SoCs"
258 depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
259 default ARCH_UNIPHIER
260 select RESET_SIMPLE
261 help
262 Support for peripheral core reset included in its own glue layer
263 on UniPhier SoCs. Say Y if you want to control reset signals
264 provided by the glue layer.
265
266 config RESET_ZYNQ
267 bool "ZYNQ Reset Driver" if COMPILE_TEST
268 default ARCH_ZYNQ
269 help
270 This enables the reset controller driver for Xilinx Zynq SoCs.
271
272 source "drivers/reset/sti/Kconfig"
273 source "drivers/reset/hisilicon/Kconfig"
274 source "drivers/reset/tegra/Kconfig"
275
276 endif