1 # SPDX-License-Identifier: GPL-2.0-only
2 config ARCH_HAS_RESET_CONTROLLER
5 menuconfig RESET_CONTROLLER
6 bool "Reset Controller Support"
7 default y if ARCH_HAS_RESET_CONTROLLER
9 Generic Reset Controller support.
11 This framework is designed to abstract reset handling of devices
12 via GPIOs or SoC-internal reset controller modules.
19 tristate "Altera Arria10 System Resource Reset"
20 depends on MFD_ALTERA_A10SR
22 This option enables support for the external reset functions for
23 peripheral PHYs on the Altera Arria10 System Resource Chip.
26 bool "AR71xx Reset Driver" if COMPILE_TEST
29 This enables the ATH79 reset controller driver that supports the
30 AR71xx SoC reset controller.
33 bool "AXS10x Reset Driver" if COMPILE_TEST
34 default ARC_PLAT_AXS10X
36 This enables the reset controller driver for AXS10x.
39 bool "BCM6345 Reset Controller"
40 depends on BMIPS_GENERIC || COMPILE_TEST
43 This enables the reset controller driver for BCM6345 SoCs.
46 tristate "Berlin Reset Driver"
47 depends on ARCH_BERLIN || COMPILE_TEST
48 default m if ARCH_BERLIN
50 This enables the reset controller driver for Marvell Berlin SoCs.
53 tristate "Broadcom STB reset controller"
54 depends on ARCH_BRCMSTB || COMPILE_TEST
57 This enables the reset controller driver for Broadcom STB SoCs using
58 a SUN_TOP_CTRL_SW_INIT style controller.
60 config RESET_BRCMSTB_RESCAL
61 bool "Broadcom STB RESCAL reset controller"
63 depends on ARCH_BRCMSTB || COMPILE_TEST
66 This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
70 bool "Synopsys HSDK Reset Driver"
72 depends on ARC_SOC_HSDK || COMPILE_TEST
74 This enables the reset controller driver for HSDK board.
77 tristate "i.MX7/8 Reset Driver"
79 depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST
80 default y if SOC_IMX7D
83 This enables the reset controller driver for i.MX7 SoCs.
86 bool "Intel Reset Controller Driver"
87 depends on X86 || COMPILE_TEST
88 depends on OF && HAS_IOMEM
91 This enables the reset controller driver for Intel Gateway SoCs.
92 Say Y to control the reset signals provided by reset controller.
96 bool "Reset controller driver for Canaan Kendryte K210 SoC"
97 depends on (SOC_CANAAN || COMPILE_TEST) && OF
101 Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
102 Say Y if you want to control reset signals provided by this
106 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
107 default SOC_TYPE_XWAY
109 This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
112 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
115 This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
117 config RESET_MCHP_SPARX5
118 bool "Microchip Sparx5 reset driver"
119 depends on ARCH_SPARX5 || COMPILE_TEST
120 default y if SPARX5_SWITCH
123 This driver supports switch core reset for the Microchip Sparx5 SoC.
126 tristate "Meson Reset Driver"
127 depends on ARCH_MESON || COMPILE_TEST
130 This enables the reset driver for Amlogic Meson SoCs.
132 config RESET_MESON_AUDIO_ARB
133 tristate "Meson Audio Memory Arbiter Reset Driver"
134 depends on ARCH_MESON || COMPILE_TEST
136 This enables the reset driver for Audio Memory Arbiter of
137 Amlogic's A113 based SoCs
140 bool "NPCM BMC Reset Driver" if COMPILE_TEST
143 This enables the reset controller driver for Nuvoton NPCM
149 config RESET_PISTACHIO
150 bool "Pistachio Reset Driver" if COMPILE_TEST
151 default MACH_PISTACHIO
153 This enables the reset driver for ImgTec Pistachio SoCs.
155 config RESET_QCOM_AOSS
156 tristate "Qcom AOSS Reset Driver"
157 depends on ARCH_QCOM || COMPILE_TEST
159 This enables the AOSS (always on subsystem) reset driver
160 for Qualcomm SDM845 SoCs. Say Y if you want to control
161 reset signals provided by AOSS for Modem, Venus, ADSP,
162 GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
164 config RESET_QCOM_PDC
165 tristate "Qualcomm PDC Reset Driver"
166 depends on ARCH_QCOM || COMPILE_TEST
168 This enables the PDC (Power Domain Controller) reset driver
169 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
170 to control reset signals provided by PDC for Modem, Compute,
171 Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
173 config RESET_RASPBERRYPI
174 tristate "Raspberry Pi 4 Firmware Reset Driver"
175 depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
178 Raspberry Pi 4's co-processor controls some of the board's HW
179 initialization process, but it's up to Linux to trigger it when
180 relevant. This driver provides a reset controller capable of
181 interfacing with RPi4's co-processor and model these firmware
182 initialization routines as reset lines.
184 config RESET_RZG2L_USBPHY_CTRL
185 tristate "Renesas RZ/G2L USBPHY control driver"
186 depends on ARCH_R9A07G044 || COMPILE_TEST
188 Support for USBPHY Control found on RZ/G2L family. It mainly
189 controls reset and power down of the USB/PHY.
192 tristate "Reset driver controlled via ARM SCMI interface"
193 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
194 default ARM_SCMI_PROTOCOL
196 This driver provides support for reset signal/domains that are
197 controlled by firmware that implements the SCMI interface.
199 This driver uses SCMI Message Protocol to interact with the
200 firmware controlling all the reset signals.
203 bool "Simple Reset Controller Driver" if COMPILE_TEST
204 default ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC
206 This enables a simple reset controller driver for reset lines that
207 that can be asserted and deasserted by toggling bits in a contiguous,
208 exclusive register space.
210 Currently this driver supports:
215 - RCC reset controller in STM32 MCUs
220 bool "SoCFPGA Reset Driver" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA)
221 default ARM && ARCH_INTEL_SOCFPGA
224 This enables the reset driver for the SoCFPGA ARMv7 platforms. This
225 driver gets initialized early during platform init calls.
228 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
232 This enables the reset driver for Allwinner SoCs.
235 tristate "TI System Control Interface (TI-SCI) reset driver"
236 depends on TI_SCI_PROTOCOL
238 This enables the reset driver support over TI System Control Interface
239 available on some new TI's SoCs. If you wish to use reset resources
240 managed by the TI System Controller, say Y here. Otherwise, say N.
242 config RESET_TI_SYSCON
243 tristate "TI SYSCON Reset Driver"
247 This enables the reset driver support for TI devices with
248 memory-mapped reset registers as part of a syscon device node. If
249 you wish to use the reset framework for such memory-mapped devices,
250 say Y here. Otherwise, say N.
252 config RESET_UNIPHIER
253 tristate "Reset controller driver for UniPhier SoCs"
254 depends on ARCH_UNIPHIER || COMPILE_TEST
255 depends on OF && MFD_SYSCON
256 default ARCH_UNIPHIER
258 Support for reset controllers on UniPhier SoCs.
259 Say Y if you want to control reset signals provided by System Control
260 block, Media I/O block, Peripheral Block.
262 config RESET_UNIPHIER_GLUE
263 tristate "Reset driver in glue layer for UniPhier SoCs"
264 depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
265 default ARCH_UNIPHIER
268 Support for peripheral core reset included in its own glue layer
269 on UniPhier SoCs. Say Y if you want to control reset signals
270 provided by the glue layer.
273 bool "ZYNQ Reset Driver" if COMPILE_TEST
276 This enables the reset controller driver for Xilinx Zynq SoCs.
278 source "drivers/reset/sti/Kconfig"
279 source "drivers/reset/hisilicon/Kconfig"
280 source "drivers/reset/tegra/Kconfig"