]>
git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - drivers/rtc/rtc-ds1305.c
2 * rtc-ds1305.c -- driver for DS1305 and DS1306 SPI RTC chips
4 * Copyright (C) 2008 David Brownell
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/bcd.h>
14 #include <linux/slab.h>
15 #include <linux/rtc.h>
16 #include <linux/workqueue.h>
18 #include <linux/spi/spi.h>
19 #include <linux/spi/ds1305.h>
20 #include <linux/module.h>
24 * Registers ... mask DS1305_WRITE into register address to write,
25 * otherwise you're reading it. All non-bitmask values are BCD.
27 #define DS1305_WRITE 0x80
30 /* RTC date/time ... the main special cases are that we:
31 * - Need fancy "hours" encoding in 12hour mode
32 * - Don't rely on the "day-of-week" field (or tm_wday)
33 * - Are a 21st-century clock (2000 <= year < 2100)
35 #define DS1305_RTC_LEN 7 /* bytes for RTC regs */
37 #define DS1305_SEC 0x00 /* register addresses */
38 #define DS1305_MIN 0x01
39 #define DS1305_HOUR 0x02
40 # define DS1305_HR_12 0x40 /* set == 12 hr mode */
41 # define DS1305_HR_PM 0x20 /* set == PM (12hr mode) */
42 #define DS1305_WDAY 0x03
43 #define DS1305_MDAY 0x04
44 #define DS1305_MON 0x05
45 #define DS1305_YEAR 0x06
48 /* The two alarms have only sec/min/hour/wday fields (ALM_LEN).
49 * DS1305_ALM_DISABLE disables a match field (some combos are bad).
51 * NOTE that since we don't use WDAY, we limit ourselves to alarms
52 * only one day into the future (vs potentially up to a week).
54 * NOTE ALSO that while we could generate once-a-second IRQs (UIE), we
55 * don't currently support them. We'd either need to do it only when
56 * no alarm is pending (not the standard model), or to use the second
57 * alarm (implying that this is a DS1305 not DS1306, *and* that either
58 * it's wired up a second IRQ we know, or that INTCN is set)
60 #define DS1305_ALM_LEN 4 /* bytes for ALM regs */
61 #define DS1305_ALM_DISABLE 0x80
63 #define DS1305_ALM0(r) (0x07 + (r)) /* register addresses */
64 #define DS1305_ALM1(r) (0x0b + (r))
67 /* three control registers */
68 #define DS1305_CONTROL_LEN 3 /* bytes of control regs */
70 #define DS1305_CONTROL 0x0f /* register addresses */
71 # define DS1305_nEOSC 0x80 /* low enables oscillator */
72 # define DS1305_WP 0x40 /* write protect */
73 # define DS1305_INTCN 0x04 /* clear == only int0 used */
74 # define DS1306_1HZ 0x04 /* enable 1Hz output */
75 # define DS1305_AEI1 0x02 /* enable ALM1 IRQ */
76 # define DS1305_AEI0 0x01 /* enable ALM0 IRQ */
77 #define DS1305_STATUS 0x10
78 /* status has just AEIx bits, mirrored as IRQFx */
79 #define DS1305_TRICKLE 0x11
80 /* trickle bits are defined in <linux/spi/ds1305.h> */
82 /* a bunch of NVRAM */
83 #define DS1305_NVRAM_LEN 96 /* bytes of NVRAM */
85 #define DS1305_NVRAM 0x20 /* register addresses */
89 struct spi_device
*spi
;
90 struct rtc_device
*rtc
;
92 struct work_struct work
;
95 #define FLAG_EXITING 0
98 u8 ctrl
[DS1305_CONTROL_LEN
];
102 /*----------------------------------------------------------------------*/
105 * Utilities ... tolerate 12-hour AM/PM notation in case of non-Linux
106 * software (like a bootloader) which may require it.
109 static unsigned bcd2hour(u8 bcd
)
111 if (bcd
& DS1305_HR_12
) {
114 bcd
&= ~DS1305_HR_12
;
115 if (bcd
& DS1305_HR_PM
) {
117 bcd
&= ~DS1305_HR_PM
;
119 hour
+= bcd2bin(bcd
);
125 static u8
hour2bcd(bool hr12
, int hour
)
130 return DS1305_HR_12
| bin2bcd(hour
);
132 return DS1305_HR_12
| DS1305_HR_PM
| bin2bcd(hour
);
134 return bin2bcd(hour
);
137 /*----------------------------------------------------------------------*/
140 * Interface to RTC framework
143 static int ds1305_alarm_irq_enable(struct device
*dev
, unsigned int enabled
)
145 struct ds1305
*ds1305
= dev_get_drvdata(dev
);
149 buf
[0] = DS1305_WRITE
| DS1305_CONTROL
;
150 buf
[1] = ds1305
->ctrl
[0];
153 if (ds1305
->ctrl
[0] & DS1305_AEI0
)
155 buf
[1] |= DS1305_AEI0
;
157 if (!(buf
[1] & DS1305_AEI0
))
159 buf
[1] &= ~DS1305_AEI0
;
161 err
= spi_write_then_read(ds1305
->spi
, buf
, sizeof buf
, NULL
, 0);
163 ds1305
->ctrl
[0] = buf
[1];
171 * Get/set of date and time is pretty normal.
174 static int ds1305_get_time(struct device
*dev
, struct rtc_time
*time
)
176 struct ds1305
*ds1305
= dev_get_drvdata(dev
);
177 u8 addr
= DS1305_SEC
;
178 u8 buf
[DS1305_RTC_LEN
];
181 /* Use write-then-read to get all the date/time registers
182 * since dma from stack is nonportable
184 status
= spi_write_then_read(ds1305
->spi
, &addr
, sizeof addr
,
189 dev_vdbg(dev
, "%s: %02x %02x %02x, %02x %02x %02x %02x\n",
190 "read", buf
[0], buf
[1], buf
[2], buf
[3],
191 buf
[4], buf
[5], buf
[6]);
193 /* Decode the registers */
194 time
->tm_sec
= bcd2bin(buf
[DS1305_SEC
]);
195 time
->tm_min
= bcd2bin(buf
[DS1305_MIN
]);
196 time
->tm_hour
= bcd2hour(buf
[DS1305_HOUR
]);
197 time
->tm_wday
= buf
[DS1305_WDAY
] - 1;
198 time
->tm_mday
= bcd2bin(buf
[DS1305_MDAY
]);
199 time
->tm_mon
= bcd2bin(buf
[DS1305_MON
]) - 1;
200 time
->tm_year
= bcd2bin(buf
[DS1305_YEAR
]) + 100;
202 dev_vdbg(dev
, "%s secs=%d, mins=%d, "
203 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
204 "read", time
->tm_sec
, time
->tm_min
,
205 time
->tm_hour
, time
->tm_mday
,
206 time
->tm_mon
, time
->tm_year
, time
->tm_wday
);
208 /* Time may not be set */
209 return rtc_valid_tm(time
);
212 static int ds1305_set_time(struct device
*dev
, struct rtc_time
*time
)
214 struct ds1305
*ds1305
= dev_get_drvdata(dev
);
215 u8 buf
[1 + DS1305_RTC_LEN
];
218 dev_vdbg(dev
, "%s secs=%d, mins=%d, "
219 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
220 "write", time
->tm_sec
, time
->tm_min
,
221 time
->tm_hour
, time
->tm_mday
,
222 time
->tm_mon
, time
->tm_year
, time
->tm_wday
);
224 /* Write registers starting at the first time/date address. */
225 *bp
++ = DS1305_WRITE
| DS1305_SEC
;
227 *bp
++ = bin2bcd(time
->tm_sec
);
228 *bp
++ = bin2bcd(time
->tm_min
);
229 *bp
++ = hour2bcd(ds1305
->hr12
, time
->tm_hour
);
230 *bp
++ = (time
->tm_wday
< 7) ? (time
->tm_wday
+ 1) : 1;
231 *bp
++ = bin2bcd(time
->tm_mday
);
232 *bp
++ = bin2bcd(time
->tm_mon
+ 1);
233 *bp
++ = bin2bcd(time
->tm_year
- 100);
235 dev_dbg(dev
, "%s: %02x %02x %02x, %02x %02x %02x %02x\n",
236 "write", buf
[1], buf
[2], buf
[3],
237 buf
[4], buf
[5], buf
[6], buf
[7]);
239 /* use write-then-read since dma from stack is nonportable */
240 return spi_write_then_read(ds1305
->spi
, buf
, sizeof buf
,
245 * Get/set of alarm is a bit funky:
247 * - First there's the inherent raciness of getting the (partitioned)
248 * status of an alarm that could trigger while we're reading parts
251 * - Second there's its limited range (we could increase it a bit by
252 * relying on WDAY), which means it will easily roll over.
254 * - Third there's the choice of two alarms and alarm signals.
255 * Here we use ALM0 and expect that nINT0 (open drain) is used;
256 * that's the only real option for DS1306 runtime alarms, and is
259 * - Fourth, there's also ALM1, and a second interrupt signal:
260 * + On DS1305 ALM1 uses nINT1 (when INTCN=1) else nINT0;
261 * + On DS1306 ALM1 only uses INT1 (an active high pulse)
262 * and it won't work when VCC1 is active.
264 * So to be most general, we should probably set both alarms to the
265 * same value, letting ALM1 be the wakeup event source on DS1306
266 * and handling several wiring options on DS1305.
268 * - Fifth, we support the polled mode (as well as possible; why not?)
269 * even when no interrupt line is wired to an IRQ.
273 * Context: caller holds rtc->ops_lock (to protect ds1305->ctrl)
275 static int ds1305_get_alarm(struct device
*dev
, struct rtc_wkalrm
*alm
)
277 struct ds1305
*ds1305
= dev_get_drvdata(dev
);
278 struct spi_device
*spi
= ds1305
->spi
;
281 u8 buf
[DS1305_ALM_LEN
];
283 /* Refresh control register cache BEFORE reading ALM0 registers,
284 * since reading alarm registers acks any pending IRQ. That
285 * makes returning "pending" status a bit of a lie, but that bit
286 * of EFI status is at best fragile anyway (given IRQ handlers).
288 addr
= DS1305_CONTROL
;
289 status
= spi_write_then_read(spi
, &addr
, sizeof addr
,
290 ds1305
->ctrl
, sizeof ds1305
->ctrl
);
294 alm
->enabled
= !!(ds1305
->ctrl
[0] & DS1305_AEI0
);
295 alm
->pending
= !!(ds1305
->ctrl
[1] & DS1305_AEI0
);
297 /* get and check ALM0 registers */
298 addr
= DS1305_ALM0(DS1305_SEC
);
299 status
= spi_write_then_read(spi
, &addr
, sizeof addr
,
304 dev_vdbg(dev
, "%s: %02x %02x %02x %02x\n",
305 "alm0 read", buf
[DS1305_SEC
], buf
[DS1305_MIN
],
306 buf
[DS1305_HOUR
], buf
[DS1305_WDAY
]);
308 if ((DS1305_ALM_DISABLE
& buf
[DS1305_SEC
])
309 || (DS1305_ALM_DISABLE
& buf
[DS1305_MIN
])
310 || (DS1305_ALM_DISABLE
& buf
[DS1305_HOUR
]))
313 /* Stuff these values into alm->time and let RTC framework code
314 * fill in the rest ... and also handle rollover to tomorrow when
317 alm
->time
.tm_sec
= bcd2bin(buf
[DS1305_SEC
]);
318 alm
->time
.tm_min
= bcd2bin(buf
[DS1305_MIN
]);
319 alm
->time
.tm_hour
= bcd2hour(buf
[DS1305_HOUR
]);
320 alm
->time
.tm_mday
= -1;
321 alm
->time
.tm_mon
= -1;
322 alm
->time
.tm_year
= -1;
323 /* next three fields are unused by Linux */
324 alm
->time
.tm_wday
= -1;
325 alm
->time
.tm_mday
= -1;
326 alm
->time
.tm_isdst
= -1;
332 * Context: caller holds rtc->ops_lock (to protect ds1305->ctrl)
334 static int ds1305_set_alarm(struct device
*dev
, struct rtc_wkalrm
*alm
)
336 struct ds1305
*ds1305
= dev_get_drvdata(dev
);
337 struct spi_device
*spi
= ds1305
->spi
;
338 unsigned long now
, later
;
341 u8 buf
[1 + DS1305_ALM_LEN
];
343 /* convert desired alarm to time_t */
344 status
= rtc_tm_to_time(&alm
->time
, &later
);
348 /* Read current time as time_t */
349 status
= ds1305_get_time(dev
, &tm
);
352 status
= rtc_tm_to_time(&tm
, &now
);
356 /* make sure alarm fires within the next 24 hours */
359 if ((later
- now
) > 24 * 60 * 60)
362 /* disable alarm if needed */
363 if (ds1305
->ctrl
[0] & DS1305_AEI0
) {
364 ds1305
->ctrl
[0] &= ~DS1305_AEI0
;
366 buf
[0] = DS1305_WRITE
| DS1305_CONTROL
;
367 buf
[1] = ds1305
->ctrl
[0];
368 status
= spi_write_then_read(ds1305
->spi
, buf
, 2, NULL
, 0);
374 buf
[0] = DS1305_WRITE
| DS1305_ALM0(DS1305_SEC
);
375 buf
[1 + DS1305_SEC
] = bin2bcd(alm
->time
.tm_sec
);
376 buf
[1 + DS1305_MIN
] = bin2bcd(alm
->time
.tm_min
);
377 buf
[1 + DS1305_HOUR
] = hour2bcd(ds1305
->hr12
, alm
->time
.tm_hour
);
378 buf
[1 + DS1305_WDAY
] = DS1305_ALM_DISABLE
;
380 dev_dbg(dev
, "%s: %02x %02x %02x %02x\n",
381 "alm0 write", buf
[1 + DS1305_SEC
], buf
[1 + DS1305_MIN
],
382 buf
[1 + DS1305_HOUR
], buf
[1 + DS1305_WDAY
]);
384 status
= spi_write_then_read(spi
, buf
, sizeof buf
, NULL
, 0);
388 /* enable alarm if requested */
390 ds1305
->ctrl
[0] |= DS1305_AEI0
;
392 buf
[0] = DS1305_WRITE
| DS1305_CONTROL
;
393 buf
[1] = ds1305
->ctrl
[0];
394 status
= spi_write_then_read(ds1305
->spi
, buf
, 2, NULL
, 0);
400 #ifdef CONFIG_PROC_FS
402 static int ds1305_proc(struct device
*dev
, struct seq_file
*seq
)
404 struct ds1305
*ds1305
= dev_get_drvdata(dev
);
406 char *resistors
= "";
408 /* ctrl[2] is treated as read-only; no locking needed */
409 if ((ds1305
->ctrl
[2] & 0xf0) == DS1305_TRICKLE_MAGIC
) {
410 switch (ds1305
->ctrl
[2] & 0x0c) {
411 case DS1305_TRICKLE_DS2
:
412 diodes
= "2 diodes, ";
414 case DS1305_TRICKLE_DS1
:
415 diodes
= "1 diode, ";
420 switch (ds1305
->ctrl
[2] & 0x03) {
421 case DS1305_TRICKLE_2K
:
422 resistors
= "2k Ohm";
424 case DS1305_TRICKLE_4K
:
425 resistors
= "4k Ohm";
427 case DS1305_TRICKLE_8K
:
428 resistors
= "8k Ohm";
437 return seq_printf(seq
,
438 "trickle_charge\t: %s%s\n",
443 #define ds1305_proc NULL
446 static const struct rtc_class_ops ds1305_ops
= {
447 .read_time
= ds1305_get_time
,
448 .set_time
= ds1305_set_time
,
449 .read_alarm
= ds1305_get_alarm
,
450 .set_alarm
= ds1305_set_alarm
,
452 .alarm_irq_enable
= ds1305_alarm_irq_enable
,
455 static void ds1305_work(struct work_struct
*work
)
457 struct ds1305
*ds1305
= container_of(work
, struct ds1305
, work
);
458 struct mutex
*lock
= &ds1305
->rtc
->ops_lock
;
459 struct spi_device
*spi
= ds1305
->spi
;
463 /* lock to protect ds1305->ctrl */
466 /* Disable the IRQ, and clear its status ... for now, we "know"
467 * that if more than one alarm is active, they're in sync.
468 * Note that reading ALM data registers also clears IRQ status.
470 ds1305
->ctrl
[0] &= ~(DS1305_AEI1
| DS1305_AEI0
);
473 buf
[0] = DS1305_WRITE
| DS1305_CONTROL
;
474 buf
[1] = ds1305
->ctrl
[0];
477 status
= spi_write_then_read(spi
, buf
, sizeof buf
,
480 dev_dbg(&spi
->dev
, "clear irq --> %d\n", status
);
484 if (!test_bit(FLAG_EXITING
, &ds1305
->flags
))
485 enable_irq(spi
->irq
);
487 rtc_update_irq(ds1305
->rtc
, 1, RTC_AF
| RTC_IRQF
);
491 * This "real" IRQ handler hands off to a workqueue mostly to allow
492 * mutex locking for ds1305->ctrl ... unlike I2C, we could issue async
493 * I/O requests in IRQ context (to clear the IRQ status).
495 static irqreturn_t
ds1305_irq(int irq
, void *p
)
497 struct ds1305
*ds1305
= p
;
500 schedule_work(&ds1305
->work
);
504 /*----------------------------------------------------------------------*/
507 * Interface for NVRAM
510 static void msg_init(struct spi_message
*m
, struct spi_transfer
*x
,
511 u8
*addr
, size_t count
, char *tx
, char *rx
)
514 memset(x
, 0, 2 * sizeof(*x
));
518 spi_message_add_tail(x
, m
);
525 spi_message_add_tail(x
, m
);
529 ds1305_nvram_read(struct file
*filp
, struct kobject
*kobj
,
530 struct bin_attribute
*attr
,
531 char *buf
, loff_t off
, size_t count
)
533 struct spi_device
*spi
;
535 struct spi_message m
;
536 struct spi_transfer x
[2];
539 spi
= container_of(kobj
, struct spi_device
, dev
.kobj
);
541 if (unlikely(off
>= DS1305_NVRAM_LEN
))
543 if (count
>= DS1305_NVRAM_LEN
)
544 count
= DS1305_NVRAM_LEN
;
545 if ((off
+ count
) > DS1305_NVRAM_LEN
)
546 count
= DS1305_NVRAM_LEN
- off
;
547 if (unlikely(!count
))
550 addr
= DS1305_NVRAM
+ off
;
551 msg_init(&m
, x
, &addr
, count
, NULL
, buf
);
553 status
= spi_sync(spi
, &m
);
555 dev_err(&spi
->dev
, "nvram %s error %d\n", "read", status
);
556 return (status
< 0) ? status
: count
;
560 ds1305_nvram_write(struct file
*filp
, struct kobject
*kobj
,
561 struct bin_attribute
*attr
,
562 char *buf
, loff_t off
, size_t count
)
564 struct spi_device
*spi
;
566 struct spi_message m
;
567 struct spi_transfer x
[2];
570 spi
= container_of(kobj
, struct spi_device
, dev
.kobj
);
572 if (unlikely(off
>= DS1305_NVRAM_LEN
))
574 if (count
>= DS1305_NVRAM_LEN
)
575 count
= DS1305_NVRAM_LEN
;
576 if ((off
+ count
) > DS1305_NVRAM_LEN
)
577 count
= DS1305_NVRAM_LEN
- off
;
578 if (unlikely(!count
))
581 addr
= (DS1305_WRITE
| DS1305_NVRAM
) + off
;
582 msg_init(&m
, x
, &addr
, count
, buf
, NULL
);
584 status
= spi_sync(spi
, &m
);
586 dev_err(&spi
->dev
, "nvram %s error %d\n", "write", status
);
587 return (status
< 0) ? status
: count
;
590 static struct bin_attribute nvram
= {
591 .attr
.name
= "nvram",
592 .attr
.mode
= S_IRUGO
| S_IWUSR
,
593 .read
= ds1305_nvram_read
,
594 .write
= ds1305_nvram_write
,
595 .size
= DS1305_NVRAM_LEN
,
598 /*----------------------------------------------------------------------*/
601 * Interface to SPI stack
604 static int ds1305_probe(struct spi_device
*spi
)
606 struct ds1305
*ds1305
;
609 struct ds1305_platform_data
*pdata
= spi
->dev
.platform_data
;
610 bool write_ctrl
= false;
612 /* Sanity check board setup data. This may be hooked up
613 * in 3wire mode, but we don't care. Note that unless
614 * there's an inverter in place, this needs SPI_CS_HIGH!
616 if ((spi
->bits_per_word
&& spi
->bits_per_word
!= 8)
617 || (spi
->max_speed_hz
> 2000000)
618 || !(spi
->mode
& SPI_CPHA
))
621 /* set up driver data */
622 ds1305
= kzalloc(sizeof *ds1305
, GFP_KERNEL
);
626 spi_set_drvdata(spi
, ds1305
);
628 /* read and cache control registers */
629 addr
= DS1305_CONTROL
;
630 status
= spi_write_then_read(spi
, &addr
, sizeof addr
,
631 ds1305
->ctrl
, sizeof ds1305
->ctrl
);
633 dev_dbg(&spi
->dev
, "can't %s, %d\n",
638 dev_dbg(&spi
->dev
, "ctrl %s: %02x %02x %02x\n",
639 "read", ds1305
->ctrl
[0],
640 ds1305
->ctrl
[1], ds1305
->ctrl
[2]);
642 /* Sanity check register values ... partially compensating for the
643 * fact that SPI has no device handshake. A pullup on MISO would
644 * make these tests fail; but not all systems will have one. If
645 * some register is neither 0x00 nor 0xff, a chip is likely there.
647 if ((ds1305
->ctrl
[0] & 0x38) != 0 || (ds1305
->ctrl
[1] & 0xfc) != 0) {
648 dev_dbg(&spi
->dev
, "RTC chip is not present\n");
652 if (ds1305
->ctrl
[2] == 0)
653 dev_dbg(&spi
->dev
, "chip may not be present\n");
655 /* enable writes if needed ... if we were paranoid it would
656 * make sense to enable them only when absolutely necessary.
658 if (ds1305
->ctrl
[0] & DS1305_WP
) {
661 ds1305
->ctrl
[0] &= ~DS1305_WP
;
663 buf
[0] = DS1305_WRITE
| DS1305_CONTROL
;
664 buf
[1] = ds1305
->ctrl
[0];
665 status
= spi_write_then_read(spi
, buf
, sizeof buf
, NULL
, 0);
667 dev_dbg(&spi
->dev
, "clear WP --> %d\n", status
);
672 /* on DS1305, maybe start oscillator; like most low power
673 * oscillators, it may take a second to stabilize
675 if (ds1305
->ctrl
[0] & DS1305_nEOSC
) {
676 ds1305
->ctrl
[0] &= ~DS1305_nEOSC
;
678 dev_warn(&spi
->dev
, "SET TIME!\n");
681 /* ack any pending IRQs */
682 if (ds1305
->ctrl
[1]) {
687 /* this may need one-time (re)init */
689 /* maybe enable trickle charge */
690 if (((ds1305
->ctrl
[2] & 0xf0) != DS1305_TRICKLE_MAGIC
)) {
691 ds1305
->ctrl
[2] = DS1305_TRICKLE_MAGIC
696 /* on DS1306, configure 1 Hz signal */
697 if (pdata
->is_ds1306
) {
699 if (!(ds1305
->ctrl
[0] & DS1306_1HZ
)) {
700 ds1305
->ctrl
[0] |= DS1306_1HZ
;
704 if (ds1305
->ctrl
[0] & DS1306_1HZ
) {
705 ds1305
->ctrl
[0] &= ~DS1306_1HZ
;
715 buf
[0] = DS1305_WRITE
| DS1305_CONTROL
;
716 buf
[1] = ds1305
->ctrl
[0];
717 buf
[2] = ds1305
->ctrl
[1];
718 buf
[3] = ds1305
->ctrl
[2];
719 status
= spi_write_then_read(spi
, buf
, sizeof buf
, NULL
, 0);
721 dev_dbg(&spi
->dev
, "can't %s, %d\n",
726 dev_dbg(&spi
->dev
, "ctrl %s: %02x %02x %02x\n",
727 "write", ds1305
->ctrl
[0],
728 ds1305
->ctrl
[1], ds1305
->ctrl
[2]);
731 /* see if non-Linux software set up AM/PM mode */
733 status
= spi_write_then_read(spi
, &addr
, sizeof addr
,
734 &value
, sizeof value
);
736 dev_dbg(&spi
->dev
, "read HOUR --> %d\n", status
);
740 ds1305
->hr12
= (DS1305_HR_12
& value
) != 0;
742 dev_dbg(&spi
->dev
, "AM/PM\n");
744 /* register RTC ... from here on, ds1305->ctrl needs locking */
745 ds1305
->rtc
= rtc_device_register("ds1305", &spi
->dev
,
746 &ds1305_ops
, THIS_MODULE
);
747 if (IS_ERR(ds1305
->rtc
)) {
748 status
= PTR_ERR(ds1305
->rtc
);
749 dev_dbg(&spi
->dev
, "register rtc --> %d\n", status
);
753 /* Maybe set up alarm IRQ; be ready to handle it triggering right
754 * away. NOTE that we don't share this. The signal is active low,
755 * and we can't ack it before a SPI message delay. We temporarily
756 * disable the IRQ until it's acked, which lets us work with more
757 * IRQ trigger modes (not all IRQ controllers can do falling edge).
760 INIT_WORK(&ds1305
->work
, ds1305_work
);
761 status
= request_irq(spi
->irq
, ds1305_irq
,
762 0, dev_name(&ds1305
->rtc
->dev
), ds1305
);
764 dev_dbg(&spi
->dev
, "request_irq %d --> %d\n",
769 device_set_wakeup_capable(&spi
->dev
, 1);
773 status
= sysfs_create_bin_file(&spi
->dev
.kobj
, &nvram
);
775 dev_dbg(&spi
->dev
, "register nvram --> %d\n", status
);
782 free_irq(spi
->irq
, ds1305
);
784 rtc_device_unregister(ds1305
->rtc
);
790 static int ds1305_remove(struct spi_device
*spi
)
792 struct ds1305
*ds1305
= spi_get_drvdata(spi
);
794 sysfs_remove_bin_file(&spi
->dev
.kobj
, &nvram
);
796 /* carefully shut down irq and workqueue, if present */
798 set_bit(FLAG_EXITING
, &ds1305
->flags
);
799 free_irq(spi
->irq
, ds1305
);
800 cancel_work_sync(&ds1305
->work
);
803 rtc_device_unregister(ds1305
->rtc
);
804 spi_set_drvdata(spi
, NULL
);
809 static struct spi_driver ds1305_driver
= {
810 .driver
.name
= "rtc-ds1305",
811 .driver
.owner
= THIS_MODULE
,
812 .probe
= ds1305_probe
,
813 .remove
= ds1305_remove
,
814 /* REVISIT add suspend/resume */
817 module_spi_driver(ds1305_driver
);
819 MODULE_DESCRIPTION("RTC driver for DS1305 and DS1306 chips");
820 MODULE_LICENSE("GPL");
821 MODULE_ALIAS("spi:rtc-ds1305");