drivers/rtc/rtc-ds1511.c

   1 /*
   2  * An rtc driver for the Dallas DS1511
   3  *
   4  * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
   5  * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Real time clock driver for the Dallas 1511 chip, which also
  12  * contains a watchdog timer.  There is a tiny amount of code that
  13  * platform code could use to mess with the watchdog device a little
  14  * bit, but not a full watchdog driver.
  15  */
  16
  17 #include <linux/bcd.h>
  18 #include <linux/init.h>
  19 #include <linux/kernel.h>
  20 #include <linux/gfp.h>
  21 #include <linux/delay.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/rtc.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/io.h>
  26 #include <linux/module.h>
  27
  28 enum ds1511reg {
  29         DS1511_SEC = 0x0,
  30         DS1511_MIN = 0x1,
  31         DS1511_HOUR = 0x2,
  32         DS1511_DOW = 0x3,
  33         DS1511_DOM = 0x4,
  34         DS1511_MONTH = 0x5,
  35         DS1511_YEAR = 0x6,
  36         DS1511_CENTURY = 0x7,
  37         DS1511_AM1_SEC = 0x8,
  38         DS1511_AM2_MIN = 0x9,
  39         DS1511_AM3_HOUR = 0xa,
  40         DS1511_AM4_DATE = 0xb,
  41         DS1511_WD_MSEC = 0xc,
  42         DS1511_WD_SEC = 0xd,
  43         DS1511_CONTROL_A = 0xe,
  44         DS1511_CONTROL_B = 0xf,
  45         DS1511_RAMADDR_LSB = 0x10,
  46         DS1511_RAMDATA = 0x13
  47 };
  48
  49 #define DS1511_BLF1     0x80
  50 #define DS1511_BLF2     0x40
  51 #define DS1511_PRS      0x20
  52 #define DS1511_PAB      0x10
  53 #define DS1511_TDF      0x08
  54 #define DS1511_KSF      0x04
  55 #define DS1511_WDF      0x02
  56 #define DS1511_IRQF     0x01
  57 #define DS1511_TE       0x80
  58 #define DS1511_CS       0x40
  59 #define DS1511_BME      0x20
  60 #define DS1511_TPE      0x10
  61 #define DS1511_TIE      0x08
  62 #define DS1511_KIE      0x04
  63 #define DS1511_WDE      0x02
  64 #define DS1511_WDS      0x01
  65 #define DS1511_RAM_MAX  0x100
  66
  67 #define RTC_CMD         DS1511_CONTROL_B
  68 #define RTC_CMD1        DS1511_CONTROL_A
  69
  70 #define RTC_ALARM_SEC   DS1511_AM1_SEC
  71 #define RTC_ALARM_MIN   DS1511_AM2_MIN
  72 #define RTC_ALARM_HOUR  DS1511_AM3_HOUR
  73 #define RTC_ALARM_DATE  DS1511_AM4_DATE
  74
  75 #define RTC_SEC         DS1511_SEC
  76 #define RTC_MIN         DS1511_MIN
  77 #define RTC_HOUR        DS1511_HOUR
  78 #define RTC_DOW         DS1511_DOW
  79 #define RTC_DOM         DS1511_DOM
  80 #define RTC_MON         DS1511_MONTH
  81 #define RTC_YEAR        DS1511_YEAR
  82 #define RTC_CENTURY     DS1511_CENTURY
  83
  84 #define RTC_TIE DS1511_TIE
  85 #define RTC_TE  DS1511_TE
  86
  87 struct rtc_plat_data {
  88         struct rtc_device *rtc;
  89         void __iomem *ioaddr;           /* virtual base address */
  90         int irq;
  91         unsigned int irqen;
  92         int alrm_sec;
  93         int alrm_min;
  94         int alrm_hour;
  95         int alrm_mday;
  96         spinlock_t lock;
  97 };
  98
  99 static DEFINE_SPINLOCK(ds1511_lock);
 100
 101 static __iomem char *ds1511_base;
 102 static u32 reg_spacing = 1;
 103
 104 static noinline void
 105 rtc_write(uint8_t val, uint32_t reg)
 106 {
 107         writeb(val, ds1511_base + (reg * reg_spacing));
 108 }
 109
 110 static inline void
 111 rtc_write_alarm(uint8_t val, enum ds1511reg reg)
 112 {
 113         rtc_write((val | 0x80), reg);
 114 }
 115
 116 static noinline uint8_t
 117 rtc_read(enum ds1511reg reg)
 118 {
 119         return readb(ds1511_base + (reg * reg_spacing));
 120 }
 121
 122 static inline void
 123 rtc_disable_update(void)
 124 {
 125         rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
 126 }
 127
 128 static void
 129 rtc_enable_update(void)
 130 {
 131         rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
 132 }
 133
 134 /*
 135  * #define DS1511_WDOG_RESET_SUPPORT
 136  *
 137  * Uncomment this if you want to use these routines in
 138  * some platform code.
 139  */
 140 #ifdef DS1511_WDOG_RESET_SUPPORT
 141 /*
 142  * just enough code to set the watchdog timer so that it
 143  * will reboot the system
 144  */
 145 void
 146 ds1511_wdog_set(unsigned long deciseconds)
 147 {
 148         /*
 149          * the wdog timer can take 99.99 seconds
 150          */
 151         deciseconds %= 10000;
 152         /*
 153          * set the wdog values in the wdog registers
 154          */
 155         rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
 156         rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
 157         /*
 158          * set wdog enable and wdog 'steering' bit to issue a reset
 159          */
 160         rtc_write(rtc_read(RTC_CMD) | DS1511_WDE | DS1511_WDS, RTC_CMD);
 161 }
 162
 163 void
 164 ds1511_wdog_disable(void)
 165 {
 166         /*
 167          * clear wdog enable and wdog 'steering' bits
 168          */
 169         rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
 170         /*
 171          * clear the wdog counter
 172          */
 173         rtc_write(0, DS1511_WD_MSEC);
 174         rtc_write(0, DS1511_WD_SEC);
 175 }
 176 #endif
 177
 178 /*
 179  * set the rtc chip's idea of the time.
 180  * stupidly, some callers call with year unmolested;
 181  * and some call with  year = year - 1900.  thanks.
 182  */
 183 static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
 184 {
 185         u8 mon, day, dow, hrs, min, sec, yrs, cen;
 186         unsigned long flags;
 187
 188         /*
 189          * won't have to change this for a while
 190          */
 191         if (rtc_tm->tm_year < 1900)
 192                 rtc_tm->tm_year += 1900;
 193
 194         if (rtc_tm->tm_year < 1970)
 195                 return -EINVAL;
 196
 197         yrs = rtc_tm->tm_year % 100;
 198         cen = rtc_tm->tm_year / 100;
 199         mon = rtc_tm->tm_mon + 1;   /* tm_mon starts at zero */
 200         day = rtc_tm->tm_mday;
 201         dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
 202         hrs = rtc_tm->tm_hour;
 203         min = rtc_tm->tm_min;
 204         sec = rtc_tm->tm_sec;
 205
 206         if ((mon > 12) || (day == 0))
 207                 return -EINVAL;
 208
 209         if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year))
 210                 return -EINVAL;
 211
 212         if ((hrs >= 24) || (min >= 60) || (sec >= 60))
 213                 return -EINVAL;
 214
 215         /*
 216          * each register is a different number of valid bits
 217          */
 218         sec = bin2bcd(sec) & 0x7f;
 219         min = bin2bcd(min) & 0x7f;
 220         hrs = bin2bcd(hrs) & 0x3f;
 221         day = bin2bcd(day) & 0x3f;
 222         mon = bin2bcd(mon) & 0x1f;
 223         yrs = bin2bcd(yrs) & 0xff;
 224         cen = bin2bcd(cen) & 0xff;
 225
 226         spin_lock_irqsave(&ds1511_lock, flags);
 227         rtc_disable_update();
 228         rtc_write(cen, RTC_CENTURY);
 229         rtc_write(yrs, RTC_YEAR);
 230         rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
 231         rtc_write(day, RTC_DOM);
 232         rtc_write(hrs, RTC_HOUR);
 233         rtc_write(min, RTC_MIN);
 234         rtc_write(sec, RTC_SEC);
 235         rtc_write(dow, RTC_DOW);
 236         rtc_enable_update();
 237         spin_unlock_irqrestore(&ds1511_lock, flags);
 238
 239         return 0;
 240 }
 241
 242 static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
 243 {
 244         unsigned int century;
 245         unsigned long flags;
 246
 247         spin_lock_irqsave(&ds1511_lock, flags);
 248         rtc_disable_update();
 249
 250         rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
 251         rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
 252         rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
 253         rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
 254         rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
 255         rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
 256         rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
 257         century = rtc_read(RTC_CENTURY);
 258
 259         rtc_enable_update();
 260         spin_unlock_irqrestore(&ds1511_lock, flags);
 261
 262         rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
 263         rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
 264         rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
 265         rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
 266         rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
 267         rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
 268         rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
 269         century = bcd2bin(century) * 100;
 270
 271         /*
 272          * Account for differences between how the RTC uses the values
 273          * and how they are defined in a struct rtc_time;
 274          */
 275         century += rtc_tm->tm_year;
 276         rtc_tm->tm_year = century - 1900;
 277
 278         rtc_tm->tm_mon--;
 279
 280         if (rtc_valid_tm(rtc_tm) < 0) {
 281                 dev_err(dev, "retrieved date/time is not valid.\n");
 282                 rtc_time_to_tm(0, rtc_tm);
 283         }
 284         return 0;
 285 }
 286
 287 /*
 288  * write the alarm register settings
 289  *
 290  * we only have the use to interrupt every second, otherwise
 291  * known as the update interrupt, or the interrupt if the whole
 292  * date/hours/mins/secs matches.  the ds1511 has many more
 293  * permutations, but the kernel doesn't.
 294  */
 295 static void
 296 ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
 297 {
 298         unsigned long flags;
 299
 300         spin_lock_irqsave(&pdata->lock, flags);
 301         rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
 302                0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
 303                RTC_ALARM_DATE);
 304         rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
 305                0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
 306                RTC_ALARM_HOUR);
 307         rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
 308                0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
 309                RTC_ALARM_MIN);
 310         rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
 311                0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
 312                RTC_ALARM_SEC);
 313         rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
 314         rtc_read(RTC_CMD1);     /* clear interrupts */
 315         spin_unlock_irqrestore(&pdata->lock, flags);
 316 }
 317
 318 static int
 319 ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 320 {
 321         struct platform_device *pdev = to_platform_device(dev);
 322         struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 323
 324         if (pdata->irq <= 0)
 325                 return -EINVAL;
 326
 327         pdata->alrm_mday = alrm->time.tm_mday;
 328         pdata->alrm_hour = alrm->time.tm_hour;
 329         pdata->alrm_min = alrm->time.tm_min;
 330         pdata->alrm_sec = alrm->time.tm_sec;
 331         if (alrm->enabled)
 332                 pdata->irqen |= RTC_AF;
 333
 334         ds1511_rtc_update_alarm(pdata);
 335         return 0;
 336 }
 337
 338 static int
 339 ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 340 {
 341         struct platform_device *pdev = to_platform_device(dev);
 342         struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 343
 344         if (pdata->irq <= 0)
 345                 return -EINVAL;
 346
 347         alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
 348         alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
 349         alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
 350         alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
 351         alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
 352         return 0;
 353 }
 354
 355 static irqreturn_t
 356 ds1511_interrupt(int irq, void *dev_id)
 357 {
 358         struct platform_device *pdev = dev_id;
 359         struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 360         unsigned long events = 0;
 361
 362         spin_lock(&pdata->lock);
 363         /*
 364          * read and clear interrupt
 365          */
 366         if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
 367                 events = RTC_IRQF;
 368                 if (rtc_read(RTC_ALARM_SEC) & 0x80)
 369                         events |= RTC_UF;
 370                 else
 371                         events |= RTC_AF;
 372                 rtc_update_irq(pdata->rtc, 1, events);
 373         }
 374         spin_unlock(&pdata->lock);
 375         return events ? IRQ_HANDLED : IRQ_NONE;
 376 }
 377
 378 static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 379 {
 380         struct platform_device *pdev = to_platform_device(dev);
 381         struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 382
 383         if (pdata->irq <= 0)
 384                 return -EINVAL;
 385         if (enabled)
 386                 pdata->irqen |= RTC_AF;
 387         else
 388                 pdata->irqen &= ~RTC_AF;
 389         ds1511_rtc_update_alarm(pdata);
 390         return 0;
 391 }
 392
 393 static const struct rtc_class_ops ds1511_rtc_ops = {
 394         .read_time              = ds1511_rtc_read_time,
 395         .set_time               = ds1511_rtc_set_time,
 396         .read_alarm             = ds1511_rtc_read_alarm,
 397         .set_alarm              = ds1511_rtc_set_alarm,
 398         .alarm_irq_enable       = ds1511_rtc_alarm_irq_enable,
 399 };
 400
 401 static int ds1511_nvram_read(void *priv, unsigned int pos, void *buf,
 402                              size_t size)
 403 {
 404         int i;
 405
 406         rtc_write(pos, DS1511_RAMADDR_LSB);
 407         for (i = 0; i < size; i++)
 408                 *(char *)buf++ = rtc_read(DS1511_RAMDATA);
 409
 410         return 0;
 411 }
 412
 413 static int ds1511_nvram_write(void *priv, unsigned int pos, void *buf,
 414                               size_t size)
 415 {
 416         int i;
 417
 418         rtc_write(pos, DS1511_RAMADDR_LSB);
 419         for (i = 0; i < size; i++)
 420                 rtc_write(*(char *)buf++, DS1511_RAMDATA);
 421
 422         return 0;
 423 }
 424
 425 static struct nvmem_config ds1511_nvmem_cfg = {
 426         .name = "ds1511_nvram",
 427         .word_size = 1,
 428         .stride = 1,
 429         .size = DS1511_RAM_MAX,
 430         .reg_read = ds1511_nvram_read,
 431         .reg_write = ds1511_nvram_write,
 432 };
 433
 434 static int ds1511_rtc_probe(struct platform_device *pdev)
 435 {
 436         struct resource *res;
 437         struct rtc_plat_data *pdata;
 438         int ret = 0;
 439
 440         pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
 441         if (!pdata)
 442                 return -ENOMEM;
 443
 444         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 445         ds1511_base = devm_ioremap_resource(&pdev->dev, res);
 446         if (IS_ERR(ds1511_base))
 447                 return PTR_ERR(ds1511_base);
 448         pdata->ioaddr = ds1511_base;
 449         pdata->irq = platform_get_irq(pdev, 0);
 450
 451         /*
 452          * turn on the clock and the crystal, etc.
 453          */
 454         rtc_write(DS1511_BME, RTC_CMD);
 455         rtc_write(0, RTC_CMD1);
 456         /*
 457          * clear the wdog counter
 458          */
 459         rtc_write(0, DS1511_WD_MSEC);
 460         rtc_write(0, DS1511_WD_SEC);
 461         /*
 462          * start the clock
 463          */
 464         rtc_enable_update();
 465
 466         /*
 467          * check for a dying bat-tree
 468          */
 469         if (rtc_read(RTC_CMD1) & DS1511_BLF1)
 470                 dev_warn(&pdev->dev, "voltage-low detected.\n");
 471
 472         spin_lock_init(&pdata->lock);
 473         platform_set_drvdata(pdev, pdata);
 474
 475         pdata->rtc = devm_rtc_allocate_device(&pdev->dev);
 476         if (IS_ERR(pdata->rtc))
 477                 return PTR_ERR(pdata->rtc);
 478
 479         pdata->rtc->ops = &ds1511_rtc_ops;
 480
 481         ds1511_nvmem_cfg.priv = &pdev->dev;
 482         pdata->rtc->nvmem_config = &ds1511_nvmem_cfg;
 483         pdata->rtc->nvram_old_abi = true;
 484
 485         ret = rtc_register_device(pdata->rtc);
 486         if (ret)
 487                 return ret;
 488
 489         /*
 490          * if the platform has an interrupt in mind for this device,
 491          * then by all means, set it
 492          */
 493         if (pdata->irq > 0) {
 494                 rtc_read(RTC_CMD1);
 495                 if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
 496                         IRQF_SHARED, pdev->name, pdev) < 0) {
 497
 498                         dev_warn(&pdev->dev, "interrupt not available.\n");
 499                         pdata->irq = 0;
 500                 }
 501         }
 502
 503         return 0;
 504 }
 505
 506 /* work with hotplug and coldplug */
 507 MODULE_ALIAS("platform:ds1511");
 508
 509 static struct platform_driver ds1511_rtc_driver = {
 510         .probe          = ds1511_rtc_probe,
 511         .driver         = {
 512                 .name   = "ds1511",
 513         },
 514 };
 515
 516 module_platform_driver(ds1511_rtc_driver);
 517
 518 MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
 519 MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
 520 MODULE_LICENSE("GPL");