1 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/rtc.h>
16 #include <linux/platform_device.h>
18 #include <linux/regmap.h>
19 #include <linux/slab.h>
20 #include <linux/spinlock.h>
22 /* RTC Register offsets from RTC CTRL REG */
23 #define PM8XXX_ALARM_CTRL_OFFSET 0x01
24 #define PM8XXX_RTC_WRITE_OFFSET 0x02
25 #define PM8XXX_RTC_READ_OFFSET 0x06
26 #define PM8XXX_ALARM_RW_OFFSET 0x0A
28 /* RTC_CTRL register bit fields */
29 #define PM8xxx_RTC_ENABLE BIT(7)
30 #define PM8xxx_RTC_ALARM_CLEAR BIT(0)
32 #define NUM_8_BIT_RTC_REGS 0x4
35 * struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
36 * @ctrl: base address of control register
37 * @write: base address of write register
38 * @read: base address of read register
39 * @alarm_ctrl: base address of alarm control register
40 * @alarm_ctrl2: base address of alarm control2 register
41 * @alarm_rw: base address of alarm read-write register
42 * @alarm_en: alarm enable mask
44 struct pm8xxx_rtc_regs
{
48 unsigned int alarm_ctrl
;
49 unsigned int alarm_ctrl2
;
50 unsigned int alarm_rw
;
51 unsigned int alarm_en
;
55 * struct pm8xxx_rtc - rtc driver internal structure
56 * @rtc: rtc device for this driver.
57 * @regmap: regmap used to access RTC registers
58 * @allow_set_time: indicates whether writing to the RTC is allowed
59 * @rtc_alarm_irq: rtc alarm irq number.
60 * @ctrl_reg: rtc control register.
61 * @rtc_dev: device structure.
62 * @ctrl_reg_lock: spinlock protecting access to ctrl_reg.
65 struct rtc_device
*rtc
;
66 struct regmap
*regmap
;
69 const struct pm8xxx_rtc_regs
*regs
;
70 struct device
*rtc_dev
;
71 spinlock_t ctrl_reg_lock
;
75 * Steps to write the RTC registers.
76 * 1. Disable alarm if enabled.
77 * 2. Disable rtc if enabled.
78 * 3. Write 0x00 to LSB.
79 * 4. Write Byte[1], Byte[2], Byte[3] then Byte[0].
80 * 5. Enable rtc if disabled in step 2.
81 * 6. Enable alarm if disabled in step 1.
83 static int pm8xxx_rtc_set_time(struct device
*dev
, struct rtc_time
*tm
)
86 unsigned long secs
, irq_flags
;
87 u8 value
[NUM_8_BIT_RTC_REGS
], alarm_enabled
= 0, rtc_disabled
= 0;
88 unsigned int ctrl_reg
, rtc_ctrl_reg
;
89 struct pm8xxx_rtc
*rtc_dd
= dev_get_drvdata(dev
);
90 const struct pm8xxx_rtc_regs
*regs
= rtc_dd
->regs
;
92 if (!rtc_dd
->allow_set_time
)
95 rtc_tm_to_time(tm
, &secs
);
97 dev_dbg(dev
, "Seconds value to be written to RTC = %lu\n", secs
);
99 for (i
= 0; i
< NUM_8_BIT_RTC_REGS
; i
++) {
100 value
[i
] = secs
& 0xFF;
104 spin_lock_irqsave(&rtc_dd
->ctrl_reg_lock
, irq_flags
);
106 rc
= regmap_read(rtc_dd
->regmap
, regs
->alarm_ctrl
, &ctrl_reg
);
110 if (ctrl_reg
& regs
->alarm_en
) {
112 ctrl_reg
&= ~regs
->alarm_en
;
113 rc
= regmap_write(rtc_dd
->regmap
, regs
->alarm_ctrl
, ctrl_reg
);
115 dev_err(dev
, "Write to RTC Alarm control register failed\n");
120 /* Disable RTC H/w before writing on RTC register */
121 rc
= regmap_read(rtc_dd
->regmap
, regs
->ctrl
, &rtc_ctrl_reg
);
125 if (rtc_ctrl_reg
& PM8xxx_RTC_ENABLE
) {
127 rtc_ctrl_reg
&= ~PM8xxx_RTC_ENABLE
;
128 rc
= regmap_write(rtc_dd
->regmap
, regs
->ctrl
, rtc_ctrl_reg
);
130 dev_err(dev
, "Write to RTC control register failed\n");
135 /* Write 0 to Byte[0] */
136 rc
= regmap_write(rtc_dd
->regmap
, regs
->write
, 0);
138 dev_err(dev
, "Write to RTC write data register failed\n");
142 /* Write Byte[1], Byte[2], Byte[3] */
143 rc
= regmap_bulk_write(rtc_dd
->regmap
, regs
->write
+ 1,
144 &value
[1], sizeof(value
) - 1);
146 dev_err(dev
, "Write to RTC write data register failed\n");
151 rc
= regmap_write(rtc_dd
->regmap
, regs
->write
, value
[0]);
153 dev_err(dev
, "Write to RTC write data register failed\n");
157 /* Enable RTC H/w after writing on RTC register */
159 rtc_ctrl_reg
|= PM8xxx_RTC_ENABLE
;
160 rc
= regmap_write(rtc_dd
->regmap
, regs
->ctrl
, rtc_ctrl_reg
);
162 dev_err(dev
, "Write to RTC control register failed\n");
168 ctrl_reg
|= regs
->alarm_en
;
169 rc
= regmap_write(rtc_dd
->regmap
, regs
->alarm_ctrl
, ctrl_reg
);
171 dev_err(dev
, "Write to RTC Alarm control register failed\n");
177 spin_unlock_irqrestore(&rtc_dd
->ctrl_reg_lock
, irq_flags
);
182 static int pm8xxx_rtc_read_time(struct device
*dev
, struct rtc_time
*tm
)
185 u8 value
[NUM_8_BIT_RTC_REGS
];
188 struct pm8xxx_rtc
*rtc_dd
= dev_get_drvdata(dev
);
189 const struct pm8xxx_rtc_regs
*regs
= rtc_dd
->regs
;
191 rc
= regmap_bulk_read(rtc_dd
->regmap
, regs
->read
, value
, sizeof(value
));
193 dev_err(dev
, "RTC read data register failed\n");
198 * Read the LSB again and check if there has been a carry over.
199 * If there is, redo the read operation.
201 rc
= regmap_read(rtc_dd
->regmap
, regs
->read
, ®
);
203 dev_err(dev
, "RTC read data register failed\n");
207 if (unlikely(reg
< value
[0])) {
208 rc
= regmap_bulk_read(rtc_dd
->regmap
, regs
->read
,
209 value
, sizeof(value
));
211 dev_err(dev
, "RTC read data register failed\n");
216 secs
= value
[0] | (value
[1] << 8) | (value
[2] << 16) | (value
[3] << 24);
218 rtc_time_to_tm(secs
, tm
);
220 dev_dbg(dev
, "secs = %lu, h:m:s == %ptRt, y-m-d = %ptRdr\n", secs
, tm
, tm
);
225 static int pm8xxx_rtc_set_alarm(struct device
*dev
, struct rtc_wkalrm
*alarm
)
228 u8 value
[NUM_8_BIT_RTC_REGS
];
229 unsigned int ctrl_reg
;
230 unsigned long secs
, irq_flags
;
231 struct pm8xxx_rtc
*rtc_dd
= dev_get_drvdata(dev
);
232 const struct pm8xxx_rtc_regs
*regs
= rtc_dd
->regs
;
234 rtc_tm_to_time(&alarm
->time
, &secs
);
236 for (i
= 0; i
< NUM_8_BIT_RTC_REGS
; i
++) {
237 value
[i
] = secs
& 0xFF;
241 spin_lock_irqsave(&rtc_dd
->ctrl_reg_lock
, irq_flags
);
243 rc
= regmap_bulk_write(rtc_dd
->regmap
, regs
->alarm_rw
, value
,
246 dev_err(dev
, "Write to RTC ALARM register failed\n");
250 rc
= regmap_read(rtc_dd
->regmap
, regs
->alarm_ctrl
, &ctrl_reg
);
255 ctrl_reg
|= regs
->alarm_en
;
257 ctrl_reg
&= ~regs
->alarm_en
;
259 rc
= regmap_write(rtc_dd
->regmap
, regs
->alarm_ctrl
, ctrl_reg
);
261 dev_err(dev
, "Write to RTC alarm control register failed\n");
265 dev_dbg(dev
, "Alarm Set for h:m:s=%ptRt, y-m-d=%ptRdr\n",
266 &alarm
->time
, &alarm
->time
);
268 spin_unlock_irqrestore(&rtc_dd
->ctrl_reg_lock
, irq_flags
);
272 static int pm8xxx_rtc_read_alarm(struct device
*dev
, struct rtc_wkalrm
*alarm
)
275 u8 value
[NUM_8_BIT_RTC_REGS
];
277 struct pm8xxx_rtc
*rtc_dd
= dev_get_drvdata(dev
);
278 const struct pm8xxx_rtc_regs
*regs
= rtc_dd
->regs
;
280 rc
= regmap_bulk_read(rtc_dd
->regmap
, regs
->alarm_rw
, value
,
283 dev_err(dev
, "RTC alarm time read failed\n");
287 secs
= value
[0] | (value
[1] << 8) | (value
[2] << 16) | (value
[3] << 24);
289 rtc_time_to_tm(secs
, &alarm
->time
);
291 rc
= rtc_valid_tm(&alarm
->time
);
293 dev_err(dev
, "Invalid alarm time read from RTC\n");
297 dev_dbg(dev
, "Alarm set for - h:m:s=%ptRt, y-m-d=%ptRdr\n",
298 &alarm
->time
, &alarm
->time
);
303 static int pm8xxx_rtc_alarm_irq_enable(struct device
*dev
, unsigned int enable
)
306 unsigned long irq_flags
;
307 struct pm8xxx_rtc
*rtc_dd
= dev_get_drvdata(dev
);
308 const struct pm8xxx_rtc_regs
*regs
= rtc_dd
->regs
;
309 unsigned int ctrl_reg
;
311 spin_lock_irqsave(&rtc_dd
->ctrl_reg_lock
, irq_flags
);
313 rc
= regmap_read(rtc_dd
->regmap
, regs
->alarm_ctrl
, &ctrl_reg
);
318 ctrl_reg
|= regs
->alarm_en
;
320 ctrl_reg
&= ~regs
->alarm_en
;
322 rc
= regmap_write(rtc_dd
->regmap
, regs
->alarm_ctrl
, ctrl_reg
);
324 dev_err(dev
, "Write to RTC control register failed\n");
329 spin_unlock_irqrestore(&rtc_dd
->ctrl_reg_lock
, irq_flags
);
333 static const struct rtc_class_ops pm8xxx_rtc_ops
= {
334 .read_time
= pm8xxx_rtc_read_time
,
335 .set_time
= pm8xxx_rtc_set_time
,
336 .set_alarm
= pm8xxx_rtc_set_alarm
,
337 .read_alarm
= pm8xxx_rtc_read_alarm
,
338 .alarm_irq_enable
= pm8xxx_rtc_alarm_irq_enable
,
341 static irqreturn_t
pm8xxx_alarm_trigger(int irq
, void *dev_id
)
343 struct pm8xxx_rtc
*rtc_dd
= dev_id
;
344 const struct pm8xxx_rtc_regs
*regs
= rtc_dd
->regs
;
345 unsigned int ctrl_reg
;
347 unsigned long irq_flags
;
349 rtc_update_irq(rtc_dd
->rtc
, 1, RTC_IRQF
| RTC_AF
);
351 spin_lock_irqsave(&rtc_dd
->ctrl_reg_lock
, irq_flags
);
353 /* Clear the alarm enable bit */
354 rc
= regmap_read(rtc_dd
->regmap
, regs
->alarm_ctrl
, &ctrl_reg
);
356 spin_unlock_irqrestore(&rtc_dd
->ctrl_reg_lock
, irq_flags
);
357 goto rtc_alarm_handled
;
360 ctrl_reg
&= ~regs
->alarm_en
;
362 rc
= regmap_write(rtc_dd
->regmap
, regs
->alarm_ctrl
, ctrl_reg
);
364 spin_unlock_irqrestore(&rtc_dd
->ctrl_reg_lock
, irq_flags
);
365 dev_err(rtc_dd
->rtc_dev
,
366 "Write to alarm control register failed\n");
367 goto rtc_alarm_handled
;
370 spin_unlock_irqrestore(&rtc_dd
->ctrl_reg_lock
, irq_flags
);
372 /* Clear RTC alarm register */
373 rc
= regmap_read(rtc_dd
->regmap
, regs
->alarm_ctrl2
, &ctrl_reg
);
375 dev_err(rtc_dd
->rtc_dev
,
376 "RTC Alarm control2 register read failed\n");
377 goto rtc_alarm_handled
;
380 ctrl_reg
|= PM8xxx_RTC_ALARM_CLEAR
;
381 rc
= regmap_write(rtc_dd
->regmap
, regs
->alarm_ctrl2
, ctrl_reg
);
383 dev_err(rtc_dd
->rtc_dev
,
384 "Write to RTC Alarm control2 register failed\n");
390 static int pm8xxx_rtc_enable(struct pm8xxx_rtc
*rtc_dd
)
392 const struct pm8xxx_rtc_regs
*regs
= rtc_dd
->regs
;
393 unsigned int ctrl_reg
;
396 /* Check if the RTC is on, else turn it on */
397 rc
= regmap_read(rtc_dd
->regmap
, regs
->ctrl
, &ctrl_reg
);
401 if (!(ctrl_reg
& PM8xxx_RTC_ENABLE
)) {
402 ctrl_reg
|= PM8xxx_RTC_ENABLE
;
403 rc
= regmap_write(rtc_dd
->regmap
, regs
->ctrl
, ctrl_reg
);
411 static const struct pm8xxx_rtc_regs pm8921_regs
= {
417 .alarm_ctrl2
= 0x11e,
421 static const struct pm8xxx_rtc_regs pm8058_regs
= {
427 .alarm_ctrl2
= 0x1e9,
431 static const struct pm8xxx_rtc_regs pm8941_regs
= {
436 .alarm_ctrl
= 0x6146,
437 .alarm_ctrl2
= 0x6148,
442 * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
444 static const struct of_device_id pm8xxx_id_table
[] = {
445 { .compatible
= "qcom,pm8921-rtc", .data
= &pm8921_regs
},
446 { .compatible
= "qcom,pm8018-rtc", .data
= &pm8921_regs
},
447 { .compatible
= "qcom,pm8058-rtc", .data
= &pm8058_regs
},
448 { .compatible
= "qcom,pm8941-rtc", .data
= &pm8941_regs
},
451 MODULE_DEVICE_TABLE(of
, pm8xxx_id_table
);
453 static int pm8xxx_rtc_probe(struct platform_device
*pdev
)
456 struct pm8xxx_rtc
*rtc_dd
;
457 const struct of_device_id
*match
;
459 match
= of_match_node(pm8xxx_id_table
, pdev
->dev
.of_node
);
463 rtc_dd
= devm_kzalloc(&pdev
->dev
, sizeof(*rtc_dd
), GFP_KERNEL
);
467 /* Initialise spinlock to protect RTC control register */
468 spin_lock_init(&rtc_dd
->ctrl_reg_lock
);
470 rtc_dd
->regmap
= dev_get_regmap(pdev
->dev
.parent
, NULL
);
471 if (!rtc_dd
->regmap
) {
472 dev_err(&pdev
->dev
, "Parent regmap unavailable.\n");
476 rtc_dd
->rtc_alarm_irq
= platform_get_irq(pdev
, 0);
477 if (rtc_dd
->rtc_alarm_irq
< 0) {
478 dev_err(&pdev
->dev
, "Alarm IRQ resource absent!\n");
482 rtc_dd
->allow_set_time
= of_property_read_bool(pdev
->dev
.of_node
,
485 rtc_dd
->regs
= match
->data
;
486 rtc_dd
->rtc_dev
= &pdev
->dev
;
488 rc
= pm8xxx_rtc_enable(rtc_dd
);
492 platform_set_drvdata(pdev
, rtc_dd
);
494 device_init_wakeup(&pdev
->dev
, 1);
496 /* Register the RTC device */
497 rtc_dd
->rtc
= devm_rtc_device_register(&pdev
->dev
, "pm8xxx_rtc",
498 &pm8xxx_rtc_ops
, THIS_MODULE
);
499 if (IS_ERR(rtc_dd
->rtc
)) {
500 dev_err(&pdev
->dev
, "%s: RTC registration failed (%ld)\n",
501 __func__
, PTR_ERR(rtc_dd
->rtc
));
502 return PTR_ERR(rtc_dd
->rtc
);
505 /* Request the alarm IRQ */
506 rc
= devm_request_any_context_irq(&pdev
->dev
, rtc_dd
->rtc_alarm_irq
,
507 pm8xxx_alarm_trigger
,
509 "pm8xxx_rtc_alarm", rtc_dd
);
511 dev_err(&pdev
->dev
, "Request IRQ failed (%d)\n", rc
);
515 dev_dbg(&pdev
->dev
, "Probe success !!\n");
520 #ifdef CONFIG_PM_SLEEP
521 static int pm8xxx_rtc_resume(struct device
*dev
)
523 struct pm8xxx_rtc
*rtc_dd
= dev_get_drvdata(dev
);
525 if (device_may_wakeup(dev
))
526 disable_irq_wake(rtc_dd
->rtc_alarm_irq
);
531 static int pm8xxx_rtc_suspend(struct device
*dev
)
533 struct pm8xxx_rtc
*rtc_dd
= dev_get_drvdata(dev
);
535 if (device_may_wakeup(dev
))
536 enable_irq_wake(rtc_dd
->rtc_alarm_irq
);
542 static SIMPLE_DEV_PM_OPS(pm8xxx_rtc_pm_ops
,
546 static struct platform_driver pm8xxx_rtc_driver
= {
547 .probe
= pm8xxx_rtc_probe
,
549 .name
= "rtc-pm8xxx",
550 .pm
= &pm8xxx_rtc_pm_ops
,
551 .of_match_table
= pm8xxx_id_table
,
555 module_platform_driver(pm8xxx_rtc_driver
);
557 MODULE_ALIAS("platform:rtc-pm8xxx");
558 MODULE_DESCRIPTION("PMIC8xxx RTC driver");
559 MODULE_LICENSE("GPL v2");
560 MODULE_AUTHOR("Anirudh Ghayal <aghayal@codeaurora.org>");