drivers/rtc/rtc-pm8xxx.c

   1 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  */
  12 #include <linux/of.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/rtc.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/pm.h>
  18 #include <linux/regmap.h>
  19 #include <linux/slab.h>
  20 #include <linux/spinlock.h>
  21
  22 /* RTC Register offsets from RTC CTRL REG */
  23 #define PM8XXX_ALARM_CTRL_OFFSET        0x01
  24 #define PM8XXX_RTC_WRITE_OFFSET         0x02
  25 #define PM8XXX_RTC_READ_OFFSET          0x06
  26 #define PM8XXX_ALARM_RW_OFFSET          0x0A
  27
  28 /* RTC_CTRL register bit fields */
  29 #define PM8xxx_RTC_ENABLE               BIT(7)
  30 #define PM8xxx_RTC_ALARM_CLEAR          BIT(0)
  31
  32 #define NUM_8_BIT_RTC_REGS              0x4
  33
  34 /**
  35  * struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
  36  * @ctrl: base address of control register
  37  * @write: base address of write register
  38  * @read: base address of read register
  39  * @alarm_ctrl: base address of alarm control register
  40  * @alarm_ctrl2: base address of alarm control2 register
  41  * @alarm_rw: base address of alarm read-write register
  42  * @alarm_en: alarm enable mask
  43  */
  44 struct pm8xxx_rtc_regs {
  45         unsigned int ctrl;
  46         unsigned int write;
  47         unsigned int read;
  48         unsigned int alarm_ctrl;
  49         unsigned int alarm_ctrl2;
  50         unsigned int alarm_rw;
  51         unsigned int alarm_en;
  52 };
  53
  54 /**
  55  * struct pm8xxx_rtc -  rtc driver internal structure
  56  * @rtc:                rtc device for this driver.
  57  * @regmap:             regmap used to access RTC registers
  58  * @allow_set_time:     indicates whether writing to the RTC is allowed
  59  * @rtc_alarm_irq:      rtc alarm irq number.
  60  * @ctrl_reg:           rtc control register.
  61  * @rtc_dev:            device structure.
  62  * @ctrl_reg_lock:      spinlock protecting access to ctrl_reg.
  63  */
  64 struct pm8xxx_rtc {
  65         struct rtc_device *rtc;
  66         struct regmap *regmap;
  67         bool allow_set_time;
  68         int rtc_alarm_irq;
  69         const struct pm8xxx_rtc_regs *regs;
  70         struct device *rtc_dev;
  71         spinlock_t ctrl_reg_lock;
  72 };
  73
  74 /*
  75  * Steps to write the RTC registers.
  76  * 1. Disable alarm if enabled.
  77  * 2. Write 0x00 to LSB.
  78  * 3. Write Byte[1], Byte[2], Byte[3] then Byte[0].
  79  * 4. Enable alarm if disabled in step 1.
  80  */
  81 static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
  82 {
  83         int rc, i;
  84         unsigned long secs, irq_flags;
  85         u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0;
  86         unsigned int ctrl_reg;
  87         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
  88         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
  89
  90         if (!rtc_dd->allow_set_time)
  91                 return -EACCES;
  92
  93         rtc_tm_to_time(tm, &secs);
  94
  95         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
  96                 value[i] = secs & 0xFF;
  97                 secs >>= 8;
  98         }
  99
 100         dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs);
 101
 102         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 103
 104         rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
 105         if (rc)
 106                 goto rtc_rw_fail;
 107
 108         if (ctrl_reg & regs->alarm_en) {
 109                 alarm_enabled = 1;
 110                 ctrl_reg &= ~regs->alarm_en;
 111                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
 112                 if (rc) {
 113                         dev_err(dev, "Write to RTC control register failed\n");
 114                         goto rtc_rw_fail;
 115                 }
 116         }
 117
 118         /* Write 0 to Byte[0] */
 119         rc = regmap_write(rtc_dd->regmap, regs->write, 0);
 120         if (rc) {
 121                 dev_err(dev, "Write to RTC write data register failed\n");
 122                 goto rtc_rw_fail;
 123         }
 124
 125         /* Write Byte[1], Byte[2], Byte[3] */
 126         rc = regmap_bulk_write(rtc_dd->regmap, regs->write + 1,
 127                                &value[1], sizeof(value) - 1);
 128         if (rc) {
 129                 dev_err(dev, "Write to RTC write data register failed\n");
 130                 goto rtc_rw_fail;
 131         }
 132
 133         /* Write Byte[0] */
 134         rc = regmap_write(rtc_dd->regmap, regs->write, value[0]);
 135         if (rc) {
 136                 dev_err(dev, "Write to RTC write data register failed\n");
 137                 goto rtc_rw_fail;
 138         }
 139
 140         if (alarm_enabled) {
 141                 ctrl_reg |= regs->alarm_en;
 142                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
 143                 if (rc) {
 144                         dev_err(dev, "Write to RTC control register failed\n");
 145                         goto rtc_rw_fail;
 146                 }
 147         }
 148
 149 rtc_rw_fail:
 150         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 151
 152         return rc;
 153 }
 154
 155 static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
 156 {
 157         int rc;
 158         u8 value[NUM_8_BIT_RTC_REGS];
 159         unsigned long secs;
 160         unsigned int reg;
 161         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 162         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 163
 164         rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value, sizeof(value));
 165         if (rc) {
 166                 dev_err(dev, "RTC read data register failed\n");
 167                 return rc;
 168         }
 169
 170         /*
 171          * Read the LSB again and check if there has been a carry over.
 172          * If there is, redo the read operation.
 173          */
 174         rc = regmap_read(rtc_dd->regmap, regs->read, &reg);
 175         if (rc < 0) {
 176                 dev_err(dev, "RTC read data register failed\n");
 177                 return rc;
 178         }
 179
 180         if (unlikely(reg < value[0])) {
 181                 rc = regmap_bulk_read(rtc_dd->regmap, regs->read,
 182                                       value, sizeof(value));
 183                 if (rc) {
 184                         dev_err(dev, "RTC read data register failed\n");
 185                         return rc;
 186                 }
 187         }
 188
 189         secs = value[0] | (value[1] << 8) | (value[2] << 16) | (value[3] << 24);
 190
 191         rtc_time_to_tm(secs, tm);
 192
 193         rc = rtc_valid_tm(tm);
 194         if (rc < 0) {
 195                 dev_err(dev, "Invalid time read from RTC\n");
 196                 return rc;
 197         }
 198
 199         dev_dbg(dev, "secs = %lu, h:m:s == %d:%d:%d, d/m/y = %d/%d/%d\n",
 200                 secs, tm->tm_hour, tm->tm_min, tm->tm_sec,
 201                 tm->tm_mday, tm->tm_mon, tm->tm_year);
 202
 203         return 0;
 204 }
 205
 206 static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
 207 {
 208         int rc, i;
 209         u8 value[NUM_8_BIT_RTC_REGS];
 210         unsigned int ctrl_reg;
 211         unsigned long secs, irq_flags;
 212         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 213         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 214
 215         rtc_tm_to_time(&alarm->time, &secs);
 216
 217         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
 218                 value[i] = secs & 0xFF;
 219                 secs >>= 8;
 220         }
 221
 222         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 223
 224         rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
 225                                sizeof(value));
 226         if (rc) {
 227                 dev_err(dev, "Write to RTC ALARM register failed\n");
 228                 goto rtc_rw_fail;
 229         }
 230
 231         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 232         if (rc)
 233                 goto rtc_rw_fail;
 234
 235         if (alarm->enabled)
 236                 ctrl_reg |= regs->alarm_en;
 237         else
 238                 ctrl_reg &= ~regs->alarm_en;
 239
 240         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 241         if (rc) {
 242                 dev_err(dev, "Write to RTC alarm control register failed\n");
 243                 goto rtc_rw_fail;
 244         }
 245
 246         dev_dbg(dev, "Alarm Set for h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
 247                 alarm->time.tm_hour, alarm->time.tm_min,
 248                 alarm->time.tm_sec, alarm->time.tm_mday,
 249                 alarm->time.tm_mon, alarm->time.tm_year);
 250 rtc_rw_fail:
 251         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 252         return rc;
 253 }
 254
 255 static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
 256 {
 257         int rc;
 258         u8 value[NUM_8_BIT_RTC_REGS];
 259         unsigned long secs;
 260         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 261         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 262
 263         rc = regmap_bulk_read(rtc_dd->regmap, regs->alarm_rw, value,
 264                               sizeof(value));
 265         if (rc) {
 266                 dev_err(dev, "RTC alarm time read failed\n");
 267                 return rc;
 268         }
 269
 270         secs = value[0] | (value[1] << 8) | (value[2] << 16) | (value[3] << 24);
 271
 272         rtc_time_to_tm(secs, &alarm->time);
 273
 274         rc = rtc_valid_tm(&alarm->time);
 275         if (rc < 0) {
 276                 dev_err(dev, "Invalid alarm time read from RTC\n");
 277                 return rc;
 278         }
 279
 280         dev_dbg(dev, "Alarm set for - h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
 281                 alarm->time.tm_hour, alarm->time.tm_min,
 282                 alarm->time.tm_sec, alarm->time.tm_mday,
 283                 alarm->time.tm_mon, alarm->time.tm_year);
 284
 285         return 0;
 286 }
 287
 288 static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
 289 {
 290         int rc;
 291         unsigned long irq_flags;
 292         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 293         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 294         unsigned int ctrl_reg;
 295
 296         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 297
 298         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 299         if (rc)
 300                 goto rtc_rw_fail;
 301
 302         if (enable)
 303                 ctrl_reg |= regs->alarm_en;
 304         else
 305                 ctrl_reg &= ~regs->alarm_en;
 306
 307         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 308         if (rc) {
 309                 dev_err(dev, "Write to RTC control register failed\n");
 310                 goto rtc_rw_fail;
 311         }
 312
 313 rtc_rw_fail:
 314         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 315         return rc;
 316 }
 317
 318 static const struct rtc_class_ops pm8xxx_rtc_ops = {
 319         .read_time      = pm8xxx_rtc_read_time,
 320         .set_time       = pm8xxx_rtc_set_time,
 321         .set_alarm      = pm8xxx_rtc_set_alarm,
 322         .read_alarm     = pm8xxx_rtc_read_alarm,
 323         .alarm_irq_enable = pm8xxx_rtc_alarm_irq_enable,
 324 };
 325
 326 static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
 327 {
 328         struct pm8xxx_rtc *rtc_dd = dev_id;
 329         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 330         unsigned int ctrl_reg;
 331         int rc;
 332         unsigned long irq_flags;
 333
 334         rtc_update_irq(rtc_dd->rtc, 1, RTC_IRQF | RTC_AF);
 335
 336         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 337
 338         /* Clear the alarm enable bit */
 339         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 340         if (rc) {
 341                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 342                 goto rtc_alarm_handled;
 343         }
 344
 345         ctrl_reg &= ~regs->alarm_en;
 346
 347         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 348         if (rc) {
 349                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 350                 dev_err(rtc_dd->rtc_dev,
 351                         "Write to alarm control register failed\n");
 352                 goto rtc_alarm_handled;
 353         }
 354
 355         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 356
 357         /* Clear RTC alarm register */
 358         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl2, &ctrl_reg);
 359         if (rc) {
 360                 dev_err(rtc_dd->rtc_dev,
 361                         "RTC Alarm control2 register read failed\n");
 362                 goto rtc_alarm_handled;
 363         }
 364
 365         ctrl_reg |= PM8xxx_RTC_ALARM_CLEAR;
 366         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl2, ctrl_reg);
 367         if (rc)
 368                 dev_err(rtc_dd->rtc_dev,
 369                         "Write to RTC Alarm control2 register failed\n");
 370
 371 rtc_alarm_handled:
 372         return IRQ_HANDLED;
 373 }
 374
 375 static int pm8xxx_rtc_enable(struct pm8xxx_rtc *rtc_dd)
 376 {
 377         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 378         unsigned int ctrl_reg;
 379         int rc;
 380
 381         /* Check if the RTC is on, else turn it on */
 382         rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
 383         if (rc)
 384                 return rc;
 385
 386         if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
 387                 ctrl_reg |= PM8xxx_RTC_ENABLE;
 388                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
 389                 if (rc)
 390                         return rc;
 391         }
 392
 393         return 0;
 394 }
 395
 396 static const struct pm8xxx_rtc_regs pm8921_regs = {
 397         .ctrl           = 0x11d,
 398         .write          = 0x11f,
 399         .read           = 0x123,
 400         .alarm_rw       = 0x127,
 401         .alarm_ctrl     = 0x11d,
 402         .alarm_ctrl2    = 0x11e,
 403         .alarm_en       = BIT(1),
 404 };
 405
 406 static const struct pm8xxx_rtc_regs pm8058_regs = {
 407         .ctrl           = 0x1e8,
 408         .write          = 0x1ea,
 409         .read           = 0x1ee,
 410         .alarm_rw       = 0x1f2,
 411         .alarm_ctrl     = 0x1e8,
 412         .alarm_ctrl2    = 0x1e9,
 413         .alarm_en       = BIT(1),
 414 };
 415
 416 static const struct pm8xxx_rtc_regs pm8941_regs = {
 417         .ctrl           = 0x6046,
 418         .write          = 0x6040,
 419         .read           = 0x6048,
 420         .alarm_rw       = 0x6140,
 421         .alarm_ctrl     = 0x6146,
 422         .alarm_ctrl2    = 0x6148,
 423         .alarm_en       = BIT(7),
 424 };
 425
 426 /*
 427  * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
 428  */
 429 static const struct of_device_id pm8xxx_id_table[] = {
 430         { .compatible = "qcom,pm8921-rtc", .data = &pm8921_regs },
 431         { .compatible = "qcom,pm8018-rtc", .data = &pm8921_regs },
 432         { .compatible = "qcom,pm8058-rtc", .data = &pm8058_regs },
 433         { .compatible = "qcom,pm8941-rtc", .data = &pm8941_regs },
 434         { },
 435 };
 436 MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
 437
 438 static int pm8xxx_rtc_probe(struct platform_device *pdev)
 439 {
 440         int rc;
 441         struct pm8xxx_rtc *rtc_dd;
 442         const struct of_device_id *match;
 443
 444         match = of_match_node(pm8xxx_id_table, pdev->dev.of_node);
 445         if (!match)
 446                 return -ENXIO;
 447
 448         rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL);
 449         if (rtc_dd == NULL)
 450                 return -ENOMEM;
 451
 452         /* Initialise spinlock to protect RTC control register */
 453         spin_lock_init(&rtc_dd->ctrl_reg_lock);
 454
 455         rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL);
 456         if (!rtc_dd->regmap) {
 457                 dev_err(&pdev->dev, "Parent regmap unavailable.\n");
 458                 return -ENXIO;
 459         }
 460
 461         rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0);
 462         if (rtc_dd->rtc_alarm_irq < 0) {
 463                 dev_err(&pdev->dev, "Alarm IRQ resource absent!\n");
 464                 return -ENXIO;
 465         }
 466
 467         rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
 468                                                       "allow-set-time");
 469
 470         rtc_dd->regs = match->data;
 471         rtc_dd->rtc_dev = &pdev->dev;
 472
 473         rc = pm8xxx_rtc_enable(rtc_dd);
 474         if (rc)
 475                 return rc;
 476
 477         platform_set_drvdata(pdev, rtc_dd);
 478
 479         device_init_wakeup(&pdev->dev, 1);
 480
 481         /* Register the RTC device */
 482         rtc_dd->rtc = devm_rtc_device_register(&pdev->dev, "pm8xxx_rtc",
 483                                                &pm8xxx_rtc_ops, THIS_MODULE);
 484         if (IS_ERR(rtc_dd->rtc)) {
 485                 dev_err(&pdev->dev, "%s: RTC registration failed (%ld)\n",
 486                         __func__, PTR_ERR(rtc_dd->rtc));
 487                 return PTR_ERR(rtc_dd->rtc);
 488         }
 489
 490         /* Request the alarm IRQ */
 491         rc = devm_request_any_context_irq(&pdev->dev, rtc_dd->rtc_alarm_irq,
 492                                           pm8xxx_alarm_trigger,
 493                                           IRQF_TRIGGER_RISING,
 494                                           "pm8xxx_rtc_alarm", rtc_dd);
 495         if (rc < 0) {
 496                 dev_err(&pdev->dev, "Request IRQ failed (%d)\n", rc);
 497                 return rc;
 498         }
 499
 500         dev_dbg(&pdev->dev, "Probe success !!\n");
 501
 502         return 0;
 503 }
 504
 505 #ifdef CONFIG_PM_SLEEP
 506 static int pm8xxx_rtc_resume(struct device *dev)
 507 {
 508         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 509
 510         if (device_may_wakeup(dev))
 511                 disable_irq_wake(rtc_dd->rtc_alarm_irq);
 512
 513         return 0;
 514 }
 515
 516 static int pm8xxx_rtc_suspend(struct device *dev)
 517 {
 518         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 519
 520         if (device_may_wakeup(dev))
 521                 enable_irq_wake(rtc_dd->rtc_alarm_irq);
 522
 523         return 0;
 524 }
 525 #endif
 526
 527 static SIMPLE_DEV_PM_OPS(pm8xxx_rtc_pm_ops,
 528                          pm8xxx_rtc_suspend,
 529                          pm8xxx_rtc_resume);
 530
 531 static struct platform_driver pm8xxx_rtc_driver = {
 532         .probe          = pm8xxx_rtc_probe,
 533         .driver = {
 534                 .name           = "rtc-pm8xxx",
 535                 .pm             = &pm8xxx_rtc_pm_ops,
 536                 .of_match_table = pm8xxx_id_table,
 537         },
 538 };
 539
 540 module_platform_driver(pm8xxx_rtc_driver);
 541
 542 MODULE_ALIAS("platform:rtc-pm8xxx");
 543 MODULE_DESCRIPTION("PMIC8xxx RTC driver");
 544 MODULE_LICENSE("GPL v2");
 545 MODULE_AUTHOR("Anirudh Ghayal <aghayal@codeaurora.org>");