1 /* drivers/rtc/rtc-s3c.c
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
17 #include <linux/module.h>
19 #include <linux/string.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/rtc.h>
24 #include <linux/bcd.h>
25 #include <linux/clk.h>
26 #include <linux/log2.h>
27 #include <linux/slab.h>
29 #include <linux/uaccess.h>
32 #include <mach/hardware.h>
34 #include <plat/regs-rtc.h>
43 struct s3c_rtc_drv_data
{
47 /* I have yet to find an S3C implementation with more than one
48 * of these rtc blocks in */
50 static struct clk
*rtc_clk
;
51 static void __iomem
*s3c_rtc_base
;
52 static int s3c_rtc_alarmno
= NO_IRQ
;
53 static int s3c_rtc_tickno
= NO_IRQ
;
55 static enum s3c_cpu_type s3c_rtc_cpu_type
;
57 static DEFINE_SPINLOCK(s3c_rtc_pie_lock
);
59 static void s3c_rtc_alarm_clk_enable(bool enable
)
61 static DEFINE_SPINLOCK(s3c_rtc_alarm_clk_lock
);
62 static bool alarm_clk_enabled
;
63 unsigned long irq_flags
;
65 spin_lock_irqsave(&s3c_rtc_alarm_clk_lock
, irq_flags
);
67 if (!alarm_clk_enabled
) {
69 alarm_clk_enabled
= true;
72 if (alarm_clk_enabled
) {
74 alarm_clk_enabled
= false;
77 spin_unlock_irqrestore(&s3c_rtc_alarm_clk_lock
, irq_flags
);
82 static irqreturn_t
s3c_rtc_alarmirq(int irq
, void *id
)
84 struct rtc_device
*rdev
= id
;
87 rtc_update_irq(rdev
, 1, RTC_AF
| RTC_IRQF
);
89 if (s3c_rtc_cpu_type
== TYPE_S3C64XX
)
90 writeb(S3C2410_INTP_ALM
, s3c_rtc_base
+ S3C2410_INTP
);
94 s3c_rtc_alarm_clk_enable(false);
99 static irqreturn_t
s3c_rtc_tickirq(int irq
, void *id
)
101 struct rtc_device
*rdev
= id
;
104 rtc_update_irq(rdev
, 1, RTC_PF
| RTC_IRQF
);
106 if (s3c_rtc_cpu_type
== TYPE_S3C64XX
)
107 writeb(S3C2410_INTP_TIC
, s3c_rtc_base
+ S3C2410_INTP
);
109 clk_disable(rtc_clk
);
113 /* Update control registers */
114 static int s3c_rtc_setaie(struct device
*dev
, unsigned int enabled
)
118 pr_debug("%s: aie=%d\n", __func__
, enabled
);
121 tmp
= readb(s3c_rtc_base
+ S3C2410_RTCALM
) & ~S3C2410_RTCALM_ALMEN
;
124 tmp
|= S3C2410_RTCALM_ALMEN
;
126 writeb(tmp
, s3c_rtc_base
+ S3C2410_RTCALM
);
127 clk_disable(rtc_clk
);
129 s3c_rtc_alarm_clk_enable(enabled
);
134 static int s3c_rtc_setfreq(struct device
*dev
, int freq
)
136 struct platform_device
*pdev
= to_platform_device(dev
);
137 struct rtc_device
*rtc_dev
= platform_get_drvdata(pdev
);
138 unsigned int tmp
= 0;
141 if (!is_power_of_2(freq
))
145 spin_lock_irq(&s3c_rtc_pie_lock
);
147 if (s3c_rtc_cpu_type
!= TYPE_S3C64XX
) {
148 tmp
= readb(s3c_rtc_base
+ S3C2410_TICNT
);
149 tmp
&= S3C2410_TICNT_ENABLE
;
152 val
= (rtc_dev
->max_user_freq
/ freq
) - 1;
154 if (s3c_rtc_cpu_type
== TYPE_S3C2416
|| s3c_rtc_cpu_type
== TYPE_S3C2443
) {
155 tmp
|= S3C2443_TICNT_PART(val
);
156 writel(S3C2443_TICNT1_PART(val
), s3c_rtc_base
+ S3C2443_TICNT1
);
158 if (s3c_rtc_cpu_type
== TYPE_S3C2416
)
159 writel(S3C2416_TICNT2_PART(val
), s3c_rtc_base
+ S3C2416_TICNT2
);
164 writel(tmp
, s3c_rtc_base
+ S3C2410_TICNT
);
165 spin_unlock_irq(&s3c_rtc_pie_lock
);
166 clk_disable(rtc_clk
);
171 /* Time read/write */
173 static int s3c_rtc_gettime(struct device
*dev
, struct rtc_time
*rtc_tm
)
175 unsigned int have_retried
= 0;
176 void __iomem
*base
= s3c_rtc_base
;
180 rtc_tm
->tm_min
= readb(base
+ S3C2410_RTCMIN
);
181 rtc_tm
->tm_hour
= readb(base
+ S3C2410_RTCHOUR
);
182 rtc_tm
->tm_mday
= readb(base
+ S3C2410_RTCDATE
);
183 rtc_tm
->tm_mon
= readb(base
+ S3C2410_RTCMON
);
184 rtc_tm
->tm_year
= readb(base
+ S3C2410_RTCYEAR
);
185 rtc_tm
->tm_sec
= readb(base
+ S3C2410_RTCSEC
);
187 /* the only way to work out whether the system was mid-update
188 * when we read it is to check the second counter, and if it
189 * is zero, then we re-try the entire read
192 if (rtc_tm
->tm_sec
== 0 && !have_retried
) {
197 rtc_tm
->tm_sec
= bcd2bin(rtc_tm
->tm_sec
);
198 rtc_tm
->tm_min
= bcd2bin(rtc_tm
->tm_min
);
199 rtc_tm
->tm_hour
= bcd2bin(rtc_tm
->tm_hour
);
200 rtc_tm
->tm_mday
= bcd2bin(rtc_tm
->tm_mday
);
201 rtc_tm
->tm_mon
= bcd2bin(rtc_tm
->tm_mon
);
202 rtc_tm
->tm_year
= bcd2bin(rtc_tm
->tm_year
);
204 rtc_tm
->tm_year
+= 100;
206 pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n",
207 1900 + rtc_tm
->tm_year
, rtc_tm
->tm_mon
, rtc_tm
->tm_mday
,
208 rtc_tm
->tm_hour
, rtc_tm
->tm_min
, rtc_tm
->tm_sec
);
212 clk_disable(rtc_clk
);
213 return rtc_valid_tm(rtc_tm
);
216 static int s3c_rtc_settime(struct device
*dev
, struct rtc_time
*tm
)
218 void __iomem
*base
= s3c_rtc_base
;
219 int year
= tm
->tm_year
- 100;
221 pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n",
222 1900 + tm
->tm_year
, tm
->tm_mon
, tm
->tm_mday
,
223 tm
->tm_hour
, tm
->tm_min
, tm
->tm_sec
);
225 /* we get around y2k by simply not supporting it */
227 if (year
< 0 || year
>= 100) {
228 dev_err(dev
, "rtc only supports 100 years\n");
233 writeb(bin2bcd(tm
->tm_sec
), base
+ S3C2410_RTCSEC
);
234 writeb(bin2bcd(tm
->tm_min
), base
+ S3C2410_RTCMIN
);
235 writeb(bin2bcd(tm
->tm_hour
), base
+ S3C2410_RTCHOUR
);
236 writeb(bin2bcd(tm
->tm_mday
), base
+ S3C2410_RTCDATE
);
237 writeb(bin2bcd(tm
->tm_mon
+ 1), base
+ S3C2410_RTCMON
);
238 writeb(bin2bcd(year
), base
+ S3C2410_RTCYEAR
);
239 clk_disable(rtc_clk
);
244 static int s3c_rtc_getalarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
246 struct rtc_time
*alm_tm
= &alrm
->time
;
247 void __iomem
*base
= s3c_rtc_base
;
251 alm_tm
->tm_sec
= readb(base
+ S3C2410_ALMSEC
);
252 alm_tm
->tm_min
= readb(base
+ S3C2410_ALMMIN
);
253 alm_tm
->tm_hour
= readb(base
+ S3C2410_ALMHOUR
);
254 alm_tm
->tm_mon
= readb(base
+ S3C2410_ALMMON
);
255 alm_tm
->tm_mday
= readb(base
+ S3C2410_ALMDATE
);
256 alm_tm
->tm_year
= readb(base
+ S3C2410_ALMYEAR
);
258 alm_en
= readb(base
+ S3C2410_RTCALM
);
260 alrm
->enabled
= (alm_en
& S3C2410_RTCALM_ALMEN
) ? 1 : 0;
262 pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
264 1900 + alm_tm
->tm_year
, alm_tm
->tm_mon
, alm_tm
->tm_mday
,
265 alm_tm
->tm_hour
, alm_tm
->tm_min
, alm_tm
->tm_sec
);
268 /* decode the alarm enable field */
270 if (alm_en
& S3C2410_RTCALM_SECEN
)
271 alm_tm
->tm_sec
= bcd2bin(alm_tm
->tm_sec
);
275 if (alm_en
& S3C2410_RTCALM_MINEN
)
276 alm_tm
->tm_min
= bcd2bin(alm_tm
->tm_min
);
280 if (alm_en
& S3C2410_RTCALM_HOUREN
)
281 alm_tm
->tm_hour
= bcd2bin(alm_tm
->tm_hour
);
283 alm_tm
->tm_hour
= -1;
285 if (alm_en
& S3C2410_RTCALM_DAYEN
)
286 alm_tm
->tm_mday
= bcd2bin(alm_tm
->tm_mday
);
288 alm_tm
->tm_mday
= -1;
290 if (alm_en
& S3C2410_RTCALM_MONEN
) {
291 alm_tm
->tm_mon
= bcd2bin(alm_tm
->tm_mon
);
297 if (alm_en
& S3C2410_RTCALM_YEAREN
)
298 alm_tm
->tm_year
= bcd2bin(alm_tm
->tm_year
);
300 alm_tm
->tm_year
= -1;
302 clk_disable(rtc_clk
);
306 static int s3c_rtc_setalarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
308 struct rtc_time
*tm
= &alrm
->time
;
309 void __iomem
*base
= s3c_rtc_base
;
310 unsigned int alrm_en
;
313 pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
315 1900 + tm
->tm_year
, tm
->tm_mon
+ 1, tm
->tm_mday
,
316 tm
->tm_hour
, tm
->tm_min
, tm
->tm_sec
);
318 alrm_en
= readb(base
+ S3C2410_RTCALM
) & S3C2410_RTCALM_ALMEN
;
319 writeb(0x00, base
+ S3C2410_RTCALM
);
321 if (tm
->tm_sec
< 60 && tm
->tm_sec
>= 0) {
322 alrm_en
|= S3C2410_RTCALM_SECEN
;
323 writeb(bin2bcd(tm
->tm_sec
), base
+ S3C2410_ALMSEC
);
326 if (tm
->tm_min
< 60 && tm
->tm_min
>= 0) {
327 alrm_en
|= S3C2410_RTCALM_MINEN
;
328 writeb(bin2bcd(tm
->tm_min
), base
+ S3C2410_ALMMIN
);
331 if (tm
->tm_hour
< 24 && tm
->tm_hour
>= 0) {
332 alrm_en
|= S3C2410_RTCALM_HOUREN
;
333 writeb(bin2bcd(tm
->tm_hour
), base
+ S3C2410_ALMHOUR
);
336 pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en
);
338 writeb(alrm_en
, base
+ S3C2410_RTCALM
);
340 s3c_rtc_setaie(dev
, alrm
->enabled
);
342 clk_disable(rtc_clk
);
346 static int s3c_rtc_proc(struct device
*dev
, struct seq_file
*seq
)
351 if (s3c_rtc_cpu_type
== TYPE_S3C64XX
) {
352 ticnt
= readw(s3c_rtc_base
+ S3C2410_RTCCON
);
353 ticnt
&= S3C64XX_RTCCON_TICEN
;
355 ticnt
= readb(s3c_rtc_base
+ S3C2410_TICNT
);
356 ticnt
&= S3C2410_TICNT_ENABLE
;
359 seq_printf(seq
, "periodic_IRQ\t: %s\n", ticnt
? "yes" : "no");
360 clk_disable(rtc_clk
);
364 static const struct rtc_class_ops s3c_rtcops
= {
365 .read_time
= s3c_rtc_gettime
,
366 .set_time
= s3c_rtc_settime
,
367 .read_alarm
= s3c_rtc_getalarm
,
368 .set_alarm
= s3c_rtc_setalarm
,
369 .proc
= s3c_rtc_proc
,
370 .alarm_irq_enable
= s3c_rtc_setaie
,
373 static void s3c_rtc_enable(struct platform_device
*pdev
, int en
)
375 void __iomem
*base
= s3c_rtc_base
;
378 if (s3c_rtc_base
== NULL
)
383 tmp
= readw(base
+ S3C2410_RTCCON
);
384 if (s3c_rtc_cpu_type
== TYPE_S3C64XX
)
385 tmp
&= ~S3C64XX_RTCCON_TICEN
;
386 tmp
&= ~S3C2410_RTCCON_RTCEN
;
387 writew(tmp
, base
+ S3C2410_RTCCON
);
389 if (s3c_rtc_cpu_type
!= TYPE_S3C64XX
) {
390 tmp
= readb(base
+ S3C2410_TICNT
);
391 tmp
&= ~S3C2410_TICNT_ENABLE
;
392 writeb(tmp
, base
+ S3C2410_TICNT
);
395 /* re-enable the device, and check it is ok */
397 if ((readw(base
+S3C2410_RTCCON
) & S3C2410_RTCCON_RTCEN
) == 0) {
398 dev_info(&pdev
->dev
, "rtc disabled, re-enabling\n");
400 tmp
= readw(base
+ S3C2410_RTCCON
);
401 writew(tmp
| S3C2410_RTCCON_RTCEN
,
402 base
+ S3C2410_RTCCON
);
405 if ((readw(base
+ S3C2410_RTCCON
) & S3C2410_RTCCON_CNTSEL
)) {
406 dev_info(&pdev
->dev
, "removing RTCCON_CNTSEL\n");
408 tmp
= readw(base
+ S3C2410_RTCCON
);
409 writew(tmp
& ~S3C2410_RTCCON_CNTSEL
,
410 base
+ S3C2410_RTCCON
);
413 if ((readw(base
+ S3C2410_RTCCON
) & S3C2410_RTCCON_CLKRST
)) {
414 dev_info(&pdev
->dev
, "removing RTCCON_CLKRST\n");
416 tmp
= readw(base
+ S3C2410_RTCCON
);
417 writew(tmp
& ~S3C2410_RTCCON_CLKRST
,
418 base
+ S3C2410_RTCCON
);
421 clk_disable(rtc_clk
);
424 static int s3c_rtc_remove(struct platform_device
*dev
)
426 struct rtc_device
*rtc
= platform_get_drvdata(dev
);
428 platform_set_drvdata(dev
, NULL
);
429 rtc_device_unregister(rtc
);
431 s3c_rtc_setaie(&dev
->dev
, 0);
438 static const struct of_device_id s3c_rtc_dt_match
[];
440 static inline int s3c_rtc_get_driver_data(struct platform_device
*pdev
)
443 struct s3c_rtc_drv_data
*data
;
444 if (pdev
->dev
.of_node
) {
445 const struct of_device_id
*match
;
446 match
= of_match_node(s3c_rtc_dt_match
, pdev
->dev
.of_node
);
447 data
= (struct s3c_rtc_drv_data
*) match
->data
;
448 return data
->cpu_type
;
451 return platform_get_device_id(pdev
)->driver_data
;
454 static int s3c_rtc_probe(struct platform_device
*pdev
)
456 struct rtc_device
*rtc
;
457 struct rtc_time rtc_tm
;
458 struct resource
*res
;
462 pr_debug("%s: probe=%p\n", __func__
, pdev
);
466 s3c_rtc_tickno
= platform_get_irq(pdev
, 1);
467 if (s3c_rtc_tickno
< 0) {
468 dev_err(&pdev
->dev
, "no irq for rtc tick\n");
469 return s3c_rtc_tickno
;
472 s3c_rtc_alarmno
= platform_get_irq(pdev
, 0);
473 if (s3c_rtc_alarmno
< 0) {
474 dev_err(&pdev
->dev
, "no irq for alarm\n");
475 return s3c_rtc_alarmno
;
478 pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
479 s3c_rtc_tickno
, s3c_rtc_alarmno
);
481 /* get the memory region */
483 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
485 dev_err(&pdev
->dev
, "failed to get memory region resource\n");
489 s3c_rtc_base
= devm_ioremap_resource(&pdev
->dev
, res
);
490 if (IS_ERR(s3c_rtc_base
))
491 return PTR_ERR(s3c_rtc_base
);
493 rtc_clk
= devm_clk_get(&pdev
->dev
, "rtc");
494 if (IS_ERR(rtc_clk
)) {
495 dev_err(&pdev
->dev
, "failed to find rtc clock source\n");
496 ret
= PTR_ERR(rtc_clk
);
503 /* check to see if everything is setup correctly */
505 s3c_rtc_enable(pdev
, 1);
507 pr_debug("s3c2410_rtc: RTCCON=%02x\n",
508 readw(s3c_rtc_base
+ S3C2410_RTCCON
));
510 device_init_wakeup(&pdev
->dev
, 1);
512 /* register RTC and exit */
514 rtc
= rtc_device_register("s3c", &pdev
->dev
, &s3c_rtcops
,
518 dev_err(&pdev
->dev
, "cannot attach rtc\n");
523 s3c_rtc_cpu_type
= s3c_rtc_get_driver_data(pdev
);
527 s3c_rtc_gettime(NULL
, &rtc_tm
);
529 if (rtc_valid_tm(&rtc_tm
)) {
530 rtc_tm
.tm_year
= 100;
537 s3c_rtc_settime(NULL
, &rtc_tm
);
539 dev_warn(&pdev
->dev
, "warning: invalid RTC value so initializing it\n");
542 if (s3c_rtc_cpu_type
!= TYPE_S3C2410
)
543 rtc
->max_user_freq
= 32768;
545 rtc
->max_user_freq
= 128;
547 if (s3c_rtc_cpu_type
== TYPE_S3C2416
|| s3c_rtc_cpu_type
== TYPE_S3C2443
) {
548 tmp
= readw(s3c_rtc_base
+ S3C2410_RTCCON
);
549 tmp
|= S3C2443_RTCCON_TICSEL
;
550 writew(tmp
, s3c_rtc_base
+ S3C2410_RTCCON
);
553 platform_set_drvdata(pdev
, rtc
);
555 s3c_rtc_setfreq(&pdev
->dev
, 1);
557 ret
= devm_request_irq(&pdev
->dev
, s3c_rtc_alarmno
, s3c_rtc_alarmirq
,
558 0, "s3c2410-rtc alarm", rtc
);
560 dev_err(&pdev
->dev
, "IRQ%d error %d\n", s3c_rtc_alarmno
, ret
);
564 ret
= devm_request_irq(&pdev
->dev
, s3c_rtc_tickno
, s3c_rtc_tickirq
,
565 0, "s3c2410-rtc tick", rtc
);
567 dev_err(&pdev
->dev
, "IRQ%d error %d\n", s3c_rtc_tickno
, ret
);
571 clk_disable(rtc_clk
);
576 platform_set_drvdata(pdev
, NULL
);
577 rtc_device_unregister(rtc
);
580 s3c_rtc_enable(pdev
, 0);
581 clk_disable(rtc_clk
);
588 /* RTC Power management control */
590 static int ticnt_save
, ticnt_en_save
;
592 static int s3c_rtc_suspend(struct platform_device
*pdev
, pm_message_t state
)
595 /* save TICNT for anyone using periodic interrupts */
596 ticnt_save
= readb(s3c_rtc_base
+ S3C2410_TICNT
);
597 if (s3c_rtc_cpu_type
== TYPE_S3C64XX
) {
598 ticnt_en_save
= readw(s3c_rtc_base
+ S3C2410_RTCCON
);
599 ticnt_en_save
&= S3C64XX_RTCCON_TICEN
;
601 s3c_rtc_enable(pdev
, 0);
603 if (device_may_wakeup(&pdev
->dev
) && !wake_en
) {
604 if (enable_irq_wake(s3c_rtc_alarmno
) == 0)
607 dev_err(&pdev
->dev
, "enable_irq_wake failed\n");
609 clk_disable(rtc_clk
);
614 static int s3c_rtc_resume(struct platform_device
*pdev
)
619 s3c_rtc_enable(pdev
, 1);
620 writeb(ticnt_save
, s3c_rtc_base
+ S3C2410_TICNT
);
621 if (s3c_rtc_cpu_type
== TYPE_S3C64XX
&& ticnt_en_save
) {
622 tmp
= readw(s3c_rtc_base
+ S3C2410_RTCCON
);
623 writew(tmp
| ticnt_en_save
, s3c_rtc_base
+ S3C2410_RTCCON
);
626 if (device_may_wakeup(&pdev
->dev
) && wake_en
) {
627 disable_irq_wake(s3c_rtc_alarmno
);
630 clk_disable(rtc_clk
);
635 #define s3c_rtc_suspend NULL
636 #define s3c_rtc_resume NULL
640 static struct s3c_rtc_drv_data s3c_rtc_drv_data_array
[] = {
641 [TYPE_S3C2410
] = { TYPE_S3C2410
},
642 [TYPE_S3C2416
] = { TYPE_S3C2416
},
643 [TYPE_S3C2443
] = { TYPE_S3C2443
},
644 [TYPE_S3C64XX
] = { TYPE_S3C64XX
},
647 static const struct of_device_id s3c_rtc_dt_match
[] = {
649 .compatible
= "samsung,s3c2410-rtc",
650 .data
= &s3c_rtc_drv_data_array
[TYPE_S3C2410
],
652 .compatible
= "samsung,s3c2416-rtc",
653 .data
= &s3c_rtc_drv_data_array
[TYPE_S3C2416
],
655 .compatible
= "samsung,s3c2443-rtc",
656 .data
= &s3c_rtc_drv_data_array
[TYPE_S3C2443
],
658 .compatible
= "samsung,s3c6410-rtc",
659 .data
= &s3c_rtc_drv_data_array
[TYPE_S3C64XX
],
663 MODULE_DEVICE_TABLE(of
, s3c_rtc_dt_match
);
666 static struct platform_device_id s3c_rtc_driver_ids
[] = {
668 .name
= "s3c2410-rtc",
669 .driver_data
= TYPE_S3C2410
,
671 .name
= "s3c2416-rtc",
672 .driver_data
= TYPE_S3C2416
,
674 .name
= "s3c2443-rtc",
675 .driver_data
= TYPE_S3C2443
,
677 .name
= "s3c64xx-rtc",
678 .driver_data
= TYPE_S3C64XX
,
683 MODULE_DEVICE_TABLE(platform
, s3c_rtc_driver_ids
);
685 static struct platform_driver s3c_rtc_driver
= {
686 .probe
= s3c_rtc_probe
,
687 .remove
= s3c_rtc_remove
,
688 .suspend
= s3c_rtc_suspend
,
689 .resume
= s3c_rtc_resume
,
690 .id_table
= s3c_rtc_driver_ids
,
693 .owner
= THIS_MODULE
,
694 .of_match_table
= of_match_ptr(s3c_rtc_dt_match
),
698 module_platform_driver(s3c_rtc_driver
);
700 MODULE_DESCRIPTION("Samsung S3C RTC Driver");
701 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
702 MODULE_LICENSE("GPL");
703 MODULE_ALIAS("platform:s3c2410-rtc");