drivers/rtc/rtc-sa1100.c

   1 /*
   2  * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
   3  *
   4  * Copyright (c) 2000 Nils Faerber
   5  *
   6  * Based on rtc.c by Paul Gortmaker
   7  *
   8  * Original Driver by Nils Faerber <nils@kernelconcepts.de>
   9  *
  10  * Modifications from:
  11  *   CIH <cih@coventive.com>
  12  *   Nicolas Pitre <nico@fluxnic.net>
  13  *   Andrew Christian <andrew.christian@hp.com>
  14  *
  15  * Converted to the RTC subsystem and Driver Model
  16  *   by Richard Purdie <rpurdie@rpsys.net>
  17  *
  18  * This program is free software; you can redistribute it and/or
  19  * modify it under the terms of the GNU General Public License
  20  * as published by the Free Software Foundation; either version
  21  * 2 of the License, or (at your option) any later version.
  22  */
  23
  24 #include <linux/platform_device.h>
  25 #include <linux/module.h>
  26 #include <linux/clk.h>
  27 #include <linux/rtc.h>
  28 #include <linux/init.h>
  29 #include <linux/fs.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/slab.h>
  32 #include <linux/string.h>
  33 #include <linux/of.h>
  34 #include <linux/pm.h>
  35 #include <linux/bitops.h>
  36
  37 #include <mach/hardware.h>
  38 #include <mach/irqs.h>
  39
  40 #if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
  41 #include <mach/regs-rtc.h>
  42 #endif
  43
  44 #define RTC_DEF_DIVIDER         (32768 - 1)
  45 #define RTC_DEF_TRIM            0
  46 #define RTC_FREQ                1024
  47
  48 struct sa1100_rtc {
  49         spinlock_t              lock;
  50         int                     irq_1hz;
  51         int                     irq_alarm;
  52         struct rtc_device       *rtc;
  53         struct clk              *clk;
  54 };
  55
  56 static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
  57 {
  58         struct sa1100_rtc *info = dev_get_drvdata(dev_id);
  59         struct rtc_device *rtc = info->rtc;
  60         unsigned int rtsr;
  61         unsigned long events = 0;
  62
  63         spin_lock(&info->lock);
  64
  65         rtsr = RTSR;
  66         /* clear interrupt sources */
  67         RTSR = 0;
  68         /* Fix for a nasty initialization problem the in SA11xx RTSR register.
  69          * See also the comments in sa1100_rtc_probe(). */
  70         if (rtsr & (RTSR_ALE | RTSR_HZE)) {
  71                 /* This is the original code, before there was the if test
  72                  * above. This code does not clear interrupts that were not
  73                  * enabled. */
  74                 RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
  75         } else {
  76                 /* For some reason, it is possible to enter this routine
  77                  * without interruptions enabled, it has been tested with
  78                  * several units (Bug in SA11xx chip?).
  79                  *
  80                  * This situation leads to an infinite "loop" of interrupt
  81                  * routine calling and as a result the processor seems to
  82                  * lock on its first call to open(). */
  83                 RTSR = RTSR_AL | RTSR_HZ;
  84         }
  85
  86         /* clear alarm interrupt if it has occurred */
  87         if (rtsr & RTSR_AL)
  88                 rtsr &= ~RTSR_ALE;
  89         RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
  90
  91         /* update irq data & counter */
  92         if (rtsr & RTSR_AL)
  93                 events |= RTC_AF | RTC_IRQF;
  94         if (rtsr & RTSR_HZ)
  95                 events |= RTC_UF | RTC_IRQF;
  96
  97         rtc_update_irq(rtc, 1, events);
  98
  99         spin_unlock(&info->lock);
 100
 101         return IRQ_HANDLED;
 102 }
 103
 104 static int sa1100_rtc_open(struct device *dev)
 105 {
 106         struct sa1100_rtc *info = dev_get_drvdata(dev);
 107         struct rtc_device *rtc = info->rtc;
 108         int ret;
 109
 110         ret = clk_prepare_enable(info->clk);
 111         if (ret)
 112                 goto fail_clk;
 113         ret = request_irq(info->irq_1hz, sa1100_rtc_interrupt, 0, "rtc 1Hz", dev);
 114         if (ret) {
 115                 dev_err(dev, "IRQ %d already in use.\n", info->irq_1hz);
 116                 goto fail_ui;
 117         }
 118         ret = request_irq(info->irq_alarm, sa1100_rtc_interrupt, 0, "rtc Alrm", dev);
 119         if (ret) {
 120                 dev_err(dev, "IRQ %d already in use.\n", info->irq_alarm);
 121                 goto fail_ai;
 122         }
 123         rtc->max_user_freq = RTC_FREQ;
 124         rtc_irq_set_freq(rtc, NULL, RTC_FREQ);
 125
 126         return 0;
 127
 128  fail_ai:
 129         free_irq(info->irq_1hz, dev);
 130  fail_ui:
 131         clk_disable_unprepare(info->clk);
 132  fail_clk:
 133         return ret;
 134 }
 135
 136 static void sa1100_rtc_release(struct device *dev)
 137 {
 138         struct sa1100_rtc *info = dev_get_drvdata(dev);
 139
 140         spin_lock_irq(&info->lock);
 141         RTSR = 0;
 142         spin_unlock_irq(&info->lock);
 143
 144         free_irq(info->irq_alarm, dev);
 145         free_irq(info->irq_1hz, dev);
 146         clk_disable_unprepare(info->clk);
 147 }
 148
 149 static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 150 {
 151         struct sa1100_rtc *info = dev_get_drvdata(dev);
 152
 153         spin_lock_irq(&info->lock);
 154         if (enabled)
 155                 RTSR |= RTSR_ALE;
 156         else
 157                 RTSR &= ~RTSR_ALE;
 158         spin_unlock_irq(&info->lock);
 159         return 0;
 160 }
 161
 162 static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
 163 {
 164         rtc_time_to_tm(RCNR, tm);
 165         return 0;
 166 }
 167
 168 static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
 169 {
 170         unsigned long time;
 171         int ret;
 172
 173         ret = rtc_tm_to_time(tm, &time);
 174         if (ret == 0)
 175                 RCNR = time;
 176         return ret;
 177 }
 178
 179 static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 180 {
 181         u32     rtsr;
 182
 183         rtsr = RTSR;
 184         alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
 185         alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
 186         return 0;
 187 }
 188
 189 static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 190 {
 191         struct sa1100_rtc *info = dev_get_drvdata(dev);
 192         unsigned long time;
 193         int ret;
 194
 195         spin_lock_irq(&info->lock);
 196         ret = rtc_tm_to_time(&alrm->time, &time);
 197         if (ret != 0)
 198                 goto out;
 199         RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
 200         RTAR = time;
 201         if (alrm->enabled)
 202                 RTSR |= RTSR_ALE;
 203         else
 204                 RTSR &= ~RTSR_ALE;
 205 out:
 206         spin_unlock_irq(&info->lock);
 207
 208         return ret;
 209 }
 210
 211 static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
 212 {
 213         seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR);
 214         seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);
 215
 216         return 0;
 217 }
 218
 219 static const struct rtc_class_ops sa1100_rtc_ops = {
 220         .open = sa1100_rtc_open,
 221         .release = sa1100_rtc_release,
 222         .read_time = sa1100_rtc_read_time,
 223         .set_time = sa1100_rtc_set_time,
 224         .read_alarm = sa1100_rtc_read_alarm,
 225         .set_alarm = sa1100_rtc_set_alarm,
 226         .proc = sa1100_rtc_proc,
 227         .alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
 228 };
 229
 230 static int sa1100_rtc_probe(struct platform_device *pdev)
 231 {
 232         struct rtc_device *rtc;
 233         struct sa1100_rtc *info;
 234         int irq_1hz, irq_alarm, ret = 0;
 235
 236         irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz");
 237         irq_alarm = platform_get_irq_byname(pdev, "rtc alarm");
 238         if (irq_1hz < 0 || irq_alarm < 0)
 239                 return -ENODEV;
 240
 241         info = kzalloc(sizeof(struct sa1100_rtc), GFP_KERNEL);
 242         if (!info)
 243                 return -ENOMEM;
 244         info->clk = clk_get(&pdev->dev, NULL);
 245         if (IS_ERR(info->clk)) {
 246                 dev_err(&pdev->dev, "failed to find rtc clock source\n");
 247                 ret = PTR_ERR(info->clk);
 248                 goto err_clk;
 249         }
 250         info->irq_1hz = irq_1hz;
 251         info->irq_alarm = irq_alarm;
 252         spin_lock_init(&info->lock);
 253         platform_set_drvdata(pdev, info);
 254
 255         /*
 256          * According to the manual we should be able to let RTTR be zero
 257          * and then a default diviser for a 32.768KHz clock is used.
 258          * Apparently this doesn't work, at least for my SA1110 rev 5.
 259          * If the clock divider is uninitialized then reset it to the
 260          * default value to get the 1Hz clock.
 261          */
 262         if (RTTR == 0) {
 263                 RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
 264                 dev_warn(&pdev->dev, "warning: "
 265                         "initializing default clock divider/trim value\n");
 266                 /* The current RTC value probably doesn't make sense either */
 267                 RCNR = 0;
 268         }
 269
 270         device_init_wakeup(&pdev->dev, 1);
 271
 272         rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
 273                 THIS_MODULE);
 274
 275         if (IS_ERR(rtc)) {
 276                 ret = PTR_ERR(rtc);
 277                 goto err_dev;
 278         }
 279         info->rtc = rtc;
 280
 281         /* Fix for a nasty initialization problem the in SA11xx RTSR register.
 282          * See also the comments in sa1100_rtc_interrupt().
 283          *
 284          * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
 285          * interrupt pending, even though interrupts were never enabled.
 286          * In this case, this bit it must be reset before enabling
 287          * interruptions to avoid a nonexistent interrupt to occur.
 288          *
 289          * In principle, the same problem would apply to bit 0, although it has
 290          * never been observed to happen.
 291          *
 292          * This issue is addressed both here and in sa1100_rtc_interrupt().
 293          * If the issue is not addressed here, in the times when the processor
 294          * wakes up with the bit set there will be one spurious interrupt.
 295          *
 296          * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
 297          * safe side, once the condition that lead to this strange
 298          * initialization is unknown and could in principle happen during
 299          * normal processing.
 300          *
 301          * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
 302          * the corresponding bits in RTSR. */
 303         RTSR = RTSR_AL | RTSR_HZ;
 304
 305         return 0;
 306 err_dev:
 307         platform_set_drvdata(pdev, NULL);
 308         clk_put(info->clk);
 309 err_clk:
 310         kfree(info);
 311         return ret;
 312 }
 313
 314 static int sa1100_rtc_remove(struct platform_device *pdev)
 315 {
 316         struct sa1100_rtc *info = platform_get_drvdata(pdev);
 317
 318         if (info) {
 319                 rtc_device_unregister(info->rtc);
 320                 clk_put(info->clk);
 321                 platform_set_drvdata(pdev, NULL);
 322                 kfree(info);
 323         }
 324
 325         return 0;
 326 }
 327
 328 #ifdef CONFIG_PM
 329 static int sa1100_rtc_suspend(struct device *dev)
 330 {
 331         struct sa1100_rtc *info = dev_get_drvdata(dev);
 332         if (device_may_wakeup(dev))
 333                 enable_irq_wake(info->irq_alarm);
 334         return 0;
 335 }
 336
 337 static int sa1100_rtc_resume(struct device *dev)
 338 {
 339         struct sa1100_rtc *info = dev_get_drvdata(dev);
 340         if (device_may_wakeup(dev))
 341                 disable_irq_wake(info->irq_alarm);
 342         return 0;
 343 }
 344
 345 static const struct dev_pm_ops sa1100_rtc_pm_ops = {
 346         .suspend        = sa1100_rtc_suspend,
 347         .resume         = sa1100_rtc_resume,
 348 };
 349 #endif
 350
 351 static struct of_device_id sa1100_rtc_dt_ids[] = {
 352         { .compatible = "mrvl,sa1100-rtc", },
 353         { .compatible = "mrvl,mmp-rtc", },
 354         {}
 355 };
 356 MODULE_DEVICE_TABLE(of, sa1100_rtc_dt_ids);
 357
 358 static struct platform_driver sa1100_rtc_driver = {
 359         .probe          = sa1100_rtc_probe,
 360         .remove         = sa1100_rtc_remove,
 361         .driver         = {
 362                 .name   = "sa1100-rtc",
 363 #ifdef CONFIG_PM
 364                 .pm     = &sa1100_rtc_pm_ops,
 365 #endif
 366                 .of_match_table = sa1100_rtc_dt_ids,
 367         },
 368 };
 369
 370 module_platform_driver(sa1100_rtc_driver);
 371
 372 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
 373 MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
 374 MODULE_LICENSE("GPL");
 375 MODULE_ALIAS("platform:sa1100-rtc");