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[S390] cio: Extend adapter interrupt interface.
[mirror_ubuntu-bionic-kernel.git] / drivers / s390 / cio / qdio.c
1 /*
2 *
3 * linux/drivers/s390/cio/qdio.c
4 *
5 * Linux for S/390 QDIO base support, Hipersocket base support
6 * version 2
7 *
8 * Copyright 2000,2002 IBM Corporation
9 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
10 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
11 *
12 * Restriction: only 63 iqdio subchannels would have its own indicator,
13 * after that, subsequent subchannels share one indicator
14 *
15 *
16 *
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2, or (at your option)
21 * any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 */
32
33 #include <linux/module.h>
34 #include <linux/init.h>
35
36 #include <linux/slab.h>
37 #include <linux/kernel.h>
38 #include <linux/proc_fs.h>
39 #include <linux/timer.h>
40 #include <linux/mempool.h>
41
42 #include <asm/ccwdev.h>
43 #include <asm/io.h>
44 #include <asm/atomic.h>
45 #include <asm/semaphore.h>
46 #include <asm/timex.h>
47
48 #include <asm/debug.h>
49 #include <asm/s390_rdev.h>
50 #include <asm/qdio.h>
51 #include <asm/airq.h>
52
53 #include "cio.h"
54 #include "css.h"
55 #include "device.h"
56 #include "qdio.h"
57 #include "ioasm.h"
58 #include "chsc.h"
59
60 /****************** MODULE PARAMETER VARIABLES ********************/
61 MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>");
62 MODULE_DESCRIPTION("QDIO base support version 2, " \
63 "Copyright 2000 IBM Corporation");
64 MODULE_LICENSE("GPL");
65
66 /******************** HERE WE GO ***********************************/
67
68 static const char version[] = "QDIO base support version 2";
69
70 static int qdio_performance_stats = 0;
71 static int proc_perf_file_registration;
72 static struct qdio_perf_stats perf_stats;
73
74 static int hydra_thinints;
75 static int is_passthrough = 0;
76 static int omit_svs;
77
78 static int indicator_used[INDICATORS_PER_CACHELINE];
79 static __u32 * volatile indicators;
80 static __u32 volatile spare_indicator;
81 static atomic_t spare_indicator_usecount;
82 #define QDIO_MEMPOOL_SCSSC_ELEMENTS 2
83 static mempool_t *qdio_mempool_scssc;
84 static struct kmem_cache *qdio_q_cache;
85
86 static debug_info_t *qdio_dbf_setup;
87 static debug_info_t *qdio_dbf_sbal;
88 static debug_info_t *qdio_dbf_trace;
89 static debug_info_t *qdio_dbf_sense;
90 #ifdef CONFIG_QDIO_DEBUG
91 static debug_info_t *qdio_dbf_slsb_out;
92 static debug_info_t *qdio_dbf_slsb_in;
93 #endif /* CONFIG_QDIO_DEBUG */
94
95 /* iQDIO stuff: */
96 static volatile struct qdio_q *tiq_list=NULL; /* volatile as it could change
97 during a while loop */
98 static DEFINE_SPINLOCK(ttiq_list_lock);
99 static void *tiqdio_ind;
100 static void tiqdio_tl(unsigned long);
101 static DECLARE_TASKLET(tiqdio_tasklet,tiqdio_tl,0);
102
103 /* not a macro, as one of the arguments is atomic_read */
104 static inline int
105 qdio_min(int a,int b)
106 {
107 if (a<b)
108 return a;
109 else
110 return b;
111 }
112
113 /***************** SCRUBBER HELPER ROUTINES **********************/
114 #ifdef CONFIG_64BIT
115 static inline void qdio_perf_stat_inc(atomic64_t *count)
116 {
117 if (qdio_performance_stats)
118 atomic64_inc(count);
119 }
120
121 static inline void qdio_perf_stat_dec(atomic64_t *count)
122 {
123 if (qdio_performance_stats)
124 atomic64_dec(count);
125 }
126 #else /* CONFIG_64BIT */
127 static inline void qdio_perf_stat_inc(atomic_t *count)
128 {
129 if (qdio_performance_stats)
130 atomic_inc(count);
131 }
132
133 static inline void qdio_perf_stat_dec(atomic_t *count)
134 {
135 if (qdio_performance_stats)
136 atomic_dec(count);
137 }
138 #endif /* CONFIG_64BIT */
139
140 static inline __u64
141 qdio_get_micros(void)
142 {
143 return (get_clock() >> 12); /* time>>12 is microseconds */
144 }
145
146 /*
147 * unfortunately, we can't just xchg the values; in do_QDIO we want to reserve
148 * the q in any case, so that we'll not be interrupted when we are in
149 * qdio_mark_tiq... shouldn't have a really bad impact, as reserving almost
150 * ever works (last famous words)
151 */
152 static inline int
153 qdio_reserve_q(struct qdio_q *q)
154 {
155 return atomic_add_return(1,&q->use_count) - 1;
156 }
157
158 static inline void
159 qdio_release_q(struct qdio_q *q)
160 {
161 atomic_dec(&q->use_count);
162 }
163
164 /*check ccq */
165 static int
166 qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
167 {
168 char dbf_text[15];
169
170 if (ccq == 0 || ccq == 32)
171 return 0;
172 if (ccq == 96 || ccq == 97)
173 return 1;
174 /*notify devices immediately*/
175 sprintf(dbf_text,"%d", ccq);
176 QDIO_DBF_TEXT2(1,trace,dbf_text);
177 return -EIO;
178 }
179 /* EQBS: extract buffer states */
180 static int
181 qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
182 unsigned int *start, unsigned int *cnt)
183 {
184 struct qdio_irq *irq;
185 unsigned int tmp_cnt, q_no, ccq;
186 int rc ;
187 char dbf_text[15];
188
189 ccq = 0;
190 tmp_cnt = *cnt;
191 irq = (struct qdio_irq*)q->irq_ptr;
192 q_no = q->q_no;
193 if(!q->is_input_q)
194 q_no += irq->no_input_qs;
195 again:
196 ccq = do_eqbs(irq->sch_token, state, q_no, start, cnt);
197 rc = qdio_check_ccq(q, ccq);
198 if ((ccq == 96) && (tmp_cnt != *cnt))
199 rc = 0;
200 if (rc == 1) {
201 QDIO_DBF_TEXT5(1,trace,"eqAGAIN");
202 goto again;
203 }
204 if (rc < 0) {
205 QDIO_DBF_TEXT2(1,trace,"eqberr");
206 sprintf(dbf_text,"%2x,%2x,%d,%d",tmp_cnt, *cnt, ccq, q_no);
207 QDIO_DBF_TEXT2(1,trace,dbf_text);
208 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
209 QDIO_STATUS_LOOK_FOR_ERROR,
210 0, 0, 0, -1, -1, q->int_parm);
211 return 0;
212 }
213 return (tmp_cnt - *cnt);
214 }
215
216 /* SQBS: set buffer states */
217 static int
218 qdio_do_sqbs(struct qdio_q *q, unsigned char state,
219 unsigned int *start, unsigned int *cnt)
220 {
221 struct qdio_irq *irq;
222 unsigned int tmp_cnt, q_no, ccq;
223 int rc;
224 char dbf_text[15];
225
226 ccq = 0;
227 tmp_cnt = *cnt;
228 irq = (struct qdio_irq*)q->irq_ptr;
229 q_no = q->q_no;
230 if(!q->is_input_q)
231 q_no += irq->no_input_qs;
232 again:
233 ccq = do_sqbs(irq->sch_token, state, q_no, start, cnt);
234 rc = qdio_check_ccq(q, ccq);
235 if (rc == 1) {
236 QDIO_DBF_TEXT5(1,trace,"sqAGAIN");
237 goto again;
238 }
239 if (rc < 0) {
240 QDIO_DBF_TEXT3(1,trace,"sqberr");
241 sprintf(dbf_text,"%2x,%2x",tmp_cnt,*cnt);
242 QDIO_DBF_TEXT3(1,trace,dbf_text);
243 sprintf(dbf_text,"%d,%d",ccq,q_no);
244 QDIO_DBF_TEXT3(1,trace,dbf_text);
245 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
246 QDIO_STATUS_LOOK_FOR_ERROR,
247 0, 0, 0, -1, -1, q->int_parm);
248 return 0;
249 }
250 return (tmp_cnt - *cnt);
251 }
252
253 static inline int
254 qdio_set_slsb(struct qdio_q *q, unsigned int *bufno,
255 unsigned char state, unsigned int *count)
256 {
257 volatile char *slsb;
258 struct qdio_irq *irq;
259
260 irq = (struct qdio_irq*)q->irq_ptr;
261 if (!irq->is_qebsm) {
262 slsb = (char *)&q->slsb.acc.val[(*bufno)];
263 xchg(slsb, state);
264 return 1;
265 }
266 return qdio_do_sqbs(q, state, bufno, count);
267 }
268
269 #ifdef CONFIG_QDIO_DEBUG
270 static inline void
271 qdio_trace_slsb(struct qdio_q *q)
272 {
273 if (q->queue_type==QDIO_TRACE_QTYPE) {
274 if (q->is_input_q)
275 QDIO_DBF_HEX2(0,slsb_in,&q->slsb,
276 QDIO_MAX_BUFFERS_PER_Q);
277 else
278 QDIO_DBF_HEX2(0,slsb_out,&q->slsb,
279 QDIO_MAX_BUFFERS_PER_Q);
280 }
281 }
282 #endif
283
284 static inline int
285 set_slsb(struct qdio_q *q, unsigned int *bufno,
286 unsigned char state, unsigned int *count)
287 {
288 int rc;
289 #ifdef CONFIG_QDIO_DEBUG
290 qdio_trace_slsb(q);
291 #endif
292 rc = qdio_set_slsb(q, bufno, state, count);
293 #ifdef CONFIG_QDIO_DEBUG
294 qdio_trace_slsb(q);
295 #endif
296 return rc;
297 }
298 static inline int
299 qdio_siga_sync(struct qdio_q *q, unsigned int gpr2,
300 unsigned int gpr3)
301 {
302 int cc;
303
304 QDIO_DBF_TEXT4(0,trace,"sigasync");
305 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
306
307 qdio_perf_stat_inc(&perf_stats.siga_syncs);
308
309 cc = do_siga_sync(q->schid, gpr2, gpr3);
310 if (cc)
311 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
312
313 return cc;
314 }
315
316 static inline int
317 qdio_siga_sync_q(struct qdio_q *q)
318 {
319 if (q->is_input_q)
320 return qdio_siga_sync(q, 0, q->mask);
321 return qdio_siga_sync(q, q->mask, 0);
322 }
323
324 static int
325 __do_siga_output(struct qdio_q *q, unsigned int *busy_bit)
326 {
327 struct qdio_irq *irq;
328 unsigned int fc = 0;
329 unsigned long schid;
330
331 irq = (struct qdio_irq *) q->irq_ptr;
332 if (!irq->is_qebsm)
333 schid = *((u32 *)&q->schid);
334 else {
335 schid = irq->sch_token;
336 fc |= 0x80;
337 }
338 return do_siga_output(schid, q->mask, busy_bit, fc);
339 }
340
341 /*
342 * returns QDIO_SIGA_ERROR_ACCESS_EXCEPTION as cc, when SIGA returns
343 * an access exception
344 */
345 static int
346 qdio_siga_output(struct qdio_q *q)
347 {
348 int cc;
349 __u32 busy_bit;
350 __u64 start_time=0;
351
352 qdio_perf_stat_inc(&perf_stats.siga_outs);
353
354 QDIO_DBF_TEXT4(0,trace,"sigaout");
355 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
356
357 for (;;) {
358 cc = __do_siga_output(q, &busy_bit);
359 //QDIO_PRINT_ERR("cc=%x, busy=%x\n",cc,busy_bit);
360 if ((cc==2) && (busy_bit) && (q->is_iqdio_q)) {
361 if (!start_time)
362 start_time=NOW;
363 if ((NOW-start_time)>QDIO_BUSY_BIT_PATIENCE)
364 break;
365 } else
366 break;
367 }
368
369 if ((cc==2) && (busy_bit))
370 cc |= QDIO_SIGA_ERROR_B_BIT_SET;
371
372 if (cc)
373 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
374
375 return cc;
376 }
377
378 static int
379 qdio_siga_input(struct qdio_q *q)
380 {
381 int cc;
382
383 QDIO_DBF_TEXT4(0,trace,"sigain");
384 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
385
386 qdio_perf_stat_inc(&perf_stats.siga_ins);
387
388 cc = do_siga_input(q->schid, q->mask);
389
390 if (cc)
391 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
392
393 return cc;
394 }
395
396 /* locked by the locks in qdio_activate and qdio_cleanup */
397 static __u32 *
398 qdio_get_indicator(void)
399 {
400 int i;
401
402 for (i = 0; i < INDICATORS_PER_CACHELINE; i++)
403 if (!indicator_used[i]) {
404 indicator_used[i]=1;
405 return indicators+i;
406 }
407 atomic_inc(&spare_indicator_usecount);
408 return (__u32 * volatile) &spare_indicator;
409 }
410
411 /* locked by the locks in qdio_activate and qdio_cleanup */
412 static void
413 qdio_put_indicator(__u32 *addr)
414 {
415 int i;
416
417 if ( (addr) && (addr!=&spare_indicator) ) {
418 i=addr-indicators;
419 indicator_used[i]=0;
420 }
421 if (addr == &spare_indicator)
422 atomic_dec(&spare_indicator_usecount);
423 }
424
425 static inline void
426 tiqdio_clear_summary_bit(__u32 *location)
427 {
428 QDIO_DBF_TEXT5(0,trace,"clrsummb");
429 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
430
431 xchg(location,0);
432 }
433
434 static inline void
435 tiqdio_set_summary_bit(__u32 *location)
436 {
437 QDIO_DBF_TEXT5(0,trace,"setsummb");
438 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
439
440 xchg(location,-1);
441 }
442
443 static inline void
444 tiqdio_sched_tl(void)
445 {
446 tasklet_hi_schedule(&tiqdio_tasklet);
447 }
448
449 static void
450 qdio_mark_tiq(struct qdio_q *q)
451 {
452 unsigned long flags;
453
454 QDIO_DBF_TEXT4(0,trace,"mark iq");
455 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
456
457 spin_lock_irqsave(&ttiq_list_lock,flags);
458 if (unlikely(atomic_read(&q->is_in_shutdown)))
459 goto out_unlock;
460
461 if (!q->is_input_q)
462 goto out_unlock;
463
464 if ((q->list_prev) || (q->list_next))
465 goto out_unlock;
466
467 if (!tiq_list) {
468 tiq_list=q;
469 q->list_prev=q;
470 q->list_next=q;
471 } else {
472 q->list_next=tiq_list;
473 q->list_prev=tiq_list->list_prev;
474 tiq_list->list_prev->list_next=q;
475 tiq_list->list_prev=q;
476 }
477 spin_unlock_irqrestore(&ttiq_list_lock,flags);
478
479 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
480 tiqdio_sched_tl();
481 return;
482 out_unlock:
483 spin_unlock_irqrestore(&ttiq_list_lock,flags);
484 return;
485 }
486
487 static inline void
488 qdio_mark_q(struct qdio_q *q)
489 {
490 QDIO_DBF_TEXT4(0,trace,"mark q");
491 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
492
493 if (unlikely(atomic_read(&q->is_in_shutdown)))
494 return;
495
496 tasklet_schedule(&q->tasklet);
497 }
498
499 static int
500 qdio_stop_polling(struct qdio_q *q)
501 {
502 #ifdef QDIO_USE_PROCESSING_STATE
503 unsigned int tmp, gsf, count = 1;
504 unsigned char state = 0;
505 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
506
507 if (!atomic_xchg(&q->polling,0))
508 return 1;
509
510 QDIO_DBF_TEXT4(0,trace,"stoppoll");
511 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
512
513 /* show the card that we are not polling anymore */
514 if (!q->is_input_q)
515 return 1;
516
517 tmp = gsf = GET_SAVED_FRONTIER(q);
518 tmp = ((tmp + QDIO_MAX_BUFFERS_PER_Q-1) & (QDIO_MAX_BUFFERS_PER_Q-1) );
519 set_slsb(q, &tmp, SLSB_P_INPUT_NOT_INIT, &count);
520
521 /*
522 * we don't issue this SYNC_MEMORY, as we trust Rick T and
523 * moreover will not use the PROCESSING state under VM, so
524 * q->polling was 0 anyway
525 */
526 /*SYNC_MEMORY;*/
527 if (irq->is_qebsm) {
528 count = 1;
529 qdio_do_eqbs(q, &state, &gsf, &count);
530 } else
531 state = q->slsb.acc.val[gsf];
532 if (state != SLSB_P_INPUT_PRIMED)
533 return 1;
534 /*
535 * set our summary bit again, as otherwise there is a
536 * small window we can miss between resetting it and
537 * checking for PRIMED state
538 */
539 if (q->is_thinint_q)
540 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
541 return 0;
542
543 #else /* QDIO_USE_PROCESSING_STATE */
544 return 1;
545 #endif /* QDIO_USE_PROCESSING_STATE */
546 }
547
548 /*
549 * see the comment in do_QDIO and before qdio_reserve_q about the
550 * sophisticated locking outside of unmark_q, so that we don't need to
551 * disable the interrupts :-)
552 */
553 static void
554 qdio_unmark_q(struct qdio_q *q)
555 {
556 unsigned long flags;
557
558 QDIO_DBF_TEXT4(0,trace,"unmark q");
559 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
560
561 if ((!q->list_prev)||(!q->list_next))
562 return;
563
564 if ((q->is_thinint_q)&&(q->is_input_q)) {
565 /* iQDIO */
566 spin_lock_irqsave(&ttiq_list_lock,flags);
567 /* in case cleanup has done this already and simultanously
568 * qdio_unmark_q is called from the interrupt handler, we've
569 * got to check this in this specific case again */
570 if ((!q->list_prev)||(!q->list_next))
571 goto out;
572 if (q->list_next==q) {
573 /* q was the only interesting q */
574 tiq_list=NULL;
575 q->list_next=NULL;
576 q->list_prev=NULL;
577 } else {
578 q->list_next->list_prev=q->list_prev;
579 q->list_prev->list_next=q->list_next;
580 tiq_list=q->list_next;
581 q->list_next=NULL;
582 q->list_prev=NULL;
583 }
584 out:
585 spin_unlock_irqrestore(&ttiq_list_lock,flags);
586 }
587 }
588
589 static inline unsigned long
590 tiqdio_clear_global_summary(void)
591 {
592 unsigned long time;
593
594 QDIO_DBF_TEXT5(0,trace,"clrglobl");
595
596 time = do_clear_global_summary();
597
598 QDIO_DBF_HEX5(0,trace,&time,sizeof(unsigned long));
599
600 return time;
601 }
602
603
604 /************************* OUTBOUND ROUTINES *******************************/
605 static int
606 qdio_qebsm_get_outbound_buffer_frontier(struct qdio_q *q)
607 {
608 struct qdio_irq *irq;
609 unsigned char state;
610 unsigned int cnt, count, ftc;
611
612 irq = (struct qdio_irq *) q->irq_ptr;
613 if ((!q->is_iqdio_q) && (!q->hydra_gives_outbound_pcis))
614 SYNC_MEMORY;
615
616 ftc = q->first_to_check;
617 count = qdio_min(atomic_read(&q->number_of_buffers_used),
618 (QDIO_MAX_BUFFERS_PER_Q-1));
619 if (count == 0)
620 return q->first_to_check;
621 cnt = qdio_do_eqbs(q, &state, &ftc, &count);
622 if (cnt == 0)
623 return q->first_to_check;
624 switch (state) {
625 case SLSB_P_OUTPUT_ERROR:
626 QDIO_DBF_TEXT3(0,trace,"outperr");
627 atomic_sub(cnt , &q->number_of_buffers_used);
628 if (q->qdio_error)
629 q->error_status_flags |=
630 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
631 q->qdio_error = SLSB_P_OUTPUT_ERROR;
632 q->error_status_flags |= QDIO_STATUS_LOOK_FOR_ERROR;
633 q->first_to_check = ftc;
634 break;
635 case SLSB_P_OUTPUT_EMPTY:
636 QDIO_DBF_TEXT5(0,trace,"outpempt");
637 atomic_sub(cnt, &q->number_of_buffers_used);
638 q->first_to_check = ftc;
639 break;
640 case SLSB_CU_OUTPUT_PRIMED:
641 /* all buffers primed */
642 QDIO_DBF_TEXT5(0,trace,"outpprim");
643 break;
644 default:
645 break;
646 }
647 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
648 return q->first_to_check;
649 }
650
651 static int
652 qdio_qebsm_get_inbound_buffer_frontier(struct qdio_q *q)
653 {
654 struct qdio_irq *irq;
655 unsigned char state;
656 int tmp, ftc, count, cnt;
657 char dbf_text[15];
658
659
660 irq = (struct qdio_irq *) q->irq_ptr;
661 ftc = q->first_to_check;
662 count = qdio_min(atomic_read(&q->number_of_buffers_used),
663 (QDIO_MAX_BUFFERS_PER_Q-1));
664 if (count == 0)
665 return q->first_to_check;
666 cnt = qdio_do_eqbs(q, &state, &ftc, &count);
667 if (cnt == 0)
668 return q->first_to_check;
669 switch (state) {
670 case SLSB_P_INPUT_ERROR :
671 #ifdef CONFIG_QDIO_DEBUG
672 QDIO_DBF_TEXT3(1,trace,"inperr");
673 sprintf(dbf_text,"%2x,%2x",ftc,count);
674 QDIO_DBF_TEXT3(1,trace,dbf_text);
675 #endif /* CONFIG_QDIO_DEBUG */
676 if (q->qdio_error)
677 q->error_status_flags |=
678 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
679 q->qdio_error = SLSB_P_INPUT_ERROR;
680 q->error_status_flags |= QDIO_STATUS_LOOK_FOR_ERROR;
681 atomic_sub(cnt, &q->number_of_buffers_used);
682 q->first_to_check = ftc;
683 break;
684 case SLSB_P_INPUT_PRIMED :
685 QDIO_DBF_TEXT3(0,trace,"inptprim");
686 sprintf(dbf_text,"%2x,%2x",ftc,count);
687 QDIO_DBF_TEXT3(1,trace,dbf_text);
688 tmp = 0;
689 ftc = q->first_to_check;
690 #ifdef QDIO_USE_PROCESSING_STATE
691 if (cnt > 1) {
692 cnt -= 1;
693 tmp = set_slsb(q, &ftc, SLSB_P_INPUT_NOT_INIT, &cnt);
694 if (!tmp)
695 break;
696 }
697 cnt = 1;
698 tmp += set_slsb(q, &ftc,
699 SLSB_P_INPUT_PROCESSING, &cnt);
700 atomic_set(&q->polling, 1);
701 #else
702 tmp = set_slsb(q, &ftc, SLSB_P_INPUT_NOT_INIT, &cnt);
703 #endif
704 atomic_sub(tmp, &q->number_of_buffers_used);
705 q->first_to_check = ftc;
706 break;
707 case SLSB_CU_INPUT_EMPTY:
708 case SLSB_P_INPUT_NOT_INIT:
709 case SLSB_P_INPUT_PROCESSING:
710 QDIO_DBF_TEXT5(0,trace,"inpnipro");
711 break;
712 default:
713 break;
714 }
715 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
716 return q->first_to_check;
717 }
718
719 static int
720 qdio_get_outbound_buffer_frontier(struct qdio_q *q)
721 {
722 struct qdio_irq *irq;
723 volatile char *slsb;
724 unsigned int count = 1;
725 int first_not_to_check, f, f_mod_no;
726 char dbf_text[15];
727
728 QDIO_DBF_TEXT4(0,trace,"getobfro");
729 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
730
731 irq = (struct qdio_irq *) q->irq_ptr;
732 if (irq->is_qebsm)
733 return qdio_qebsm_get_outbound_buffer_frontier(q);
734
735 slsb=&q->slsb.acc.val[0];
736 f_mod_no=f=q->first_to_check;
737 /*
738 * f points to already processed elements, so f+no_used is correct...
739 * ... but: we don't check 128 buffers, as otherwise
740 * qdio_has_outbound_q_moved would return 0
741 */
742 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
743 (QDIO_MAX_BUFFERS_PER_Q-1));
744
745 if (((!q->is_iqdio_q) && (!q->hydra_gives_outbound_pcis)) ||
746 (q->queue_type == QDIO_IQDIO_QFMT_ASYNCH))
747 SYNC_MEMORY;
748
749 check_next:
750 if (f==first_not_to_check)
751 goto out;
752
753 switch(slsb[f_mod_no]) {
754
755 /* the adapter has not fetched the output yet */
756 case SLSB_CU_OUTPUT_PRIMED:
757 QDIO_DBF_TEXT5(0,trace,"outpprim");
758 break;
759
760 /* the adapter got it */
761 case SLSB_P_OUTPUT_EMPTY:
762 atomic_dec(&q->number_of_buffers_used);
763 f++;
764 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
765 QDIO_DBF_TEXT5(0,trace,"outpempt");
766 goto check_next;
767
768 case SLSB_P_OUTPUT_ERROR:
769 QDIO_DBF_TEXT3(0,trace,"outperr");
770 sprintf(dbf_text,"%x-%x-%x",f_mod_no,
771 q->sbal[f_mod_no]->element[14].sbalf.value,
772 q->sbal[f_mod_no]->element[15].sbalf.value);
773 QDIO_DBF_TEXT3(1,trace,dbf_text);
774 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
775
776 /* kind of process the buffer */
777 set_slsb(q, &f_mod_no, SLSB_P_OUTPUT_NOT_INIT, &count);
778
779 /*
780 * we increment the frontier, as this buffer
781 * was processed obviously
782 */
783 atomic_dec(&q->number_of_buffers_used);
784 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
785
786 if (q->qdio_error)
787 q->error_status_flags|=
788 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
789 q->qdio_error=SLSB_P_OUTPUT_ERROR;
790 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
791
792 break;
793
794 /* no new buffers */
795 default:
796 QDIO_DBF_TEXT5(0,trace,"outpni");
797 }
798 out:
799 return (q->first_to_check=f_mod_no);
800 }
801
802 /* all buffers are processed */
803 static int
804 qdio_is_outbound_q_done(struct qdio_q *q)
805 {
806 int no_used;
807 #ifdef CONFIG_QDIO_DEBUG
808 char dbf_text[15];
809 #endif
810
811 no_used=atomic_read(&q->number_of_buffers_used);
812
813 #ifdef CONFIG_QDIO_DEBUG
814 if (no_used) {
815 sprintf(dbf_text,"oqisnt%02x",no_used);
816 QDIO_DBF_TEXT4(0,trace,dbf_text);
817 } else {
818 QDIO_DBF_TEXT4(0,trace,"oqisdone");
819 }
820 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
821 #endif /* CONFIG_QDIO_DEBUG */
822 return (no_used==0);
823 }
824
825 static int
826 qdio_has_outbound_q_moved(struct qdio_q *q)
827 {
828 int i;
829
830 i=qdio_get_outbound_buffer_frontier(q);
831
832 if ( (i!=GET_SAVED_FRONTIER(q)) ||
833 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
834 SAVE_FRONTIER(q,i);
835 QDIO_DBF_TEXT4(0,trace,"oqhasmvd");
836 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
837 return 1;
838 } else {
839 QDIO_DBF_TEXT4(0,trace,"oqhsntmv");
840 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
841 return 0;
842 }
843 }
844
845 static void
846 qdio_kick_outbound_q(struct qdio_q *q)
847 {
848 int result;
849 #ifdef CONFIG_QDIO_DEBUG
850 char dbf_text[15];
851
852 QDIO_DBF_TEXT4(0,trace,"kickoutq");
853 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
854 #endif /* CONFIG_QDIO_DEBUG */
855
856 if (!q->siga_out)
857 return;
858
859 /* here's the story with cc=2 and busy bit set (thanks, Rick):
860 * VM's CP could present us cc=2 and busy bit set on SIGA-write
861 * during reconfiguration of their Guest LAN (only in HIPERS mode,
862 * QDIO mode is asynchronous -- cc=2 and busy bit there will take
863 * the queues down immediately; and not being under VM we have a
864 * problem on cc=2 and busy bit set right away).
865 *
866 * Therefore qdio_siga_output will try for a short time constantly,
867 * if such a condition occurs. If it doesn't change, it will
868 * increase the busy_siga_counter and save the timestamp, and
869 * schedule the queue for later processing (via mark_q, using the
870 * queue tasklet). __qdio_outbound_processing will check out the
871 * counter. If non-zero, it will call qdio_kick_outbound_q as often
872 * as the value of the counter. This will attempt further SIGA
873 * instructions. For each successful SIGA, the counter is
874 * decreased, for failing SIGAs the counter remains the same, after
875 * all.
876 * After some time of no movement, qdio_kick_outbound_q will
877 * finally fail and reflect corresponding error codes to call
878 * the upper layer module and have it take the queues down.
879 *
880 * Note that this is a change from the original HiperSockets design
881 * (saying cc=2 and busy bit means take the queues down), but in
882 * these days Guest LAN didn't exist... excessive cc=2 with busy bit
883 * conditions will still take the queues down, but the threshold is
884 * higher due to the Guest LAN environment.
885 */
886
887
888 result=qdio_siga_output(q);
889
890 switch (result) {
891 case 0:
892 /* went smooth this time, reset timestamp */
893 #ifdef CONFIG_QDIO_DEBUG
894 QDIO_DBF_TEXT3(0,trace,"cc2reslv");
895 sprintf(dbf_text,"%4x%2x%2x",q->schid.sch_no,q->q_no,
896 atomic_read(&q->busy_siga_counter));
897 QDIO_DBF_TEXT3(0,trace,dbf_text);
898 #endif /* CONFIG_QDIO_DEBUG */
899 q->timing.busy_start=0;
900 break;
901 case (2|QDIO_SIGA_ERROR_B_BIT_SET):
902 /* cc=2 and busy bit: */
903 atomic_inc(&q->busy_siga_counter);
904
905 /* if the last siga was successful, save
906 * timestamp here */
907 if (!q->timing.busy_start)
908 q->timing.busy_start=NOW;
909
910 /* if we're in time, don't touch error_status_flags
911 * and siga_error */
912 if (NOW-q->timing.busy_start<QDIO_BUSY_BIT_GIVE_UP) {
913 qdio_mark_q(q);
914 break;
915 }
916 QDIO_DBF_TEXT2(0,trace,"cc2REPRT");
917 #ifdef CONFIG_QDIO_DEBUG
918 sprintf(dbf_text,"%4x%2x%2x",q->schid.sch_no,q->q_no,
919 atomic_read(&q->busy_siga_counter));
920 QDIO_DBF_TEXT3(0,trace,dbf_text);
921 #endif /* CONFIG_QDIO_DEBUG */
922 /* else fallthrough and report error */
923 default:
924 /* for plain cc=1, 2 or 3: */
925 if (q->siga_error)
926 q->error_status_flags|=
927 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
928 q->error_status_flags|=
929 QDIO_STATUS_LOOK_FOR_ERROR;
930 q->siga_error=result;
931 }
932 }
933
934 static void
935 qdio_kick_outbound_handler(struct qdio_q *q)
936 {
937 int start, end, real_end, count;
938 #ifdef CONFIG_QDIO_DEBUG
939 char dbf_text[15];
940 #endif
941
942 start = q->first_element_to_kick;
943 /* last_move_ftc was just updated */
944 real_end = GET_SAVED_FRONTIER(q);
945 end = (real_end+QDIO_MAX_BUFFERS_PER_Q-1)&
946 (QDIO_MAX_BUFFERS_PER_Q-1);
947 count = (end+QDIO_MAX_BUFFERS_PER_Q+1-start)&
948 (QDIO_MAX_BUFFERS_PER_Q-1);
949
950 #ifdef CONFIG_QDIO_DEBUG
951 QDIO_DBF_TEXT4(0,trace,"kickouth");
952 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
953
954 sprintf(dbf_text,"s=%2xc=%2x",start,count);
955 QDIO_DBF_TEXT4(0,trace,dbf_text);
956 #endif /* CONFIG_QDIO_DEBUG */
957
958 if (q->state==QDIO_IRQ_STATE_ACTIVE)
959 q->handler(q->cdev,QDIO_STATUS_OUTBOUND_INT|
960 q->error_status_flags,
961 q->qdio_error,q->siga_error,q->q_no,start,count,
962 q->int_parm);
963
964 /* for the next time: */
965 q->first_element_to_kick=real_end;
966 q->qdio_error=0;
967 q->siga_error=0;
968 q->error_status_flags=0;
969 }
970
971 static void
972 __qdio_outbound_processing(struct qdio_q *q)
973 {
974 int siga_attempts;
975
976 QDIO_DBF_TEXT4(0,trace,"qoutproc");
977 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
978
979 if (unlikely(qdio_reserve_q(q))) {
980 qdio_release_q(q);
981 qdio_perf_stat_inc(&perf_stats.outbound_tl_runs_resched);
982 /* as we're sissies, we'll check next time */
983 if (likely(!atomic_read(&q->is_in_shutdown))) {
984 qdio_mark_q(q);
985 QDIO_DBF_TEXT4(0,trace,"busy,agn");
986 }
987 return;
988 }
989 qdio_perf_stat_inc(&perf_stats.outbound_tl_runs);
990 qdio_perf_stat_inc(&perf_stats.tl_runs);
991
992 /* see comment in qdio_kick_outbound_q */
993 siga_attempts=atomic_read(&q->busy_siga_counter);
994 while (siga_attempts) {
995 atomic_dec(&q->busy_siga_counter);
996 qdio_kick_outbound_q(q);
997 siga_attempts--;
998 }
999
1000 if (qdio_has_outbound_q_moved(q))
1001 qdio_kick_outbound_handler(q);
1002
1003 if (q->queue_type == QDIO_ZFCP_QFMT) {
1004 if ((!q->hydra_gives_outbound_pcis) &&
1005 (!qdio_is_outbound_q_done(q)))
1006 qdio_mark_q(q);
1007 }
1008 else if (((!q->is_iqdio_q) && (!q->is_pci_out)) ||
1009 (q->queue_type == QDIO_IQDIO_QFMT_ASYNCH)) {
1010 /*
1011 * make sure buffer switch from PRIMED to EMPTY is noticed
1012 * and outbound_handler is called
1013 */
1014 if (qdio_is_outbound_q_done(q)) {
1015 del_timer(&q->timer);
1016 } else {
1017 if (!timer_pending(&q->timer))
1018 mod_timer(&q->timer, jiffies +
1019 QDIO_FORCE_CHECK_TIMEOUT);
1020 }
1021 }
1022
1023 qdio_release_q(q);
1024 }
1025
1026 static void
1027 qdio_outbound_processing(unsigned long q)
1028 {
1029 __qdio_outbound_processing((struct qdio_q *) q);
1030 }
1031
1032 /************************* INBOUND ROUTINES *******************************/
1033
1034
1035 static int
1036 qdio_get_inbound_buffer_frontier(struct qdio_q *q)
1037 {
1038 struct qdio_irq *irq;
1039 int f,f_mod_no;
1040 volatile char *slsb;
1041 unsigned int count = 1;
1042 int first_not_to_check;
1043 #ifdef CONFIG_QDIO_DEBUG
1044 char dbf_text[15];
1045 #endif /* CONFIG_QDIO_DEBUG */
1046 #ifdef QDIO_USE_PROCESSING_STATE
1047 int last_position=-1;
1048 #endif /* QDIO_USE_PROCESSING_STATE */
1049
1050 QDIO_DBF_TEXT4(0,trace,"getibfro");
1051 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1052
1053 irq = (struct qdio_irq *) q->irq_ptr;
1054 if (irq->is_qebsm)
1055 return qdio_qebsm_get_inbound_buffer_frontier(q);
1056
1057 slsb=&q->slsb.acc.val[0];
1058 f_mod_no=f=q->first_to_check;
1059 /*
1060 * we don't check 128 buffers, as otherwise qdio_has_inbound_q_moved
1061 * would return 0
1062 */
1063 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
1064 (QDIO_MAX_BUFFERS_PER_Q-1));
1065
1066 /*
1067 * we don't use this one, as a PCI or we after a thin interrupt
1068 * will sync the queues
1069 */
1070 /* SYNC_MEMORY;*/
1071
1072 check_next:
1073 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
1074 if (f==first_not_to_check)
1075 goto out;
1076 switch (slsb[f_mod_no]) {
1077
1078 /* CU_EMPTY means frontier is reached */
1079 case SLSB_CU_INPUT_EMPTY:
1080 QDIO_DBF_TEXT5(0,trace,"inptempt");
1081 break;
1082
1083 /* P_PRIMED means set slsb to P_PROCESSING and move on */
1084 case SLSB_P_INPUT_PRIMED:
1085 QDIO_DBF_TEXT5(0,trace,"inptprim");
1086
1087 #ifdef QDIO_USE_PROCESSING_STATE
1088 /*
1089 * as soon as running under VM, polling the input queues will
1090 * kill VM in terms of CP overhead
1091 */
1092 if (q->siga_sync) {
1093 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1094 } else {
1095 /* set the previous buffer to NOT_INIT. The current
1096 * buffer will be set to PROCESSING at the end of
1097 * this function to avoid further interrupts. */
1098 if (last_position>=0)
1099 set_slsb(q, &last_position,
1100 SLSB_P_INPUT_NOT_INIT, &count);
1101 atomic_set(&q->polling,1);
1102 last_position=f_mod_no;
1103 }
1104 #else /* QDIO_USE_PROCESSING_STATE */
1105 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1106 #endif /* QDIO_USE_PROCESSING_STATE */
1107 /*
1108 * not needed, as the inbound queue will be synced on the next
1109 * siga-r, resp. tiqdio_is_inbound_q_done will do the siga-s
1110 */
1111 /*SYNC_MEMORY;*/
1112 f++;
1113 atomic_dec(&q->number_of_buffers_used);
1114 goto check_next;
1115
1116 case SLSB_P_INPUT_NOT_INIT:
1117 case SLSB_P_INPUT_PROCESSING:
1118 QDIO_DBF_TEXT5(0,trace,"inpnipro");
1119 break;
1120
1121 /* P_ERROR means frontier is reached, break and report error */
1122 case SLSB_P_INPUT_ERROR:
1123 #ifdef CONFIG_QDIO_DEBUG
1124 sprintf(dbf_text,"inperr%2x",f_mod_no);
1125 QDIO_DBF_TEXT3(1,trace,dbf_text);
1126 #endif /* CONFIG_QDIO_DEBUG */
1127 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
1128
1129 /* kind of process the buffer */
1130 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1131
1132 if (q->qdio_error)
1133 q->error_status_flags|=
1134 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
1135 q->qdio_error=SLSB_P_INPUT_ERROR;
1136 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
1137
1138 /* we increment the frontier, as this buffer
1139 * was processed obviously */
1140 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1141 atomic_dec(&q->number_of_buffers_used);
1142
1143 #ifdef QDIO_USE_PROCESSING_STATE
1144 last_position=-1;
1145 #endif /* QDIO_USE_PROCESSING_STATE */
1146
1147 break;
1148
1149 /* everything else means frontier not changed (HALTED or so) */
1150 default:
1151 break;
1152 }
1153 out:
1154 q->first_to_check=f_mod_no;
1155
1156 #ifdef QDIO_USE_PROCESSING_STATE
1157 if (last_position>=0)
1158 set_slsb(q, &last_position, SLSB_P_INPUT_PROCESSING, &count);
1159 #endif /* QDIO_USE_PROCESSING_STATE */
1160
1161 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
1162
1163 return q->first_to_check;
1164 }
1165
1166 static int
1167 qdio_has_inbound_q_moved(struct qdio_q *q)
1168 {
1169 int i;
1170
1171 i=qdio_get_inbound_buffer_frontier(q);
1172 if ( (i!=GET_SAVED_FRONTIER(q)) ||
1173 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
1174 SAVE_FRONTIER(q,i);
1175 if ((!q->siga_sync)&&(!q->hydra_gives_outbound_pcis))
1176 SAVE_TIMESTAMP(q);
1177
1178 QDIO_DBF_TEXT4(0,trace,"inhasmvd");
1179 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1180 return 1;
1181 } else {
1182 QDIO_DBF_TEXT4(0,trace,"inhsntmv");
1183 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1184 return 0;
1185 }
1186 }
1187
1188 /* means, no more buffers to be filled */
1189 static int
1190 tiqdio_is_inbound_q_done(struct qdio_q *q)
1191 {
1192 int no_used;
1193 unsigned int start_buf, count;
1194 unsigned char state = 0;
1195 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1196
1197 #ifdef CONFIG_QDIO_DEBUG
1198 char dbf_text[15];
1199 #endif
1200
1201 no_used=atomic_read(&q->number_of_buffers_used);
1202
1203 /* propagate the change from 82 to 80 through VM */
1204 SYNC_MEMORY;
1205
1206 #ifdef CONFIG_QDIO_DEBUG
1207 if (no_used) {
1208 sprintf(dbf_text,"iqisnt%02x",no_used);
1209 QDIO_DBF_TEXT4(0,trace,dbf_text);
1210 } else {
1211 QDIO_DBF_TEXT4(0,trace,"iniqisdo");
1212 }
1213 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1214 #endif /* CONFIG_QDIO_DEBUG */
1215
1216 if (!no_used)
1217 return 1;
1218 if (!q->siga_sync && !irq->is_qebsm)
1219 /* we'll check for more primed buffers in qeth_stop_polling */
1220 return 0;
1221 if (irq->is_qebsm) {
1222 count = 1;
1223 start_buf = q->first_to_check;
1224 qdio_do_eqbs(q, &state, &start_buf, &count);
1225 } else
1226 state = q->slsb.acc.val[q->first_to_check];
1227 if (state != SLSB_P_INPUT_PRIMED)
1228 /*
1229 * nothing more to do, if next buffer is not PRIMED.
1230 * note that we did a SYNC_MEMORY before, that there
1231 * has been a sychnronization.
1232 * we will return 0 below, as there is nothing to do
1233 * (stop_polling not necessary, as we have not been
1234 * using the PROCESSING state
1235 */
1236 return 0;
1237
1238 /*
1239 * ok, the next input buffer is primed. that means, that device state
1240 * change indicator and adapter local summary are set, so we will find
1241 * it next time.
1242 * we will return 0 below, as there is nothing to do, except scheduling
1243 * ourselves for the next time.
1244 */
1245 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1246 tiqdio_sched_tl();
1247 return 0;
1248 }
1249
1250 static int
1251 qdio_is_inbound_q_done(struct qdio_q *q)
1252 {
1253 int no_used;
1254 unsigned int start_buf, count;
1255 unsigned char state = 0;
1256 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1257
1258 #ifdef CONFIG_QDIO_DEBUG
1259 char dbf_text[15];
1260 #endif
1261
1262 no_used=atomic_read(&q->number_of_buffers_used);
1263
1264 /*
1265 * we need that one for synchronization with the adapter, as it
1266 * does a kind of PCI avoidance
1267 */
1268 SYNC_MEMORY;
1269
1270 if (!no_used) {
1271 QDIO_DBF_TEXT4(0,trace,"inqisdnA");
1272 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1273 return 1;
1274 }
1275 if (irq->is_qebsm) {
1276 count = 1;
1277 start_buf = q->first_to_check;
1278 qdio_do_eqbs(q, &state, &start_buf, &count);
1279 } else
1280 state = q->slsb.acc.val[q->first_to_check];
1281 if (state == SLSB_P_INPUT_PRIMED) {
1282 /* we got something to do */
1283 QDIO_DBF_TEXT4(0,trace,"inqisntA");
1284 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1285 return 0;
1286 }
1287
1288 /* on VM, we don't poll, so the q is always done here */
1289 if (q->siga_sync)
1290 return 1;
1291 if (q->hydra_gives_outbound_pcis)
1292 return 1;
1293
1294 /*
1295 * at this point we know, that inbound first_to_check
1296 * has (probably) not moved (see qdio_inbound_processing)
1297 */
1298 if (NOW>GET_SAVED_TIMESTAMP(q)+q->timing.threshold) {
1299 #ifdef CONFIG_QDIO_DEBUG
1300 QDIO_DBF_TEXT4(0,trace,"inqisdon");
1301 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1302 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1303 QDIO_DBF_TEXT4(0,trace,dbf_text);
1304 #endif /* CONFIG_QDIO_DEBUG */
1305 return 1;
1306 } else {
1307 #ifdef CONFIG_QDIO_DEBUG
1308 QDIO_DBF_TEXT4(0,trace,"inqisntd");
1309 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1310 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1311 QDIO_DBF_TEXT4(0,trace,dbf_text);
1312 #endif /* CONFIG_QDIO_DEBUG */
1313 return 0;
1314 }
1315 }
1316
1317 static void
1318 qdio_kick_inbound_handler(struct qdio_q *q)
1319 {
1320 int count, start, end, real_end, i;
1321 #ifdef CONFIG_QDIO_DEBUG
1322 char dbf_text[15];
1323 #endif
1324
1325 QDIO_DBF_TEXT4(0,trace,"kickinh");
1326 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1327
1328 start=q->first_element_to_kick;
1329 real_end=q->first_to_check;
1330 end=(real_end+QDIO_MAX_BUFFERS_PER_Q-1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1331
1332 i=start;
1333 count=0;
1334 while (1) {
1335 count++;
1336 if (i==end)
1337 break;
1338 i=(i+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1339 }
1340
1341 #ifdef CONFIG_QDIO_DEBUG
1342 sprintf(dbf_text,"s=%2xc=%2x",start,count);
1343 QDIO_DBF_TEXT4(0,trace,dbf_text);
1344 #endif /* CONFIG_QDIO_DEBUG */
1345
1346 if (likely(q->state==QDIO_IRQ_STATE_ACTIVE))
1347 q->handler(q->cdev,
1348 QDIO_STATUS_INBOUND_INT|q->error_status_flags,
1349 q->qdio_error,q->siga_error,q->q_no,start,count,
1350 q->int_parm);
1351
1352 /* for the next time: */
1353 q->first_element_to_kick=real_end;
1354 q->qdio_error=0;
1355 q->siga_error=0;
1356 q->error_status_flags=0;
1357
1358 qdio_perf_stat_inc(&perf_stats.inbound_cnt);
1359 }
1360
1361 static void
1362 __tiqdio_inbound_processing(struct qdio_q *q, int spare_ind_was_set)
1363 {
1364 struct qdio_irq *irq_ptr;
1365 struct qdio_q *oq;
1366 int i;
1367
1368 QDIO_DBF_TEXT4(0,trace,"iqinproc");
1369 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1370
1371 /*
1372 * we first want to reserve the q, so that we know, that we don't
1373 * interrupt ourselves and call qdio_unmark_q, as is_in_shutdown might
1374 * be set
1375 */
1376 if (unlikely(qdio_reserve_q(q))) {
1377 qdio_release_q(q);
1378 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs_resched);
1379 /*
1380 * as we might just be about to stop polling, we make
1381 * sure that we check again at least once more
1382 */
1383 tiqdio_sched_tl();
1384 return;
1385 }
1386 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs);
1387 if (unlikely(atomic_read(&q->is_in_shutdown))) {
1388 qdio_unmark_q(q);
1389 goto out;
1390 }
1391
1392 /*
1393 * we reset spare_ind_was_set, when the queue does not use the
1394 * spare indicator
1395 */
1396 if (spare_ind_was_set)
1397 spare_ind_was_set = (q->dev_st_chg_ind == &spare_indicator);
1398
1399 if (!(*(q->dev_st_chg_ind)) && !spare_ind_was_set)
1400 goto out;
1401 /*
1402 * q->dev_st_chg_ind is the indicator, be it shared or not.
1403 * only clear it, if indicator is non-shared
1404 */
1405 if (!spare_ind_was_set)
1406 tiqdio_clear_summary_bit((__u32*)q->dev_st_chg_ind);
1407
1408 if (q->hydra_gives_outbound_pcis) {
1409 if (!q->siga_sync_done_on_thinints) {
1410 SYNC_MEMORY_ALL;
1411 } else if ((!q->siga_sync_done_on_outb_tis)&&
1412 (q->hydra_gives_outbound_pcis)) {
1413 SYNC_MEMORY_ALL_OUTB;
1414 }
1415 } else {
1416 SYNC_MEMORY;
1417 }
1418 /*
1419 * maybe we have to do work on our outbound queues... at least
1420 * we have to check the outbound-int-capable thinint-capable
1421 * queues
1422 */
1423 if (q->hydra_gives_outbound_pcis) {
1424 irq_ptr = (struct qdio_irq*)q->irq_ptr;
1425 for (i=0;i<irq_ptr->no_output_qs;i++) {
1426 oq = irq_ptr->output_qs[i];
1427 if (!qdio_is_outbound_q_done(oq)) {
1428 qdio_perf_stat_dec(&perf_stats.tl_runs);
1429 __qdio_outbound_processing(oq);
1430 }
1431 }
1432 }
1433
1434 if (!qdio_has_inbound_q_moved(q))
1435 goto out;
1436
1437 qdio_kick_inbound_handler(q);
1438 if (tiqdio_is_inbound_q_done(q))
1439 if (!qdio_stop_polling(q)) {
1440 /*
1441 * we set the flags to get into the stuff next time,
1442 * see also comment in qdio_stop_polling
1443 */
1444 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1445 tiqdio_sched_tl();
1446 }
1447 out:
1448 qdio_release_q(q);
1449 }
1450
1451 static void
1452 tiqdio_inbound_processing(unsigned long q)
1453 {
1454 __tiqdio_inbound_processing((struct qdio_q *) q,
1455 atomic_read(&spare_indicator_usecount));
1456 }
1457
1458 static void
1459 __qdio_inbound_processing(struct qdio_q *q)
1460 {
1461 int q_laps=0;
1462
1463 QDIO_DBF_TEXT4(0,trace,"qinproc");
1464 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1465
1466 if (unlikely(qdio_reserve_q(q))) {
1467 qdio_release_q(q);
1468 qdio_perf_stat_inc(&perf_stats.inbound_tl_runs_resched);
1469 /* as we're sissies, we'll check next time */
1470 if (likely(!atomic_read(&q->is_in_shutdown))) {
1471 qdio_mark_q(q);
1472 QDIO_DBF_TEXT4(0,trace,"busy,agn");
1473 }
1474 return;
1475 }
1476 qdio_perf_stat_inc(&perf_stats.inbound_tl_runs);
1477 qdio_perf_stat_inc(&perf_stats.tl_runs);
1478
1479 again:
1480 if (qdio_has_inbound_q_moved(q)) {
1481 qdio_kick_inbound_handler(q);
1482 if (!qdio_stop_polling(q)) {
1483 q_laps++;
1484 if (q_laps<QDIO_Q_LAPS)
1485 goto again;
1486 }
1487 qdio_mark_q(q);
1488 } else {
1489 if (!qdio_is_inbound_q_done(q))
1490 /* means poll time is not yet over */
1491 qdio_mark_q(q);
1492 }
1493
1494 qdio_release_q(q);
1495 }
1496
1497 static void
1498 qdio_inbound_processing(unsigned long q)
1499 {
1500 __qdio_inbound_processing((struct qdio_q *) q);
1501 }
1502
1503 /************************* MAIN ROUTINES *******************************/
1504
1505 #ifdef QDIO_USE_PROCESSING_STATE
1506 static int
1507 tiqdio_reset_processing_state(struct qdio_q *q, int q_laps)
1508 {
1509 if (!q) {
1510 tiqdio_sched_tl();
1511 return 0;
1512 }
1513
1514 /*
1515 * under VM, we have not used the PROCESSING state, so no
1516 * need to stop polling
1517 */
1518 if (q->siga_sync)
1519 return 2;
1520
1521 if (unlikely(qdio_reserve_q(q))) {
1522 qdio_release_q(q);
1523 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs_resched);
1524 /*
1525 * as we might just be about to stop polling, we make
1526 * sure that we check again at least once more
1527 */
1528
1529 /*
1530 * sanity -- we'd get here without setting the
1531 * dev st chg ind
1532 */
1533 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1534 tiqdio_sched_tl();
1535 return 0;
1536 }
1537 if (qdio_stop_polling(q)) {
1538 qdio_release_q(q);
1539 return 2;
1540 }
1541 if (q_laps<QDIO_Q_LAPS-1) {
1542 qdio_release_q(q);
1543 return 3;
1544 }
1545 /*
1546 * we set the flags to get into the stuff
1547 * next time, see also comment in qdio_stop_polling
1548 */
1549 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1550 tiqdio_sched_tl();
1551 qdio_release_q(q);
1552 return 1;
1553
1554 }
1555 #endif /* QDIO_USE_PROCESSING_STATE */
1556
1557 static void
1558 tiqdio_inbound_checks(void)
1559 {
1560 struct qdio_q *q;
1561 int spare_ind_was_set=0;
1562 #ifdef QDIO_USE_PROCESSING_STATE
1563 int q_laps=0;
1564 #endif /* QDIO_USE_PROCESSING_STATE */
1565
1566 QDIO_DBF_TEXT4(0,trace,"iqdinbck");
1567 QDIO_DBF_TEXT5(0,trace,"iqlocsum");
1568
1569 #ifdef QDIO_USE_PROCESSING_STATE
1570 again:
1571 #endif /* QDIO_USE_PROCESSING_STATE */
1572
1573 /* when the spare indicator is used and set, save that and clear it */
1574 if ((atomic_read(&spare_indicator_usecount)) && spare_indicator) {
1575 spare_ind_was_set = 1;
1576 tiqdio_clear_summary_bit((__u32*)&spare_indicator);
1577 }
1578
1579 q=(struct qdio_q*)tiq_list;
1580 do {
1581 if (!q)
1582 break;
1583 __tiqdio_inbound_processing(q, spare_ind_was_set);
1584 q=(struct qdio_q*)q->list_next;
1585 } while (q!=(struct qdio_q*)tiq_list);
1586
1587 #ifdef QDIO_USE_PROCESSING_STATE
1588 q=(struct qdio_q*)tiq_list;
1589 do {
1590 int ret;
1591
1592 ret = tiqdio_reset_processing_state(q, q_laps);
1593 switch (ret) {
1594 case 0:
1595 return;
1596 case 1:
1597 q_laps++;
1598 case 2:
1599 q = (struct qdio_q*)q->list_next;
1600 break;
1601 default:
1602 q_laps++;
1603 goto again;
1604 }
1605 } while (q!=(struct qdio_q*)tiq_list);
1606 #endif /* QDIO_USE_PROCESSING_STATE */
1607 }
1608
1609 static void
1610 tiqdio_tl(unsigned long data)
1611 {
1612 QDIO_DBF_TEXT4(0,trace,"iqdio_tl");
1613
1614 qdio_perf_stat_inc(&perf_stats.tl_runs);
1615
1616 tiqdio_inbound_checks();
1617 }
1618
1619 /********************* GENERAL HELPER_ROUTINES ***********************/
1620
1621 static void
1622 qdio_release_irq_memory(struct qdio_irq *irq_ptr)
1623 {
1624 int i;
1625 struct qdio_q *q;
1626
1627 for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
1628 q = irq_ptr->input_qs[i];
1629 if (q) {
1630 free_page((unsigned long) q->slib);
1631 kmem_cache_free(qdio_q_cache, q);
1632 }
1633 q = irq_ptr->output_qs[i];
1634 if (q) {
1635 free_page((unsigned long) q->slib);
1636 kmem_cache_free(qdio_q_cache, q);
1637 }
1638 }
1639 free_page((unsigned long) irq_ptr->qdr);
1640 free_page((unsigned long) irq_ptr);
1641 }
1642
1643 static void
1644 qdio_set_impl_params(struct qdio_irq *irq_ptr,
1645 unsigned int qib_param_field_format,
1646 /* pointer to 128 bytes or NULL, if no param field */
1647 unsigned char *qib_param_field,
1648 /* pointer to no_queues*128 words of data or NULL */
1649 unsigned int no_input_qs,
1650 unsigned int no_output_qs,
1651 unsigned long *input_slib_elements,
1652 unsigned long *output_slib_elements)
1653 {
1654 int i,j;
1655
1656 if (!irq_ptr)
1657 return;
1658
1659 irq_ptr->qib.pfmt=qib_param_field_format;
1660 if (qib_param_field)
1661 memcpy(irq_ptr->qib.parm,qib_param_field,
1662 QDIO_MAX_BUFFERS_PER_Q);
1663
1664 if (input_slib_elements)
1665 for (i=0;i<no_input_qs;i++) {
1666 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1667 irq_ptr->input_qs[i]->slib->slibe[j].parms=
1668 input_slib_elements[
1669 i*QDIO_MAX_BUFFERS_PER_Q+j];
1670 }
1671 if (output_slib_elements)
1672 for (i=0;i<no_output_qs;i++) {
1673 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1674 irq_ptr->output_qs[i]->slib->slibe[j].parms=
1675 output_slib_elements[
1676 i*QDIO_MAX_BUFFERS_PER_Q+j];
1677 }
1678 }
1679
1680 static int
1681 qdio_alloc_qs(struct qdio_irq *irq_ptr,
1682 int no_input_qs, int no_output_qs)
1683 {
1684 int i;
1685 struct qdio_q *q;
1686
1687 for (i = 0; i < no_input_qs; i++) {
1688 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
1689 if (!q)
1690 return -ENOMEM;
1691 memset(q, 0, sizeof(*q));
1692
1693 q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
1694 if (!q->slib) {
1695 kmem_cache_free(qdio_q_cache, q);
1696 return -ENOMEM;
1697 }
1698 irq_ptr->input_qs[i]=q;
1699 }
1700
1701 for (i = 0; i < no_output_qs; i++) {
1702 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
1703 if (!q)
1704 return -ENOMEM;
1705 memset(q, 0, sizeof(*q));
1706
1707 q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
1708 if (!q->slib) {
1709 kmem_cache_free(qdio_q_cache, q);
1710 return -ENOMEM;
1711 }
1712 irq_ptr->output_qs[i]=q;
1713 }
1714 return 0;
1715 }
1716
1717 static void
1718 qdio_fill_qs(struct qdio_irq *irq_ptr, struct ccw_device *cdev,
1719 int no_input_qs, int no_output_qs,
1720 qdio_handler_t *input_handler,
1721 qdio_handler_t *output_handler,
1722 unsigned long int_parm,int q_format,
1723 unsigned long flags,
1724 void **inbound_sbals_array,
1725 void **outbound_sbals_array)
1726 {
1727 struct qdio_q *q;
1728 int i,j;
1729 char dbf_text[20]; /* see qdio_initialize */
1730 void *ptr;
1731 int available;
1732
1733 sprintf(dbf_text,"qfqs%4x",cdev->private->schid.sch_no);
1734 QDIO_DBF_TEXT0(0,setup,dbf_text);
1735 for (i=0;i<no_input_qs;i++) {
1736 q=irq_ptr->input_qs[i];
1737
1738 memset(q,0,((char*)&q->slib)-((char*)q));
1739 sprintf(dbf_text,"in-q%4x",i);
1740 QDIO_DBF_TEXT0(0,setup,dbf_text);
1741 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1742
1743 memset(q->slib,0,PAGE_SIZE);
1744 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1745
1746 available=0;
1747
1748 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1749 q->sbal[j]=*(inbound_sbals_array++);
1750
1751 q->queue_type=q_format;
1752 q->int_parm=int_parm;
1753 q->schid = irq_ptr->schid;
1754 q->irq_ptr = irq_ptr;
1755 q->cdev = cdev;
1756 q->mask=1<<(31-i);
1757 q->q_no=i;
1758 q->is_input_q=1;
1759 q->first_to_check=0;
1760 q->last_move_ftc=0;
1761 q->handler=input_handler;
1762 q->dev_st_chg_ind=irq_ptr->dev_st_chg_ind;
1763
1764 /* q->is_thinint_q isn't valid at this time, but
1765 * irq_ptr->is_thinint_irq is
1766 */
1767 if (irq_ptr->is_thinint_irq)
1768 tasklet_init(&q->tasklet, tiqdio_inbound_processing,
1769 (unsigned long) q);
1770 else
1771 tasklet_init(&q->tasklet, qdio_inbound_processing,
1772 (unsigned long) q);
1773
1774 /* actually this is not used for inbound queues. yet. */
1775 atomic_set(&q->busy_siga_counter,0);
1776 q->timing.busy_start=0;
1777
1778 /* for (j=0;j<QDIO_STATS_NUMBER;j++)
1779 q->timing.last_transfer_times[j]=(qdio_get_micros()/
1780 QDIO_STATS_NUMBER)*j;
1781 q->timing.last_transfer_index=QDIO_STATS_NUMBER-1;
1782 */
1783
1784 /* fill in slib */
1785 if (i>0) irq_ptr->input_qs[i-1]->slib->nsliba=
1786 (unsigned long)(q->slib);
1787 q->slib->sla=(unsigned long)(q->sl);
1788 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1789
1790 /* fill in sl */
1791 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1792 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1793
1794 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1795 ptr=(void*)q->sl;
1796 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1797 ptr=(void*)&q->slsb;
1798 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1799 ptr=(void*)q->sbal[0];
1800 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1801
1802 /* fill in slsb */
1803 if (!irq_ptr->is_qebsm) {
1804 unsigned int count = 1;
1805 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
1806 set_slsb(q, &j, SLSB_P_INPUT_NOT_INIT, &count);
1807 }
1808 }
1809
1810 for (i=0;i<no_output_qs;i++) {
1811 q=irq_ptr->output_qs[i];
1812 memset(q,0,((char*)&q->slib)-((char*)q));
1813
1814 sprintf(dbf_text,"outq%4x",i);
1815 QDIO_DBF_TEXT0(0,setup,dbf_text);
1816 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1817
1818 memset(q->slib,0,PAGE_SIZE);
1819 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1820
1821 available=0;
1822
1823 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1824 q->sbal[j]=*(outbound_sbals_array++);
1825
1826 q->queue_type=q_format;
1827 if ((q->queue_type == QDIO_IQDIO_QFMT) &&
1828 (no_output_qs > 1) &&
1829 (i == no_output_qs-1))
1830 q->queue_type = QDIO_IQDIO_QFMT_ASYNCH;
1831 q->int_parm=int_parm;
1832 q->is_input_q=0;
1833 q->is_pci_out = 0;
1834 q->schid = irq_ptr->schid;
1835 q->cdev = cdev;
1836 q->irq_ptr = irq_ptr;
1837 q->mask=1<<(31-i);
1838 q->q_no=i;
1839 q->first_to_check=0;
1840 q->last_move_ftc=0;
1841 q->handler=output_handler;
1842
1843 tasklet_init(&q->tasklet, qdio_outbound_processing,
1844 (unsigned long) q);
1845 setup_timer(&q->timer, qdio_outbound_processing,
1846 (unsigned long) q);
1847
1848 atomic_set(&q->busy_siga_counter,0);
1849 q->timing.busy_start=0;
1850
1851 /* fill in slib */
1852 if (i>0) irq_ptr->output_qs[i-1]->slib->nsliba=
1853 (unsigned long)(q->slib);
1854 q->slib->sla=(unsigned long)(q->sl);
1855 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1856
1857 /* fill in sl */
1858 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1859 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1860
1861 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1862 ptr=(void*)q->sl;
1863 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1864 ptr=(void*)&q->slsb;
1865 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1866 ptr=(void*)q->sbal[0];
1867 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1868
1869 /* fill in slsb */
1870 if (!irq_ptr->is_qebsm) {
1871 unsigned int count = 1;
1872 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
1873 set_slsb(q, &j, SLSB_P_OUTPUT_NOT_INIT, &count);
1874 }
1875 }
1876 }
1877
1878 static void
1879 qdio_fill_thresholds(struct qdio_irq *irq_ptr,
1880 unsigned int no_input_qs,
1881 unsigned int no_output_qs,
1882 unsigned int min_input_threshold,
1883 unsigned int max_input_threshold,
1884 unsigned int min_output_threshold,
1885 unsigned int max_output_threshold)
1886 {
1887 int i;
1888 struct qdio_q *q;
1889
1890 for (i=0;i<no_input_qs;i++) {
1891 q=irq_ptr->input_qs[i];
1892 q->timing.threshold=max_input_threshold;
1893 /* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1894 q->threshold_classes[j].threshold=
1895 min_input_threshold+
1896 (max_input_threshold-min_input_threshold)/
1897 QDIO_STATS_CLASSES;
1898 }
1899 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1900 }
1901 for (i=0;i<no_output_qs;i++) {
1902 q=irq_ptr->output_qs[i];
1903 q->timing.threshold=max_output_threshold;
1904 /* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1905 q->threshold_classes[j].threshold=
1906 min_output_threshold+
1907 (max_output_threshold-min_output_threshold)/
1908 QDIO_STATS_CLASSES;
1909 }
1910 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1911 }
1912 }
1913
1914 static void tiqdio_thinint_handler(void *ind, void *drv_data)
1915 {
1916 QDIO_DBF_TEXT4(0,trace,"thin_int");
1917
1918 qdio_perf_stat_inc(&perf_stats.thinints);
1919
1920 /* SVS only when needed:
1921 * issue SVS to benefit from iqdio interrupt avoidance
1922 * (SVS clears AISOI)*/
1923 if (!omit_svs)
1924 tiqdio_clear_global_summary();
1925
1926 tiqdio_inbound_checks();
1927 }
1928
1929 static void
1930 qdio_set_state(struct qdio_irq *irq_ptr, enum qdio_irq_states state)
1931 {
1932 int i;
1933 #ifdef CONFIG_QDIO_DEBUG
1934 char dbf_text[15];
1935
1936 QDIO_DBF_TEXT5(0,trace,"newstate");
1937 sprintf(dbf_text,"%4x%4x",irq_ptr->schid.sch_no,state);
1938 QDIO_DBF_TEXT5(0,trace,dbf_text);
1939 #endif /* CONFIG_QDIO_DEBUG */
1940
1941 irq_ptr->state=state;
1942 for (i=0;i<irq_ptr->no_input_qs;i++)
1943 irq_ptr->input_qs[i]->state=state;
1944 for (i=0;i<irq_ptr->no_output_qs;i++)
1945 irq_ptr->output_qs[i]->state=state;
1946 mb();
1947 }
1948
1949 static void
1950 qdio_irq_check_sense(struct subchannel_id schid, struct irb *irb)
1951 {
1952 char dbf_text[15];
1953
1954 if (irb->esw.esw0.erw.cons) {
1955 sprintf(dbf_text,"sens%4x",schid.sch_no);
1956 QDIO_DBF_TEXT2(1,trace,dbf_text);
1957 QDIO_DBF_HEX0(0,sense,irb,QDIO_DBF_SENSE_LEN);
1958
1959 QDIO_PRINT_WARN("sense data available on qdio channel.\n");
1960 QDIO_HEXDUMP16(WARN,"irb: ",irb);
1961 QDIO_HEXDUMP16(WARN,"sense data: ",irb->ecw);
1962 }
1963
1964 }
1965
1966 static void
1967 qdio_handle_pci(struct qdio_irq *irq_ptr)
1968 {
1969 int i;
1970 struct qdio_q *q;
1971
1972 qdio_perf_stat_inc(&perf_stats.pcis);
1973 for (i=0;i<irq_ptr->no_input_qs;i++) {
1974 q=irq_ptr->input_qs[i];
1975 if (q->is_input_q&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT)
1976 qdio_mark_q(q);
1977 else {
1978 qdio_perf_stat_dec(&perf_stats.tl_runs);
1979 __qdio_inbound_processing(q);
1980 }
1981 }
1982 if (!irq_ptr->hydra_gives_outbound_pcis)
1983 return;
1984 for (i=0;i<irq_ptr->no_output_qs;i++) {
1985 q=irq_ptr->output_qs[i];
1986 if (qdio_is_outbound_q_done(q))
1987 continue;
1988 qdio_perf_stat_dec(&perf_stats.tl_runs);
1989 if (!irq_ptr->sync_done_on_outb_pcis)
1990 SYNC_MEMORY;
1991 __qdio_outbound_processing(q);
1992 }
1993 }
1994
1995 static void qdio_establish_handle_irq(struct ccw_device*, int, int);
1996
1997 static void
1998 qdio_handle_activate_check(struct ccw_device *cdev, unsigned long intparm,
1999 int cstat, int dstat)
2000 {
2001 struct qdio_irq *irq_ptr;
2002 struct qdio_q *q;
2003 char dbf_text[15];
2004
2005 irq_ptr = cdev->private->qdio_data;
2006
2007 QDIO_DBF_TEXT2(1, trace, "ick2");
2008 sprintf(dbf_text,"%s", cdev->dev.bus_id);
2009 QDIO_DBF_TEXT2(1,trace,dbf_text);
2010 QDIO_DBF_HEX2(0,trace,&intparm,sizeof(int));
2011 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2012 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2013 QDIO_PRINT_ERR("received check condition on activate " \
2014 "queues on device %s (cs=x%x, ds=x%x).\n",
2015 cdev->dev.bus_id, cstat, dstat);
2016 if (irq_ptr->no_input_qs) {
2017 q=irq_ptr->input_qs[0];
2018 } else if (irq_ptr->no_output_qs) {
2019 q=irq_ptr->output_qs[0];
2020 } else {
2021 QDIO_PRINT_ERR("oops... no queue registered for device %s!?\n",
2022 cdev->dev.bus_id);
2023 goto omit_handler_call;
2024 }
2025 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
2026 QDIO_STATUS_LOOK_FOR_ERROR,
2027 0,0,0,-1,-1,q->int_parm);
2028 omit_handler_call:
2029 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_STOPPED);
2030
2031 }
2032
2033 static void
2034 qdio_call_shutdown(struct work_struct *work)
2035 {
2036 struct ccw_device_private *priv;
2037 struct ccw_device *cdev;
2038
2039 priv = container_of(work, struct ccw_device_private, kick_work);
2040 cdev = priv->cdev;
2041 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
2042 put_device(&cdev->dev);
2043 }
2044
2045 static void
2046 qdio_timeout_handler(struct ccw_device *cdev)
2047 {
2048 struct qdio_irq *irq_ptr;
2049 char dbf_text[15];
2050
2051 QDIO_DBF_TEXT2(0, trace, "qtoh");
2052 sprintf(dbf_text, "%s", cdev->dev.bus_id);
2053 QDIO_DBF_TEXT2(0, trace, dbf_text);
2054
2055 irq_ptr = cdev->private->qdio_data;
2056 sprintf(dbf_text, "state:%d", irq_ptr->state);
2057 QDIO_DBF_TEXT2(0, trace, dbf_text);
2058
2059 switch (irq_ptr->state) {
2060 case QDIO_IRQ_STATE_INACTIVE:
2061 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: timed out\n",
2062 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2063 QDIO_DBF_TEXT2(1,setup,"eq:timeo");
2064 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2065 break;
2066 case QDIO_IRQ_STATE_CLEANUP:
2067 QDIO_PRINT_INFO("Did not get interrupt on cleanup, "
2068 "irq=0.%x.%x.\n",
2069 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2070 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2071 break;
2072 case QDIO_IRQ_STATE_ESTABLISHED:
2073 case QDIO_IRQ_STATE_ACTIVE:
2074 /* I/O has been terminated by common I/O layer. */
2075 QDIO_PRINT_INFO("Queues on irq 0.%x.%04x killed by cio.\n",
2076 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2077 QDIO_DBF_TEXT2(1, trace, "cio:term");
2078 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
2079 if (get_device(&cdev->dev)) {
2080 /* Can't call shutdown from interrupt context. */
2081 PREPARE_WORK(&cdev->private->kick_work,
2082 qdio_call_shutdown);
2083 queue_work(ccw_device_work, &cdev->private->kick_work);
2084 }
2085 break;
2086 default:
2087 BUG();
2088 }
2089 ccw_device_set_timeout(cdev, 0);
2090 wake_up(&cdev->private->wait_q);
2091 }
2092
2093 static void
2094 qdio_handler(struct ccw_device *cdev, unsigned long intparm, struct irb *irb)
2095 {
2096 struct qdio_irq *irq_ptr;
2097 int cstat,dstat;
2098 char dbf_text[15];
2099
2100 #ifdef CONFIG_QDIO_DEBUG
2101 QDIO_DBF_TEXT4(0, trace, "qint");
2102 sprintf(dbf_text, "%s", cdev->dev.bus_id);
2103 QDIO_DBF_TEXT4(0, trace, dbf_text);
2104 #endif /* CONFIG_QDIO_DEBUG */
2105
2106 if (!intparm) {
2107 QDIO_PRINT_ERR("got unsolicited interrupt in qdio " \
2108 "handler, device %s\n", cdev->dev.bus_id);
2109 return;
2110 }
2111
2112 irq_ptr = cdev->private->qdio_data;
2113 if (!irq_ptr) {
2114 QDIO_DBF_TEXT2(1, trace, "uint");
2115 sprintf(dbf_text,"%s", cdev->dev.bus_id);
2116 QDIO_DBF_TEXT2(1,trace,dbf_text);
2117 QDIO_PRINT_ERR("received interrupt on unused device %s!\n",
2118 cdev->dev.bus_id);
2119 return;
2120 }
2121
2122 if (IS_ERR(irb)) {
2123 /* Currently running i/o is in error. */
2124 switch (PTR_ERR(irb)) {
2125 case -EIO:
2126 QDIO_PRINT_ERR("i/o error on device %s\n",
2127 cdev->dev.bus_id);
2128 return;
2129 case -ETIMEDOUT:
2130 qdio_timeout_handler(cdev);
2131 return;
2132 default:
2133 QDIO_PRINT_ERR("unknown error state %ld on device %s\n",
2134 PTR_ERR(irb), cdev->dev.bus_id);
2135 return;
2136 }
2137 }
2138
2139 qdio_irq_check_sense(irq_ptr->schid, irb);
2140
2141 #ifdef CONFIG_QDIO_DEBUG
2142 sprintf(dbf_text, "state:%d", irq_ptr->state);
2143 QDIO_DBF_TEXT4(0, trace, dbf_text);
2144 #endif /* CONFIG_QDIO_DEBUG */
2145
2146 cstat = irb->scsw.cstat;
2147 dstat = irb->scsw.dstat;
2148
2149 switch (irq_ptr->state) {
2150 case QDIO_IRQ_STATE_INACTIVE:
2151 qdio_establish_handle_irq(cdev, cstat, dstat);
2152 break;
2153
2154 case QDIO_IRQ_STATE_CLEANUP:
2155 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2156 break;
2157
2158 case QDIO_IRQ_STATE_ESTABLISHED:
2159 case QDIO_IRQ_STATE_ACTIVE:
2160 if (cstat & SCHN_STAT_PCI) {
2161 qdio_handle_pci(irq_ptr);
2162 break;
2163 }
2164
2165 if ((cstat&~SCHN_STAT_PCI)||dstat) {
2166 qdio_handle_activate_check(cdev, intparm, cstat, dstat);
2167 break;
2168 }
2169 default:
2170 QDIO_PRINT_ERR("got interrupt for queues in state %d on " \
2171 "device %s?!\n",
2172 irq_ptr->state, cdev->dev.bus_id);
2173 }
2174 wake_up(&cdev->private->wait_q);
2175
2176 }
2177
2178 int
2179 qdio_synchronize(struct ccw_device *cdev, unsigned int flags,
2180 unsigned int queue_number)
2181 {
2182 int cc = 0;
2183 struct qdio_q *q;
2184 struct qdio_irq *irq_ptr;
2185 void *ptr;
2186 #ifdef CONFIG_QDIO_DEBUG
2187 char dbf_text[15]="SyncXXXX";
2188 #endif
2189
2190 irq_ptr = cdev->private->qdio_data;
2191 if (!irq_ptr)
2192 return -ENODEV;
2193
2194 #ifdef CONFIG_QDIO_DEBUG
2195 *((int*)(&dbf_text[4])) = irq_ptr->schid.sch_no;
2196 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
2197 *((int*)(&dbf_text[0]))=flags;
2198 *((int*)(&dbf_text[4]))=queue_number;
2199 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
2200 #endif /* CONFIG_QDIO_DEBUG */
2201
2202 if (flags&QDIO_FLAG_SYNC_INPUT) {
2203 q=irq_ptr->input_qs[queue_number];
2204 if (!q)
2205 return -EINVAL;
2206 if (!(irq_ptr->is_qebsm))
2207 cc = do_siga_sync(q->schid, 0, q->mask);
2208 } else if (flags&QDIO_FLAG_SYNC_OUTPUT) {
2209 q=irq_ptr->output_qs[queue_number];
2210 if (!q)
2211 return -EINVAL;
2212 if (!(irq_ptr->is_qebsm))
2213 cc = do_siga_sync(q->schid, q->mask, 0);
2214 } else
2215 return -EINVAL;
2216
2217 ptr=&cc;
2218 if (cc)
2219 QDIO_DBF_HEX3(0,trace,&ptr,sizeof(int));
2220
2221 return cc;
2222 }
2223
2224 static void
2225 qdio_check_subchannel_qebsm(struct qdio_irq *irq_ptr, unsigned char qdioac,
2226 unsigned long token)
2227 {
2228 struct qdio_q *q;
2229 int i;
2230 unsigned int count, start_buf;
2231 char dbf_text[15];
2232
2233 /*check if QEBSM is disabled */
2234 if (!(irq_ptr->is_qebsm) || !(qdioac & 0x01)) {
2235 irq_ptr->is_qebsm = 0;
2236 irq_ptr->sch_token = 0;
2237 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
2238 QDIO_DBF_TEXT0(0,setup,"noV=V");
2239 return;
2240 }
2241 irq_ptr->sch_token = token;
2242 /*input queue*/
2243 for (i = 0; i < irq_ptr->no_input_qs;i++) {
2244 q = irq_ptr->input_qs[i];
2245 count = QDIO_MAX_BUFFERS_PER_Q;
2246 start_buf = 0;
2247 set_slsb(q, &start_buf, SLSB_P_INPUT_NOT_INIT, &count);
2248 }
2249 sprintf(dbf_text,"V=V:%2x",irq_ptr->is_qebsm);
2250 QDIO_DBF_TEXT0(0,setup,dbf_text);
2251 sprintf(dbf_text,"%8lx",irq_ptr->sch_token);
2252 QDIO_DBF_TEXT0(0,setup,dbf_text);
2253 /*output queue*/
2254 for (i = 0; i < irq_ptr->no_output_qs; i++) {
2255 q = irq_ptr->output_qs[i];
2256 count = QDIO_MAX_BUFFERS_PER_Q;
2257 start_buf = 0;
2258 set_slsb(q, &start_buf, SLSB_P_OUTPUT_NOT_INIT, &count);
2259 }
2260 }
2261
2262 static void
2263 qdio_get_ssqd_information(struct qdio_irq *irq_ptr)
2264 {
2265 int result;
2266 unsigned char qdioac;
2267 struct {
2268 struct chsc_header request;
2269 u16 reserved1:10;
2270 u16 ssid:2;
2271 u16 fmt:4;
2272 u16 first_sch;
2273 u16 reserved2;
2274 u16 last_sch;
2275 u32 reserved3;
2276 struct chsc_header response;
2277 u32 reserved4;
2278 u8 flags;
2279 u8 reserved5;
2280 u16 sch;
2281 u8 qfmt;
2282 u8 parm;
2283 u8 qdioac1;
2284 u8 sch_class;
2285 u8 reserved7;
2286 u8 icnt;
2287 u8 reserved8;
2288 u8 ocnt;
2289 u8 reserved9;
2290 u8 mbccnt;
2291 u16 qdioac2;
2292 u64 sch_token;
2293 } *ssqd_area;
2294
2295 QDIO_DBF_TEXT0(0,setup,"getssqd");
2296 qdioac = 0;
2297 ssqd_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2298 if (!ssqd_area) {
2299 QDIO_PRINT_WARN("Could not get memory for chsc. Using all " \
2300 "SIGAs for sch x%x.\n", irq_ptr->schid.sch_no);
2301 irq_ptr->qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2302 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2303 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2304 irq_ptr->is_qebsm = 0;
2305 irq_ptr->sch_token = 0;
2306 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
2307 return;
2308 }
2309
2310 ssqd_area->request = (struct chsc_header) {
2311 .length = 0x0010,
2312 .code = 0x0024,
2313 };
2314 ssqd_area->first_sch = irq_ptr->schid.sch_no;
2315 ssqd_area->last_sch = irq_ptr->schid.sch_no;
2316 ssqd_area->ssid = irq_ptr->schid.ssid;
2317 result = chsc(ssqd_area);
2318
2319 if (result) {
2320 QDIO_PRINT_WARN("CHSC returned cc %i. Using all " \
2321 "SIGAs for sch 0.%x.%x.\n", result,
2322 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2323 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2324 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2325 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2326 irq_ptr->is_qebsm = 0;
2327 goto out;
2328 }
2329
2330 if (ssqd_area->response.code != QDIO_CHSC_RESPONSE_CODE_OK) {
2331 QDIO_PRINT_WARN("response upon checking SIGA needs " \
2332 "is 0x%x. Using all SIGAs for sch 0.%x.%x.\n",
2333 ssqd_area->response.code,
2334 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2335 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2336 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2337 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2338 irq_ptr->is_qebsm = 0;
2339 goto out;
2340 }
2341 if (!(ssqd_area->flags & CHSC_FLAG_QDIO_CAPABILITY) ||
2342 !(ssqd_area->flags & CHSC_FLAG_VALIDITY) ||
2343 (ssqd_area->sch != irq_ptr->schid.sch_no)) {
2344 QDIO_PRINT_WARN("huh? problems checking out sch 0.%x.%x... " \
2345 "using all SIGAs.\n",
2346 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2347 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2348 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2349 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* worst case */
2350 irq_ptr->is_qebsm = 0;
2351 goto out;
2352 }
2353 qdioac = ssqd_area->qdioac1;
2354 out:
2355 qdio_check_subchannel_qebsm(irq_ptr, qdioac,
2356 ssqd_area->sch_token);
2357 mempool_free(ssqd_area, qdio_mempool_scssc);
2358 irq_ptr->qdioac = qdioac;
2359 }
2360
2361 static unsigned int
2362 tiqdio_check_chsc_availability(void)
2363 {
2364 char dbf_text[15];
2365
2366 if (!css_characteristics_avail)
2367 return -EIO;
2368
2369 /* Check for bit 41. */
2370 if (!css_general_characteristics.aif) {
2371 QDIO_PRINT_WARN("Adapter interruption facility not " \
2372 "installed.\n");
2373 return -ENOENT;
2374 }
2375
2376 /* Check for bits 107 and 108. */
2377 if (!css_chsc_characteristics.scssc ||
2378 !css_chsc_characteristics.scsscf) {
2379 QDIO_PRINT_WARN("Set Chan Subsys. Char. & Fast-CHSCs " \
2380 "not available.\n");
2381 return -ENOENT;
2382 }
2383
2384 /* Check for OSA/FCP thin interrupts (bit 67). */
2385 hydra_thinints = css_general_characteristics.aif_osa;
2386 sprintf(dbf_text,"hydrati%1x", hydra_thinints);
2387 QDIO_DBF_TEXT0(0,setup,dbf_text);
2388
2389 #ifdef CONFIG_64BIT
2390 /* Check for QEBSM support in general (bit 58). */
2391 is_passthrough = css_general_characteristics.qebsm;
2392 #endif
2393 sprintf(dbf_text,"cssQBS:%1x", is_passthrough);
2394 QDIO_DBF_TEXT0(0,setup,dbf_text);
2395
2396 /* Check for aif time delay disablement fac (bit 56). If installed,
2397 * omit svs even under lpar (good point by rick again) */
2398 omit_svs = css_general_characteristics.aif_tdd;
2399 sprintf(dbf_text,"omitsvs%1x", omit_svs);
2400 QDIO_DBF_TEXT0(0,setup,dbf_text);
2401 return 0;
2402 }
2403
2404
2405 static unsigned int
2406 tiqdio_set_subchannel_ind(struct qdio_irq *irq_ptr, int reset_to_zero)
2407 {
2408 unsigned long real_addr_local_summary_bit;
2409 unsigned long real_addr_dev_st_chg_ind;
2410 void *ptr;
2411 char dbf_text[15];
2412
2413 unsigned int resp_code;
2414 int result;
2415
2416 struct {
2417 struct chsc_header request;
2418 u16 operation_code;
2419 u16 reserved1;
2420 u32 reserved2;
2421 u32 reserved3;
2422 u64 summary_indicator_addr;
2423 u64 subchannel_indicator_addr;
2424 u32 ks:4;
2425 u32 kc:4;
2426 u32 reserved4:21;
2427 u32 isc:3;
2428 u32 word_with_d_bit;
2429 /* set to 0x10000000 to enable
2430 * time delay disablement facility */
2431 u32 reserved5;
2432 struct subchannel_id schid;
2433 u32 reserved6[1004];
2434 struct chsc_header response;
2435 u32 reserved7;
2436 } *scssc_area;
2437
2438 if (!irq_ptr->is_thinint_irq)
2439 return -ENODEV;
2440
2441 if (reset_to_zero) {
2442 real_addr_local_summary_bit=0;
2443 real_addr_dev_st_chg_ind=0;
2444 } else {
2445 real_addr_local_summary_bit=
2446 virt_to_phys((volatile void *)tiqdio_ind);
2447 real_addr_dev_st_chg_ind=
2448 virt_to_phys((volatile void *)irq_ptr->dev_st_chg_ind);
2449 }
2450
2451 scssc_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2452 if (!scssc_area) {
2453 QDIO_PRINT_WARN("No memory for setting indicators on " \
2454 "subchannel 0.%x.%x.\n",
2455 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2456 return -ENOMEM;
2457 }
2458 scssc_area->request = (struct chsc_header) {
2459 .length = 0x0fe0,
2460 .code = 0x0021,
2461 };
2462 scssc_area->operation_code = 0;
2463
2464 scssc_area->summary_indicator_addr = real_addr_local_summary_bit;
2465 scssc_area->subchannel_indicator_addr = real_addr_dev_st_chg_ind;
2466 scssc_area->ks = QDIO_STORAGE_KEY;
2467 scssc_area->kc = QDIO_STORAGE_KEY;
2468 scssc_area->isc = TIQDIO_THININT_ISC;
2469 scssc_area->schid = irq_ptr->schid;
2470 /* enables the time delay disablement facility. Don't care
2471 * whether it is really there (i.e. we haven't checked for
2472 * it) */
2473 if (css_general_characteristics.aif_tdd)
2474 scssc_area->word_with_d_bit = 0x10000000;
2475 else
2476 QDIO_PRINT_WARN("Time delay disablement facility " \
2477 "not available\n");
2478
2479 result = chsc(scssc_area);
2480 if (result) {
2481 QDIO_PRINT_WARN("could not set indicators on irq 0.%x.%x, " \
2482 "cc=%i.\n",
2483 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,result);
2484 result = -EIO;
2485 goto out;
2486 }
2487
2488 resp_code = scssc_area->response.code;
2489 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2490 QDIO_PRINT_WARN("response upon setting indicators " \
2491 "is 0x%x.\n",resp_code);
2492 sprintf(dbf_text,"sidR%4x",resp_code);
2493 QDIO_DBF_TEXT1(0,trace,dbf_text);
2494 QDIO_DBF_TEXT1(0,setup,dbf_text);
2495 ptr=&scssc_area->response;
2496 QDIO_DBF_HEX2(1,setup,&ptr,QDIO_DBF_SETUP_LEN);
2497 result = -EIO;
2498 goto out;
2499 }
2500
2501 QDIO_DBF_TEXT2(0,setup,"setscind");
2502 QDIO_DBF_HEX2(0,setup,&real_addr_local_summary_bit,
2503 sizeof(unsigned long));
2504 QDIO_DBF_HEX2(0,setup,&real_addr_dev_st_chg_ind,sizeof(unsigned long));
2505 result = 0;
2506 out:
2507 mempool_free(scssc_area, qdio_mempool_scssc);
2508 return result;
2509
2510 }
2511
2512 static unsigned int
2513 tiqdio_set_delay_target(struct qdio_irq *irq_ptr, unsigned long delay_target)
2514 {
2515 unsigned int resp_code;
2516 int result;
2517 void *ptr;
2518 char dbf_text[15];
2519
2520 struct {
2521 struct chsc_header request;
2522 u16 operation_code;
2523 u16 reserved1;
2524 u32 reserved2;
2525 u32 reserved3;
2526 u32 reserved4[2];
2527 u32 delay_target;
2528 u32 reserved5[1009];
2529 struct chsc_header response;
2530 u32 reserved6;
2531 } *scsscf_area;
2532
2533 if (!irq_ptr->is_thinint_irq)
2534 return -ENODEV;
2535
2536 scsscf_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2537 if (!scsscf_area) {
2538 QDIO_PRINT_WARN("No memory for setting delay target on " \
2539 "subchannel 0.%x.%x.\n",
2540 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2541 return -ENOMEM;
2542 }
2543 scsscf_area->request = (struct chsc_header) {
2544 .length = 0x0fe0,
2545 .code = 0x1027,
2546 };
2547
2548 scsscf_area->delay_target = delay_target<<16;
2549
2550 result=chsc(scsscf_area);
2551 if (result) {
2552 QDIO_PRINT_WARN("could not set delay target on irq 0.%x.%x, " \
2553 "cc=%i. Continuing.\n",
2554 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2555 result);
2556 result = -EIO;
2557 goto out;
2558 }
2559
2560 resp_code = scsscf_area->response.code;
2561 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2562 QDIO_PRINT_WARN("response upon setting delay target " \
2563 "is 0x%x. Continuing.\n",resp_code);
2564 sprintf(dbf_text,"sdtR%4x",resp_code);
2565 QDIO_DBF_TEXT1(0,trace,dbf_text);
2566 QDIO_DBF_TEXT1(0,setup,dbf_text);
2567 ptr=&scsscf_area->response;
2568 QDIO_DBF_HEX2(1,trace,&ptr,QDIO_DBF_TRACE_LEN);
2569 }
2570 QDIO_DBF_TEXT2(0,trace,"delytrgt");
2571 QDIO_DBF_HEX2(0,trace,&delay_target,sizeof(unsigned long));
2572 result = 0; /* not critical */
2573 out:
2574 mempool_free(scsscf_area, qdio_mempool_scssc);
2575 return result;
2576 }
2577
2578 int
2579 qdio_cleanup(struct ccw_device *cdev, int how)
2580 {
2581 struct qdio_irq *irq_ptr;
2582 char dbf_text[15];
2583 int rc;
2584
2585 irq_ptr = cdev->private->qdio_data;
2586 if (!irq_ptr)
2587 return -ENODEV;
2588
2589 sprintf(dbf_text,"qcln%4x",irq_ptr->schid.sch_no);
2590 QDIO_DBF_TEXT1(0,trace,dbf_text);
2591 QDIO_DBF_TEXT0(0,setup,dbf_text);
2592
2593 rc = qdio_shutdown(cdev, how);
2594 if ((rc == 0) || (rc == -EINPROGRESS))
2595 rc = qdio_free(cdev);
2596 return rc;
2597 }
2598
2599 int
2600 qdio_shutdown(struct ccw_device *cdev, int how)
2601 {
2602 struct qdio_irq *irq_ptr;
2603 int i;
2604 int result = 0;
2605 int rc;
2606 unsigned long flags;
2607 int timeout;
2608 char dbf_text[15];
2609
2610 irq_ptr = cdev->private->qdio_data;
2611 if (!irq_ptr)
2612 return -ENODEV;
2613
2614 down(&irq_ptr->setting_up_sema);
2615
2616 sprintf(dbf_text,"qsqs%4x",irq_ptr->schid.sch_no);
2617 QDIO_DBF_TEXT1(0,trace,dbf_text);
2618 QDIO_DBF_TEXT0(0,setup,dbf_text);
2619
2620 /* mark all qs as uninteresting */
2621 for (i=0;i<irq_ptr->no_input_qs;i++)
2622 atomic_set(&irq_ptr->input_qs[i]->is_in_shutdown,1);
2623
2624 for (i=0;i<irq_ptr->no_output_qs;i++)
2625 atomic_set(&irq_ptr->output_qs[i]->is_in_shutdown,1);
2626
2627 tasklet_kill(&tiqdio_tasklet);
2628
2629 for (i=0;i<irq_ptr->no_input_qs;i++) {
2630 qdio_unmark_q(irq_ptr->input_qs[i]);
2631 tasklet_kill(&irq_ptr->input_qs[i]->tasklet);
2632 wait_event_interruptible_timeout(cdev->private->wait_q,
2633 !atomic_read(&irq_ptr->
2634 input_qs[i]->
2635 use_count),
2636 QDIO_NO_USE_COUNT_TIMEOUT);
2637 if (atomic_read(&irq_ptr->input_qs[i]->use_count))
2638 result=-EINPROGRESS;
2639 }
2640
2641 for (i=0;i<irq_ptr->no_output_qs;i++) {
2642 tasklet_kill(&irq_ptr->output_qs[i]->tasklet);
2643 del_timer(&irq_ptr->output_qs[i]->timer);
2644 wait_event_interruptible_timeout(cdev->private->wait_q,
2645 !atomic_read(&irq_ptr->
2646 output_qs[i]->
2647 use_count),
2648 QDIO_NO_USE_COUNT_TIMEOUT);
2649 if (atomic_read(&irq_ptr->output_qs[i]->use_count))
2650 result=-EINPROGRESS;
2651 }
2652
2653 /* cleanup subchannel */
2654 spin_lock_irqsave(get_ccwdev_lock(cdev),flags);
2655 if (how&QDIO_FLAG_CLEANUP_USING_CLEAR) {
2656 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
2657 timeout=QDIO_CLEANUP_CLEAR_TIMEOUT;
2658 } else if (how&QDIO_FLAG_CLEANUP_USING_HALT) {
2659 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2660 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2661 } else { /* default behaviour */
2662 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2663 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2664 }
2665 if (rc == -ENODEV) {
2666 /* No need to wait for device no longer present. */
2667 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2668 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2669 } else if (((void *)cdev->handler != (void *)qdio_handler) && rc == 0) {
2670 /*
2671 * Whoever put another handler there, has to cope with the
2672 * interrupt theirself. Might happen if qdio_shutdown was
2673 * called on already shutdown queues, but this shouldn't have
2674 * bad side effects.
2675 */
2676 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2677 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2678 } else if (rc == 0) {
2679 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
2680 ccw_device_set_timeout(cdev, timeout);
2681 spin_unlock_irqrestore(get_ccwdev_lock(cdev),flags);
2682
2683 wait_event(cdev->private->wait_q,
2684 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
2685 irq_ptr->state == QDIO_IRQ_STATE_ERR);
2686 } else {
2687 QDIO_PRINT_INFO("ccw_device_{halt,clear} returned %d for "
2688 "device %s\n", result, cdev->dev.bus_id);
2689 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2690 result = rc;
2691 goto out;
2692 }
2693 if (irq_ptr->is_thinint_irq) {
2694 qdio_put_indicator((__u32*)irq_ptr->dev_st_chg_ind);
2695 tiqdio_set_subchannel_ind(irq_ptr,1);
2696 /* reset adapter interrupt indicators */
2697 }
2698
2699 /* exchange int handlers, if necessary */
2700 if ((void*)cdev->handler == (void*)qdio_handler)
2701 cdev->handler=irq_ptr->original_int_handler;
2702
2703 /* Ignore errors. */
2704 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2705 ccw_device_set_timeout(cdev, 0);
2706 out:
2707 up(&irq_ptr->setting_up_sema);
2708 return result;
2709 }
2710
2711 int
2712 qdio_free(struct ccw_device *cdev)
2713 {
2714 struct qdio_irq *irq_ptr;
2715 char dbf_text[15];
2716
2717 irq_ptr = cdev->private->qdio_data;
2718 if (!irq_ptr)
2719 return -ENODEV;
2720
2721 down(&irq_ptr->setting_up_sema);
2722
2723 sprintf(dbf_text,"qfqs%4x",irq_ptr->schid.sch_no);
2724 QDIO_DBF_TEXT1(0,trace,dbf_text);
2725 QDIO_DBF_TEXT0(0,setup,dbf_text);
2726
2727 cdev->private->qdio_data = NULL;
2728
2729 up(&irq_ptr->setting_up_sema);
2730
2731 qdio_release_irq_memory(irq_ptr);
2732 module_put(THIS_MODULE);
2733 return 0;
2734 }
2735
2736 static void
2737 qdio_allocate_do_dbf(struct qdio_initialize *init_data)
2738 {
2739 char dbf_text[20]; /* if a printf printed out more than 8 chars */
2740
2741 sprintf(dbf_text,"qfmt:%x",init_data->q_format);
2742 QDIO_DBF_TEXT0(0,setup,dbf_text);
2743 QDIO_DBF_HEX0(0,setup,init_data->adapter_name,8);
2744 sprintf(dbf_text,"qpff%4x",init_data->qib_param_field_format);
2745 QDIO_DBF_TEXT0(0,setup,dbf_text);
2746 QDIO_DBF_HEX0(0,setup,&init_data->qib_param_field,sizeof(char*));
2747 QDIO_DBF_HEX0(0,setup,&init_data->input_slib_elements,sizeof(long*));
2748 QDIO_DBF_HEX0(0,setup,&init_data->output_slib_elements,sizeof(long*));
2749 sprintf(dbf_text,"miit%4x",init_data->min_input_threshold);
2750 QDIO_DBF_TEXT0(0,setup,dbf_text);
2751 sprintf(dbf_text,"mait%4x",init_data->max_input_threshold);
2752 QDIO_DBF_TEXT0(0,setup,dbf_text);
2753 sprintf(dbf_text,"miot%4x",init_data->min_output_threshold);
2754 QDIO_DBF_TEXT0(0,setup,dbf_text);
2755 sprintf(dbf_text,"maot%4x",init_data->max_output_threshold);
2756 QDIO_DBF_TEXT0(0,setup,dbf_text);
2757 sprintf(dbf_text,"niq:%4x",init_data->no_input_qs);
2758 QDIO_DBF_TEXT0(0,setup,dbf_text);
2759 sprintf(dbf_text,"noq:%4x",init_data->no_output_qs);
2760 QDIO_DBF_TEXT0(0,setup,dbf_text);
2761 QDIO_DBF_HEX0(0,setup,&init_data->input_handler,sizeof(void*));
2762 QDIO_DBF_HEX0(0,setup,&init_data->output_handler,sizeof(void*));
2763 QDIO_DBF_HEX0(0,setup,&init_data->int_parm,sizeof(long));
2764 QDIO_DBF_HEX0(0,setup,&init_data->flags,sizeof(long));
2765 QDIO_DBF_HEX0(0,setup,&init_data->input_sbal_addr_array,sizeof(void*));
2766 QDIO_DBF_HEX0(0,setup,&init_data->output_sbal_addr_array,sizeof(void*));
2767 }
2768
2769 static void
2770 qdio_allocate_fill_input_desc(struct qdio_irq *irq_ptr, int i, int iqfmt)
2771 {
2772 irq_ptr->input_qs[i]->is_iqdio_q = iqfmt;
2773 irq_ptr->input_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2774
2775 irq_ptr->qdr->qdf0[i].sliba=(unsigned long)(irq_ptr->input_qs[i]->slib);
2776
2777 irq_ptr->qdr->qdf0[i].sla=(unsigned long)(irq_ptr->input_qs[i]->sl);
2778
2779 irq_ptr->qdr->qdf0[i].slsba=
2780 (unsigned long)(&irq_ptr->input_qs[i]->slsb.acc.val[0]);
2781
2782 irq_ptr->qdr->qdf0[i].akey=QDIO_STORAGE_KEY;
2783 irq_ptr->qdr->qdf0[i].bkey=QDIO_STORAGE_KEY;
2784 irq_ptr->qdr->qdf0[i].ckey=QDIO_STORAGE_KEY;
2785 irq_ptr->qdr->qdf0[i].dkey=QDIO_STORAGE_KEY;
2786 }
2787
2788 static void
2789 qdio_allocate_fill_output_desc(struct qdio_irq *irq_ptr, int i,
2790 int j, int iqfmt)
2791 {
2792 irq_ptr->output_qs[i]->is_iqdio_q = iqfmt;
2793 irq_ptr->output_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2794
2795 irq_ptr->qdr->qdf0[i+j].sliba=(unsigned long)(irq_ptr->output_qs[i]->slib);
2796
2797 irq_ptr->qdr->qdf0[i+j].sla=(unsigned long)(irq_ptr->output_qs[i]->sl);
2798
2799 irq_ptr->qdr->qdf0[i+j].slsba=
2800 (unsigned long)(&irq_ptr->output_qs[i]->slsb.acc.val[0]);
2801
2802 irq_ptr->qdr->qdf0[i+j].akey=QDIO_STORAGE_KEY;
2803 irq_ptr->qdr->qdf0[i+j].bkey=QDIO_STORAGE_KEY;
2804 irq_ptr->qdr->qdf0[i+j].ckey=QDIO_STORAGE_KEY;
2805 irq_ptr->qdr->qdf0[i+j].dkey=QDIO_STORAGE_KEY;
2806 }
2807
2808
2809 static void
2810 qdio_initialize_set_siga_flags_input(struct qdio_irq *irq_ptr)
2811 {
2812 int i;
2813
2814 for (i=0;i<irq_ptr->no_input_qs;i++) {
2815 irq_ptr->input_qs[i]->siga_sync=
2816 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2817 irq_ptr->input_qs[i]->siga_in=
2818 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2819 irq_ptr->input_qs[i]->siga_out=
2820 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2821 irq_ptr->input_qs[i]->siga_sync_done_on_thinints=
2822 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2823 irq_ptr->input_qs[i]->hydra_gives_outbound_pcis=
2824 irq_ptr->hydra_gives_outbound_pcis;
2825 irq_ptr->input_qs[i]->siga_sync_done_on_outb_tis=
2826 ((irq_ptr->qdioac&
2827 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2828 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2829 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2830 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2831
2832 }
2833 }
2834
2835 static void
2836 qdio_initialize_set_siga_flags_output(struct qdio_irq *irq_ptr)
2837 {
2838 int i;
2839
2840 for (i=0;i<irq_ptr->no_output_qs;i++) {
2841 irq_ptr->output_qs[i]->siga_sync=
2842 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2843 irq_ptr->output_qs[i]->siga_in=
2844 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2845 irq_ptr->output_qs[i]->siga_out=
2846 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2847 irq_ptr->output_qs[i]->siga_sync_done_on_thinints=
2848 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2849 irq_ptr->output_qs[i]->hydra_gives_outbound_pcis=
2850 irq_ptr->hydra_gives_outbound_pcis;
2851 irq_ptr->output_qs[i]->siga_sync_done_on_outb_tis=
2852 ((irq_ptr->qdioac&
2853 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2854 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2855 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2856 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2857
2858 }
2859 }
2860
2861 static int
2862 qdio_establish_irq_check_for_errors(struct ccw_device *cdev, int cstat,
2863 int dstat)
2864 {
2865 char dbf_text[15];
2866 struct qdio_irq *irq_ptr;
2867
2868 irq_ptr = cdev->private->qdio_data;
2869
2870 if (cstat || (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END))) {
2871 sprintf(dbf_text,"ick1%4x",irq_ptr->schid.sch_no);
2872 QDIO_DBF_TEXT2(1,trace,dbf_text);
2873 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2874 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2875 QDIO_PRINT_ERR("received check condition on establish " \
2876 "queues on irq 0.%x.%x (cs=x%x, ds=x%x).\n",
2877 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2878 cstat,dstat);
2879 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ERR);
2880 }
2881
2882 if (!(dstat & DEV_STAT_DEV_END)) {
2883 QDIO_DBF_TEXT2(1,setup,"eq:no de");
2884 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2885 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
2886 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: didn't get "
2887 "device end: dstat=%02x, cstat=%02x\n",
2888 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2889 dstat, cstat);
2890 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2891 return 1;
2892 }
2893
2894 if (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END)) {
2895 QDIO_DBF_TEXT2(1,setup,"eq:badio");
2896 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2897 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
2898 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: got "
2899 "the following devstat: dstat=%02x, "
2900 "cstat=%02x\n", irq_ptr->schid.ssid,
2901 irq_ptr->schid.sch_no, dstat, cstat);
2902 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2903 return 1;
2904 }
2905 return 0;
2906 }
2907
2908 static void
2909 qdio_establish_handle_irq(struct ccw_device *cdev, int cstat, int dstat)
2910 {
2911 struct qdio_irq *irq_ptr;
2912 char dbf_text[15];
2913
2914 irq_ptr = cdev->private->qdio_data;
2915
2916 sprintf(dbf_text,"qehi%4x",cdev->private->schid.sch_no);
2917 QDIO_DBF_TEXT0(0,setup,dbf_text);
2918 QDIO_DBF_TEXT0(0,trace,dbf_text);
2919
2920 if (qdio_establish_irq_check_for_errors(cdev, cstat, dstat)) {
2921 ccw_device_set_timeout(cdev, 0);
2922 return;
2923 }
2924
2925 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ESTABLISHED);
2926 ccw_device_set_timeout(cdev, 0);
2927 }
2928
2929 int
2930 qdio_initialize(struct qdio_initialize *init_data)
2931 {
2932 int rc;
2933 char dbf_text[15];
2934
2935 sprintf(dbf_text,"qini%4x",init_data->cdev->private->schid.sch_no);
2936 QDIO_DBF_TEXT0(0,setup,dbf_text);
2937 QDIO_DBF_TEXT0(0,trace,dbf_text);
2938
2939 rc = qdio_allocate(init_data);
2940 if (rc == 0) {
2941 rc = qdio_establish(init_data);
2942 if (rc != 0)
2943 qdio_free(init_data->cdev);
2944 }
2945
2946 return rc;
2947 }
2948
2949
2950 int
2951 qdio_allocate(struct qdio_initialize *init_data)
2952 {
2953 struct qdio_irq *irq_ptr;
2954 char dbf_text[15];
2955
2956 sprintf(dbf_text,"qalc%4x",init_data->cdev->private->schid.sch_no);
2957 QDIO_DBF_TEXT0(0,setup,dbf_text);
2958 QDIO_DBF_TEXT0(0,trace,dbf_text);
2959 if ( (init_data->no_input_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2960 (init_data->no_output_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2961 ((init_data->no_input_qs) && (!init_data->input_handler)) ||
2962 ((init_data->no_output_qs) && (!init_data->output_handler)) )
2963 return -EINVAL;
2964
2965 if (!init_data->input_sbal_addr_array)
2966 return -EINVAL;
2967
2968 if (!init_data->output_sbal_addr_array)
2969 return -EINVAL;
2970
2971 qdio_allocate_do_dbf(init_data);
2972
2973 /* create irq */
2974 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
2975
2976 QDIO_DBF_TEXT0(0,setup,"irq_ptr:");
2977 QDIO_DBF_HEX0(0,setup,&irq_ptr,sizeof(void*));
2978
2979 if (!irq_ptr) {
2980 QDIO_PRINT_ERR("allocation of irq_ptr failed!\n");
2981 return -ENOMEM;
2982 }
2983
2984 init_MUTEX(&irq_ptr->setting_up_sema);
2985
2986 /* QDR must be in DMA area since CCW data address is only 32 bit */
2987 irq_ptr->qdr = (struct qdr *) __get_free_page(GFP_KERNEL | GFP_DMA);
2988 if (!(irq_ptr->qdr)) {
2989 free_page((unsigned long) irq_ptr);
2990 QDIO_PRINT_ERR("allocation of irq_ptr->qdr failed!\n");
2991 return -ENOMEM;
2992 }
2993 QDIO_DBF_TEXT0(0,setup,"qdr:");
2994 QDIO_DBF_HEX0(0,setup,&irq_ptr->qdr,sizeof(void*));
2995
2996 if (qdio_alloc_qs(irq_ptr,
2997 init_data->no_input_qs,
2998 init_data->no_output_qs)) {
2999 QDIO_PRINT_ERR("queue allocation failed!\n");
3000 qdio_release_irq_memory(irq_ptr);
3001 return -ENOMEM;
3002 }
3003
3004 init_data->cdev->private->qdio_data = irq_ptr;
3005
3006 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_INACTIVE);
3007
3008 return 0;
3009 }
3010
3011 static int qdio_fill_irq(struct qdio_initialize *init_data)
3012 {
3013 int i;
3014 char dbf_text[15];
3015 struct ciw *ciw;
3016 int is_iqdio;
3017 struct qdio_irq *irq_ptr;
3018
3019 irq_ptr = init_data->cdev->private->qdio_data;
3020
3021 memset(irq_ptr,0,((char*)&irq_ptr->qdr)-((char*)irq_ptr));
3022
3023 /* wipes qib.ac, required by ar7063 */
3024 memset(irq_ptr->qdr,0,sizeof(struct qdr));
3025
3026 irq_ptr->int_parm=init_data->int_parm;
3027
3028 irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev);
3029 irq_ptr->no_input_qs=init_data->no_input_qs;
3030 irq_ptr->no_output_qs=init_data->no_output_qs;
3031
3032 if (init_data->q_format==QDIO_IQDIO_QFMT) {
3033 irq_ptr->is_iqdio_irq=1;
3034 irq_ptr->is_thinint_irq=1;
3035 } else {
3036 irq_ptr->is_iqdio_irq=0;
3037 irq_ptr->is_thinint_irq=hydra_thinints;
3038 }
3039 sprintf(dbf_text,"is_i_t%1x%1x",
3040 irq_ptr->is_iqdio_irq,irq_ptr->is_thinint_irq);
3041 QDIO_DBF_TEXT2(0,setup,dbf_text);
3042
3043 if (irq_ptr->is_thinint_irq) {
3044 irq_ptr->dev_st_chg_ind = qdio_get_indicator();
3045 QDIO_DBF_HEX1(0,setup,&irq_ptr->dev_st_chg_ind,sizeof(void*));
3046 if (!irq_ptr->dev_st_chg_ind) {
3047 QDIO_PRINT_WARN("no indicator location available " \
3048 "for irq 0.%x.%x\n",
3049 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
3050 qdio_release_irq_memory(irq_ptr);
3051 return -ENOBUFS;
3052 }
3053 }
3054
3055 /* defaults */
3056 irq_ptr->equeue.cmd=DEFAULT_ESTABLISH_QS_CMD;
3057 irq_ptr->equeue.count=DEFAULT_ESTABLISH_QS_COUNT;
3058 irq_ptr->aqueue.cmd=DEFAULT_ACTIVATE_QS_CMD;
3059 irq_ptr->aqueue.count=DEFAULT_ACTIVATE_QS_COUNT;
3060
3061 qdio_fill_qs(irq_ptr, init_data->cdev,
3062 init_data->no_input_qs,
3063 init_data->no_output_qs,
3064 init_data->input_handler,
3065 init_data->output_handler,init_data->int_parm,
3066 init_data->q_format,init_data->flags,
3067 init_data->input_sbal_addr_array,
3068 init_data->output_sbal_addr_array);
3069
3070 if (!try_module_get(THIS_MODULE)) {
3071 QDIO_PRINT_CRIT("try_module_get() failed!\n");
3072 qdio_release_irq_memory(irq_ptr);
3073 return -EINVAL;
3074 }
3075
3076 qdio_fill_thresholds(irq_ptr,init_data->no_input_qs,
3077 init_data->no_output_qs,
3078 init_data->min_input_threshold,
3079 init_data->max_input_threshold,
3080 init_data->min_output_threshold,
3081 init_data->max_output_threshold);
3082
3083 /* fill in qdr */
3084 irq_ptr->qdr->qfmt=init_data->q_format;
3085 irq_ptr->qdr->iqdcnt=init_data->no_input_qs;
3086 irq_ptr->qdr->oqdcnt=init_data->no_output_qs;
3087 irq_ptr->qdr->iqdsz=sizeof(struct qdesfmt0)/4; /* size in words */
3088 irq_ptr->qdr->oqdsz=sizeof(struct qdesfmt0)/4;
3089
3090 irq_ptr->qdr->qiba=(unsigned long)&irq_ptr->qib;
3091 irq_ptr->qdr->qkey=QDIO_STORAGE_KEY;
3092
3093 /* fill in qib */
3094 irq_ptr->is_qebsm = is_passthrough;
3095 if (irq_ptr->is_qebsm)
3096 irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM;
3097
3098 irq_ptr->qib.qfmt=init_data->q_format;
3099 if (init_data->no_input_qs)
3100 irq_ptr->qib.isliba=(unsigned long)(irq_ptr->input_qs[0]->slib);
3101 if (init_data->no_output_qs)
3102 irq_ptr->qib.osliba=(unsigned long)(irq_ptr->output_qs[0]->slib);
3103 memcpy(irq_ptr->qib.ebcnam,init_data->adapter_name,8);
3104
3105 qdio_set_impl_params(irq_ptr,init_data->qib_param_field_format,
3106 init_data->qib_param_field,
3107 init_data->no_input_qs,
3108 init_data->no_output_qs,
3109 init_data->input_slib_elements,
3110 init_data->output_slib_elements);
3111
3112 /* first input descriptors, then output descriptors */
3113 is_iqdio = (init_data->q_format == QDIO_IQDIO_QFMT) ? 1 : 0;
3114 for (i=0;i<init_data->no_input_qs;i++)
3115 qdio_allocate_fill_input_desc(irq_ptr, i, is_iqdio);
3116
3117 for (i=0;i<init_data->no_output_qs;i++)
3118 qdio_allocate_fill_output_desc(irq_ptr, i,
3119 init_data->no_input_qs,
3120 is_iqdio);
3121
3122 /* qdr, qib, sls, slsbs, slibs, sbales filled. */
3123
3124 /* get qdio commands */
3125 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
3126 if (!ciw) {
3127 QDIO_DBF_TEXT2(1,setup,"no eq");
3128 QDIO_PRINT_INFO("No equeue CIW found for QDIO commands. "
3129 "Trying to use default.\n");
3130 } else
3131 irq_ptr->equeue = *ciw;
3132 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
3133 if (!ciw) {
3134 QDIO_DBF_TEXT2(1,setup,"no aq");
3135 QDIO_PRINT_INFO("No aqueue CIW found for QDIO commands. "
3136 "Trying to use default.\n");
3137 } else
3138 irq_ptr->aqueue = *ciw;
3139
3140 /* Set new interrupt handler. */
3141 irq_ptr->original_int_handler = init_data->cdev->handler;
3142 init_data->cdev->handler = qdio_handler;
3143
3144 return 0;
3145 }
3146
3147 int
3148 qdio_establish(struct qdio_initialize *init_data)
3149 {
3150 struct qdio_irq *irq_ptr;
3151 unsigned long saveflags;
3152 int result, result2;
3153 struct ccw_device *cdev;
3154 char dbf_text[20];
3155
3156 cdev=init_data->cdev;
3157 irq_ptr = cdev->private->qdio_data;
3158 if (!irq_ptr)
3159 return -EINVAL;
3160
3161 if (cdev->private->state != DEV_STATE_ONLINE)
3162 return -EINVAL;
3163
3164 down(&irq_ptr->setting_up_sema);
3165
3166 qdio_fill_irq(init_data);
3167
3168 /* the thinint CHSC stuff */
3169 if (irq_ptr->is_thinint_irq) {
3170
3171 result = tiqdio_set_subchannel_ind(irq_ptr,0);
3172 if (result) {
3173 up(&irq_ptr->setting_up_sema);
3174 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3175 return result;
3176 }
3177 tiqdio_set_delay_target(irq_ptr,TIQDIO_DELAY_TARGET);
3178 }
3179
3180 sprintf(dbf_text,"qest%4x",cdev->private->schid.sch_no);
3181 QDIO_DBF_TEXT0(0,setup,dbf_text);
3182 QDIO_DBF_TEXT0(0,trace,dbf_text);
3183
3184 /* establish q */
3185 irq_ptr->ccw.cmd_code=irq_ptr->equeue.cmd;
3186 irq_ptr->ccw.flags=CCW_FLAG_SLI;
3187 irq_ptr->ccw.count=irq_ptr->equeue.count;
3188 irq_ptr->ccw.cda=QDIO_GET_ADDR(irq_ptr->qdr);
3189
3190 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
3191
3192 ccw_device_set_options_mask(cdev, 0);
3193 result=ccw_device_start_timeout(cdev,&irq_ptr->ccw,
3194 QDIO_DOING_ESTABLISH,0, 0,
3195 QDIO_ESTABLISH_TIMEOUT);
3196 if (result) {
3197 result2=ccw_device_start_timeout(cdev,&irq_ptr->ccw,
3198 QDIO_DOING_ESTABLISH,0,0,
3199 QDIO_ESTABLISH_TIMEOUT);
3200 sprintf(dbf_text,"eq:io%4x",result);
3201 QDIO_DBF_TEXT2(1,setup,dbf_text);
3202 if (result2) {
3203 sprintf(dbf_text,"eq:io%4x",result);
3204 QDIO_DBF_TEXT2(1,setup,dbf_text);
3205 }
3206 QDIO_PRINT_WARN("establish queues on irq 0.%x.%04x: do_IO " \
3207 "returned %i, next try returned %i\n",
3208 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
3209 result, result2);
3210 result=result2;
3211 if (result)
3212 ccw_device_set_timeout(cdev, 0);
3213 }
3214
3215 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
3216
3217 if (result) {
3218 up(&irq_ptr->setting_up_sema);
3219 qdio_shutdown(cdev,QDIO_FLAG_CLEANUP_USING_CLEAR);
3220 return result;
3221 }
3222
3223 /* Timeout is cared for already by using ccw_device_start_timeout(). */
3224 wait_event_interruptible(cdev->private->wait_q,
3225 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
3226 irq_ptr->state == QDIO_IRQ_STATE_ERR);
3227
3228 if (irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED)
3229 result = 0;
3230 else {
3231 up(&irq_ptr->setting_up_sema);
3232 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3233 return -EIO;
3234 }
3235
3236 qdio_get_ssqd_information(irq_ptr);
3237 /* if this gets set once, we're running under VM and can omit SVSes */
3238 if (irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY)
3239 omit_svs=1;
3240
3241 sprintf(dbf_text,"qdioac%2x",irq_ptr->qdioac);
3242 QDIO_DBF_TEXT2(0,setup,dbf_text);
3243
3244 sprintf(dbf_text,"qib ac%2x",irq_ptr->qib.ac);
3245 QDIO_DBF_TEXT2(0,setup,dbf_text);
3246
3247 irq_ptr->hydra_gives_outbound_pcis=
3248 irq_ptr->qib.ac&QIB_AC_OUTBOUND_PCI_SUPPORTED;
3249 irq_ptr->sync_done_on_outb_pcis=
3250 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS;
3251
3252 qdio_initialize_set_siga_flags_input(irq_ptr);
3253 qdio_initialize_set_siga_flags_output(irq_ptr);
3254
3255 up(&irq_ptr->setting_up_sema);
3256
3257 return result;
3258
3259 }
3260
3261 int
3262 qdio_activate(struct ccw_device *cdev, int flags)
3263 {
3264 struct qdio_irq *irq_ptr;
3265 int i,result=0,result2;
3266 unsigned long saveflags;
3267 char dbf_text[20]; /* see qdio_initialize */
3268
3269 irq_ptr = cdev->private->qdio_data;
3270 if (!irq_ptr)
3271 return -ENODEV;
3272
3273 if (cdev->private->state != DEV_STATE_ONLINE)
3274 return -EINVAL;
3275
3276 down(&irq_ptr->setting_up_sema);
3277 if (irq_ptr->state==QDIO_IRQ_STATE_INACTIVE) {
3278 result=-EBUSY;
3279 goto out;
3280 }
3281
3282 sprintf(dbf_text,"qact%4x", irq_ptr->schid.sch_no);
3283 QDIO_DBF_TEXT2(0,setup,dbf_text);
3284 QDIO_DBF_TEXT2(0,trace,dbf_text);
3285
3286 /* activate q */
3287 irq_ptr->ccw.cmd_code=irq_ptr->aqueue.cmd;
3288 irq_ptr->ccw.flags=CCW_FLAG_SLI;
3289 irq_ptr->ccw.count=irq_ptr->aqueue.count;
3290 irq_ptr->ccw.cda=QDIO_GET_ADDR(0);
3291
3292 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
3293
3294 ccw_device_set_timeout(cdev, 0);
3295 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
3296 result=ccw_device_start(cdev,&irq_ptr->ccw,QDIO_DOING_ACTIVATE,
3297 0, DOIO_DENY_PREFETCH);
3298 if (result) {
3299 result2=ccw_device_start(cdev,&irq_ptr->ccw,
3300 QDIO_DOING_ACTIVATE,0,0);
3301 sprintf(dbf_text,"aq:io%4x",result);
3302 QDIO_DBF_TEXT2(1,setup,dbf_text);
3303 if (result2) {
3304 sprintf(dbf_text,"aq:io%4x",result);
3305 QDIO_DBF_TEXT2(1,setup,dbf_text);
3306 }
3307 QDIO_PRINT_WARN("activate queues on irq 0.%x.%04x: do_IO " \
3308 "returned %i, next try returned %i\n",
3309 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
3310 result, result2);
3311 result=result2;
3312 }
3313
3314 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
3315 if (result)
3316 goto out;
3317
3318 for (i=0;i<irq_ptr->no_input_qs;i++) {
3319 if (irq_ptr->is_thinint_irq) {
3320 /*
3321 * that way we know, that, if we will get interrupted
3322 * by tiqdio_inbound_processing, qdio_unmark_q will
3323 * not be called
3324 */
3325 qdio_reserve_q(irq_ptr->input_qs[i]);
3326 qdio_mark_tiq(irq_ptr->input_qs[i]);
3327 qdio_release_q(irq_ptr->input_qs[i]);
3328 }
3329 }
3330
3331 if (flags&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT) {
3332 for (i=0;i<irq_ptr->no_input_qs;i++) {
3333 irq_ptr->input_qs[i]->is_input_q|=
3334 QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT;
3335 }
3336 }
3337
3338 wait_event_interruptible_timeout(cdev->private->wait_q,
3339 ((irq_ptr->state ==
3340 QDIO_IRQ_STATE_STOPPED) ||
3341 (irq_ptr->state ==
3342 QDIO_IRQ_STATE_ERR)),
3343 QDIO_ACTIVATE_TIMEOUT);
3344
3345 switch (irq_ptr->state) {
3346 case QDIO_IRQ_STATE_STOPPED:
3347 case QDIO_IRQ_STATE_ERR:
3348 up(&irq_ptr->setting_up_sema);
3349 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3350 down(&irq_ptr->setting_up_sema);
3351 result = -EIO;
3352 break;
3353 default:
3354 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
3355 result = 0;
3356 }
3357 out:
3358 up(&irq_ptr->setting_up_sema);
3359
3360 return result;
3361 }
3362
3363 /* buffers filled forwards again to make Rick happy */
3364 static void
3365 qdio_do_qdio_fill_input(struct qdio_q *q, unsigned int qidx,
3366 unsigned int count, struct qdio_buffer *buffers)
3367 {
3368 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3369 int tmp = 0;
3370
3371 qidx &= (QDIO_MAX_BUFFERS_PER_Q - 1);
3372 if (irq->is_qebsm) {
3373 while (count) {
3374 tmp = set_slsb(q, &qidx, SLSB_CU_INPUT_EMPTY, &count);
3375 if (!tmp)
3376 return;
3377 }
3378 return;
3379 }
3380 for (;;) {
3381 set_slsb(q, &qidx, SLSB_CU_INPUT_EMPTY, &count);
3382 count--;
3383 if (!count) break;
3384 qidx = (qidx + 1) & (QDIO_MAX_BUFFERS_PER_Q - 1);
3385 }
3386 }
3387
3388 static void
3389 qdio_do_qdio_fill_output(struct qdio_q *q, unsigned int qidx,
3390 unsigned int count, struct qdio_buffer *buffers)
3391 {
3392 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3393 int tmp = 0;
3394
3395 qidx &= (QDIO_MAX_BUFFERS_PER_Q - 1);
3396 if (irq->is_qebsm) {
3397 while (count) {
3398 tmp = set_slsb(q, &qidx, SLSB_CU_OUTPUT_PRIMED, &count);
3399 if (!tmp)
3400 return;
3401 }
3402 return;
3403 }
3404
3405 for (;;) {
3406 set_slsb(q, &qidx, SLSB_CU_OUTPUT_PRIMED, &count);
3407 count--;
3408 if (!count) break;
3409 qidx = (qidx + 1) & (QDIO_MAX_BUFFERS_PER_Q - 1);
3410 }
3411 }
3412
3413 static void
3414 do_qdio_handle_inbound(struct qdio_q *q, unsigned int callflags,
3415 unsigned int qidx, unsigned int count,
3416 struct qdio_buffer *buffers)
3417 {
3418 int used_elements;
3419
3420 /* This is the inbound handling of queues */
3421 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3422
3423 qdio_do_qdio_fill_input(q,qidx,count,buffers);
3424
3425 if ((used_elements+count==QDIO_MAX_BUFFERS_PER_Q)&&
3426 (callflags&QDIO_FLAG_UNDER_INTERRUPT))
3427 atomic_xchg(&q->polling,0);
3428
3429 if (used_elements)
3430 return;
3431 if (callflags&QDIO_FLAG_DONT_SIGA)
3432 return;
3433 if (q->siga_in) {
3434 int result;
3435
3436 result=qdio_siga_input(q);
3437 if (result) {
3438 if (q->siga_error)
3439 q->error_status_flags|=
3440 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
3441 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
3442 q->siga_error=result;
3443 }
3444 }
3445
3446 qdio_mark_q(q);
3447 }
3448
3449 static void
3450 do_qdio_handle_outbound(struct qdio_q *q, unsigned int callflags,
3451 unsigned int qidx, unsigned int count,
3452 struct qdio_buffer *buffers)
3453 {
3454 int used_elements;
3455 unsigned int cnt, start_buf;
3456 unsigned char state = 0;
3457 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3458
3459 /* This is the outbound handling of queues */
3460 qdio_do_qdio_fill_output(q,qidx,count,buffers);
3461
3462 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3463
3464 if (callflags&QDIO_FLAG_DONT_SIGA) {
3465 qdio_perf_stat_inc(&perf_stats.outbound_cnt);
3466 return;
3467 }
3468 if (callflags & QDIO_FLAG_PCI_OUT)
3469 q->is_pci_out = 1;
3470 else
3471 q->is_pci_out = 0;
3472 if (q->is_iqdio_q) {
3473 /* one siga for every sbal */
3474 while (count--)
3475 qdio_kick_outbound_q(q);
3476
3477 __qdio_outbound_processing(q);
3478 } else {
3479 /* under VM, we do a SIGA sync unconditionally */
3480 SYNC_MEMORY;
3481 else {
3482 /*
3483 * w/o shadow queues (else branch of
3484 * SYNC_MEMORY :-/ ), we try to
3485 * fast-requeue buffers
3486 */
3487 if (irq->is_qebsm) {
3488 cnt = 1;
3489 start_buf = ((qidx+QDIO_MAX_BUFFERS_PER_Q-1) &
3490 (QDIO_MAX_BUFFERS_PER_Q-1));
3491 qdio_do_eqbs(q, &state, &start_buf, &cnt);
3492 } else
3493 state = q->slsb.acc.val[(qidx+QDIO_MAX_BUFFERS_PER_Q-1)
3494 &(QDIO_MAX_BUFFERS_PER_Q-1) ];
3495 if (state != SLSB_CU_OUTPUT_PRIMED) {
3496 qdio_kick_outbound_q(q);
3497 } else {
3498 QDIO_DBF_TEXT3(0,trace, "fast-req");
3499 qdio_perf_stat_inc(&perf_stats.fast_reqs);
3500 }
3501 }
3502 /*
3503 * only marking the q could take too long,
3504 * the upper layer module could do a lot of
3505 * traffic in that time
3506 */
3507 __qdio_outbound_processing(q);
3508 }
3509
3510 qdio_perf_stat_inc(&perf_stats.outbound_cnt);
3511 }
3512
3513 /* count must be 1 in iqdio */
3514 int
3515 do_QDIO(struct ccw_device *cdev,unsigned int callflags,
3516 unsigned int queue_number, unsigned int qidx,
3517 unsigned int count,struct qdio_buffer *buffers)
3518 {
3519 struct qdio_irq *irq_ptr;
3520 #ifdef CONFIG_QDIO_DEBUG
3521 char dbf_text[20];
3522
3523 sprintf(dbf_text,"doQD%04x",cdev->private->schid.sch_no);
3524 QDIO_DBF_TEXT3(0,trace,dbf_text);
3525 #endif /* CONFIG_QDIO_DEBUG */
3526
3527 if ( (qidx>QDIO_MAX_BUFFERS_PER_Q) ||
3528 (count>QDIO_MAX_BUFFERS_PER_Q) ||
3529 (queue_number>QDIO_MAX_QUEUES_PER_IRQ) )
3530 return -EINVAL;
3531
3532 if (count==0)
3533 return 0;
3534
3535 irq_ptr = cdev->private->qdio_data;
3536 if (!irq_ptr)
3537 return -ENODEV;
3538
3539 #ifdef CONFIG_QDIO_DEBUG
3540 if (callflags&QDIO_FLAG_SYNC_INPUT)
3541 QDIO_DBF_HEX3(0,trace,&irq_ptr->input_qs[queue_number],
3542 sizeof(void*));
3543 else
3544 QDIO_DBF_HEX3(0,trace,&irq_ptr->output_qs[queue_number],
3545 sizeof(void*));
3546 sprintf(dbf_text,"flag%04x",callflags);
3547 QDIO_DBF_TEXT3(0,trace,dbf_text);
3548 sprintf(dbf_text,"qi%02xct%02x",qidx,count);
3549 QDIO_DBF_TEXT3(0,trace,dbf_text);
3550 #endif /* CONFIG_QDIO_DEBUG */
3551
3552 if (irq_ptr->state!=QDIO_IRQ_STATE_ACTIVE)
3553 return -EBUSY;
3554
3555 if (callflags&QDIO_FLAG_SYNC_INPUT)
3556 do_qdio_handle_inbound(irq_ptr->input_qs[queue_number],
3557 callflags, qidx, count, buffers);
3558 else if (callflags&QDIO_FLAG_SYNC_OUTPUT)
3559 do_qdio_handle_outbound(irq_ptr->output_qs[queue_number],
3560 callflags, qidx, count, buffers);
3561 else {
3562 QDIO_DBF_TEXT3(1,trace,"doQD:inv");
3563 return -EINVAL;
3564 }
3565 return 0;
3566 }
3567
3568 static int
3569 qdio_perf_procfile_read(char *buffer, char **buffer_location, off_t offset,
3570 int buffer_length, int *eof, void *data)
3571 {
3572 int c=0;
3573
3574 /* we are always called with buffer_length=4k, so we all
3575 deliver on the first read */
3576 if (offset>0)
3577 return 0;
3578
3579 #define _OUTP_IT(x...) c+=sprintf(buffer+c,x)
3580 #ifdef CONFIG_64BIT
3581 _OUTP_IT("Number of tasklet runs (total) : %li\n",
3582 (long)atomic64_read(&perf_stats.tl_runs));
3583 _OUTP_IT("Inbound tasklet runs tried/retried : %li/%li\n",
3584 (long)atomic64_read(&perf_stats.inbound_tl_runs),
3585 (long)atomic64_read(&perf_stats.inbound_tl_runs_resched));
3586 _OUTP_IT("Inbound-thin tasklet runs tried/retried : %li/%li\n",
3587 (long)atomic64_read(&perf_stats.inbound_thin_tl_runs),
3588 (long)atomic64_read(&perf_stats.inbound_thin_tl_runs_resched));
3589 _OUTP_IT("Outbound tasklet runs tried/retried : %li/%li\n",
3590 (long)atomic64_read(&perf_stats.outbound_tl_runs),
3591 (long)atomic64_read(&perf_stats.outbound_tl_runs_resched));
3592 _OUTP_IT("\n");
3593 _OUTP_IT("Number of SIGA sync's issued : %li\n",
3594 (long)atomic64_read(&perf_stats.siga_syncs));
3595 _OUTP_IT("Number of SIGA in's issued : %li\n",
3596 (long)atomic64_read(&perf_stats.siga_ins));
3597 _OUTP_IT("Number of SIGA out's issued : %li\n",
3598 (long)atomic64_read(&perf_stats.siga_outs));
3599 _OUTP_IT("Number of PCIs caught : %li\n",
3600 (long)atomic64_read(&perf_stats.pcis));
3601 _OUTP_IT("Number of adapter interrupts caught : %li\n",
3602 (long)atomic64_read(&perf_stats.thinints));
3603 _OUTP_IT("Number of fast requeues (outg. SBALs w/o SIGA) : %li\n",
3604 (long)atomic64_read(&perf_stats.fast_reqs));
3605 _OUTP_IT("\n");
3606 _OUTP_IT("Number of inbound transfers : %li\n",
3607 (long)atomic64_read(&perf_stats.inbound_cnt));
3608 _OUTP_IT("Number of do_QDIOs outbound : %li\n",
3609 (long)atomic64_read(&perf_stats.outbound_cnt));
3610 #else /* CONFIG_64BIT */
3611 _OUTP_IT("Number of tasklet runs (total) : %i\n",
3612 atomic_read(&perf_stats.tl_runs));
3613 _OUTP_IT("Inbound tasklet runs tried/retried : %i/%i\n",
3614 atomic_read(&perf_stats.inbound_tl_runs),
3615 atomic_read(&perf_stats.inbound_tl_runs_resched));
3616 _OUTP_IT("Inbound-thin tasklet runs tried/retried : %i/%i\n",
3617 atomic_read(&perf_stats.inbound_thin_tl_runs),
3618 atomic_read(&perf_stats.inbound_thin_tl_runs_resched));
3619 _OUTP_IT("Outbound tasklet runs tried/retried : %i/%i\n",
3620 atomic_read(&perf_stats.outbound_tl_runs),
3621 atomic_read(&perf_stats.outbound_tl_runs_resched));
3622 _OUTP_IT("\n");
3623 _OUTP_IT("Number of SIGA sync's issued : %i\n",
3624 atomic_read(&perf_stats.siga_syncs));
3625 _OUTP_IT("Number of SIGA in's issued : %i\n",
3626 atomic_read(&perf_stats.siga_ins));
3627 _OUTP_IT("Number of SIGA out's issued : %i\n",
3628 atomic_read(&perf_stats.siga_outs));
3629 _OUTP_IT("Number of PCIs caught : %i\n",
3630 atomic_read(&perf_stats.pcis));
3631 _OUTP_IT("Number of adapter interrupts caught : %i\n",
3632 atomic_read(&perf_stats.thinints));
3633 _OUTP_IT("Number of fast requeues (outg. SBALs w/o SIGA) : %i\n",
3634 atomic_read(&perf_stats.fast_reqs));
3635 _OUTP_IT("\n");
3636 _OUTP_IT("Number of inbound transfers : %i\n",
3637 atomic_read(&perf_stats.inbound_cnt));
3638 _OUTP_IT("Number of do_QDIOs outbound : %i\n",
3639 atomic_read(&perf_stats.outbound_cnt));
3640 #endif /* CONFIG_64BIT */
3641 _OUTP_IT("\n");
3642
3643 return c;
3644 }
3645
3646 static struct proc_dir_entry *qdio_perf_proc_file;
3647
3648 static void
3649 qdio_add_procfs_entry(void)
3650 {
3651 proc_perf_file_registration=0;
3652 qdio_perf_proc_file=create_proc_entry(QDIO_PERF,
3653 S_IFREG|0444,&proc_root);
3654 if (qdio_perf_proc_file) {
3655 qdio_perf_proc_file->read_proc=&qdio_perf_procfile_read;
3656 } else proc_perf_file_registration=-1;
3657
3658 if (proc_perf_file_registration)
3659 QDIO_PRINT_WARN("was not able to register perf. " \
3660 "proc-file (%i).\n",
3661 proc_perf_file_registration);
3662 }
3663
3664 static void
3665 qdio_remove_procfs_entry(void)
3666 {
3667 if (!proc_perf_file_registration) /* means if it went ok earlier */
3668 remove_proc_entry(QDIO_PERF,&proc_root);
3669 }
3670
3671 /**
3672 * attributes in sysfs
3673 *****************************************************************************/
3674
3675 static ssize_t
3676 qdio_performance_stats_show(struct bus_type *bus, char *buf)
3677 {
3678 return sprintf(buf, "%i\n", qdio_performance_stats ? 1 : 0);
3679 }
3680
3681 static ssize_t
3682 qdio_performance_stats_store(struct bus_type *bus, const char *buf, size_t count)
3683 {
3684 char *tmp;
3685 int i;
3686
3687 i = simple_strtoul(buf, &tmp, 16);
3688 if ((i == 0) || (i == 1)) {
3689 if (i == qdio_performance_stats)
3690 return count;
3691 qdio_performance_stats = i;
3692 if (i==0) {
3693 /* reset perf. stat. info */
3694 #ifdef CONFIG_64BIT
3695 atomic64_set(&perf_stats.tl_runs, 0);
3696 atomic64_set(&perf_stats.outbound_tl_runs, 0);
3697 atomic64_set(&perf_stats.inbound_tl_runs, 0);
3698 atomic64_set(&perf_stats.inbound_tl_runs_resched, 0);
3699 atomic64_set(&perf_stats.inbound_thin_tl_runs, 0);
3700 atomic64_set(&perf_stats.inbound_thin_tl_runs_resched,
3701 0);
3702 atomic64_set(&perf_stats.siga_outs, 0);
3703 atomic64_set(&perf_stats.siga_ins, 0);
3704 atomic64_set(&perf_stats.siga_syncs, 0);
3705 atomic64_set(&perf_stats.pcis, 0);
3706 atomic64_set(&perf_stats.thinints, 0);
3707 atomic64_set(&perf_stats.fast_reqs, 0);
3708 atomic64_set(&perf_stats.outbound_cnt, 0);
3709 atomic64_set(&perf_stats.inbound_cnt, 0);
3710 #else /* CONFIG_64BIT */
3711 atomic_set(&perf_stats.tl_runs, 0);
3712 atomic_set(&perf_stats.outbound_tl_runs, 0);
3713 atomic_set(&perf_stats.inbound_tl_runs, 0);
3714 atomic_set(&perf_stats.inbound_tl_runs_resched, 0);
3715 atomic_set(&perf_stats.inbound_thin_tl_runs, 0);
3716 atomic_set(&perf_stats.inbound_thin_tl_runs_resched, 0);
3717 atomic_set(&perf_stats.siga_outs, 0);
3718 atomic_set(&perf_stats.siga_ins, 0);
3719 atomic_set(&perf_stats.siga_syncs, 0);
3720 atomic_set(&perf_stats.pcis, 0);
3721 atomic_set(&perf_stats.thinints, 0);
3722 atomic_set(&perf_stats.fast_reqs, 0);
3723 atomic_set(&perf_stats.outbound_cnt, 0);
3724 atomic_set(&perf_stats.inbound_cnt, 0);
3725 #endif /* CONFIG_64BIT */
3726 }
3727 } else {
3728 QDIO_PRINT_ERR("QDIO performance_stats: write 0 or 1 to this file!\n");
3729 return -EINVAL;
3730 }
3731 return count;
3732 }
3733
3734 static BUS_ATTR(qdio_performance_stats, 0644, qdio_performance_stats_show,
3735 qdio_performance_stats_store);
3736
3737 static void
3738 tiqdio_register_thinints(void)
3739 {
3740 char dbf_text[20];
3741
3742 tiqdio_ind =
3743 s390_register_adapter_interrupt(&tiqdio_thinint_handler, NULL);
3744 if (IS_ERR(tiqdio_ind)) {
3745 sprintf(dbf_text, "regthn%lx", PTR_ERR(tiqdio_ind));
3746 QDIO_DBF_TEXT0(0,setup,dbf_text);
3747 QDIO_PRINT_ERR("failed to register adapter handler " \
3748 "(rc=%li).\nAdapter interrupts might " \
3749 "not work. Continuing.\n",
3750 PTR_ERR(tiqdio_ind));
3751 tiqdio_ind = NULL;
3752 }
3753 }
3754
3755 static void
3756 tiqdio_unregister_thinints(void)
3757 {
3758 if (tiqdio_ind)
3759 s390_unregister_adapter_interrupt(tiqdio_ind);
3760 }
3761
3762 static int
3763 qdio_get_qdio_memory(void)
3764 {
3765 int i;
3766 indicator_used[0]=1;
3767
3768 for (i=1;i<INDICATORS_PER_CACHELINE;i++)
3769 indicator_used[i]=0;
3770 indicators = kzalloc(sizeof(__u32)*(INDICATORS_PER_CACHELINE),
3771 GFP_KERNEL);
3772 if (!indicators)
3773 return -ENOMEM;
3774 return 0;
3775 }
3776
3777 static void
3778 qdio_release_qdio_memory(void)
3779 {
3780 kfree(indicators);
3781 }
3782
3783 static void
3784 qdio_unregister_dbf_views(void)
3785 {
3786 if (qdio_dbf_setup)
3787 debug_unregister(qdio_dbf_setup);
3788 if (qdio_dbf_sbal)
3789 debug_unregister(qdio_dbf_sbal);
3790 if (qdio_dbf_sense)
3791 debug_unregister(qdio_dbf_sense);
3792 if (qdio_dbf_trace)
3793 debug_unregister(qdio_dbf_trace);
3794 #ifdef CONFIG_QDIO_DEBUG
3795 if (qdio_dbf_slsb_out)
3796 debug_unregister(qdio_dbf_slsb_out);
3797 if (qdio_dbf_slsb_in)
3798 debug_unregister(qdio_dbf_slsb_in);
3799 #endif /* CONFIG_QDIO_DEBUG */
3800 }
3801
3802 static int
3803 qdio_register_dbf_views(void)
3804 {
3805 qdio_dbf_setup=debug_register(QDIO_DBF_SETUP_NAME,
3806 QDIO_DBF_SETUP_PAGES,
3807 QDIO_DBF_SETUP_NR_AREAS,
3808 QDIO_DBF_SETUP_LEN);
3809 if (!qdio_dbf_setup)
3810 goto oom;
3811 debug_register_view(qdio_dbf_setup,&debug_hex_ascii_view);
3812 debug_set_level(qdio_dbf_setup,QDIO_DBF_SETUP_LEVEL);
3813
3814 qdio_dbf_sbal=debug_register(QDIO_DBF_SBAL_NAME,
3815 QDIO_DBF_SBAL_PAGES,
3816 QDIO_DBF_SBAL_NR_AREAS,
3817 QDIO_DBF_SBAL_LEN);
3818 if (!qdio_dbf_sbal)
3819 goto oom;
3820
3821 debug_register_view(qdio_dbf_sbal,&debug_hex_ascii_view);
3822 debug_set_level(qdio_dbf_sbal,QDIO_DBF_SBAL_LEVEL);
3823
3824 qdio_dbf_sense=debug_register(QDIO_DBF_SENSE_NAME,
3825 QDIO_DBF_SENSE_PAGES,
3826 QDIO_DBF_SENSE_NR_AREAS,
3827 QDIO_DBF_SENSE_LEN);
3828 if (!qdio_dbf_sense)
3829 goto oom;
3830
3831 debug_register_view(qdio_dbf_sense,&debug_hex_ascii_view);
3832 debug_set_level(qdio_dbf_sense,QDIO_DBF_SENSE_LEVEL);
3833
3834 qdio_dbf_trace=debug_register(QDIO_DBF_TRACE_NAME,
3835 QDIO_DBF_TRACE_PAGES,
3836 QDIO_DBF_TRACE_NR_AREAS,
3837 QDIO_DBF_TRACE_LEN);
3838 if (!qdio_dbf_trace)
3839 goto oom;
3840
3841 debug_register_view(qdio_dbf_trace,&debug_hex_ascii_view);
3842 debug_set_level(qdio_dbf_trace,QDIO_DBF_TRACE_LEVEL);
3843
3844 #ifdef CONFIG_QDIO_DEBUG
3845 qdio_dbf_slsb_out=debug_register(QDIO_DBF_SLSB_OUT_NAME,
3846 QDIO_DBF_SLSB_OUT_PAGES,
3847 QDIO_DBF_SLSB_OUT_NR_AREAS,
3848 QDIO_DBF_SLSB_OUT_LEN);
3849 if (!qdio_dbf_slsb_out)
3850 goto oom;
3851 debug_register_view(qdio_dbf_slsb_out,&debug_hex_ascii_view);
3852 debug_set_level(qdio_dbf_slsb_out,QDIO_DBF_SLSB_OUT_LEVEL);
3853
3854 qdio_dbf_slsb_in=debug_register(QDIO_DBF_SLSB_IN_NAME,
3855 QDIO_DBF_SLSB_IN_PAGES,
3856 QDIO_DBF_SLSB_IN_NR_AREAS,
3857 QDIO_DBF_SLSB_IN_LEN);
3858 if (!qdio_dbf_slsb_in)
3859 goto oom;
3860 debug_register_view(qdio_dbf_slsb_in,&debug_hex_ascii_view);
3861 debug_set_level(qdio_dbf_slsb_in,QDIO_DBF_SLSB_IN_LEVEL);
3862 #endif /* CONFIG_QDIO_DEBUG */
3863 return 0;
3864 oom:
3865 QDIO_PRINT_ERR("not enough memory for dbf.\n");
3866 qdio_unregister_dbf_views();
3867 return -ENOMEM;
3868 }
3869
3870 static void *qdio_mempool_alloc(gfp_t gfp_mask, void *size)
3871 {
3872 return (void *) get_zeroed_page(gfp_mask|GFP_DMA);
3873 }
3874
3875 static void qdio_mempool_free(void *element, void *size)
3876 {
3877 free_page((unsigned long) element);
3878 }
3879
3880 static int __init
3881 init_QDIO(void)
3882 {
3883 int res;
3884 void *ptr;
3885
3886 printk("qdio: loading %s\n",version);
3887
3888 res=qdio_get_qdio_memory();
3889 if (res)
3890 return res;
3891
3892 qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q),
3893 256, 0, NULL);
3894 if (!qdio_q_cache) {
3895 qdio_release_qdio_memory();
3896 return -ENOMEM;
3897 }
3898
3899 res = qdio_register_dbf_views();
3900 if (res) {
3901 kmem_cache_destroy(qdio_q_cache);
3902 qdio_release_qdio_memory();
3903 return res;
3904 }
3905
3906 QDIO_DBF_TEXT0(0,setup,"initQDIO");
3907 res = bus_create_file(&ccw_bus_type, &bus_attr_qdio_performance_stats);
3908
3909 memset((void*)&perf_stats,0,sizeof(perf_stats));
3910 QDIO_DBF_TEXT0(0,setup,"perfstat");
3911 ptr=&perf_stats;
3912 QDIO_DBF_HEX0(0,setup,&ptr,sizeof(void*));
3913
3914 qdio_add_procfs_entry();
3915
3916 qdio_mempool_scssc = mempool_create(QDIO_MEMPOOL_SCSSC_ELEMENTS,
3917 qdio_mempool_alloc,
3918 qdio_mempool_free, NULL);
3919
3920 if (tiqdio_check_chsc_availability())
3921 QDIO_PRINT_ERR("Not all CHSCs supported. Continuing.\n");
3922
3923 tiqdio_register_thinints();
3924
3925 return 0;
3926 }
3927
3928 static void __exit
3929 cleanup_QDIO(void)
3930 {
3931 tiqdio_unregister_thinints();
3932 qdio_remove_procfs_entry();
3933 qdio_release_qdio_memory();
3934 qdio_unregister_dbf_views();
3935 mempool_destroy(qdio_mempool_scssc);
3936 kmem_cache_destroy(qdio_q_cache);
3937 bus_remove_file(&ccw_bus_type, &bus_attr_qdio_performance_stats);
3938 printk("qdio: %s: module removed\n",version);
3939 }
3940
3941 module_init(init_QDIO);
3942 module_exit(cleanup_QDIO);
3943
3944 EXPORT_SYMBOL(qdio_allocate);
3945 EXPORT_SYMBOL(qdio_establish);
3946 EXPORT_SYMBOL(qdio_initialize);
3947 EXPORT_SYMBOL(qdio_activate);
3948 EXPORT_SYMBOL(do_QDIO);
3949 EXPORT_SYMBOL(qdio_shutdown);
3950 EXPORT_SYMBOL(qdio_free);
3951 EXPORT_SYMBOL(qdio_cleanup);
3952 EXPORT_SYMBOL(qdio_synchronize);
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