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[mirror_ubuntu-bionic-kernel.git] / drivers / s390 / cio / qdio.c
1 /*
2 *
3 * linux/drivers/s390/cio/qdio.c
4 *
5 * Linux for S/390 QDIO base support, Hipersocket base support
6 * version 2
7 *
8 * Copyright 2000,2002 IBM Corporation
9 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
10 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
11 *
12 * Restriction: only 63 iqdio subchannels would have its own indicator,
13 * after that, subsequent subchannels share one indicator
14 *
15 *
16 *
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2, or (at your option)
21 * any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 */
32
33 #include <linux/module.h>
34 #include <linux/init.h>
35
36 #include <linux/slab.h>
37 #include <linux/kernel.h>
38 #include <linux/proc_fs.h>
39 #include <linux/timer.h>
40 #include <linux/mempool.h>
41
42 #include <asm/ccwdev.h>
43 #include <asm/io.h>
44 #include <asm/atomic.h>
45 #include <asm/semaphore.h>
46 #include <asm/timex.h>
47
48 #include <asm/debug.h>
49 #include <asm/s390_rdev.h>
50 #include <asm/qdio.h>
51
52 #include "cio.h"
53 #include "css.h"
54 #include "device.h"
55 #include "airq.h"
56 #include "qdio.h"
57 #include "ioasm.h"
58 #include "chsc.h"
59
60 /****************** MODULE PARAMETER VARIABLES ********************/
61 MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>");
62 MODULE_DESCRIPTION("QDIO base support version 2, " \
63 "Copyright 2000 IBM Corporation");
64 MODULE_LICENSE("GPL");
65
66 /******************** HERE WE GO ***********************************/
67
68 static const char version[] = "QDIO base support version 2";
69
70 static int qdio_performance_stats = 0;
71 static int proc_perf_file_registration;
72 static struct qdio_perf_stats perf_stats;
73
74 static int hydra_thinints;
75 static int is_passthrough = 0;
76 static int omit_svs;
77
78 static int indicator_used[INDICATORS_PER_CACHELINE];
79 static __u32 * volatile indicators;
80 static __u32 volatile spare_indicator;
81 static atomic_t spare_indicator_usecount;
82 #define QDIO_MEMPOOL_SCSSC_ELEMENTS 2
83 static mempool_t *qdio_mempool_scssc;
84 static struct kmem_cache *qdio_q_cache;
85
86 static debug_info_t *qdio_dbf_setup;
87 static debug_info_t *qdio_dbf_sbal;
88 static debug_info_t *qdio_dbf_trace;
89 static debug_info_t *qdio_dbf_sense;
90 #ifdef CONFIG_QDIO_DEBUG
91 static debug_info_t *qdio_dbf_slsb_out;
92 static debug_info_t *qdio_dbf_slsb_in;
93 #endif /* CONFIG_QDIO_DEBUG */
94
95 /* iQDIO stuff: */
96 static volatile struct qdio_q *tiq_list=NULL; /* volatile as it could change
97 during a while loop */
98 static DEFINE_SPINLOCK(ttiq_list_lock);
99 static int register_thinint_result;
100 static void tiqdio_tl(unsigned long);
101 static DECLARE_TASKLET(tiqdio_tasklet,tiqdio_tl,0);
102
103 /* not a macro, as one of the arguments is atomic_read */
104 static inline int
105 qdio_min(int a,int b)
106 {
107 if (a<b)
108 return a;
109 else
110 return b;
111 }
112
113 /***************** SCRUBBER HELPER ROUTINES **********************/
114 #ifdef CONFIG_64BIT
115 static inline void qdio_perf_stat_inc(atomic64_t *count)
116 {
117 if (qdio_performance_stats)
118 atomic64_inc(count);
119 }
120
121 static inline void qdio_perf_stat_dec(atomic64_t *count)
122 {
123 if (qdio_performance_stats)
124 atomic64_dec(count);
125 }
126 #else /* CONFIG_64BIT */
127 static inline void qdio_perf_stat_inc(atomic_t *count)
128 {
129 if (qdio_performance_stats)
130 atomic_inc(count);
131 }
132
133 static inline void qdio_perf_stat_dec(atomic_t *count)
134 {
135 if (qdio_performance_stats)
136 atomic_dec(count);
137 }
138 #endif /* CONFIG_64BIT */
139
140 static inline __u64
141 qdio_get_micros(void)
142 {
143 return (get_clock() >> 12); /* time>>12 is microseconds */
144 }
145
146 /*
147 * unfortunately, we can't just xchg the values; in do_QDIO we want to reserve
148 * the q in any case, so that we'll not be interrupted when we are in
149 * qdio_mark_tiq... shouldn't have a really bad impact, as reserving almost
150 * ever works (last famous words)
151 */
152 static inline int
153 qdio_reserve_q(struct qdio_q *q)
154 {
155 return atomic_add_return(1,&q->use_count) - 1;
156 }
157
158 static inline void
159 qdio_release_q(struct qdio_q *q)
160 {
161 atomic_dec(&q->use_count);
162 }
163
164 /*check ccq */
165 static int
166 qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
167 {
168 char dbf_text[15];
169
170 if (ccq == 0 || ccq == 32)
171 return 0;
172 if (ccq == 96 || ccq == 97)
173 return 1;
174 /*notify devices immediately*/
175 sprintf(dbf_text,"%d", ccq);
176 QDIO_DBF_TEXT2(1,trace,dbf_text);
177 return -EIO;
178 }
179 /* EQBS: extract buffer states */
180 static int
181 qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
182 unsigned int *start, unsigned int *cnt)
183 {
184 struct qdio_irq *irq;
185 unsigned int tmp_cnt, q_no, ccq;
186 int rc ;
187 char dbf_text[15];
188
189 ccq = 0;
190 tmp_cnt = *cnt;
191 irq = (struct qdio_irq*)q->irq_ptr;
192 q_no = q->q_no;
193 if(!q->is_input_q)
194 q_no += irq->no_input_qs;
195 again:
196 ccq = do_eqbs(irq->sch_token, state, q_no, start, cnt);
197 rc = qdio_check_ccq(q, ccq);
198 if (rc == 1) {
199 QDIO_DBF_TEXT5(1,trace,"eqAGAIN");
200 goto again;
201 }
202 if (rc < 0) {
203 QDIO_DBF_TEXT2(1,trace,"eqberr");
204 sprintf(dbf_text,"%2x,%2x,%d,%d",tmp_cnt, *cnt, ccq, q_no);
205 QDIO_DBF_TEXT2(1,trace,dbf_text);
206 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
207 QDIO_STATUS_LOOK_FOR_ERROR,
208 0, 0, 0, -1, -1, q->int_parm);
209 return 0;
210 }
211 return (tmp_cnt - *cnt);
212 }
213
214 /* SQBS: set buffer states */
215 static int
216 qdio_do_sqbs(struct qdio_q *q, unsigned char state,
217 unsigned int *start, unsigned int *cnt)
218 {
219 struct qdio_irq *irq;
220 unsigned int tmp_cnt, q_no, ccq;
221 int rc;
222 char dbf_text[15];
223
224 ccq = 0;
225 tmp_cnt = *cnt;
226 irq = (struct qdio_irq*)q->irq_ptr;
227 q_no = q->q_no;
228 if(!q->is_input_q)
229 q_no += irq->no_input_qs;
230 again:
231 ccq = do_sqbs(irq->sch_token, state, q_no, start, cnt);
232 rc = qdio_check_ccq(q, ccq);
233 if (rc == 1) {
234 QDIO_DBF_TEXT5(1,trace,"sqAGAIN");
235 goto again;
236 }
237 if (rc < 0) {
238 QDIO_DBF_TEXT3(1,trace,"sqberr");
239 sprintf(dbf_text,"%2x,%2x",tmp_cnt,*cnt);
240 QDIO_DBF_TEXT3(1,trace,dbf_text);
241 sprintf(dbf_text,"%d,%d",ccq,q_no);
242 QDIO_DBF_TEXT3(1,trace,dbf_text);
243 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
244 QDIO_STATUS_LOOK_FOR_ERROR,
245 0, 0, 0, -1, -1, q->int_parm);
246 return 0;
247 }
248 return (tmp_cnt - *cnt);
249 }
250
251 static inline int
252 qdio_set_slsb(struct qdio_q *q, unsigned int *bufno,
253 unsigned char state, unsigned int *count)
254 {
255 volatile char *slsb;
256 struct qdio_irq *irq;
257
258 irq = (struct qdio_irq*)q->irq_ptr;
259 if (!irq->is_qebsm) {
260 slsb = (char *)&q->slsb.acc.val[(*bufno)];
261 xchg(slsb, state);
262 return 1;
263 }
264 return qdio_do_sqbs(q, state, bufno, count);
265 }
266
267 #ifdef CONFIG_QDIO_DEBUG
268 static inline void
269 qdio_trace_slsb(struct qdio_q *q)
270 {
271 if (q->queue_type==QDIO_TRACE_QTYPE) {
272 if (q->is_input_q)
273 QDIO_DBF_HEX2(0,slsb_in,&q->slsb,
274 QDIO_MAX_BUFFERS_PER_Q);
275 else
276 QDIO_DBF_HEX2(0,slsb_out,&q->slsb,
277 QDIO_MAX_BUFFERS_PER_Q);
278 }
279 }
280 #endif
281
282 static inline int
283 set_slsb(struct qdio_q *q, unsigned int *bufno,
284 unsigned char state, unsigned int *count)
285 {
286 int rc;
287 #ifdef CONFIG_QDIO_DEBUG
288 qdio_trace_slsb(q);
289 #endif
290 rc = qdio_set_slsb(q, bufno, state, count);
291 #ifdef CONFIG_QDIO_DEBUG
292 qdio_trace_slsb(q);
293 #endif
294 return rc;
295 }
296 static inline int
297 qdio_siga_sync(struct qdio_q *q, unsigned int gpr2,
298 unsigned int gpr3)
299 {
300 int cc;
301
302 QDIO_DBF_TEXT4(0,trace,"sigasync");
303 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
304
305 qdio_perf_stat_inc(&perf_stats.siga_syncs);
306
307 cc = do_siga_sync(q->schid, gpr2, gpr3);
308 if (cc)
309 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
310
311 return cc;
312 }
313
314 static inline int
315 qdio_siga_sync_q(struct qdio_q *q)
316 {
317 if (q->is_input_q)
318 return qdio_siga_sync(q, 0, q->mask);
319 return qdio_siga_sync(q, q->mask, 0);
320 }
321
322 static int
323 __do_siga_output(struct qdio_q *q, unsigned int *busy_bit)
324 {
325 struct qdio_irq *irq;
326 unsigned int fc = 0;
327 unsigned long schid;
328
329 irq = (struct qdio_irq *) q->irq_ptr;
330 if (!irq->is_qebsm)
331 schid = *((u32 *)&q->schid);
332 else {
333 schid = irq->sch_token;
334 fc |= 0x80;
335 }
336 return do_siga_output(schid, q->mask, busy_bit, fc);
337 }
338
339 /*
340 * returns QDIO_SIGA_ERROR_ACCESS_EXCEPTION as cc, when SIGA returns
341 * an access exception
342 */
343 static int
344 qdio_siga_output(struct qdio_q *q)
345 {
346 int cc;
347 __u32 busy_bit;
348 __u64 start_time=0;
349
350 qdio_perf_stat_inc(&perf_stats.siga_outs);
351
352 QDIO_DBF_TEXT4(0,trace,"sigaout");
353 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
354
355 for (;;) {
356 cc = __do_siga_output(q, &busy_bit);
357 //QDIO_PRINT_ERR("cc=%x, busy=%x\n",cc,busy_bit);
358 if ((cc==2) && (busy_bit) && (q->is_iqdio_q)) {
359 if (!start_time)
360 start_time=NOW;
361 if ((NOW-start_time)>QDIO_BUSY_BIT_PATIENCE)
362 break;
363 } else
364 break;
365 }
366
367 if ((cc==2) && (busy_bit))
368 cc |= QDIO_SIGA_ERROR_B_BIT_SET;
369
370 if (cc)
371 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
372
373 return cc;
374 }
375
376 static int
377 qdio_siga_input(struct qdio_q *q)
378 {
379 int cc;
380
381 QDIO_DBF_TEXT4(0,trace,"sigain");
382 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
383
384 qdio_perf_stat_inc(&perf_stats.siga_ins);
385
386 cc = do_siga_input(q->schid, q->mask);
387
388 if (cc)
389 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
390
391 return cc;
392 }
393
394 /* locked by the locks in qdio_activate and qdio_cleanup */
395 static __u32 *
396 qdio_get_indicator(void)
397 {
398 int i;
399
400 for (i=1;i<INDICATORS_PER_CACHELINE;i++)
401 if (!indicator_used[i]) {
402 indicator_used[i]=1;
403 return indicators+i;
404 }
405 atomic_inc(&spare_indicator_usecount);
406 return (__u32 * volatile) &spare_indicator;
407 }
408
409 /* locked by the locks in qdio_activate and qdio_cleanup */
410 static void
411 qdio_put_indicator(__u32 *addr)
412 {
413 int i;
414
415 if ( (addr) && (addr!=&spare_indicator) ) {
416 i=addr-indicators;
417 indicator_used[i]=0;
418 }
419 if (addr == &spare_indicator)
420 atomic_dec(&spare_indicator_usecount);
421 }
422
423 static inline void
424 tiqdio_clear_summary_bit(__u32 *location)
425 {
426 QDIO_DBF_TEXT5(0,trace,"clrsummb");
427 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
428
429 xchg(location,0);
430 }
431
432 static inline void
433 tiqdio_set_summary_bit(__u32 *location)
434 {
435 QDIO_DBF_TEXT5(0,trace,"setsummb");
436 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
437
438 xchg(location,-1);
439 }
440
441 static inline void
442 tiqdio_sched_tl(void)
443 {
444 tasklet_hi_schedule(&tiqdio_tasklet);
445 }
446
447 static void
448 qdio_mark_tiq(struct qdio_q *q)
449 {
450 unsigned long flags;
451
452 QDIO_DBF_TEXT4(0,trace,"mark iq");
453 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
454
455 spin_lock_irqsave(&ttiq_list_lock,flags);
456 if (unlikely(atomic_read(&q->is_in_shutdown)))
457 goto out_unlock;
458
459 if (!q->is_input_q)
460 goto out_unlock;
461
462 if ((q->list_prev) || (q->list_next))
463 goto out_unlock;
464
465 if (!tiq_list) {
466 tiq_list=q;
467 q->list_prev=q;
468 q->list_next=q;
469 } else {
470 q->list_next=tiq_list;
471 q->list_prev=tiq_list->list_prev;
472 tiq_list->list_prev->list_next=q;
473 tiq_list->list_prev=q;
474 }
475 spin_unlock_irqrestore(&ttiq_list_lock,flags);
476
477 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
478 tiqdio_sched_tl();
479 return;
480 out_unlock:
481 spin_unlock_irqrestore(&ttiq_list_lock,flags);
482 return;
483 }
484
485 static inline void
486 qdio_mark_q(struct qdio_q *q)
487 {
488 QDIO_DBF_TEXT4(0,trace,"mark q");
489 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
490
491 if (unlikely(atomic_read(&q->is_in_shutdown)))
492 return;
493
494 tasklet_schedule(&q->tasklet);
495 }
496
497 static int
498 qdio_stop_polling(struct qdio_q *q)
499 {
500 #ifdef QDIO_USE_PROCESSING_STATE
501 unsigned int tmp, gsf, count = 1;
502 unsigned char state = 0;
503 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
504
505 if (!atomic_xchg(&q->polling,0))
506 return 1;
507
508 QDIO_DBF_TEXT4(0,trace,"stoppoll");
509 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
510
511 /* show the card that we are not polling anymore */
512 if (!q->is_input_q)
513 return 1;
514
515 tmp = gsf = GET_SAVED_FRONTIER(q);
516 tmp = ((tmp + QDIO_MAX_BUFFERS_PER_Q-1) & (QDIO_MAX_BUFFERS_PER_Q-1) );
517 set_slsb(q, &tmp, SLSB_P_INPUT_NOT_INIT, &count);
518
519 /*
520 * we don't issue this SYNC_MEMORY, as we trust Rick T and
521 * moreover will not use the PROCESSING state under VM, so
522 * q->polling was 0 anyway
523 */
524 /*SYNC_MEMORY;*/
525 if (irq->is_qebsm) {
526 count = 1;
527 qdio_do_eqbs(q, &state, &gsf, &count);
528 } else
529 state = q->slsb.acc.val[gsf];
530 if (state != SLSB_P_INPUT_PRIMED)
531 return 1;
532 /*
533 * set our summary bit again, as otherwise there is a
534 * small window we can miss between resetting it and
535 * checking for PRIMED state
536 */
537 if (q->is_thinint_q)
538 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
539 return 0;
540
541 #else /* QDIO_USE_PROCESSING_STATE */
542 return 1;
543 #endif /* QDIO_USE_PROCESSING_STATE */
544 }
545
546 /*
547 * see the comment in do_QDIO and before qdio_reserve_q about the
548 * sophisticated locking outside of unmark_q, so that we don't need to
549 * disable the interrupts :-)
550 */
551 static void
552 qdio_unmark_q(struct qdio_q *q)
553 {
554 unsigned long flags;
555
556 QDIO_DBF_TEXT4(0,trace,"unmark q");
557 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
558
559 if ((!q->list_prev)||(!q->list_next))
560 return;
561
562 if ((q->is_thinint_q)&&(q->is_input_q)) {
563 /* iQDIO */
564 spin_lock_irqsave(&ttiq_list_lock,flags);
565 /* in case cleanup has done this already and simultanously
566 * qdio_unmark_q is called from the interrupt handler, we've
567 * got to check this in this specific case again */
568 if ((!q->list_prev)||(!q->list_next))
569 goto out;
570 if (q->list_next==q) {
571 /* q was the only interesting q */
572 tiq_list=NULL;
573 q->list_next=NULL;
574 q->list_prev=NULL;
575 } else {
576 q->list_next->list_prev=q->list_prev;
577 q->list_prev->list_next=q->list_next;
578 tiq_list=q->list_next;
579 q->list_next=NULL;
580 q->list_prev=NULL;
581 }
582 out:
583 spin_unlock_irqrestore(&ttiq_list_lock,flags);
584 }
585 }
586
587 static inline unsigned long
588 tiqdio_clear_global_summary(void)
589 {
590 unsigned long time;
591
592 QDIO_DBF_TEXT5(0,trace,"clrglobl");
593
594 time = do_clear_global_summary();
595
596 QDIO_DBF_HEX5(0,trace,&time,sizeof(unsigned long));
597
598 return time;
599 }
600
601
602 /************************* OUTBOUND ROUTINES *******************************/
603 static int
604 qdio_qebsm_get_outbound_buffer_frontier(struct qdio_q *q)
605 {
606 struct qdio_irq *irq;
607 unsigned char state;
608 unsigned int cnt, count, ftc;
609
610 irq = (struct qdio_irq *) q->irq_ptr;
611 if ((!q->is_iqdio_q) && (!q->hydra_gives_outbound_pcis))
612 SYNC_MEMORY;
613
614 ftc = q->first_to_check;
615 count = qdio_min(atomic_read(&q->number_of_buffers_used),
616 (QDIO_MAX_BUFFERS_PER_Q-1));
617 if (count == 0)
618 return q->first_to_check;
619 cnt = qdio_do_eqbs(q, &state, &ftc, &count);
620 if (cnt == 0)
621 return q->first_to_check;
622 switch (state) {
623 case SLSB_P_OUTPUT_ERROR:
624 QDIO_DBF_TEXT3(0,trace,"outperr");
625 atomic_sub(cnt , &q->number_of_buffers_used);
626 if (q->qdio_error)
627 q->error_status_flags |=
628 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
629 q->qdio_error = SLSB_P_OUTPUT_ERROR;
630 q->error_status_flags |= QDIO_STATUS_LOOK_FOR_ERROR;
631 q->first_to_check = ftc;
632 break;
633 case SLSB_P_OUTPUT_EMPTY:
634 QDIO_DBF_TEXT5(0,trace,"outpempt");
635 atomic_sub(cnt, &q->number_of_buffers_used);
636 q->first_to_check = ftc;
637 break;
638 case SLSB_CU_OUTPUT_PRIMED:
639 /* all buffers primed */
640 QDIO_DBF_TEXT5(0,trace,"outpprim");
641 break;
642 default:
643 break;
644 }
645 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
646 return q->first_to_check;
647 }
648
649 static int
650 qdio_qebsm_get_inbound_buffer_frontier(struct qdio_q *q)
651 {
652 struct qdio_irq *irq;
653 unsigned char state;
654 int tmp, ftc, count, cnt;
655 char dbf_text[15];
656
657
658 irq = (struct qdio_irq *) q->irq_ptr;
659 ftc = q->first_to_check;
660 count = qdio_min(atomic_read(&q->number_of_buffers_used),
661 (QDIO_MAX_BUFFERS_PER_Q-1));
662 if (count == 0)
663 return q->first_to_check;
664 cnt = qdio_do_eqbs(q, &state, &ftc, &count);
665 if (cnt == 0)
666 return q->first_to_check;
667 switch (state) {
668 case SLSB_P_INPUT_ERROR :
669 #ifdef CONFIG_QDIO_DEBUG
670 QDIO_DBF_TEXT3(1,trace,"inperr");
671 sprintf(dbf_text,"%2x,%2x",ftc,count);
672 QDIO_DBF_TEXT3(1,trace,dbf_text);
673 #endif /* CONFIG_QDIO_DEBUG */
674 if (q->qdio_error)
675 q->error_status_flags |=
676 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
677 q->qdio_error = SLSB_P_INPUT_ERROR;
678 q->error_status_flags |= QDIO_STATUS_LOOK_FOR_ERROR;
679 atomic_sub(cnt, &q->number_of_buffers_used);
680 q->first_to_check = ftc;
681 break;
682 case SLSB_P_INPUT_PRIMED :
683 QDIO_DBF_TEXT3(0,trace,"inptprim");
684 sprintf(dbf_text,"%2x,%2x",ftc,count);
685 QDIO_DBF_TEXT3(1,trace,dbf_text);
686 tmp = 0;
687 ftc = q->first_to_check;
688 #ifdef QDIO_USE_PROCESSING_STATE
689 if (cnt > 1) {
690 cnt -= 1;
691 tmp = set_slsb(q, &ftc, SLSB_P_INPUT_NOT_INIT, &cnt);
692 if (!tmp)
693 break;
694 }
695 cnt = 1;
696 tmp += set_slsb(q, &ftc,
697 SLSB_P_INPUT_PROCESSING, &cnt);
698 atomic_set(&q->polling, 1);
699 #else
700 tmp = set_slsb(q, &ftc, SLSB_P_INPUT_NOT_INIT, &cnt);
701 #endif
702 atomic_sub(tmp, &q->number_of_buffers_used);
703 q->first_to_check = ftc;
704 break;
705 case SLSB_CU_INPUT_EMPTY:
706 case SLSB_P_INPUT_NOT_INIT:
707 case SLSB_P_INPUT_PROCESSING:
708 QDIO_DBF_TEXT5(0,trace,"inpnipro");
709 break;
710 default:
711 break;
712 }
713 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
714 return q->first_to_check;
715 }
716
717 static int
718 qdio_get_outbound_buffer_frontier(struct qdio_q *q)
719 {
720 struct qdio_irq *irq;
721 volatile char *slsb;
722 unsigned int count = 1;
723 int first_not_to_check, f, f_mod_no;
724 char dbf_text[15];
725
726 QDIO_DBF_TEXT4(0,trace,"getobfro");
727 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
728
729 irq = (struct qdio_irq *) q->irq_ptr;
730 if (irq->is_qebsm)
731 return qdio_qebsm_get_outbound_buffer_frontier(q);
732
733 slsb=&q->slsb.acc.val[0];
734 f_mod_no=f=q->first_to_check;
735 /*
736 * f points to already processed elements, so f+no_used is correct...
737 * ... but: we don't check 128 buffers, as otherwise
738 * qdio_has_outbound_q_moved would return 0
739 */
740 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
741 (QDIO_MAX_BUFFERS_PER_Q-1));
742
743 if ((!q->is_iqdio_q)&&(!q->hydra_gives_outbound_pcis))
744 SYNC_MEMORY;
745
746 check_next:
747 if (f==first_not_to_check)
748 goto out;
749
750 switch(slsb[f_mod_no]) {
751
752 /* the adapter has not fetched the output yet */
753 case SLSB_CU_OUTPUT_PRIMED:
754 QDIO_DBF_TEXT5(0,trace,"outpprim");
755 break;
756
757 /* the adapter got it */
758 case SLSB_P_OUTPUT_EMPTY:
759 atomic_dec(&q->number_of_buffers_used);
760 f++;
761 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
762 QDIO_DBF_TEXT5(0,trace,"outpempt");
763 goto check_next;
764
765 case SLSB_P_OUTPUT_ERROR:
766 QDIO_DBF_TEXT3(0,trace,"outperr");
767 sprintf(dbf_text,"%x-%x-%x",f_mod_no,
768 q->sbal[f_mod_no]->element[14].sbalf.value,
769 q->sbal[f_mod_no]->element[15].sbalf.value);
770 QDIO_DBF_TEXT3(1,trace,dbf_text);
771 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
772
773 /* kind of process the buffer */
774 set_slsb(q, &f_mod_no, SLSB_P_OUTPUT_NOT_INIT, &count);
775
776 /*
777 * we increment the frontier, as this buffer
778 * was processed obviously
779 */
780 atomic_dec(&q->number_of_buffers_used);
781 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
782
783 if (q->qdio_error)
784 q->error_status_flags|=
785 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
786 q->qdio_error=SLSB_P_OUTPUT_ERROR;
787 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
788
789 break;
790
791 /* no new buffers */
792 default:
793 QDIO_DBF_TEXT5(0,trace,"outpni");
794 }
795 out:
796 return (q->first_to_check=f_mod_no);
797 }
798
799 /* all buffers are processed */
800 static int
801 qdio_is_outbound_q_done(struct qdio_q *q)
802 {
803 int no_used;
804 #ifdef CONFIG_QDIO_DEBUG
805 char dbf_text[15];
806 #endif
807
808 no_used=atomic_read(&q->number_of_buffers_used);
809
810 #ifdef CONFIG_QDIO_DEBUG
811 if (no_used) {
812 sprintf(dbf_text,"oqisnt%02x",no_used);
813 QDIO_DBF_TEXT4(0,trace,dbf_text);
814 } else {
815 QDIO_DBF_TEXT4(0,trace,"oqisdone");
816 }
817 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
818 #endif /* CONFIG_QDIO_DEBUG */
819 return (no_used==0);
820 }
821
822 static int
823 qdio_has_outbound_q_moved(struct qdio_q *q)
824 {
825 int i;
826
827 i=qdio_get_outbound_buffer_frontier(q);
828
829 if ( (i!=GET_SAVED_FRONTIER(q)) ||
830 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
831 SAVE_FRONTIER(q,i);
832 QDIO_DBF_TEXT4(0,trace,"oqhasmvd");
833 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
834 return 1;
835 } else {
836 QDIO_DBF_TEXT4(0,trace,"oqhsntmv");
837 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
838 return 0;
839 }
840 }
841
842 static void
843 qdio_kick_outbound_q(struct qdio_q *q)
844 {
845 int result;
846 #ifdef CONFIG_QDIO_DEBUG
847 char dbf_text[15];
848
849 QDIO_DBF_TEXT4(0,trace,"kickoutq");
850 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
851 #endif /* CONFIG_QDIO_DEBUG */
852
853 if (!q->siga_out)
854 return;
855
856 /* here's the story with cc=2 and busy bit set (thanks, Rick):
857 * VM's CP could present us cc=2 and busy bit set on SIGA-write
858 * during reconfiguration of their Guest LAN (only in HIPERS mode,
859 * QDIO mode is asynchronous -- cc=2 and busy bit there will take
860 * the queues down immediately; and not being under VM we have a
861 * problem on cc=2 and busy bit set right away).
862 *
863 * Therefore qdio_siga_output will try for a short time constantly,
864 * if such a condition occurs. If it doesn't change, it will
865 * increase the busy_siga_counter and save the timestamp, and
866 * schedule the queue for later processing (via mark_q, using the
867 * queue tasklet). __qdio_outbound_processing will check out the
868 * counter. If non-zero, it will call qdio_kick_outbound_q as often
869 * as the value of the counter. This will attempt further SIGA
870 * instructions. For each successful SIGA, the counter is
871 * decreased, for failing SIGAs the counter remains the same, after
872 * all.
873 * After some time of no movement, qdio_kick_outbound_q will
874 * finally fail and reflect corresponding error codes to call
875 * the upper layer module and have it take the queues down.
876 *
877 * Note that this is a change from the original HiperSockets design
878 * (saying cc=2 and busy bit means take the queues down), but in
879 * these days Guest LAN didn't exist... excessive cc=2 with busy bit
880 * conditions will still take the queues down, but the threshold is
881 * higher due to the Guest LAN environment.
882 */
883
884
885 result=qdio_siga_output(q);
886
887 switch (result) {
888 case 0:
889 /* went smooth this time, reset timestamp */
890 #ifdef CONFIG_QDIO_DEBUG
891 QDIO_DBF_TEXT3(0,trace,"cc2reslv");
892 sprintf(dbf_text,"%4x%2x%2x",q->schid.sch_no,q->q_no,
893 atomic_read(&q->busy_siga_counter));
894 QDIO_DBF_TEXT3(0,trace,dbf_text);
895 #endif /* CONFIG_QDIO_DEBUG */
896 q->timing.busy_start=0;
897 break;
898 case (2|QDIO_SIGA_ERROR_B_BIT_SET):
899 /* cc=2 and busy bit: */
900 atomic_inc(&q->busy_siga_counter);
901
902 /* if the last siga was successful, save
903 * timestamp here */
904 if (!q->timing.busy_start)
905 q->timing.busy_start=NOW;
906
907 /* if we're in time, don't touch error_status_flags
908 * and siga_error */
909 if (NOW-q->timing.busy_start<QDIO_BUSY_BIT_GIVE_UP) {
910 qdio_mark_q(q);
911 break;
912 }
913 QDIO_DBF_TEXT2(0,trace,"cc2REPRT");
914 #ifdef CONFIG_QDIO_DEBUG
915 sprintf(dbf_text,"%4x%2x%2x",q->schid.sch_no,q->q_no,
916 atomic_read(&q->busy_siga_counter));
917 QDIO_DBF_TEXT3(0,trace,dbf_text);
918 #endif /* CONFIG_QDIO_DEBUG */
919 /* else fallthrough and report error */
920 default:
921 /* for plain cc=1, 2 or 3: */
922 if (q->siga_error)
923 q->error_status_flags|=
924 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
925 q->error_status_flags|=
926 QDIO_STATUS_LOOK_FOR_ERROR;
927 q->siga_error=result;
928 }
929 }
930
931 static void
932 qdio_kick_outbound_handler(struct qdio_q *q)
933 {
934 int start, end, real_end, count;
935 #ifdef CONFIG_QDIO_DEBUG
936 char dbf_text[15];
937 #endif
938
939 start = q->first_element_to_kick;
940 /* last_move_ftc was just updated */
941 real_end = GET_SAVED_FRONTIER(q);
942 end = (real_end+QDIO_MAX_BUFFERS_PER_Q-1)&
943 (QDIO_MAX_BUFFERS_PER_Q-1);
944 count = (end+QDIO_MAX_BUFFERS_PER_Q+1-start)&
945 (QDIO_MAX_BUFFERS_PER_Q-1);
946
947 #ifdef CONFIG_QDIO_DEBUG
948 QDIO_DBF_TEXT4(0,trace,"kickouth");
949 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
950
951 sprintf(dbf_text,"s=%2xc=%2x",start,count);
952 QDIO_DBF_TEXT4(0,trace,dbf_text);
953 #endif /* CONFIG_QDIO_DEBUG */
954
955 if (q->state==QDIO_IRQ_STATE_ACTIVE)
956 q->handler(q->cdev,QDIO_STATUS_OUTBOUND_INT|
957 q->error_status_flags,
958 q->qdio_error,q->siga_error,q->q_no,start,count,
959 q->int_parm);
960
961 /* for the next time: */
962 q->first_element_to_kick=real_end;
963 q->qdio_error=0;
964 q->siga_error=0;
965 q->error_status_flags=0;
966 }
967
968 static void
969 __qdio_outbound_processing(struct qdio_q *q)
970 {
971 int siga_attempts;
972
973 QDIO_DBF_TEXT4(0,trace,"qoutproc");
974 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
975
976 if (unlikely(qdio_reserve_q(q))) {
977 qdio_release_q(q);
978 qdio_perf_stat_inc(&perf_stats.outbound_tl_runs_resched);
979 /* as we're sissies, we'll check next time */
980 if (likely(!atomic_read(&q->is_in_shutdown))) {
981 qdio_mark_q(q);
982 QDIO_DBF_TEXT4(0,trace,"busy,agn");
983 }
984 return;
985 }
986 qdio_perf_stat_inc(&perf_stats.outbound_tl_runs);
987 qdio_perf_stat_inc(&perf_stats.tl_runs);
988
989 /* see comment in qdio_kick_outbound_q */
990 siga_attempts=atomic_read(&q->busy_siga_counter);
991 while (siga_attempts) {
992 atomic_dec(&q->busy_siga_counter);
993 qdio_kick_outbound_q(q);
994 siga_attempts--;
995 }
996
997 if (qdio_has_outbound_q_moved(q))
998 qdio_kick_outbound_handler(q);
999
1000 if (q->queue_type == QDIO_ZFCP_QFMT) {
1001 if ((!q->hydra_gives_outbound_pcis) &&
1002 (!qdio_is_outbound_q_done(q)))
1003 qdio_mark_q(q);
1004 }
1005 else if (((!q->is_iqdio_q) && (!q->is_pci_out)) ||
1006 (q->queue_type == QDIO_IQDIO_QFMT_ASYNCH)) {
1007 /*
1008 * make sure buffer switch from PRIMED to EMPTY is noticed
1009 * and outbound_handler is called
1010 */
1011 if (qdio_is_outbound_q_done(q)) {
1012 del_timer(&q->timer);
1013 } else {
1014 if (!timer_pending(&q->timer))
1015 mod_timer(&q->timer, jiffies +
1016 QDIO_FORCE_CHECK_TIMEOUT);
1017 }
1018 }
1019
1020 qdio_release_q(q);
1021 }
1022
1023 static void
1024 qdio_outbound_processing(struct qdio_q *q)
1025 {
1026 __qdio_outbound_processing(q);
1027 }
1028
1029 /************************* INBOUND ROUTINES *******************************/
1030
1031
1032 static int
1033 qdio_get_inbound_buffer_frontier(struct qdio_q *q)
1034 {
1035 struct qdio_irq *irq;
1036 int f,f_mod_no;
1037 volatile char *slsb;
1038 unsigned int count = 1;
1039 int first_not_to_check;
1040 #ifdef CONFIG_QDIO_DEBUG
1041 char dbf_text[15];
1042 #endif /* CONFIG_QDIO_DEBUG */
1043 #ifdef QDIO_USE_PROCESSING_STATE
1044 int last_position=-1;
1045 #endif /* QDIO_USE_PROCESSING_STATE */
1046
1047 QDIO_DBF_TEXT4(0,trace,"getibfro");
1048 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1049
1050 irq = (struct qdio_irq *) q->irq_ptr;
1051 if (irq->is_qebsm)
1052 return qdio_qebsm_get_inbound_buffer_frontier(q);
1053
1054 slsb=&q->slsb.acc.val[0];
1055 f_mod_no=f=q->first_to_check;
1056 /*
1057 * we don't check 128 buffers, as otherwise qdio_has_inbound_q_moved
1058 * would return 0
1059 */
1060 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
1061 (QDIO_MAX_BUFFERS_PER_Q-1));
1062
1063 /*
1064 * we don't use this one, as a PCI or we after a thin interrupt
1065 * will sync the queues
1066 */
1067 /* SYNC_MEMORY;*/
1068
1069 check_next:
1070 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
1071 if (f==first_not_to_check)
1072 goto out;
1073 switch (slsb[f_mod_no]) {
1074
1075 /* CU_EMPTY means frontier is reached */
1076 case SLSB_CU_INPUT_EMPTY:
1077 QDIO_DBF_TEXT5(0,trace,"inptempt");
1078 break;
1079
1080 /* P_PRIMED means set slsb to P_PROCESSING and move on */
1081 case SLSB_P_INPUT_PRIMED:
1082 QDIO_DBF_TEXT5(0,trace,"inptprim");
1083
1084 #ifdef QDIO_USE_PROCESSING_STATE
1085 /*
1086 * as soon as running under VM, polling the input queues will
1087 * kill VM in terms of CP overhead
1088 */
1089 if (q->siga_sync) {
1090 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1091 } else {
1092 /* set the previous buffer to NOT_INIT. The current
1093 * buffer will be set to PROCESSING at the end of
1094 * this function to avoid further interrupts. */
1095 if (last_position>=0)
1096 set_slsb(q, &last_position,
1097 SLSB_P_INPUT_NOT_INIT, &count);
1098 atomic_set(&q->polling,1);
1099 last_position=f_mod_no;
1100 }
1101 #else /* QDIO_USE_PROCESSING_STATE */
1102 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1103 #endif /* QDIO_USE_PROCESSING_STATE */
1104 /*
1105 * not needed, as the inbound queue will be synced on the next
1106 * siga-r, resp. tiqdio_is_inbound_q_done will do the siga-s
1107 */
1108 /*SYNC_MEMORY;*/
1109 f++;
1110 atomic_dec(&q->number_of_buffers_used);
1111 goto check_next;
1112
1113 case SLSB_P_INPUT_NOT_INIT:
1114 case SLSB_P_INPUT_PROCESSING:
1115 QDIO_DBF_TEXT5(0,trace,"inpnipro");
1116 break;
1117
1118 /* P_ERROR means frontier is reached, break and report error */
1119 case SLSB_P_INPUT_ERROR:
1120 #ifdef CONFIG_QDIO_DEBUG
1121 sprintf(dbf_text,"inperr%2x",f_mod_no);
1122 QDIO_DBF_TEXT3(1,trace,dbf_text);
1123 #endif /* CONFIG_QDIO_DEBUG */
1124 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
1125
1126 /* kind of process the buffer */
1127 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1128
1129 if (q->qdio_error)
1130 q->error_status_flags|=
1131 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
1132 q->qdio_error=SLSB_P_INPUT_ERROR;
1133 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
1134
1135 /* we increment the frontier, as this buffer
1136 * was processed obviously */
1137 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1138 atomic_dec(&q->number_of_buffers_used);
1139
1140 #ifdef QDIO_USE_PROCESSING_STATE
1141 last_position=-1;
1142 #endif /* QDIO_USE_PROCESSING_STATE */
1143
1144 break;
1145
1146 /* everything else means frontier not changed (HALTED or so) */
1147 default:
1148 break;
1149 }
1150 out:
1151 q->first_to_check=f_mod_no;
1152
1153 #ifdef QDIO_USE_PROCESSING_STATE
1154 if (last_position>=0)
1155 set_slsb(q, &last_position, SLSB_P_INPUT_PROCESSING, &count);
1156 #endif /* QDIO_USE_PROCESSING_STATE */
1157
1158 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
1159
1160 return q->first_to_check;
1161 }
1162
1163 static int
1164 qdio_has_inbound_q_moved(struct qdio_q *q)
1165 {
1166 int i;
1167
1168 i=qdio_get_inbound_buffer_frontier(q);
1169 if ( (i!=GET_SAVED_FRONTIER(q)) ||
1170 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
1171 SAVE_FRONTIER(q,i);
1172 if ((!q->siga_sync)&&(!q->hydra_gives_outbound_pcis))
1173 SAVE_TIMESTAMP(q);
1174
1175 QDIO_DBF_TEXT4(0,trace,"inhasmvd");
1176 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1177 return 1;
1178 } else {
1179 QDIO_DBF_TEXT4(0,trace,"inhsntmv");
1180 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1181 return 0;
1182 }
1183 }
1184
1185 /* means, no more buffers to be filled */
1186 static int
1187 tiqdio_is_inbound_q_done(struct qdio_q *q)
1188 {
1189 int no_used;
1190 unsigned int start_buf, count;
1191 unsigned char state = 0;
1192 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1193
1194 #ifdef CONFIG_QDIO_DEBUG
1195 char dbf_text[15];
1196 #endif
1197
1198 no_used=atomic_read(&q->number_of_buffers_used);
1199
1200 /* propagate the change from 82 to 80 through VM */
1201 SYNC_MEMORY;
1202
1203 #ifdef CONFIG_QDIO_DEBUG
1204 if (no_used) {
1205 sprintf(dbf_text,"iqisnt%02x",no_used);
1206 QDIO_DBF_TEXT4(0,trace,dbf_text);
1207 } else {
1208 QDIO_DBF_TEXT4(0,trace,"iniqisdo");
1209 }
1210 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1211 #endif /* CONFIG_QDIO_DEBUG */
1212
1213 if (!no_used)
1214 return 1;
1215 if (!q->siga_sync && !irq->is_qebsm)
1216 /* we'll check for more primed buffers in qeth_stop_polling */
1217 return 0;
1218 if (irq->is_qebsm) {
1219 count = 1;
1220 start_buf = q->first_to_check;
1221 qdio_do_eqbs(q, &state, &start_buf, &count);
1222 } else
1223 state = q->slsb.acc.val[q->first_to_check];
1224 if (state != SLSB_P_INPUT_PRIMED)
1225 /*
1226 * nothing more to do, if next buffer is not PRIMED.
1227 * note that we did a SYNC_MEMORY before, that there
1228 * has been a sychnronization.
1229 * we will return 0 below, as there is nothing to do
1230 * (stop_polling not necessary, as we have not been
1231 * using the PROCESSING state
1232 */
1233 return 0;
1234
1235 /*
1236 * ok, the next input buffer is primed. that means, that device state
1237 * change indicator and adapter local summary are set, so we will find
1238 * it next time.
1239 * we will return 0 below, as there is nothing to do, except scheduling
1240 * ourselves for the next time.
1241 */
1242 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1243 tiqdio_sched_tl();
1244 return 0;
1245 }
1246
1247 static int
1248 qdio_is_inbound_q_done(struct qdio_q *q)
1249 {
1250 int no_used;
1251 unsigned int start_buf, count;
1252 unsigned char state = 0;
1253 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1254
1255 #ifdef CONFIG_QDIO_DEBUG
1256 char dbf_text[15];
1257 #endif
1258
1259 no_used=atomic_read(&q->number_of_buffers_used);
1260
1261 /*
1262 * we need that one for synchronization with the adapter, as it
1263 * does a kind of PCI avoidance
1264 */
1265 SYNC_MEMORY;
1266
1267 if (!no_used) {
1268 QDIO_DBF_TEXT4(0,trace,"inqisdnA");
1269 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1270 return 1;
1271 }
1272 if (irq->is_qebsm) {
1273 count = 1;
1274 start_buf = q->first_to_check;
1275 qdio_do_eqbs(q, &state, &start_buf, &count);
1276 } else
1277 state = q->slsb.acc.val[q->first_to_check];
1278 if (state == SLSB_P_INPUT_PRIMED) {
1279 /* we got something to do */
1280 QDIO_DBF_TEXT4(0,trace,"inqisntA");
1281 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1282 return 0;
1283 }
1284
1285 /* on VM, we don't poll, so the q is always done here */
1286 if (q->siga_sync)
1287 return 1;
1288 if (q->hydra_gives_outbound_pcis)
1289 return 1;
1290
1291 /*
1292 * at this point we know, that inbound first_to_check
1293 * has (probably) not moved (see qdio_inbound_processing)
1294 */
1295 if (NOW>GET_SAVED_TIMESTAMP(q)+q->timing.threshold) {
1296 #ifdef CONFIG_QDIO_DEBUG
1297 QDIO_DBF_TEXT4(0,trace,"inqisdon");
1298 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1299 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1300 QDIO_DBF_TEXT4(0,trace,dbf_text);
1301 #endif /* CONFIG_QDIO_DEBUG */
1302 return 1;
1303 } else {
1304 #ifdef CONFIG_QDIO_DEBUG
1305 QDIO_DBF_TEXT4(0,trace,"inqisntd");
1306 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1307 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1308 QDIO_DBF_TEXT4(0,trace,dbf_text);
1309 #endif /* CONFIG_QDIO_DEBUG */
1310 return 0;
1311 }
1312 }
1313
1314 static void
1315 qdio_kick_inbound_handler(struct qdio_q *q)
1316 {
1317 int count, start, end, real_end, i;
1318 #ifdef CONFIG_QDIO_DEBUG
1319 char dbf_text[15];
1320 #endif
1321
1322 QDIO_DBF_TEXT4(0,trace,"kickinh");
1323 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1324
1325 start=q->first_element_to_kick;
1326 real_end=q->first_to_check;
1327 end=(real_end+QDIO_MAX_BUFFERS_PER_Q-1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1328
1329 i=start;
1330 count=0;
1331 while (1) {
1332 count++;
1333 if (i==end)
1334 break;
1335 i=(i+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1336 }
1337
1338 #ifdef CONFIG_QDIO_DEBUG
1339 sprintf(dbf_text,"s=%2xc=%2x",start,count);
1340 QDIO_DBF_TEXT4(0,trace,dbf_text);
1341 #endif /* CONFIG_QDIO_DEBUG */
1342
1343 if (likely(q->state==QDIO_IRQ_STATE_ACTIVE))
1344 q->handler(q->cdev,
1345 QDIO_STATUS_INBOUND_INT|q->error_status_flags,
1346 q->qdio_error,q->siga_error,q->q_no,start,count,
1347 q->int_parm);
1348
1349 /* for the next time: */
1350 q->first_element_to_kick=real_end;
1351 q->qdio_error=0;
1352 q->siga_error=0;
1353 q->error_status_flags=0;
1354
1355 qdio_perf_stat_inc(&perf_stats.inbound_cnt);
1356 }
1357
1358 static void
1359 __tiqdio_inbound_processing(struct qdio_q *q, int spare_ind_was_set)
1360 {
1361 struct qdio_irq *irq_ptr;
1362 struct qdio_q *oq;
1363 int i;
1364
1365 QDIO_DBF_TEXT4(0,trace,"iqinproc");
1366 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1367
1368 /*
1369 * we first want to reserve the q, so that we know, that we don't
1370 * interrupt ourselves and call qdio_unmark_q, as is_in_shutdown might
1371 * be set
1372 */
1373 if (unlikely(qdio_reserve_q(q))) {
1374 qdio_release_q(q);
1375 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs_resched);
1376 /*
1377 * as we might just be about to stop polling, we make
1378 * sure that we check again at least once more
1379 */
1380 tiqdio_sched_tl();
1381 return;
1382 }
1383 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs);
1384 if (unlikely(atomic_read(&q->is_in_shutdown))) {
1385 qdio_unmark_q(q);
1386 goto out;
1387 }
1388
1389 /*
1390 * we reset spare_ind_was_set, when the queue does not use the
1391 * spare indicator
1392 */
1393 if (spare_ind_was_set)
1394 spare_ind_was_set = (q->dev_st_chg_ind == &spare_indicator);
1395
1396 if (!(*(q->dev_st_chg_ind)) && !spare_ind_was_set)
1397 goto out;
1398 /*
1399 * q->dev_st_chg_ind is the indicator, be it shared or not.
1400 * only clear it, if indicator is non-shared
1401 */
1402 if (!spare_ind_was_set)
1403 tiqdio_clear_summary_bit((__u32*)q->dev_st_chg_ind);
1404
1405 if (q->hydra_gives_outbound_pcis) {
1406 if (!q->siga_sync_done_on_thinints) {
1407 SYNC_MEMORY_ALL;
1408 } else if ((!q->siga_sync_done_on_outb_tis)&&
1409 (q->hydra_gives_outbound_pcis)) {
1410 SYNC_MEMORY_ALL_OUTB;
1411 }
1412 } else {
1413 SYNC_MEMORY;
1414 }
1415 /*
1416 * maybe we have to do work on our outbound queues... at least
1417 * we have to check the outbound-int-capable thinint-capable
1418 * queues
1419 */
1420 if (q->hydra_gives_outbound_pcis) {
1421 irq_ptr = (struct qdio_irq*)q->irq_ptr;
1422 for (i=0;i<irq_ptr->no_output_qs;i++) {
1423 oq = irq_ptr->output_qs[i];
1424 if (!qdio_is_outbound_q_done(oq)) {
1425 qdio_perf_stat_dec(&perf_stats.tl_runs);
1426 __qdio_outbound_processing(oq);
1427 }
1428 }
1429 }
1430
1431 if (!qdio_has_inbound_q_moved(q))
1432 goto out;
1433
1434 qdio_kick_inbound_handler(q);
1435 if (tiqdio_is_inbound_q_done(q))
1436 if (!qdio_stop_polling(q)) {
1437 /*
1438 * we set the flags to get into the stuff next time,
1439 * see also comment in qdio_stop_polling
1440 */
1441 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1442 tiqdio_sched_tl();
1443 }
1444 out:
1445 qdio_release_q(q);
1446 }
1447
1448 static void
1449 tiqdio_inbound_processing(struct qdio_q *q)
1450 {
1451 __tiqdio_inbound_processing(q, atomic_read(&spare_indicator_usecount));
1452 }
1453
1454 static void
1455 __qdio_inbound_processing(struct qdio_q *q)
1456 {
1457 int q_laps=0;
1458
1459 QDIO_DBF_TEXT4(0,trace,"qinproc");
1460 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1461
1462 if (unlikely(qdio_reserve_q(q))) {
1463 qdio_release_q(q);
1464 qdio_perf_stat_inc(&perf_stats.inbound_tl_runs_resched);
1465 /* as we're sissies, we'll check next time */
1466 if (likely(!atomic_read(&q->is_in_shutdown))) {
1467 qdio_mark_q(q);
1468 QDIO_DBF_TEXT4(0,trace,"busy,agn");
1469 }
1470 return;
1471 }
1472 qdio_perf_stat_inc(&perf_stats.inbound_tl_runs);
1473 qdio_perf_stat_inc(&perf_stats.tl_runs);
1474
1475 again:
1476 if (qdio_has_inbound_q_moved(q)) {
1477 qdio_kick_inbound_handler(q);
1478 if (!qdio_stop_polling(q)) {
1479 q_laps++;
1480 if (q_laps<QDIO_Q_LAPS)
1481 goto again;
1482 }
1483 qdio_mark_q(q);
1484 } else {
1485 if (!qdio_is_inbound_q_done(q))
1486 /* means poll time is not yet over */
1487 qdio_mark_q(q);
1488 }
1489
1490 qdio_release_q(q);
1491 }
1492
1493 static void
1494 qdio_inbound_processing(struct qdio_q *q)
1495 {
1496 __qdio_inbound_processing(q);
1497 }
1498
1499 /************************* MAIN ROUTINES *******************************/
1500
1501 #ifdef QDIO_USE_PROCESSING_STATE
1502 static int
1503 tiqdio_reset_processing_state(struct qdio_q *q, int q_laps)
1504 {
1505 if (!q) {
1506 tiqdio_sched_tl();
1507 return 0;
1508 }
1509
1510 /*
1511 * under VM, we have not used the PROCESSING state, so no
1512 * need to stop polling
1513 */
1514 if (q->siga_sync)
1515 return 2;
1516
1517 if (unlikely(qdio_reserve_q(q))) {
1518 qdio_release_q(q);
1519 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs_resched);
1520 /*
1521 * as we might just be about to stop polling, we make
1522 * sure that we check again at least once more
1523 */
1524
1525 /*
1526 * sanity -- we'd get here without setting the
1527 * dev st chg ind
1528 */
1529 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1530 tiqdio_sched_tl();
1531 return 0;
1532 }
1533 if (qdio_stop_polling(q)) {
1534 qdio_release_q(q);
1535 return 2;
1536 }
1537 if (q_laps<QDIO_Q_LAPS-1) {
1538 qdio_release_q(q);
1539 return 3;
1540 }
1541 /*
1542 * we set the flags to get into the stuff
1543 * next time, see also comment in qdio_stop_polling
1544 */
1545 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1546 tiqdio_sched_tl();
1547 qdio_release_q(q);
1548 return 1;
1549
1550 }
1551 #endif /* QDIO_USE_PROCESSING_STATE */
1552
1553 static void
1554 tiqdio_inbound_checks(void)
1555 {
1556 struct qdio_q *q;
1557 int spare_ind_was_set=0;
1558 #ifdef QDIO_USE_PROCESSING_STATE
1559 int q_laps=0;
1560 #endif /* QDIO_USE_PROCESSING_STATE */
1561
1562 QDIO_DBF_TEXT4(0,trace,"iqdinbck");
1563 QDIO_DBF_TEXT5(0,trace,"iqlocsum");
1564
1565 #ifdef QDIO_USE_PROCESSING_STATE
1566 again:
1567 #endif /* QDIO_USE_PROCESSING_STATE */
1568
1569 /* when the spare indicator is used and set, save that and clear it */
1570 if ((atomic_read(&spare_indicator_usecount)) && spare_indicator) {
1571 spare_ind_was_set = 1;
1572 tiqdio_clear_summary_bit((__u32*)&spare_indicator);
1573 }
1574
1575 q=(struct qdio_q*)tiq_list;
1576 do {
1577 if (!q)
1578 break;
1579 __tiqdio_inbound_processing(q, spare_ind_was_set);
1580 q=(struct qdio_q*)q->list_next;
1581 } while (q!=(struct qdio_q*)tiq_list);
1582
1583 #ifdef QDIO_USE_PROCESSING_STATE
1584 q=(struct qdio_q*)tiq_list;
1585 do {
1586 int ret;
1587
1588 ret = tiqdio_reset_processing_state(q, q_laps);
1589 switch (ret) {
1590 case 0:
1591 return;
1592 case 1:
1593 q_laps++;
1594 case 2:
1595 q = (struct qdio_q*)q->list_next;
1596 break;
1597 default:
1598 q_laps++;
1599 goto again;
1600 }
1601 } while (q!=(struct qdio_q*)tiq_list);
1602 #endif /* QDIO_USE_PROCESSING_STATE */
1603 }
1604
1605 static void
1606 tiqdio_tl(unsigned long data)
1607 {
1608 QDIO_DBF_TEXT4(0,trace,"iqdio_tl");
1609
1610 qdio_perf_stat_inc(&perf_stats.tl_runs);
1611
1612 tiqdio_inbound_checks();
1613 }
1614
1615 /********************* GENERAL HELPER_ROUTINES ***********************/
1616
1617 static void
1618 qdio_release_irq_memory(struct qdio_irq *irq_ptr)
1619 {
1620 int i;
1621 struct qdio_q *q;
1622
1623 for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
1624 q = irq_ptr->input_qs[i];
1625 if (q) {
1626 free_page((unsigned long) q->slib);
1627 kmem_cache_free(qdio_q_cache, q);
1628 }
1629 q = irq_ptr->output_qs[i];
1630 if (q) {
1631 free_page((unsigned long) q->slib);
1632 kmem_cache_free(qdio_q_cache, q);
1633 }
1634 }
1635 free_page((unsigned long) irq_ptr->qdr);
1636 free_page((unsigned long) irq_ptr);
1637 }
1638
1639 static void
1640 qdio_set_impl_params(struct qdio_irq *irq_ptr,
1641 unsigned int qib_param_field_format,
1642 /* pointer to 128 bytes or NULL, if no param field */
1643 unsigned char *qib_param_field,
1644 /* pointer to no_queues*128 words of data or NULL */
1645 unsigned int no_input_qs,
1646 unsigned int no_output_qs,
1647 unsigned long *input_slib_elements,
1648 unsigned long *output_slib_elements)
1649 {
1650 int i,j;
1651
1652 if (!irq_ptr)
1653 return;
1654
1655 irq_ptr->qib.pfmt=qib_param_field_format;
1656 if (qib_param_field)
1657 memcpy(irq_ptr->qib.parm,qib_param_field,
1658 QDIO_MAX_BUFFERS_PER_Q);
1659
1660 if (input_slib_elements)
1661 for (i=0;i<no_input_qs;i++) {
1662 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1663 irq_ptr->input_qs[i]->slib->slibe[j].parms=
1664 input_slib_elements[
1665 i*QDIO_MAX_BUFFERS_PER_Q+j];
1666 }
1667 if (output_slib_elements)
1668 for (i=0;i<no_output_qs;i++) {
1669 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1670 irq_ptr->output_qs[i]->slib->slibe[j].parms=
1671 output_slib_elements[
1672 i*QDIO_MAX_BUFFERS_PER_Q+j];
1673 }
1674 }
1675
1676 static int
1677 qdio_alloc_qs(struct qdio_irq *irq_ptr,
1678 int no_input_qs, int no_output_qs)
1679 {
1680 int i;
1681 struct qdio_q *q;
1682
1683 for (i = 0; i < no_input_qs; i++) {
1684 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
1685 if (!q)
1686 return -ENOMEM;
1687 memset(q, 0, sizeof(*q));
1688
1689 q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
1690 if (!q->slib) {
1691 kmem_cache_free(qdio_q_cache, q);
1692 return -ENOMEM;
1693 }
1694 irq_ptr->input_qs[i]=q;
1695 }
1696
1697 for (i = 0; i < no_output_qs; i++) {
1698 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
1699 if (!q)
1700 return -ENOMEM;
1701 memset(q, 0, sizeof(*q));
1702
1703 q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
1704 if (!q->slib) {
1705 kmem_cache_free(qdio_q_cache, q);
1706 return -ENOMEM;
1707 }
1708 irq_ptr->output_qs[i]=q;
1709 }
1710 return 0;
1711 }
1712
1713 static void
1714 qdio_fill_qs(struct qdio_irq *irq_ptr, struct ccw_device *cdev,
1715 int no_input_qs, int no_output_qs,
1716 qdio_handler_t *input_handler,
1717 qdio_handler_t *output_handler,
1718 unsigned long int_parm,int q_format,
1719 unsigned long flags,
1720 void **inbound_sbals_array,
1721 void **outbound_sbals_array)
1722 {
1723 struct qdio_q *q;
1724 int i,j;
1725 char dbf_text[20]; /* see qdio_initialize */
1726 void *ptr;
1727 int available;
1728
1729 sprintf(dbf_text,"qfqs%4x",cdev->private->schid.sch_no);
1730 QDIO_DBF_TEXT0(0,setup,dbf_text);
1731 for (i=0;i<no_input_qs;i++) {
1732 q=irq_ptr->input_qs[i];
1733
1734 memset(q,0,((char*)&q->slib)-((char*)q));
1735 sprintf(dbf_text,"in-q%4x",i);
1736 QDIO_DBF_TEXT0(0,setup,dbf_text);
1737 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1738
1739 memset(q->slib,0,PAGE_SIZE);
1740 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1741
1742 available=0;
1743
1744 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1745 q->sbal[j]=*(inbound_sbals_array++);
1746
1747 q->queue_type=q_format;
1748 q->int_parm=int_parm;
1749 q->schid = irq_ptr->schid;
1750 q->irq_ptr = irq_ptr;
1751 q->cdev = cdev;
1752 q->mask=1<<(31-i);
1753 q->q_no=i;
1754 q->is_input_q=1;
1755 q->first_to_check=0;
1756 q->last_move_ftc=0;
1757 q->handler=input_handler;
1758 q->dev_st_chg_ind=irq_ptr->dev_st_chg_ind;
1759
1760 q->tasklet.data=(unsigned long)q;
1761 /* q->is_thinint_q isn't valid at this time, but
1762 * irq_ptr->is_thinint_irq is */
1763 q->tasklet.func=(void(*)(unsigned long))
1764 ((irq_ptr->is_thinint_irq)?&tiqdio_inbound_processing:
1765 &qdio_inbound_processing);
1766
1767 /* actually this is not used for inbound queues. yet. */
1768 atomic_set(&q->busy_siga_counter,0);
1769 q->timing.busy_start=0;
1770
1771 /* for (j=0;j<QDIO_STATS_NUMBER;j++)
1772 q->timing.last_transfer_times[j]=(qdio_get_micros()/
1773 QDIO_STATS_NUMBER)*j;
1774 q->timing.last_transfer_index=QDIO_STATS_NUMBER-1;
1775 */
1776
1777 /* fill in slib */
1778 if (i>0) irq_ptr->input_qs[i-1]->slib->nsliba=
1779 (unsigned long)(q->slib);
1780 q->slib->sla=(unsigned long)(q->sl);
1781 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1782
1783 /* fill in sl */
1784 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1785 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1786
1787 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1788 ptr=(void*)q->sl;
1789 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1790 ptr=(void*)&q->slsb;
1791 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1792 ptr=(void*)q->sbal[0];
1793 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1794
1795 /* fill in slsb */
1796 if (!irq_ptr->is_qebsm) {
1797 unsigned int count = 1;
1798 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
1799 set_slsb(q, &j, SLSB_P_INPUT_NOT_INIT, &count);
1800 }
1801 }
1802
1803 for (i=0;i<no_output_qs;i++) {
1804 q=irq_ptr->output_qs[i];
1805 memset(q,0,((char*)&q->slib)-((char*)q));
1806
1807 sprintf(dbf_text,"outq%4x",i);
1808 QDIO_DBF_TEXT0(0,setup,dbf_text);
1809 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1810
1811 memset(q->slib,0,PAGE_SIZE);
1812 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1813
1814 available=0;
1815
1816 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1817 q->sbal[j]=*(outbound_sbals_array++);
1818
1819 q->queue_type=q_format;
1820 if ((q->queue_type == QDIO_IQDIO_QFMT) &&
1821 (no_output_qs > 1) &&
1822 (i == no_output_qs-1))
1823 q->queue_type = QDIO_IQDIO_QFMT_ASYNCH;
1824 q->int_parm=int_parm;
1825 q->is_input_q=0;
1826 q->is_pci_out = 0;
1827 q->schid = irq_ptr->schid;
1828 q->cdev = cdev;
1829 q->irq_ptr = irq_ptr;
1830 q->mask=1<<(31-i);
1831 q->q_no=i;
1832 q->first_to_check=0;
1833 q->last_move_ftc=0;
1834 q->handler=output_handler;
1835
1836 q->tasklet.data=(unsigned long)q;
1837 q->tasklet.func=(void(*)(unsigned long))
1838 &qdio_outbound_processing;
1839 q->timer.function=(void(*)(unsigned long))
1840 &qdio_outbound_processing;
1841 q->timer.data = (long)q;
1842 init_timer(&q->timer);
1843
1844 atomic_set(&q->busy_siga_counter,0);
1845 q->timing.busy_start=0;
1846
1847 /* fill in slib */
1848 if (i>0) irq_ptr->output_qs[i-1]->slib->nsliba=
1849 (unsigned long)(q->slib);
1850 q->slib->sla=(unsigned long)(q->sl);
1851 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1852
1853 /* fill in sl */
1854 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1855 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1856
1857 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1858 ptr=(void*)q->sl;
1859 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1860 ptr=(void*)&q->slsb;
1861 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1862 ptr=(void*)q->sbal[0];
1863 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1864
1865 /* fill in slsb */
1866 if (!irq_ptr->is_qebsm) {
1867 unsigned int count = 1;
1868 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
1869 set_slsb(q, &j, SLSB_P_OUTPUT_NOT_INIT, &count);
1870 }
1871 }
1872 }
1873
1874 static void
1875 qdio_fill_thresholds(struct qdio_irq *irq_ptr,
1876 unsigned int no_input_qs,
1877 unsigned int no_output_qs,
1878 unsigned int min_input_threshold,
1879 unsigned int max_input_threshold,
1880 unsigned int min_output_threshold,
1881 unsigned int max_output_threshold)
1882 {
1883 int i;
1884 struct qdio_q *q;
1885
1886 for (i=0;i<no_input_qs;i++) {
1887 q=irq_ptr->input_qs[i];
1888 q->timing.threshold=max_input_threshold;
1889 /* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1890 q->threshold_classes[j].threshold=
1891 min_input_threshold+
1892 (max_input_threshold-min_input_threshold)/
1893 QDIO_STATS_CLASSES;
1894 }
1895 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1896 }
1897 for (i=0;i<no_output_qs;i++) {
1898 q=irq_ptr->output_qs[i];
1899 q->timing.threshold=max_output_threshold;
1900 /* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1901 q->threshold_classes[j].threshold=
1902 min_output_threshold+
1903 (max_output_threshold-min_output_threshold)/
1904 QDIO_STATS_CLASSES;
1905 }
1906 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1907 }
1908 }
1909
1910 static int
1911 tiqdio_thinint_handler(void)
1912 {
1913 QDIO_DBF_TEXT4(0,trace,"thin_int");
1914
1915 qdio_perf_stat_inc(&perf_stats.thinints);
1916
1917 /* SVS only when needed:
1918 * issue SVS to benefit from iqdio interrupt avoidance
1919 * (SVS clears AISOI)*/
1920 if (!omit_svs)
1921 tiqdio_clear_global_summary();
1922
1923 tiqdio_inbound_checks();
1924 return 0;
1925 }
1926
1927 static void
1928 qdio_set_state(struct qdio_irq *irq_ptr, enum qdio_irq_states state)
1929 {
1930 int i;
1931 #ifdef CONFIG_QDIO_DEBUG
1932 char dbf_text[15];
1933
1934 QDIO_DBF_TEXT5(0,trace,"newstate");
1935 sprintf(dbf_text,"%4x%4x",irq_ptr->schid.sch_no,state);
1936 QDIO_DBF_TEXT5(0,trace,dbf_text);
1937 #endif /* CONFIG_QDIO_DEBUG */
1938
1939 irq_ptr->state=state;
1940 for (i=0;i<irq_ptr->no_input_qs;i++)
1941 irq_ptr->input_qs[i]->state=state;
1942 for (i=0;i<irq_ptr->no_output_qs;i++)
1943 irq_ptr->output_qs[i]->state=state;
1944 mb();
1945 }
1946
1947 static void
1948 qdio_irq_check_sense(struct subchannel_id schid, struct irb *irb)
1949 {
1950 char dbf_text[15];
1951
1952 if (irb->esw.esw0.erw.cons) {
1953 sprintf(dbf_text,"sens%4x",schid.sch_no);
1954 QDIO_DBF_TEXT2(1,trace,dbf_text);
1955 QDIO_DBF_HEX0(0,sense,irb,QDIO_DBF_SENSE_LEN);
1956
1957 QDIO_PRINT_WARN("sense data available on qdio channel.\n");
1958 QDIO_HEXDUMP16(WARN,"irb: ",irb);
1959 QDIO_HEXDUMP16(WARN,"sense data: ",irb->ecw);
1960 }
1961
1962 }
1963
1964 static void
1965 qdio_handle_pci(struct qdio_irq *irq_ptr)
1966 {
1967 int i;
1968 struct qdio_q *q;
1969
1970 qdio_perf_stat_inc(&perf_stats.pcis);
1971 for (i=0;i<irq_ptr->no_input_qs;i++) {
1972 q=irq_ptr->input_qs[i];
1973 if (q->is_input_q&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT)
1974 qdio_mark_q(q);
1975 else {
1976 qdio_perf_stat_dec(&perf_stats.tl_runs);
1977 __qdio_inbound_processing(q);
1978 }
1979 }
1980 if (!irq_ptr->hydra_gives_outbound_pcis)
1981 return;
1982 for (i=0;i<irq_ptr->no_output_qs;i++) {
1983 q=irq_ptr->output_qs[i];
1984 if (qdio_is_outbound_q_done(q))
1985 continue;
1986 qdio_perf_stat_dec(&perf_stats.tl_runs);
1987 if (!irq_ptr->sync_done_on_outb_pcis)
1988 SYNC_MEMORY;
1989 __qdio_outbound_processing(q);
1990 }
1991 }
1992
1993 static void qdio_establish_handle_irq(struct ccw_device*, int, int);
1994
1995 static void
1996 qdio_handle_activate_check(struct ccw_device *cdev, unsigned long intparm,
1997 int cstat, int dstat)
1998 {
1999 struct qdio_irq *irq_ptr;
2000 struct qdio_q *q;
2001 char dbf_text[15];
2002
2003 irq_ptr = cdev->private->qdio_data;
2004
2005 QDIO_DBF_TEXT2(1, trace, "ick2");
2006 sprintf(dbf_text,"%s", cdev->dev.bus_id);
2007 QDIO_DBF_TEXT2(1,trace,dbf_text);
2008 QDIO_DBF_HEX2(0,trace,&intparm,sizeof(int));
2009 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2010 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2011 QDIO_PRINT_ERR("received check condition on activate " \
2012 "queues on device %s (cs=x%x, ds=x%x).\n",
2013 cdev->dev.bus_id, cstat, dstat);
2014 if (irq_ptr->no_input_qs) {
2015 q=irq_ptr->input_qs[0];
2016 } else if (irq_ptr->no_output_qs) {
2017 q=irq_ptr->output_qs[0];
2018 } else {
2019 QDIO_PRINT_ERR("oops... no queue registered for device %s!?\n",
2020 cdev->dev.bus_id);
2021 goto omit_handler_call;
2022 }
2023 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
2024 QDIO_STATUS_LOOK_FOR_ERROR,
2025 0,0,0,-1,-1,q->int_parm);
2026 omit_handler_call:
2027 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_STOPPED);
2028
2029 }
2030
2031 static void
2032 qdio_call_shutdown(struct work_struct *work)
2033 {
2034 struct ccw_device_private *priv;
2035 struct ccw_device *cdev;
2036
2037 priv = container_of(work, struct ccw_device_private, kick_work);
2038 cdev = priv->cdev;
2039 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
2040 put_device(&cdev->dev);
2041 }
2042
2043 static void
2044 qdio_timeout_handler(struct ccw_device *cdev)
2045 {
2046 struct qdio_irq *irq_ptr;
2047 char dbf_text[15];
2048
2049 QDIO_DBF_TEXT2(0, trace, "qtoh");
2050 sprintf(dbf_text, "%s", cdev->dev.bus_id);
2051 QDIO_DBF_TEXT2(0, trace, dbf_text);
2052
2053 irq_ptr = cdev->private->qdio_data;
2054 sprintf(dbf_text, "state:%d", irq_ptr->state);
2055 QDIO_DBF_TEXT2(0, trace, dbf_text);
2056
2057 switch (irq_ptr->state) {
2058 case QDIO_IRQ_STATE_INACTIVE:
2059 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: timed out\n",
2060 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2061 QDIO_DBF_TEXT2(1,setup,"eq:timeo");
2062 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2063 break;
2064 case QDIO_IRQ_STATE_CLEANUP:
2065 QDIO_PRINT_INFO("Did not get interrupt on cleanup, "
2066 "irq=0.%x.%x.\n",
2067 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2068 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2069 break;
2070 case QDIO_IRQ_STATE_ESTABLISHED:
2071 case QDIO_IRQ_STATE_ACTIVE:
2072 /* I/O has been terminated by common I/O layer. */
2073 QDIO_PRINT_INFO("Queues on irq 0.%x.%04x killed by cio.\n",
2074 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2075 QDIO_DBF_TEXT2(1, trace, "cio:term");
2076 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
2077 if (get_device(&cdev->dev)) {
2078 /* Can't call shutdown from interrupt context. */
2079 PREPARE_WORK(&cdev->private->kick_work,
2080 qdio_call_shutdown);
2081 queue_work(ccw_device_work, &cdev->private->kick_work);
2082 }
2083 break;
2084 default:
2085 BUG();
2086 }
2087 ccw_device_set_timeout(cdev, 0);
2088 wake_up(&cdev->private->wait_q);
2089 }
2090
2091 static void
2092 qdio_handler(struct ccw_device *cdev, unsigned long intparm, struct irb *irb)
2093 {
2094 struct qdio_irq *irq_ptr;
2095 int cstat,dstat;
2096 char dbf_text[15];
2097
2098 #ifdef CONFIG_QDIO_DEBUG
2099 QDIO_DBF_TEXT4(0, trace, "qint");
2100 sprintf(dbf_text, "%s", cdev->dev.bus_id);
2101 QDIO_DBF_TEXT4(0, trace, dbf_text);
2102 #endif /* CONFIG_QDIO_DEBUG */
2103
2104 if (!intparm) {
2105 QDIO_PRINT_ERR("got unsolicited interrupt in qdio " \
2106 "handler, device %s\n", cdev->dev.bus_id);
2107 return;
2108 }
2109
2110 irq_ptr = cdev->private->qdio_data;
2111 if (!irq_ptr) {
2112 QDIO_DBF_TEXT2(1, trace, "uint");
2113 sprintf(dbf_text,"%s", cdev->dev.bus_id);
2114 QDIO_DBF_TEXT2(1,trace,dbf_text);
2115 QDIO_PRINT_ERR("received interrupt on unused device %s!\n",
2116 cdev->dev.bus_id);
2117 return;
2118 }
2119
2120 if (IS_ERR(irb)) {
2121 /* Currently running i/o is in error. */
2122 switch (PTR_ERR(irb)) {
2123 case -EIO:
2124 QDIO_PRINT_ERR("i/o error on device %s\n",
2125 cdev->dev.bus_id);
2126 return;
2127 case -ETIMEDOUT:
2128 qdio_timeout_handler(cdev);
2129 return;
2130 default:
2131 QDIO_PRINT_ERR("unknown error state %ld on device %s\n",
2132 PTR_ERR(irb), cdev->dev.bus_id);
2133 return;
2134 }
2135 }
2136
2137 qdio_irq_check_sense(irq_ptr->schid, irb);
2138
2139 #ifdef CONFIG_QDIO_DEBUG
2140 sprintf(dbf_text, "state:%d", irq_ptr->state);
2141 QDIO_DBF_TEXT4(0, trace, dbf_text);
2142 #endif /* CONFIG_QDIO_DEBUG */
2143
2144 cstat = irb->scsw.cstat;
2145 dstat = irb->scsw.dstat;
2146
2147 switch (irq_ptr->state) {
2148 case QDIO_IRQ_STATE_INACTIVE:
2149 qdio_establish_handle_irq(cdev, cstat, dstat);
2150 break;
2151
2152 case QDIO_IRQ_STATE_CLEANUP:
2153 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2154 break;
2155
2156 case QDIO_IRQ_STATE_ESTABLISHED:
2157 case QDIO_IRQ_STATE_ACTIVE:
2158 if (cstat & SCHN_STAT_PCI) {
2159 qdio_handle_pci(irq_ptr);
2160 break;
2161 }
2162
2163 if ((cstat&~SCHN_STAT_PCI)||dstat) {
2164 qdio_handle_activate_check(cdev, intparm, cstat, dstat);
2165 break;
2166 }
2167 default:
2168 QDIO_PRINT_ERR("got interrupt for queues in state %d on " \
2169 "device %s?!\n",
2170 irq_ptr->state, cdev->dev.bus_id);
2171 }
2172 wake_up(&cdev->private->wait_q);
2173
2174 }
2175
2176 int
2177 qdio_synchronize(struct ccw_device *cdev, unsigned int flags,
2178 unsigned int queue_number)
2179 {
2180 int cc = 0;
2181 struct qdio_q *q;
2182 struct qdio_irq *irq_ptr;
2183 void *ptr;
2184 #ifdef CONFIG_QDIO_DEBUG
2185 char dbf_text[15]="SyncXXXX";
2186 #endif
2187
2188 irq_ptr = cdev->private->qdio_data;
2189 if (!irq_ptr)
2190 return -ENODEV;
2191
2192 #ifdef CONFIG_QDIO_DEBUG
2193 *((int*)(&dbf_text[4])) = irq_ptr->schid.sch_no;
2194 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
2195 *((int*)(&dbf_text[0]))=flags;
2196 *((int*)(&dbf_text[4]))=queue_number;
2197 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
2198 #endif /* CONFIG_QDIO_DEBUG */
2199
2200 if (flags&QDIO_FLAG_SYNC_INPUT) {
2201 q=irq_ptr->input_qs[queue_number];
2202 if (!q)
2203 return -EINVAL;
2204 if (!(irq_ptr->is_qebsm))
2205 cc = do_siga_sync(q->schid, 0, q->mask);
2206 } else if (flags&QDIO_FLAG_SYNC_OUTPUT) {
2207 q=irq_ptr->output_qs[queue_number];
2208 if (!q)
2209 return -EINVAL;
2210 if (!(irq_ptr->is_qebsm))
2211 cc = do_siga_sync(q->schid, q->mask, 0);
2212 } else
2213 return -EINVAL;
2214
2215 ptr=&cc;
2216 if (cc)
2217 QDIO_DBF_HEX3(0,trace,&ptr,sizeof(int));
2218
2219 return cc;
2220 }
2221
2222 static void
2223 qdio_check_subchannel_qebsm(struct qdio_irq *irq_ptr, unsigned char qdioac,
2224 unsigned long token)
2225 {
2226 struct qdio_q *q;
2227 int i;
2228 unsigned int count, start_buf;
2229 char dbf_text[15];
2230
2231 /*check if QEBSM is disabled */
2232 if (!(irq_ptr->is_qebsm) || !(qdioac & 0x01)) {
2233 irq_ptr->is_qebsm = 0;
2234 irq_ptr->sch_token = 0;
2235 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
2236 QDIO_DBF_TEXT0(0,setup,"noV=V");
2237 return;
2238 }
2239 irq_ptr->sch_token = token;
2240 /*input queue*/
2241 for (i = 0; i < irq_ptr->no_input_qs;i++) {
2242 q = irq_ptr->input_qs[i];
2243 count = QDIO_MAX_BUFFERS_PER_Q;
2244 start_buf = 0;
2245 set_slsb(q, &start_buf, SLSB_P_INPUT_NOT_INIT, &count);
2246 }
2247 sprintf(dbf_text,"V=V:%2x",irq_ptr->is_qebsm);
2248 QDIO_DBF_TEXT0(0,setup,dbf_text);
2249 sprintf(dbf_text,"%8lx",irq_ptr->sch_token);
2250 QDIO_DBF_TEXT0(0,setup,dbf_text);
2251 /*output queue*/
2252 for (i = 0; i < irq_ptr->no_output_qs; i++) {
2253 q = irq_ptr->output_qs[i];
2254 count = QDIO_MAX_BUFFERS_PER_Q;
2255 start_buf = 0;
2256 set_slsb(q, &start_buf, SLSB_P_OUTPUT_NOT_INIT, &count);
2257 }
2258 }
2259
2260 static void
2261 qdio_get_ssqd_information(struct qdio_irq *irq_ptr)
2262 {
2263 int result;
2264 unsigned char qdioac;
2265 struct {
2266 struct chsc_header request;
2267 u16 reserved1:10;
2268 u16 ssid:2;
2269 u16 fmt:4;
2270 u16 first_sch;
2271 u16 reserved2;
2272 u16 last_sch;
2273 u32 reserved3;
2274 struct chsc_header response;
2275 u32 reserved4;
2276 u8 flags;
2277 u8 reserved5;
2278 u16 sch;
2279 u8 qfmt;
2280 u8 parm;
2281 u8 qdioac1;
2282 u8 sch_class;
2283 u8 reserved7;
2284 u8 icnt;
2285 u8 reserved8;
2286 u8 ocnt;
2287 u8 reserved9;
2288 u8 mbccnt;
2289 u16 qdioac2;
2290 u64 sch_token;
2291 } *ssqd_area;
2292
2293 QDIO_DBF_TEXT0(0,setup,"getssqd");
2294 qdioac = 0;
2295 ssqd_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2296 if (!ssqd_area) {
2297 QDIO_PRINT_WARN("Could not get memory for chsc. Using all " \
2298 "SIGAs for sch x%x.\n", irq_ptr->schid.sch_no);
2299 irq_ptr->qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2300 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2301 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2302 irq_ptr->is_qebsm = 0;
2303 irq_ptr->sch_token = 0;
2304 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
2305 return;
2306 }
2307
2308 ssqd_area->request = (struct chsc_header) {
2309 .length = 0x0010,
2310 .code = 0x0024,
2311 };
2312 ssqd_area->first_sch = irq_ptr->schid.sch_no;
2313 ssqd_area->last_sch = irq_ptr->schid.sch_no;
2314 ssqd_area->ssid = irq_ptr->schid.ssid;
2315 result = chsc(ssqd_area);
2316
2317 if (result) {
2318 QDIO_PRINT_WARN("CHSC returned cc %i. Using all " \
2319 "SIGAs for sch 0.%x.%x.\n", result,
2320 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2321 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2322 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2323 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2324 irq_ptr->is_qebsm = 0;
2325 goto out;
2326 }
2327
2328 if (ssqd_area->response.code != QDIO_CHSC_RESPONSE_CODE_OK) {
2329 QDIO_PRINT_WARN("response upon checking SIGA needs " \
2330 "is 0x%x. Using all SIGAs for sch 0.%x.%x.\n",
2331 ssqd_area->response.code,
2332 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2333 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2334 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2335 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2336 irq_ptr->is_qebsm = 0;
2337 goto out;
2338 }
2339 if (!(ssqd_area->flags & CHSC_FLAG_QDIO_CAPABILITY) ||
2340 !(ssqd_area->flags & CHSC_FLAG_VALIDITY) ||
2341 (ssqd_area->sch != irq_ptr->schid.sch_no)) {
2342 QDIO_PRINT_WARN("huh? problems checking out sch 0.%x.%x... " \
2343 "using all SIGAs.\n",
2344 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2345 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2346 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2347 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* worst case */
2348 irq_ptr->is_qebsm = 0;
2349 goto out;
2350 }
2351 qdioac = ssqd_area->qdioac1;
2352 out:
2353 qdio_check_subchannel_qebsm(irq_ptr, qdioac,
2354 ssqd_area->sch_token);
2355 mempool_free(ssqd_area, qdio_mempool_scssc);
2356 irq_ptr->qdioac = qdioac;
2357 }
2358
2359 static unsigned int
2360 tiqdio_check_chsc_availability(void)
2361 {
2362 char dbf_text[15];
2363
2364 if (!css_characteristics_avail)
2365 return -EIO;
2366
2367 /* Check for bit 41. */
2368 if (!css_general_characteristics.aif) {
2369 QDIO_PRINT_WARN("Adapter interruption facility not " \
2370 "installed.\n");
2371 return -ENOENT;
2372 }
2373
2374 /* Check for bits 107 and 108. */
2375 if (!css_chsc_characteristics.scssc ||
2376 !css_chsc_characteristics.scsscf) {
2377 QDIO_PRINT_WARN("Set Chan Subsys. Char. & Fast-CHSCs " \
2378 "not available.\n");
2379 return -ENOENT;
2380 }
2381
2382 /* Check for OSA/FCP thin interrupts (bit 67). */
2383 hydra_thinints = css_general_characteristics.aif_osa;
2384 sprintf(dbf_text,"hydrati%1x", hydra_thinints);
2385 QDIO_DBF_TEXT0(0,setup,dbf_text);
2386
2387 #ifdef CONFIG_64BIT
2388 /* Check for QEBSM support in general (bit 58). */
2389 is_passthrough = css_general_characteristics.qebsm;
2390 #endif
2391 sprintf(dbf_text,"cssQBS:%1x", is_passthrough);
2392 QDIO_DBF_TEXT0(0,setup,dbf_text);
2393
2394 /* Check for aif time delay disablement fac (bit 56). If installed,
2395 * omit svs even under lpar (good point by rick again) */
2396 omit_svs = css_general_characteristics.aif_tdd;
2397 sprintf(dbf_text,"omitsvs%1x", omit_svs);
2398 QDIO_DBF_TEXT0(0,setup,dbf_text);
2399 return 0;
2400 }
2401
2402
2403 static unsigned int
2404 tiqdio_set_subchannel_ind(struct qdio_irq *irq_ptr, int reset_to_zero)
2405 {
2406 unsigned long real_addr_local_summary_bit;
2407 unsigned long real_addr_dev_st_chg_ind;
2408 void *ptr;
2409 char dbf_text[15];
2410
2411 unsigned int resp_code;
2412 int result;
2413
2414 struct {
2415 struct chsc_header request;
2416 u16 operation_code;
2417 u16 reserved1;
2418 u32 reserved2;
2419 u32 reserved3;
2420 u64 summary_indicator_addr;
2421 u64 subchannel_indicator_addr;
2422 u32 ks:4;
2423 u32 kc:4;
2424 u32 reserved4:21;
2425 u32 isc:3;
2426 u32 word_with_d_bit;
2427 /* set to 0x10000000 to enable
2428 * time delay disablement facility */
2429 u32 reserved5;
2430 struct subchannel_id schid;
2431 u32 reserved6[1004];
2432 struct chsc_header response;
2433 u32 reserved7;
2434 } *scssc_area;
2435
2436 if (!irq_ptr->is_thinint_irq)
2437 return -ENODEV;
2438
2439 if (reset_to_zero) {
2440 real_addr_local_summary_bit=0;
2441 real_addr_dev_st_chg_ind=0;
2442 } else {
2443 real_addr_local_summary_bit=
2444 virt_to_phys((volatile void *)indicators);
2445 real_addr_dev_st_chg_ind=
2446 virt_to_phys((volatile void *)irq_ptr->dev_st_chg_ind);
2447 }
2448
2449 scssc_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2450 if (!scssc_area) {
2451 QDIO_PRINT_WARN("No memory for setting indicators on " \
2452 "subchannel 0.%x.%x.\n",
2453 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2454 return -ENOMEM;
2455 }
2456 scssc_area->request = (struct chsc_header) {
2457 .length = 0x0fe0,
2458 .code = 0x0021,
2459 };
2460 scssc_area->operation_code = 0;
2461
2462 scssc_area->summary_indicator_addr = real_addr_local_summary_bit;
2463 scssc_area->subchannel_indicator_addr = real_addr_dev_st_chg_ind;
2464 scssc_area->ks = QDIO_STORAGE_KEY;
2465 scssc_area->kc = QDIO_STORAGE_KEY;
2466 scssc_area->isc = TIQDIO_THININT_ISC;
2467 scssc_area->schid = irq_ptr->schid;
2468 /* enables the time delay disablement facility. Don't care
2469 * whether it is really there (i.e. we haven't checked for
2470 * it) */
2471 if (css_general_characteristics.aif_tdd)
2472 scssc_area->word_with_d_bit = 0x10000000;
2473 else
2474 QDIO_PRINT_WARN("Time delay disablement facility " \
2475 "not available\n");
2476
2477 result = chsc(scssc_area);
2478 if (result) {
2479 QDIO_PRINT_WARN("could not set indicators on irq 0.%x.%x, " \
2480 "cc=%i.\n",
2481 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,result);
2482 result = -EIO;
2483 goto out;
2484 }
2485
2486 resp_code = scssc_area->response.code;
2487 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2488 QDIO_PRINT_WARN("response upon setting indicators " \
2489 "is 0x%x.\n",resp_code);
2490 sprintf(dbf_text,"sidR%4x",resp_code);
2491 QDIO_DBF_TEXT1(0,trace,dbf_text);
2492 QDIO_DBF_TEXT1(0,setup,dbf_text);
2493 ptr=&scssc_area->response;
2494 QDIO_DBF_HEX2(1,setup,&ptr,QDIO_DBF_SETUP_LEN);
2495 result = -EIO;
2496 goto out;
2497 }
2498
2499 QDIO_DBF_TEXT2(0,setup,"setscind");
2500 QDIO_DBF_HEX2(0,setup,&real_addr_local_summary_bit,
2501 sizeof(unsigned long));
2502 QDIO_DBF_HEX2(0,setup,&real_addr_dev_st_chg_ind,sizeof(unsigned long));
2503 result = 0;
2504 out:
2505 mempool_free(scssc_area, qdio_mempool_scssc);
2506 return result;
2507
2508 }
2509
2510 static unsigned int
2511 tiqdio_set_delay_target(struct qdio_irq *irq_ptr, unsigned long delay_target)
2512 {
2513 unsigned int resp_code;
2514 int result;
2515 void *ptr;
2516 char dbf_text[15];
2517
2518 struct {
2519 struct chsc_header request;
2520 u16 operation_code;
2521 u16 reserved1;
2522 u32 reserved2;
2523 u32 reserved3;
2524 u32 reserved4[2];
2525 u32 delay_target;
2526 u32 reserved5[1009];
2527 struct chsc_header response;
2528 u32 reserved6;
2529 } *scsscf_area;
2530
2531 if (!irq_ptr->is_thinint_irq)
2532 return -ENODEV;
2533
2534 scsscf_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2535 if (!scsscf_area) {
2536 QDIO_PRINT_WARN("No memory for setting delay target on " \
2537 "subchannel 0.%x.%x.\n",
2538 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2539 return -ENOMEM;
2540 }
2541 scsscf_area->request = (struct chsc_header) {
2542 .length = 0x0fe0,
2543 .code = 0x1027,
2544 };
2545
2546 scsscf_area->delay_target = delay_target<<16;
2547
2548 result=chsc(scsscf_area);
2549 if (result) {
2550 QDIO_PRINT_WARN("could not set delay target on irq 0.%x.%x, " \
2551 "cc=%i. Continuing.\n",
2552 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2553 result);
2554 result = -EIO;
2555 goto out;
2556 }
2557
2558 resp_code = scsscf_area->response.code;
2559 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2560 QDIO_PRINT_WARN("response upon setting delay target " \
2561 "is 0x%x. Continuing.\n",resp_code);
2562 sprintf(dbf_text,"sdtR%4x",resp_code);
2563 QDIO_DBF_TEXT1(0,trace,dbf_text);
2564 QDIO_DBF_TEXT1(0,setup,dbf_text);
2565 ptr=&scsscf_area->response;
2566 QDIO_DBF_HEX2(1,trace,&ptr,QDIO_DBF_TRACE_LEN);
2567 }
2568 QDIO_DBF_TEXT2(0,trace,"delytrgt");
2569 QDIO_DBF_HEX2(0,trace,&delay_target,sizeof(unsigned long));
2570 result = 0; /* not critical */
2571 out:
2572 mempool_free(scsscf_area, qdio_mempool_scssc);
2573 return result;
2574 }
2575
2576 int
2577 qdio_cleanup(struct ccw_device *cdev, int how)
2578 {
2579 struct qdio_irq *irq_ptr;
2580 char dbf_text[15];
2581 int rc;
2582
2583 irq_ptr = cdev->private->qdio_data;
2584 if (!irq_ptr)
2585 return -ENODEV;
2586
2587 sprintf(dbf_text,"qcln%4x",irq_ptr->schid.sch_no);
2588 QDIO_DBF_TEXT1(0,trace,dbf_text);
2589 QDIO_DBF_TEXT0(0,setup,dbf_text);
2590
2591 rc = qdio_shutdown(cdev, how);
2592 if ((rc == 0) || (rc == -EINPROGRESS))
2593 rc = qdio_free(cdev);
2594 return rc;
2595 }
2596
2597 int
2598 qdio_shutdown(struct ccw_device *cdev, int how)
2599 {
2600 struct qdio_irq *irq_ptr;
2601 int i;
2602 int result = 0;
2603 int rc;
2604 unsigned long flags;
2605 int timeout;
2606 char dbf_text[15];
2607
2608 irq_ptr = cdev->private->qdio_data;
2609 if (!irq_ptr)
2610 return -ENODEV;
2611
2612 down(&irq_ptr->setting_up_sema);
2613
2614 sprintf(dbf_text,"qsqs%4x",irq_ptr->schid.sch_no);
2615 QDIO_DBF_TEXT1(0,trace,dbf_text);
2616 QDIO_DBF_TEXT0(0,setup,dbf_text);
2617
2618 /* mark all qs as uninteresting */
2619 for (i=0;i<irq_ptr->no_input_qs;i++)
2620 atomic_set(&irq_ptr->input_qs[i]->is_in_shutdown,1);
2621
2622 for (i=0;i<irq_ptr->no_output_qs;i++)
2623 atomic_set(&irq_ptr->output_qs[i]->is_in_shutdown,1);
2624
2625 tasklet_kill(&tiqdio_tasklet);
2626
2627 for (i=0;i<irq_ptr->no_input_qs;i++) {
2628 qdio_unmark_q(irq_ptr->input_qs[i]);
2629 tasklet_kill(&irq_ptr->input_qs[i]->tasklet);
2630 wait_event_interruptible_timeout(cdev->private->wait_q,
2631 !atomic_read(&irq_ptr->
2632 input_qs[i]->
2633 use_count),
2634 QDIO_NO_USE_COUNT_TIMEOUT);
2635 if (atomic_read(&irq_ptr->input_qs[i]->use_count))
2636 result=-EINPROGRESS;
2637 }
2638
2639 for (i=0;i<irq_ptr->no_output_qs;i++) {
2640 tasklet_kill(&irq_ptr->output_qs[i]->tasklet);
2641 del_timer(&irq_ptr->output_qs[i]->timer);
2642 wait_event_interruptible_timeout(cdev->private->wait_q,
2643 !atomic_read(&irq_ptr->
2644 output_qs[i]->
2645 use_count),
2646 QDIO_NO_USE_COUNT_TIMEOUT);
2647 if (atomic_read(&irq_ptr->output_qs[i]->use_count))
2648 result=-EINPROGRESS;
2649 }
2650
2651 /* cleanup subchannel */
2652 spin_lock_irqsave(get_ccwdev_lock(cdev),flags);
2653 if (how&QDIO_FLAG_CLEANUP_USING_CLEAR) {
2654 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
2655 timeout=QDIO_CLEANUP_CLEAR_TIMEOUT;
2656 } else if (how&QDIO_FLAG_CLEANUP_USING_HALT) {
2657 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2658 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2659 } else { /* default behaviour */
2660 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2661 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2662 }
2663 if (rc == -ENODEV) {
2664 /* No need to wait for device no longer present. */
2665 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2666 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2667 } else if (((void *)cdev->handler != (void *)qdio_handler) && rc == 0) {
2668 /*
2669 * Whoever put another handler there, has to cope with the
2670 * interrupt theirself. Might happen if qdio_shutdown was
2671 * called on already shutdown queues, but this shouldn't have
2672 * bad side effects.
2673 */
2674 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2675 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2676 } else if (rc == 0) {
2677 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
2678 ccw_device_set_timeout(cdev, timeout);
2679 spin_unlock_irqrestore(get_ccwdev_lock(cdev),flags);
2680
2681 wait_event(cdev->private->wait_q,
2682 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
2683 irq_ptr->state == QDIO_IRQ_STATE_ERR);
2684 } else {
2685 QDIO_PRINT_INFO("ccw_device_{halt,clear} returned %d for "
2686 "device %s\n", result, cdev->dev.bus_id);
2687 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2688 result = rc;
2689 goto out;
2690 }
2691 if (irq_ptr->is_thinint_irq) {
2692 qdio_put_indicator((__u32*)irq_ptr->dev_st_chg_ind);
2693 tiqdio_set_subchannel_ind(irq_ptr,1);
2694 /* reset adapter interrupt indicators */
2695 }
2696
2697 /* exchange int handlers, if necessary */
2698 if ((void*)cdev->handler == (void*)qdio_handler)
2699 cdev->handler=irq_ptr->original_int_handler;
2700
2701 /* Ignore errors. */
2702 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2703 ccw_device_set_timeout(cdev, 0);
2704 out:
2705 up(&irq_ptr->setting_up_sema);
2706 return result;
2707 }
2708
2709 int
2710 qdio_free(struct ccw_device *cdev)
2711 {
2712 struct qdio_irq *irq_ptr;
2713 char dbf_text[15];
2714
2715 irq_ptr = cdev->private->qdio_data;
2716 if (!irq_ptr)
2717 return -ENODEV;
2718
2719 down(&irq_ptr->setting_up_sema);
2720
2721 sprintf(dbf_text,"qfqs%4x",irq_ptr->schid.sch_no);
2722 QDIO_DBF_TEXT1(0,trace,dbf_text);
2723 QDIO_DBF_TEXT0(0,setup,dbf_text);
2724
2725 cdev->private->qdio_data = NULL;
2726
2727 up(&irq_ptr->setting_up_sema);
2728
2729 qdio_release_irq_memory(irq_ptr);
2730 module_put(THIS_MODULE);
2731 return 0;
2732 }
2733
2734 static void
2735 qdio_allocate_do_dbf(struct qdio_initialize *init_data)
2736 {
2737 char dbf_text[20]; /* if a printf printed out more than 8 chars */
2738
2739 sprintf(dbf_text,"qfmt:%x",init_data->q_format);
2740 QDIO_DBF_TEXT0(0,setup,dbf_text);
2741 QDIO_DBF_HEX0(0,setup,init_data->adapter_name,8);
2742 sprintf(dbf_text,"qpff%4x",init_data->qib_param_field_format);
2743 QDIO_DBF_TEXT0(0,setup,dbf_text);
2744 QDIO_DBF_HEX0(0,setup,&init_data->qib_param_field,sizeof(char*));
2745 QDIO_DBF_HEX0(0,setup,&init_data->input_slib_elements,sizeof(long*));
2746 QDIO_DBF_HEX0(0,setup,&init_data->output_slib_elements,sizeof(long*));
2747 sprintf(dbf_text,"miit%4x",init_data->min_input_threshold);
2748 QDIO_DBF_TEXT0(0,setup,dbf_text);
2749 sprintf(dbf_text,"mait%4x",init_data->max_input_threshold);
2750 QDIO_DBF_TEXT0(0,setup,dbf_text);
2751 sprintf(dbf_text,"miot%4x",init_data->min_output_threshold);
2752 QDIO_DBF_TEXT0(0,setup,dbf_text);
2753 sprintf(dbf_text,"maot%4x",init_data->max_output_threshold);
2754 QDIO_DBF_TEXT0(0,setup,dbf_text);
2755 sprintf(dbf_text,"niq:%4x",init_data->no_input_qs);
2756 QDIO_DBF_TEXT0(0,setup,dbf_text);
2757 sprintf(dbf_text,"noq:%4x",init_data->no_output_qs);
2758 QDIO_DBF_TEXT0(0,setup,dbf_text);
2759 QDIO_DBF_HEX0(0,setup,&init_data->input_handler,sizeof(void*));
2760 QDIO_DBF_HEX0(0,setup,&init_data->output_handler,sizeof(void*));
2761 QDIO_DBF_HEX0(0,setup,&init_data->int_parm,sizeof(long));
2762 QDIO_DBF_HEX0(0,setup,&init_data->flags,sizeof(long));
2763 QDIO_DBF_HEX0(0,setup,&init_data->input_sbal_addr_array,sizeof(void*));
2764 QDIO_DBF_HEX0(0,setup,&init_data->output_sbal_addr_array,sizeof(void*));
2765 }
2766
2767 static void
2768 qdio_allocate_fill_input_desc(struct qdio_irq *irq_ptr, int i, int iqfmt)
2769 {
2770 irq_ptr->input_qs[i]->is_iqdio_q = iqfmt;
2771 irq_ptr->input_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2772
2773 irq_ptr->qdr->qdf0[i].sliba=(unsigned long)(irq_ptr->input_qs[i]->slib);
2774
2775 irq_ptr->qdr->qdf0[i].sla=(unsigned long)(irq_ptr->input_qs[i]->sl);
2776
2777 irq_ptr->qdr->qdf0[i].slsba=
2778 (unsigned long)(&irq_ptr->input_qs[i]->slsb.acc.val[0]);
2779
2780 irq_ptr->qdr->qdf0[i].akey=QDIO_STORAGE_KEY;
2781 irq_ptr->qdr->qdf0[i].bkey=QDIO_STORAGE_KEY;
2782 irq_ptr->qdr->qdf0[i].ckey=QDIO_STORAGE_KEY;
2783 irq_ptr->qdr->qdf0[i].dkey=QDIO_STORAGE_KEY;
2784 }
2785
2786 static void
2787 qdio_allocate_fill_output_desc(struct qdio_irq *irq_ptr, int i,
2788 int j, int iqfmt)
2789 {
2790 irq_ptr->output_qs[i]->is_iqdio_q = iqfmt;
2791 irq_ptr->output_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2792
2793 irq_ptr->qdr->qdf0[i+j].sliba=(unsigned long)(irq_ptr->output_qs[i]->slib);
2794
2795 irq_ptr->qdr->qdf0[i+j].sla=(unsigned long)(irq_ptr->output_qs[i]->sl);
2796
2797 irq_ptr->qdr->qdf0[i+j].slsba=
2798 (unsigned long)(&irq_ptr->output_qs[i]->slsb.acc.val[0]);
2799
2800 irq_ptr->qdr->qdf0[i+j].akey=QDIO_STORAGE_KEY;
2801 irq_ptr->qdr->qdf0[i+j].bkey=QDIO_STORAGE_KEY;
2802 irq_ptr->qdr->qdf0[i+j].ckey=QDIO_STORAGE_KEY;
2803 irq_ptr->qdr->qdf0[i+j].dkey=QDIO_STORAGE_KEY;
2804 }
2805
2806
2807 static void
2808 qdio_initialize_set_siga_flags_input(struct qdio_irq *irq_ptr)
2809 {
2810 int i;
2811
2812 for (i=0;i<irq_ptr->no_input_qs;i++) {
2813 irq_ptr->input_qs[i]->siga_sync=
2814 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2815 irq_ptr->input_qs[i]->siga_in=
2816 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2817 irq_ptr->input_qs[i]->siga_out=
2818 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2819 irq_ptr->input_qs[i]->siga_sync_done_on_thinints=
2820 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2821 irq_ptr->input_qs[i]->hydra_gives_outbound_pcis=
2822 irq_ptr->hydra_gives_outbound_pcis;
2823 irq_ptr->input_qs[i]->siga_sync_done_on_outb_tis=
2824 ((irq_ptr->qdioac&
2825 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2826 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2827 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2828 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2829
2830 }
2831 }
2832
2833 static void
2834 qdio_initialize_set_siga_flags_output(struct qdio_irq *irq_ptr)
2835 {
2836 int i;
2837
2838 for (i=0;i<irq_ptr->no_output_qs;i++) {
2839 irq_ptr->output_qs[i]->siga_sync=
2840 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2841 irq_ptr->output_qs[i]->siga_in=
2842 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2843 irq_ptr->output_qs[i]->siga_out=
2844 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2845 irq_ptr->output_qs[i]->siga_sync_done_on_thinints=
2846 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2847 irq_ptr->output_qs[i]->hydra_gives_outbound_pcis=
2848 irq_ptr->hydra_gives_outbound_pcis;
2849 irq_ptr->output_qs[i]->siga_sync_done_on_outb_tis=
2850 ((irq_ptr->qdioac&
2851 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2852 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2853 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2854 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2855
2856 }
2857 }
2858
2859 static int
2860 qdio_establish_irq_check_for_errors(struct ccw_device *cdev, int cstat,
2861 int dstat)
2862 {
2863 char dbf_text[15];
2864 struct qdio_irq *irq_ptr;
2865
2866 irq_ptr = cdev->private->qdio_data;
2867
2868 if (cstat || (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END))) {
2869 sprintf(dbf_text,"ick1%4x",irq_ptr->schid.sch_no);
2870 QDIO_DBF_TEXT2(1,trace,dbf_text);
2871 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2872 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2873 QDIO_PRINT_ERR("received check condition on establish " \
2874 "queues on irq 0.%x.%x (cs=x%x, ds=x%x).\n",
2875 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2876 cstat,dstat);
2877 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ERR);
2878 }
2879
2880 if (!(dstat & DEV_STAT_DEV_END)) {
2881 QDIO_DBF_TEXT2(1,setup,"eq:no de");
2882 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2883 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
2884 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: didn't get "
2885 "device end: dstat=%02x, cstat=%02x\n",
2886 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2887 dstat, cstat);
2888 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2889 return 1;
2890 }
2891
2892 if (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END)) {
2893 QDIO_DBF_TEXT2(1,setup,"eq:badio");
2894 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2895 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
2896 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: got "
2897 "the following devstat: dstat=%02x, "
2898 "cstat=%02x\n", irq_ptr->schid.ssid,
2899 irq_ptr->schid.sch_no, dstat, cstat);
2900 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2901 return 1;
2902 }
2903 return 0;
2904 }
2905
2906 static void
2907 qdio_establish_handle_irq(struct ccw_device *cdev, int cstat, int dstat)
2908 {
2909 struct qdio_irq *irq_ptr;
2910 char dbf_text[15];
2911
2912 irq_ptr = cdev->private->qdio_data;
2913
2914 sprintf(dbf_text,"qehi%4x",cdev->private->schid.sch_no);
2915 QDIO_DBF_TEXT0(0,setup,dbf_text);
2916 QDIO_DBF_TEXT0(0,trace,dbf_text);
2917
2918 if (qdio_establish_irq_check_for_errors(cdev, cstat, dstat)) {
2919 ccw_device_set_timeout(cdev, 0);
2920 return;
2921 }
2922
2923 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ESTABLISHED);
2924 ccw_device_set_timeout(cdev, 0);
2925 }
2926
2927 int
2928 qdio_initialize(struct qdio_initialize *init_data)
2929 {
2930 int rc;
2931 char dbf_text[15];
2932
2933 sprintf(dbf_text,"qini%4x",init_data->cdev->private->schid.sch_no);
2934 QDIO_DBF_TEXT0(0,setup,dbf_text);
2935 QDIO_DBF_TEXT0(0,trace,dbf_text);
2936
2937 rc = qdio_allocate(init_data);
2938 if (rc == 0) {
2939 rc = qdio_establish(init_data);
2940 if (rc != 0)
2941 qdio_free(init_data->cdev);
2942 }
2943
2944 return rc;
2945 }
2946
2947
2948 int
2949 qdio_allocate(struct qdio_initialize *init_data)
2950 {
2951 struct qdio_irq *irq_ptr;
2952 char dbf_text[15];
2953
2954 sprintf(dbf_text,"qalc%4x",init_data->cdev->private->schid.sch_no);
2955 QDIO_DBF_TEXT0(0,setup,dbf_text);
2956 QDIO_DBF_TEXT0(0,trace,dbf_text);
2957 if ( (init_data->no_input_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2958 (init_data->no_output_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2959 ((init_data->no_input_qs) && (!init_data->input_handler)) ||
2960 ((init_data->no_output_qs) && (!init_data->output_handler)) )
2961 return -EINVAL;
2962
2963 if (!init_data->input_sbal_addr_array)
2964 return -EINVAL;
2965
2966 if (!init_data->output_sbal_addr_array)
2967 return -EINVAL;
2968
2969 qdio_allocate_do_dbf(init_data);
2970
2971 /* create irq */
2972 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
2973
2974 QDIO_DBF_TEXT0(0,setup,"irq_ptr:");
2975 QDIO_DBF_HEX0(0,setup,&irq_ptr,sizeof(void*));
2976
2977 if (!irq_ptr) {
2978 QDIO_PRINT_ERR("allocation of irq_ptr failed!\n");
2979 return -ENOMEM;
2980 }
2981
2982 init_MUTEX(&irq_ptr->setting_up_sema);
2983
2984 /* QDR must be in DMA area since CCW data address is only 32 bit */
2985 irq_ptr->qdr = (struct qdr *) __get_free_page(GFP_KERNEL | GFP_DMA);
2986 if (!(irq_ptr->qdr)) {
2987 free_page((unsigned long) irq_ptr);
2988 QDIO_PRINT_ERR("allocation of irq_ptr->qdr failed!\n");
2989 return -ENOMEM;
2990 }
2991 QDIO_DBF_TEXT0(0,setup,"qdr:");
2992 QDIO_DBF_HEX0(0,setup,&irq_ptr->qdr,sizeof(void*));
2993
2994 if (qdio_alloc_qs(irq_ptr,
2995 init_data->no_input_qs,
2996 init_data->no_output_qs)) {
2997 QDIO_PRINT_ERR("queue allocation failed!\n");
2998 qdio_release_irq_memory(irq_ptr);
2999 return -ENOMEM;
3000 }
3001
3002 init_data->cdev->private->qdio_data = irq_ptr;
3003
3004 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_INACTIVE);
3005
3006 return 0;
3007 }
3008
3009 static int qdio_fill_irq(struct qdio_initialize *init_data)
3010 {
3011 int i;
3012 char dbf_text[15];
3013 struct ciw *ciw;
3014 int is_iqdio;
3015 struct qdio_irq *irq_ptr;
3016
3017 irq_ptr = init_data->cdev->private->qdio_data;
3018
3019 memset(irq_ptr,0,((char*)&irq_ptr->qdr)-((char*)irq_ptr));
3020
3021 /* wipes qib.ac, required by ar7063 */
3022 memset(irq_ptr->qdr,0,sizeof(struct qdr));
3023
3024 irq_ptr->int_parm=init_data->int_parm;
3025
3026 irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev);
3027 irq_ptr->no_input_qs=init_data->no_input_qs;
3028 irq_ptr->no_output_qs=init_data->no_output_qs;
3029
3030 if (init_data->q_format==QDIO_IQDIO_QFMT) {
3031 irq_ptr->is_iqdio_irq=1;
3032 irq_ptr->is_thinint_irq=1;
3033 } else {
3034 irq_ptr->is_iqdio_irq=0;
3035 irq_ptr->is_thinint_irq=hydra_thinints;
3036 }
3037 sprintf(dbf_text,"is_i_t%1x%1x",
3038 irq_ptr->is_iqdio_irq,irq_ptr->is_thinint_irq);
3039 QDIO_DBF_TEXT2(0,setup,dbf_text);
3040
3041 if (irq_ptr->is_thinint_irq) {
3042 irq_ptr->dev_st_chg_ind = qdio_get_indicator();
3043 QDIO_DBF_HEX1(0,setup,&irq_ptr->dev_st_chg_ind,sizeof(void*));
3044 if (!irq_ptr->dev_st_chg_ind) {
3045 QDIO_PRINT_WARN("no indicator location available " \
3046 "for irq 0.%x.%x\n",
3047 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
3048 qdio_release_irq_memory(irq_ptr);
3049 return -ENOBUFS;
3050 }
3051 }
3052
3053 /* defaults */
3054 irq_ptr->equeue.cmd=DEFAULT_ESTABLISH_QS_CMD;
3055 irq_ptr->equeue.count=DEFAULT_ESTABLISH_QS_COUNT;
3056 irq_ptr->aqueue.cmd=DEFAULT_ACTIVATE_QS_CMD;
3057 irq_ptr->aqueue.count=DEFAULT_ACTIVATE_QS_COUNT;
3058
3059 qdio_fill_qs(irq_ptr, init_data->cdev,
3060 init_data->no_input_qs,
3061 init_data->no_output_qs,
3062 init_data->input_handler,
3063 init_data->output_handler,init_data->int_parm,
3064 init_data->q_format,init_data->flags,
3065 init_data->input_sbal_addr_array,
3066 init_data->output_sbal_addr_array);
3067
3068 if (!try_module_get(THIS_MODULE)) {
3069 QDIO_PRINT_CRIT("try_module_get() failed!\n");
3070 qdio_release_irq_memory(irq_ptr);
3071 return -EINVAL;
3072 }
3073
3074 qdio_fill_thresholds(irq_ptr,init_data->no_input_qs,
3075 init_data->no_output_qs,
3076 init_data->min_input_threshold,
3077 init_data->max_input_threshold,
3078 init_data->min_output_threshold,
3079 init_data->max_output_threshold);
3080
3081 /* fill in qdr */
3082 irq_ptr->qdr->qfmt=init_data->q_format;
3083 irq_ptr->qdr->iqdcnt=init_data->no_input_qs;
3084 irq_ptr->qdr->oqdcnt=init_data->no_output_qs;
3085 irq_ptr->qdr->iqdsz=sizeof(struct qdesfmt0)/4; /* size in words */
3086 irq_ptr->qdr->oqdsz=sizeof(struct qdesfmt0)/4;
3087
3088 irq_ptr->qdr->qiba=(unsigned long)&irq_ptr->qib;
3089 irq_ptr->qdr->qkey=QDIO_STORAGE_KEY;
3090
3091 /* fill in qib */
3092 irq_ptr->is_qebsm = is_passthrough;
3093 if (irq_ptr->is_qebsm)
3094 irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM;
3095
3096 irq_ptr->qib.qfmt=init_data->q_format;
3097 if (init_data->no_input_qs)
3098 irq_ptr->qib.isliba=(unsigned long)(irq_ptr->input_qs[0]->slib);
3099 if (init_data->no_output_qs)
3100 irq_ptr->qib.osliba=(unsigned long)(irq_ptr->output_qs[0]->slib);
3101 memcpy(irq_ptr->qib.ebcnam,init_data->adapter_name,8);
3102
3103 qdio_set_impl_params(irq_ptr,init_data->qib_param_field_format,
3104 init_data->qib_param_field,
3105 init_data->no_input_qs,
3106 init_data->no_output_qs,
3107 init_data->input_slib_elements,
3108 init_data->output_slib_elements);
3109
3110 /* first input descriptors, then output descriptors */
3111 is_iqdio = (init_data->q_format == QDIO_IQDIO_QFMT) ? 1 : 0;
3112 for (i=0;i<init_data->no_input_qs;i++)
3113 qdio_allocate_fill_input_desc(irq_ptr, i, is_iqdio);
3114
3115 for (i=0;i<init_data->no_output_qs;i++)
3116 qdio_allocate_fill_output_desc(irq_ptr, i,
3117 init_data->no_input_qs,
3118 is_iqdio);
3119
3120 /* qdr, qib, sls, slsbs, slibs, sbales filled. */
3121
3122 /* get qdio commands */
3123 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
3124 if (!ciw) {
3125 QDIO_DBF_TEXT2(1,setup,"no eq");
3126 QDIO_PRINT_INFO("No equeue CIW found for QDIO commands. "
3127 "Trying to use default.\n");
3128 } else
3129 irq_ptr->equeue = *ciw;
3130 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
3131 if (!ciw) {
3132 QDIO_DBF_TEXT2(1,setup,"no aq");
3133 QDIO_PRINT_INFO("No aqueue CIW found for QDIO commands. "
3134 "Trying to use default.\n");
3135 } else
3136 irq_ptr->aqueue = *ciw;
3137
3138 /* Set new interrupt handler. */
3139 irq_ptr->original_int_handler = init_data->cdev->handler;
3140 init_data->cdev->handler = qdio_handler;
3141
3142 return 0;
3143 }
3144
3145 int
3146 qdio_establish(struct qdio_initialize *init_data)
3147 {
3148 struct qdio_irq *irq_ptr;
3149 unsigned long saveflags;
3150 int result, result2;
3151 struct ccw_device *cdev;
3152 char dbf_text[20];
3153
3154 cdev=init_data->cdev;
3155 irq_ptr = cdev->private->qdio_data;
3156 if (!irq_ptr)
3157 return -EINVAL;
3158
3159 if (cdev->private->state != DEV_STATE_ONLINE)
3160 return -EINVAL;
3161
3162 down(&irq_ptr->setting_up_sema);
3163
3164 qdio_fill_irq(init_data);
3165
3166 /* the thinint CHSC stuff */
3167 if (irq_ptr->is_thinint_irq) {
3168
3169 result = tiqdio_set_subchannel_ind(irq_ptr,0);
3170 if (result) {
3171 up(&irq_ptr->setting_up_sema);
3172 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3173 return result;
3174 }
3175 tiqdio_set_delay_target(irq_ptr,TIQDIO_DELAY_TARGET);
3176 }
3177
3178 sprintf(dbf_text,"qest%4x",cdev->private->schid.sch_no);
3179 QDIO_DBF_TEXT0(0,setup,dbf_text);
3180 QDIO_DBF_TEXT0(0,trace,dbf_text);
3181
3182 /* establish q */
3183 irq_ptr->ccw.cmd_code=irq_ptr->equeue.cmd;
3184 irq_ptr->ccw.flags=CCW_FLAG_SLI;
3185 irq_ptr->ccw.count=irq_ptr->equeue.count;
3186 irq_ptr->ccw.cda=QDIO_GET_ADDR(irq_ptr->qdr);
3187
3188 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
3189
3190 ccw_device_set_options_mask(cdev, 0);
3191 result=ccw_device_start_timeout(cdev,&irq_ptr->ccw,
3192 QDIO_DOING_ESTABLISH,0, 0,
3193 QDIO_ESTABLISH_TIMEOUT);
3194 if (result) {
3195 result2=ccw_device_start_timeout(cdev,&irq_ptr->ccw,
3196 QDIO_DOING_ESTABLISH,0,0,
3197 QDIO_ESTABLISH_TIMEOUT);
3198 sprintf(dbf_text,"eq:io%4x",result);
3199 QDIO_DBF_TEXT2(1,setup,dbf_text);
3200 if (result2) {
3201 sprintf(dbf_text,"eq:io%4x",result);
3202 QDIO_DBF_TEXT2(1,setup,dbf_text);
3203 }
3204 QDIO_PRINT_WARN("establish queues on irq 0.%x.%04x: do_IO " \
3205 "returned %i, next try returned %i\n",
3206 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
3207 result, result2);
3208 result=result2;
3209 if (result)
3210 ccw_device_set_timeout(cdev, 0);
3211 }
3212
3213 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
3214
3215 if (result) {
3216 up(&irq_ptr->setting_up_sema);
3217 qdio_shutdown(cdev,QDIO_FLAG_CLEANUP_USING_CLEAR);
3218 return result;
3219 }
3220
3221 /* Timeout is cared for already by using ccw_device_start_timeout(). */
3222 wait_event_interruptible(cdev->private->wait_q,
3223 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
3224 irq_ptr->state == QDIO_IRQ_STATE_ERR);
3225
3226 if (irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED)
3227 result = 0;
3228 else {
3229 up(&irq_ptr->setting_up_sema);
3230 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3231 return -EIO;
3232 }
3233
3234 qdio_get_ssqd_information(irq_ptr);
3235 /* if this gets set once, we're running under VM and can omit SVSes */
3236 if (irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY)
3237 omit_svs=1;
3238
3239 sprintf(dbf_text,"qdioac%2x",irq_ptr->qdioac);
3240 QDIO_DBF_TEXT2(0,setup,dbf_text);
3241
3242 sprintf(dbf_text,"qib ac%2x",irq_ptr->qib.ac);
3243 QDIO_DBF_TEXT2(0,setup,dbf_text);
3244
3245 irq_ptr->hydra_gives_outbound_pcis=
3246 irq_ptr->qib.ac&QIB_AC_OUTBOUND_PCI_SUPPORTED;
3247 irq_ptr->sync_done_on_outb_pcis=
3248 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS;
3249
3250 qdio_initialize_set_siga_flags_input(irq_ptr);
3251 qdio_initialize_set_siga_flags_output(irq_ptr);
3252
3253 up(&irq_ptr->setting_up_sema);
3254
3255 return result;
3256
3257 }
3258
3259 int
3260 qdio_activate(struct ccw_device *cdev, int flags)
3261 {
3262 struct qdio_irq *irq_ptr;
3263 int i,result=0,result2;
3264 unsigned long saveflags;
3265 char dbf_text[20]; /* see qdio_initialize */
3266
3267 irq_ptr = cdev->private->qdio_data;
3268 if (!irq_ptr)
3269 return -ENODEV;
3270
3271 if (cdev->private->state != DEV_STATE_ONLINE)
3272 return -EINVAL;
3273
3274 down(&irq_ptr->setting_up_sema);
3275 if (irq_ptr->state==QDIO_IRQ_STATE_INACTIVE) {
3276 result=-EBUSY;
3277 goto out;
3278 }
3279
3280 sprintf(dbf_text,"qact%4x", irq_ptr->schid.sch_no);
3281 QDIO_DBF_TEXT2(0,setup,dbf_text);
3282 QDIO_DBF_TEXT2(0,trace,dbf_text);
3283
3284 /* activate q */
3285 irq_ptr->ccw.cmd_code=irq_ptr->aqueue.cmd;
3286 irq_ptr->ccw.flags=CCW_FLAG_SLI;
3287 irq_ptr->ccw.count=irq_ptr->aqueue.count;
3288 irq_ptr->ccw.cda=QDIO_GET_ADDR(0);
3289
3290 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
3291
3292 ccw_device_set_timeout(cdev, 0);
3293 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
3294 result=ccw_device_start(cdev,&irq_ptr->ccw,QDIO_DOING_ACTIVATE,
3295 0, DOIO_DENY_PREFETCH);
3296 if (result) {
3297 result2=ccw_device_start(cdev,&irq_ptr->ccw,
3298 QDIO_DOING_ACTIVATE,0,0);
3299 sprintf(dbf_text,"aq:io%4x",result);
3300 QDIO_DBF_TEXT2(1,setup,dbf_text);
3301 if (result2) {
3302 sprintf(dbf_text,"aq:io%4x",result);
3303 QDIO_DBF_TEXT2(1,setup,dbf_text);
3304 }
3305 QDIO_PRINT_WARN("activate queues on irq 0.%x.%04x: do_IO " \
3306 "returned %i, next try returned %i\n",
3307 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
3308 result, result2);
3309 result=result2;
3310 }
3311
3312 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
3313 if (result)
3314 goto out;
3315
3316 for (i=0;i<irq_ptr->no_input_qs;i++) {
3317 if (irq_ptr->is_thinint_irq) {
3318 /*
3319 * that way we know, that, if we will get interrupted
3320 * by tiqdio_inbound_processing, qdio_unmark_q will
3321 * not be called
3322 */
3323 qdio_reserve_q(irq_ptr->input_qs[i]);
3324 qdio_mark_tiq(irq_ptr->input_qs[i]);
3325 qdio_release_q(irq_ptr->input_qs[i]);
3326 }
3327 }
3328
3329 if (flags&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT) {
3330 for (i=0;i<irq_ptr->no_input_qs;i++) {
3331 irq_ptr->input_qs[i]->is_input_q|=
3332 QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT;
3333 }
3334 }
3335
3336 wait_event_interruptible_timeout(cdev->private->wait_q,
3337 ((irq_ptr->state ==
3338 QDIO_IRQ_STATE_STOPPED) ||
3339 (irq_ptr->state ==
3340 QDIO_IRQ_STATE_ERR)),
3341 QDIO_ACTIVATE_TIMEOUT);
3342
3343 switch (irq_ptr->state) {
3344 case QDIO_IRQ_STATE_STOPPED:
3345 case QDIO_IRQ_STATE_ERR:
3346 up(&irq_ptr->setting_up_sema);
3347 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3348 down(&irq_ptr->setting_up_sema);
3349 result = -EIO;
3350 break;
3351 default:
3352 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
3353 result = 0;
3354 }
3355 out:
3356 up(&irq_ptr->setting_up_sema);
3357
3358 return result;
3359 }
3360
3361 /* buffers filled forwards again to make Rick happy */
3362 static void
3363 qdio_do_qdio_fill_input(struct qdio_q *q, unsigned int qidx,
3364 unsigned int count, struct qdio_buffer *buffers)
3365 {
3366 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3367 int tmp = 0;
3368
3369 qidx &= (QDIO_MAX_BUFFERS_PER_Q - 1);
3370 if (irq->is_qebsm) {
3371 while (count) {
3372 tmp = set_slsb(q, &qidx, SLSB_CU_INPUT_EMPTY, &count);
3373 if (!tmp)
3374 return;
3375 }
3376 return;
3377 }
3378 for (;;) {
3379 set_slsb(q, &qidx, SLSB_CU_INPUT_EMPTY, &count);
3380 count--;
3381 if (!count) break;
3382 qidx = (qidx + 1) & (QDIO_MAX_BUFFERS_PER_Q - 1);
3383 }
3384 }
3385
3386 static void
3387 qdio_do_qdio_fill_output(struct qdio_q *q, unsigned int qidx,
3388 unsigned int count, struct qdio_buffer *buffers)
3389 {
3390 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3391 int tmp = 0;
3392
3393 qidx &= (QDIO_MAX_BUFFERS_PER_Q - 1);
3394 if (irq->is_qebsm) {
3395 while (count) {
3396 tmp = set_slsb(q, &qidx, SLSB_CU_OUTPUT_PRIMED, &count);
3397 if (!tmp)
3398 return;
3399 }
3400 return;
3401 }
3402
3403 for (;;) {
3404 set_slsb(q, &qidx, SLSB_CU_OUTPUT_PRIMED, &count);
3405 count--;
3406 if (!count) break;
3407 qidx = (qidx + 1) & (QDIO_MAX_BUFFERS_PER_Q - 1);
3408 }
3409 }
3410
3411 static void
3412 do_qdio_handle_inbound(struct qdio_q *q, unsigned int callflags,
3413 unsigned int qidx, unsigned int count,
3414 struct qdio_buffer *buffers)
3415 {
3416 int used_elements;
3417
3418 /* This is the inbound handling of queues */
3419 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3420
3421 qdio_do_qdio_fill_input(q,qidx,count,buffers);
3422
3423 if ((used_elements+count==QDIO_MAX_BUFFERS_PER_Q)&&
3424 (callflags&QDIO_FLAG_UNDER_INTERRUPT))
3425 atomic_xchg(&q->polling,0);
3426
3427 if (used_elements)
3428 return;
3429 if (callflags&QDIO_FLAG_DONT_SIGA)
3430 return;
3431 if (q->siga_in) {
3432 int result;
3433
3434 result=qdio_siga_input(q);
3435 if (result) {
3436 if (q->siga_error)
3437 q->error_status_flags|=
3438 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
3439 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
3440 q->siga_error=result;
3441 }
3442 }
3443
3444 qdio_mark_q(q);
3445 }
3446
3447 static void
3448 do_qdio_handle_outbound(struct qdio_q *q, unsigned int callflags,
3449 unsigned int qidx, unsigned int count,
3450 struct qdio_buffer *buffers)
3451 {
3452 int used_elements;
3453 unsigned int cnt, start_buf;
3454 unsigned char state = 0;
3455 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3456
3457 /* This is the outbound handling of queues */
3458 qdio_do_qdio_fill_output(q,qidx,count,buffers);
3459
3460 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3461
3462 if (callflags&QDIO_FLAG_DONT_SIGA) {
3463 qdio_perf_stat_inc(&perf_stats.outbound_cnt);
3464 return;
3465 }
3466 if (callflags & QDIO_FLAG_PCI_OUT)
3467 q->is_pci_out = 1;
3468 else
3469 q->is_pci_out = 0;
3470 if (q->is_iqdio_q) {
3471 /* one siga for every sbal */
3472 while (count--)
3473 qdio_kick_outbound_q(q);
3474
3475 __qdio_outbound_processing(q);
3476 } else {
3477 /* under VM, we do a SIGA sync unconditionally */
3478 SYNC_MEMORY;
3479 else {
3480 /*
3481 * w/o shadow queues (else branch of
3482 * SYNC_MEMORY :-/ ), we try to
3483 * fast-requeue buffers
3484 */
3485 if (irq->is_qebsm) {
3486 cnt = 1;
3487 start_buf = ((qidx+QDIO_MAX_BUFFERS_PER_Q-1) &
3488 (QDIO_MAX_BUFFERS_PER_Q-1));
3489 qdio_do_eqbs(q, &state, &start_buf, &cnt);
3490 } else
3491 state = q->slsb.acc.val[(qidx+QDIO_MAX_BUFFERS_PER_Q-1)
3492 &(QDIO_MAX_BUFFERS_PER_Q-1) ];
3493 if (state != SLSB_CU_OUTPUT_PRIMED) {
3494 qdio_kick_outbound_q(q);
3495 } else {
3496 QDIO_DBF_TEXT3(0,trace, "fast-req");
3497 qdio_perf_stat_inc(&perf_stats.fast_reqs);
3498 }
3499 }
3500 /*
3501 * only marking the q could take too long,
3502 * the upper layer module could do a lot of
3503 * traffic in that time
3504 */
3505 __qdio_outbound_processing(q);
3506 }
3507
3508 qdio_perf_stat_inc(&perf_stats.outbound_cnt);
3509 }
3510
3511 /* count must be 1 in iqdio */
3512 int
3513 do_QDIO(struct ccw_device *cdev,unsigned int callflags,
3514 unsigned int queue_number, unsigned int qidx,
3515 unsigned int count,struct qdio_buffer *buffers)
3516 {
3517 struct qdio_irq *irq_ptr;
3518 #ifdef CONFIG_QDIO_DEBUG
3519 char dbf_text[20];
3520
3521 sprintf(dbf_text,"doQD%04x",cdev->private->schid.sch_no);
3522 QDIO_DBF_TEXT3(0,trace,dbf_text);
3523 #endif /* CONFIG_QDIO_DEBUG */
3524
3525 if ( (qidx>QDIO_MAX_BUFFERS_PER_Q) ||
3526 (count>QDIO_MAX_BUFFERS_PER_Q) ||
3527 (queue_number>QDIO_MAX_QUEUES_PER_IRQ) )
3528 return -EINVAL;
3529
3530 if (count==0)
3531 return 0;
3532
3533 irq_ptr = cdev->private->qdio_data;
3534 if (!irq_ptr)
3535 return -ENODEV;
3536
3537 #ifdef CONFIG_QDIO_DEBUG
3538 if (callflags&QDIO_FLAG_SYNC_INPUT)
3539 QDIO_DBF_HEX3(0,trace,&irq_ptr->input_qs[queue_number],
3540 sizeof(void*));
3541 else
3542 QDIO_DBF_HEX3(0,trace,&irq_ptr->output_qs[queue_number],
3543 sizeof(void*));
3544 sprintf(dbf_text,"flag%04x",callflags);
3545 QDIO_DBF_TEXT3(0,trace,dbf_text);
3546 sprintf(dbf_text,"qi%02xct%02x",qidx,count);
3547 QDIO_DBF_TEXT3(0,trace,dbf_text);
3548 #endif /* CONFIG_QDIO_DEBUG */
3549
3550 if (irq_ptr->state!=QDIO_IRQ_STATE_ACTIVE)
3551 return -EBUSY;
3552
3553 if (callflags&QDIO_FLAG_SYNC_INPUT)
3554 do_qdio_handle_inbound(irq_ptr->input_qs[queue_number],
3555 callflags, qidx, count, buffers);
3556 else if (callflags&QDIO_FLAG_SYNC_OUTPUT)
3557 do_qdio_handle_outbound(irq_ptr->output_qs[queue_number],
3558 callflags, qidx, count, buffers);
3559 else {
3560 QDIO_DBF_TEXT3(1,trace,"doQD:inv");
3561 return -EINVAL;
3562 }
3563 return 0;
3564 }
3565
3566 static int
3567 qdio_perf_procfile_read(char *buffer, char **buffer_location, off_t offset,
3568 int buffer_length, int *eof, void *data)
3569 {
3570 int c=0;
3571
3572 /* we are always called with buffer_length=4k, so we all
3573 deliver on the first read */
3574 if (offset>0)
3575 return 0;
3576
3577 #define _OUTP_IT(x...) c+=sprintf(buffer+c,x)
3578 #ifdef CONFIG_64BIT
3579 _OUTP_IT("Number of tasklet runs (total) : %li\n",
3580 (long)atomic64_read(&perf_stats.tl_runs));
3581 _OUTP_IT("Inbound tasklet runs tried/retried : %li/%li\n",
3582 (long)atomic64_read(&perf_stats.inbound_tl_runs),
3583 (long)atomic64_read(&perf_stats.inbound_tl_runs_resched));
3584 _OUTP_IT("Inbound-thin tasklet runs tried/retried : %li/%li\n",
3585 (long)atomic64_read(&perf_stats.inbound_thin_tl_runs),
3586 (long)atomic64_read(&perf_stats.inbound_thin_tl_runs_resched));
3587 _OUTP_IT("Outbound tasklet runs tried/retried : %li/%li\n",
3588 (long)atomic64_read(&perf_stats.outbound_tl_runs),
3589 (long)atomic64_read(&perf_stats.outbound_tl_runs_resched));
3590 _OUTP_IT("\n");
3591 _OUTP_IT("Number of SIGA sync's issued : %li\n",
3592 (long)atomic64_read(&perf_stats.siga_syncs));
3593 _OUTP_IT("Number of SIGA in's issued : %li\n",
3594 (long)atomic64_read(&perf_stats.siga_ins));
3595 _OUTP_IT("Number of SIGA out's issued : %li\n",
3596 (long)atomic64_read(&perf_stats.siga_outs));
3597 _OUTP_IT("Number of PCIs caught : %li\n",
3598 (long)atomic64_read(&perf_stats.pcis));
3599 _OUTP_IT("Number of adapter interrupts caught : %li\n",
3600 (long)atomic64_read(&perf_stats.thinints));
3601 _OUTP_IT("Number of fast requeues (outg. SBALs w/o SIGA) : %li\n",
3602 (long)atomic64_read(&perf_stats.fast_reqs));
3603 _OUTP_IT("\n");
3604 _OUTP_IT("Number of inbound transfers : %li\n",
3605 (long)atomic64_read(&perf_stats.inbound_cnt));
3606 _OUTP_IT("Number of do_QDIOs outbound : %li\n",
3607 (long)atomic64_read(&perf_stats.outbound_cnt));
3608 #else /* CONFIG_64BIT */
3609 _OUTP_IT("Number of tasklet runs (total) : %i\n",
3610 atomic_read(&perf_stats.tl_runs));
3611 _OUTP_IT("Inbound tasklet runs tried/retried : %i/%i\n",
3612 atomic_read(&perf_stats.inbound_tl_runs),
3613 atomic_read(&perf_stats.inbound_tl_runs_resched));
3614 _OUTP_IT("Inbound-thin tasklet runs tried/retried : %i/%i\n",
3615 atomic_read(&perf_stats.inbound_thin_tl_runs),
3616 atomic_read(&perf_stats.inbound_thin_tl_runs_resched));
3617 _OUTP_IT("Outbound tasklet runs tried/retried : %i/%i\n",
3618 atomic_read(&perf_stats.outbound_tl_runs),
3619 atomic_read(&perf_stats.outbound_tl_runs_resched));
3620 _OUTP_IT("\n");
3621 _OUTP_IT("Number of SIGA sync's issued : %i\n",
3622 atomic_read(&perf_stats.siga_syncs));
3623 _OUTP_IT("Number of SIGA in's issued : %i\n",
3624 atomic_read(&perf_stats.siga_ins));
3625 _OUTP_IT("Number of SIGA out's issued : %i\n",
3626 atomic_read(&perf_stats.siga_outs));
3627 _OUTP_IT("Number of PCIs caught : %i\n",
3628 atomic_read(&perf_stats.pcis));
3629 _OUTP_IT("Number of adapter interrupts caught : %i\n",
3630 atomic_read(&perf_stats.thinints));
3631 _OUTP_IT("Number of fast requeues (outg. SBALs w/o SIGA) : %i\n",
3632 atomic_read(&perf_stats.fast_reqs));
3633 _OUTP_IT("\n");
3634 _OUTP_IT("Number of inbound transfers : %i\n",
3635 atomic_read(&perf_stats.inbound_cnt));
3636 _OUTP_IT("Number of do_QDIOs outbound : %i\n",
3637 atomic_read(&perf_stats.outbound_cnt));
3638 #endif /* CONFIG_64BIT */
3639 _OUTP_IT("\n");
3640
3641 return c;
3642 }
3643
3644 static struct proc_dir_entry *qdio_perf_proc_file;
3645
3646 static void
3647 qdio_add_procfs_entry(void)
3648 {
3649 proc_perf_file_registration=0;
3650 qdio_perf_proc_file=create_proc_entry(QDIO_PERF,
3651 S_IFREG|0444,&proc_root);
3652 if (qdio_perf_proc_file) {
3653 qdio_perf_proc_file->read_proc=&qdio_perf_procfile_read;
3654 } else proc_perf_file_registration=-1;
3655
3656 if (proc_perf_file_registration)
3657 QDIO_PRINT_WARN("was not able to register perf. " \
3658 "proc-file (%i).\n",
3659 proc_perf_file_registration);
3660 }
3661
3662 static void
3663 qdio_remove_procfs_entry(void)
3664 {
3665 if (!proc_perf_file_registration) /* means if it went ok earlier */
3666 remove_proc_entry(QDIO_PERF,&proc_root);
3667 }
3668
3669 /**
3670 * attributes in sysfs
3671 *****************************************************************************/
3672
3673 static ssize_t
3674 qdio_performance_stats_show(struct bus_type *bus, char *buf)
3675 {
3676 return sprintf(buf, "%i\n", qdio_performance_stats ? 1 : 0);
3677 }
3678
3679 static ssize_t
3680 qdio_performance_stats_store(struct bus_type *bus, const char *buf, size_t count)
3681 {
3682 char *tmp;
3683 int i;
3684
3685 i = simple_strtoul(buf, &tmp, 16);
3686 if ((i == 0) || (i == 1)) {
3687 if (i == qdio_performance_stats)
3688 return count;
3689 qdio_performance_stats = i;
3690 if (i==0) {
3691 /* reset perf. stat. info */
3692 #ifdef CONFIG_64BIT
3693 atomic64_set(&perf_stats.tl_runs, 0);
3694 atomic64_set(&perf_stats.outbound_tl_runs, 0);
3695 atomic64_set(&perf_stats.inbound_tl_runs, 0);
3696 atomic64_set(&perf_stats.inbound_tl_runs_resched, 0);
3697 atomic64_set(&perf_stats.inbound_thin_tl_runs, 0);
3698 atomic64_set(&perf_stats.inbound_thin_tl_runs_resched,
3699 0);
3700 atomic64_set(&perf_stats.siga_outs, 0);
3701 atomic64_set(&perf_stats.siga_ins, 0);
3702 atomic64_set(&perf_stats.siga_syncs, 0);
3703 atomic64_set(&perf_stats.pcis, 0);
3704 atomic64_set(&perf_stats.thinints, 0);
3705 atomic64_set(&perf_stats.fast_reqs, 0);
3706 atomic64_set(&perf_stats.outbound_cnt, 0);
3707 atomic64_set(&perf_stats.inbound_cnt, 0);
3708 #else /* CONFIG_64BIT */
3709 atomic_set(&perf_stats.tl_runs, 0);
3710 atomic_set(&perf_stats.outbound_tl_runs, 0);
3711 atomic_set(&perf_stats.inbound_tl_runs, 0);
3712 atomic_set(&perf_stats.inbound_tl_runs_resched, 0);
3713 atomic_set(&perf_stats.inbound_thin_tl_runs, 0);
3714 atomic_set(&perf_stats.inbound_thin_tl_runs_resched, 0);
3715 atomic_set(&perf_stats.siga_outs, 0);
3716 atomic_set(&perf_stats.siga_ins, 0);
3717 atomic_set(&perf_stats.siga_syncs, 0);
3718 atomic_set(&perf_stats.pcis, 0);
3719 atomic_set(&perf_stats.thinints, 0);
3720 atomic_set(&perf_stats.fast_reqs, 0);
3721 atomic_set(&perf_stats.outbound_cnt, 0);
3722 atomic_set(&perf_stats.inbound_cnt, 0);
3723 #endif /* CONFIG_64BIT */
3724 }
3725 } else {
3726 QDIO_PRINT_WARN("QDIO performance_stats: write 0 or 1 to this file!\n");
3727 return -EINVAL;
3728 }
3729 return count;
3730 }
3731
3732 static BUS_ATTR(qdio_performance_stats, 0644, qdio_performance_stats_show,
3733 qdio_performance_stats_store);
3734
3735 static void
3736 tiqdio_register_thinints(void)
3737 {
3738 char dbf_text[20];
3739 register_thinint_result=
3740 s390_register_adapter_interrupt(&tiqdio_thinint_handler);
3741 if (register_thinint_result) {
3742 sprintf(dbf_text,"regthn%x",(register_thinint_result&0xff));
3743 QDIO_DBF_TEXT0(0,setup,dbf_text);
3744 QDIO_PRINT_ERR("failed to register adapter handler " \
3745 "(rc=%i).\nAdapter interrupts might " \
3746 "not work. Continuing.\n",
3747 register_thinint_result);
3748 }
3749 }
3750
3751 static void
3752 tiqdio_unregister_thinints(void)
3753 {
3754 if (!register_thinint_result)
3755 s390_unregister_adapter_interrupt(&tiqdio_thinint_handler);
3756 }
3757
3758 static int
3759 qdio_get_qdio_memory(void)
3760 {
3761 int i;
3762 indicator_used[0]=1;
3763
3764 for (i=1;i<INDICATORS_PER_CACHELINE;i++)
3765 indicator_used[i]=0;
3766 indicators = kzalloc(sizeof(__u32)*(INDICATORS_PER_CACHELINE),
3767 GFP_KERNEL);
3768 if (!indicators)
3769 return -ENOMEM;
3770 return 0;
3771 }
3772
3773 static void
3774 qdio_release_qdio_memory(void)
3775 {
3776 kfree(indicators);
3777 }
3778
3779
3780 static void
3781 qdio_unregister_dbf_views(void)
3782 {
3783 if (qdio_dbf_setup)
3784 debug_unregister(qdio_dbf_setup);
3785 if (qdio_dbf_sbal)
3786 debug_unregister(qdio_dbf_sbal);
3787 if (qdio_dbf_sense)
3788 debug_unregister(qdio_dbf_sense);
3789 if (qdio_dbf_trace)
3790 debug_unregister(qdio_dbf_trace);
3791 #ifdef CONFIG_QDIO_DEBUG
3792 if (qdio_dbf_slsb_out)
3793 debug_unregister(qdio_dbf_slsb_out);
3794 if (qdio_dbf_slsb_in)
3795 debug_unregister(qdio_dbf_slsb_in);
3796 #endif /* CONFIG_QDIO_DEBUG */
3797 }
3798
3799 static int
3800 qdio_register_dbf_views(void)
3801 {
3802 qdio_dbf_setup=debug_register(QDIO_DBF_SETUP_NAME,
3803 QDIO_DBF_SETUP_PAGES,
3804 QDIO_DBF_SETUP_NR_AREAS,
3805 QDIO_DBF_SETUP_LEN);
3806 if (!qdio_dbf_setup)
3807 goto oom;
3808 debug_register_view(qdio_dbf_setup,&debug_hex_ascii_view);
3809 debug_set_level(qdio_dbf_setup,QDIO_DBF_SETUP_LEVEL);
3810
3811 qdio_dbf_sbal=debug_register(QDIO_DBF_SBAL_NAME,
3812 QDIO_DBF_SBAL_PAGES,
3813 QDIO_DBF_SBAL_NR_AREAS,
3814 QDIO_DBF_SBAL_LEN);
3815 if (!qdio_dbf_sbal)
3816 goto oom;
3817
3818 debug_register_view(qdio_dbf_sbal,&debug_hex_ascii_view);
3819 debug_set_level(qdio_dbf_sbal,QDIO_DBF_SBAL_LEVEL);
3820
3821 qdio_dbf_sense=debug_register(QDIO_DBF_SENSE_NAME,
3822 QDIO_DBF_SENSE_PAGES,
3823 QDIO_DBF_SENSE_NR_AREAS,
3824 QDIO_DBF_SENSE_LEN);
3825 if (!qdio_dbf_sense)
3826 goto oom;
3827
3828 debug_register_view(qdio_dbf_sense,&debug_hex_ascii_view);
3829 debug_set_level(qdio_dbf_sense,QDIO_DBF_SENSE_LEVEL);
3830
3831 qdio_dbf_trace=debug_register(QDIO_DBF_TRACE_NAME,
3832 QDIO_DBF_TRACE_PAGES,
3833 QDIO_DBF_TRACE_NR_AREAS,
3834 QDIO_DBF_TRACE_LEN);
3835 if (!qdio_dbf_trace)
3836 goto oom;
3837
3838 debug_register_view(qdio_dbf_trace,&debug_hex_ascii_view);
3839 debug_set_level(qdio_dbf_trace,QDIO_DBF_TRACE_LEVEL);
3840
3841 #ifdef CONFIG_QDIO_DEBUG
3842 qdio_dbf_slsb_out=debug_register(QDIO_DBF_SLSB_OUT_NAME,
3843 QDIO_DBF_SLSB_OUT_PAGES,
3844 QDIO_DBF_SLSB_OUT_NR_AREAS,
3845 QDIO_DBF_SLSB_OUT_LEN);
3846 if (!qdio_dbf_slsb_out)
3847 goto oom;
3848 debug_register_view(qdio_dbf_slsb_out,&debug_hex_ascii_view);
3849 debug_set_level(qdio_dbf_slsb_out,QDIO_DBF_SLSB_OUT_LEVEL);
3850
3851 qdio_dbf_slsb_in=debug_register(QDIO_DBF_SLSB_IN_NAME,
3852 QDIO_DBF_SLSB_IN_PAGES,
3853 QDIO_DBF_SLSB_IN_NR_AREAS,
3854 QDIO_DBF_SLSB_IN_LEN);
3855 if (!qdio_dbf_slsb_in)
3856 goto oom;
3857 debug_register_view(qdio_dbf_slsb_in,&debug_hex_ascii_view);
3858 debug_set_level(qdio_dbf_slsb_in,QDIO_DBF_SLSB_IN_LEVEL);
3859 #endif /* CONFIG_QDIO_DEBUG */
3860 return 0;
3861 oom:
3862 QDIO_PRINT_ERR("not enough memory for dbf.\n");
3863 qdio_unregister_dbf_views();
3864 return -ENOMEM;
3865 }
3866
3867 static void *qdio_mempool_alloc(gfp_t gfp_mask, void *size)
3868 {
3869 return (void *) get_zeroed_page(gfp_mask|GFP_DMA);
3870 }
3871
3872 static void qdio_mempool_free(void *element, void *size)
3873 {
3874 free_page((unsigned long) element);
3875 }
3876
3877 static int __init
3878 init_QDIO(void)
3879 {
3880 int res;
3881 void *ptr;
3882
3883 printk("qdio: loading %s\n",version);
3884
3885 res=qdio_get_qdio_memory();
3886 if (res)
3887 return res;
3888
3889 qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q),
3890 256, 0, NULL);
3891 if (!qdio_q_cache) {
3892 qdio_release_qdio_memory();
3893 return -ENOMEM;
3894 }
3895
3896 res = qdio_register_dbf_views();
3897 if (res) {
3898 kmem_cache_destroy(qdio_q_cache);
3899 qdio_release_qdio_memory();
3900 return res;
3901 }
3902
3903 QDIO_DBF_TEXT0(0,setup,"initQDIO");
3904 res = bus_create_file(&ccw_bus_type, &bus_attr_qdio_performance_stats);
3905
3906 memset((void*)&perf_stats,0,sizeof(perf_stats));
3907 QDIO_DBF_TEXT0(0,setup,"perfstat");
3908 ptr=&perf_stats;
3909 QDIO_DBF_HEX0(0,setup,&ptr,sizeof(void*));
3910
3911 qdio_add_procfs_entry();
3912
3913 qdio_mempool_scssc = mempool_create(QDIO_MEMPOOL_SCSSC_ELEMENTS,
3914 qdio_mempool_alloc,
3915 qdio_mempool_free, NULL);
3916
3917 if (tiqdio_check_chsc_availability())
3918 QDIO_PRINT_ERR("Not all CHSCs supported. Continuing.\n");
3919
3920 tiqdio_register_thinints();
3921
3922 return 0;
3923 }
3924
3925 static void __exit
3926 cleanup_QDIO(void)
3927 {
3928 tiqdio_unregister_thinints();
3929 qdio_remove_procfs_entry();
3930 qdio_release_qdio_memory();
3931 qdio_unregister_dbf_views();
3932 mempool_destroy(qdio_mempool_scssc);
3933 kmem_cache_destroy(qdio_q_cache);
3934 bus_remove_file(&ccw_bus_type, &bus_attr_qdio_performance_stats);
3935 printk("qdio: %s: module removed\n",version);
3936 }
3937
3938 module_init(init_QDIO);
3939 module_exit(cleanup_QDIO);
3940
3941 EXPORT_SYMBOL(qdio_allocate);
3942 EXPORT_SYMBOL(qdio_establish);
3943 EXPORT_SYMBOL(qdio_initialize);
3944 EXPORT_SYMBOL(qdio_activate);
3945 EXPORT_SYMBOL(do_QDIO);
3946 EXPORT_SYMBOL(qdio_shutdown);
3947 EXPORT_SYMBOL(qdio_free);
3948 EXPORT_SYMBOL(qdio_cleanup);
3949 EXPORT_SYMBOL(qdio_synchronize);
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