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Merge git://git.linux-nfs.org/pub/linux/nfs-2.6
[mirror_ubuntu-bionic-kernel.git] / drivers / s390 / cio / qdio.c
1 /*
2 *
3 * linux/drivers/s390/cio/qdio.c
4 *
5 * Linux for S/390 QDIO base support, Hipersocket base support
6 * version 2
7 *
8 * Copyright 2000,2002 IBM Corporation
9 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
10 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
11 *
12 * Restriction: only 63 iqdio subchannels would have its own indicator,
13 * after that, subsequent subchannels share one indicator
14 *
15 *
16 *
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2, or (at your option)
21 * any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 */
32
33 #include <linux/module.h>
34 #include <linux/init.h>
35
36 #include <linux/slab.h>
37 #include <linux/kernel.h>
38 #include <linux/proc_fs.h>
39 #include <linux/timer.h>
40 #include <linux/mempool.h>
41
42 #include <asm/ccwdev.h>
43 #include <asm/io.h>
44 #include <asm/atomic.h>
45 #include <asm/semaphore.h>
46 #include <asm/timex.h>
47
48 #include <asm/debug.h>
49 #include <asm/s390_rdev.h>
50 #include <asm/qdio.h>
51
52 #include "cio.h"
53 #include "css.h"
54 #include "device.h"
55 #include "airq.h"
56 #include "qdio.h"
57 #include "ioasm.h"
58 #include "chsc.h"
59
60 /****************** MODULE PARAMETER VARIABLES ********************/
61 MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>");
62 MODULE_DESCRIPTION("QDIO base support version 2, " \
63 "Copyright 2000 IBM Corporation");
64 MODULE_LICENSE("GPL");
65
66 /******************** HERE WE GO ***********************************/
67
68 static const char version[] = "QDIO base support version 2";
69
70 static int qdio_performance_stats = 0;
71 static int proc_perf_file_registration;
72 static struct qdio_perf_stats perf_stats;
73
74 static int hydra_thinints;
75 static int is_passthrough = 0;
76 static int omit_svs;
77
78 static int indicator_used[INDICATORS_PER_CACHELINE];
79 static __u32 * volatile indicators;
80 static __u32 volatile spare_indicator;
81 static atomic_t spare_indicator_usecount;
82 #define QDIO_MEMPOOL_SCSSC_ELEMENTS 2
83 static mempool_t *qdio_mempool_scssc;
84 static struct kmem_cache *qdio_q_cache;
85
86 static debug_info_t *qdio_dbf_setup;
87 static debug_info_t *qdio_dbf_sbal;
88 static debug_info_t *qdio_dbf_trace;
89 static debug_info_t *qdio_dbf_sense;
90 #ifdef CONFIG_QDIO_DEBUG
91 static debug_info_t *qdio_dbf_slsb_out;
92 static debug_info_t *qdio_dbf_slsb_in;
93 #endif /* CONFIG_QDIO_DEBUG */
94
95 /* iQDIO stuff: */
96 static volatile struct qdio_q *tiq_list=NULL; /* volatile as it could change
97 during a while loop */
98 static DEFINE_SPINLOCK(ttiq_list_lock);
99 static int register_thinint_result;
100 static void tiqdio_tl(unsigned long);
101 static DECLARE_TASKLET(tiqdio_tasklet,tiqdio_tl,0);
102
103 /* not a macro, as one of the arguments is atomic_read */
104 static inline int
105 qdio_min(int a,int b)
106 {
107 if (a<b)
108 return a;
109 else
110 return b;
111 }
112
113 /***************** SCRUBBER HELPER ROUTINES **********************/
114 #ifdef CONFIG_64BIT
115 static inline void qdio_perf_stat_inc(atomic64_t *count)
116 {
117 if (qdio_performance_stats)
118 atomic64_inc(count);
119 }
120
121 static inline void qdio_perf_stat_dec(atomic64_t *count)
122 {
123 if (qdio_performance_stats)
124 atomic64_dec(count);
125 }
126 #else /* CONFIG_64BIT */
127 static inline void qdio_perf_stat_inc(atomic_t *count)
128 {
129 if (qdio_performance_stats)
130 atomic_inc(count);
131 }
132
133 static inline void qdio_perf_stat_dec(atomic_t *count)
134 {
135 if (qdio_performance_stats)
136 atomic_dec(count);
137 }
138 #endif /* CONFIG_64BIT */
139
140 static inline __u64
141 qdio_get_micros(void)
142 {
143 return (get_clock() >> 12); /* time>>12 is microseconds */
144 }
145
146 /*
147 * unfortunately, we can't just xchg the values; in do_QDIO we want to reserve
148 * the q in any case, so that we'll not be interrupted when we are in
149 * qdio_mark_tiq... shouldn't have a really bad impact, as reserving almost
150 * ever works (last famous words)
151 */
152 static inline int
153 qdio_reserve_q(struct qdio_q *q)
154 {
155 return atomic_add_return(1,&q->use_count) - 1;
156 }
157
158 static inline void
159 qdio_release_q(struct qdio_q *q)
160 {
161 atomic_dec(&q->use_count);
162 }
163
164 /*check ccq */
165 static int
166 qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
167 {
168 char dbf_text[15];
169
170 if (ccq == 0 || ccq == 32)
171 return 0;
172 if (ccq == 96 || ccq == 97)
173 return 1;
174 /*notify devices immediately*/
175 sprintf(dbf_text,"%d", ccq);
176 QDIO_DBF_TEXT2(1,trace,dbf_text);
177 return -EIO;
178 }
179 /* EQBS: extract buffer states */
180 static int
181 qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
182 unsigned int *start, unsigned int *cnt)
183 {
184 struct qdio_irq *irq;
185 unsigned int tmp_cnt, q_no, ccq;
186 int rc ;
187 char dbf_text[15];
188
189 ccq = 0;
190 tmp_cnt = *cnt;
191 irq = (struct qdio_irq*)q->irq_ptr;
192 q_no = q->q_no;
193 if(!q->is_input_q)
194 q_no += irq->no_input_qs;
195 again:
196 ccq = do_eqbs(irq->sch_token, state, q_no, start, cnt);
197 rc = qdio_check_ccq(q, ccq);
198 if ((ccq == 96) && (tmp_cnt != *cnt))
199 rc = 0;
200 if (rc == 1) {
201 QDIO_DBF_TEXT5(1,trace,"eqAGAIN");
202 goto again;
203 }
204 if (rc < 0) {
205 QDIO_DBF_TEXT2(1,trace,"eqberr");
206 sprintf(dbf_text,"%2x,%2x,%d,%d",tmp_cnt, *cnt, ccq, q_no);
207 QDIO_DBF_TEXT2(1,trace,dbf_text);
208 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
209 QDIO_STATUS_LOOK_FOR_ERROR,
210 0, 0, 0, -1, -1, q->int_parm);
211 return 0;
212 }
213 return (tmp_cnt - *cnt);
214 }
215
216 /* SQBS: set buffer states */
217 static int
218 qdio_do_sqbs(struct qdio_q *q, unsigned char state,
219 unsigned int *start, unsigned int *cnt)
220 {
221 struct qdio_irq *irq;
222 unsigned int tmp_cnt, q_no, ccq;
223 int rc;
224 char dbf_text[15];
225
226 ccq = 0;
227 tmp_cnt = *cnt;
228 irq = (struct qdio_irq*)q->irq_ptr;
229 q_no = q->q_no;
230 if(!q->is_input_q)
231 q_no += irq->no_input_qs;
232 again:
233 ccq = do_sqbs(irq->sch_token, state, q_no, start, cnt);
234 rc = qdio_check_ccq(q, ccq);
235 if (rc == 1) {
236 QDIO_DBF_TEXT5(1,trace,"sqAGAIN");
237 goto again;
238 }
239 if (rc < 0) {
240 QDIO_DBF_TEXT3(1,trace,"sqberr");
241 sprintf(dbf_text,"%2x,%2x",tmp_cnt,*cnt);
242 QDIO_DBF_TEXT3(1,trace,dbf_text);
243 sprintf(dbf_text,"%d,%d",ccq,q_no);
244 QDIO_DBF_TEXT3(1,trace,dbf_text);
245 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
246 QDIO_STATUS_LOOK_FOR_ERROR,
247 0, 0, 0, -1, -1, q->int_parm);
248 return 0;
249 }
250 return (tmp_cnt - *cnt);
251 }
252
253 static inline int
254 qdio_set_slsb(struct qdio_q *q, unsigned int *bufno,
255 unsigned char state, unsigned int *count)
256 {
257 volatile char *slsb;
258 struct qdio_irq *irq;
259
260 irq = (struct qdio_irq*)q->irq_ptr;
261 if (!irq->is_qebsm) {
262 slsb = (char *)&q->slsb.acc.val[(*bufno)];
263 xchg(slsb, state);
264 return 1;
265 }
266 return qdio_do_sqbs(q, state, bufno, count);
267 }
268
269 #ifdef CONFIG_QDIO_DEBUG
270 static inline void
271 qdio_trace_slsb(struct qdio_q *q)
272 {
273 if (q->queue_type==QDIO_TRACE_QTYPE) {
274 if (q->is_input_q)
275 QDIO_DBF_HEX2(0,slsb_in,&q->slsb,
276 QDIO_MAX_BUFFERS_PER_Q);
277 else
278 QDIO_DBF_HEX2(0,slsb_out,&q->slsb,
279 QDIO_MAX_BUFFERS_PER_Q);
280 }
281 }
282 #endif
283
284 static inline int
285 set_slsb(struct qdio_q *q, unsigned int *bufno,
286 unsigned char state, unsigned int *count)
287 {
288 int rc;
289 #ifdef CONFIG_QDIO_DEBUG
290 qdio_trace_slsb(q);
291 #endif
292 rc = qdio_set_slsb(q, bufno, state, count);
293 #ifdef CONFIG_QDIO_DEBUG
294 qdio_trace_slsb(q);
295 #endif
296 return rc;
297 }
298 static inline int
299 qdio_siga_sync(struct qdio_q *q, unsigned int gpr2,
300 unsigned int gpr3)
301 {
302 int cc;
303
304 QDIO_DBF_TEXT4(0,trace,"sigasync");
305 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
306
307 qdio_perf_stat_inc(&perf_stats.siga_syncs);
308
309 cc = do_siga_sync(q->schid, gpr2, gpr3);
310 if (cc)
311 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
312
313 return cc;
314 }
315
316 static inline int
317 qdio_siga_sync_q(struct qdio_q *q)
318 {
319 if (q->is_input_q)
320 return qdio_siga_sync(q, 0, q->mask);
321 return qdio_siga_sync(q, q->mask, 0);
322 }
323
324 static int
325 __do_siga_output(struct qdio_q *q, unsigned int *busy_bit)
326 {
327 struct qdio_irq *irq;
328 unsigned int fc = 0;
329 unsigned long schid;
330
331 irq = (struct qdio_irq *) q->irq_ptr;
332 if (!irq->is_qebsm)
333 schid = *((u32 *)&q->schid);
334 else {
335 schid = irq->sch_token;
336 fc |= 0x80;
337 }
338 return do_siga_output(schid, q->mask, busy_bit, fc);
339 }
340
341 /*
342 * returns QDIO_SIGA_ERROR_ACCESS_EXCEPTION as cc, when SIGA returns
343 * an access exception
344 */
345 static int
346 qdio_siga_output(struct qdio_q *q)
347 {
348 int cc;
349 __u32 busy_bit;
350 __u64 start_time=0;
351
352 qdio_perf_stat_inc(&perf_stats.siga_outs);
353
354 QDIO_DBF_TEXT4(0,trace,"sigaout");
355 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
356
357 for (;;) {
358 cc = __do_siga_output(q, &busy_bit);
359 //QDIO_PRINT_ERR("cc=%x, busy=%x\n",cc,busy_bit);
360 if ((cc==2) && (busy_bit) && (q->is_iqdio_q)) {
361 if (!start_time)
362 start_time=NOW;
363 if ((NOW-start_time)>QDIO_BUSY_BIT_PATIENCE)
364 break;
365 } else
366 break;
367 }
368
369 if ((cc==2) && (busy_bit))
370 cc |= QDIO_SIGA_ERROR_B_BIT_SET;
371
372 if (cc)
373 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
374
375 return cc;
376 }
377
378 static int
379 qdio_siga_input(struct qdio_q *q)
380 {
381 int cc;
382
383 QDIO_DBF_TEXT4(0,trace,"sigain");
384 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
385
386 qdio_perf_stat_inc(&perf_stats.siga_ins);
387
388 cc = do_siga_input(q->schid, q->mask);
389
390 if (cc)
391 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
392
393 return cc;
394 }
395
396 /* locked by the locks in qdio_activate and qdio_cleanup */
397 static __u32 *
398 qdio_get_indicator(void)
399 {
400 int i;
401
402 for (i=1;i<INDICATORS_PER_CACHELINE;i++)
403 if (!indicator_used[i]) {
404 indicator_used[i]=1;
405 return indicators+i;
406 }
407 atomic_inc(&spare_indicator_usecount);
408 return (__u32 * volatile) &spare_indicator;
409 }
410
411 /* locked by the locks in qdio_activate and qdio_cleanup */
412 static void
413 qdio_put_indicator(__u32 *addr)
414 {
415 int i;
416
417 if ( (addr) && (addr!=&spare_indicator) ) {
418 i=addr-indicators;
419 indicator_used[i]=0;
420 }
421 if (addr == &spare_indicator)
422 atomic_dec(&spare_indicator_usecount);
423 }
424
425 static inline void
426 tiqdio_clear_summary_bit(__u32 *location)
427 {
428 QDIO_DBF_TEXT5(0,trace,"clrsummb");
429 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
430
431 xchg(location,0);
432 }
433
434 static inline void
435 tiqdio_set_summary_bit(__u32 *location)
436 {
437 QDIO_DBF_TEXT5(0,trace,"setsummb");
438 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
439
440 xchg(location,-1);
441 }
442
443 static inline void
444 tiqdio_sched_tl(void)
445 {
446 tasklet_hi_schedule(&tiqdio_tasklet);
447 }
448
449 static void
450 qdio_mark_tiq(struct qdio_q *q)
451 {
452 unsigned long flags;
453
454 QDIO_DBF_TEXT4(0,trace,"mark iq");
455 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
456
457 spin_lock_irqsave(&ttiq_list_lock,flags);
458 if (unlikely(atomic_read(&q->is_in_shutdown)))
459 goto out_unlock;
460
461 if (!q->is_input_q)
462 goto out_unlock;
463
464 if ((q->list_prev) || (q->list_next))
465 goto out_unlock;
466
467 if (!tiq_list) {
468 tiq_list=q;
469 q->list_prev=q;
470 q->list_next=q;
471 } else {
472 q->list_next=tiq_list;
473 q->list_prev=tiq_list->list_prev;
474 tiq_list->list_prev->list_next=q;
475 tiq_list->list_prev=q;
476 }
477 spin_unlock_irqrestore(&ttiq_list_lock,flags);
478
479 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
480 tiqdio_sched_tl();
481 return;
482 out_unlock:
483 spin_unlock_irqrestore(&ttiq_list_lock,flags);
484 return;
485 }
486
487 static inline void
488 qdio_mark_q(struct qdio_q *q)
489 {
490 QDIO_DBF_TEXT4(0,trace,"mark q");
491 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
492
493 if (unlikely(atomic_read(&q->is_in_shutdown)))
494 return;
495
496 tasklet_schedule(&q->tasklet);
497 }
498
499 static int
500 qdio_stop_polling(struct qdio_q *q)
501 {
502 #ifdef QDIO_USE_PROCESSING_STATE
503 unsigned int tmp, gsf, count = 1;
504 unsigned char state = 0;
505 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
506
507 if (!atomic_xchg(&q->polling,0))
508 return 1;
509
510 QDIO_DBF_TEXT4(0,trace,"stoppoll");
511 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
512
513 /* show the card that we are not polling anymore */
514 if (!q->is_input_q)
515 return 1;
516
517 tmp = gsf = GET_SAVED_FRONTIER(q);
518 tmp = ((tmp + QDIO_MAX_BUFFERS_PER_Q-1) & (QDIO_MAX_BUFFERS_PER_Q-1) );
519 set_slsb(q, &tmp, SLSB_P_INPUT_NOT_INIT, &count);
520
521 /*
522 * we don't issue this SYNC_MEMORY, as we trust Rick T and
523 * moreover will not use the PROCESSING state under VM, so
524 * q->polling was 0 anyway
525 */
526 /*SYNC_MEMORY;*/
527 if (irq->is_qebsm) {
528 count = 1;
529 qdio_do_eqbs(q, &state, &gsf, &count);
530 } else
531 state = q->slsb.acc.val[gsf];
532 if (state != SLSB_P_INPUT_PRIMED)
533 return 1;
534 /*
535 * set our summary bit again, as otherwise there is a
536 * small window we can miss between resetting it and
537 * checking for PRIMED state
538 */
539 if (q->is_thinint_q)
540 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
541 return 0;
542
543 #else /* QDIO_USE_PROCESSING_STATE */
544 return 1;
545 #endif /* QDIO_USE_PROCESSING_STATE */
546 }
547
548 /*
549 * see the comment in do_QDIO and before qdio_reserve_q about the
550 * sophisticated locking outside of unmark_q, so that we don't need to
551 * disable the interrupts :-)
552 */
553 static void
554 qdio_unmark_q(struct qdio_q *q)
555 {
556 unsigned long flags;
557
558 QDIO_DBF_TEXT4(0,trace,"unmark q");
559 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
560
561 if ((!q->list_prev)||(!q->list_next))
562 return;
563
564 if ((q->is_thinint_q)&&(q->is_input_q)) {
565 /* iQDIO */
566 spin_lock_irqsave(&ttiq_list_lock,flags);
567 /* in case cleanup has done this already and simultanously
568 * qdio_unmark_q is called from the interrupt handler, we've
569 * got to check this in this specific case again */
570 if ((!q->list_prev)||(!q->list_next))
571 goto out;
572 if (q->list_next==q) {
573 /* q was the only interesting q */
574 tiq_list=NULL;
575 q->list_next=NULL;
576 q->list_prev=NULL;
577 } else {
578 q->list_next->list_prev=q->list_prev;
579 q->list_prev->list_next=q->list_next;
580 tiq_list=q->list_next;
581 q->list_next=NULL;
582 q->list_prev=NULL;
583 }
584 out:
585 spin_unlock_irqrestore(&ttiq_list_lock,flags);
586 }
587 }
588
589 static inline unsigned long
590 tiqdio_clear_global_summary(void)
591 {
592 unsigned long time;
593
594 QDIO_DBF_TEXT5(0,trace,"clrglobl");
595
596 time = do_clear_global_summary();
597
598 QDIO_DBF_HEX5(0,trace,&time,sizeof(unsigned long));
599
600 return time;
601 }
602
603
604 /************************* OUTBOUND ROUTINES *******************************/
605 static int
606 qdio_qebsm_get_outbound_buffer_frontier(struct qdio_q *q)
607 {
608 struct qdio_irq *irq;
609 unsigned char state;
610 unsigned int cnt, count, ftc;
611
612 irq = (struct qdio_irq *) q->irq_ptr;
613 if ((!q->is_iqdio_q) && (!q->hydra_gives_outbound_pcis))
614 SYNC_MEMORY;
615
616 ftc = q->first_to_check;
617 count = qdio_min(atomic_read(&q->number_of_buffers_used),
618 (QDIO_MAX_BUFFERS_PER_Q-1));
619 if (count == 0)
620 return q->first_to_check;
621 cnt = qdio_do_eqbs(q, &state, &ftc, &count);
622 if (cnt == 0)
623 return q->first_to_check;
624 switch (state) {
625 case SLSB_P_OUTPUT_ERROR:
626 QDIO_DBF_TEXT3(0,trace,"outperr");
627 atomic_sub(cnt , &q->number_of_buffers_used);
628 if (q->qdio_error)
629 q->error_status_flags |=
630 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
631 q->qdio_error = SLSB_P_OUTPUT_ERROR;
632 q->error_status_flags |= QDIO_STATUS_LOOK_FOR_ERROR;
633 q->first_to_check = ftc;
634 break;
635 case SLSB_P_OUTPUT_EMPTY:
636 QDIO_DBF_TEXT5(0,trace,"outpempt");
637 atomic_sub(cnt, &q->number_of_buffers_used);
638 q->first_to_check = ftc;
639 break;
640 case SLSB_CU_OUTPUT_PRIMED:
641 /* all buffers primed */
642 QDIO_DBF_TEXT5(0,trace,"outpprim");
643 break;
644 default:
645 break;
646 }
647 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
648 return q->first_to_check;
649 }
650
651 static int
652 qdio_qebsm_get_inbound_buffer_frontier(struct qdio_q *q)
653 {
654 struct qdio_irq *irq;
655 unsigned char state;
656 int tmp, ftc, count, cnt;
657 char dbf_text[15];
658
659
660 irq = (struct qdio_irq *) q->irq_ptr;
661 ftc = q->first_to_check;
662 count = qdio_min(atomic_read(&q->number_of_buffers_used),
663 (QDIO_MAX_BUFFERS_PER_Q-1));
664 if (count == 0)
665 return q->first_to_check;
666 cnt = qdio_do_eqbs(q, &state, &ftc, &count);
667 if (cnt == 0)
668 return q->first_to_check;
669 switch (state) {
670 case SLSB_P_INPUT_ERROR :
671 #ifdef CONFIG_QDIO_DEBUG
672 QDIO_DBF_TEXT3(1,trace,"inperr");
673 sprintf(dbf_text,"%2x,%2x",ftc,count);
674 QDIO_DBF_TEXT3(1,trace,dbf_text);
675 #endif /* CONFIG_QDIO_DEBUG */
676 if (q->qdio_error)
677 q->error_status_flags |=
678 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
679 q->qdio_error = SLSB_P_INPUT_ERROR;
680 q->error_status_flags |= QDIO_STATUS_LOOK_FOR_ERROR;
681 atomic_sub(cnt, &q->number_of_buffers_used);
682 q->first_to_check = ftc;
683 break;
684 case SLSB_P_INPUT_PRIMED :
685 QDIO_DBF_TEXT3(0,trace,"inptprim");
686 sprintf(dbf_text,"%2x,%2x",ftc,count);
687 QDIO_DBF_TEXT3(1,trace,dbf_text);
688 tmp = 0;
689 ftc = q->first_to_check;
690 #ifdef QDIO_USE_PROCESSING_STATE
691 if (cnt > 1) {
692 cnt -= 1;
693 tmp = set_slsb(q, &ftc, SLSB_P_INPUT_NOT_INIT, &cnt);
694 if (!tmp)
695 break;
696 }
697 cnt = 1;
698 tmp += set_slsb(q, &ftc,
699 SLSB_P_INPUT_PROCESSING, &cnt);
700 atomic_set(&q->polling, 1);
701 #else
702 tmp = set_slsb(q, &ftc, SLSB_P_INPUT_NOT_INIT, &cnt);
703 #endif
704 atomic_sub(tmp, &q->number_of_buffers_used);
705 q->first_to_check = ftc;
706 break;
707 case SLSB_CU_INPUT_EMPTY:
708 case SLSB_P_INPUT_NOT_INIT:
709 case SLSB_P_INPUT_PROCESSING:
710 QDIO_DBF_TEXT5(0,trace,"inpnipro");
711 break;
712 default:
713 break;
714 }
715 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
716 return q->first_to_check;
717 }
718
719 static int
720 qdio_get_outbound_buffer_frontier(struct qdio_q *q)
721 {
722 struct qdio_irq *irq;
723 volatile char *slsb;
724 unsigned int count = 1;
725 int first_not_to_check, f, f_mod_no;
726 char dbf_text[15];
727
728 QDIO_DBF_TEXT4(0,trace,"getobfro");
729 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
730
731 irq = (struct qdio_irq *) q->irq_ptr;
732 if (irq->is_qebsm)
733 return qdio_qebsm_get_outbound_buffer_frontier(q);
734
735 slsb=&q->slsb.acc.val[0];
736 f_mod_no=f=q->first_to_check;
737 /*
738 * f points to already processed elements, so f+no_used is correct...
739 * ... but: we don't check 128 buffers, as otherwise
740 * qdio_has_outbound_q_moved would return 0
741 */
742 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
743 (QDIO_MAX_BUFFERS_PER_Q-1));
744
745 if (((!q->is_iqdio_q) && (!q->hydra_gives_outbound_pcis)) ||
746 (q->queue_type == QDIO_IQDIO_QFMT_ASYNCH))
747 SYNC_MEMORY;
748
749 check_next:
750 if (f==first_not_to_check)
751 goto out;
752
753 switch(slsb[f_mod_no]) {
754
755 /* the adapter has not fetched the output yet */
756 case SLSB_CU_OUTPUT_PRIMED:
757 QDIO_DBF_TEXT5(0,trace,"outpprim");
758 break;
759
760 /* the adapter got it */
761 case SLSB_P_OUTPUT_EMPTY:
762 atomic_dec(&q->number_of_buffers_used);
763 f++;
764 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
765 QDIO_DBF_TEXT5(0,trace,"outpempt");
766 goto check_next;
767
768 case SLSB_P_OUTPUT_ERROR:
769 QDIO_DBF_TEXT3(0,trace,"outperr");
770 sprintf(dbf_text,"%x-%x-%x",f_mod_no,
771 q->sbal[f_mod_no]->element[14].sbalf.value,
772 q->sbal[f_mod_no]->element[15].sbalf.value);
773 QDIO_DBF_TEXT3(1,trace,dbf_text);
774 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
775
776 /* kind of process the buffer */
777 set_slsb(q, &f_mod_no, SLSB_P_OUTPUT_NOT_INIT, &count);
778
779 /*
780 * we increment the frontier, as this buffer
781 * was processed obviously
782 */
783 atomic_dec(&q->number_of_buffers_used);
784 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
785
786 if (q->qdio_error)
787 q->error_status_flags|=
788 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
789 q->qdio_error=SLSB_P_OUTPUT_ERROR;
790 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
791
792 break;
793
794 /* no new buffers */
795 default:
796 QDIO_DBF_TEXT5(0,trace,"outpni");
797 }
798 out:
799 return (q->first_to_check=f_mod_no);
800 }
801
802 /* all buffers are processed */
803 static int
804 qdio_is_outbound_q_done(struct qdio_q *q)
805 {
806 int no_used;
807 #ifdef CONFIG_QDIO_DEBUG
808 char dbf_text[15];
809 #endif
810
811 no_used=atomic_read(&q->number_of_buffers_used);
812
813 #ifdef CONFIG_QDIO_DEBUG
814 if (no_used) {
815 sprintf(dbf_text,"oqisnt%02x",no_used);
816 QDIO_DBF_TEXT4(0,trace,dbf_text);
817 } else {
818 QDIO_DBF_TEXT4(0,trace,"oqisdone");
819 }
820 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
821 #endif /* CONFIG_QDIO_DEBUG */
822 return (no_used==0);
823 }
824
825 static int
826 qdio_has_outbound_q_moved(struct qdio_q *q)
827 {
828 int i;
829
830 i=qdio_get_outbound_buffer_frontier(q);
831
832 if ( (i!=GET_SAVED_FRONTIER(q)) ||
833 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
834 SAVE_FRONTIER(q,i);
835 QDIO_DBF_TEXT4(0,trace,"oqhasmvd");
836 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
837 return 1;
838 } else {
839 QDIO_DBF_TEXT4(0,trace,"oqhsntmv");
840 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
841 return 0;
842 }
843 }
844
845 static void
846 qdio_kick_outbound_q(struct qdio_q *q)
847 {
848 int result;
849 #ifdef CONFIG_QDIO_DEBUG
850 char dbf_text[15];
851
852 QDIO_DBF_TEXT4(0,trace,"kickoutq");
853 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
854 #endif /* CONFIG_QDIO_DEBUG */
855
856 if (!q->siga_out)
857 return;
858
859 /* here's the story with cc=2 and busy bit set (thanks, Rick):
860 * VM's CP could present us cc=2 and busy bit set on SIGA-write
861 * during reconfiguration of their Guest LAN (only in HIPERS mode,
862 * QDIO mode is asynchronous -- cc=2 and busy bit there will take
863 * the queues down immediately; and not being under VM we have a
864 * problem on cc=2 and busy bit set right away).
865 *
866 * Therefore qdio_siga_output will try for a short time constantly,
867 * if such a condition occurs. If it doesn't change, it will
868 * increase the busy_siga_counter and save the timestamp, and
869 * schedule the queue for later processing (via mark_q, using the
870 * queue tasklet). __qdio_outbound_processing will check out the
871 * counter. If non-zero, it will call qdio_kick_outbound_q as often
872 * as the value of the counter. This will attempt further SIGA
873 * instructions. For each successful SIGA, the counter is
874 * decreased, for failing SIGAs the counter remains the same, after
875 * all.
876 * After some time of no movement, qdio_kick_outbound_q will
877 * finally fail and reflect corresponding error codes to call
878 * the upper layer module and have it take the queues down.
879 *
880 * Note that this is a change from the original HiperSockets design
881 * (saying cc=2 and busy bit means take the queues down), but in
882 * these days Guest LAN didn't exist... excessive cc=2 with busy bit
883 * conditions will still take the queues down, but the threshold is
884 * higher due to the Guest LAN environment.
885 */
886
887
888 result=qdio_siga_output(q);
889
890 switch (result) {
891 case 0:
892 /* went smooth this time, reset timestamp */
893 #ifdef CONFIG_QDIO_DEBUG
894 QDIO_DBF_TEXT3(0,trace,"cc2reslv");
895 sprintf(dbf_text,"%4x%2x%2x",q->schid.sch_no,q->q_no,
896 atomic_read(&q->busy_siga_counter));
897 QDIO_DBF_TEXT3(0,trace,dbf_text);
898 #endif /* CONFIG_QDIO_DEBUG */
899 q->timing.busy_start=0;
900 break;
901 case (2|QDIO_SIGA_ERROR_B_BIT_SET):
902 /* cc=2 and busy bit: */
903 atomic_inc(&q->busy_siga_counter);
904
905 /* if the last siga was successful, save
906 * timestamp here */
907 if (!q->timing.busy_start)
908 q->timing.busy_start=NOW;
909
910 /* if we're in time, don't touch error_status_flags
911 * and siga_error */
912 if (NOW-q->timing.busy_start<QDIO_BUSY_BIT_GIVE_UP) {
913 qdio_mark_q(q);
914 break;
915 }
916 QDIO_DBF_TEXT2(0,trace,"cc2REPRT");
917 #ifdef CONFIG_QDIO_DEBUG
918 sprintf(dbf_text,"%4x%2x%2x",q->schid.sch_no,q->q_no,
919 atomic_read(&q->busy_siga_counter));
920 QDIO_DBF_TEXT3(0,trace,dbf_text);
921 #endif /* CONFIG_QDIO_DEBUG */
922 /* else fallthrough and report error */
923 default:
924 /* for plain cc=1, 2 or 3: */
925 if (q->siga_error)
926 q->error_status_flags|=
927 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
928 q->error_status_flags|=
929 QDIO_STATUS_LOOK_FOR_ERROR;
930 q->siga_error=result;
931 }
932 }
933
934 static void
935 qdio_kick_outbound_handler(struct qdio_q *q)
936 {
937 int start, end, real_end, count;
938 #ifdef CONFIG_QDIO_DEBUG
939 char dbf_text[15];
940 #endif
941
942 start = q->first_element_to_kick;
943 /* last_move_ftc was just updated */
944 real_end = GET_SAVED_FRONTIER(q);
945 end = (real_end+QDIO_MAX_BUFFERS_PER_Q-1)&
946 (QDIO_MAX_BUFFERS_PER_Q-1);
947 count = (end+QDIO_MAX_BUFFERS_PER_Q+1-start)&
948 (QDIO_MAX_BUFFERS_PER_Q-1);
949
950 #ifdef CONFIG_QDIO_DEBUG
951 QDIO_DBF_TEXT4(0,trace,"kickouth");
952 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
953
954 sprintf(dbf_text,"s=%2xc=%2x",start,count);
955 QDIO_DBF_TEXT4(0,trace,dbf_text);
956 #endif /* CONFIG_QDIO_DEBUG */
957
958 if (q->state==QDIO_IRQ_STATE_ACTIVE)
959 q->handler(q->cdev,QDIO_STATUS_OUTBOUND_INT|
960 q->error_status_flags,
961 q->qdio_error,q->siga_error,q->q_no,start,count,
962 q->int_parm);
963
964 /* for the next time: */
965 q->first_element_to_kick=real_end;
966 q->qdio_error=0;
967 q->siga_error=0;
968 q->error_status_flags=0;
969 }
970
971 static void
972 __qdio_outbound_processing(struct qdio_q *q)
973 {
974 int siga_attempts;
975
976 QDIO_DBF_TEXT4(0,trace,"qoutproc");
977 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
978
979 if (unlikely(qdio_reserve_q(q))) {
980 qdio_release_q(q);
981 qdio_perf_stat_inc(&perf_stats.outbound_tl_runs_resched);
982 /* as we're sissies, we'll check next time */
983 if (likely(!atomic_read(&q->is_in_shutdown))) {
984 qdio_mark_q(q);
985 QDIO_DBF_TEXT4(0,trace,"busy,agn");
986 }
987 return;
988 }
989 qdio_perf_stat_inc(&perf_stats.outbound_tl_runs);
990 qdio_perf_stat_inc(&perf_stats.tl_runs);
991
992 /* see comment in qdio_kick_outbound_q */
993 siga_attempts=atomic_read(&q->busy_siga_counter);
994 while (siga_attempts) {
995 atomic_dec(&q->busy_siga_counter);
996 qdio_kick_outbound_q(q);
997 siga_attempts--;
998 }
999
1000 if (qdio_has_outbound_q_moved(q))
1001 qdio_kick_outbound_handler(q);
1002
1003 if (q->queue_type == QDIO_ZFCP_QFMT) {
1004 if ((!q->hydra_gives_outbound_pcis) &&
1005 (!qdio_is_outbound_q_done(q)))
1006 qdio_mark_q(q);
1007 }
1008 else if (((!q->is_iqdio_q) && (!q->is_pci_out)) ||
1009 (q->queue_type == QDIO_IQDIO_QFMT_ASYNCH)) {
1010 /*
1011 * make sure buffer switch from PRIMED to EMPTY is noticed
1012 * and outbound_handler is called
1013 */
1014 if (qdio_is_outbound_q_done(q)) {
1015 del_timer(&q->timer);
1016 } else {
1017 if (!timer_pending(&q->timer))
1018 mod_timer(&q->timer, jiffies +
1019 QDIO_FORCE_CHECK_TIMEOUT);
1020 }
1021 }
1022
1023 qdio_release_q(q);
1024 }
1025
1026 static void
1027 qdio_outbound_processing(unsigned long q)
1028 {
1029 __qdio_outbound_processing((struct qdio_q *) q);
1030 }
1031
1032 /************************* INBOUND ROUTINES *******************************/
1033
1034
1035 static int
1036 qdio_get_inbound_buffer_frontier(struct qdio_q *q)
1037 {
1038 struct qdio_irq *irq;
1039 int f,f_mod_no;
1040 volatile char *slsb;
1041 unsigned int count = 1;
1042 int first_not_to_check;
1043 #ifdef CONFIG_QDIO_DEBUG
1044 char dbf_text[15];
1045 #endif /* CONFIG_QDIO_DEBUG */
1046 #ifdef QDIO_USE_PROCESSING_STATE
1047 int last_position=-1;
1048 #endif /* QDIO_USE_PROCESSING_STATE */
1049
1050 QDIO_DBF_TEXT4(0,trace,"getibfro");
1051 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1052
1053 irq = (struct qdio_irq *) q->irq_ptr;
1054 if (irq->is_qebsm)
1055 return qdio_qebsm_get_inbound_buffer_frontier(q);
1056
1057 slsb=&q->slsb.acc.val[0];
1058 f_mod_no=f=q->first_to_check;
1059 /*
1060 * we don't check 128 buffers, as otherwise qdio_has_inbound_q_moved
1061 * would return 0
1062 */
1063 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
1064 (QDIO_MAX_BUFFERS_PER_Q-1));
1065
1066 /*
1067 * we don't use this one, as a PCI or we after a thin interrupt
1068 * will sync the queues
1069 */
1070 /* SYNC_MEMORY;*/
1071
1072 check_next:
1073 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
1074 if (f==first_not_to_check)
1075 goto out;
1076 switch (slsb[f_mod_no]) {
1077
1078 /* CU_EMPTY means frontier is reached */
1079 case SLSB_CU_INPUT_EMPTY:
1080 QDIO_DBF_TEXT5(0,trace,"inptempt");
1081 break;
1082
1083 /* P_PRIMED means set slsb to P_PROCESSING and move on */
1084 case SLSB_P_INPUT_PRIMED:
1085 QDIO_DBF_TEXT5(0,trace,"inptprim");
1086
1087 #ifdef QDIO_USE_PROCESSING_STATE
1088 /*
1089 * as soon as running under VM, polling the input queues will
1090 * kill VM in terms of CP overhead
1091 */
1092 if (q->siga_sync) {
1093 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1094 } else {
1095 /* set the previous buffer to NOT_INIT. The current
1096 * buffer will be set to PROCESSING at the end of
1097 * this function to avoid further interrupts. */
1098 if (last_position>=0)
1099 set_slsb(q, &last_position,
1100 SLSB_P_INPUT_NOT_INIT, &count);
1101 atomic_set(&q->polling,1);
1102 last_position=f_mod_no;
1103 }
1104 #else /* QDIO_USE_PROCESSING_STATE */
1105 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1106 #endif /* QDIO_USE_PROCESSING_STATE */
1107 /*
1108 * not needed, as the inbound queue will be synced on the next
1109 * siga-r, resp. tiqdio_is_inbound_q_done will do the siga-s
1110 */
1111 /*SYNC_MEMORY;*/
1112 f++;
1113 atomic_dec(&q->number_of_buffers_used);
1114 goto check_next;
1115
1116 case SLSB_P_INPUT_NOT_INIT:
1117 case SLSB_P_INPUT_PROCESSING:
1118 QDIO_DBF_TEXT5(0,trace,"inpnipro");
1119 break;
1120
1121 /* P_ERROR means frontier is reached, break and report error */
1122 case SLSB_P_INPUT_ERROR:
1123 #ifdef CONFIG_QDIO_DEBUG
1124 sprintf(dbf_text,"inperr%2x",f_mod_no);
1125 QDIO_DBF_TEXT3(1,trace,dbf_text);
1126 #endif /* CONFIG_QDIO_DEBUG */
1127 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
1128
1129 /* kind of process the buffer */
1130 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1131
1132 if (q->qdio_error)
1133 q->error_status_flags|=
1134 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
1135 q->qdio_error=SLSB_P_INPUT_ERROR;
1136 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
1137
1138 /* we increment the frontier, as this buffer
1139 * was processed obviously */
1140 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1141 atomic_dec(&q->number_of_buffers_used);
1142
1143 #ifdef QDIO_USE_PROCESSING_STATE
1144 last_position=-1;
1145 #endif /* QDIO_USE_PROCESSING_STATE */
1146
1147 break;
1148
1149 /* everything else means frontier not changed (HALTED or so) */
1150 default:
1151 break;
1152 }
1153 out:
1154 q->first_to_check=f_mod_no;
1155
1156 #ifdef QDIO_USE_PROCESSING_STATE
1157 if (last_position>=0)
1158 set_slsb(q, &last_position, SLSB_P_INPUT_PROCESSING, &count);
1159 #endif /* QDIO_USE_PROCESSING_STATE */
1160
1161 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
1162
1163 return q->first_to_check;
1164 }
1165
1166 static int
1167 qdio_has_inbound_q_moved(struct qdio_q *q)
1168 {
1169 int i;
1170
1171 i=qdio_get_inbound_buffer_frontier(q);
1172 if ( (i!=GET_SAVED_FRONTIER(q)) ||
1173 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
1174 SAVE_FRONTIER(q,i);
1175 if ((!q->siga_sync)&&(!q->hydra_gives_outbound_pcis))
1176 SAVE_TIMESTAMP(q);
1177
1178 QDIO_DBF_TEXT4(0,trace,"inhasmvd");
1179 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1180 return 1;
1181 } else {
1182 QDIO_DBF_TEXT4(0,trace,"inhsntmv");
1183 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1184 return 0;
1185 }
1186 }
1187
1188 /* means, no more buffers to be filled */
1189 static int
1190 tiqdio_is_inbound_q_done(struct qdio_q *q)
1191 {
1192 int no_used;
1193 unsigned int start_buf, count;
1194 unsigned char state = 0;
1195 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1196
1197 #ifdef CONFIG_QDIO_DEBUG
1198 char dbf_text[15];
1199 #endif
1200
1201 no_used=atomic_read(&q->number_of_buffers_used);
1202
1203 /* propagate the change from 82 to 80 through VM */
1204 SYNC_MEMORY;
1205
1206 #ifdef CONFIG_QDIO_DEBUG
1207 if (no_used) {
1208 sprintf(dbf_text,"iqisnt%02x",no_used);
1209 QDIO_DBF_TEXT4(0,trace,dbf_text);
1210 } else {
1211 QDIO_DBF_TEXT4(0,trace,"iniqisdo");
1212 }
1213 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1214 #endif /* CONFIG_QDIO_DEBUG */
1215
1216 if (!no_used)
1217 return 1;
1218 if (!q->siga_sync && !irq->is_qebsm)
1219 /* we'll check for more primed buffers in qeth_stop_polling */
1220 return 0;
1221 if (irq->is_qebsm) {
1222 count = 1;
1223 start_buf = q->first_to_check;
1224 qdio_do_eqbs(q, &state, &start_buf, &count);
1225 } else
1226 state = q->slsb.acc.val[q->first_to_check];
1227 if (state != SLSB_P_INPUT_PRIMED)
1228 /*
1229 * nothing more to do, if next buffer is not PRIMED.
1230 * note that we did a SYNC_MEMORY before, that there
1231 * has been a sychnronization.
1232 * we will return 0 below, as there is nothing to do
1233 * (stop_polling not necessary, as we have not been
1234 * using the PROCESSING state
1235 */
1236 return 0;
1237
1238 /*
1239 * ok, the next input buffer is primed. that means, that device state
1240 * change indicator and adapter local summary are set, so we will find
1241 * it next time.
1242 * we will return 0 below, as there is nothing to do, except scheduling
1243 * ourselves for the next time.
1244 */
1245 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1246 tiqdio_sched_tl();
1247 return 0;
1248 }
1249
1250 static int
1251 qdio_is_inbound_q_done(struct qdio_q *q)
1252 {
1253 int no_used;
1254 unsigned int start_buf, count;
1255 unsigned char state = 0;
1256 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1257
1258 #ifdef CONFIG_QDIO_DEBUG
1259 char dbf_text[15];
1260 #endif
1261
1262 no_used=atomic_read(&q->number_of_buffers_used);
1263
1264 /*
1265 * we need that one for synchronization with the adapter, as it
1266 * does a kind of PCI avoidance
1267 */
1268 SYNC_MEMORY;
1269
1270 if (!no_used) {
1271 QDIO_DBF_TEXT4(0,trace,"inqisdnA");
1272 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1273 return 1;
1274 }
1275 if (irq->is_qebsm) {
1276 count = 1;
1277 start_buf = q->first_to_check;
1278 qdio_do_eqbs(q, &state, &start_buf, &count);
1279 } else
1280 state = q->slsb.acc.val[q->first_to_check];
1281 if (state == SLSB_P_INPUT_PRIMED) {
1282 /* we got something to do */
1283 QDIO_DBF_TEXT4(0,trace,"inqisntA");
1284 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1285 return 0;
1286 }
1287
1288 /* on VM, we don't poll, so the q is always done here */
1289 if (q->siga_sync)
1290 return 1;
1291 if (q->hydra_gives_outbound_pcis)
1292 return 1;
1293
1294 /*
1295 * at this point we know, that inbound first_to_check
1296 * has (probably) not moved (see qdio_inbound_processing)
1297 */
1298 if (NOW>GET_SAVED_TIMESTAMP(q)+q->timing.threshold) {
1299 #ifdef CONFIG_QDIO_DEBUG
1300 QDIO_DBF_TEXT4(0,trace,"inqisdon");
1301 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1302 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1303 QDIO_DBF_TEXT4(0,trace,dbf_text);
1304 #endif /* CONFIG_QDIO_DEBUG */
1305 return 1;
1306 } else {
1307 #ifdef CONFIG_QDIO_DEBUG
1308 QDIO_DBF_TEXT4(0,trace,"inqisntd");
1309 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1310 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1311 QDIO_DBF_TEXT4(0,trace,dbf_text);
1312 #endif /* CONFIG_QDIO_DEBUG */
1313 return 0;
1314 }
1315 }
1316
1317 static void
1318 qdio_kick_inbound_handler(struct qdio_q *q)
1319 {
1320 int count, start, end, real_end, i;
1321 #ifdef CONFIG_QDIO_DEBUG
1322 char dbf_text[15];
1323 #endif
1324
1325 QDIO_DBF_TEXT4(0,trace,"kickinh");
1326 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1327
1328 start=q->first_element_to_kick;
1329 real_end=q->first_to_check;
1330 end=(real_end+QDIO_MAX_BUFFERS_PER_Q-1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1331
1332 i=start;
1333 count=0;
1334 while (1) {
1335 count++;
1336 if (i==end)
1337 break;
1338 i=(i+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1339 }
1340
1341 #ifdef CONFIG_QDIO_DEBUG
1342 sprintf(dbf_text,"s=%2xc=%2x",start,count);
1343 QDIO_DBF_TEXT4(0,trace,dbf_text);
1344 #endif /* CONFIG_QDIO_DEBUG */
1345
1346 if (likely(q->state==QDIO_IRQ_STATE_ACTIVE))
1347 q->handler(q->cdev,
1348 QDIO_STATUS_INBOUND_INT|q->error_status_flags,
1349 q->qdio_error,q->siga_error,q->q_no,start,count,
1350 q->int_parm);
1351
1352 /* for the next time: */
1353 q->first_element_to_kick=real_end;
1354 q->qdio_error=0;
1355 q->siga_error=0;
1356 q->error_status_flags=0;
1357
1358 qdio_perf_stat_inc(&perf_stats.inbound_cnt);
1359 }
1360
1361 static void
1362 __tiqdio_inbound_processing(struct qdio_q *q, int spare_ind_was_set)
1363 {
1364 struct qdio_irq *irq_ptr;
1365 struct qdio_q *oq;
1366 int i;
1367
1368 QDIO_DBF_TEXT4(0,trace,"iqinproc");
1369 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1370
1371 /*
1372 * we first want to reserve the q, so that we know, that we don't
1373 * interrupt ourselves and call qdio_unmark_q, as is_in_shutdown might
1374 * be set
1375 */
1376 if (unlikely(qdio_reserve_q(q))) {
1377 qdio_release_q(q);
1378 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs_resched);
1379 /*
1380 * as we might just be about to stop polling, we make
1381 * sure that we check again at least once more
1382 */
1383 tiqdio_sched_tl();
1384 return;
1385 }
1386 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs);
1387 if (unlikely(atomic_read(&q->is_in_shutdown))) {
1388 qdio_unmark_q(q);
1389 goto out;
1390 }
1391
1392 /*
1393 * we reset spare_ind_was_set, when the queue does not use the
1394 * spare indicator
1395 */
1396 if (spare_ind_was_set)
1397 spare_ind_was_set = (q->dev_st_chg_ind == &spare_indicator);
1398
1399 if (!(*(q->dev_st_chg_ind)) && !spare_ind_was_set)
1400 goto out;
1401 /*
1402 * q->dev_st_chg_ind is the indicator, be it shared or not.
1403 * only clear it, if indicator is non-shared
1404 */
1405 if (!spare_ind_was_set)
1406 tiqdio_clear_summary_bit((__u32*)q->dev_st_chg_ind);
1407
1408 if (q->hydra_gives_outbound_pcis) {
1409 if (!q->siga_sync_done_on_thinints) {
1410 SYNC_MEMORY_ALL;
1411 } else if ((!q->siga_sync_done_on_outb_tis)&&
1412 (q->hydra_gives_outbound_pcis)) {
1413 SYNC_MEMORY_ALL_OUTB;
1414 }
1415 } else {
1416 SYNC_MEMORY;
1417 }
1418 /*
1419 * maybe we have to do work on our outbound queues... at least
1420 * we have to check the outbound-int-capable thinint-capable
1421 * queues
1422 */
1423 if (q->hydra_gives_outbound_pcis) {
1424 irq_ptr = (struct qdio_irq*)q->irq_ptr;
1425 for (i=0;i<irq_ptr->no_output_qs;i++) {
1426 oq = irq_ptr->output_qs[i];
1427 if (!qdio_is_outbound_q_done(oq)) {
1428 qdio_perf_stat_dec(&perf_stats.tl_runs);
1429 __qdio_outbound_processing(oq);
1430 }
1431 }
1432 }
1433
1434 if (!qdio_has_inbound_q_moved(q))
1435 goto out;
1436
1437 qdio_kick_inbound_handler(q);
1438 if (tiqdio_is_inbound_q_done(q))
1439 if (!qdio_stop_polling(q)) {
1440 /*
1441 * we set the flags to get into the stuff next time,
1442 * see also comment in qdio_stop_polling
1443 */
1444 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1445 tiqdio_sched_tl();
1446 }
1447 out:
1448 qdio_release_q(q);
1449 }
1450
1451 static void
1452 tiqdio_inbound_processing(unsigned long q)
1453 {
1454 __tiqdio_inbound_processing((struct qdio_q *) q,
1455 atomic_read(&spare_indicator_usecount));
1456 }
1457
1458 static void
1459 __qdio_inbound_processing(struct qdio_q *q)
1460 {
1461 int q_laps=0;
1462
1463 QDIO_DBF_TEXT4(0,trace,"qinproc");
1464 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1465
1466 if (unlikely(qdio_reserve_q(q))) {
1467 qdio_release_q(q);
1468 qdio_perf_stat_inc(&perf_stats.inbound_tl_runs_resched);
1469 /* as we're sissies, we'll check next time */
1470 if (likely(!atomic_read(&q->is_in_shutdown))) {
1471 qdio_mark_q(q);
1472 QDIO_DBF_TEXT4(0,trace,"busy,agn");
1473 }
1474 return;
1475 }
1476 qdio_perf_stat_inc(&perf_stats.inbound_tl_runs);
1477 qdio_perf_stat_inc(&perf_stats.tl_runs);
1478
1479 again:
1480 if (qdio_has_inbound_q_moved(q)) {
1481 qdio_kick_inbound_handler(q);
1482 if (!qdio_stop_polling(q)) {
1483 q_laps++;
1484 if (q_laps<QDIO_Q_LAPS)
1485 goto again;
1486 }
1487 qdio_mark_q(q);
1488 } else {
1489 if (!qdio_is_inbound_q_done(q))
1490 /* means poll time is not yet over */
1491 qdio_mark_q(q);
1492 }
1493
1494 qdio_release_q(q);
1495 }
1496
1497 static void
1498 qdio_inbound_processing(unsigned long q)
1499 {
1500 __qdio_inbound_processing((struct qdio_q *) q);
1501 }
1502
1503 /************************* MAIN ROUTINES *******************************/
1504
1505 #ifdef QDIO_USE_PROCESSING_STATE
1506 static int
1507 tiqdio_reset_processing_state(struct qdio_q *q, int q_laps)
1508 {
1509 if (!q) {
1510 tiqdio_sched_tl();
1511 return 0;
1512 }
1513
1514 /*
1515 * under VM, we have not used the PROCESSING state, so no
1516 * need to stop polling
1517 */
1518 if (q->siga_sync)
1519 return 2;
1520
1521 if (unlikely(qdio_reserve_q(q))) {
1522 qdio_release_q(q);
1523 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs_resched);
1524 /*
1525 * as we might just be about to stop polling, we make
1526 * sure that we check again at least once more
1527 */
1528
1529 /*
1530 * sanity -- we'd get here without setting the
1531 * dev st chg ind
1532 */
1533 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1534 tiqdio_sched_tl();
1535 return 0;
1536 }
1537 if (qdio_stop_polling(q)) {
1538 qdio_release_q(q);
1539 return 2;
1540 }
1541 if (q_laps<QDIO_Q_LAPS-1) {
1542 qdio_release_q(q);
1543 return 3;
1544 }
1545 /*
1546 * we set the flags to get into the stuff
1547 * next time, see also comment in qdio_stop_polling
1548 */
1549 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1550 tiqdio_sched_tl();
1551 qdio_release_q(q);
1552 return 1;
1553
1554 }
1555 #endif /* QDIO_USE_PROCESSING_STATE */
1556
1557 static void
1558 tiqdio_inbound_checks(void)
1559 {
1560 struct qdio_q *q;
1561 int spare_ind_was_set=0;
1562 #ifdef QDIO_USE_PROCESSING_STATE
1563 int q_laps=0;
1564 #endif /* QDIO_USE_PROCESSING_STATE */
1565
1566 QDIO_DBF_TEXT4(0,trace,"iqdinbck");
1567 QDIO_DBF_TEXT5(0,trace,"iqlocsum");
1568
1569 #ifdef QDIO_USE_PROCESSING_STATE
1570 again:
1571 #endif /* QDIO_USE_PROCESSING_STATE */
1572
1573 /* when the spare indicator is used and set, save that and clear it */
1574 if ((atomic_read(&spare_indicator_usecount)) && spare_indicator) {
1575 spare_ind_was_set = 1;
1576 tiqdio_clear_summary_bit((__u32*)&spare_indicator);
1577 }
1578
1579 q=(struct qdio_q*)tiq_list;
1580 do {
1581 if (!q)
1582 break;
1583 __tiqdio_inbound_processing(q, spare_ind_was_set);
1584 q=(struct qdio_q*)q->list_next;
1585 } while (q!=(struct qdio_q*)tiq_list);
1586
1587 #ifdef QDIO_USE_PROCESSING_STATE
1588 q=(struct qdio_q*)tiq_list;
1589 do {
1590 int ret;
1591
1592 ret = tiqdio_reset_processing_state(q, q_laps);
1593 switch (ret) {
1594 case 0:
1595 return;
1596 case 1:
1597 q_laps++;
1598 case 2:
1599 q = (struct qdio_q*)q->list_next;
1600 break;
1601 default:
1602 q_laps++;
1603 goto again;
1604 }
1605 } while (q!=(struct qdio_q*)tiq_list);
1606 #endif /* QDIO_USE_PROCESSING_STATE */
1607 }
1608
1609 static void
1610 tiqdio_tl(unsigned long data)
1611 {
1612 QDIO_DBF_TEXT4(0,trace,"iqdio_tl");
1613
1614 qdio_perf_stat_inc(&perf_stats.tl_runs);
1615
1616 tiqdio_inbound_checks();
1617 }
1618
1619 /********************* GENERAL HELPER_ROUTINES ***********************/
1620
1621 static void
1622 qdio_release_irq_memory(struct qdio_irq *irq_ptr)
1623 {
1624 int i;
1625 struct qdio_q *q;
1626
1627 for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
1628 q = irq_ptr->input_qs[i];
1629 if (q) {
1630 free_page((unsigned long) q->slib);
1631 kmem_cache_free(qdio_q_cache, q);
1632 }
1633 q = irq_ptr->output_qs[i];
1634 if (q) {
1635 free_page((unsigned long) q->slib);
1636 kmem_cache_free(qdio_q_cache, q);
1637 }
1638 }
1639 free_page((unsigned long) irq_ptr->qdr);
1640 free_page((unsigned long) irq_ptr);
1641 }
1642
1643 static void
1644 qdio_set_impl_params(struct qdio_irq *irq_ptr,
1645 unsigned int qib_param_field_format,
1646 /* pointer to 128 bytes or NULL, if no param field */
1647 unsigned char *qib_param_field,
1648 /* pointer to no_queues*128 words of data or NULL */
1649 unsigned int no_input_qs,
1650 unsigned int no_output_qs,
1651 unsigned long *input_slib_elements,
1652 unsigned long *output_slib_elements)
1653 {
1654 int i,j;
1655
1656 if (!irq_ptr)
1657 return;
1658
1659 irq_ptr->qib.pfmt=qib_param_field_format;
1660 if (qib_param_field)
1661 memcpy(irq_ptr->qib.parm,qib_param_field,
1662 QDIO_MAX_BUFFERS_PER_Q);
1663
1664 if (input_slib_elements)
1665 for (i=0;i<no_input_qs;i++) {
1666 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1667 irq_ptr->input_qs[i]->slib->slibe[j].parms=
1668 input_slib_elements[
1669 i*QDIO_MAX_BUFFERS_PER_Q+j];
1670 }
1671 if (output_slib_elements)
1672 for (i=0;i<no_output_qs;i++) {
1673 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1674 irq_ptr->output_qs[i]->slib->slibe[j].parms=
1675 output_slib_elements[
1676 i*QDIO_MAX_BUFFERS_PER_Q+j];
1677 }
1678 }
1679
1680 static int
1681 qdio_alloc_qs(struct qdio_irq *irq_ptr,
1682 int no_input_qs, int no_output_qs)
1683 {
1684 int i;
1685 struct qdio_q *q;
1686
1687 for (i = 0; i < no_input_qs; i++) {
1688 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
1689 if (!q)
1690 return -ENOMEM;
1691 memset(q, 0, sizeof(*q));
1692
1693 q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
1694 if (!q->slib) {
1695 kmem_cache_free(qdio_q_cache, q);
1696 return -ENOMEM;
1697 }
1698 irq_ptr->input_qs[i]=q;
1699 }
1700
1701 for (i = 0; i < no_output_qs; i++) {
1702 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
1703 if (!q)
1704 return -ENOMEM;
1705 memset(q, 0, sizeof(*q));
1706
1707 q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
1708 if (!q->slib) {
1709 kmem_cache_free(qdio_q_cache, q);
1710 return -ENOMEM;
1711 }
1712 irq_ptr->output_qs[i]=q;
1713 }
1714 return 0;
1715 }
1716
1717 static void
1718 qdio_fill_qs(struct qdio_irq *irq_ptr, struct ccw_device *cdev,
1719 int no_input_qs, int no_output_qs,
1720 qdio_handler_t *input_handler,
1721 qdio_handler_t *output_handler,
1722 unsigned long int_parm,int q_format,
1723 unsigned long flags,
1724 void **inbound_sbals_array,
1725 void **outbound_sbals_array)
1726 {
1727 struct qdio_q *q;
1728 int i,j;
1729 char dbf_text[20]; /* see qdio_initialize */
1730 void *ptr;
1731 int available;
1732
1733 sprintf(dbf_text,"qfqs%4x",cdev->private->schid.sch_no);
1734 QDIO_DBF_TEXT0(0,setup,dbf_text);
1735 for (i=0;i<no_input_qs;i++) {
1736 q=irq_ptr->input_qs[i];
1737
1738 memset(q,0,((char*)&q->slib)-((char*)q));
1739 sprintf(dbf_text,"in-q%4x",i);
1740 QDIO_DBF_TEXT0(0,setup,dbf_text);
1741 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1742
1743 memset(q->slib,0,PAGE_SIZE);
1744 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1745
1746 available=0;
1747
1748 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1749 q->sbal[j]=*(inbound_sbals_array++);
1750
1751 q->queue_type=q_format;
1752 q->int_parm=int_parm;
1753 q->schid = irq_ptr->schid;
1754 q->irq_ptr = irq_ptr;
1755 q->cdev = cdev;
1756 q->mask=1<<(31-i);
1757 q->q_no=i;
1758 q->is_input_q=1;
1759 q->first_to_check=0;
1760 q->last_move_ftc=0;
1761 q->handler=input_handler;
1762 q->dev_st_chg_ind=irq_ptr->dev_st_chg_ind;
1763
1764 /* q->is_thinint_q isn't valid at this time, but
1765 * irq_ptr->is_thinint_irq is
1766 */
1767 if (irq_ptr->is_thinint_irq)
1768 tasklet_init(&q->tasklet, tiqdio_inbound_processing,
1769 (unsigned long) q);
1770 else
1771 tasklet_init(&q->tasklet, qdio_inbound_processing,
1772 (unsigned long) q);
1773
1774 /* actually this is not used for inbound queues. yet. */
1775 atomic_set(&q->busy_siga_counter,0);
1776 q->timing.busy_start=0;
1777
1778 /* for (j=0;j<QDIO_STATS_NUMBER;j++)
1779 q->timing.last_transfer_times[j]=(qdio_get_micros()/
1780 QDIO_STATS_NUMBER)*j;
1781 q->timing.last_transfer_index=QDIO_STATS_NUMBER-1;
1782 */
1783
1784 /* fill in slib */
1785 if (i>0) irq_ptr->input_qs[i-1]->slib->nsliba=
1786 (unsigned long)(q->slib);
1787 q->slib->sla=(unsigned long)(q->sl);
1788 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1789
1790 /* fill in sl */
1791 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1792 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1793
1794 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1795 ptr=(void*)q->sl;
1796 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1797 ptr=(void*)&q->slsb;
1798 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1799 ptr=(void*)q->sbal[0];
1800 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1801
1802 /* fill in slsb */
1803 if (!irq_ptr->is_qebsm) {
1804 unsigned int count = 1;
1805 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
1806 set_slsb(q, &j, SLSB_P_INPUT_NOT_INIT, &count);
1807 }
1808 }
1809
1810 for (i=0;i<no_output_qs;i++) {
1811 q=irq_ptr->output_qs[i];
1812 memset(q,0,((char*)&q->slib)-((char*)q));
1813
1814 sprintf(dbf_text,"outq%4x",i);
1815 QDIO_DBF_TEXT0(0,setup,dbf_text);
1816 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1817
1818 memset(q->slib,0,PAGE_SIZE);
1819 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1820
1821 available=0;
1822
1823 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1824 q->sbal[j]=*(outbound_sbals_array++);
1825
1826 q->queue_type=q_format;
1827 if ((q->queue_type == QDIO_IQDIO_QFMT) &&
1828 (no_output_qs > 1) &&
1829 (i == no_output_qs-1))
1830 q->queue_type = QDIO_IQDIO_QFMT_ASYNCH;
1831 q->int_parm=int_parm;
1832 q->is_input_q=0;
1833 q->is_pci_out = 0;
1834 q->schid = irq_ptr->schid;
1835 q->cdev = cdev;
1836 q->irq_ptr = irq_ptr;
1837 q->mask=1<<(31-i);
1838 q->q_no=i;
1839 q->first_to_check=0;
1840 q->last_move_ftc=0;
1841 q->handler=output_handler;
1842
1843 tasklet_init(&q->tasklet, qdio_outbound_processing,
1844 (unsigned long) q);
1845 setup_timer(&q->timer, qdio_outbound_processing,
1846 (unsigned long) q);
1847
1848 atomic_set(&q->busy_siga_counter,0);
1849 q->timing.busy_start=0;
1850
1851 /* fill in slib */
1852 if (i>0) irq_ptr->output_qs[i-1]->slib->nsliba=
1853 (unsigned long)(q->slib);
1854 q->slib->sla=(unsigned long)(q->sl);
1855 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1856
1857 /* fill in sl */
1858 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1859 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1860
1861 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1862 ptr=(void*)q->sl;
1863 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1864 ptr=(void*)&q->slsb;
1865 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1866 ptr=(void*)q->sbal[0];
1867 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1868
1869 /* fill in slsb */
1870 if (!irq_ptr->is_qebsm) {
1871 unsigned int count = 1;
1872 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
1873 set_slsb(q, &j, SLSB_P_OUTPUT_NOT_INIT, &count);
1874 }
1875 }
1876 }
1877
1878 static void
1879 qdio_fill_thresholds(struct qdio_irq *irq_ptr,
1880 unsigned int no_input_qs,
1881 unsigned int no_output_qs,
1882 unsigned int min_input_threshold,
1883 unsigned int max_input_threshold,
1884 unsigned int min_output_threshold,
1885 unsigned int max_output_threshold)
1886 {
1887 int i;
1888 struct qdio_q *q;
1889
1890 for (i=0;i<no_input_qs;i++) {
1891 q=irq_ptr->input_qs[i];
1892 q->timing.threshold=max_input_threshold;
1893 /* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1894 q->threshold_classes[j].threshold=
1895 min_input_threshold+
1896 (max_input_threshold-min_input_threshold)/
1897 QDIO_STATS_CLASSES;
1898 }
1899 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1900 }
1901 for (i=0;i<no_output_qs;i++) {
1902 q=irq_ptr->output_qs[i];
1903 q->timing.threshold=max_output_threshold;
1904 /* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1905 q->threshold_classes[j].threshold=
1906 min_output_threshold+
1907 (max_output_threshold-min_output_threshold)/
1908 QDIO_STATS_CLASSES;
1909 }
1910 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1911 }
1912 }
1913
1914 static int
1915 tiqdio_thinint_handler(void)
1916 {
1917 QDIO_DBF_TEXT4(0,trace,"thin_int");
1918
1919 qdio_perf_stat_inc(&perf_stats.thinints);
1920
1921 /* SVS only when needed:
1922 * issue SVS to benefit from iqdio interrupt avoidance
1923 * (SVS clears AISOI)*/
1924 if (!omit_svs)
1925 tiqdio_clear_global_summary();
1926
1927 tiqdio_inbound_checks();
1928 return 0;
1929 }
1930
1931 static void
1932 qdio_set_state(struct qdio_irq *irq_ptr, enum qdio_irq_states state)
1933 {
1934 int i;
1935 #ifdef CONFIG_QDIO_DEBUG
1936 char dbf_text[15];
1937
1938 QDIO_DBF_TEXT5(0,trace,"newstate");
1939 sprintf(dbf_text,"%4x%4x",irq_ptr->schid.sch_no,state);
1940 QDIO_DBF_TEXT5(0,trace,dbf_text);
1941 #endif /* CONFIG_QDIO_DEBUG */
1942
1943 irq_ptr->state=state;
1944 for (i=0;i<irq_ptr->no_input_qs;i++)
1945 irq_ptr->input_qs[i]->state=state;
1946 for (i=0;i<irq_ptr->no_output_qs;i++)
1947 irq_ptr->output_qs[i]->state=state;
1948 mb();
1949 }
1950
1951 static void
1952 qdio_irq_check_sense(struct subchannel_id schid, struct irb *irb)
1953 {
1954 char dbf_text[15];
1955
1956 if (irb->esw.esw0.erw.cons) {
1957 sprintf(dbf_text,"sens%4x",schid.sch_no);
1958 QDIO_DBF_TEXT2(1,trace,dbf_text);
1959 QDIO_DBF_HEX0(0,sense,irb,QDIO_DBF_SENSE_LEN);
1960
1961 QDIO_PRINT_WARN("sense data available on qdio channel.\n");
1962 QDIO_HEXDUMP16(WARN,"irb: ",irb);
1963 QDIO_HEXDUMP16(WARN,"sense data: ",irb->ecw);
1964 }
1965
1966 }
1967
1968 static void
1969 qdio_handle_pci(struct qdio_irq *irq_ptr)
1970 {
1971 int i;
1972 struct qdio_q *q;
1973
1974 qdio_perf_stat_inc(&perf_stats.pcis);
1975 for (i=0;i<irq_ptr->no_input_qs;i++) {
1976 q=irq_ptr->input_qs[i];
1977 if (q->is_input_q&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT)
1978 qdio_mark_q(q);
1979 else {
1980 qdio_perf_stat_dec(&perf_stats.tl_runs);
1981 __qdio_inbound_processing(q);
1982 }
1983 }
1984 if (!irq_ptr->hydra_gives_outbound_pcis)
1985 return;
1986 for (i=0;i<irq_ptr->no_output_qs;i++) {
1987 q=irq_ptr->output_qs[i];
1988 if (qdio_is_outbound_q_done(q))
1989 continue;
1990 qdio_perf_stat_dec(&perf_stats.tl_runs);
1991 if (!irq_ptr->sync_done_on_outb_pcis)
1992 SYNC_MEMORY;
1993 __qdio_outbound_processing(q);
1994 }
1995 }
1996
1997 static void qdio_establish_handle_irq(struct ccw_device*, int, int);
1998
1999 static void
2000 qdio_handle_activate_check(struct ccw_device *cdev, unsigned long intparm,
2001 int cstat, int dstat)
2002 {
2003 struct qdio_irq *irq_ptr;
2004 struct qdio_q *q;
2005 char dbf_text[15];
2006
2007 irq_ptr = cdev->private->qdio_data;
2008
2009 QDIO_DBF_TEXT2(1, trace, "ick2");
2010 sprintf(dbf_text,"%s", cdev->dev.bus_id);
2011 QDIO_DBF_TEXT2(1,trace,dbf_text);
2012 QDIO_DBF_HEX2(0,trace,&intparm,sizeof(int));
2013 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2014 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2015 QDIO_PRINT_ERR("received check condition on activate " \
2016 "queues on device %s (cs=x%x, ds=x%x).\n",
2017 cdev->dev.bus_id, cstat, dstat);
2018 if (irq_ptr->no_input_qs) {
2019 q=irq_ptr->input_qs[0];
2020 } else if (irq_ptr->no_output_qs) {
2021 q=irq_ptr->output_qs[0];
2022 } else {
2023 QDIO_PRINT_ERR("oops... no queue registered for device %s!?\n",
2024 cdev->dev.bus_id);
2025 goto omit_handler_call;
2026 }
2027 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
2028 QDIO_STATUS_LOOK_FOR_ERROR,
2029 0,0,0,-1,-1,q->int_parm);
2030 omit_handler_call:
2031 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_STOPPED);
2032
2033 }
2034
2035 static void
2036 qdio_call_shutdown(struct work_struct *work)
2037 {
2038 struct ccw_device_private *priv;
2039 struct ccw_device *cdev;
2040
2041 priv = container_of(work, struct ccw_device_private, kick_work);
2042 cdev = priv->cdev;
2043 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
2044 put_device(&cdev->dev);
2045 }
2046
2047 static void
2048 qdio_timeout_handler(struct ccw_device *cdev)
2049 {
2050 struct qdio_irq *irq_ptr;
2051 char dbf_text[15];
2052
2053 QDIO_DBF_TEXT2(0, trace, "qtoh");
2054 sprintf(dbf_text, "%s", cdev->dev.bus_id);
2055 QDIO_DBF_TEXT2(0, trace, dbf_text);
2056
2057 irq_ptr = cdev->private->qdio_data;
2058 sprintf(dbf_text, "state:%d", irq_ptr->state);
2059 QDIO_DBF_TEXT2(0, trace, dbf_text);
2060
2061 switch (irq_ptr->state) {
2062 case QDIO_IRQ_STATE_INACTIVE:
2063 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: timed out\n",
2064 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2065 QDIO_DBF_TEXT2(1,setup,"eq:timeo");
2066 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2067 break;
2068 case QDIO_IRQ_STATE_CLEANUP:
2069 QDIO_PRINT_INFO("Did not get interrupt on cleanup, "
2070 "irq=0.%x.%x.\n",
2071 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2072 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2073 break;
2074 case QDIO_IRQ_STATE_ESTABLISHED:
2075 case QDIO_IRQ_STATE_ACTIVE:
2076 /* I/O has been terminated by common I/O layer. */
2077 QDIO_PRINT_INFO("Queues on irq 0.%x.%04x killed by cio.\n",
2078 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2079 QDIO_DBF_TEXT2(1, trace, "cio:term");
2080 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
2081 if (get_device(&cdev->dev)) {
2082 /* Can't call shutdown from interrupt context. */
2083 PREPARE_WORK(&cdev->private->kick_work,
2084 qdio_call_shutdown);
2085 queue_work(ccw_device_work, &cdev->private->kick_work);
2086 }
2087 break;
2088 default:
2089 BUG();
2090 }
2091 ccw_device_set_timeout(cdev, 0);
2092 wake_up(&cdev->private->wait_q);
2093 }
2094
2095 static void
2096 qdio_handler(struct ccw_device *cdev, unsigned long intparm, struct irb *irb)
2097 {
2098 struct qdio_irq *irq_ptr;
2099 int cstat,dstat;
2100 char dbf_text[15];
2101
2102 #ifdef CONFIG_QDIO_DEBUG
2103 QDIO_DBF_TEXT4(0, trace, "qint");
2104 sprintf(dbf_text, "%s", cdev->dev.bus_id);
2105 QDIO_DBF_TEXT4(0, trace, dbf_text);
2106 #endif /* CONFIG_QDIO_DEBUG */
2107
2108 if (!intparm) {
2109 QDIO_PRINT_ERR("got unsolicited interrupt in qdio " \
2110 "handler, device %s\n", cdev->dev.bus_id);
2111 return;
2112 }
2113
2114 irq_ptr = cdev->private->qdio_data;
2115 if (!irq_ptr) {
2116 QDIO_DBF_TEXT2(1, trace, "uint");
2117 sprintf(dbf_text,"%s", cdev->dev.bus_id);
2118 QDIO_DBF_TEXT2(1,trace,dbf_text);
2119 QDIO_PRINT_ERR("received interrupt on unused device %s!\n",
2120 cdev->dev.bus_id);
2121 return;
2122 }
2123
2124 if (IS_ERR(irb)) {
2125 /* Currently running i/o is in error. */
2126 switch (PTR_ERR(irb)) {
2127 case -EIO:
2128 QDIO_PRINT_ERR("i/o error on device %s\n",
2129 cdev->dev.bus_id);
2130 return;
2131 case -ETIMEDOUT:
2132 qdio_timeout_handler(cdev);
2133 return;
2134 default:
2135 QDIO_PRINT_ERR("unknown error state %ld on device %s\n",
2136 PTR_ERR(irb), cdev->dev.bus_id);
2137 return;
2138 }
2139 }
2140
2141 qdio_irq_check_sense(irq_ptr->schid, irb);
2142
2143 #ifdef CONFIG_QDIO_DEBUG
2144 sprintf(dbf_text, "state:%d", irq_ptr->state);
2145 QDIO_DBF_TEXT4(0, trace, dbf_text);
2146 #endif /* CONFIG_QDIO_DEBUG */
2147
2148 cstat = irb->scsw.cstat;
2149 dstat = irb->scsw.dstat;
2150
2151 switch (irq_ptr->state) {
2152 case QDIO_IRQ_STATE_INACTIVE:
2153 qdio_establish_handle_irq(cdev, cstat, dstat);
2154 break;
2155
2156 case QDIO_IRQ_STATE_CLEANUP:
2157 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2158 break;
2159
2160 case QDIO_IRQ_STATE_ESTABLISHED:
2161 case QDIO_IRQ_STATE_ACTIVE:
2162 if (cstat & SCHN_STAT_PCI) {
2163 qdio_handle_pci(irq_ptr);
2164 break;
2165 }
2166
2167 if ((cstat&~SCHN_STAT_PCI)||dstat) {
2168 qdio_handle_activate_check(cdev, intparm, cstat, dstat);
2169 break;
2170 }
2171 default:
2172 QDIO_PRINT_ERR("got interrupt for queues in state %d on " \
2173 "device %s?!\n",
2174 irq_ptr->state, cdev->dev.bus_id);
2175 }
2176 wake_up(&cdev->private->wait_q);
2177
2178 }
2179
2180 int
2181 qdio_synchronize(struct ccw_device *cdev, unsigned int flags,
2182 unsigned int queue_number)
2183 {
2184 int cc = 0;
2185 struct qdio_q *q;
2186 struct qdio_irq *irq_ptr;
2187 void *ptr;
2188 #ifdef CONFIG_QDIO_DEBUG
2189 char dbf_text[15]="SyncXXXX";
2190 #endif
2191
2192 irq_ptr = cdev->private->qdio_data;
2193 if (!irq_ptr)
2194 return -ENODEV;
2195
2196 #ifdef CONFIG_QDIO_DEBUG
2197 *((int*)(&dbf_text[4])) = irq_ptr->schid.sch_no;
2198 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
2199 *((int*)(&dbf_text[0]))=flags;
2200 *((int*)(&dbf_text[4]))=queue_number;
2201 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
2202 #endif /* CONFIG_QDIO_DEBUG */
2203
2204 if (flags&QDIO_FLAG_SYNC_INPUT) {
2205 q=irq_ptr->input_qs[queue_number];
2206 if (!q)
2207 return -EINVAL;
2208 if (!(irq_ptr->is_qebsm))
2209 cc = do_siga_sync(q->schid, 0, q->mask);
2210 } else if (flags&QDIO_FLAG_SYNC_OUTPUT) {
2211 q=irq_ptr->output_qs[queue_number];
2212 if (!q)
2213 return -EINVAL;
2214 if (!(irq_ptr->is_qebsm))
2215 cc = do_siga_sync(q->schid, q->mask, 0);
2216 } else
2217 return -EINVAL;
2218
2219 ptr=&cc;
2220 if (cc)
2221 QDIO_DBF_HEX3(0,trace,&ptr,sizeof(int));
2222
2223 return cc;
2224 }
2225
2226 static void
2227 qdio_check_subchannel_qebsm(struct qdio_irq *irq_ptr, unsigned char qdioac,
2228 unsigned long token)
2229 {
2230 struct qdio_q *q;
2231 int i;
2232 unsigned int count, start_buf;
2233 char dbf_text[15];
2234
2235 /*check if QEBSM is disabled */
2236 if (!(irq_ptr->is_qebsm) || !(qdioac & 0x01)) {
2237 irq_ptr->is_qebsm = 0;
2238 irq_ptr->sch_token = 0;
2239 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
2240 QDIO_DBF_TEXT0(0,setup,"noV=V");
2241 return;
2242 }
2243 irq_ptr->sch_token = token;
2244 /*input queue*/
2245 for (i = 0; i < irq_ptr->no_input_qs;i++) {
2246 q = irq_ptr->input_qs[i];
2247 count = QDIO_MAX_BUFFERS_PER_Q;
2248 start_buf = 0;
2249 set_slsb(q, &start_buf, SLSB_P_INPUT_NOT_INIT, &count);
2250 }
2251 sprintf(dbf_text,"V=V:%2x",irq_ptr->is_qebsm);
2252 QDIO_DBF_TEXT0(0,setup,dbf_text);
2253 sprintf(dbf_text,"%8lx",irq_ptr->sch_token);
2254 QDIO_DBF_TEXT0(0,setup,dbf_text);
2255 /*output queue*/
2256 for (i = 0; i < irq_ptr->no_output_qs; i++) {
2257 q = irq_ptr->output_qs[i];
2258 count = QDIO_MAX_BUFFERS_PER_Q;
2259 start_buf = 0;
2260 set_slsb(q, &start_buf, SLSB_P_OUTPUT_NOT_INIT, &count);
2261 }
2262 }
2263
2264 static void
2265 qdio_get_ssqd_information(struct qdio_irq *irq_ptr)
2266 {
2267 int result;
2268 unsigned char qdioac;
2269 struct {
2270 struct chsc_header request;
2271 u16 reserved1:10;
2272 u16 ssid:2;
2273 u16 fmt:4;
2274 u16 first_sch;
2275 u16 reserved2;
2276 u16 last_sch;
2277 u32 reserved3;
2278 struct chsc_header response;
2279 u32 reserved4;
2280 u8 flags;
2281 u8 reserved5;
2282 u16 sch;
2283 u8 qfmt;
2284 u8 parm;
2285 u8 qdioac1;
2286 u8 sch_class;
2287 u8 reserved7;
2288 u8 icnt;
2289 u8 reserved8;
2290 u8 ocnt;
2291 u8 reserved9;
2292 u8 mbccnt;
2293 u16 qdioac2;
2294 u64 sch_token;
2295 } *ssqd_area;
2296
2297 QDIO_DBF_TEXT0(0,setup,"getssqd");
2298 qdioac = 0;
2299 ssqd_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2300 if (!ssqd_area) {
2301 QDIO_PRINT_WARN("Could not get memory for chsc. Using all " \
2302 "SIGAs for sch x%x.\n", irq_ptr->schid.sch_no);
2303 irq_ptr->qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2304 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2305 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2306 irq_ptr->is_qebsm = 0;
2307 irq_ptr->sch_token = 0;
2308 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
2309 return;
2310 }
2311
2312 ssqd_area->request = (struct chsc_header) {
2313 .length = 0x0010,
2314 .code = 0x0024,
2315 };
2316 ssqd_area->first_sch = irq_ptr->schid.sch_no;
2317 ssqd_area->last_sch = irq_ptr->schid.sch_no;
2318 ssqd_area->ssid = irq_ptr->schid.ssid;
2319 result = chsc(ssqd_area);
2320
2321 if (result) {
2322 QDIO_PRINT_WARN("CHSC returned cc %i. Using all " \
2323 "SIGAs for sch 0.%x.%x.\n", result,
2324 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2325 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2326 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2327 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2328 irq_ptr->is_qebsm = 0;
2329 goto out;
2330 }
2331
2332 if (ssqd_area->response.code != QDIO_CHSC_RESPONSE_CODE_OK) {
2333 QDIO_PRINT_WARN("response upon checking SIGA needs " \
2334 "is 0x%x. Using all SIGAs for sch 0.%x.%x.\n",
2335 ssqd_area->response.code,
2336 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2337 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2338 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2339 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2340 irq_ptr->is_qebsm = 0;
2341 goto out;
2342 }
2343 if (!(ssqd_area->flags & CHSC_FLAG_QDIO_CAPABILITY) ||
2344 !(ssqd_area->flags & CHSC_FLAG_VALIDITY) ||
2345 (ssqd_area->sch != irq_ptr->schid.sch_no)) {
2346 QDIO_PRINT_WARN("huh? problems checking out sch 0.%x.%x... " \
2347 "using all SIGAs.\n",
2348 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2349 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2350 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2351 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* worst case */
2352 irq_ptr->is_qebsm = 0;
2353 goto out;
2354 }
2355 qdioac = ssqd_area->qdioac1;
2356 out:
2357 qdio_check_subchannel_qebsm(irq_ptr, qdioac,
2358 ssqd_area->sch_token);
2359 mempool_free(ssqd_area, qdio_mempool_scssc);
2360 irq_ptr->qdioac = qdioac;
2361 }
2362
2363 static unsigned int
2364 tiqdio_check_chsc_availability(void)
2365 {
2366 char dbf_text[15];
2367
2368 if (!css_characteristics_avail)
2369 return -EIO;
2370
2371 /* Check for bit 41. */
2372 if (!css_general_characteristics.aif) {
2373 QDIO_PRINT_WARN("Adapter interruption facility not " \
2374 "installed.\n");
2375 return -ENOENT;
2376 }
2377
2378 /* Check for bits 107 and 108. */
2379 if (!css_chsc_characteristics.scssc ||
2380 !css_chsc_characteristics.scsscf) {
2381 QDIO_PRINT_WARN("Set Chan Subsys. Char. & Fast-CHSCs " \
2382 "not available.\n");
2383 return -ENOENT;
2384 }
2385
2386 /* Check for OSA/FCP thin interrupts (bit 67). */
2387 hydra_thinints = css_general_characteristics.aif_osa;
2388 sprintf(dbf_text,"hydrati%1x", hydra_thinints);
2389 QDIO_DBF_TEXT0(0,setup,dbf_text);
2390
2391 #ifdef CONFIG_64BIT
2392 /* Check for QEBSM support in general (bit 58). */
2393 is_passthrough = css_general_characteristics.qebsm;
2394 #endif
2395 sprintf(dbf_text,"cssQBS:%1x", is_passthrough);
2396 QDIO_DBF_TEXT0(0,setup,dbf_text);
2397
2398 /* Check for aif time delay disablement fac (bit 56). If installed,
2399 * omit svs even under lpar (good point by rick again) */
2400 omit_svs = css_general_characteristics.aif_tdd;
2401 sprintf(dbf_text,"omitsvs%1x", omit_svs);
2402 QDIO_DBF_TEXT0(0,setup,dbf_text);
2403 return 0;
2404 }
2405
2406
2407 static unsigned int
2408 tiqdio_set_subchannel_ind(struct qdio_irq *irq_ptr, int reset_to_zero)
2409 {
2410 unsigned long real_addr_local_summary_bit;
2411 unsigned long real_addr_dev_st_chg_ind;
2412 void *ptr;
2413 char dbf_text[15];
2414
2415 unsigned int resp_code;
2416 int result;
2417
2418 struct {
2419 struct chsc_header request;
2420 u16 operation_code;
2421 u16 reserved1;
2422 u32 reserved2;
2423 u32 reserved3;
2424 u64 summary_indicator_addr;
2425 u64 subchannel_indicator_addr;
2426 u32 ks:4;
2427 u32 kc:4;
2428 u32 reserved4:21;
2429 u32 isc:3;
2430 u32 word_with_d_bit;
2431 /* set to 0x10000000 to enable
2432 * time delay disablement facility */
2433 u32 reserved5;
2434 struct subchannel_id schid;
2435 u32 reserved6[1004];
2436 struct chsc_header response;
2437 u32 reserved7;
2438 } *scssc_area;
2439
2440 if (!irq_ptr->is_thinint_irq)
2441 return -ENODEV;
2442
2443 if (reset_to_zero) {
2444 real_addr_local_summary_bit=0;
2445 real_addr_dev_st_chg_ind=0;
2446 } else {
2447 real_addr_local_summary_bit=
2448 virt_to_phys((volatile void *)indicators);
2449 real_addr_dev_st_chg_ind=
2450 virt_to_phys((volatile void *)irq_ptr->dev_st_chg_ind);
2451 }
2452
2453 scssc_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2454 if (!scssc_area) {
2455 QDIO_PRINT_WARN("No memory for setting indicators on " \
2456 "subchannel 0.%x.%x.\n",
2457 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2458 return -ENOMEM;
2459 }
2460 scssc_area->request = (struct chsc_header) {
2461 .length = 0x0fe0,
2462 .code = 0x0021,
2463 };
2464 scssc_area->operation_code = 0;
2465
2466 scssc_area->summary_indicator_addr = real_addr_local_summary_bit;
2467 scssc_area->subchannel_indicator_addr = real_addr_dev_st_chg_ind;
2468 scssc_area->ks = QDIO_STORAGE_KEY;
2469 scssc_area->kc = QDIO_STORAGE_KEY;
2470 scssc_area->isc = TIQDIO_THININT_ISC;
2471 scssc_area->schid = irq_ptr->schid;
2472 /* enables the time delay disablement facility. Don't care
2473 * whether it is really there (i.e. we haven't checked for
2474 * it) */
2475 if (css_general_characteristics.aif_tdd)
2476 scssc_area->word_with_d_bit = 0x10000000;
2477 else
2478 QDIO_PRINT_WARN("Time delay disablement facility " \
2479 "not available\n");
2480
2481 result = chsc(scssc_area);
2482 if (result) {
2483 QDIO_PRINT_WARN("could not set indicators on irq 0.%x.%x, " \
2484 "cc=%i.\n",
2485 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,result);
2486 result = -EIO;
2487 goto out;
2488 }
2489
2490 resp_code = scssc_area->response.code;
2491 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2492 QDIO_PRINT_WARN("response upon setting indicators " \
2493 "is 0x%x.\n",resp_code);
2494 sprintf(dbf_text,"sidR%4x",resp_code);
2495 QDIO_DBF_TEXT1(0,trace,dbf_text);
2496 QDIO_DBF_TEXT1(0,setup,dbf_text);
2497 ptr=&scssc_area->response;
2498 QDIO_DBF_HEX2(1,setup,&ptr,QDIO_DBF_SETUP_LEN);
2499 result = -EIO;
2500 goto out;
2501 }
2502
2503 QDIO_DBF_TEXT2(0,setup,"setscind");
2504 QDIO_DBF_HEX2(0,setup,&real_addr_local_summary_bit,
2505 sizeof(unsigned long));
2506 QDIO_DBF_HEX2(0,setup,&real_addr_dev_st_chg_ind,sizeof(unsigned long));
2507 result = 0;
2508 out:
2509 mempool_free(scssc_area, qdio_mempool_scssc);
2510 return result;
2511
2512 }
2513
2514 static unsigned int
2515 tiqdio_set_delay_target(struct qdio_irq *irq_ptr, unsigned long delay_target)
2516 {
2517 unsigned int resp_code;
2518 int result;
2519 void *ptr;
2520 char dbf_text[15];
2521
2522 struct {
2523 struct chsc_header request;
2524 u16 operation_code;
2525 u16 reserved1;
2526 u32 reserved2;
2527 u32 reserved3;
2528 u32 reserved4[2];
2529 u32 delay_target;
2530 u32 reserved5[1009];
2531 struct chsc_header response;
2532 u32 reserved6;
2533 } *scsscf_area;
2534
2535 if (!irq_ptr->is_thinint_irq)
2536 return -ENODEV;
2537
2538 scsscf_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2539 if (!scsscf_area) {
2540 QDIO_PRINT_WARN("No memory for setting delay target on " \
2541 "subchannel 0.%x.%x.\n",
2542 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2543 return -ENOMEM;
2544 }
2545 scsscf_area->request = (struct chsc_header) {
2546 .length = 0x0fe0,
2547 .code = 0x1027,
2548 };
2549
2550 scsscf_area->delay_target = delay_target<<16;
2551
2552 result=chsc(scsscf_area);
2553 if (result) {
2554 QDIO_PRINT_WARN("could not set delay target on irq 0.%x.%x, " \
2555 "cc=%i. Continuing.\n",
2556 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2557 result);
2558 result = -EIO;
2559 goto out;
2560 }
2561
2562 resp_code = scsscf_area->response.code;
2563 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2564 QDIO_PRINT_WARN("response upon setting delay target " \
2565 "is 0x%x. Continuing.\n",resp_code);
2566 sprintf(dbf_text,"sdtR%4x",resp_code);
2567 QDIO_DBF_TEXT1(0,trace,dbf_text);
2568 QDIO_DBF_TEXT1(0,setup,dbf_text);
2569 ptr=&scsscf_area->response;
2570 QDIO_DBF_HEX2(1,trace,&ptr,QDIO_DBF_TRACE_LEN);
2571 }
2572 QDIO_DBF_TEXT2(0,trace,"delytrgt");
2573 QDIO_DBF_HEX2(0,trace,&delay_target,sizeof(unsigned long));
2574 result = 0; /* not critical */
2575 out:
2576 mempool_free(scsscf_area, qdio_mempool_scssc);
2577 return result;
2578 }
2579
2580 int
2581 qdio_cleanup(struct ccw_device *cdev, int how)
2582 {
2583 struct qdio_irq *irq_ptr;
2584 char dbf_text[15];
2585 int rc;
2586
2587 irq_ptr = cdev->private->qdio_data;
2588 if (!irq_ptr)
2589 return -ENODEV;
2590
2591 sprintf(dbf_text,"qcln%4x",irq_ptr->schid.sch_no);
2592 QDIO_DBF_TEXT1(0,trace,dbf_text);
2593 QDIO_DBF_TEXT0(0,setup,dbf_text);
2594
2595 rc = qdio_shutdown(cdev, how);
2596 if ((rc == 0) || (rc == -EINPROGRESS))
2597 rc = qdio_free(cdev);
2598 return rc;
2599 }
2600
2601 int
2602 qdio_shutdown(struct ccw_device *cdev, int how)
2603 {
2604 struct qdio_irq *irq_ptr;
2605 int i;
2606 int result = 0;
2607 int rc;
2608 unsigned long flags;
2609 int timeout;
2610 char dbf_text[15];
2611
2612 irq_ptr = cdev->private->qdio_data;
2613 if (!irq_ptr)
2614 return -ENODEV;
2615
2616 down(&irq_ptr->setting_up_sema);
2617
2618 sprintf(dbf_text,"qsqs%4x",irq_ptr->schid.sch_no);
2619 QDIO_DBF_TEXT1(0,trace,dbf_text);
2620 QDIO_DBF_TEXT0(0,setup,dbf_text);
2621
2622 /* mark all qs as uninteresting */
2623 for (i=0;i<irq_ptr->no_input_qs;i++)
2624 atomic_set(&irq_ptr->input_qs[i]->is_in_shutdown,1);
2625
2626 for (i=0;i<irq_ptr->no_output_qs;i++)
2627 atomic_set(&irq_ptr->output_qs[i]->is_in_shutdown,1);
2628
2629 tasklet_kill(&tiqdio_tasklet);
2630
2631 for (i=0;i<irq_ptr->no_input_qs;i++) {
2632 qdio_unmark_q(irq_ptr->input_qs[i]);
2633 tasklet_kill(&irq_ptr->input_qs[i]->tasklet);
2634 wait_event_interruptible_timeout(cdev->private->wait_q,
2635 !atomic_read(&irq_ptr->
2636 input_qs[i]->
2637 use_count),
2638 QDIO_NO_USE_COUNT_TIMEOUT);
2639 if (atomic_read(&irq_ptr->input_qs[i]->use_count))
2640 result=-EINPROGRESS;
2641 }
2642
2643 for (i=0;i<irq_ptr->no_output_qs;i++) {
2644 tasklet_kill(&irq_ptr->output_qs[i]->tasklet);
2645 del_timer(&irq_ptr->output_qs[i]->timer);
2646 wait_event_interruptible_timeout(cdev->private->wait_q,
2647 !atomic_read(&irq_ptr->
2648 output_qs[i]->
2649 use_count),
2650 QDIO_NO_USE_COUNT_TIMEOUT);
2651 if (atomic_read(&irq_ptr->output_qs[i]->use_count))
2652 result=-EINPROGRESS;
2653 }
2654
2655 /* cleanup subchannel */
2656 spin_lock_irqsave(get_ccwdev_lock(cdev),flags);
2657 if (how&QDIO_FLAG_CLEANUP_USING_CLEAR) {
2658 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
2659 timeout=QDIO_CLEANUP_CLEAR_TIMEOUT;
2660 } else if (how&QDIO_FLAG_CLEANUP_USING_HALT) {
2661 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2662 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2663 } else { /* default behaviour */
2664 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2665 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2666 }
2667 if (rc == -ENODEV) {
2668 /* No need to wait for device no longer present. */
2669 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2670 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2671 } else if (((void *)cdev->handler != (void *)qdio_handler) && rc == 0) {
2672 /*
2673 * Whoever put another handler there, has to cope with the
2674 * interrupt theirself. Might happen if qdio_shutdown was
2675 * called on already shutdown queues, but this shouldn't have
2676 * bad side effects.
2677 */
2678 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2679 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2680 } else if (rc == 0) {
2681 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
2682 ccw_device_set_timeout(cdev, timeout);
2683 spin_unlock_irqrestore(get_ccwdev_lock(cdev),flags);
2684
2685 wait_event(cdev->private->wait_q,
2686 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
2687 irq_ptr->state == QDIO_IRQ_STATE_ERR);
2688 } else {
2689 QDIO_PRINT_INFO("ccw_device_{halt,clear} returned %d for "
2690 "device %s\n", result, cdev->dev.bus_id);
2691 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2692 result = rc;
2693 goto out;
2694 }
2695 if (irq_ptr->is_thinint_irq) {
2696 qdio_put_indicator((__u32*)irq_ptr->dev_st_chg_ind);
2697 tiqdio_set_subchannel_ind(irq_ptr,1);
2698 /* reset adapter interrupt indicators */
2699 }
2700
2701 /* exchange int handlers, if necessary */
2702 if ((void*)cdev->handler == (void*)qdio_handler)
2703 cdev->handler=irq_ptr->original_int_handler;
2704
2705 /* Ignore errors. */
2706 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2707 ccw_device_set_timeout(cdev, 0);
2708 out:
2709 up(&irq_ptr->setting_up_sema);
2710 return result;
2711 }
2712
2713 int
2714 qdio_free(struct ccw_device *cdev)
2715 {
2716 struct qdio_irq *irq_ptr;
2717 char dbf_text[15];
2718
2719 irq_ptr = cdev->private->qdio_data;
2720 if (!irq_ptr)
2721 return -ENODEV;
2722
2723 down(&irq_ptr->setting_up_sema);
2724
2725 sprintf(dbf_text,"qfqs%4x",irq_ptr->schid.sch_no);
2726 QDIO_DBF_TEXT1(0,trace,dbf_text);
2727 QDIO_DBF_TEXT0(0,setup,dbf_text);
2728
2729 cdev->private->qdio_data = NULL;
2730
2731 up(&irq_ptr->setting_up_sema);
2732
2733 qdio_release_irq_memory(irq_ptr);
2734 module_put(THIS_MODULE);
2735 return 0;
2736 }
2737
2738 static void
2739 qdio_allocate_do_dbf(struct qdio_initialize *init_data)
2740 {
2741 char dbf_text[20]; /* if a printf printed out more than 8 chars */
2742
2743 sprintf(dbf_text,"qfmt:%x",init_data->q_format);
2744 QDIO_DBF_TEXT0(0,setup,dbf_text);
2745 QDIO_DBF_HEX0(0,setup,init_data->adapter_name,8);
2746 sprintf(dbf_text,"qpff%4x",init_data->qib_param_field_format);
2747 QDIO_DBF_TEXT0(0,setup,dbf_text);
2748 QDIO_DBF_HEX0(0,setup,&init_data->qib_param_field,sizeof(char*));
2749 QDIO_DBF_HEX0(0,setup,&init_data->input_slib_elements,sizeof(long*));
2750 QDIO_DBF_HEX0(0,setup,&init_data->output_slib_elements,sizeof(long*));
2751 sprintf(dbf_text,"miit%4x",init_data->min_input_threshold);
2752 QDIO_DBF_TEXT0(0,setup,dbf_text);
2753 sprintf(dbf_text,"mait%4x",init_data->max_input_threshold);
2754 QDIO_DBF_TEXT0(0,setup,dbf_text);
2755 sprintf(dbf_text,"miot%4x",init_data->min_output_threshold);
2756 QDIO_DBF_TEXT0(0,setup,dbf_text);
2757 sprintf(dbf_text,"maot%4x",init_data->max_output_threshold);
2758 QDIO_DBF_TEXT0(0,setup,dbf_text);
2759 sprintf(dbf_text,"niq:%4x",init_data->no_input_qs);
2760 QDIO_DBF_TEXT0(0,setup,dbf_text);
2761 sprintf(dbf_text,"noq:%4x",init_data->no_output_qs);
2762 QDIO_DBF_TEXT0(0,setup,dbf_text);
2763 QDIO_DBF_HEX0(0,setup,&init_data->input_handler,sizeof(void*));
2764 QDIO_DBF_HEX0(0,setup,&init_data->output_handler,sizeof(void*));
2765 QDIO_DBF_HEX0(0,setup,&init_data->int_parm,sizeof(long));
2766 QDIO_DBF_HEX0(0,setup,&init_data->flags,sizeof(long));
2767 QDIO_DBF_HEX0(0,setup,&init_data->input_sbal_addr_array,sizeof(void*));
2768 QDIO_DBF_HEX0(0,setup,&init_data->output_sbal_addr_array,sizeof(void*));
2769 }
2770
2771 static void
2772 qdio_allocate_fill_input_desc(struct qdio_irq *irq_ptr, int i, int iqfmt)
2773 {
2774 irq_ptr->input_qs[i]->is_iqdio_q = iqfmt;
2775 irq_ptr->input_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2776
2777 irq_ptr->qdr->qdf0[i].sliba=(unsigned long)(irq_ptr->input_qs[i]->slib);
2778
2779 irq_ptr->qdr->qdf0[i].sla=(unsigned long)(irq_ptr->input_qs[i]->sl);
2780
2781 irq_ptr->qdr->qdf0[i].slsba=
2782 (unsigned long)(&irq_ptr->input_qs[i]->slsb.acc.val[0]);
2783
2784 irq_ptr->qdr->qdf0[i].akey=QDIO_STORAGE_KEY;
2785 irq_ptr->qdr->qdf0[i].bkey=QDIO_STORAGE_KEY;
2786 irq_ptr->qdr->qdf0[i].ckey=QDIO_STORAGE_KEY;
2787 irq_ptr->qdr->qdf0[i].dkey=QDIO_STORAGE_KEY;
2788 }
2789
2790 static void
2791 qdio_allocate_fill_output_desc(struct qdio_irq *irq_ptr, int i,
2792 int j, int iqfmt)
2793 {
2794 irq_ptr->output_qs[i]->is_iqdio_q = iqfmt;
2795 irq_ptr->output_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2796
2797 irq_ptr->qdr->qdf0[i+j].sliba=(unsigned long)(irq_ptr->output_qs[i]->slib);
2798
2799 irq_ptr->qdr->qdf0[i+j].sla=(unsigned long)(irq_ptr->output_qs[i]->sl);
2800
2801 irq_ptr->qdr->qdf0[i+j].slsba=
2802 (unsigned long)(&irq_ptr->output_qs[i]->slsb.acc.val[0]);
2803
2804 irq_ptr->qdr->qdf0[i+j].akey=QDIO_STORAGE_KEY;
2805 irq_ptr->qdr->qdf0[i+j].bkey=QDIO_STORAGE_KEY;
2806 irq_ptr->qdr->qdf0[i+j].ckey=QDIO_STORAGE_KEY;
2807 irq_ptr->qdr->qdf0[i+j].dkey=QDIO_STORAGE_KEY;
2808 }
2809
2810
2811 static void
2812 qdio_initialize_set_siga_flags_input(struct qdio_irq *irq_ptr)
2813 {
2814 int i;
2815
2816 for (i=0;i<irq_ptr->no_input_qs;i++) {
2817 irq_ptr->input_qs[i]->siga_sync=
2818 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2819 irq_ptr->input_qs[i]->siga_in=
2820 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2821 irq_ptr->input_qs[i]->siga_out=
2822 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2823 irq_ptr->input_qs[i]->siga_sync_done_on_thinints=
2824 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2825 irq_ptr->input_qs[i]->hydra_gives_outbound_pcis=
2826 irq_ptr->hydra_gives_outbound_pcis;
2827 irq_ptr->input_qs[i]->siga_sync_done_on_outb_tis=
2828 ((irq_ptr->qdioac&
2829 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2830 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2831 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2832 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2833
2834 }
2835 }
2836
2837 static void
2838 qdio_initialize_set_siga_flags_output(struct qdio_irq *irq_ptr)
2839 {
2840 int i;
2841
2842 for (i=0;i<irq_ptr->no_output_qs;i++) {
2843 irq_ptr->output_qs[i]->siga_sync=
2844 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2845 irq_ptr->output_qs[i]->siga_in=
2846 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2847 irq_ptr->output_qs[i]->siga_out=
2848 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2849 irq_ptr->output_qs[i]->siga_sync_done_on_thinints=
2850 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2851 irq_ptr->output_qs[i]->hydra_gives_outbound_pcis=
2852 irq_ptr->hydra_gives_outbound_pcis;
2853 irq_ptr->output_qs[i]->siga_sync_done_on_outb_tis=
2854 ((irq_ptr->qdioac&
2855 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2856 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2857 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2858 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2859
2860 }
2861 }
2862
2863 static int
2864 qdio_establish_irq_check_for_errors(struct ccw_device *cdev, int cstat,
2865 int dstat)
2866 {
2867 char dbf_text[15];
2868 struct qdio_irq *irq_ptr;
2869
2870 irq_ptr = cdev->private->qdio_data;
2871
2872 if (cstat || (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END))) {
2873 sprintf(dbf_text,"ick1%4x",irq_ptr->schid.sch_no);
2874 QDIO_DBF_TEXT2(1,trace,dbf_text);
2875 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2876 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2877 QDIO_PRINT_ERR("received check condition on establish " \
2878 "queues on irq 0.%x.%x (cs=x%x, ds=x%x).\n",
2879 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2880 cstat,dstat);
2881 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ERR);
2882 }
2883
2884 if (!(dstat & DEV_STAT_DEV_END)) {
2885 QDIO_DBF_TEXT2(1,setup,"eq:no de");
2886 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2887 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
2888 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: didn't get "
2889 "device end: dstat=%02x, cstat=%02x\n",
2890 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2891 dstat, cstat);
2892 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2893 return 1;
2894 }
2895
2896 if (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END)) {
2897 QDIO_DBF_TEXT2(1,setup,"eq:badio");
2898 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2899 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
2900 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: got "
2901 "the following devstat: dstat=%02x, "
2902 "cstat=%02x\n", irq_ptr->schid.ssid,
2903 irq_ptr->schid.sch_no, dstat, cstat);
2904 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2905 return 1;
2906 }
2907 return 0;
2908 }
2909
2910 static void
2911 qdio_establish_handle_irq(struct ccw_device *cdev, int cstat, int dstat)
2912 {
2913 struct qdio_irq *irq_ptr;
2914 char dbf_text[15];
2915
2916 irq_ptr = cdev->private->qdio_data;
2917
2918 sprintf(dbf_text,"qehi%4x",cdev->private->schid.sch_no);
2919 QDIO_DBF_TEXT0(0,setup,dbf_text);
2920 QDIO_DBF_TEXT0(0,trace,dbf_text);
2921
2922 if (qdio_establish_irq_check_for_errors(cdev, cstat, dstat)) {
2923 ccw_device_set_timeout(cdev, 0);
2924 return;
2925 }
2926
2927 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ESTABLISHED);
2928 ccw_device_set_timeout(cdev, 0);
2929 }
2930
2931 int
2932 qdio_initialize(struct qdio_initialize *init_data)
2933 {
2934 int rc;
2935 char dbf_text[15];
2936
2937 sprintf(dbf_text,"qini%4x",init_data->cdev->private->schid.sch_no);
2938 QDIO_DBF_TEXT0(0,setup,dbf_text);
2939 QDIO_DBF_TEXT0(0,trace,dbf_text);
2940
2941 rc = qdio_allocate(init_data);
2942 if (rc == 0) {
2943 rc = qdio_establish(init_data);
2944 if (rc != 0)
2945 qdio_free(init_data->cdev);
2946 }
2947
2948 return rc;
2949 }
2950
2951
2952 int
2953 qdio_allocate(struct qdio_initialize *init_data)
2954 {
2955 struct qdio_irq *irq_ptr;
2956 char dbf_text[15];
2957
2958 sprintf(dbf_text,"qalc%4x",init_data->cdev->private->schid.sch_no);
2959 QDIO_DBF_TEXT0(0,setup,dbf_text);
2960 QDIO_DBF_TEXT0(0,trace,dbf_text);
2961 if ( (init_data->no_input_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2962 (init_data->no_output_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2963 ((init_data->no_input_qs) && (!init_data->input_handler)) ||
2964 ((init_data->no_output_qs) && (!init_data->output_handler)) )
2965 return -EINVAL;
2966
2967 if (!init_data->input_sbal_addr_array)
2968 return -EINVAL;
2969
2970 if (!init_data->output_sbal_addr_array)
2971 return -EINVAL;
2972
2973 qdio_allocate_do_dbf(init_data);
2974
2975 /* create irq */
2976 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
2977
2978 QDIO_DBF_TEXT0(0,setup,"irq_ptr:");
2979 QDIO_DBF_HEX0(0,setup,&irq_ptr,sizeof(void*));
2980
2981 if (!irq_ptr) {
2982 QDIO_PRINT_ERR("allocation of irq_ptr failed!\n");
2983 return -ENOMEM;
2984 }
2985
2986 init_MUTEX(&irq_ptr->setting_up_sema);
2987
2988 /* QDR must be in DMA area since CCW data address is only 32 bit */
2989 irq_ptr->qdr = (struct qdr *) __get_free_page(GFP_KERNEL | GFP_DMA);
2990 if (!(irq_ptr->qdr)) {
2991 free_page((unsigned long) irq_ptr);
2992 QDIO_PRINT_ERR("allocation of irq_ptr->qdr failed!\n");
2993 return -ENOMEM;
2994 }
2995 QDIO_DBF_TEXT0(0,setup,"qdr:");
2996 QDIO_DBF_HEX0(0,setup,&irq_ptr->qdr,sizeof(void*));
2997
2998 if (qdio_alloc_qs(irq_ptr,
2999 init_data->no_input_qs,
3000 init_data->no_output_qs)) {
3001 QDIO_PRINT_ERR("queue allocation failed!\n");
3002 qdio_release_irq_memory(irq_ptr);
3003 return -ENOMEM;
3004 }
3005
3006 init_data->cdev->private->qdio_data = irq_ptr;
3007
3008 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_INACTIVE);
3009
3010 return 0;
3011 }
3012
3013 static int qdio_fill_irq(struct qdio_initialize *init_data)
3014 {
3015 int i;
3016 char dbf_text[15];
3017 struct ciw *ciw;
3018 int is_iqdio;
3019 struct qdio_irq *irq_ptr;
3020
3021 irq_ptr = init_data->cdev->private->qdio_data;
3022
3023 memset(irq_ptr,0,((char*)&irq_ptr->qdr)-((char*)irq_ptr));
3024
3025 /* wipes qib.ac, required by ar7063 */
3026 memset(irq_ptr->qdr,0,sizeof(struct qdr));
3027
3028 irq_ptr->int_parm=init_data->int_parm;
3029
3030 irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev);
3031 irq_ptr->no_input_qs=init_data->no_input_qs;
3032 irq_ptr->no_output_qs=init_data->no_output_qs;
3033
3034 if (init_data->q_format==QDIO_IQDIO_QFMT) {
3035 irq_ptr->is_iqdio_irq=1;
3036 irq_ptr->is_thinint_irq=1;
3037 } else {
3038 irq_ptr->is_iqdio_irq=0;
3039 irq_ptr->is_thinint_irq=hydra_thinints;
3040 }
3041 sprintf(dbf_text,"is_i_t%1x%1x",
3042 irq_ptr->is_iqdio_irq,irq_ptr->is_thinint_irq);
3043 QDIO_DBF_TEXT2(0,setup,dbf_text);
3044
3045 if (irq_ptr->is_thinint_irq) {
3046 irq_ptr->dev_st_chg_ind = qdio_get_indicator();
3047 QDIO_DBF_HEX1(0,setup,&irq_ptr->dev_st_chg_ind,sizeof(void*));
3048 if (!irq_ptr->dev_st_chg_ind) {
3049 QDIO_PRINT_WARN("no indicator location available " \
3050 "for irq 0.%x.%x\n",
3051 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
3052 qdio_release_irq_memory(irq_ptr);
3053 return -ENOBUFS;
3054 }
3055 }
3056
3057 /* defaults */
3058 irq_ptr->equeue.cmd=DEFAULT_ESTABLISH_QS_CMD;
3059 irq_ptr->equeue.count=DEFAULT_ESTABLISH_QS_COUNT;
3060 irq_ptr->aqueue.cmd=DEFAULT_ACTIVATE_QS_CMD;
3061 irq_ptr->aqueue.count=DEFAULT_ACTIVATE_QS_COUNT;
3062
3063 qdio_fill_qs(irq_ptr, init_data->cdev,
3064 init_data->no_input_qs,
3065 init_data->no_output_qs,
3066 init_data->input_handler,
3067 init_data->output_handler,init_data->int_parm,
3068 init_data->q_format,init_data->flags,
3069 init_data->input_sbal_addr_array,
3070 init_data->output_sbal_addr_array);
3071
3072 if (!try_module_get(THIS_MODULE)) {
3073 QDIO_PRINT_CRIT("try_module_get() failed!\n");
3074 qdio_release_irq_memory(irq_ptr);
3075 return -EINVAL;
3076 }
3077
3078 qdio_fill_thresholds(irq_ptr,init_data->no_input_qs,
3079 init_data->no_output_qs,
3080 init_data->min_input_threshold,
3081 init_data->max_input_threshold,
3082 init_data->min_output_threshold,
3083 init_data->max_output_threshold);
3084
3085 /* fill in qdr */
3086 irq_ptr->qdr->qfmt=init_data->q_format;
3087 irq_ptr->qdr->iqdcnt=init_data->no_input_qs;
3088 irq_ptr->qdr->oqdcnt=init_data->no_output_qs;
3089 irq_ptr->qdr->iqdsz=sizeof(struct qdesfmt0)/4; /* size in words */
3090 irq_ptr->qdr->oqdsz=sizeof(struct qdesfmt0)/4;
3091
3092 irq_ptr->qdr->qiba=(unsigned long)&irq_ptr->qib;
3093 irq_ptr->qdr->qkey=QDIO_STORAGE_KEY;
3094
3095 /* fill in qib */
3096 irq_ptr->is_qebsm = is_passthrough;
3097 if (irq_ptr->is_qebsm)
3098 irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM;
3099
3100 irq_ptr->qib.qfmt=init_data->q_format;
3101 if (init_data->no_input_qs)
3102 irq_ptr->qib.isliba=(unsigned long)(irq_ptr->input_qs[0]->slib);
3103 if (init_data->no_output_qs)
3104 irq_ptr->qib.osliba=(unsigned long)(irq_ptr->output_qs[0]->slib);
3105 memcpy(irq_ptr->qib.ebcnam,init_data->adapter_name,8);
3106
3107 qdio_set_impl_params(irq_ptr,init_data->qib_param_field_format,
3108 init_data->qib_param_field,
3109 init_data->no_input_qs,
3110 init_data->no_output_qs,
3111 init_data->input_slib_elements,
3112 init_data->output_slib_elements);
3113
3114 /* first input descriptors, then output descriptors */
3115 is_iqdio = (init_data->q_format == QDIO_IQDIO_QFMT) ? 1 : 0;
3116 for (i=0;i<init_data->no_input_qs;i++)
3117 qdio_allocate_fill_input_desc(irq_ptr, i, is_iqdio);
3118
3119 for (i=0;i<init_data->no_output_qs;i++)
3120 qdio_allocate_fill_output_desc(irq_ptr, i,
3121 init_data->no_input_qs,
3122 is_iqdio);
3123
3124 /* qdr, qib, sls, slsbs, slibs, sbales filled. */
3125
3126 /* get qdio commands */
3127 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
3128 if (!ciw) {
3129 QDIO_DBF_TEXT2(1,setup,"no eq");
3130 QDIO_PRINT_INFO("No equeue CIW found for QDIO commands. "
3131 "Trying to use default.\n");
3132 } else
3133 irq_ptr->equeue = *ciw;
3134 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
3135 if (!ciw) {
3136 QDIO_DBF_TEXT2(1,setup,"no aq");
3137 QDIO_PRINT_INFO("No aqueue CIW found for QDIO commands. "
3138 "Trying to use default.\n");
3139 } else
3140 irq_ptr->aqueue = *ciw;
3141
3142 /* Set new interrupt handler. */
3143 irq_ptr->original_int_handler = init_data->cdev->handler;
3144 init_data->cdev->handler = qdio_handler;
3145
3146 return 0;
3147 }
3148
3149 int
3150 qdio_establish(struct qdio_initialize *init_data)
3151 {
3152 struct qdio_irq *irq_ptr;
3153 unsigned long saveflags;
3154 int result, result2;
3155 struct ccw_device *cdev;
3156 char dbf_text[20];
3157
3158 cdev=init_data->cdev;
3159 irq_ptr = cdev->private->qdio_data;
3160 if (!irq_ptr)
3161 return -EINVAL;
3162
3163 if (cdev->private->state != DEV_STATE_ONLINE)
3164 return -EINVAL;
3165
3166 down(&irq_ptr->setting_up_sema);
3167
3168 qdio_fill_irq(init_data);
3169
3170 /* the thinint CHSC stuff */
3171 if (irq_ptr->is_thinint_irq) {
3172
3173 result = tiqdio_set_subchannel_ind(irq_ptr,0);
3174 if (result) {
3175 up(&irq_ptr->setting_up_sema);
3176 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3177 return result;
3178 }
3179 tiqdio_set_delay_target(irq_ptr,TIQDIO_DELAY_TARGET);
3180 }
3181
3182 sprintf(dbf_text,"qest%4x",cdev->private->schid.sch_no);
3183 QDIO_DBF_TEXT0(0,setup,dbf_text);
3184 QDIO_DBF_TEXT0(0,trace,dbf_text);
3185
3186 /* establish q */
3187 irq_ptr->ccw.cmd_code=irq_ptr->equeue.cmd;
3188 irq_ptr->ccw.flags=CCW_FLAG_SLI;
3189 irq_ptr->ccw.count=irq_ptr->equeue.count;
3190 irq_ptr->ccw.cda=QDIO_GET_ADDR(irq_ptr->qdr);
3191
3192 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
3193
3194 ccw_device_set_options_mask(cdev, 0);
3195 result=ccw_device_start_timeout(cdev,&irq_ptr->ccw,
3196 QDIO_DOING_ESTABLISH,0, 0,
3197 QDIO_ESTABLISH_TIMEOUT);
3198 if (result) {
3199 result2=ccw_device_start_timeout(cdev,&irq_ptr->ccw,
3200 QDIO_DOING_ESTABLISH,0,0,
3201 QDIO_ESTABLISH_TIMEOUT);
3202 sprintf(dbf_text,"eq:io%4x",result);
3203 QDIO_DBF_TEXT2(1,setup,dbf_text);
3204 if (result2) {
3205 sprintf(dbf_text,"eq:io%4x",result);
3206 QDIO_DBF_TEXT2(1,setup,dbf_text);
3207 }
3208 QDIO_PRINT_WARN("establish queues on irq 0.%x.%04x: do_IO " \
3209 "returned %i, next try returned %i\n",
3210 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
3211 result, result2);
3212 result=result2;
3213 if (result)
3214 ccw_device_set_timeout(cdev, 0);
3215 }
3216
3217 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
3218
3219 if (result) {
3220 up(&irq_ptr->setting_up_sema);
3221 qdio_shutdown(cdev,QDIO_FLAG_CLEANUP_USING_CLEAR);
3222 return result;
3223 }
3224
3225 /* Timeout is cared for already by using ccw_device_start_timeout(). */
3226 wait_event_interruptible(cdev->private->wait_q,
3227 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
3228 irq_ptr->state == QDIO_IRQ_STATE_ERR);
3229
3230 if (irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED)
3231 result = 0;
3232 else {
3233 up(&irq_ptr->setting_up_sema);
3234 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3235 return -EIO;
3236 }
3237
3238 qdio_get_ssqd_information(irq_ptr);
3239 /* if this gets set once, we're running under VM and can omit SVSes */
3240 if (irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY)
3241 omit_svs=1;
3242
3243 sprintf(dbf_text,"qdioac%2x",irq_ptr->qdioac);
3244 QDIO_DBF_TEXT2(0,setup,dbf_text);
3245
3246 sprintf(dbf_text,"qib ac%2x",irq_ptr->qib.ac);
3247 QDIO_DBF_TEXT2(0,setup,dbf_text);
3248
3249 irq_ptr->hydra_gives_outbound_pcis=
3250 irq_ptr->qib.ac&QIB_AC_OUTBOUND_PCI_SUPPORTED;
3251 irq_ptr->sync_done_on_outb_pcis=
3252 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS;
3253
3254 qdio_initialize_set_siga_flags_input(irq_ptr);
3255 qdio_initialize_set_siga_flags_output(irq_ptr);
3256
3257 up(&irq_ptr->setting_up_sema);
3258
3259 return result;
3260
3261 }
3262
3263 int
3264 qdio_activate(struct ccw_device *cdev, int flags)
3265 {
3266 struct qdio_irq *irq_ptr;
3267 int i,result=0,result2;
3268 unsigned long saveflags;
3269 char dbf_text[20]; /* see qdio_initialize */
3270
3271 irq_ptr = cdev->private->qdio_data;
3272 if (!irq_ptr)
3273 return -ENODEV;
3274
3275 if (cdev->private->state != DEV_STATE_ONLINE)
3276 return -EINVAL;
3277
3278 down(&irq_ptr->setting_up_sema);
3279 if (irq_ptr->state==QDIO_IRQ_STATE_INACTIVE) {
3280 result=-EBUSY;
3281 goto out;
3282 }
3283
3284 sprintf(dbf_text,"qact%4x", irq_ptr->schid.sch_no);
3285 QDIO_DBF_TEXT2(0,setup,dbf_text);
3286 QDIO_DBF_TEXT2(0,trace,dbf_text);
3287
3288 /* activate q */
3289 irq_ptr->ccw.cmd_code=irq_ptr->aqueue.cmd;
3290 irq_ptr->ccw.flags=CCW_FLAG_SLI;
3291 irq_ptr->ccw.count=irq_ptr->aqueue.count;
3292 irq_ptr->ccw.cda=QDIO_GET_ADDR(0);
3293
3294 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
3295
3296 ccw_device_set_timeout(cdev, 0);
3297 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
3298 result=ccw_device_start(cdev,&irq_ptr->ccw,QDIO_DOING_ACTIVATE,
3299 0, DOIO_DENY_PREFETCH);
3300 if (result) {
3301 result2=ccw_device_start(cdev,&irq_ptr->ccw,
3302 QDIO_DOING_ACTIVATE,0,0);
3303 sprintf(dbf_text,"aq:io%4x",result);
3304 QDIO_DBF_TEXT2(1,setup,dbf_text);
3305 if (result2) {
3306 sprintf(dbf_text,"aq:io%4x",result);
3307 QDIO_DBF_TEXT2(1,setup,dbf_text);
3308 }
3309 QDIO_PRINT_WARN("activate queues on irq 0.%x.%04x: do_IO " \
3310 "returned %i, next try returned %i\n",
3311 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
3312 result, result2);
3313 result=result2;
3314 }
3315
3316 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
3317 if (result)
3318 goto out;
3319
3320 for (i=0;i<irq_ptr->no_input_qs;i++) {
3321 if (irq_ptr->is_thinint_irq) {
3322 /*
3323 * that way we know, that, if we will get interrupted
3324 * by tiqdio_inbound_processing, qdio_unmark_q will
3325 * not be called
3326 */
3327 qdio_reserve_q(irq_ptr->input_qs[i]);
3328 qdio_mark_tiq(irq_ptr->input_qs[i]);
3329 qdio_release_q(irq_ptr->input_qs[i]);
3330 }
3331 }
3332
3333 if (flags&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT) {
3334 for (i=0;i<irq_ptr->no_input_qs;i++) {
3335 irq_ptr->input_qs[i]->is_input_q|=
3336 QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT;
3337 }
3338 }
3339
3340 wait_event_interruptible_timeout(cdev->private->wait_q,
3341 ((irq_ptr->state ==
3342 QDIO_IRQ_STATE_STOPPED) ||
3343 (irq_ptr->state ==
3344 QDIO_IRQ_STATE_ERR)),
3345 QDIO_ACTIVATE_TIMEOUT);
3346
3347 switch (irq_ptr->state) {
3348 case QDIO_IRQ_STATE_STOPPED:
3349 case QDIO_IRQ_STATE_ERR:
3350 up(&irq_ptr->setting_up_sema);
3351 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3352 down(&irq_ptr->setting_up_sema);
3353 result = -EIO;
3354 break;
3355 default:
3356 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
3357 result = 0;
3358 }
3359 out:
3360 up(&irq_ptr->setting_up_sema);
3361
3362 return result;
3363 }
3364
3365 /* buffers filled forwards again to make Rick happy */
3366 static void
3367 qdio_do_qdio_fill_input(struct qdio_q *q, unsigned int qidx,
3368 unsigned int count, struct qdio_buffer *buffers)
3369 {
3370 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3371 int tmp = 0;
3372
3373 qidx &= (QDIO_MAX_BUFFERS_PER_Q - 1);
3374 if (irq->is_qebsm) {
3375 while (count) {
3376 tmp = set_slsb(q, &qidx, SLSB_CU_INPUT_EMPTY, &count);
3377 if (!tmp)
3378 return;
3379 }
3380 return;
3381 }
3382 for (;;) {
3383 set_slsb(q, &qidx, SLSB_CU_INPUT_EMPTY, &count);
3384 count--;
3385 if (!count) break;
3386 qidx = (qidx + 1) & (QDIO_MAX_BUFFERS_PER_Q - 1);
3387 }
3388 }
3389
3390 static void
3391 qdio_do_qdio_fill_output(struct qdio_q *q, unsigned int qidx,
3392 unsigned int count, struct qdio_buffer *buffers)
3393 {
3394 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3395 int tmp = 0;
3396
3397 qidx &= (QDIO_MAX_BUFFERS_PER_Q - 1);
3398 if (irq->is_qebsm) {
3399 while (count) {
3400 tmp = set_slsb(q, &qidx, SLSB_CU_OUTPUT_PRIMED, &count);
3401 if (!tmp)
3402 return;
3403 }
3404 return;
3405 }
3406
3407 for (;;) {
3408 set_slsb(q, &qidx, SLSB_CU_OUTPUT_PRIMED, &count);
3409 count--;
3410 if (!count) break;
3411 qidx = (qidx + 1) & (QDIO_MAX_BUFFERS_PER_Q - 1);
3412 }
3413 }
3414
3415 static void
3416 do_qdio_handle_inbound(struct qdio_q *q, unsigned int callflags,
3417 unsigned int qidx, unsigned int count,
3418 struct qdio_buffer *buffers)
3419 {
3420 int used_elements;
3421
3422 /* This is the inbound handling of queues */
3423 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3424
3425 qdio_do_qdio_fill_input(q,qidx,count,buffers);
3426
3427 if ((used_elements+count==QDIO_MAX_BUFFERS_PER_Q)&&
3428 (callflags&QDIO_FLAG_UNDER_INTERRUPT))
3429 atomic_xchg(&q->polling,0);
3430
3431 if (used_elements)
3432 return;
3433 if (callflags&QDIO_FLAG_DONT_SIGA)
3434 return;
3435 if (q->siga_in) {
3436 int result;
3437
3438 result=qdio_siga_input(q);
3439 if (result) {
3440 if (q->siga_error)
3441 q->error_status_flags|=
3442 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
3443 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
3444 q->siga_error=result;
3445 }
3446 }
3447
3448 qdio_mark_q(q);
3449 }
3450
3451 static void
3452 do_qdio_handle_outbound(struct qdio_q *q, unsigned int callflags,
3453 unsigned int qidx, unsigned int count,
3454 struct qdio_buffer *buffers)
3455 {
3456 int used_elements;
3457 unsigned int cnt, start_buf;
3458 unsigned char state = 0;
3459 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3460
3461 /* This is the outbound handling of queues */
3462 qdio_do_qdio_fill_output(q,qidx,count,buffers);
3463
3464 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3465
3466 if (callflags&QDIO_FLAG_DONT_SIGA) {
3467 qdio_perf_stat_inc(&perf_stats.outbound_cnt);
3468 return;
3469 }
3470 if (callflags & QDIO_FLAG_PCI_OUT)
3471 q->is_pci_out = 1;
3472 else
3473 q->is_pci_out = 0;
3474 if (q->is_iqdio_q) {
3475 /* one siga for every sbal */
3476 while (count--)
3477 qdio_kick_outbound_q(q);
3478
3479 __qdio_outbound_processing(q);
3480 } else {
3481 /* under VM, we do a SIGA sync unconditionally */
3482 SYNC_MEMORY;
3483 else {
3484 /*
3485 * w/o shadow queues (else branch of
3486 * SYNC_MEMORY :-/ ), we try to
3487 * fast-requeue buffers
3488 */
3489 if (irq->is_qebsm) {
3490 cnt = 1;
3491 start_buf = ((qidx+QDIO_MAX_BUFFERS_PER_Q-1) &
3492 (QDIO_MAX_BUFFERS_PER_Q-1));
3493 qdio_do_eqbs(q, &state, &start_buf, &cnt);
3494 } else
3495 state = q->slsb.acc.val[(qidx+QDIO_MAX_BUFFERS_PER_Q-1)
3496 &(QDIO_MAX_BUFFERS_PER_Q-1) ];
3497 if (state != SLSB_CU_OUTPUT_PRIMED) {
3498 qdio_kick_outbound_q(q);
3499 } else {
3500 QDIO_DBF_TEXT3(0,trace, "fast-req");
3501 qdio_perf_stat_inc(&perf_stats.fast_reqs);
3502 }
3503 }
3504 /*
3505 * only marking the q could take too long,
3506 * the upper layer module could do a lot of
3507 * traffic in that time
3508 */
3509 __qdio_outbound_processing(q);
3510 }
3511
3512 qdio_perf_stat_inc(&perf_stats.outbound_cnt);
3513 }
3514
3515 /* count must be 1 in iqdio */
3516 int
3517 do_QDIO(struct ccw_device *cdev,unsigned int callflags,
3518 unsigned int queue_number, unsigned int qidx,
3519 unsigned int count,struct qdio_buffer *buffers)
3520 {
3521 struct qdio_irq *irq_ptr;
3522 #ifdef CONFIG_QDIO_DEBUG
3523 char dbf_text[20];
3524
3525 sprintf(dbf_text,"doQD%04x",cdev->private->schid.sch_no);
3526 QDIO_DBF_TEXT3(0,trace,dbf_text);
3527 #endif /* CONFIG_QDIO_DEBUG */
3528
3529 if ( (qidx>QDIO_MAX_BUFFERS_PER_Q) ||
3530 (count>QDIO_MAX_BUFFERS_PER_Q) ||
3531 (queue_number>QDIO_MAX_QUEUES_PER_IRQ) )
3532 return -EINVAL;
3533
3534 if (count==0)
3535 return 0;
3536
3537 irq_ptr = cdev->private->qdio_data;
3538 if (!irq_ptr)
3539 return -ENODEV;
3540
3541 #ifdef CONFIG_QDIO_DEBUG
3542 if (callflags&QDIO_FLAG_SYNC_INPUT)
3543 QDIO_DBF_HEX3(0,trace,&irq_ptr->input_qs[queue_number],
3544 sizeof(void*));
3545 else
3546 QDIO_DBF_HEX3(0,trace,&irq_ptr->output_qs[queue_number],
3547 sizeof(void*));
3548 sprintf(dbf_text,"flag%04x",callflags);
3549 QDIO_DBF_TEXT3(0,trace,dbf_text);
3550 sprintf(dbf_text,"qi%02xct%02x",qidx,count);
3551 QDIO_DBF_TEXT3(0,trace,dbf_text);
3552 #endif /* CONFIG_QDIO_DEBUG */
3553
3554 if (irq_ptr->state!=QDIO_IRQ_STATE_ACTIVE)
3555 return -EBUSY;
3556
3557 if (callflags&QDIO_FLAG_SYNC_INPUT)
3558 do_qdio_handle_inbound(irq_ptr->input_qs[queue_number],
3559 callflags, qidx, count, buffers);
3560 else if (callflags&QDIO_FLAG_SYNC_OUTPUT)
3561 do_qdio_handle_outbound(irq_ptr->output_qs[queue_number],
3562 callflags, qidx, count, buffers);
3563 else {
3564 QDIO_DBF_TEXT3(1,trace,"doQD:inv");
3565 return -EINVAL;
3566 }
3567 return 0;
3568 }
3569
3570 static int
3571 qdio_perf_procfile_read(char *buffer, char **buffer_location, off_t offset,
3572 int buffer_length, int *eof, void *data)
3573 {
3574 int c=0;
3575
3576 /* we are always called with buffer_length=4k, so we all
3577 deliver on the first read */
3578 if (offset>0)
3579 return 0;
3580
3581 #define _OUTP_IT(x...) c+=sprintf(buffer+c,x)
3582 #ifdef CONFIG_64BIT
3583 _OUTP_IT("Number of tasklet runs (total) : %li\n",
3584 (long)atomic64_read(&perf_stats.tl_runs));
3585 _OUTP_IT("Inbound tasklet runs tried/retried : %li/%li\n",
3586 (long)atomic64_read(&perf_stats.inbound_tl_runs),
3587 (long)atomic64_read(&perf_stats.inbound_tl_runs_resched));
3588 _OUTP_IT("Inbound-thin tasklet runs tried/retried : %li/%li\n",
3589 (long)atomic64_read(&perf_stats.inbound_thin_tl_runs),
3590 (long)atomic64_read(&perf_stats.inbound_thin_tl_runs_resched));
3591 _OUTP_IT("Outbound tasklet runs tried/retried : %li/%li\n",
3592 (long)atomic64_read(&perf_stats.outbound_tl_runs),
3593 (long)atomic64_read(&perf_stats.outbound_tl_runs_resched));
3594 _OUTP_IT("\n");
3595 _OUTP_IT("Number of SIGA sync's issued : %li\n",
3596 (long)atomic64_read(&perf_stats.siga_syncs));
3597 _OUTP_IT("Number of SIGA in's issued : %li\n",
3598 (long)atomic64_read(&perf_stats.siga_ins));
3599 _OUTP_IT("Number of SIGA out's issued : %li\n",
3600 (long)atomic64_read(&perf_stats.siga_outs));
3601 _OUTP_IT("Number of PCIs caught : %li\n",
3602 (long)atomic64_read(&perf_stats.pcis));
3603 _OUTP_IT("Number of adapter interrupts caught : %li\n",
3604 (long)atomic64_read(&perf_stats.thinints));
3605 _OUTP_IT("Number of fast requeues (outg. SBALs w/o SIGA) : %li\n",
3606 (long)atomic64_read(&perf_stats.fast_reqs));
3607 _OUTP_IT("\n");
3608 _OUTP_IT("Number of inbound transfers : %li\n",
3609 (long)atomic64_read(&perf_stats.inbound_cnt));
3610 _OUTP_IT("Number of do_QDIOs outbound : %li\n",
3611 (long)atomic64_read(&perf_stats.outbound_cnt));
3612 #else /* CONFIG_64BIT */
3613 _OUTP_IT("Number of tasklet runs (total) : %i\n",
3614 atomic_read(&perf_stats.tl_runs));
3615 _OUTP_IT("Inbound tasklet runs tried/retried : %i/%i\n",
3616 atomic_read(&perf_stats.inbound_tl_runs),
3617 atomic_read(&perf_stats.inbound_tl_runs_resched));
3618 _OUTP_IT("Inbound-thin tasklet runs tried/retried : %i/%i\n",
3619 atomic_read(&perf_stats.inbound_thin_tl_runs),
3620 atomic_read(&perf_stats.inbound_thin_tl_runs_resched));
3621 _OUTP_IT("Outbound tasklet runs tried/retried : %i/%i\n",
3622 atomic_read(&perf_stats.outbound_tl_runs),
3623 atomic_read(&perf_stats.outbound_tl_runs_resched));
3624 _OUTP_IT("\n");
3625 _OUTP_IT("Number of SIGA sync's issued : %i\n",
3626 atomic_read(&perf_stats.siga_syncs));
3627 _OUTP_IT("Number of SIGA in's issued : %i\n",
3628 atomic_read(&perf_stats.siga_ins));
3629 _OUTP_IT("Number of SIGA out's issued : %i\n",
3630 atomic_read(&perf_stats.siga_outs));
3631 _OUTP_IT("Number of PCIs caught : %i\n",
3632 atomic_read(&perf_stats.pcis));
3633 _OUTP_IT("Number of adapter interrupts caught : %i\n",
3634 atomic_read(&perf_stats.thinints));
3635 _OUTP_IT("Number of fast requeues (outg. SBALs w/o SIGA) : %i\n",
3636 atomic_read(&perf_stats.fast_reqs));
3637 _OUTP_IT("\n");
3638 _OUTP_IT("Number of inbound transfers : %i\n",
3639 atomic_read(&perf_stats.inbound_cnt));
3640 _OUTP_IT("Number of do_QDIOs outbound : %i\n",
3641 atomic_read(&perf_stats.outbound_cnt));
3642 #endif /* CONFIG_64BIT */
3643 _OUTP_IT("\n");
3644
3645 return c;
3646 }
3647
3648 static struct proc_dir_entry *qdio_perf_proc_file;
3649
3650 static void
3651 qdio_add_procfs_entry(void)
3652 {
3653 proc_perf_file_registration=0;
3654 qdio_perf_proc_file=create_proc_entry(QDIO_PERF,
3655 S_IFREG|0444,&proc_root);
3656 if (qdio_perf_proc_file) {
3657 qdio_perf_proc_file->read_proc=&qdio_perf_procfile_read;
3658 } else proc_perf_file_registration=-1;
3659
3660 if (proc_perf_file_registration)
3661 QDIO_PRINT_WARN("was not able to register perf. " \
3662 "proc-file (%i).\n",
3663 proc_perf_file_registration);
3664 }
3665
3666 static void
3667 qdio_remove_procfs_entry(void)
3668 {
3669 if (!proc_perf_file_registration) /* means if it went ok earlier */
3670 remove_proc_entry(QDIO_PERF,&proc_root);
3671 }
3672
3673 /**
3674 * attributes in sysfs
3675 *****************************************************************************/
3676
3677 static ssize_t
3678 qdio_performance_stats_show(struct bus_type *bus, char *buf)
3679 {
3680 return sprintf(buf, "%i\n", qdio_performance_stats ? 1 : 0);
3681 }
3682
3683 static ssize_t
3684 qdio_performance_stats_store(struct bus_type *bus, const char *buf, size_t count)
3685 {
3686 char *tmp;
3687 int i;
3688
3689 i = simple_strtoul(buf, &tmp, 16);
3690 if ((i == 0) || (i == 1)) {
3691 if (i == qdio_performance_stats)
3692 return count;
3693 qdio_performance_stats = i;
3694 if (i==0) {
3695 /* reset perf. stat. info */
3696 #ifdef CONFIG_64BIT
3697 atomic64_set(&perf_stats.tl_runs, 0);
3698 atomic64_set(&perf_stats.outbound_tl_runs, 0);
3699 atomic64_set(&perf_stats.inbound_tl_runs, 0);
3700 atomic64_set(&perf_stats.inbound_tl_runs_resched, 0);
3701 atomic64_set(&perf_stats.inbound_thin_tl_runs, 0);
3702 atomic64_set(&perf_stats.inbound_thin_tl_runs_resched,
3703 0);
3704 atomic64_set(&perf_stats.siga_outs, 0);
3705 atomic64_set(&perf_stats.siga_ins, 0);
3706 atomic64_set(&perf_stats.siga_syncs, 0);
3707 atomic64_set(&perf_stats.pcis, 0);
3708 atomic64_set(&perf_stats.thinints, 0);
3709 atomic64_set(&perf_stats.fast_reqs, 0);
3710 atomic64_set(&perf_stats.outbound_cnt, 0);
3711 atomic64_set(&perf_stats.inbound_cnt, 0);
3712 #else /* CONFIG_64BIT */
3713 atomic_set(&perf_stats.tl_runs, 0);
3714 atomic_set(&perf_stats.outbound_tl_runs, 0);
3715 atomic_set(&perf_stats.inbound_tl_runs, 0);
3716 atomic_set(&perf_stats.inbound_tl_runs_resched, 0);
3717 atomic_set(&perf_stats.inbound_thin_tl_runs, 0);
3718 atomic_set(&perf_stats.inbound_thin_tl_runs_resched, 0);
3719 atomic_set(&perf_stats.siga_outs, 0);
3720 atomic_set(&perf_stats.siga_ins, 0);
3721 atomic_set(&perf_stats.siga_syncs, 0);
3722 atomic_set(&perf_stats.pcis, 0);
3723 atomic_set(&perf_stats.thinints, 0);
3724 atomic_set(&perf_stats.fast_reqs, 0);
3725 atomic_set(&perf_stats.outbound_cnt, 0);
3726 atomic_set(&perf_stats.inbound_cnt, 0);
3727 #endif /* CONFIG_64BIT */
3728 }
3729 } else {
3730 QDIO_PRINT_ERR("QDIO performance_stats: write 0 or 1 to this file!\n");
3731 return -EINVAL;
3732 }
3733 return count;
3734 }
3735
3736 static BUS_ATTR(qdio_performance_stats, 0644, qdio_performance_stats_show,
3737 qdio_performance_stats_store);
3738
3739 static void
3740 tiqdio_register_thinints(void)
3741 {
3742 char dbf_text[20];
3743 register_thinint_result=
3744 s390_register_adapter_interrupt(&tiqdio_thinint_handler);
3745 if (register_thinint_result) {
3746 sprintf(dbf_text,"regthn%x",(register_thinint_result&0xff));
3747 QDIO_DBF_TEXT0(0,setup,dbf_text);
3748 QDIO_PRINT_ERR("failed to register adapter handler " \
3749 "(rc=%i).\nAdapter interrupts might " \
3750 "not work. Continuing.\n",
3751 register_thinint_result);
3752 }
3753 }
3754
3755 static void
3756 tiqdio_unregister_thinints(void)
3757 {
3758 if (!register_thinint_result)
3759 s390_unregister_adapter_interrupt(&tiqdio_thinint_handler);
3760 }
3761
3762 static int
3763 qdio_get_qdio_memory(void)
3764 {
3765 int i;
3766 indicator_used[0]=1;
3767
3768 for (i=1;i<INDICATORS_PER_CACHELINE;i++)
3769 indicator_used[i]=0;
3770 indicators = kzalloc(sizeof(__u32)*(INDICATORS_PER_CACHELINE),
3771 GFP_KERNEL);
3772 if (!indicators)
3773 return -ENOMEM;
3774 return 0;
3775 }
3776
3777 static void
3778 qdio_release_qdio_memory(void)
3779 {
3780 kfree(indicators);
3781 }
3782
3783
3784 static void
3785 qdio_unregister_dbf_views(void)
3786 {
3787 if (qdio_dbf_setup)
3788 debug_unregister(qdio_dbf_setup);
3789 if (qdio_dbf_sbal)
3790 debug_unregister(qdio_dbf_sbal);
3791 if (qdio_dbf_sense)
3792 debug_unregister(qdio_dbf_sense);
3793 if (qdio_dbf_trace)
3794 debug_unregister(qdio_dbf_trace);
3795 #ifdef CONFIG_QDIO_DEBUG
3796 if (qdio_dbf_slsb_out)
3797 debug_unregister(qdio_dbf_slsb_out);
3798 if (qdio_dbf_slsb_in)
3799 debug_unregister(qdio_dbf_slsb_in);
3800 #endif /* CONFIG_QDIO_DEBUG */
3801 }
3802
3803 static int
3804 qdio_register_dbf_views(void)
3805 {
3806 qdio_dbf_setup=debug_register(QDIO_DBF_SETUP_NAME,
3807 QDIO_DBF_SETUP_PAGES,
3808 QDIO_DBF_SETUP_NR_AREAS,
3809 QDIO_DBF_SETUP_LEN);
3810 if (!qdio_dbf_setup)
3811 goto oom;
3812 debug_register_view(qdio_dbf_setup,&debug_hex_ascii_view);
3813 debug_set_level(qdio_dbf_setup,QDIO_DBF_SETUP_LEVEL);
3814
3815 qdio_dbf_sbal=debug_register(QDIO_DBF_SBAL_NAME,
3816 QDIO_DBF_SBAL_PAGES,
3817 QDIO_DBF_SBAL_NR_AREAS,
3818 QDIO_DBF_SBAL_LEN);
3819 if (!qdio_dbf_sbal)
3820 goto oom;
3821
3822 debug_register_view(qdio_dbf_sbal,&debug_hex_ascii_view);
3823 debug_set_level(qdio_dbf_sbal,QDIO_DBF_SBAL_LEVEL);
3824
3825 qdio_dbf_sense=debug_register(QDIO_DBF_SENSE_NAME,
3826 QDIO_DBF_SENSE_PAGES,
3827 QDIO_DBF_SENSE_NR_AREAS,
3828 QDIO_DBF_SENSE_LEN);
3829 if (!qdio_dbf_sense)
3830 goto oom;
3831
3832 debug_register_view(qdio_dbf_sense,&debug_hex_ascii_view);
3833 debug_set_level(qdio_dbf_sense,QDIO_DBF_SENSE_LEVEL);
3834
3835 qdio_dbf_trace=debug_register(QDIO_DBF_TRACE_NAME,
3836 QDIO_DBF_TRACE_PAGES,
3837 QDIO_DBF_TRACE_NR_AREAS,
3838 QDIO_DBF_TRACE_LEN);
3839 if (!qdio_dbf_trace)
3840 goto oom;
3841
3842 debug_register_view(qdio_dbf_trace,&debug_hex_ascii_view);
3843 debug_set_level(qdio_dbf_trace,QDIO_DBF_TRACE_LEVEL);
3844
3845 #ifdef CONFIG_QDIO_DEBUG
3846 qdio_dbf_slsb_out=debug_register(QDIO_DBF_SLSB_OUT_NAME,
3847 QDIO_DBF_SLSB_OUT_PAGES,
3848 QDIO_DBF_SLSB_OUT_NR_AREAS,
3849 QDIO_DBF_SLSB_OUT_LEN);
3850 if (!qdio_dbf_slsb_out)
3851 goto oom;
3852 debug_register_view(qdio_dbf_slsb_out,&debug_hex_ascii_view);
3853 debug_set_level(qdio_dbf_slsb_out,QDIO_DBF_SLSB_OUT_LEVEL);
3854
3855 qdio_dbf_slsb_in=debug_register(QDIO_DBF_SLSB_IN_NAME,
3856 QDIO_DBF_SLSB_IN_PAGES,
3857 QDIO_DBF_SLSB_IN_NR_AREAS,
3858 QDIO_DBF_SLSB_IN_LEN);
3859 if (!qdio_dbf_slsb_in)
3860 goto oom;
3861 debug_register_view(qdio_dbf_slsb_in,&debug_hex_ascii_view);
3862 debug_set_level(qdio_dbf_slsb_in,QDIO_DBF_SLSB_IN_LEVEL);
3863 #endif /* CONFIG_QDIO_DEBUG */
3864 return 0;
3865 oom:
3866 QDIO_PRINT_ERR("not enough memory for dbf.\n");
3867 qdio_unregister_dbf_views();
3868 return -ENOMEM;
3869 }
3870
3871 static void *qdio_mempool_alloc(gfp_t gfp_mask, void *size)
3872 {
3873 return (void *) get_zeroed_page(gfp_mask|GFP_DMA);
3874 }
3875
3876 static void qdio_mempool_free(void *element, void *size)
3877 {
3878 free_page((unsigned long) element);
3879 }
3880
3881 static int __init
3882 init_QDIO(void)
3883 {
3884 int res;
3885 void *ptr;
3886
3887 printk("qdio: loading %s\n",version);
3888
3889 res=qdio_get_qdio_memory();
3890 if (res)
3891 return res;
3892
3893 qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q),
3894 256, 0, NULL);
3895 if (!qdio_q_cache) {
3896 qdio_release_qdio_memory();
3897 return -ENOMEM;
3898 }
3899
3900 res = qdio_register_dbf_views();
3901 if (res) {
3902 kmem_cache_destroy(qdio_q_cache);
3903 qdio_release_qdio_memory();
3904 return res;
3905 }
3906
3907 QDIO_DBF_TEXT0(0,setup,"initQDIO");
3908 res = bus_create_file(&ccw_bus_type, &bus_attr_qdio_performance_stats);
3909
3910 memset((void*)&perf_stats,0,sizeof(perf_stats));
3911 QDIO_DBF_TEXT0(0,setup,"perfstat");
3912 ptr=&perf_stats;
3913 QDIO_DBF_HEX0(0,setup,&ptr,sizeof(void*));
3914
3915 qdio_add_procfs_entry();
3916
3917 qdio_mempool_scssc = mempool_create(QDIO_MEMPOOL_SCSSC_ELEMENTS,
3918 qdio_mempool_alloc,
3919 qdio_mempool_free, NULL);
3920
3921 if (tiqdio_check_chsc_availability())
3922 QDIO_PRINT_ERR("Not all CHSCs supported. Continuing.\n");
3923
3924 tiqdio_register_thinints();
3925
3926 return 0;
3927 }
3928
3929 static void __exit
3930 cleanup_QDIO(void)
3931 {
3932 tiqdio_unregister_thinints();
3933 qdio_remove_procfs_entry();
3934 qdio_release_qdio_memory();
3935 qdio_unregister_dbf_views();
3936 mempool_destroy(qdio_mempool_scssc);
3937 kmem_cache_destroy(qdio_q_cache);
3938 bus_remove_file(&ccw_bus_type, &bus_attr_qdio_performance_stats);
3939 printk("qdio: %s: module removed\n",version);
3940 }
3941
3942 module_init(init_QDIO);
3943 module_exit(cleanup_QDIO);
3944
3945 EXPORT_SYMBOL(qdio_allocate);
3946 EXPORT_SYMBOL(qdio_establish);
3947 EXPORT_SYMBOL(qdio_initialize);
3948 EXPORT_SYMBOL(qdio_activate);
3949 EXPORT_SYMBOL(do_QDIO);
3950 EXPORT_SYMBOL(qdio_shutdown);
3951 EXPORT_SYMBOL(qdio_free);
3952 EXPORT_SYMBOL(qdio_cleanup);
3953 EXPORT_SYMBOL(qdio_synchronize);
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