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[mirror_ubuntu-bionic-kernel.git] / drivers / s390 / net / qeth_core_main.c
1 /*
2 * Copyright IBM Corp. 2007, 2009
3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
9 #define KMSG_COMPONENT "qeth"
10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/string.h>
15 #include <linux/errno.h>
16 #include <linux/kernel.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/mii.h>
20 #include <linux/kthread.h>
21 #include <linux/slab.h>
22 #include <net/iucv/af_iucv.h>
23
24 #include <asm/ebcdic.h>
25 #include <asm/io.h>
26 #include <asm/sysinfo.h>
27 #include <asm/compat.h>
28
29 #include "qeth_core.h"
30
31 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
32 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
33 /* N P A M L V H */
34 [QETH_DBF_SETUP] = {"qeth_setup",
35 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_MSG] = {"qeth_msg",
37 8, 1, 128, 3, &debug_sprintf_view, NULL},
38 [QETH_DBF_CTRL] = {"qeth_control",
39 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
40 };
41 EXPORT_SYMBOL_GPL(qeth_dbf);
42
43 struct qeth_card_list_struct qeth_core_card_list;
44 EXPORT_SYMBOL_GPL(qeth_core_card_list);
45 struct kmem_cache *qeth_core_header_cache;
46 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
47 static struct kmem_cache *qeth_qdio_outbuf_cache;
48
49 static struct device *qeth_core_root_dev;
50 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
51 static struct lock_class_key qdio_out_skb_queue_key;
52 static struct mutex qeth_mod_mutex;
53
54 static void qeth_send_control_data_cb(struct qeth_channel *,
55 struct qeth_cmd_buffer *);
56 static int qeth_issue_next_read(struct qeth_card *);
57 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
58 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
59 static void qeth_free_buffer_pool(struct qeth_card *);
60 static int qeth_qdio_establish(struct qeth_card *);
61 static void qeth_free_qdio_buffers(struct qeth_card *);
62 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
63 struct qeth_qdio_out_buffer *buf,
64 enum iucv_tx_notify notification);
65 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
66 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
67 struct qeth_qdio_out_buffer *buf,
68 enum qeth_qdio_buffer_states newbufstate);
69 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
70
71 static inline const char *qeth_get_cardname(struct qeth_card *card)
72 {
73 if (card->info.guestlan) {
74 switch (card->info.type) {
75 case QETH_CARD_TYPE_OSD:
76 return " Guest LAN QDIO";
77 case QETH_CARD_TYPE_IQD:
78 return " Guest LAN Hiper";
79 case QETH_CARD_TYPE_OSM:
80 return " Guest LAN QDIO - OSM";
81 case QETH_CARD_TYPE_OSX:
82 return " Guest LAN QDIO - OSX";
83 default:
84 return " unknown";
85 }
86 } else {
87 switch (card->info.type) {
88 case QETH_CARD_TYPE_OSD:
89 return " OSD Express";
90 case QETH_CARD_TYPE_IQD:
91 return " HiperSockets";
92 case QETH_CARD_TYPE_OSN:
93 return " OSN QDIO";
94 case QETH_CARD_TYPE_OSM:
95 return " OSM QDIO";
96 case QETH_CARD_TYPE_OSX:
97 return " OSX QDIO";
98 default:
99 return " unknown";
100 }
101 }
102 return " n/a";
103 }
104
105 /* max length to be returned: 14 */
106 const char *qeth_get_cardname_short(struct qeth_card *card)
107 {
108 if (card->info.guestlan) {
109 switch (card->info.type) {
110 case QETH_CARD_TYPE_OSD:
111 return "GuestLAN QDIO";
112 case QETH_CARD_TYPE_IQD:
113 return "GuestLAN Hiper";
114 case QETH_CARD_TYPE_OSM:
115 return "GuestLAN OSM";
116 case QETH_CARD_TYPE_OSX:
117 return "GuestLAN OSX";
118 default:
119 return "unknown";
120 }
121 } else {
122 switch (card->info.type) {
123 case QETH_CARD_TYPE_OSD:
124 switch (card->info.link_type) {
125 case QETH_LINK_TYPE_FAST_ETH:
126 return "OSD_100";
127 case QETH_LINK_TYPE_HSTR:
128 return "HSTR";
129 case QETH_LINK_TYPE_GBIT_ETH:
130 return "OSD_1000";
131 case QETH_LINK_TYPE_10GBIT_ETH:
132 return "OSD_10GIG";
133 case QETH_LINK_TYPE_LANE_ETH100:
134 return "OSD_FE_LANE";
135 case QETH_LINK_TYPE_LANE_TR:
136 return "OSD_TR_LANE";
137 case QETH_LINK_TYPE_LANE_ETH1000:
138 return "OSD_GbE_LANE";
139 case QETH_LINK_TYPE_LANE:
140 return "OSD_ATM_LANE";
141 default:
142 return "OSD_Express";
143 }
144 case QETH_CARD_TYPE_IQD:
145 return "HiperSockets";
146 case QETH_CARD_TYPE_OSN:
147 return "OSN";
148 case QETH_CARD_TYPE_OSM:
149 return "OSM_1000";
150 case QETH_CARD_TYPE_OSX:
151 return "OSX_10GIG";
152 default:
153 return "unknown";
154 }
155 }
156 return "n/a";
157 }
158
159 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
160 int clear_start_mask)
161 {
162 unsigned long flags;
163
164 spin_lock_irqsave(&card->thread_mask_lock, flags);
165 card->thread_allowed_mask = threads;
166 if (clear_start_mask)
167 card->thread_start_mask &= threads;
168 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
169 wake_up(&card->wait_q);
170 }
171 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
172
173 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
174 {
175 unsigned long flags;
176 int rc = 0;
177
178 spin_lock_irqsave(&card->thread_mask_lock, flags);
179 rc = (card->thread_running_mask & threads);
180 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
181 return rc;
182 }
183 EXPORT_SYMBOL_GPL(qeth_threads_running);
184
185 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
186 {
187 return wait_event_interruptible(card->wait_q,
188 qeth_threads_running(card, threads) == 0);
189 }
190 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
191
192 void qeth_clear_working_pool_list(struct qeth_card *card)
193 {
194 struct qeth_buffer_pool_entry *pool_entry, *tmp;
195
196 QETH_CARD_TEXT(card, 5, "clwrklst");
197 list_for_each_entry_safe(pool_entry, tmp,
198 &card->qdio.in_buf_pool.entry_list, list){
199 list_del(&pool_entry->list);
200 }
201 }
202 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
203
204 static int qeth_alloc_buffer_pool(struct qeth_card *card)
205 {
206 struct qeth_buffer_pool_entry *pool_entry;
207 void *ptr;
208 int i, j;
209
210 QETH_CARD_TEXT(card, 5, "alocpool");
211 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
212 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
213 if (!pool_entry) {
214 qeth_free_buffer_pool(card);
215 return -ENOMEM;
216 }
217 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
218 ptr = (void *) __get_free_page(GFP_KERNEL);
219 if (!ptr) {
220 while (j > 0)
221 free_page((unsigned long)
222 pool_entry->elements[--j]);
223 kfree(pool_entry);
224 qeth_free_buffer_pool(card);
225 return -ENOMEM;
226 }
227 pool_entry->elements[j] = ptr;
228 }
229 list_add(&pool_entry->init_list,
230 &card->qdio.init_pool.entry_list);
231 }
232 return 0;
233 }
234
235 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
236 {
237 QETH_CARD_TEXT(card, 2, "realcbp");
238
239 if ((card->state != CARD_STATE_DOWN) &&
240 (card->state != CARD_STATE_RECOVER))
241 return -EPERM;
242
243 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
244 qeth_clear_working_pool_list(card);
245 qeth_free_buffer_pool(card);
246 card->qdio.in_buf_pool.buf_count = bufcnt;
247 card->qdio.init_pool.buf_count = bufcnt;
248 return qeth_alloc_buffer_pool(card);
249 }
250 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
251
252 static inline int qeth_cq_init(struct qeth_card *card)
253 {
254 int rc;
255
256 if (card->options.cq == QETH_CQ_ENABLED) {
257 QETH_DBF_TEXT(SETUP, 2, "cqinit");
258 memset(card->qdio.c_q->qdio_bufs, 0,
259 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
260 card->qdio.c_q->next_buf_to_init = 127;
261 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
262 card->qdio.no_in_queues - 1, 0,
263 127);
264 if (rc) {
265 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
266 goto out;
267 }
268 }
269 rc = 0;
270 out:
271 return rc;
272 }
273
274 static inline int qeth_alloc_cq(struct qeth_card *card)
275 {
276 int rc;
277
278 if (card->options.cq == QETH_CQ_ENABLED) {
279 int i;
280 struct qdio_outbuf_state *outbuf_states;
281
282 QETH_DBF_TEXT(SETUP, 2, "cqon");
283 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
284 GFP_KERNEL);
285 if (!card->qdio.c_q) {
286 rc = -1;
287 goto kmsg_out;
288 }
289 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
290
291 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
292 card->qdio.c_q->bufs[i].buffer =
293 &card->qdio.c_q->qdio_bufs[i];
294 }
295
296 card->qdio.no_in_queues = 2;
297
298 card->qdio.out_bufstates = (struct qdio_outbuf_state *)
299 kzalloc(card->qdio.no_out_queues *
300 QDIO_MAX_BUFFERS_PER_Q *
301 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
302 outbuf_states = card->qdio.out_bufstates;
303 if (outbuf_states == NULL) {
304 rc = -1;
305 goto free_cq_out;
306 }
307 for (i = 0; i < card->qdio.no_out_queues; ++i) {
308 card->qdio.out_qs[i]->bufstates = outbuf_states;
309 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
310 }
311 } else {
312 QETH_DBF_TEXT(SETUP, 2, "nocq");
313 card->qdio.c_q = NULL;
314 card->qdio.no_in_queues = 1;
315 }
316 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
317 rc = 0;
318 out:
319 return rc;
320 free_cq_out:
321 kfree(card->qdio.c_q);
322 card->qdio.c_q = NULL;
323 kmsg_out:
324 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
325 goto out;
326 }
327
328 static inline void qeth_free_cq(struct qeth_card *card)
329 {
330 if (card->qdio.c_q) {
331 --card->qdio.no_in_queues;
332 kfree(card->qdio.c_q);
333 card->qdio.c_q = NULL;
334 }
335 kfree(card->qdio.out_bufstates);
336 card->qdio.out_bufstates = NULL;
337 }
338
339 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
340 int delayed) {
341 enum iucv_tx_notify n;
342
343 switch (sbalf15) {
344 case 0:
345 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
346 break;
347 case 4:
348 case 16:
349 case 17:
350 case 18:
351 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
352 TX_NOTIFY_UNREACHABLE;
353 break;
354 default:
355 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
356 TX_NOTIFY_GENERALERROR;
357 break;
358 }
359
360 return n;
361 }
362
363 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
364 int bidx, int forced_cleanup)
365 {
366 if (q->card->options.cq != QETH_CQ_ENABLED)
367 return;
368
369 if (q->bufs[bidx]->next_pending != NULL) {
370 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
371 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
372
373 while (c) {
374 if (forced_cleanup ||
375 atomic_read(&c->state) ==
376 QETH_QDIO_BUF_HANDLED_DELAYED) {
377 struct qeth_qdio_out_buffer *f = c;
378 QETH_CARD_TEXT(f->q->card, 5, "fp");
379 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
380 /* release here to avoid interleaving between
381 outbound tasklet and inbound tasklet
382 regarding notifications and lifecycle */
383 qeth_release_skbs(c);
384
385 c = f->next_pending;
386 BUG_ON(head->next_pending != f);
387 head->next_pending = c;
388 kmem_cache_free(qeth_qdio_outbuf_cache, f);
389 } else {
390 head = c;
391 c = c->next_pending;
392 }
393
394 }
395 }
396 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
397 QETH_QDIO_BUF_HANDLED_DELAYED)) {
398 /* for recovery situations */
399 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
400 qeth_init_qdio_out_buf(q, bidx);
401 QETH_CARD_TEXT(q->card, 2, "clprecov");
402 }
403 }
404
405
406 static inline void qeth_qdio_handle_aob(struct qeth_card *card,
407 unsigned long phys_aob_addr) {
408 struct qaob *aob;
409 struct qeth_qdio_out_buffer *buffer;
410 enum iucv_tx_notify notification;
411
412 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
413 QETH_CARD_TEXT(card, 5, "haob");
414 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
415 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
416 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
417
418 BUG_ON(buffer == NULL);
419
420 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
421 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
422 notification = TX_NOTIFY_OK;
423 } else {
424 BUG_ON(atomic_read(&buffer->state) != QETH_QDIO_BUF_PENDING);
425 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
426 notification = TX_NOTIFY_DELAYED_OK;
427 }
428
429 if (aob->aorc != 0) {
430 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
431 notification = qeth_compute_cq_notification(aob->aorc, 1);
432 }
433 qeth_notify_skbs(buffer->q, buffer, notification);
434
435 buffer->aob = NULL;
436 qeth_clear_output_buffer(buffer->q, buffer,
437 QETH_QDIO_BUF_HANDLED_DELAYED);
438
439 /* from here on: do not touch buffer anymore */
440 qdio_release_aob(aob);
441 }
442
443 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
444 {
445 return card->options.cq == QETH_CQ_ENABLED &&
446 card->qdio.c_q != NULL &&
447 queue != 0 &&
448 queue == card->qdio.no_in_queues - 1;
449 }
450
451
452 static int qeth_issue_next_read(struct qeth_card *card)
453 {
454 int rc;
455 struct qeth_cmd_buffer *iob;
456
457 QETH_CARD_TEXT(card, 5, "issnxrd");
458 if (card->read.state != CH_STATE_UP)
459 return -EIO;
460 iob = qeth_get_buffer(&card->read);
461 if (!iob) {
462 dev_warn(&card->gdev->dev, "The qeth device driver "
463 "failed to recover an error on the device\n");
464 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
465 "available\n", dev_name(&card->gdev->dev));
466 return -ENOMEM;
467 }
468 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
469 QETH_CARD_TEXT(card, 6, "noirqpnd");
470 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
471 (addr_t) iob, 0, 0);
472 if (rc) {
473 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
474 "rc=%i\n", dev_name(&card->gdev->dev), rc);
475 atomic_set(&card->read.irq_pending, 0);
476 card->read_or_write_problem = 1;
477 qeth_schedule_recovery(card);
478 wake_up(&card->wait_q);
479 }
480 return rc;
481 }
482
483 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
484 {
485 struct qeth_reply *reply;
486
487 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
488 if (reply) {
489 atomic_set(&reply->refcnt, 1);
490 atomic_set(&reply->received, 0);
491 reply->card = card;
492 }
493 return reply;
494 }
495
496 static void qeth_get_reply(struct qeth_reply *reply)
497 {
498 WARN_ON(atomic_read(&reply->refcnt) <= 0);
499 atomic_inc(&reply->refcnt);
500 }
501
502 static void qeth_put_reply(struct qeth_reply *reply)
503 {
504 WARN_ON(atomic_read(&reply->refcnt) <= 0);
505 if (atomic_dec_and_test(&reply->refcnt))
506 kfree(reply);
507 }
508
509 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
510 struct qeth_card *card)
511 {
512 char *ipa_name;
513 int com = cmd->hdr.command;
514 ipa_name = qeth_get_ipa_cmd_name(com);
515 if (rc)
516 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
517 "x%X \"%s\"\n",
518 ipa_name, com, dev_name(&card->gdev->dev),
519 QETH_CARD_IFNAME(card), rc,
520 qeth_get_ipa_msg(rc));
521 else
522 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
523 ipa_name, com, dev_name(&card->gdev->dev),
524 QETH_CARD_IFNAME(card));
525 }
526
527 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
528 struct qeth_cmd_buffer *iob)
529 {
530 struct qeth_ipa_cmd *cmd = NULL;
531
532 QETH_CARD_TEXT(card, 5, "chkipad");
533 if (IS_IPA(iob->data)) {
534 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
535 if (IS_IPA_REPLY(cmd)) {
536 if (cmd->hdr.command != IPA_CMD_SETCCID &&
537 cmd->hdr.command != IPA_CMD_DELCCID &&
538 cmd->hdr.command != IPA_CMD_MODCCID &&
539 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
540 qeth_issue_ipa_msg(cmd,
541 cmd->hdr.return_code, card);
542 return cmd;
543 } else {
544 switch (cmd->hdr.command) {
545 case IPA_CMD_STOPLAN:
546 dev_warn(&card->gdev->dev,
547 "The link for interface %s on CHPID"
548 " 0x%X failed\n",
549 QETH_CARD_IFNAME(card),
550 card->info.chpid);
551 card->lan_online = 0;
552 if (card->dev && netif_carrier_ok(card->dev))
553 netif_carrier_off(card->dev);
554 return NULL;
555 case IPA_CMD_STARTLAN:
556 dev_info(&card->gdev->dev,
557 "The link for %s on CHPID 0x%X has"
558 " been restored\n",
559 QETH_CARD_IFNAME(card),
560 card->info.chpid);
561 netif_carrier_on(card->dev);
562 card->lan_online = 1;
563 if (card->info.hwtrap)
564 card->info.hwtrap = 2;
565 qeth_schedule_recovery(card);
566 return NULL;
567 case IPA_CMD_MODCCID:
568 return cmd;
569 case IPA_CMD_REGISTER_LOCAL_ADDR:
570 QETH_CARD_TEXT(card, 3, "irla");
571 break;
572 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
573 QETH_CARD_TEXT(card, 3, "urla");
574 break;
575 default:
576 QETH_DBF_MESSAGE(2, "Received data is IPA "
577 "but not a reply!\n");
578 break;
579 }
580 }
581 }
582 return cmd;
583 }
584
585 void qeth_clear_ipacmd_list(struct qeth_card *card)
586 {
587 struct qeth_reply *reply, *r;
588 unsigned long flags;
589
590 QETH_CARD_TEXT(card, 4, "clipalst");
591
592 spin_lock_irqsave(&card->lock, flags);
593 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
594 qeth_get_reply(reply);
595 reply->rc = -EIO;
596 atomic_inc(&reply->received);
597 list_del_init(&reply->list);
598 wake_up(&reply->wait_q);
599 qeth_put_reply(reply);
600 }
601 spin_unlock_irqrestore(&card->lock, flags);
602 atomic_set(&card->write.irq_pending, 0);
603 }
604 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
605
606 static int qeth_check_idx_response(struct qeth_card *card,
607 unsigned char *buffer)
608 {
609 if (!buffer)
610 return 0;
611
612 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
613 if ((buffer[2] & 0xc0) == 0xc0) {
614 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
615 "with cause code 0x%02x%s\n",
616 buffer[4],
617 ((buffer[4] == 0x22) ?
618 " -- try another portname" : ""));
619 QETH_CARD_TEXT(card, 2, "ckidxres");
620 QETH_CARD_TEXT(card, 2, " idxterm");
621 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
622 if (buffer[4] == 0xf6) {
623 dev_err(&card->gdev->dev,
624 "The qeth device is not configured "
625 "for the OSI layer required by z/VM\n");
626 return -EPERM;
627 }
628 return -EIO;
629 }
630 return 0;
631 }
632
633 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
634 __u32 len)
635 {
636 struct qeth_card *card;
637
638 card = CARD_FROM_CDEV(channel->ccwdev);
639 QETH_CARD_TEXT(card, 4, "setupccw");
640 if (channel == &card->read)
641 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
642 else
643 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
644 channel->ccw.count = len;
645 channel->ccw.cda = (__u32) __pa(iob);
646 }
647
648 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
649 {
650 __u8 index;
651
652 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
653 index = channel->io_buf_no;
654 do {
655 if (channel->iob[index].state == BUF_STATE_FREE) {
656 channel->iob[index].state = BUF_STATE_LOCKED;
657 channel->io_buf_no = (channel->io_buf_no + 1) %
658 QETH_CMD_BUFFER_NO;
659 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
660 return channel->iob + index;
661 }
662 index = (index + 1) % QETH_CMD_BUFFER_NO;
663 } while (index != channel->io_buf_no);
664
665 return NULL;
666 }
667
668 void qeth_release_buffer(struct qeth_channel *channel,
669 struct qeth_cmd_buffer *iob)
670 {
671 unsigned long flags;
672
673 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
674 spin_lock_irqsave(&channel->iob_lock, flags);
675 memset(iob->data, 0, QETH_BUFSIZE);
676 iob->state = BUF_STATE_FREE;
677 iob->callback = qeth_send_control_data_cb;
678 iob->rc = 0;
679 spin_unlock_irqrestore(&channel->iob_lock, flags);
680 wake_up(&channel->wait_q);
681 }
682 EXPORT_SYMBOL_GPL(qeth_release_buffer);
683
684 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
685 {
686 struct qeth_cmd_buffer *buffer = NULL;
687 unsigned long flags;
688
689 spin_lock_irqsave(&channel->iob_lock, flags);
690 buffer = __qeth_get_buffer(channel);
691 spin_unlock_irqrestore(&channel->iob_lock, flags);
692 return buffer;
693 }
694
695 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
696 {
697 struct qeth_cmd_buffer *buffer;
698 wait_event(channel->wait_q,
699 ((buffer = qeth_get_buffer(channel)) != NULL));
700 return buffer;
701 }
702 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
703
704 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
705 {
706 int cnt;
707
708 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
709 qeth_release_buffer(channel, &channel->iob[cnt]);
710 channel->buf_no = 0;
711 channel->io_buf_no = 0;
712 }
713 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
714
715 static void qeth_send_control_data_cb(struct qeth_channel *channel,
716 struct qeth_cmd_buffer *iob)
717 {
718 struct qeth_card *card;
719 struct qeth_reply *reply, *r;
720 struct qeth_ipa_cmd *cmd;
721 unsigned long flags;
722 int keep_reply;
723 int rc = 0;
724
725 card = CARD_FROM_CDEV(channel->ccwdev);
726 QETH_CARD_TEXT(card, 4, "sndctlcb");
727 rc = qeth_check_idx_response(card, iob->data);
728 switch (rc) {
729 case 0:
730 break;
731 case -EIO:
732 qeth_clear_ipacmd_list(card);
733 qeth_schedule_recovery(card);
734 /* fall through */
735 default:
736 goto out;
737 }
738
739 cmd = qeth_check_ipa_data(card, iob);
740 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
741 goto out;
742 /*in case of OSN : check if cmd is set */
743 if (card->info.type == QETH_CARD_TYPE_OSN &&
744 cmd &&
745 cmd->hdr.command != IPA_CMD_STARTLAN &&
746 card->osn_info.assist_cb != NULL) {
747 card->osn_info.assist_cb(card->dev, cmd);
748 goto out;
749 }
750
751 spin_lock_irqsave(&card->lock, flags);
752 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
753 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
754 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
755 qeth_get_reply(reply);
756 list_del_init(&reply->list);
757 spin_unlock_irqrestore(&card->lock, flags);
758 keep_reply = 0;
759 if (reply->callback != NULL) {
760 if (cmd) {
761 reply->offset = (__u16)((char *)cmd -
762 (char *)iob->data);
763 keep_reply = reply->callback(card,
764 reply,
765 (unsigned long)cmd);
766 } else
767 keep_reply = reply->callback(card,
768 reply,
769 (unsigned long)iob);
770 }
771 if (cmd)
772 reply->rc = (u16) cmd->hdr.return_code;
773 else if (iob->rc)
774 reply->rc = iob->rc;
775 if (keep_reply) {
776 spin_lock_irqsave(&card->lock, flags);
777 list_add_tail(&reply->list,
778 &card->cmd_waiter_list);
779 spin_unlock_irqrestore(&card->lock, flags);
780 } else {
781 atomic_inc(&reply->received);
782 wake_up(&reply->wait_q);
783 }
784 qeth_put_reply(reply);
785 goto out;
786 }
787 }
788 spin_unlock_irqrestore(&card->lock, flags);
789 out:
790 memcpy(&card->seqno.pdu_hdr_ack,
791 QETH_PDU_HEADER_SEQ_NO(iob->data),
792 QETH_SEQ_NO_LENGTH);
793 qeth_release_buffer(channel, iob);
794 }
795
796 static int qeth_setup_channel(struct qeth_channel *channel)
797 {
798 int cnt;
799
800 QETH_DBF_TEXT(SETUP, 2, "setupch");
801 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
802 channel->iob[cnt].data =
803 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
804 if (channel->iob[cnt].data == NULL)
805 break;
806 channel->iob[cnt].state = BUF_STATE_FREE;
807 channel->iob[cnt].channel = channel;
808 channel->iob[cnt].callback = qeth_send_control_data_cb;
809 channel->iob[cnt].rc = 0;
810 }
811 if (cnt < QETH_CMD_BUFFER_NO) {
812 while (cnt-- > 0)
813 kfree(channel->iob[cnt].data);
814 return -ENOMEM;
815 }
816 channel->buf_no = 0;
817 channel->io_buf_no = 0;
818 atomic_set(&channel->irq_pending, 0);
819 spin_lock_init(&channel->iob_lock);
820
821 init_waitqueue_head(&channel->wait_q);
822 return 0;
823 }
824
825 static int qeth_set_thread_start_bit(struct qeth_card *card,
826 unsigned long thread)
827 {
828 unsigned long flags;
829
830 spin_lock_irqsave(&card->thread_mask_lock, flags);
831 if (!(card->thread_allowed_mask & thread) ||
832 (card->thread_start_mask & thread)) {
833 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
834 return -EPERM;
835 }
836 card->thread_start_mask |= thread;
837 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
838 return 0;
839 }
840
841 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
842 {
843 unsigned long flags;
844
845 spin_lock_irqsave(&card->thread_mask_lock, flags);
846 card->thread_start_mask &= ~thread;
847 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
848 wake_up(&card->wait_q);
849 }
850 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
851
852 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
853 {
854 unsigned long flags;
855
856 spin_lock_irqsave(&card->thread_mask_lock, flags);
857 card->thread_running_mask &= ~thread;
858 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
859 wake_up(&card->wait_q);
860 }
861 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
862
863 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
864 {
865 unsigned long flags;
866 int rc = 0;
867
868 spin_lock_irqsave(&card->thread_mask_lock, flags);
869 if (card->thread_start_mask & thread) {
870 if ((card->thread_allowed_mask & thread) &&
871 !(card->thread_running_mask & thread)) {
872 rc = 1;
873 card->thread_start_mask &= ~thread;
874 card->thread_running_mask |= thread;
875 } else
876 rc = -EPERM;
877 }
878 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
879 return rc;
880 }
881
882 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
883 {
884 int rc = 0;
885
886 wait_event(card->wait_q,
887 (rc = __qeth_do_run_thread(card, thread)) >= 0);
888 return rc;
889 }
890 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
891
892 void qeth_schedule_recovery(struct qeth_card *card)
893 {
894 QETH_CARD_TEXT(card, 2, "startrec");
895 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
896 schedule_work(&card->kernel_thread_starter);
897 }
898 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
899
900 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
901 {
902 int dstat, cstat;
903 char *sense;
904 struct qeth_card *card;
905
906 sense = (char *) irb->ecw;
907 cstat = irb->scsw.cmd.cstat;
908 dstat = irb->scsw.cmd.dstat;
909 card = CARD_FROM_CDEV(cdev);
910
911 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
912 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
913 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
914 QETH_CARD_TEXT(card, 2, "CGENCHK");
915 dev_warn(&cdev->dev, "The qeth device driver "
916 "failed to recover an error on the device\n");
917 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
918 dev_name(&cdev->dev), dstat, cstat);
919 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
920 16, 1, irb, 64, 1);
921 return 1;
922 }
923
924 if (dstat & DEV_STAT_UNIT_CHECK) {
925 if (sense[SENSE_RESETTING_EVENT_BYTE] &
926 SENSE_RESETTING_EVENT_FLAG) {
927 QETH_CARD_TEXT(card, 2, "REVIND");
928 return 1;
929 }
930 if (sense[SENSE_COMMAND_REJECT_BYTE] &
931 SENSE_COMMAND_REJECT_FLAG) {
932 QETH_CARD_TEXT(card, 2, "CMDREJi");
933 return 1;
934 }
935 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
936 QETH_CARD_TEXT(card, 2, "AFFE");
937 return 1;
938 }
939 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
940 QETH_CARD_TEXT(card, 2, "ZEROSEN");
941 return 0;
942 }
943 QETH_CARD_TEXT(card, 2, "DGENCHK");
944 return 1;
945 }
946 return 0;
947 }
948
949 static long __qeth_check_irb_error(struct ccw_device *cdev,
950 unsigned long intparm, struct irb *irb)
951 {
952 struct qeth_card *card;
953
954 card = CARD_FROM_CDEV(cdev);
955
956 if (!IS_ERR(irb))
957 return 0;
958
959 switch (PTR_ERR(irb)) {
960 case -EIO:
961 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
962 dev_name(&cdev->dev));
963 QETH_CARD_TEXT(card, 2, "ckirberr");
964 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
965 break;
966 case -ETIMEDOUT:
967 dev_warn(&cdev->dev, "A hardware operation timed out"
968 " on the device\n");
969 QETH_CARD_TEXT(card, 2, "ckirberr");
970 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
971 if (intparm == QETH_RCD_PARM) {
972 if (card && (card->data.ccwdev == cdev)) {
973 card->data.state = CH_STATE_DOWN;
974 wake_up(&card->wait_q);
975 }
976 }
977 break;
978 default:
979 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
980 dev_name(&cdev->dev), PTR_ERR(irb));
981 QETH_CARD_TEXT(card, 2, "ckirberr");
982 QETH_CARD_TEXT(card, 2, " rc???");
983 }
984 return PTR_ERR(irb);
985 }
986
987 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
988 struct irb *irb)
989 {
990 int rc;
991 int cstat, dstat;
992 struct qeth_cmd_buffer *buffer;
993 struct qeth_channel *channel;
994 struct qeth_card *card;
995 struct qeth_cmd_buffer *iob;
996 __u8 index;
997
998 if (__qeth_check_irb_error(cdev, intparm, irb))
999 return;
1000 cstat = irb->scsw.cmd.cstat;
1001 dstat = irb->scsw.cmd.dstat;
1002
1003 card = CARD_FROM_CDEV(cdev);
1004 if (!card)
1005 return;
1006
1007 QETH_CARD_TEXT(card, 5, "irq");
1008
1009 if (card->read.ccwdev == cdev) {
1010 channel = &card->read;
1011 QETH_CARD_TEXT(card, 5, "read");
1012 } else if (card->write.ccwdev == cdev) {
1013 channel = &card->write;
1014 QETH_CARD_TEXT(card, 5, "write");
1015 } else {
1016 channel = &card->data;
1017 QETH_CARD_TEXT(card, 5, "data");
1018 }
1019 atomic_set(&channel->irq_pending, 0);
1020
1021 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
1022 channel->state = CH_STATE_STOPPED;
1023
1024 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
1025 channel->state = CH_STATE_HALTED;
1026
1027 /*let's wake up immediately on data channel*/
1028 if ((channel == &card->data) && (intparm != 0) &&
1029 (intparm != QETH_RCD_PARM))
1030 goto out;
1031
1032 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
1033 QETH_CARD_TEXT(card, 6, "clrchpar");
1034 /* we don't have to handle this further */
1035 intparm = 0;
1036 }
1037 if (intparm == QETH_HALT_CHANNEL_PARM) {
1038 QETH_CARD_TEXT(card, 6, "hltchpar");
1039 /* we don't have to handle this further */
1040 intparm = 0;
1041 }
1042 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1043 (dstat & DEV_STAT_UNIT_CHECK) ||
1044 (cstat)) {
1045 if (irb->esw.esw0.erw.cons) {
1046 dev_warn(&channel->ccwdev->dev,
1047 "The qeth device driver failed to recover "
1048 "an error on the device\n");
1049 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1050 "0x%X dstat 0x%X\n",
1051 dev_name(&channel->ccwdev->dev), cstat, dstat);
1052 print_hex_dump(KERN_WARNING, "qeth: irb ",
1053 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1054 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1055 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1056 }
1057 if (intparm == QETH_RCD_PARM) {
1058 channel->state = CH_STATE_DOWN;
1059 goto out;
1060 }
1061 rc = qeth_get_problem(cdev, irb);
1062 if (rc) {
1063 qeth_clear_ipacmd_list(card);
1064 qeth_schedule_recovery(card);
1065 goto out;
1066 }
1067 }
1068
1069 if (intparm == QETH_RCD_PARM) {
1070 channel->state = CH_STATE_RCD_DONE;
1071 goto out;
1072 }
1073 if (intparm) {
1074 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1075 buffer->state = BUF_STATE_PROCESSED;
1076 }
1077 if (channel == &card->data)
1078 return;
1079 if (channel == &card->read &&
1080 channel->state == CH_STATE_UP)
1081 qeth_issue_next_read(card);
1082
1083 iob = channel->iob;
1084 index = channel->buf_no;
1085 while (iob[index].state == BUF_STATE_PROCESSED) {
1086 if (iob[index].callback != NULL)
1087 iob[index].callback(channel, iob + index);
1088
1089 index = (index + 1) % QETH_CMD_BUFFER_NO;
1090 }
1091 channel->buf_no = index;
1092 out:
1093 wake_up(&card->wait_q);
1094 return;
1095 }
1096
1097 static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
1098 struct qeth_qdio_out_buffer *buf,
1099 enum iucv_tx_notify notification)
1100 {
1101 struct sk_buff *skb;
1102
1103 if (skb_queue_empty(&buf->skb_list))
1104 goto out;
1105 skb = skb_peek(&buf->skb_list);
1106 while (skb) {
1107 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1108 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1109 if (skb->protocol == ETH_P_AF_IUCV) {
1110 if (skb->sk) {
1111 struct iucv_sock *iucv = iucv_sk(skb->sk);
1112 iucv->sk_txnotify(skb, notification);
1113 }
1114 }
1115 if (skb_queue_is_last(&buf->skb_list, skb))
1116 skb = NULL;
1117 else
1118 skb = skb_queue_next(&buf->skb_list, skb);
1119 }
1120 out:
1121 return;
1122 }
1123
1124 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1125 {
1126 struct sk_buff *skb;
1127 struct iucv_sock *iucv;
1128 int notify_general_error = 0;
1129
1130 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1131 notify_general_error = 1;
1132
1133 /* release may never happen from within CQ tasklet scope */
1134 BUG_ON(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
1135
1136 skb = skb_dequeue(&buf->skb_list);
1137 while (skb) {
1138 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1139 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
1140 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1141 if (skb->sk) {
1142 iucv = iucv_sk(skb->sk);
1143 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1144 }
1145 }
1146 atomic_dec(&skb->users);
1147 dev_kfree_skb_any(skb);
1148 skb = skb_dequeue(&buf->skb_list);
1149 }
1150 }
1151
1152 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1153 struct qeth_qdio_out_buffer *buf,
1154 enum qeth_qdio_buffer_states newbufstate)
1155 {
1156 int i;
1157
1158 /* is PCI flag set on buffer? */
1159 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1160 atomic_dec(&queue->set_pci_flags_count);
1161
1162 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1163 qeth_release_skbs(buf);
1164 }
1165 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
1166 if (buf->buffer->element[i].addr && buf->is_header[i])
1167 kmem_cache_free(qeth_core_header_cache,
1168 buf->buffer->element[i].addr);
1169 buf->is_header[i] = 0;
1170 buf->buffer->element[i].length = 0;
1171 buf->buffer->element[i].addr = NULL;
1172 buf->buffer->element[i].eflags = 0;
1173 buf->buffer->element[i].sflags = 0;
1174 }
1175 buf->buffer->element[15].eflags = 0;
1176 buf->buffer->element[15].sflags = 0;
1177 buf->next_element_to_fill = 0;
1178 atomic_set(&buf->state, newbufstate);
1179 }
1180
1181 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1182 {
1183 int j;
1184
1185 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1186 if (!q->bufs[j])
1187 continue;
1188 qeth_cleanup_handled_pending(q, j, 1);
1189 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1190 if (free) {
1191 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1192 q->bufs[j] = NULL;
1193 }
1194 }
1195 }
1196
1197 void qeth_clear_qdio_buffers(struct qeth_card *card)
1198 {
1199 int i;
1200
1201 QETH_CARD_TEXT(card, 2, "clearqdbf");
1202 /* clear outbound buffers to free skbs */
1203 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1204 if (card->qdio.out_qs[i]) {
1205 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
1206 }
1207 }
1208 }
1209 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1210
1211 static void qeth_free_buffer_pool(struct qeth_card *card)
1212 {
1213 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1214 int i = 0;
1215 list_for_each_entry_safe(pool_entry, tmp,
1216 &card->qdio.init_pool.entry_list, init_list){
1217 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1218 free_page((unsigned long)pool_entry->elements[i]);
1219 list_del(&pool_entry->init_list);
1220 kfree(pool_entry);
1221 }
1222 }
1223
1224 static void qeth_free_qdio_buffers(struct qeth_card *card)
1225 {
1226 int i, j;
1227
1228 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1229 QETH_QDIO_UNINITIALIZED)
1230 return;
1231
1232 qeth_free_cq(card);
1233 cancel_delayed_work_sync(&card->buffer_reclaim_work);
1234 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
1235 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
1236 kfree(card->qdio.in_q);
1237 card->qdio.in_q = NULL;
1238 /* inbound buffer pool */
1239 qeth_free_buffer_pool(card);
1240 /* free outbound qdio_qs */
1241 if (card->qdio.out_qs) {
1242 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1243 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
1244 kfree(card->qdio.out_qs[i]);
1245 }
1246 kfree(card->qdio.out_qs);
1247 card->qdio.out_qs = NULL;
1248 }
1249 }
1250
1251 static void qeth_clean_channel(struct qeth_channel *channel)
1252 {
1253 int cnt;
1254
1255 QETH_DBF_TEXT(SETUP, 2, "freech");
1256 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1257 kfree(channel->iob[cnt].data);
1258 }
1259
1260 static void qeth_set_single_write_queues(struct qeth_card *card)
1261 {
1262 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1263 (card->qdio.no_out_queues == 4))
1264 qeth_free_qdio_buffers(card);
1265
1266 card->qdio.no_out_queues = 1;
1267 if (card->qdio.default_out_queue != 0)
1268 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1269
1270 card->qdio.default_out_queue = 0;
1271 }
1272
1273 static void qeth_set_multiple_write_queues(struct qeth_card *card)
1274 {
1275 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1276 (card->qdio.no_out_queues == 1)) {
1277 qeth_free_qdio_buffers(card);
1278 card->qdio.default_out_queue = 2;
1279 }
1280 card->qdio.no_out_queues = 4;
1281 }
1282
1283 static void qeth_update_from_chp_desc(struct qeth_card *card)
1284 {
1285 struct ccw_device *ccwdev;
1286 struct channelPath_dsc {
1287 u8 flags;
1288 u8 lsn;
1289 u8 desc;
1290 u8 chpid;
1291 u8 swla;
1292 u8 zeroes;
1293 u8 chla;
1294 u8 chpp;
1295 } *chp_dsc;
1296
1297 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
1298
1299 ccwdev = card->data.ccwdev;
1300 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1301 if (!chp_dsc)
1302 goto out;
1303
1304 card->info.func_level = 0x4100 + chp_dsc->desc;
1305 if (card->info.type == QETH_CARD_TYPE_IQD)
1306 goto out;
1307
1308 /* CHPP field bit 6 == 1 -> single queue */
1309 if ((chp_dsc->chpp & 0x02) == 0x02)
1310 qeth_set_single_write_queues(card);
1311 else
1312 qeth_set_multiple_write_queues(card);
1313 out:
1314 kfree(chp_dsc);
1315 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1316 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1317 }
1318
1319 static void qeth_init_qdio_info(struct qeth_card *card)
1320 {
1321 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1322 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1323 /* inbound */
1324 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1325 if (card->info.type == QETH_CARD_TYPE_IQD)
1326 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1327 else
1328 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1329 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1330 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1331 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1332 }
1333
1334 static void qeth_set_intial_options(struct qeth_card *card)
1335 {
1336 card->options.route4.type = NO_ROUTER;
1337 card->options.route6.type = NO_ROUTER;
1338 card->options.fake_broadcast = 0;
1339 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1340 card->options.performance_stats = 0;
1341 card->options.rx_sg_cb = QETH_RX_SG_CB;
1342 card->options.isolation = ISOLATION_MODE_NONE;
1343 card->options.cq = QETH_CQ_DISABLED;
1344 }
1345
1346 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1347 {
1348 unsigned long flags;
1349 int rc = 0;
1350
1351 spin_lock_irqsave(&card->thread_mask_lock, flags);
1352 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
1353 (u8) card->thread_start_mask,
1354 (u8) card->thread_allowed_mask,
1355 (u8) card->thread_running_mask);
1356 rc = (card->thread_start_mask & thread);
1357 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1358 return rc;
1359 }
1360
1361 static void qeth_start_kernel_thread(struct work_struct *work)
1362 {
1363 struct task_struct *ts;
1364 struct qeth_card *card = container_of(work, struct qeth_card,
1365 kernel_thread_starter);
1366 QETH_CARD_TEXT(card , 2, "strthrd");
1367
1368 if (card->read.state != CH_STATE_UP &&
1369 card->write.state != CH_STATE_UP)
1370 return;
1371 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
1372 ts = kthread_run(card->discipline->recover, (void *)card,
1373 "qeth_recover");
1374 if (IS_ERR(ts)) {
1375 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1376 qeth_clear_thread_running_bit(card,
1377 QETH_RECOVER_THREAD);
1378 }
1379 }
1380 }
1381
1382 static int qeth_setup_card(struct qeth_card *card)
1383 {
1384
1385 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1386 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1387
1388 card->read.state = CH_STATE_DOWN;
1389 card->write.state = CH_STATE_DOWN;
1390 card->data.state = CH_STATE_DOWN;
1391 card->state = CARD_STATE_DOWN;
1392 card->lan_online = 0;
1393 card->read_or_write_problem = 0;
1394 card->dev = NULL;
1395 spin_lock_init(&card->vlanlock);
1396 spin_lock_init(&card->mclock);
1397 spin_lock_init(&card->lock);
1398 spin_lock_init(&card->ip_lock);
1399 spin_lock_init(&card->thread_mask_lock);
1400 mutex_init(&card->conf_mutex);
1401 mutex_init(&card->discipline_mutex);
1402 card->thread_start_mask = 0;
1403 card->thread_allowed_mask = 0;
1404 card->thread_running_mask = 0;
1405 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1406 INIT_LIST_HEAD(&card->ip_list);
1407 INIT_LIST_HEAD(card->ip_tbd_list);
1408 INIT_LIST_HEAD(&card->cmd_waiter_list);
1409 init_waitqueue_head(&card->wait_q);
1410 /* initial options */
1411 qeth_set_intial_options(card);
1412 /* IP address takeover */
1413 INIT_LIST_HEAD(&card->ipato.entries);
1414 card->ipato.enabled = 0;
1415 card->ipato.invert4 = 0;
1416 card->ipato.invert6 = 0;
1417 /* init QDIO stuff */
1418 qeth_init_qdio_info(card);
1419 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
1420 return 0;
1421 }
1422
1423 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1424 {
1425 struct qeth_card *card = container_of(slr, struct qeth_card,
1426 qeth_service_level);
1427 if (card->info.mcl_level[0])
1428 seq_printf(m, "qeth: %s firmware level %s\n",
1429 CARD_BUS_ID(card), card->info.mcl_level);
1430 }
1431
1432 static struct qeth_card *qeth_alloc_card(void)
1433 {
1434 struct qeth_card *card;
1435
1436 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1437 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1438 if (!card)
1439 goto out;
1440 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1441 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
1442 if (!card->ip_tbd_list) {
1443 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1444 goto out_card;
1445 }
1446 if (qeth_setup_channel(&card->read))
1447 goto out_ip;
1448 if (qeth_setup_channel(&card->write))
1449 goto out_channel;
1450 card->options.layer2 = -1;
1451 card->qeth_service_level.seq_print = qeth_core_sl_print;
1452 register_service_level(&card->qeth_service_level);
1453 return card;
1454
1455 out_channel:
1456 qeth_clean_channel(&card->read);
1457 out_ip:
1458 kfree(card->ip_tbd_list);
1459 out_card:
1460 kfree(card);
1461 out:
1462 return NULL;
1463 }
1464
1465 static int qeth_determine_card_type(struct qeth_card *card)
1466 {
1467 int i = 0;
1468
1469 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1470
1471 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1472 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1473 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1474 if ((CARD_RDEV(card)->id.dev_type ==
1475 known_devices[i][QETH_DEV_TYPE_IND]) &&
1476 (CARD_RDEV(card)->id.dev_model ==
1477 known_devices[i][QETH_DEV_MODEL_IND])) {
1478 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1479 card->qdio.no_out_queues =
1480 known_devices[i][QETH_QUEUE_NO_IND];
1481 card->qdio.no_in_queues = 1;
1482 card->info.is_multicast_different =
1483 known_devices[i][QETH_MULTICAST_IND];
1484 qeth_update_from_chp_desc(card);
1485 return 0;
1486 }
1487 i++;
1488 }
1489 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1490 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1491 "unknown type\n");
1492 return -ENOENT;
1493 }
1494
1495 static int qeth_clear_channel(struct qeth_channel *channel)
1496 {
1497 unsigned long flags;
1498 struct qeth_card *card;
1499 int rc;
1500
1501 card = CARD_FROM_CDEV(channel->ccwdev);
1502 QETH_CARD_TEXT(card, 3, "clearch");
1503 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1504 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1505 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1506
1507 if (rc)
1508 return rc;
1509 rc = wait_event_interruptible_timeout(card->wait_q,
1510 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1511 if (rc == -ERESTARTSYS)
1512 return rc;
1513 if (channel->state != CH_STATE_STOPPED)
1514 return -ETIME;
1515 channel->state = CH_STATE_DOWN;
1516 return 0;
1517 }
1518
1519 static int qeth_halt_channel(struct qeth_channel *channel)
1520 {
1521 unsigned long flags;
1522 struct qeth_card *card;
1523 int rc;
1524
1525 card = CARD_FROM_CDEV(channel->ccwdev);
1526 QETH_CARD_TEXT(card, 3, "haltch");
1527 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1528 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1529 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1530
1531 if (rc)
1532 return rc;
1533 rc = wait_event_interruptible_timeout(card->wait_q,
1534 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1535 if (rc == -ERESTARTSYS)
1536 return rc;
1537 if (channel->state != CH_STATE_HALTED)
1538 return -ETIME;
1539 return 0;
1540 }
1541
1542 static int qeth_halt_channels(struct qeth_card *card)
1543 {
1544 int rc1 = 0, rc2 = 0, rc3 = 0;
1545
1546 QETH_CARD_TEXT(card, 3, "haltchs");
1547 rc1 = qeth_halt_channel(&card->read);
1548 rc2 = qeth_halt_channel(&card->write);
1549 rc3 = qeth_halt_channel(&card->data);
1550 if (rc1)
1551 return rc1;
1552 if (rc2)
1553 return rc2;
1554 return rc3;
1555 }
1556
1557 static int qeth_clear_channels(struct qeth_card *card)
1558 {
1559 int rc1 = 0, rc2 = 0, rc3 = 0;
1560
1561 QETH_CARD_TEXT(card, 3, "clearchs");
1562 rc1 = qeth_clear_channel(&card->read);
1563 rc2 = qeth_clear_channel(&card->write);
1564 rc3 = qeth_clear_channel(&card->data);
1565 if (rc1)
1566 return rc1;
1567 if (rc2)
1568 return rc2;
1569 return rc3;
1570 }
1571
1572 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1573 {
1574 int rc = 0;
1575
1576 QETH_CARD_TEXT(card, 3, "clhacrd");
1577
1578 if (halt)
1579 rc = qeth_halt_channels(card);
1580 if (rc)
1581 return rc;
1582 return qeth_clear_channels(card);
1583 }
1584
1585 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1586 {
1587 int rc = 0;
1588
1589 QETH_CARD_TEXT(card, 3, "qdioclr");
1590 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1591 QETH_QDIO_CLEANING)) {
1592 case QETH_QDIO_ESTABLISHED:
1593 if (card->info.type == QETH_CARD_TYPE_IQD)
1594 rc = qdio_shutdown(CARD_DDEV(card),
1595 QDIO_FLAG_CLEANUP_USING_HALT);
1596 else
1597 rc = qdio_shutdown(CARD_DDEV(card),
1598 QDIO_FLAG_CLEANUP_USING_CLEAR);
1599 if (rc)
1600 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
1601 qdio_free(CARD_DDEV(card));
1602 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1603 break;
1604 case QETH_QDIO_CLEANING:
1605 return rc;
1606 default:
1607 break;
1608 }
1609 rc = qeth_clear_halt_card(card, use_halt);
1610 if (rc)
1611 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
1612 card->state = CARD_STATE_DOWN;
1613 return rc;
1614 }
1615 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1616
1617 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1618 int *length)
1619 {
1620 struct ciw *ciw;
1621 char *rcd_buf;
1622 int ret;
1623 struct qeth_channel *channel = &card->data;
1624 unsigned long flags;
1625
1626 /*
1627 * scan for RCD command in extended SenseID data
1628 */
1629 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1630 if (!ciw || ciw->cmd == 0)
1631 return -EOPNOTSUPP;
1632 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1633 if (!rcd_buf)
1634 return -ENOMEM;
1635
1636 channel->ccw.cmd_code = ciw->cmd;
1637 channel->ccw.cda = (__u32) __pa(rcd_buf);
1638 channel->ccw.count = ciw->count;
1639 channel->ccw.flags = CCW_FLAG_SLI;
1640 channel->state = CH_STATE_RCD;
1641 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1642 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1643 QETH_RCD_PARM, LPM_ANYPATH, 0,
1644 QETH_RCD_TIMEOUT);
1645 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1646 if (!ret)
1647 wait_event(card->wait_q,
1648 (channel->state == CH_STATE_RCD_DONE ||
1649 channel->state == CH_STATE_DOWN));
1650 if (channel->state == CH_STATE_DOWN)
1651 ret = -EIO;
1652 else
1653 channel->state = CH_STATE_DOWN;
1654 if (ret) {
1655 kfree(rcd_buf);
1656 *buffer = NULL;
1657 *length = 0;
1658 } else {
1659 *length = ciw->count;
1660 *buffer = rcd_buf;
1661 }
1662 return ret;
1663 }
1664
1665 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1666 {
1667 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1668 card->info.chpid = prcd[30];
1669 card->info.unit_addr2 = prcd[31];
1670 card->info.cula = prcd[63];
1671 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1672 (prcd[0x11] == _ascebc['M']));
1673 }
1674
1675 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1676 {
1677 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1678
1679 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
1680 (prcd[76] == 0xF5 || prcd[76] == 0xF6)) {
1681 card->info.blkt.time_total = 250;
1682 card->info.blkt.inter_packet = 5;
1683 card->info.blkt.inter_packet_jumbo = 15;
1684 } else {
1685 card->info.blkt.time_total = 0;
1686 card->info.blkt.inter_packet = 0;
1687 card->info.blkt.inter_packet_jumbo = 0;
1688 }
1689 }
1690
1691 static void qeth_init_tokens(struct qeth_card *card)
1692 {
1693 card->token.issuer_rm_w = 0x00010103UL;
1694 card->token.cm_filter_w = 0x00010108UL;
1695 card->token.cm_connection_w = 0x0001010aUL;
1696 card->token.ulp_filter_w = 0x0001010bUL;
1697 card->token.ulp_connection_w = 0x0001010dUL;
1698 }
1699
1700 static void qeth_init_func_level(struct qeth_card *card)
1701 {
1702 switch (card->info.type) {
1703 case QETH_CARD_TYPE_IQD:
1704 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
1705 break;
1706 case QETH_CARD_TYPE_OSD:
1707 case QETH_CARD_TYPE_OSN:
1708 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1709 break;
1710 default:
1711 break;
1712 }
1713 }
1714
1715 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1716 void (*idx_reply_cb)(struct qeth_channel *,
1717 struct qeth_cmd_buffer *))
1718 {
1719 struct qeth_cmd_buffer *iob;
1720 unsigned long flags;
1721 int rc;
1722 struct qeth_card *card;
1723
1724 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1725 card = CARD_FROM_CDEV(channel->ccwdev);
1726 iob = qeth_get_buffer(channel);
1727 iob->callback = idx_reply_cb;
1728 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1729 channel->ccw.count = QETH_BUFSIZE;
1730 channel->ccw.cda = (__u32) __pa(iob->data);
1731
1732 wait_event(card->wait_q,
1733 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1734 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1735 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1736 rc = ccw_device_start(channel->ccwdev,
1737 &channel->ccw, (addr_t) iob, 0, 0);
1738 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1739
1740 if (rc) {
1741 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1742 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1743 atomic_set(&channel->irq_pending, 0);
1744 wake_up(&card->wait_q);
1745 return rc;
1746 }
1747 rc = wait_event_interruptible_timeout(card->wait_q,
1748 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1749 if (rc == -ERESTARTSYS)
1750 return rc;
1751 if (channel->state != CH_STATE_UP) {
1752 rc = -ETIME;
1753 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1754 qeth_clear_cmd_buffers(channel);
1755 } else
1756 rc = 0;
1757 return rc;
1758 }
1759
1760 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1761 void (*idx_reply_cb)(struct qeth_channel *,
1762 struct qeth_cmd_buffer *))
1763 {
1764 struct qeth_card *card;
1765 struct qeth_cmd_buffer *iob;
1766 unsigned long flags;
1767 __u16 temp;
1768 __u8 tmp;
1769 int rc;
1770 struct ccw_dev_id temp_devid;
1771
1772 card = CARD_FROM_CDEV(channel->ccwdev);
1773
1774 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1775
1776 iob = qeth_get_buffer(channel);
1777 iob->callback = idx_reply_cb;
1778 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1779 channel->ccw.count = IDX_ACTIVATE_SIZE;
1780 channel->ccw.cda = (__u32) __pa(iob->data);
1781 if (channel == &card->write) {
1782 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1783 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1784 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1785 card->seqno.trans_hdr++;
1786 } else {
1787 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1788 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1789 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1790 }
1791 tmp = ((__u8)card->info.portno) | 0x80;
1792 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1793 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1794 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1795 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1796 &card->info.func_level, sizeof(__u16));
1797 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1798 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1799 temp = (card->info.cula << 8) + card->info.unit_addr2;
1800 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1801
1802 wait_event(card->wait_q,
1803 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1804 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1805 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1806 rc = ccw_device_start(channel->ccwdev,
1807 &channel->ccw, (addr_t) iob, 0, 0);
1808 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1809
1810 if (rc) {
1811 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1812 rc);
1813 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1814 atomic_set(&channel->irq_pending, 0);
1815 wake_up(&card->wait_q);
1816 return rc;
1817 }
1818 rc = wait_event_interruptible_timeout(card->wait_q,
1819 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1820 if (rc == -ERESTARTSYS)
1821 return rc;
1822 if (channel->state != CH_STATE_ACTIVATING) {
1823 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1824 " failed to recover an error on the device\n");
1825 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1826 dev_name(&channel->ccwdev->dev));
1827 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1828 qeth_clear_cmd_buffers(channel);
1829 return -ETIME;
1830 }
1831 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1832 }
1833
1834 static int qeth_peer_func_level(int level)
1835 {
1836 if ((level & 0xff) == 8)
1837 return (level & 0xff) + 0x400;
1838 if (((level >> 8) & 3) == 1)
1839 return (level & 0xff) + 0x200;
1840 return level;
1841 }
1842
1843 static void qeth_idx_write_cb(struct qeth_channel *channel,
1844 struct qeth_cmd_buffer *iob)
1845 {
1846 struct qeth_card *card;
1847 __u16 temp;
1848
1849 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1850
1851 if (channel->state == CH_STATE_DOWN) {
1852 channel->state = CH_STATE_ACTIVATING;
1853 goto out;
1854 }
1855 card = CARD_FROM_CDEV(channel->ccwdev);
1856
1857 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1858 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
1859 dev_err(&card->write.ccwdev->dev,
1860 "The adapter is used exclusively by another "
1861 "host\n");
1862 else
1863 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1864 " negative reply\n",
1865 dev_name(&card->write.ccwdev->dev));
1866 goto out;
1867 }
1868 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1869 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1870 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1871 "function level mismatch (sent: 0x%x, received: "
1872 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1873 card->info.func_level, temp);
1874 goto out;
1875 }
1876 channel->state = CH_STATE_UP;
1877 out:
1878 qeth_release_buffer(channel, iob);
1879 }
1880
1881 static void qeth_idx_read_cb(struct qeth_channel *channel,
1882 struct qeth_cmd_buffer *iob)
1883 {
1884 struct qeth_card *card;
1885 __u16 temp;
1886
1887 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1888 if (channel->state == CH_STATE_DOWN) {
1889 channel->state = CH_STATE_ACTIVATING;
1890 goto out;
1891 }
1892
1893 card = CARD_FROM_CDEV(channel->ccwdev);
1894 if (qeth_check_idx_response(card, iob->data))
1895 goto out;
1896
1897 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1898 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1899 case QETH_IDX_ACT_ERR_EXCL:
1900 dev_err(&card->write.ccwdev->dev,
1901 "The adapter is used exclusively by another "
1902 "host\n");
1903 break;
1904 case QETH_IDX_ACT_ERR_AUTH:
1905 case QETH_IDX_ACT_ERR_AUTH_USER:
1906 dev_err(&card->read.ccwdev->dev,
1907 "Setting the device online failed because of "
1908 "insufficient authorization\n");
1909 break;
1910 default:
1911 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1912 " negative reply\n",
1913 dev_name(&card->read.ccwdev->dev));
1914 }
1915 QETH_CARD_TEXT_(card, 2, "idxread%c",
1916 QETH_IDX_ACT_CAUSE_CODE(iob->data));
1917 goto out;
1918 }
1919
1920 /**
1921 * * temporary fix for microcode bug
1922 * * to revert it,replace OR by AND
1923 * */
1924 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1925 (card->info.type == QETH_CARD_TYPE_OSD))
1926 card->info.portname_required = 1;
1927
1928 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1929 if (temp != qeth_peer_func_level(card->info.func_level)) {
1930 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1931 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1932 dev_name(&card->read.ccwdev->dev),
1933 card->info.func_level, temp);
1934 goto out;
1935 }
1936 memcpy(&card->token.issuer_rm_r,
1937 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1938 QETH_MPC_TOKEN_LENGTH);
1939 memcpy(&card->info.mcl_level[0],
1940 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1941 channel->state = CH_STATE_UP;
1942 out:
1943 qeth_release_buffer(channel, iob);
1944 }
1945
1946 void qeth_prepare_control_data(struct qeth_card *card, int len,
1947 struct qeth_cmd_buffer *iob)
1948 {
1949 qeth_setup_ccw(&card->write, iob->data, len);
1950 iob->callback = qeth_release_buffer;
1951
1952 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1953 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1954 card->seqno.trans_hdr++;
1955 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1956 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1957 card->seqno.pdu_hdr++;
1958 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1959 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1960 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1961 }
1962 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1963
1964 int qeth_send_control_data(struct qeth_card *card, int len,
1965 struct qeth_cmd_buffer *iob,
1966 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1967 unsigned long),
1968 void *reply_param)
1969 {
1970 int rc;
1971 unsigned long flags;
1972 struct qeth_reply *reply = NULL;
1973 unsigned long timeout, event_timeout;
1974 struct qeth_ipa_cmd *cmd;
1975
1976 QETH_CARD_TEXT(card, 2, "sendctl");
1977
1978 if (card->read_or_write_problem) {
1979 qeth_release_buffer(iob->channel, iob);
1980 return -EIO;
1981 }
1982 reply = qeth_alloc_reply(card);
1983 if (!reply) {
1984 return -ENOMEM;
1985 }
1986 reply->callback = reply_cb;
1987 reply->param = reply_param;
1988 if (card->state == CARD_STATE_DOWN)
1989 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1990 else
1991 reply->seqno = card->seqno.ipa++;
1992 init_waitqueue_head(&reply->wait_q);
1993 spin_lock_irqsave(&card->lock, flags);
1994 list_add_tail(&reply->list, &card->cmd_waiter_list);
1995 spin_unlock_irqrestore(&card->lock, flags);
1996 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1997
1998 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1999 qeth_prepare_control_data(card, len, iob);
2000
2001 if (IS_IPA(iob->data))
2002 event_timeout = QETH_IPA_TIMEOUT;
2003 else
2004 event_timeout = QETH_TIMEOUT;
2005 timeout = jiffies + event_timeout;
2006
2007 QETH_CARD_TEXT(card, 6, "noirqpnd");
2008 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2009 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2010 (addr_t) iob, 0, 0);
2011 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2012 if (rc) {
2013 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2014 "ccw_device_start rc = %i\n",
2015 dev_name(&card->write.ccwdev->dev), rc);
2016 QETH_CARD_TEXT_(card, 2, " err%d", rc);
2017 spin_lock_irqsave(&card->lock, flags);
2018 list_del_init(&reply->list);
2019 qeth_put_reply(reply);
2020 spin_unlock_irqrestore(&card->lock, flags);
2021 qeth_release_buffer(iob->channel, iob);
2022 atomic_set(&card->write.irq_pending, 0);
2023 wake_up(&card->wait_q);
2024 return rc;
2025 }
2026
2027 /* we have only one long running ipassist, since we can ensure
2028 process context of this command we can sleep */
2029 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2030 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2031 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2032 if (!wait_event_timeout(reply->wait_q,
2033 atomic_read(&reply->received), event_timeout))
2034 goto time_err;
2035 } else {
2036 while (!atomic_read(&reply->received)) {
2037 if (time_after(jiffies, timeout))
2038 goto time_err;
2039 cpu_relax();
2040 }
2041 }
2042
2043 if (reply->rc == -EIO)
2044 goto error;
2045 rc = reply->rc;
2046 qeth_put_reply(reply);
2047 return rc;
2048
2049 time_err:
2050 reply->rc = -ETIME;
2051 spin_lock_irqsave(&reply->card->lock, flags);
2052 list_del_init(&reply->list);
2053 spin_unlock_irqrestore(&reply->card->lock, flags);
2054 atomic_inc(&reply->received);
2055 error:
2056 atomic_set(&card->write.irq_pending, 0);
2057 qeth_release_buffer(iob->channel, iob);
2058 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
2059 rc = reply->rc;
2060 qeth_put_reply(reply);
2061 return rc;
2062 }
2063 EXPORT_SYMBOL_GPL(qeth_send_control_data);
2064
2065 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2066 unsigned long data)
2067 {
2068 struct qeth_cmd_buffer *iob;
2069
2070 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
2071
2072 iob = (struct qeth_cmd_buffer *) data;
2073 memcpy(&card->token.cm_filter_r,
2074 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2075 QETH_MPC_TOKEN_LENGTH);
2076 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2077 return 0;
2078 }
2079
2080 static int qeth_cm_enable(struct qeth_card *card)
2081 {
2082 int rc;
2083 struct qeth_cmd_buffer *iob;
2084
2085 QETH_DBF_TEXT(SETUP, 2, "cmenable");
2086
2087 iob = qeth_wait_for_buffer(&card->write);
2088 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2089 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2090 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2091 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2092 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2093
2094 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2095 qeth_cm_enable_cb, NULL);
2096 return rc;
2097 }
2098
2099 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2100 unsigned long data)
2101 {
2102
2103 struct qeth_cmd_buffer *iob;
2104
2105 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
2106
2107 iob = (struct qeth_cmd_buffer *) data;
2108 memcpy(&card->token.cm_connection_r,
2109 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2110 QETH_MPC_TOKEN_LENGTH);
2111 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2112 return 0;
2113 }
2114
2115 static int qeth_cm_setup(struct qeth_card *card)
2116 {
2117 int rc;
2118 struct qeth_cmd_buffer *iob;
2119
2120 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
2121
2122 iob = qeth_wait_for_buffer(&card->write);
2123 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2124 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2125 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2126 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2127 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2128 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2129 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2130 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2131 qeth_cm_setup_cb, NULL);
2132 return rc;
2133
2134 }
2135
2136 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2137 {
2138 switch (card->info.type) {
2139 case QETH_CARD_TYPE_UNKNOWN:
2140 return 1500;
2141 case QETH_CARD_TYPE_IQD:
2142 return card->info.max_mtu;
2143 case QETH_CARD_TYPE_OSD:
2144 switch (card->info.link_type) {
2145 case QETH_LINK_TYPE_HSTR:
2146 case QETH_LINK_TYPE_LANE_TR:
2147 return 2000;
2148 default:
2149 return 1492;
2150 }
2151 case QETH_CARD_TYPE_OSM:
2152 case QETH_CARD_TYPE_OSX:
2153 return 1492;
2154 default:
2155 return 1500;
2156 }
2157 }
2158
2159 static inline int qeth_get_mtu_outof_framesize(int framesize)
2160 {
2161 switch (framesize) {
2162 case 0x4000:
2163 return 8192;
2164 case 0x6000:
2165 return 16384;
2166 case 0xa000:
2167 return 32768;
2168 case 0xffff:
2169 return 57344;
2170 default:
2171 return 0;
2172 }
2173 }
2174
2175 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2176 {
2177 switch (card->info.type) {
2178 case QETH_CARD_TYPE_OSD:
2179 case QETH_CARD_TYPE_OSM:
2180 case QETH_CARD_TYPE_OSX:
2181 case QETH_CARD_TYPE_IQD:
2182 return ((mtu >= 576) &&
2183 (mtu <= card->info.max_mtu));
2184 case QETH_CARD_TYPE_OSN:
2185 case QETH_CARD_TYPE_UNKNOWN:
2186 default:
2187 return 1;
2188 }
2189 }
2190
2191 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2192 unsigned long data)
2193 {
2194
2195 __u16 mtu, framesize;
2196 __u16 len;
2197 __u8 link_type;
2198 struct qeth_cmd_buffer *iob;
2199
2200 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
2201
2202 iob = (struct qeth_cmd_buffer *) data;
2203 memcpy(&card->token.ulp_filter_r,
2204 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2205 QETH_MPC_TOKEN_LENGTH);
2206 if (card->info.type == QETH_CARD_TYPE_IQD) {
2207 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2208 mtu = qeth_get_mtu_outof_framesize(framesize);
2209 if (!mtu) {
2210 iob->rc = -EINVAL;
2211 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2212 return 0;
2213 }
2214 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2215 /* frame size has changed */
2216 if (card->dev &&
2217 ((card->dev->mtu == card->info.initial_mtu) ||
2218 (card->dev->mtu > mtu)))
2219 card->dev->mtu = mtu;
2220 qeth_free_qdio_buffers(card);
2221 }
2222 card->info.initial_mtu = mtu;
2223 card->info.max_mtu = mtu;
2224 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2225 } else {
2226 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
2227 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2228 iob->data);
2229 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2230 }
2231
2232 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2233 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2234 memcpy(&link_type,
2235 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2236 card->info.link_type = link_type;
2237 } else
2238 card->info.link_type = 0;
2239 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
2240 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2241 return 0;
2242 }
2243
2244 static int qeth_ulp_enable(struct qeth_card *card)
2245 {
2246 int rc;
2247 char prot_type;
2248 struct qeth_cmd_buffer *iob;
2249
2250 /*FIXME: trace view callbacks*/
2251 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
2252
2253 iob = qeth_wait_for_buffer(&card->write);
2254 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2255
2256 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2257 (__u8) card->info.portno;
2258 if (card->options.layer2)
2259 if (card->info.type == QETH_CARD_TYPE_OSN)
2260 prot_type = QETH_PROT_OSN2;
2261 else
2262 prot_type = QETH_PROT_LAYER2;
2263 else
2264 prot_type = QETH_PROT_TCPIP;
2265
2266 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2267 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2268 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2269 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2270 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2271 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2272 card->info.portname, 9);
2273 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2274 qeth_ulp_enable_cb, NULL);
2275 return rc;
2276
2277 }
2278
2279 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2280 unsigned long data)
2281 {
2282 struct qeth_cmd_buffer *iob;
2283
2284 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
2285
2286 iob = (struct qeth_cmd_buffer *) data;
2287 memcpy(&card->token.ulp_connection_r,
2288 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2289 QETH_MPC_TOKEN_LENGTH);
2290 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2291 3)) {
2292 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2293 dev_err(&card->gdev->dev, "A connection could not be "
2294 "established because of an OLM limit\n");
2295 iob->rc = -EMLINK;
2296 }
2297 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2298 return 0;
2299 }
2300
2301 static int qeth_ulp_setup(struct qeth_card *card)
2302 {
2303 int rc;
2304 __u16 temp;
2305 struct qeth_cmd_buffer *iob;
2306 struct ccw_dev_id dev_id;
2307
2308 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2309
2310 iob = qeth_wait_for_buffer(&card->write);
2311 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2312
2313 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2314 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2315 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2316 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2317 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2318 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2319
2320 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2321 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2322 temp = (card->info.cula << 8) + card->info.unit_addr2;
2323 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2324 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2325 qeth_ulp_setup_cb, NULL);
2326 return rc;
2327 }
2328
2329 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2330 {
2331 int rc;
2332 struct qeth_qdio_out_buffer *newbuf;
2333
2334 rc = 0;
2335 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2336 if (!newbuf) {
2337 rc = -ENOMEM;
2338 goto out;
2339 }
2340 newbuf->buffer = &q->qdio_bufs[bidx];
2341 skb_queue_head_init(&newbuf->skb_list);
2342 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2343 newbuf->q = q;
2344 newbuf->aob = NULL;
2345 newbuf->next_pending = q->bufs[bidx];
2346 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2347 q->bufs[bidx] = newbuf;
2348 if (q->bufstates) {
2349 q->bufstates[bidx].user = newbuf;
2350 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2351 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2352 QETH_CARD_TEXT_(q->card, 2, "%lx",
2353 (long) newbuf->next_pending);
2354 }
2355 out:
2356 return rc;
2357 }
2358
2359
2360 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2361 {
2362 int i, j;
2363
2364 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2365
2366 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2367 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2368 return 0;
2369
2370 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
2371 GFP_KERNEL);
2372 if (!card->qdio.in_q)
2373 goto out_nomem;
2374 QETH_DBF_TEXT(SETUP, 2, "inq");
2375 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2376 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2377 /* give inbound qeth_qdio_buffers their qdio_buffers */
2378 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
2379 card->qdio.in_q->bufs[i].buffer =
2380 &card->qdio.in_q->qdio_bufs[i];
2381 card->qdio.in_q->bufs[i].rx_skb = NULL;
2382 }
2383 /* inbound buffer pool */
2384 if (qeth_alloc_buffer_pool(card))
2385 goto out_freeinq;
2386
2387 /* outbound */
2388 card->qdio.out_qs =
2389 kzalloc(card->qdio.no_out_queues *
2390 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2391 if (!card->qdio.out_qs)
2392 goto out_freepool;
2393 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2394 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
2395 GFP_KERNEL);
2396 if (!card->qdio.out_qs[i])
2397 goto out_freeoutq;
2398 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2399 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2400 card->qdio.out_qs[i]->queue_no = i;
2401 /* give outbound qeth_qdio_buffers their qdio_buffers */
2402 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2403 BUG_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2404 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2405 goto out_freeoutqbufs;
2406 }
2407 }
2408
2409 /* completion */
2410 if (qeth_alloc_cq(card))
2411 goto out_freeoutq;
2412
2413 return 0;
2414
2415 out_freeoutqbufs:
2416 while (j > 0) {
2417 --j;
2418 kmem_cache_free(qeth_qdio_outbuf_cache,
2419 card->qdio.out_qs[i]->bufs[j]);
2420 card->qdio.out_qs[i]->bufs[j] = NULL;
2421 }
2422 out_freeoutq:
2423 while (i > 0) {
2424 kfree(card->qdio.out_qs[--i]);
2425 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2426 }
2427 kfree(card->qdio.out_qs);
2428 card->qdio.out_qs = NULL;
2429 out_freepool:
2430 qeth_free_buffer_pool(card);
2431 out_freeinq:
2432 kfree(card->qdio.in_q);
2433 card->qdio.in_q = NULL;
2434 out_nomem:
2435 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2436 return -ENOMEM;
2437 }
2438
2439 static void qeth_create_qib_param_field(struct qeth_card *card,
2440 char *param_field)
2441 {
2442
2443 param_field[0] = _ascebc['P'];
2444 param_field[1] = _ascebc['C'];
2445 param_field[2] = _ascebc['I'];
2446 param_field[3] = _ascebc['T'];
2447 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2448 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2449 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2450 }
2451
2452 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2453 char *param_field)
2454 {
2455 param_field[16] = _ascebc['B'];
2456 param_field[17] = _ascebc['L'];
2457 param_field[18] = _ascebc['K'];
2458 param_field[19] = _ascebc['T'];
2459 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2460 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2461 *((unsigned int *) (&param_field[28])) =
2462 card->info.blkt.inter_packet_jumbo;
2463 }
2464
2465 static int qeth_qdio_activate(struct qeth_card *card)
2466 {
2467 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2468 return qdio_activate(CARD_DDEV(card));
2469 }
2470
2471 static int qeth_dm_act(struct qeth_card *card)
2472 {
2473 int rc;
2474 struct qeth_cmd_buffer *iob;
2475
2476 QETH_DBF_TEXT(SETUP, 2, "dmact");
2477
2478 iob = qeth_wait_for_buffer(&card->write);
2479 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2480
2481 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2482 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2483 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2484 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2485 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2486 return rc;
2487 }
2488
2489 static int qeth_mpc_initialize(struct qeth_card *card)
2490 {
2491 int rc;
2492
2493 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2494
2495 rc = qeth_issue_next_read(card);
2496 if (rc) {
2497 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2498 return rc;
2499 }
2500 rc = qeth_cm_enable(card);
2501 if (rc) {
2502 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2503 goto out_qdio;
2504 }
2505 rc = qeth_cm_setup(card);
2506 if (rc) {
2507 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2508 goto out_qdio;
2509 }
2510 rc = qeth_ulp_enable(card);
2511 if (rc) {
2512 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2513 goto out_qdio;
2514 }
2515 rc = qeth_ulp_setup(card);
2516 if (rc) {
2517 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2518 goto out_qdio;
2519 }
2520 rc = qeth_alloc_qdio_buffers(card);
2521 if (rc) {
2522 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2523 goto out_qdio;
2524 }
2525 rc = qeth_qdio_establish(card);
2526 if (rc) {
2527 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2528 qeth_free_qdio_buffers(card);
2529 goto out_qdio;
2530 }
2531 rc = qeth_qdio_activate(card);
2532 if (rc) {
2533 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2534 goto out_qdio;
2535 }
2536 rc = qeth_dm_act(card);
2537 if (rc) {
2538 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2539 goto out_qdio;
2540 }
2541
2542 return 0;
2543 out_qdio:
2544 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2545 return rc;
2546 }
2547
2548 static void qeth_print_status_with_portname(struct qeth_card *card)
2549 {
2550 char dbf_text[15];
2551 int i;
2552
2553 sprintf(dbf_text, "%s", card->info.portname + 1);
2554 for (i = 0; i < 8; i++)
2555 dbf_text[i] =
2556 (char) _ebcasc[(__u8) dbf_text[i]];
2557 dbf_text[8] = 0;
2558 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2559 "with link type %s (portname: %s)\n",
2560 qeth_get_cardname(card),
2561 (card->info.mcl_level[0]) ? " (level: " : "",
2562 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2563 (card->info.mcl_level[0]) ? ")" : "",
2564 qeth_get_cardname_short(card),
2565 dbf_text);
2566
2567 }
2568
2569 static void qeth_print_status_no_portname(struct qeth_card *card)
2570 {
2571 if (card->info.portname[0])
2572 dev_info(&card->gdev->dev, "Device is a%s "
2573 "card%s%s%s\nwith link type %s "
2574 "(no portname needed by interface).\n",
2575 qeth_get_cardname(card),
2576 (card->info.mcl_level[0]) ? " (level: " : "",
2577 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2578 (card->info.mcl_level[0]) ? ")" : "",
2579 qeth_get_cardname_short(card));
2580 else
2581 dev_info(&card->gdev->dev, "Device is a%s "
2582 "card%s%s%s\nwith link type %s.\n",
2583 qeth_get_cardname(card),
2584 (card->info.mcl_level[0]) ? " (level: " : "",
2585 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2586 (card->info.mcl_level[0]) ? ")" : "",
2587 qeth_get_cardname_short(card));
2588 }
2589
2590 void qeth_print_status_message(struct qeth_card *card)
2591 {
2592 switch (card->info.type) {
2593 case QETH_CARD_TYPE_OSD:
2594 case QETH_CARD_TYPE_OSM:
2595 case QETH_CARD_TYPE_OSX:
2596 /* VM will use a non-zero first character
2597 * to indicate a HiperSockets like reporting
2598 * of the level OSA sets the first character to zero
2599 * */
2600 if (!card->info.mcl_level[0]) {
2601 sprintf(card->info.mcl_level, "%02x%02x",
2602 card->info.mcl_level[2],
2603 card->info.mcl_level[3]);
2604
2605 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2606 break;
2607 }
2608 /* fallthrough */
2609 case QETH_CARD_TYPE_IQD:
2610 if ((card->info.guestlan) ||
2611 (card->info.mcl_level[0] & 0x80)) {
2612 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2613 card->info.mcl_level[0]];
2614 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2615 card->info.mcl_level[1]];
2616 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2617 card->info.mcl_level[2]];
2618 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2619 card->info.mcl_level[3]];
2620 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2621 }
2622 break;
2623 default:
2624 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2625 }
2626 if (card->info.portname_required)
2627 qeth_print_status_with_portname(card);
2628 else
2629 qeth_print_status_no_portname(card);
2630 }
2631 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2632
2633 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2634 {
2635 struct qeth_buffer_pool_entry *entry;
2636
2637 QETH_CARD_TEXT(card, 5, "inwrklst");
2638
2639 list_for_each_entry(entry,
2640 &card->qdio.init_pool.entry_list, init_list) {
2641 qeth_put_buffer_pool_entry(card, entry);
2642 }
2643 }
2644
2645 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2646 struct qeth_card *card)
2647 {
2648 struct list_head *plh;
2649 struct qeth_buffer_pool_entry *entry;
2650 int i, free;
2651 struct page *page;
2652
2653 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2654 return NULL;
2655
2656 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2657 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2658 free = 1;
2659 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2660 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2661 free = 0;
2662 break;
2663 }
2664 }
2665 if (free) {
2666 list_del_init(&entry->list);
2667 return entry;
2668 }
2669 }
2670
2671 /* no free buffer in pool so take first one and swap pages */
2672 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2673 struct qeth_buffer_pool_entry, list);
2674 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2675 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2676 page = alloc_page(GFP_ATOMIC);
2677 if (!page) {
2678 return NULL;
2679 } else {
2680 free_page((unsigned long)entry->elements[i]);
2681 entry->elements[i] = page_address(page);
2682 if (card->options.performance_stats)
2683 card->perf_stats.sg_alloc_page_rx++;
2684 }
2685 }
2686 }
2687 list_del_init(&entry->list);
2688 return entry;
2689 }
2690
2691 static int qeth_init_input_buffer(struct qeth_card *card,
2692 struct qeth_qdio_buffer *buf)
2693 {
2694 struct qeth_buffer_pool_entry *pool_entry;
2695 int i;
2696
2697 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2698 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2699 if (!buf->rx_skb)
2700 return 1;
2701 }
2702
2703 pool_entry = qeth_find_free_buffer_pool_entry(card);
2704 if (!pool_entry)
2705 return 1;
2706
2707 /*
2708 * since the buffer is accessed only from the input_tasklet
2709 * there shouldn't be a need to synchronize; also, since we use
2710 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2711 * buffers
2712 */
2713
2714 buf->pool_entry = pool_entry;
2715 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2716 buf->buffer->element[i].length = PAGE_SIZE;
2717 buf->buffer->element[i].addr = pool_entry->elements[i];
2718 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2719 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
2720 else
2721 buf->buffer->element[i].eflags = 0;
2722 buf->buffer->element[i].sflags = 0;
2723 }
2724 return 0;
2725 }
2726
2727 int qeth_init_qdio_queues(struct qeth_card *card)
2728 {
2729 int i, j;
2730 int rc;
2731
2732 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2733
2734 /* inbound queue */
2735 memset(card->qdio.in_q->qdio_bufs, 0,
2736 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2737 qeth_initialize_working_pool_list(card);
2738 /*give only as many buffers to hardware as we have buffer pool entries*/
2739 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2740 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2741 card->qdio.in_q->next_buf_to_init =
2742 card->qdio.in_buf_pool.buf_count - 1;
2743 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2744 card->qdio.in_buf_pool.buf_count - 1);
2745 if (rc) {
2746 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2747 return rc;
2748 }
2749
2750 /* completion */
2751 rc = qeth_cq_init(card);
2752 if (rc) {
2753 return rc;
2754 }
2755
2756 /* outbound queue */
2757 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2758 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2759 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2760 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2761 qeth_clear_output_buffer(card->qdio.out_qs[i],
2762 card->qdio.out_qs[i]->bufs[j],
2763 QETH_QDIO_BUF_EMPTY);
2764 }
2765 card->qdio.out_qs[i]->card = card;
2766 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2767 card->qdio.out_qs[i]->do_pack = 0;
2768 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2769 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2770 atomic_set(&card->qdio.out_qs[i]->state,
2771 QETH_OUT_Q_UNLOCKED);
2772 }
2773 return 0;
2774 }
2775 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2776
2777 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2778 {
2779 switch (link_type) {
2780 case QETH_LINK_TYPE_HSTR:
2781 return 2;
2782 default:
2783 return 1;
2784 }
2785 }
2786
2787 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2788 struct qeth_ipa_cmd *cmd, __u8 command,
2789 enum qeth_prot_versions prot)
2790 {
2791 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2792 cmd->hdr.command = command;
2793 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2794 cmd->hdr.seqno = card->seqno.ipa;
2795 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2796 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2797 if (card->options.layer2)
2798 cmd->hdr.prim_version_no = 2;
2799 else
2800 cmd->hdr.prim_version_no = 1;
2801 cmd->hdr.param_count = 1;
2802 cmd->hdr.prot_version = prot;
2803 cmd->hdr.ipa_supported = 0;
2804 cmd->hdr.ipa_enabled = 0;
2805 }
2806
2807 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2808 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2809 {
2810 struct qeth_cmd_buffer *iob;
2811 struct qeth_ipa_cmd *cmd;
2812
2813 iob = qeth_wait_for_buffer(&card->write);
2814 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2815 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2816
2817 return iob;
2818 }
2819 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2820
2821 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2822 char prot_type)
2823 {
2824 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2825 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2826 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2827 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2828 }
2829 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2830
2831 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2832 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2833 unsigned long),
2834 void *reply_param)
2835 {
2836 int rc;
2837 char prot_type;
2838
2839 QETH_CARD_TEXT(card, 4, "sendipa");
2840
2841 if (card->options.layer2)
2842 if (card->info.type == QETH_CARD_TYPE_OSN)
2843 prot_type = QETH_PROT_OSN2;
2844 else
2845 prot_type = QETH_PROT_LAYER2;
2846 else
2847 prot_type = QETH_PROT_TCPIP;
2848 qeth_prepare_ipa_cmd(card, iob, prot_type);
2849 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2850 iob, reply_cb, reply_param);
2851 if (rc == -ETIME) {
2852 qeth_clear_ipacmd_list(card);
2853 qeth_schedule_recovery(card);
2854 }
2855 return rc;
2856 }
2857 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2858
2859 int qeth_send_startlan(struct qeth_card *card)
2860 {
2861 int rc;
2862 struct qeth_cmd_buffer *iob;
2863
2864 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2865
2866 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2867 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2868 return rc;
2869 }
2870 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2871
2872 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2873 struct qeth_reply *reply, unsigned long data)
2874 {
2875 struct qeth_ipa_cmd *cmd;
2876
2877 QETH_CARD_TEXT(card, 4, "defadpcb");
2878
2879 cmd = (struct qeth_ipa_cmd *) data;
2880 if (cmd->hdr.return_code == 0)
2881 cmd->hdr.return_code =
2882 cmd->data.setadapterparms.hdr.return_code;
2883 return 0;
2884 }
2885 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2886
2887 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2888 struct qeth_reply *reply, unsigned long data)
2889 {
2890 struct qeth_ipa_cmd *cmd;
2891
2892 QETH_CARD_TEXT(card, 3, "quyadpcb");
2893
2894 cmd = (struct qeth_ipa_cmd *) data;
2895 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
2896 card->info.link_type =
2897 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2898 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2899 }
2900 card->options.adp.supported_funcs =
2901 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2902 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2903 }
2904
2905 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2906 __u32 command, __u32 cmdlen)
2907 {
2908 struct qeth_cmd_buffer *iob;
2909 struct qeth_ipa_cmd *cmd;
2910
2911 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2912 QETH_PROT_IPV4);
2913 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2914 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2915 cmd->data.setadapterparms.hdr.command_code = command;
2916 cmd->data.setadapterparms.hdr.used_total = 1;
2917 cmd->data.setadapterparms.hdr.seq_no = 1;
2918
2919 return iob;
2920 }
2921 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2922
2923 int qeth_query_setadapterparms(struct qeth_card *card)
2924 {
2925 int rc;
2926 struct qeth_cmd_buffer *iob;
2927
2928 QETH_CARD_TEXT(card, 3, "queryadp");
2929 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2930 sizeof(struct qeth_ipacmd_setadpparms));
2931 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2932 return rc;
2933 }
2934 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2935
2936 static int qeth_query_ipassists_cb(struct qeth_card *card,
2937 struct qeth_reply *reply, unsigned long data)
2938 {
2939 struct qeth_ipa_cmd *cmd;
2940
2941 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2942
2943 cmd = (struct qeth_ipa_cmd *) data;
2944
2945 switch (cmd->hdr.return_code) {
2946 case IPA_RC_NOTSUPP:
2947 case IPA_RC_L2_UNSUPPORTED_CMD:
2948 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
2949 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
2950 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
2951 return -0;
2952 default:
2953 if (cmd->hdr.return_code) {
2954 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
2955 "rc=%d\n",
2956 dev_name(&card->gdev->dev),
2957 cmd->hdr.return_code);
2958 return 0;
2959 }
2960 }
2961
2962 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2963 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2964 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
2965 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
2966 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2967 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
2968 } else
2969 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
2970 "\n", dev_name(&card->gdev->dev));
2971 QETH_DBF_TEXT(SETUP, 2, "suppenbl");
2972 QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_supported);
2973 QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_enabled);
2974 return 0;
2975 }
2976
2977 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
2978 {
2979 int rc;
2980 struct qeth_cmd_buffer *iob;
2981
2982 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
2983 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
2984 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
2985 return rc;
2986 }
2987 EXPORT_SYMBOL_GPL(qeth_query_ipassists);
2988
2989 static int qeth_query_setdiagass_cb(struct qeth_card *card,
2990 struct qeth_reply *reply, unsigned long data)
2991 {
2992 struct qeth_ipa_cmd *cmd;
2993 __u16 rc;
2994
2995 cmd = (struct qeth_ipa_cmd *)data;
2996 rc = cmd->hdr.return_code;
2997 if (rc)
2998 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
2999 else
3000 card->info.diagass_support = cmd->data.diagass.ext;
3001 return 0;
3002 }
3003
3004 static int qeth_query_setdiagass(struct qeth_card *card)
3005 {
3006 struct qeth_cmd_buffer *iob;
3007 struct qeth_ipa_cmd *cmd;
3008
3009 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3010 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3011 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3012 cmd->data.diagass.subcmd_len = 16;
3013 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3014 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3015 }
3016
3017 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3018 {
3019 unsigned long info = get_zeroed_page(GFP_KERNEL);
3020 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3021 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3022 struct ccw_dev_id ccwid;
3023 int level;
3024
3025 tid->chpid = card->info.chpid;
3026 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3027 tid->ssid = ccwid.ssid;
3028 tid->devno = ccwid.devno;
3029 if (!info)
3030 return;
3031 level = stsi(NULL, 0, 0, 0);
3032 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
3033 tid->lparnr = info222->lpar_number;
3034 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
3035 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3036 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3037 }
3038 free_page(info);
3039 return;
3040 }
3041
3042 static int qeth_hw_trap_cb(struct qeth_card *card,
3043 struct qeth_reply *reply, unsigned long data)
3044 {
3045 struct qeth_ipa_cmd *cmd;
3046 __u16 rc;
3047
3048 cmd = (struct qeth_ipa_cmd *)data;
3049 rc = cmd->hdr.return_code;
3050 if (rc)
3051 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3052 return 0;
3053 }
3054
3055 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3056 {
3057 struct qeth_cmd_buffer *iob;
3058 struct qeth_ipa_cmd *cmd;
3059
3060 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3061 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3062 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3063 cmd->data.diagass.subcmd_len = 80;
3064 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3065 cmd->data.diagass.type = 1;
3066 cmd->data.diagass.action = action;
3067 switch (action) {
3068 case QETH_DIAGS_TRAP_ARM:
3069 cmd->data.diagass.options = 0x0003;
3070 cmd->data.diagass.ext = 0x00010000 +
3071 sizeof(struct qeth_trap_id);
3072 qeth_get_trap_id(card,
3073 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3074 break;
3075 case QETH_DIAGS_TRAP_DISARM:
3076 cmd->data.diagass.options = 0x0001;
3077 break;
3078 case QETH_DIAGS_TRAP_CAPTURE:
3079 break;
3080 }
3081 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3082 }
3083 EXPORT_SYMBOL_GPL(qeth_hw_trap);
3084
3085 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3086 unsigned int qdio_error, const char *dbftext)
3087 {
3088 if (qdio_error) {
3089 QETH_CARD_TEXT(card, 2, dbftext);
3090 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3091 buf->element[15].sflags);
3092 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3093 buf->element[14].sflags);
3094 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3095 if ((buf->element[15].sflags) == 0x12) {
3096 card->stats.rx_dropped++;
3097 return 0;
3098 } else
3099 return 1;
3100 }
3101 return 0;
3102 }
3103 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3104
3105 void qeth_buffer_reclaim_work(struct work_struct *work)
3106 {
3107 struct qeth_card *card = container_of(work, struct qeth_card,
3108 buffer_reclaim_work.work);
3109
3110 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3111 qeth_queue_input_buffer(card, card->reclaim_index);
3112 }
3113
3114 void qeth_queue_input_buffer(struct qeth_card *card, int index)
3115 {
3116 struct qeth_qdio_q *queue = card->qdio.in_q;
3117 struct list_head *lh;
3118 int count;
3119 int i;
3120 int rc;
3121 int newcount = 0;
3122
3123 count = (index < queue->next_buf_to_init)?
3124 card->qdio.in_buf_pool.buf_count -
3125 (queue->next_buf_to_init - index) :
3126 card->qdio.in_buf_pool.buf_count -
3127 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3128 /* only requeue at a certain threshold to avoid SIGAs */
3129 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3130 for (i = queue->next_buf_to_init;
3131 i < queue->next_buf_to_init + count; ++i) {
3132 if (qeth_init_input_buffer(card,
3133 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3134 break;
3135 } else {
3136 newcount++;
3137 }
3138 }
3139
3140 if (newcount < count) {
3141 /* we are in memory shortage so we switch back to
3142 traditional skb allocation and drop packages */
3143 atomic_set(&card->force_alloc_skb, 3);
3144 count = newcount;
3145 } else {
3146 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3147 }
3148
3149 if (!count) {
3150 i = 0;
3151 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3152 i++;
3153 if (i == card->qdio.in_buf_pool.buf_count) {
3154 QETH_CARD_TEXT(card, 2, "qsarbw");
3155 card->reclaim_index = index;
3156 schedule_delayed_work(
3157 &card->buffer_reclaim_work,
3158 QETH_RECLAIM_WORK_TIME);
3159 }
3160 return;
3161 }
3162
3163 /*
3164 * according to old code it should be avoided to requeue all
3165 * 128 buffers in order to benefit from PCI avoidance.
3166 * this function keeps at least one buffer (the buffer at
3167 * 'index') un-requeued -> this buffer is the first buffer that
3168 * will be requeued the next time
3169 */
3170 if (card->options.performance_stats) {
3171 card->perf_stats.inbound_do_qdio_cnt++;
3172 card->perf_stats.inbound_do_qdio_start_time =
3173 qeth_get_micros();
3174 }
3175 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3176 queue->next_buf_to_init, count);
3177 if (card->options.performance_stats)
3178 card->perf_stats.inbound_do_qdio_time +=
3179 qeth_get_micros() -
3180 card->perf_stats.inbound_do_qdio_start_time;
3181 if (rc) {
3182 QETH_CARD_TEXT(card, 2, "qinberr");
3183 }
3184 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3185 QDIO_MAX_BUFFERS_PER_Q;
3186 }
3187 }
3188 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3189
3190 static int qeth_handle_send_error(struct qeth_card *card,
3191 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
3192 {
3193 int sbalf15 = buffer->buffer->element[15].sflags;
3194
3195 QETH_CARD_TEXT(card, 6, "hdsnderr");
3196 if (card->info.type == QETH_CARD_TYPE_IQD) {
3197 if (sbalf15 == 0) {
3198 qdio_err = 0;
3199 } else {
3200 qdio_err = 1;
3201 }
3202 }
3203 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
3204
3205 if (!qdio_err)
3206 return QETH_SEND_ERROR_NONE;
3207
3208 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3209 return QETH_SEND_ERROR_RETRY;
3210
3211 QETH_CARD_TEXT(card, 1, "lnkfail");
3212 QETH_CARD_TEXT_(card, 1, "%04x %02x",
3213 (u16)qdio_err, (u8)sbalf15);
3214 return QETH_SEND_ERROR_LINK_FAILURE;
3215 }
3216
3217 /*
3218 * Switched to packing state if the number of used buffers on a queue
3219 * reaches a certain limit.
3220 */
3221 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3222 {
3223 if (!queue->do_pack) {
3224 if (atomic_read(&queue->used_buffers)
3225 >= QETH_HIGH_WATERMARK_PACK){
3226 /* switch non-PACKING -> PACKING */
3227 QETH_CARD_TEXT(queue->card, 6, "np->pack");
3228 if (queue->card->options.performance_stats)
3229 queue->card->perf_stats.sc_dp_p++;
3230 queue->do_pack = 1;
3231 }
3232 }
3233 }
3234
3235 /*
3236 * Switches from packing to non-packing mode. If there is a packing
3237 * buffer on the queue this buffer will be prepared to be flushed.
3238 * In that case 1 is returned to inform the caller. If no buffer
3239 * has to be flushed, zero is returned.
3240 */
3241 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3242 {
3243 struct qeth_qdio_out_buffer *buffer;
3244 int flush_count = 0;
3245
3246 if (queue->do_pack) {
3247 if (atomic_read(&queue->used_buffers)
3248 <= QETH_LOW_WATERMARK_PACK) {
3249 /* switch PACKING -> non-PACKING */
3250 QETH_CARD_TEXT(queue->card, 6, "pack->np");
3251 if (queue->card->options.performance_stats)
3252 queue->card->perf_stats.sc_p_dp++;
3253 queue->do_pack = 0;
3254 /* flush packing buffers */
3255 buffer = queue->bufs[queue->next_buf_to_fill];
3256 if ((atomic_read(&buffer->state) ==
3257 QETH_QDIO_BUF_EMPTY) &&
3258 (buffer->next_element_to_fill > 0)) {
3259 atomic_set(&buffer->state,
3260 QETH_QDIO_BUF_PRIMED);
3261 flush_count++;
3262 queue->next_buf_to_fill =
3263 (queue->next_buf_to_fill + 1) %
3264 QDIO_MAX_BUFFERS_PER_Q;
3265 }
3266 }
3267 }
3268 return flush_count;
3269 }
3270
3271
3272 /*
3273 * Called to flush a packing buffer if no more pci flags are on the queue.
3274 * Checks if there is a packing buffer and prepares it to be flushed.
3275 * In that case returns 1, otherwise zero.
3276 */
3277 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3278 {
3279 struct qeth_qdio_out_buffer *buffer;
3280
3281 buffer = queue->bufs[queue->next_buf_to_fill];
3282 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3283 (buffer->next_element_to_fill > 0)) {
3284 /* it's a packing buffer */
3285 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3286 queue->next_buf_to_fill =
3287 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3288 return 1;
3289 }
3290 return 0;
3291 }
3292
3293 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3294 int count)
3295 {
3296 struct qeth_qdio_out_buffer *buf;
3297 int rc;
3298 int i;
3299 unsigned int qdio_flags;
3300
3301 for (i = index; i < index + count; ++i) {
3302 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3303 buf = queue->bufs[bidx];
3304 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3305 SBAL_EFLAGS_LAST_ENTRY;
3306
3307 if (queue->bufstates)
3308 queue->bufstates[bidx].user = buf;
3309
3310 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3311 continue;
3312
3313 if (!queue->do_pack) {
3314 if ((atomic_read(&queue->used_buffers) >=
3315 (QETH_HIGH_WATERMARK_PACK -
3316 QETH_WATERMARK_PACK_FUZZ)) &&
3317 !atomic_read(&queue->set_pci_flags_count)) {
3318 /* it's likely that we'll go to packing
3319 * mode soon */
3320 atomic_inc(&queue->set_pci_flags_count);
3321 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3322 }
3323 } else {
3324 if (!atomic_read(&queue->set_pci_flags_count)) {
3325 /*
3326 * there's no outstanding PCI any more, so we
3327 * have to request a PCI to be sure the the PCI
3328 * will wake at some time in the future then we
3329 * can flush packed buffers that might still be
3330 * hanging around, which can happen if no
3331 * further send was requested by the stack
3332 */
3333 atomic_inc(&queue->set_pci_flags_count);
3334 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3335 }
3336 }
3337 }
3338
3339 queue->card->dev->trans_start = jiffies;
3340 if (queue->card->options.performance_stats) {
3341 queue->card->perf_stats.outbound_do_qdio_cnt++;
3342 queue->card->perf_stats.outbound_do_qdio_start_time =
3343 qeth_get_micros();
3344 }
3345 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
3346 if (atomic_read(&queue->set_pci_flags_count))
3347 qdio_flags |= QDIO_FLAG_PCI_OUT;
3348 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
3349 queue->queue_no, index, count);
3350 if (queue->card->options.performance_stats)
3351 queue->card->perf_stats.outbound_do_qdio_time +=
3352 qeth_get_micros() -
3353 queue->card->perf_stats.outbound_do_qdio_start_time;
3354 atomic_add(count, &queue->used_buffers);
3355 if (rc) {
3356 queue->card->stats.tx_errors += count;
3357 /* ignore temporary SIGA errors without busy condition */
3358 if (rc == -ENOBUFS)
3359 return;
3360 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
3361 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3362 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3363 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
3364 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
3365
3366 /* this must not happen under normal circumstances. if it
3367 * happens something is really wrong -> recover */
3368 qeth_schedule_recovery(queue->card);
3369 return;
3370 }
3371 if (queue->card->options.performance_stats)
3372 queue->card->perf_stats.bufs_sent += count;
3373 }
3374
3375 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3376 {
3377 int index;
3378 int flush_cnt = 0;
3379 int q_was_packing = 0;
3380
3381 /*
3382 * check if weed have to switch to non-packing mode or if
3383 * we have to get a pci flag out on the queue
3384 */
3385 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3386 !atomic_read(&queue->set_pci_flags_count)) {
3387 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3388 QETH_OUT_Q_UNLOCKED) {
3389 /*
3390 * If we get in here, there was no action in
3391 * do_send_packet. So, we check if there is a
3392 * packing buffer to be flushed here.
3393 */
3394 netif_stop_queue(queue->card->dev);
3395 index = queue->next_buf_to_fill;
3396 q_was_packing = queue->do_pack;
3397 /* queue->do_pack may change */
3398 barrier();
3399 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3400 if (!flush_cnt &&
3401 !atomic_read(&queue->set_pci_flags_count))
3402 flush_cnt +=
3403 qeth_flush_buffers_on_no_pci(queue);
3404 if (queue->card->options.performance_stats &&
3405 q_was_packing)
3406 queue->card->perf_stats.bufs_sent_pack +=
3407 flush_cnt;
3408 if (flush_cnt)
3409 qeth_flush_buffers(queue, index, flush_cnt);
3410 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3411 }
3412 }
3413 }
3414
3415 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3416 unsigned long card_ptr)
3417 {
3418 struct qeth_card *card = (struct qeth_card *)card_ptr;
3419
3420 if (card->dev && (card->dev->flags & IFF_UP))
3421 napi_schedule(&card->napi);
3422 }
3423 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3424
3425 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3426 {
3427 int rc;
3428
3429 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3430 rc = -1;
3431 goto out;
3432 } else {
3433 if (card->options.cq == cq) {
3434 rc = 0;
3435 goto out;
3436 }
3437
3438 if (card->state != CARD_STATE_DOWN &&
3439 card->state != CARD_STATE_RECOVER) {
3440 rc = -1;
3441 goto out;
3442 }
3443
3444 qeth_free_qdio_buffers(card);
3445 card->options.cq = cq;
3446 rc = 0;
3447 }
3448 out:
3449 return rc;
3450
3451 }
3452 EXPORT_SYMBOL_GPL(qeth_configure_cq);
3453
3454
3455 static void qeth_qdio_cq_handler(struct qeth_card *card,
3456 unsigned int qdio_err,
3457 unsigned int queue, int first_element, int count) {
3458 struct qeth_qdio_q *cq = card->qdio.c_q;
3459 int i;
3460 int rc;
3461
3462 if (!qeth_is_cq(card, queue))
3463 goto out;
3464
3465 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3466 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3467 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3468
3469 if (qdio_err) {
3470 netif_stop_queue(card->dev);
3471 qeth_schedule_recovery(card);
3472 goto out;
3473 }
3474
3475 if (card->options.performance_stats) {
3476 card->perf_stats.cq_cnt++;
3477 card->perf_stats.cq_start_time = qeth_get_micros();
3478 }
3479
3480 for (i = first_element; i < first_element + count; ++i) {
3481 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3482 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3483 int e;
3484
3485 e = 0;
3486 while (buffer->element[e].addr) {
3487 unsigned long phys_aob_addr;
3488
3489 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3490 qeth_qdio_handle_aob(card, phys_aob_addr);
3491 buffer->element[e].addr = NULL;
3492 buffer->element[e].eflags = 0;
3493 buffer->element[e].sflags = 0;
3494 buffer->element[e].length = 0;
3495
3496 ++e;
3497 }
3498
3499 buffer->element[15].eflags = 0;
3500 buffer->element[15].sflags = 0;
3501 }
3502 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3503 card->qdio.c_q->next_buf_to_init,
3504 count);
3505 if (rc) {
3506 dev_warn(&card->gdev->dev,
3507 "QDIO reported an error, rc=%i\n", rc);
3508 QETH_CARD_TEXT(card, 2, "qcqherr");
3509 }
3510 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3511 + count) % QDIO_MAX_BUFFERS_PER_Q;
3512
3513 netif_wake_queue(card->dev);
3514
3515 if (card->options.performance_stats) {
3516 int delta_t = qeth_get_micros();
3517 delta_t -= card->perf_stats.cq_start_time;
3518 card->perf_stats.cq_time += delta_t;
3519 }
3520 out:
3521 return;
3522 }
3523
3524 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
3525 unsigned int queue, int first_elem, int count,
3526 unsigned long card_ptr)
3527 {
3528 struct qeth_card *card = (struct qeth_card *)card_ptr;
3529
3530 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3531 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3532
3533 if (qeth_is_cq(card, queue))
3534 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3535 else if (qdio_err)
3536 qeth_schedule_recovery(card);
3537
3538
3539 }
3540 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3541
3542 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3543 unsigned int qdio_error, int __queue, int first_element,
3544 int count, unsigned long card_ptr)
3545 {
3546 struct qeth_card *card = (struct qeth_card *) card_ptr;
3547 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3548 struct qeth_qdio_out_buffer *buffer;
3549 int i;
3550
3551 QETH_CARD_TEXT(card, 6, "qdouhdl");
3552 if (qdio_error & QDIO_ERROR_FATAL) {
3553 QETH_CARD_TEXT(card, 2, "achkcond");
3554 netif_stop_queue(card->dev);
3555 qeth_schedule_recovery(card);
3556 return;
3557 }
3558 if (card->options.performance_stats) {
3559 card->perf_stats.outbound_handler_cnt++;
3560 card->perf_stats.outbound_handler_start_time =
3561 qeth_get_micros();
3562 }
3563 for (i = first_element; i < (first_element + count); ++i) {
3564 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3565 buffer = queue->bufs[bidx];
3566 qeth_handle_send_error(card, buffer, qdio_error);
3567
3568 if (queue->bufstates &&
3569 (queue->bufstates[bidx].flags &
3570 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
3571 BUG_ON(card->options.cq != QETH_CQ_ENABLED);
3572
3573 if (atomic_cmpxchg(&buffer->state,
3574 QETH_QDIO_BUF_PRIMED,
3575 QETH_QDIO_BUF_PENDING) ==
3576 QETH_QDIO_BUF_PRIMED) {
3577 qeth_notify_skbs(queue, buffer,
3578 TX_NOTIFY_PENDING);
3579 }
3580 buffer->aob = queue->bufstates[bidx].aob;
3581 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
3582 QETH_CARD_TEXT(queue->card, 5, "aob");
3583 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3584 virt_to_phys(buffer->aob));
3585 BUG_ON(bidx < 0 || bidx >= QDIO_MAX_BUFFERS_PER_Q);
3586 if (qeth_init_qdio_out_buf(queue, bidx)) {
3587 QETH_CARD_TEXT(card, 2, "outofbuf");
3588 qeth_schedule_recovery(card);
3589 }
3590 } else {
3591 if (card->options.cq == QETH_CQ_ENABLED) {
3592 enum iucv_tx_notify n;
3593
3594 n = qeth_compute_cq_notification(
3595 buffer->buffer->element[15].sflags, 0);
3596 qeth_notify_skbs(queue, buffer, n);
3597 }
3598
3599 qeth_clear_output_buffer(queue, buffer,
3600 QETH_QDIO_BUF_EMPTY);
3601 }
3602 qeth_cleanup_handled_pending(queue, bidx, 0);
3603 }
3604 atomic_sub(count, &queue->used_buffers);
3605 /* check if we need to do something on this outbound queue */
3606 if (card->info.type != QETH_CARD_TYPE_IQD)
3607 qeth_check_outbound_queue(queue);
3608
3609 netif_wake_queue(queue->card->dev);
3610 if (card->options.performance_stats)
3611 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3612 card->perf_stats.outbound_handler_start_time;
3613 }
3614 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3615
3616 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3617 int ipv, int cast_type)
3618 {
3619 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3620 card->info.type == QETH_CARD_TYPE_OSX))
3621 return card->qdio.default_out_queue;
3622 switch (card->qdio.no_out_queues) {
3623 case 4:
3624 if (cast_type && card->info.is_multicast_different)
3625 return card->info.is_multicast_different &
3626 (card->qdio.no_out_queues - 1);
3627 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3628 const u8 tos = ip_hdr(skb)->tos;
3629
3630 if (card->qdio.do_prio_queueing ==
3631 QETH_PRIO_Q_ING_TOS) {
3632 if (tos & IP_TOS_NOTIMPORTANT)
3633 return 3;
3634 if (tos & IP_TOS_HIGHRELIABILITY)
3635 return 2;
3636 if (tos & IP_TOS_HIGHTHROUGHPUT)
3637 return 1;
3638 if (tos & IP_TOS_LOWDELAY)
3639 return 0;
3640 }
3641 if (card->qdio.do_prio_queueing ==
3642 QETH_PRIO_Q_ING_PREC)
3643 return 3 - (tos >> 6);
3644 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3645 /* TODO: IPv6!!! */
3646 }
3647 return card->qdio.default_out_queue;
3648 case 1: /* fallthrough for single-out-queue 1920-device */
3649 default:
3650 return card->qdio.default_out_queue;
3651 }
3652 }
3653 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3654
3655 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3656 struct sk_buff *skb, int elems)
3657 {
3658 int dlen = skb->len - skb->data_len;
3659 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3660 PFN_DOWN((unsigned long)skb->data);
3661
3662 elements_needed += skb_shinfo(skb)->nr_frags;
3663 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3664 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3665 "(Number=%d / Length=%d). Discarded.\n",
3666 (elements_needed+elems), skb->len);
3667 return 0;
3668 }
3669 return elements_needed;
3670 }
3671 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3672
3673 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3674 {
3675 int hroom, inpage, rest;
3676
3677 if (((unsigned long)skb->data & PAGE_MASK) !=
3678 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3679 hroom = skb_headroom(skb);
3680 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3681 rest = len - inpage;
3682 if (rest > hroom)
3683 return 1;
3684 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3685 skb->data -= rest;
3686 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3687 }
3688 return 0;
3689 }
3690 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3691
3692 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3693 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3694 int offset)
3695 {
3696 int length = skb->len - skb->data_len;
3697 int length_here;
3698 int element;
3699 char *data;
3700 int first_lap, cnt;
3701 struct skb_frag_struct *frag;
3702
3703 element = *next_element_to_fill;
3704 data = skb->data;
3705 first_lap = (is_tso == 0 ? 1 : 0);
3706
3707 if (offset >= 0) {
3708 data = skb->data + offset;
3709 length -= offset;
3710 first_lap = 0;
3711 }
3712
3713 while (length > 0) {
3714 /* length_here is the remaining amount of data in this page */
3715 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3716 if (length < length_here)
3717 length_here = length;
3718
3719 buffer->element[element].addr = data;
3720 buffer->element[element].length = length_here;
3721 length -= length_here;
3722 if (!length) {
3723 if (first_lap)
3724 if (skb_shinfo(skb)->nr_frags)
3725 buffer->element[element].eflags =
3726 SBAL_EFLAGS_FIRST_FRAG;
3727 else
3728 buffer->element[element].eflags = 0;
3729 else
3730 buffer->element[element].eflags =
3731 SBAL_EFLAGS_MIDDLE_FRAG;
3732 } else {
3733 if (first_lap)
3734 buffer->element[element].eflags =
3735 SBAL_EFLAGS_FIRST_FRAG;
3736 else
3737 buffer->element[element].eflags =
3738 SBAL_EFLAGS_MIDDLE_FRAG;
3739 }
3740 data += length_here;
3741 element++;
3742 first_lap = 0;
3743 }
3744
3745 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3746 frag = &skb_shinfo(skb)->frags[cnt];
3747 buffer->element[element].addr = (char *)
3748 page_to_phys(skb_frag_page(frag))
3749 + frag->page_offset;
3750 buffer->element[element].length = frag->size;
3751 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG;
3752 element++;
3753 }
3754
3755 if (buffer->element[element - 1].eflags)
3756 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
3757 *next_element_to_fill = element;
3758 }
3759
3760 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3761 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3762 struct qeth_hdr *hdr, int offset, int hd_len)
3763 {
3764 struct qdio_buffer *buffer;
3765 int flush_cnt = 0, hdr_len, large_send = 0;
3766
3767 buffer = buf->buffer;
3768 atomic_inc(&skb->users);
3769 skb_queue_tail(&buf->skb_list, skb);
3770
3771 /*check first on TSO ....*/
3772 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3773 int element = buf->next_element_to_fill;
3774
3775 hdr_len = sizeof(struct qeth_hdr_tso) +
3776 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3777 /*fill first buffer entry only with header information */
3778 buffer->element[element].addr = skb->data;
3779 buffer->element[element].length = hdr_len;
3780 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3781 buf->next_element_to_fill++;
3782 skb->data += hdr_len;
3783 skb->len -= hdr_len;
3784 large_send = 1;
3785 }
3786
3787 if (offset >= 0) {
3788 int element = buf->next_element_to_fill;
3789 buffer->element[element].addr = hdr;
3790 buffer->element[element].length = sizeof(struct qeth_hdr) +
3791 hd_len;
3792 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3793 buf->is_header[element] = 1;
3794 buf->next_element_to_fill++;
3795 }
3796
3797 __qeth_fill_buffer(skb, buffer, large_send,
3798 (int *)&buf->next_element_to_fill, offset);
3799
3800 if (!queue->do_pack) {
3801 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
3802 /* set state to PRIMED -> will be flushed */
3803 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3804 flush_cnt = 1;
3805 } else {
3806 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
3807 if (queue->card->options.performance_stats)
3808 queue->card->perf_stats.skbs_sent_pack++;
3809 if (buf->next_element_to_fill >=
3810 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3811 /*
3812 * packed buffer if full -> set state PRIMED
3813 * -> will be flushed
3814 */
3815 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3816 flush_cnt = 1;
3817 }
3818 }
3819 return flush_cnt;
3820 }
3821
3822 int qeth_do_send_packet_fast(struct qeth_card *card,
3823 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3824 struct qeth_hdr *hdr, int elements_needed,
3825 int offset, int hd_len)
3826 {
3827 struct qeth_qdio_out_buffer *buffer;
3828 int index;
3829
3830 /* spin until we get the queue ... */
3831 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3832 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3833 /* ... now we've got the queue */
3834 index = queue->next_buf_to_fill;
3835 buffer = queue->bufs[queue->next_buf_to_fill];
3836 /*
3837 * check if buffer is empty to make sure that we do not 'overtake'
3838 * ourselves and try to fill a buffer that is already primed
3839 */
3840 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3841 goto out;
3842 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3843 QDIO_MAX_BUFFERS_PER_Q;
3844 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3845 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3846 qeth_flush_buffers(queue, index, 1);
3847 return 0;
3848 out:
3849 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3850 return -EBUSY;
3851 }
3852 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3853
3854 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3855 struct sk_buff *skb, struct qeth_hdr *hdr,
3856 int elements_needed)
3857 {
3858 struct qeth_qdio_out_buffer *buffer;
3859 int start_index;
3860 int flush_count = 0;
3861 int do_pack = 0;
3862 int tmp;
3863 int rc = 0;
3864
3865 /* spin until we get the queue ... */
3866 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3867 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3868 start_index = queue->next_buf_to_fill;
3869 buffer = queue->bufs[queue->next_buf_to_fill];
3870 /*
3871 * check if buffer is empty to make sure that we do not 'overtake'
3872 * ourselves and try to fill a buffer that is already primed
3873 */
3874 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3875 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3876 return -EBUSY;
3877 }
3878 /* check if we need to switch packing state of this queue */
3879 qeth_switch_to_packing_if_needed(queue);
3880 if (queue->do_pack) {
3881 do_pack = 1;
3882 /* does packet fit in current buffer? */
3883 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3884 buffer->next_element_to_fill) < elements_needed) {
3885 /* ... no -> set state PRIMED */
3886 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3887 flush_count++;
3888 queue->next_buf_to_fill =
3889 (queue->next_buf_to_fill + 1) %
3890 QDIO_MAX_BUFFERS_PER_Q;
3891 buffer = queue->bufs[queue->next_buf_to_fill];
3892 /* we did a step forward, so check buffer state
3893 * again */
3894 if (atomic_read(&buffer->state) !=
3895 QETH_QDIO_BUF_EMPTY) {
3896 qeth_flush_buffers(queue, start_index,
3897 flush_count);
3898 atomic_set(&queue->state,
3899 QETH_OUT_Q_UNLOCKED);
3900 return -EBUSY;
3901 }
3902 }
3903 }
3904 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3905 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3906 QDIO_MAX_BUFFERS_PER_Q;
3907 flush_count += tmp;
3908 if (flush_count)
3909 qeth_flush_buffers(queue, start_index, flush_count);
3910 else if (!atomic_read(&queue->set_pci_flags_count))
3911 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3912 /*
3913 * queue->state will go from LOCKED -> UNLOCKED or from
3914 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3915 * (switch packing state or flush buffer to get another pci flag out).
3916 * In that case we will enter this loop
3917 */
3918 while (atomic_dec_return(&queue->state)) {
3919 flush_count = 0;
3920 start_index = queue->next_buf_to_fill;
3921 /* check if we can go back to non-packing state */
3922 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3923 /*
3924 * check if we need to flush a packing buffer to get a pci
3925 * flag out on the queue
3926 */
3927 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3928 flush_count += qeth_flush_buffers_on_no_pci(queue);
3929 if (flush_count)
3930 qeth_flush_buffers(queue, start_index, flush_count);
3931 }
3932 /* at this point the queue is UNLOCKED again */
3933 if (queue->card->options.performance_stats && do_pack)
3934 queue->card->perf_stats.bufs_sent_pack += flush_count;
3935
3936 return rc;
3937 }
3938 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3939
3940 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3941 struct qeth_reply *reply, unsigned long data)
3942 {
3943 struct qeth_ipa_cmd *cmd;
3944 struct qeth_ipacmd_setadpparms *setparms;
3945
3946 QETH_CARD_TEXT(card, 4, "prmadpcb");
3947
3948 cmd = (struct qeth_ipa_cmd *) data;
3949 setparms = &(cmd->data.setadapterparms);
3950
3951 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3952 if (cmd->hdr.return_code) {
3953 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
3954 setparms->data.mode = SET_PROMISC_MODE_OFF;
3955 }
3956 card->info.promisc_mode = setparms->data.mode;
3957 return 0;
3958 }
3959
3960 void qeth_setadp_promisc_mode(struct qeth_card *card)
3961 {
3962 enum qeth_ipa_promisc_modes mode;
3963 struct net_device *dev = card->dev;
3964 struct qeth_cmd_buffer *iob;
3965 struct qeth_ipa_cmd *cmd;
3966
3967 QETH_CARD_TEXT(card, 4, "setprom");
3968
3969 if (((dev->flags & IFF_PROMISC) &&
3970 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3971 (!(dev->flags & IFF_PROMISC) &&
3972 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3973 return;
3974 mode = SET_PROMISC_MODE_OFF;
3975 if (dev->flags & IFF_PROMISC)
3976 mode = SET_PROMISC_MODE_ON;
3977 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
3978
3979 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3980 sizeof(struct qeth_ipacmd_setadpparms));
3981 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3982 cmd->data.setadapterparms.data.mode = mode;
3983 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3984 }
3985 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3986
3987 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3988 {
3989 struct qeth_card *card;
3990 char dbf_text[15];
3991
3992 card = dev->ml_priv;
3993
3994 QETH_CARD_TEXT(card, 4, "chgmtu");
3995 sprintf(dbf_text, "%8x", new_mtu);
3996 QETH_CARD_TEXT(card, 4, dbf_text);
3997
3998 if (new_mtu < 64)
3999 return -EINVAL;
4000 if (new_mtu > 65535)
4001 return -EINVAL;
4002 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
4003 (!qeth_mtu_is_valid(card, new_mtu)))
4004 return -EINVAL;
4005 dev->mtu = new_mtu;
4006 return 0;
4007 }
4008 EXPORT_SYMBOL_GPL(qeth_change_mtu);
4009
4010 struct net_device_stats *qeth_get_stats(struct net_device *dev)
4011 {
4012 struct qeth_card *card;
4013
4014 card = dev->ml_priv;
4015
4016 QETH_CARD_TEXT(card, 5, "getstat");
4017
4018 return &card->stats;
4019 }
4020 EXPORT_SYMBOL_GPL(qeth_get_stats);
4021
4022 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4023 struct qeth_reply *reply, unsigned long data)
4024 {
4025 struct qeth_ipa_cmd *cmd;
4026
4027 QETH_CARD_TEXT(card, 4, "chgmaccb");
4028
4029 cmd = (struct qeth_ipa_cmd *) data;
4030 if (!card->options.layer2 ||
4031 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4032 memcpy(card->dev->dev_addr,
4033 &cmd->data.setadapterparms.data.change_addr.addr,
4034 OSA_ADDR_LEN);
4035 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4036 }
4037 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4038 return 0;
4039 }
4040
4041 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4042 {
4043 int rc;
4044 struct qeth_cmd_buffer *iob;
4045 struct qeth_ipa_cmd *cmd;
4046
4047 QETH_CARD_TEXT(card, 4, "chgmac");
4048
4049 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4050 sizeof(struct qeth_ipacmd_setadpparms));
4051 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4052 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4053 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4054 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4055 card->dev->dev_addr, OSA_ADDR_LEN);
4056 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4057 NULL);
4058 return rc;
4059 }
4060 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4061
4062 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4063 struct qeth_reply *reply, unsigned long data)
4064 {
4065 struct qeth_ipa_cmd *cmd;
4066 struct qeth_set_access_ctrl *access_ctrl_req;
4067
4068 QETH_CARD_TEXT(card, 4, "setaccb");
4069
4070 cmd = (struct qeth_ipa_cmd *) data;
4071 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4072 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4073 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4074 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4075 cmd->data.setadapterparms.hdr.return_code);
4076 switch (cmd->data.setadapterparms.hdr.return_code) {
4077 case SET_ACCESS_CTRL_RC_SUCCESS:
4078 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4079 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4080 {
4081 card->options.isolation = access_ctrl_req->subcmd_code;
4082 if (card->options.isolation == ISOLATION_MODE_NONE) {
4083 dev_info(&card->gdev->dev,
4084 "QDIO data connection isolation is deactivated\n");
4085 } else {
4086 dev_info(&card->gdev->dev,
4087 "QDIO data connection isolation is activated\n");
4088 }
4089 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
4090 card->gdev->dev.kobj.name,
4091 access_ctrl_req->subcmd_code,
4092 cmd->data.setadapterparms.hdr.return_code);
4093 break;
4094 }
4095 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
4096 {
4097 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4098 card->gdev->dev.kobj.name,
4099 access_ctrl_req->subcmd_code,
4100 cmd->data.setadapterparms.hdr.return_code);
4101 dev_err(&card->gdev->dev, "Adapter does not "
4102 "support QDIO data connection isolation\n");
4103
4104 /* ensure isolation mode is "none" */
4105 card->options.isolation = ISOLATION_MODE_NONE;
4106 break;
4107 }
4108 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
4109 {
4110 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4111 card->gdev->dev.kobj.name,
4112 access_ctrl_req->subcmd_code,
4113 cmd->data.setadapterparms.hdr.return_code);
4114 dev_err(&card->gdev->dev,
4115 "Adapter is dedicated. "
4116 "QDIO data connection isolation not supported\n");
4117
4118 /* ensure isolation mode is "none" */
4119 card->options.isolation = ISOLATION_MODE_NONE;
4120 break;
4121 }
4122 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
4123 {
4124 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4125 card->gdev->dev.kobj.name,
4126 access_ctrl_req->subcmd_code,
4127 cmd->data.setadapterparms.hdr.return_code);
4128 dev_err(&card->gdev->dev,
4129 "TSO does not permit QDIO data connection isolation\n");
4130
4131 /* ensure isolation mode is "none" */
4132 card->options.isolation = ISOLATION_MODE_NONE;
4133 break;
4134 }
4135 default:
4136 {
4137 /* this should never happen */
4138 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
4139 "==UNKNOWN\n",
4140 card->gdev->dev.kobj.name,
4141 access_ctrl_req->subcmd_code,
4142 cmd->data.setadapterparms.hdr.return_code);
4143
4144 /* ensure isolation mode is "none" */
4145 card->options.isolation = ISOLATION_MODE_NONE;
4146 break;
4147 }
4148 }
4149 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4150 return 0;
4151 }
4152
4153 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
4154 enum qeth_ipa_isolation_modes isolation)
4155 {
4156 int rc;
4157 struct qeth_cmd_buffer *iob;
4158 struct qeth_ipa_cmd *cmd;
4159 struct qeth_set_access_ctrl *access_ctrl_req;
4160
4161 QETH_CARD_TEXT(card, 4, "setacctl");
4162
4163 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4164 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4165
4166 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4167 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4168 sizeof(struct qeth_set_access_ctrl));
4169 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4170 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4171 access_ctrl_req->subcmd_code = isolation;
4172
4173 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4174 NULL);
4175 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4176 return rc;
4177 }
4178
4179 int qeth_set_access_ctrl_online(struct qeth_card *card)
4180 {
4181 int rc = 0;
4182
4183 QETH_CARD_TEXT(card, 4, "setactlo");
4184
4185 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4186 card->info.type == QETH_CARD_TYPE_OSX) &&
4187 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
4188 rc = qeth_setadpparms_set_access_ctrl(card,
4189 card->options.isolation);
4190 if (rc) {
4191 QETH_DBF_MESSAGE(3,
4192 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
4193 card->gdev->dev.kobj.name,
4194 rc);
4195 }
4196 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4197 card->options.isolation = ISOLATION_MODE_NONE;
4198
4199 dev_err(&card->gdev->dev, "Adapter does not "
4200 "support QDIO data connection isolation\n");
4201 rc = -EOPNOTSUPP;
4202 }
4203 return rc;
4204 }
4205 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4206
4207 void qeth_tx_timeout(struct net_device *dev)
4208 {
4209 struct qeth_card *card;
4210
4211 card = dev->ml_priv;
4212 QETH_CARD_TEXT(card, 4, "txtimeo");
4213 card->stats.tx_errors++;
4214 qeth_schedule_recovery(card);
4215 }
4216 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4217
4218 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4219 {
4220 struct qeth_card *card = dev->ml_priv;
4221 int rc = 0;
4222
4223 switch (regnum) {
4224 case MII_BMCR: /* Basic mode control register */
4225 rc = BMCR_FULLDPLX;
4226 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4227 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4228 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4229 rc |= BMCR_SPEED100;
4230 break;
4231 case MII_BMSR: /* Basic mode status register */
4232 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4233 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4234 BMSR_100BASE4;
4235 break;
4236 case MII_PHYSID1: /* PHYS ID 1 */
4237 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4238 dev->dev_addr[2];
4239 rc = (rc >> 5) & 0xFFFF;
4240 break;
4241 case MII_PHYSID2: /* PHYS ID 2 */
4242 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4243 break;
4244 case MII_ADVERTISE: /* Advertisement control reg */
4245 rc = ADVERTISE_ALL;
4246 break;
4247 case MII_LPA: /* Link partner ability reg */
4248 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4249 LPA_100BASE4 | LPA_LPACK;
4250 break;
4251 case MII_EXPANSION: /* Expansion register */
4252 break;
4253 case MII_DCOUNTER: /* disconnect counter */
4254 break;
4255 case MII_FCSCOUNTER: /* false carrier counter */
4256 break;
4257 case MII_NWAYTEST: /* N-way auto-neg test register */
4258 break;
4259 case MII_RERRCOUNTER: /* rx error counter */
4260 rc = card->stats.rx_errors;
4261 break;
4262 case MII_SREVISION: /* silicon revision */
4263 break;
4264 case MII_RESV1: /* reserved 1 */
4265 break;
4266 case MII_LBRERROR: /* loopback, rx, bypass error */
4267 break;
4268 case MII_PHYADDR: /* physical address */
4269 break;
4270 case MII_RESV2: /* reserved 2 */
4271 break;
4272 case MII_TPISTATUS: /* TPI status for 10mbps */
4273 break;
4274 case MII_NCONFIG: /* network interface config */
4275 break;
4276 default:
4277 break;
4278 }
4279 return rc;
4280 }
4281 EXPORT_SYMBOL_GPL(qeth_mdio_read);
4282
4283 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4284 struct qeth_cmd_buffer *iob, int len,
4285 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4286 unsigned long),
4287 void *reply_param)
4288 {
4289 u16 s1, s2;
4290
4291 QETH_CARD_TEXT(card, 4, "sendsnmp");
4292
4293 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4294 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4295 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4296 /* adjust PDU length fields in IPA_PDU_HEADER */
4297 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4298 s2 = (u32) len;
4299 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4300 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4301 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4302 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4303 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4304 reply_cb, reply_param);
4305 }
4306
4307 static int qeth_snmp_command_cb(struct qeth_card *card,
4308 struct qeth_reply *reply, unsigned long sdata)
4309 {
4310 struct qeth_ipa_cmd *cmd;
4311 struct qeth_arp_query_info *qinfo;
4312 struct qeth_snmp_cmd *snmp;
4313 unsigned char *data;
4314 __u16 data_len;
4315
4316 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4317
4318 cmd = (struct qeth_ipa_cmd *) sdata;
4319 data = (unsigned char *)((char *)cmd - reply->offset);
4320 qinfo = (struct qeth_arp_query_info *) reply->param;
4321 snmp = &cmd->data.setadapterparms.data.snmp;
4322
4323 if (cmd->hdr.return_code) {
4324 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4325 return 0;
4326 }
4327 if (cmd->data.setadapterparms.hdr.return_code) {
4328 cmd->hdr.return_code =
4329 cmd->data.setadapterparms.hdr.return_code;
4330 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4331 return 0;
4332 }
4333 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4334 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4335 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4336 else
4337 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4338
4339 /* check if there is enough room in userspace */
4340 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
4341 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
4342 cmd->hdr.return_code = IPA_RC_ENOMEM;
4343 return 0;
4344 }
4345 QETH_CARD_TEXT_(card, 4, "snore%i",
4346 cmd->data.setadapterparms.hdr.used_total);
4347 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4348 cmd->data.setadapterparms.hdr.seq_no);
4349 /*copy entries to user buffer*/
4350 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4351 memcpy(qinfo->udata + qinfo->udata_offset,
4352 (char *)snmp,
4353 data_len + offsetof(struct qeth_snmp_cmd, data));
4354 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4355 } else {
4356 memcpy(qinfo->udata + qinfo->udata_offset,
4357 (char *)&snmp->request, data_len);
4358 }
4359 qinfo->udata_offset += data_len;
4360 /* check if all replies received ... */
4361 QETH_CARD_TEXT_(card, 4, "srtot%i",
4362 cmd->data.setadapterparms.hdr.used_total);
4363 QETH_CARD_TEXT_(card, 4, "srseq%i",
4364 cmd->data.setadapterparms.hdr.seq_no);
4365 if (cmd->data.setadapterparms.hdr.seq_no <
4366 cmd->data.setadapterparms.hdr.used_total)
4367 return 1;
4368 return 0;
4369 }
4370
4371 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4372 {
4373 struct qeth_cmd_buffer *iob;
4374 struct qeth_ipa_cmd *cmd;
4375 struct qeth_snmp_ureq *ureq;
4376 int req_len;
4377 struct qeth_arp_query_info qinfo = {0, };
4378 int rc = 0;
4379
4380 QETH_CARD_TEXT(card, 3, "snmpcmd");
4381
4382 if (card->info.guestlan)
4383 return -EOPNOTSUPP;
4384
4385 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4386 (!card->options.layer2)) {
4387 return -EOPNOTSUPP;
4388 }
4389 /* skip 4 bytes (data_len struct member) to get req_len */
4390 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4391 return -EFAULT;
4392 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4393 if (IS_ERR(ureq)) {
4394 QETH_CARD_TEXT(card, 2, "snmpnome");
4395 return PTR_ERR(ureq);
4396 }
4397 qinfo.udata_len = ureq->hdr.data_len;
4398 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4399 if (!qinfo.udata) {
4400 kfree(ureq);
4401 return -ENOMEM;
4402 }
4403 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4404
4405 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4406 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4407 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4408 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4409 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4410 qeth_snmp_command_cb, (void *)&qinfo);
4411 if (rc)
4412 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4413 QETH_CARD_IFNAME(card), rc);
4414 else {
4415 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4416 rc = -EFAULT;
4417 }
4418
4419 kfree(ureq);
4420 kfree(qinfo.udata);
4421 return rc;
4422 }
4423 EXPORT_SYMBOL_GPL(qeth_snmp_command);
4424
4425 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4426 struct qeth_reply *reply, unsigned long data)
4427 {
4428 struct qeth_ipa_cmd *cmd;
4429 struct qeth_qoat_priv *priv;
4430 char *resdata;
4431 int resdatalen;
4432
4433 QETH_CARD_TEXT(card, 3, "qoatcb");
4434
4435 cmd = (struct qeth_ipa_cmd *)data;
4436 priv = (struct qeth_qoat_priv *)reply->param;
4437 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4438 resdata = (char *)data + 28;
4439
4440 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4441 cmd->hdr.return_code = IPA_RC_FFFF;
4442 return 0;
4443 }
4444
4445 memcpy((priv->buffer + priv->response_len), resdata,
4446 resdatalen);
4447 priv->response_len += resdatalen;
4448
4449 if (cmd->data.setadapterparms.hdr.seq_no <
4450 cmd->data.setadapterparms.hdr.used_total)
4451 return 1;
4452 return 0;
4453 }
4454
4455 int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4456 {
4457 int rc = 0;
4458 struct qeth_cmd_buffer *iob;
4459 struct qeth_ipa_cmd *cmd;
4460 struct qeth_query_oat *oat_req;
4461 struct qeth_query_oat_data oat_data;
4462 struct qeth_qoat_priv priv;
4463 void __user *tmp;
4464
4465 QETH_CARD_TEXT(card, 3, "qoatcmd");
4466
4467 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4468 rc = -EOPNOTSUPP;
4469 goto out;
4470 }
4471
4472 if (copy_from_user(&oat_data, udata,
4473 sizeof(struct qeth_query_oat_data))) {
4474 rc = -EFAULT;
4475 goto out;
4476 }
4477
4478 priv.buffer_len = oat_data.buffer_len;
4479 priv.response_len = 0;
4480 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4481 if (!priv.buffer) {
4482 rc = -ENOMEM;
4483 goto out;
4484 }
4485
4486 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4487 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4488 sizeof(struct qeth_query_oat));
4489 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4490 oat_req = &cmd->data.setadapterparms.data.query_oat;
4491 oat_req->subcmd_code = oat_data.command;
4492
4493 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4494 &priv);
4495 if (!rc) {
4496 if (is_compat_task())
4497 tmp = compat_ptr(oat_data.ptr);
4498 else
4499 tmp = (void __user *)(unsigned long)oat_data.ptr;
4500
4501 if (copy_to_user(tmp, priv.buffer,
4502 priv.response_len)) {
4503 rc = -EFAULT;
4504 goto out_free;
4505 }
4506
4507 oat_data.response_len = priv.response_len;
4508
4509 if (copy_to_user(udata, &oat_data,
4510 sizeof(struct qeth_query_oat_data)))
4511 rc = -EFAULT;
4512 } else
4513 if (rc == IPA_RC_FFFF)
4514 rc = -EFAULT;
4515
4516 out_free:
4517 kfree(priv.buffer);
4518 out:
4519 return rc;
4520 }
4521 EXPORT_SYMBOL_GPL(qeth_query_oat_command);
4522
4523 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4524 {
4525 switch (card->info.type) {
4526 case QETH_CARD_TYPE_IQD:
4527 return 2;
4528 default:
4529 return 0;
4530 }
4531 }
4532
4533 static void qeth_determine_capabilities(struct qeth_card *card)
4534 {
4535 int rc;
4536 int length;
4537 char *prcd;
4538 struct ccw_device *ddev;
4539 int ddev_offline = 0;
4540
4541 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4542 ddev = CARD_DDEV(card);
4543 if (!ddev->online) {
4544 ddev_offline = 1;
4545 rc = ccw_device_set_online(ddev);
4546 if (rc) {
4547 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4548 goto out;
4549 }
4550 }
4551
4552 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4553 if (rc) {
4554 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4555 dev_name(&card->gdev->dev), rc);
4556 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4557 goto out_offline;
4558 }
4559 qeth_configure_unitaddr(card, prcd);
4560 if (ddev_offline)
4561 qeth_configure_blkt_default(card, prcd);
4562 kfree(prcd);
4563
4564 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4565 if (rc)
4566 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4567
4568 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4569 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4570 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4571 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4572 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4573 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4574 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4575 dev_info(&card->gdev->dev,
4576 "Completion Queueing supported\n");
4577 } else {
4578 card->options.cq = QETH_CQ_NOTAVAILABLE;
4579 }
4580
4581
4582 out_offline:
4583 if (ddev_offline == 1)
4584 ccw_device_set_offline(ddev);
4585 out:
4586 return;
4587 }
4588
4589 static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4590 struct qdio_buffer **in_sbal_ptrs,
4591 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4592 int i;
4593
4594 if (card->options.cq == QETH_CQ_ENABLED) {
4595 int offset = QDIO_MAX_BUFFERS_PER_Q *
4596 (card->qdio.no_in_queues - 1);
4597 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4598 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4599 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4600 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4601 }
4602
4603 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4604 }
4605 }
4606
4607 static int qeth_qdio_establish(struct qeth_card *card)
4608 {
4609 struct qdio_initialize init_data;
4610 char *qib_param_field;
4611 struct qdio_buffer **in_sbal_ptrs;
4612 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4613 struct qdio_buffer **out_sbal_ptrs;
4614 int i, j, k;
4615 int rc = 0;
4616
4617 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4618
4619 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4620 GFP_KERNEL);
4621 if (!qib_param_field) {
4622 rc = -ENOMEM;
4623 goto out_free_nothing;
4624 }
4625
4626 qeth_create_qib_param_field(card, qib_param_field);
4627 qeth_create_qib_param_field_blkt(card, qib_param_field);
4628
4629 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
4630 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4631 GFP_KERNEL);
4632 if (!in_sbal_ptrs) {
4633 rc = -ENOMEM;
4634 goto out_free_qib_param;
4635 }
4636 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4637 in_sbal_ptrs[i] = (struct qdio_buffer *)
4638 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
4639 }
4640
4641 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4642 GFP_KERNEL);
4643 if (!queue_start_poll) {
4644 rc = -ENOMEM;
4645 goto out_free_in_sbals;
4646 }
4647 for (i = 0; i < card->qdio.no_in_queues; ++i)
4648 queue_start_poll[i] = card->discipline->start_poll;
4649
4650 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
4651
4652 out_sbal_ptrs =
4653 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4654 sizeof(void *), GFP_KERNEL);
4655 if (!out_sbal_ptrs) {
4656 rc = -ENOMEM;
4657 goto out_free_queue_start_poll;
4658 }
4659 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4660 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4661 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
4662 card->qdio.out_qs[i]->bufs[j]->buffer);
4663 }
4664
4665 memset(&init_data, 0, sizeof(struct qdio_initialize));
4666 init_data.cdev = CARD_DDEV(card);
4667 init_data.q_format = qeth_get_qdio_q_format(card);
4668 init_data.qib_param_field_format = 0;
4669 init_data.qib_param_field = qib_param_field;
4670 init_data.no_input_qs = card->qdio.no_in_queues;
4671 init_data.no_output_qs = card->qdio.no_out_queues;
4672 init_data.input_handler = card->discipline->input_handler;
4673 init_data.output_handler = card->discipline->output_handler;
4674 init_data.queue_start_poll_array = queue_start_poll;
4675 init_data.int_parm = (unsigned long) card;
4676 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4677 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
4678 init_data.output_sbal_state_array = card->qdio.out_bufstates;
4679 init_data.scan_threshold =
4680 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32;
4681
4682 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4683 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
4684 rc = qdio_allocate(&init_data);
4685 if (rc) {
4686 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4687 goto out;
4688 }
4689 rc = qdio_establish(&init_data);
4690 if (rc) {
4691 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4692 qdio_free(CARD_DDEV(card));
4693 }
4694 }
4695
4696 switch (card->options.cq) {
4697 case QETH_CQ_ENABLED:
4698 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4699 break;
4700 case QETH_CQ_DISABLED:
4701 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4702 break;
4703 default:
4704 break;
4705 }
4706 out:
4707 kfree(out_sbal_ptrs);
4708 out_free_queue_start_poll:
4709 kfree(queue_start_poll);
4710 out_free_in_sbals:
4711 kfree(in_sbal_ptrs);
4712 out_free_qib_param:
4713 kfree(qib_param_field);
4714 out_free_nothing:
4715 return rc;
4716 }
4717
4718 static void qeth_core_free_card(struct qeth_card *card)
4719 {
4720
4721 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4722 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4723 qeth_clean_channel(&card->read);
4724 qeth_clean_channel(&card->write);
4725 if (card->dev)
4726 free_netdev(card->dev);
4727 kfree(card->ip_tbd_list);
4728 qeth_free_qdio_buffers(card);
4729 unregister_service_level(&card->qeth_service_level);
4730 kfree(card);
4731 }
4732
4733 static struct ccw_device_id qeth_ids[] = {
4734 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4735 .driver_info = QETH_CARD_TYPE_OSD},
4736 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4737 .driver_info = QETH_CARD_TYPE_IQD},
4738 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4739 .driver_info = QETH_CARD_TYPE_OSN},
4740 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4741 .driver_info = QETH_CARD_TYPE_OSM},
4742 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4743 .driver_info = QETH_CARD_TYPE_OSX},
4744 {},
4745 };
4746 MODULE_DEVICE_TABLE(ccw, qeth_ids);
4747
4748 static struct ccw_driver qeth_ccw_driver = {
4749 .driver = {
4750 .owner = THIS_MODULE,
4751 .name = "qeth",
4752 },
4753 .ids = qeth_ids,
4754 .probe = ccwgroup_probe_ccwdev,
4755 .remove = ccwgroup_remove_ccwdev,
4756 };
4757
4758 int qeth_core_hardsetup_card(struct qeth_card *card)
4759 {
4760 int retries = 0;
4761 int rc;
4762
4763 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4764 atomic_set(&card->force_alloc_skb, 0);
4765 qeth_update_from_chp_desc(card);
4766 retry:
4767 if (retries)
4768 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4769 dev_name(&card->gdev->dev));
4770 ccw_device_set_offline(CARD_DDEV(card));
4771 ccw_device_set_offline(CARD_WDEV(card));
4772 ccw_device_set_offline(CARD_RDEV(card));
4773 rc = ccw_device_set_online(CARD_RDEV(card));
4774 if (rc)
4775 goto retriable;
4776 rc = ccw_device_set_online(CARD_WDEV(card));
4777 if (rc)
4778 goto retriable;
4779 rc = ccw_device_set_online(CARD_DDEV(card));
4780 if (rc)
4781 goto retriable;
4782 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
4783 retriable:
4784 if (rc == -ERESTARTSYS) {
4785 QETH_DBF_TEXT(SETUP, 2, "break1");
4786 return rc;
4787 } else if (rc) {
4788 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4789 if (++retries > 3)
4790 goto out;
4791 else
4792 goto retry;
4793 }
4794 qeth_determine_capabilities(card);
4795 qeth_init_tokens(card);
4796 qeth_init_func_level(card);
4797 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4798 if (rc == -ERESTARTSYS) {
4799 QETH_DBF_TEXT(SETUP, 2, "break2");
4800 return rc;
4801 } else if (rc) {
4802 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4803 if (--retries < 0)
4804 goto out;
4805 else
4806 goto retry;
4807 }
4808 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4809 if (rc == -ERESTARTSYS) {
4810 QETH_DBF_TEXT(SETUP, 2, "break3");
4811 return rc;
4812 } else if (rc) {
4813 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4814 if (--retries < 0)
4815 goto out;
4816 else
4817 goto retry;
4818 }
4819 card->read_or_write_problem = 0;
4820 rc = qeth_mpc_initialize(card);
4821 if (rc) {
4822 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4823 goto out;
4824 }
4825
4826 card->options.ipa4.supported_funcs = 0;
4827 card->options.adp.supported_funcs = 0;
4828 card->info.diagass_support = 0;
4829 qeth_query_ipassists(card, QETH_PROT_IPV4);
4830 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4831 qeth_query_setadapterparms(card);
4832 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4833 qeth_query_setdiagass(card);
4834 return 0;
4835 out:
4836 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4837 "an error on the device\n");
4838 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4839 dev_name(&card->gdev->dev), rc);
4840 return rc;
4841 }
4842 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4843
4844 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
4845 struct qdio_buffer_element *element,
4846 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4847 {
4848 struct page *page = virt_to_page(element->addr);
4849 if (*pskb == NULL) {
4850 if (qethbuffer->rx_skb) {
4851 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
4852 *pskb = qethbuffer->rx_skb;
4853 qethbuffer->rx_skb = NULL;
4854 } else {
4855 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
4856 if (!(*pskb))
4857 return -ENOMEM;
4858 }
4859
4860 skb_reserve(*pskb, ETH_HLEN);
4861 if (data_len <= QETH_RX_PULL_LEN) {
4862 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4863 data_len);
4864 } else {
4865 get_page(page);
4866 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
4867 element->addr + offset, QETH_RX_PULL_LEN);
4868 skb_fill_page_desc(*pskb, *pfrag, page,
4869 offset + QETH_RX_PULL_LEN,
4870 data_len - QETH_RX_PULL_LEN);
4871 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
4872 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
4873 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4874 (*pfrag)++;
4875 }
4876 } else {
4877 get_page(page);
4878 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4879 (*pskb)->data_len += data_len;
4880 (*pskb)->len += data_len;
4881 (*pskb)->truesize += data_len;
4882 (*pfrag)++;
4883 }
4884
4885
4886 return 0;
4887 }
4888
4889 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
4890 struct qeth_qdio_buffer *qethbuffer,
4891 struct qdio_buffer_element **__element, int *__offset,
4892 struct qeth_hdr **hdr)
4893 {
4894 struct qdio_buffer_element *element = *__element;
4895 struct qdio_buffer *buffer = qethbuffer->buffer;
4896 int offset = *__offset;
4897 struct sk_buff *skb = NULL;
4898 int skb_len = 0;
4899 void *data_ptr;
4900 int data_len;
4901 int headroom = 0;
4902 int use_rx_sg = 0;
4903 int frag = 0;
4904
4905 /* qeth_hdr must not cross element boundaries */
4906 if (element->length < offset + sizeof(struct qeth_hdr)) {
4907 if (qeth_is_last_sbale(element))
4908 return NULL;
4909 element++;
4910 offset = 0;
4911 if (element->length < sizeof(struct qeth_hdr))
4912 return NULL;
4913 }
4914 *hdr = element->addr + offset;
4915
4916 offset += sizeof(struct qeth_hdr);
4917 switch ((*hdr)->hdr.l2.id) {
4918 case QETH_HEADER_TYPE_LAYER2:
4919 skb_len = (*hdr)->hdr.l2.pkt_length;
4920 break;
4921 case QETH_HEADER_TYPE_LAYER3:
4922 skb_len = (*hdr)->hdr.l3.length;
4923 headroom = ETH_HLEN;
4924 break;
4925 case QETH_HEADER_TYPE_OSN:
4926 skb_len = (*hdr)->hdr.osn.pdu_length;
4927 headroom = sizeof(struct qeth_hdr);
4928 break;
4929 default:
4930 break;
4931 }
4932
4933 if (!skb_len)
4934 return NULL;
4935
4936 if (((skb_len >= card->options.rx_sg_cb) &&
4937 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4938 (!atomic_read(&card->force_alloc_skb))) ||
4939 (card->options.cq == QETH_CQ_ENABLED)) {
4940 use_rx_sg = 1;
4941 } else {
4942 skb = dev_alloc_skb(skb_len + headroom);
4943 if (!skb)
4944 goto no_mem;
4945 if (headroom)
4946 skb_reserve(skb, headroom);
4947 }
4948
4949 data_ptr = element->addr + offset;
4950 while (skb_len) {
4951 data_len = min(skb_len, (int)(element->length - offset));
4952 if (data_len) {
4953 if (use_rx_sg) {
4954 if (qeth_create_skb_frag(qethbuffer, element,
4955 &skb, offset, &frag, data_len))
4956 goto no_mem;
4957 } else {
4958 memcpy(skb_put(skb, data_len), data_ptr,
4959 data_len);
4960 }
4961 }
4962 skb_len -= data_len;
4963 if (skb_len) {
4964 if (qeth_is_last_sbale(element)) {
4965 QETH_CARD_TEXT(card, 4, "unexeob");
4966 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4967 dev_kfree_skb_any(skb);
4968 card->stats.rx_errors++;
4969 return NULL;
4970 }
4971 element++;
4972 offset = 0;
4973 data_ptr = element->addr;
4974 } else {
4975 offset += data_len;
4976 }
4977 }
4978 *__element = element;
4979 *__offset = offset;
4980 if (use_rx_sg && card->options.performance_stats) {
4981 card->perf_stats.sg_skbs_rx++;
4982 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4983 }
4984 return skb;
4985 no_mem:
4986 if (net_ratelimit()) {
4987 QETH_CARD_TEXT(card, 2, "noskbmem");
4988 }
4989 card->stats.rx_dropped++;
4990 return NULL;
4991 }
4992 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4993
4994 static void qeth_unregister_dbf_views(void)
4995 {
4996 int x;
4997 for (x = 0; x < QETH_DBF_INFOS; x++) {
4998 debug_unregister(qeth_dbf[x].id);
4999 qeth_dbf[x].id = NULL;
5000 }
5001 }
5002
5003 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
5004 {
5005 char dbf_txt_buf[32];
5006 va_list args;
5007
5008 if (level > id->level)
5009 return;
5010 va_start(args, fmt);
5011 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5012 va_end(args);
5013 debug_text_event(id, level, dbf_txt_buf);
5014 }
5015 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5016
5017 static int qeth_register_dbf_views(void)
5018 {
5019 int ret;
5020 int x;
5021
5022 for (x = 0; x < QETH_DBF_INFOS; x++) {
5023 /* register the areas */
5024 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5025 qeth_dbf[x].pages,
5026 qeth_dbf[x].areas,
5027 qeth_dbf[x].len);
5028 if (qeth_dbf[x].id == NULL) {
5029 qeth_unregister_dbf_views();
5030 return -ENOMEM;
5031 }
5032
5033 /* register a view */
5034 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5035 if (ret) {
5036 qeth_unregister_dbf_views();
5037 return ret;
5038 }
5039
5040 /* set a passing level */
5041 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5042 }
5043
5044 return 0;
5045 }
5046
5047 int qeth_core_load_discipline(struct qeth_card *card,
5048 enum qeth_discipline_id discipline)
5049 {
5050 int rc = 0;
5051 mutex_lock(&qeth_mod_mutex);
5052 switch (discipline) {
5053 case QETH_DISCIPLINE_LAYER3:
5054 card->discipline = try_then_request_module(
5055 symbol_get(qeth_l3_discipline), "qeth_l3");
5056 break;
5057 case QETH_DISCIPLINE_LAYER2:
5058 card->discipline = try_then_request_module(
5059 symbol_get(qeth_l2_discipline), "qeth_l2");
5060 break;
5061 }
5062 if (!card->discipline) {
5063 dev_err(&card->gdev->dev, "There is no kernel module to "
5064 "support discipline %d\n", discipline);
5065 rc = -EINVAL;
5066 }
5067 mutex_unlock(&qeth_mod_mutex);
5068 return rc;
5069 }
5070
5071 void qeth_core_free_discipline(struct qeth_card *card)
5072 {
5073 if (card->options.layer2)
5074 symbol_put(qeth_l2_discipline);
5075 else
5076 symbol_put(qeth_l3_discipline);
5077 card->discipline = NULL;
5078 }
5079
5080 static const struct device_type qeth_generic_devtype = {
5081 .name = "qeth_generic",
5082 .groups = qeth_generic_attr_groups,
5083 };
5084 static const struct device_type qeth_osn_devtype = {
5085 .name = "qeth_osn",
5086 .groups = qeth_osn_attr_groups,
5087 };
5088
5089 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5090 {
5091 struct qeth_card *card;
5092 struct device *dev;
5093 int rc;
5094 unsigned long flags;
5095 char dbf_name[20];
5096
5097 QETH_DBF_TEXT(SETUP, 2, "probedev");
5098
5099 dev = &gdev->dev;
5100 if (!get_device(dev))
5101 return -ENODEV;
5102
5103 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
5104
5105 card = qeth_alloc_card();
5106 if (!card) {
5107 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
5108 rc = -ENOMEM;
5109 goto err_dev;
5110 }
5111
5112 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5113 dev_name(&gdev->dev));
5114 card->debug = debug_register(dbf_name, 2, 1, 8);
5115 if (!card->debug) {
5116 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5117 rc = -ENOMEM;
5118 goto err_card;
5119 }
5120 debug_register_view(card->debug, &debug_hex_ascii_view);
5121
5122 card->read.ccwdev = gdev->cdev[0];
5123 card->write.ccwdev = gdev->cdev[1];
5124 card->data.ccwdev = gdev->cdev[2];
5125 dev_set_drvdata(&gdev->dev, card);
5126 card->gdev = gdev;
5127 gdev->cdev[0]->handler = qeth_irq;
5128 gdev->cdev[1]->handler = qeth_irq;
5129 gdev->cdev[2]->handler = qeth_irq;
5130
5131 rc = qeth_determine_card_type(card);
5132 if (rc) {
5133 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
5134 goto err_dbf;
5135 }
5136 rc = qeth_setup_card(card);
5137 if (rc) {
5138 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
5139 goto err_dbf;
5140 }
5141
5142 if (card->info.type == QETH_CARD_TYPE_OSN)
5143 gdev->dev.type = &qeth_osn_devtype;
5144 else
5145 gdev->dev.type = &qeth_generic_devtype;
5146
5147 switch (card->info.type) {
5148 case QETH_CARD_TYPE_OSN:
5149 case QETH_CARD_TYPE_OSM:
5150 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5151 if (rc)
5152 goto err_dbf;
5153 rc = card->discipline->setup(card->gdev);
5154 if (rc)
5155 goto err_disc;
5156 case QETH_CARD_TYPE_OSD:
5157 case QETH_CARD_TYPE_OSX:
5158 default:
5159 break;
5160 }
5161
5162 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5163 list_add_tail(&card->list, &qeth_core_card_list.list);
5164 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5165
5166 qeth_determine_capabilities(card);
5167 return 0;
5168
5169 err_disc:
5170 qeth_core_free_discipline(card);
5171 err_dbf:
5172 debug_unregister(card->debug);
5173 err_card:
5174 qeth_core_free_card(card);
5175 err_dev:
5176 put_device(dev);
5177 return rc;
5178 }
5179
5180 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5181 {
5182 unsigned long flags;
5183 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5184
5185 QETH_DBF_TEXT(SETUP, 2, "removedv");
5186
5187 if (card->discipline) {
5188 card->discipline->remove(gdev);
5189 qeth_core_free_discipline(card);
5190 }
5191
5192 debug_unregister(card->debug);
5193 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5194 list_del(&card->list);
5195 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5196 qeth_core_free_card(card);
5197 dev_set_drvdata(&gdev->dev, NULL);
5198 put_device(&gdev->dev);
5199 return;
5200 }
5201
5202 static int qeth_core_set_online(struct ccwgroup_device *gdev)
5203 {
5204 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5205 int rc = 0;
5206 int def_discipline;
5207
5208 if (!card->discipline) {
5209 if (card->info.type == QETH_CARD_TYPE_IQD)
5210 def_discipline = QETH_DISCIPLINE_LAYER3;
5211 else
5212 def_discipline = QETH_DISCIPLINE_LAYER2;
5213 rc = qeth_core_load_discipline(card, def_discipline);
5214 if (rc)
5215 goto err;
5216 rc = card->discipline->setup(card->gdev);
5217 if (rc)
5218 goto err;
5219 }
5220 rc = card->discipline->set_online(gdev);
5221 err:
5222 return rc;
5223 }
5224
5225 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5226 {
5227 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5228 return card->discipline->set_offline(gdev);
5229 }
5230
5231 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5232 {
5233 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5234 if (card->discipline && card->discipline->shutdown)
5235 card->discipline->shutdown(gdev);
5236 }
5237
5238 static int qeth_core_prepare(struct ccwgroup_device *gdev)
5239 {
5240 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5241 if (card->discipline && card->discipline->prepare)
5242 return card->discipline->prepare(gdev);
5243 return 0;
5244 }
5245
5246 static void qeth_core_complete(struct ccwgroup_device *gdev)
5247 {
5248 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5249 if (card->discipline && card->discipline->complete)
5250 card->discipline->complete(gdev);
5251 }
5252
5253 static int qeth_core_freeze(struct ccwgroup_device *gdev)
5254 {
5255 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5256 if (card->discipline && card->discipline->freeze)
5257 return card->discipline->freeze(gdev);
5258 return 0;
5259 }
5260
5261 static int qeth_core_thaw(struct ccwgroup_device *gdev)
5262 {
5263 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5264 if (card->discipline && card->discipline->thaw)
5265 return card->discipline->thaw(gdev);
5266 return 0;
5267 }
5268
5269 static int qeth_core_restore(struct ccwgroup_device *gdev)
5270 {
5271 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5272 if (card->discipline && card->discipline->restore)
5273 return card->discipline->restore(gdev);
5274 return 0;
5275 }
5276
5277 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
5278 .driver = {
5279 .owner = THIS_MODULE,
5280 .name = "qeth",
5281 },
5282 .setup = qeth_core_probe_device,
5283 .remove = qeth_core_remove_device,
5284 .set_online = qeth_core_set_online,
5285 .set_offline = qeth_core_set_offline,
5286 .shutdown = qeth_core_shutdown,
5287 .prepare = qeth_core_prepare,
5288 .complete = qeth_core_complete,
5289 .freeze = qeth_core_freeze,
5290 .thaw = qeth_core_thaw,
5291 .restore = qeth_core_restore,
5292 };
5293
5294 static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5295 const char *buf, size_t count)
5296 {
5297 int err;
5298
5299 err = ccwgroup_create_dev(qeth_core_root_dev,
5300 &qeth_core_ccwgroup_driver, 3, buf);
5301
5302 return err ? err : count;
5303 }
5304 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5305
5306 static struct attribute *qeth_drv_attrs[] = {
5307 &driver_attr_group.attr,
5308 NULL,
5309 };
5310 static struct attribute_group qeth_drv_attr_group = {
5311 .attrs = qeth_drv_attrs,
5312 };
5313 static const struct attribute_group *qeth_drv_attr_groups[] = {
5314 &qeth_drv_attr_group,
5315 NULL,
5316 };
5317
5318 static struct {
5319 const char str[ETH_GSTRING_LEN];
5320 } qeth_ethtool_stats_keys[] = {
5321 /* 0 */{"rx skbs"},
5322 {"rx buffers"},
5323 {"tx skbs"},
5324 {"tx buffers"},
5325 {"tx skbs no packing"},
5326 {"tx buffers no packing"},
5327 {"tx skbs packing"},
5328 {"tx buffers packing"},
5329 {"tx sg skbs"},
5330 {"tx sg frags"},
5331 /* 10 */{"rx sg skbs"},
5332 {"rx sg frags"},
5333 {"rx sg page allocs"},
5334 {"tx large kbytes"},
5335 {"tx large count"},
5336 {"tx pk state ch n->p"},
5337 {"tx pk state ch p->n"},
5338 {"tx pk watermark low"},
5339 {"tx pk watermark high"},
5340 {"queue 0 buffer usage"},
5341 /* 20 */{"queue 1 buffer usage"},
5342 {"queue 2 buffer usage"},
5343 {"queue 3 buffer usage"},
5344 {"rx poll time"},
5345 {"rx poll count"},
5346 {"rx do_QDIO time"},
5347 {"rx do_QDIO count"},
5348 {"tx handler time"},
5349 {"tx handler count"},
5350 {"tx time"},
5351 /* 30 */{"tx count"},
5352 {"tx do_QDIO time"},
5353 {"tx do_QDIO count"},
5354 {"tx csum"},
5355 {"tx lin"},
5356 {"cq handler count"},
5357 {"cq handler time"}
5358 };
5359
5360 int qeth_core_get_sset_count(struct net_device *dev, int stringset)
5361 {
5362 switch (stringset) {
5363 case ETH_SS_STATS:
5364 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5365 default:
5366 return -EINVAL;
5367 }
5368 }
5369 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
5370
5371 void qeth_core_get_ethtool_stats(struct net_device *dev,
5372 struct ethtool_stats *stats, u64 *data)
5373 {
5374 struct qeth_card *card = dev->ml_priv;
5375 data[0] = card->stats.rx_packets -
5376 card->perf_stats.initial_rx_packets;
5377 data[1] = card->perf_stats.bufs_rec;
5378 data[2] = card->stats.tx_packets -
5379 card->perf_stats.initial_tx_packets;
5380 data[3] = card->perf_stats.bufs_sent;
5381 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5382 - card->perf_stats.skbs_sent_pack;
5383 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5384 data[6] = card->perf_stats.skbs_sent_pack;
5385 data[7] = card->perf_stats.bufs_sent_pack;
5386 data[8] = card->perf_stats.sg_skbs_sent;
5387 data[9] = card->perf_stats.sg_frags_sent;
5388 data[10] = card->perf_stats.sg_skbs_rx;
5389 data[11] = card->perf_stats.sg_frags_rx;
5390 data[12] = card->perf_stats.sg_alloc_page_rx;
5391 data[13] = (card->perf_stats.large_send_bytes >> 10);
5392 data[14] = card->perf_stats.large_send_cnt;
5393 data[15] = card->perf_stats.sc_dp_p;
5394 data[16] = card->perf_stats.sc_p_dp;
5395 data[17] = QETH_LOW_WATERMARK_PACK;
5396 data[18] = QETH_HIGH_WATERMARK_PACK;
5397 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5398 data[20] = (card->qdio.no_out_queues > 1) ?
5399 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5400 data[21] = (card->qdio.no_out_queues > 2) ?
5401 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5402 data[22] = (card->qdio.no_out_queues > 3) ?
5403 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5404 data[23] = card->perf_stats.inbound_time;
5405 data[24] = card->perf_stats.inbound_cnt;
5406 data[25] = card->perf_stats.inbound_do_qdio_time;
5407 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5408 data[27] = card->perf_stats.outbound_handler_time;
5409 data[28] = card->perf_stats.outbound_handler_cnt;
5410 data[29] = card->perf_stats.outbound_time;
5411 data[30] = card->perf_stats.outbound_cnt;
5412 data[31] = card->perf_stats.outbound_do_qdio_time;
5413 data[32] = card->perf_stats.outbound_do_qdio_cnt;
5414 data[33] = card->perf_stats.tx_csum;
5415 data[34] = card->perf_stats.tx_lin;
5416 data[35] = card->perf_stats.cq_cnt;
5417 data[36] = card->perf_stats.cq_time;
5418 }
5419 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5420
5421 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5422 {
5423 switch (stringset) {
5424 case ETH_SS_STATS:
5425 memcpy(data, &qeth_ethtool_stats_keys,
5426 sizeof(qeth_ethtool_stats_keys));
5427 break;
5428 default:
5429 WARN_ON(1);
5430 break;
5431 }
5432 }
5433 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5434
5435 void qeth_core_get_drvinfo(struct net_device *dev,
5436 struct ethtool_drvinfo *info)
5437 {
5438 struct qeth_card *card = dev->ml_priv;
5439 if (card->options.layer2)
5440 strcpy(info->driver, "qeth_l2");
5441 else
5442 strcpy(info->driver, "qeth_l3");
5443
5444 strcpy(info->version, "1.0");
5445 strcpy(info->fw_version, card->info.mcl_level);
5446 sprintf(info->bus_info, "%s/%s/%s",
5447 CARD_RDEV_ID(card),
5448 CARD_WDEV_ID(card),
5449 CARD_DDEV_ID(card));
5450 }
5451 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5452
5453 int qeth_core_ethtool_get_settings(struct net_device *netdev,
5454 struct ethtool_cmd *ecmd)
5455 {
5456 struct qeth_card *card = netdev->ml_priv;
5457 enum qeth_link_types link_type;
5458
5459 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5460 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5461 else
5462 link_type = card->info.link_type;
5463
5464 ecmd->transceiver = XCVR_INTERNAL;
5465 ecmd->supported = SUPPORTED_Autoneg;
5466 ecmd->advertising = ADVERTISED_Autoneg;
5467 ecmd->duplex = DUPLEX_FULL;
5468 ecmd->autoneg = AUTONEG_ENABLE;
5469
5470 switch (link_type) {
5471 case QETH_LINK_TYPE_FAST_ETH:
5472 case QETH_LINK_TYPE_LANE_ETH100:
5473 ecmd->supported |= SUPPORTED_10baseT_Half |
5474 SUPPORTED_10baseT_Full |
5475 SUPPORTED_100baseT_Half |
5476 SUPPORTED_100baseT_Full |
5477 SUPPORTED_TP;
5478 ecmd->advertising |= ADVERTISED_10baseT_Half |
5479 ADVERTISED_10baseT_Full |
5480 ADVERTISED_100baseT_Half |
5481 ADVERTISED_100baseT_Full |
5482 ADVERTISED_TP;
5483 ecmd->speed = SPEED_100;
5484 ecmd->port = PORT_TP;
5485 break;
5486
5487 case QETH_LINK_TYPE_GBIT_ETH:
5488 case QETH_LINK_TYPE_LANE_ETH1000:
5489 ecmd->supported |= SUPPORTED_10baseT_Half |
5490 SUPPORTED_10baseT_Full |
5491 SUPPORTED_100baseT_Half |
5492 SUPPORTED_100baseT_Full |
5493 SUPPORTED_1000baseT_Half |
5494 SUPPORTED_1000baseT_Full |
5495 SUPPORTED_FIBRE;
5496 ecmd->advertising |= ADVERTISED_10baseT_Half |
5497 ADVERTISED_10baseT_Full |
5498 ADVERTISED_100baseT_Half |
5499 ADVERTISED_100baseT_Full |
5500 ADVERTISED_1000baseT_Half |
5501 ADVERTISED_1000baseT_Full |
5502 ADVERTISED_FIBRE;
5503 ecmd->speed = SPEED_1000;
5504 ecmd->port = PORT_FIBRE;
5505 break;
5506
5507 case QETH_LINK_TYPE_10GBIT_ETH:
5508 ecmd->supported |= SUPPORTED_10baseT_Half |
5509 SUPPORTED_10baseT_Full |
5510 SUPPORTED_100baseT_Half |
5511 SUPPORTED_100baseT_Full |
5512 SUPPORTED_1000baseT_Half |
5513 SUPPORTED_1000baseT_Full |
5514 SUPPORTED_10000baseT_Full |
5515 SUPPORTED_FIBRE;
5516 ecmd->advertising |= ADVERTISED_10baseT_Half |
5517 ADVERTISED_10baseT_Full |
5518 ADVERTISED_100baseT_Half |
5519 ADVERTISED_100baseT_Full |
5520 ADVERTISED_1000baseT_Half |
5521 ADVERTISED_1000baseT_Full |
5522 ADVERTISED_10000baseT_Full |
5523 ADVERTISED_FIBRE;
5524 ecmd->speed = SPEED_10000;
5525 ecmd->port = PORT_FIBRE;
5526 break;
5527
5528 default:
5529 ecmd->supported |= SUPPORTED_10baseT_Half |
5530 SUPPORTED_10baseT_Full |
5531 SUPPORTED_TP;
5532 ecmd->advertising |= ADVERTISED_10baseT_Half |
5533 ADVERTISED_10baseT_Full |
5534 ADVERTISED_TP;
5535 ecmd->speed = SPEED_10;
5536 ecmd->port = PORT_TP;
5537 }
5538
5539 return 0;
5540 }
5541 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5542
5543 static int __init qeth_core_init(void)
5544 {
5545 int rc;
5546
5547 pr_info("loading core functions\n");
5548 INIT_LIST_HEAD(&qeth_core_card_list.list);
5549 rwlock_init(&qeth_core_card_list.rwlock);
5550 mutex_init(&qeth_mod_mutex);
5551
5552 rc = qeth_register_dbf_views();
5553 if (rc)
5554 goto out_err;
5555 qeth_core_root_dev = root_device_register("qeth");
5556 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
5557 if (rc)
5558 goto register_err;
5559 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5560 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5561 if (!qeth_core_header_cache) {
5562 rc = -ENOMEM;
5563 goto slab_err;
5564 }
5565 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5566 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5567 if (!qeth_qdio_outbuf_cache) {
5568 rc = -ENOMEM;
5569 goto cqslab_err;
5570 }
5571 rc = ccw_driver_register(&qeth_ccw_driver);
5572 if (rc)
5573 goto ccw_err;
5574 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
5575 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5576 if (rc)
5577 goto ccwgroup_err;
5578
5579 return 0;
5580
5581 ccwgroup_err:
5582 ccw_driver_unregister(&qeth_ccw_driver);
5583 ccw_err:
5584 kmem_cache_destroy(qeth_qdio_outbuf_cache);
5585 cqslab_err:
5586 kmem_cache_destroy(qeth_core_header_cache);
5587 slab_err:
5588 root_device_unregister(qeth_core_root_dev);
5589 register_err:
5590 qeth_unregister_dbf_views();
5591 out_err:
5592 pr_err("Initializing the qeth device driver failed\n");
5593 return rc;
5594 }
5595
5596 static void __exit qeth_core_exit(void)
5597 {
5598 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5599 ccw_driver_unregister(&qeth_ccw_driver);
5600 kmem_cache_destroy(qeth_qdio_outbuf_cache);
5601 kmem_cache_destroy(qeth_core_header_cache);
5602 root_device_unregister(qeth_core_root_dev);
5603 qeth_unregister_dbf_views();
5604 pr_info("core functions removed\n");
5605 }
5606
5607 module_init(qeth_core_init);
5608 module_exit(qeth_core_exit);
5609 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5610 MODULE_DESCRIPTION("qeth core functions");
5611 MODULE_LICENSE("GPL");
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