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qeth: Increase default MTU for OSA devices
[mirror_ubuntu-bionic-kernel.git] / drivers / s390 / net / qeth_core_main.c
1 /*
2 * Copyright IBM Corp. 2007, 2009
3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
9 #define KMSG_COMPONENT "qeth"
10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/string.h>
15 #include <linux/errno.h>
16 #include <linux/kernel.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/mii.h>
20 #include <linux/kthread.h>
21 #include <linux/slab.h>
22 #include <net/iucv/af_iucv.h>
23
24 #include <asm/ebcdic.h>
25 #include <asm/io.h>
26 #include <asm/sysinfo.h>
27 #include <asm/compat.h>
28
29 #include "qeth_core.h"
30
31 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
32 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
33 /* N P A M L V H */
34 [QETH_DBF_SETUP] = {"qeth_setup",
35 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_MSG] = {"qeth_msg",
37 8, 1, 128, 3, &debug_sprintf_view, NULL},
38 [QETH_DBF_CTRL] = {"qeth_control",
39 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
40 };
41 EXPORT_SYMBOL_GPL(qeth_dbf);
42
43 struct qeth_card_list_struct qeth_core_card_list;
44 EXPORT_SYMBOL_GPL(qeth_core_card_list);
45 struct kmem_cache *qeth_core_header_cache;
46 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
47 static struct kmem_cache *qeth_qdio_outbuf_cache;
48
49 static struct device *qeth_core_root_dev;
50 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
51 static struct lock_class_key qdio_out_skb_queue_key;
52 static struct mutex qeth_mod_mutex;
53
54 static void qeth_send_control_data_cb(struct qeth_channel *,
55 struct qeth_cmd_buffer *);
56 static int qeth_issue_next_read(struct qeth_card *);
57 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
58 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
59 static void qeth_free_buffer_pool(struct qeth_card *);
60 static int qeth_qdio_establish(struct qeth_card *);
61 static void qeth_free_qdio_buffers(struct qeth_card *);
62 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
63 struct qeth_qdio_out_buffer *buf,
64 enum iucv_tx_notify notification);
65 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
66 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
67 struct qeth_qdio_out_buffer *buf,
68 enum qeth_qdio_buffer_states newbufstate);
69 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
70
71 static struct workqueue_struct *qeth_wq;
72
73 static void qeth_close_dev_handler(struct work_struct *work)
74 {
75 struct qeth_card *card;
76
77 card = container_of(work, struct qeth_card, close_dev_work);
78 QETH_CARD_TEXT(card, 2, "cldevhdl");
79 rtnl_lock();
80 dev_close(card->dev);
81 rtnl_unlock();
82 ccwgroup_set_offline(card->gdev);
83 }
84
85 void qeth_close_dev(struct qeth_card *card)
86 {
87 QETH_CARD_TEXT(card, 2, "cldevsubm");
88 queue_work(qeth_wq, &card->close_dev_work);
89 }
90 EXPORT_SYMBOL_GPL(qeth_close_dev);
91
92 static inline const char *qeth_get_cardname(struct qeth_card *card)
93 {
94 if (card->info.guestlan) {
95 switch (card->info.type) {
96 case QETH_CARD_TYPE_OSD:
97 return " Virtual NIC QDIO";
98 case QETH_CARD_TYPE_IQD:
99 return " Virtual NIC Hiper";
100 case QETH_CARD_TYPE_OSM:
101 return " Virtual NIC QDIO - OSM";
102 case QETH_CARD_TYPE_OSX:
103 return " Virtual NIC QDIO - OSX";
104 default:
105 return " unknown";
106 }
107 } else {
108 switch (card->info.type) {
109 case QETH_CARD_TYPE_OSD:
110 return " OSD Express";
111 case QETH_CARD_TYPE_IQD:
112 return " HiperSockets";
113 case QETH_CARD_TYPE_OSN:
114 return " OSN QDIO";
115 case QETH_CARD_TYPE_OSM:
116 return " OSM QDIO";
117 case QETH_CARD_TYPE_OSX:
118 return " OSX QDIO";
119 default:
120 return " unknown";
121 }
122 }
123 return " n/a";
124 }
125
126 /* max length to be returned: 14 */
127 const char *qeth_get_cardname_short(struct qeth_card *card)
128 {
129 if (card->info.guestlan) {
130 switch (card->info.type) {
131 case QETH_CARD_TYPE_OSD:
132 return "Virt.NIC QDIO";
133 case QETH_CARD_TYPE_IQD:
134 return "Virt.NIC Hiper";
135 case QETH_CARD_TYPE_OSM:
136 return "Virt.NIC OSM";
137 case QETH_CARD_TYPE_OSX:
138 return "Virt.NIC OSX";
139 default:
140 return "unknown";
141 }
142 } else {
143 switch (card->info.type) {
144 case QETH_CARD_TYPE_OSD:
145 switch (card->info.link_type) {
146 case QETH_LINK_TYPE_FAST_ETH:
147 return "OSD_100";
148 case QETH_LINK_TYPE_HSTR:
149 return "HSTR";
150 case QETH_LINK_TYPE_GBIT_ETH:
151 return "OSD_1000";
152 case QETH_LINK_TYPE_10GBIT_ETH:
153 return "OSD_10GIG";
154 case QETH_LINK_TYPE_LANE_ETH100:
155 return "OSD_FE_LANE";
156 case QETH_LINK_TYPE_LANE_TR:
157 return "OSD_TR_LANE";
158 case QETH_LINK_TYPE_LANE_ETH1000:
159 return "OSD_GbE_LANE";
160 case QETH_LINK_TYPE_LANE:
161 return "OSD_ATM_LANE";
162 default:
163 return "OSD_Express";
164 }
165 case QETH_CARD_TYPE_IQD:
166 return "HiperSockets";
167 case QETH_CARD_TYPE_OSN:
168 return "OSN";
169 case QETH_CARD_TYPE_OSM:
170 return "OSM_1000";
171 case QETH_CARD_TYPE_OSX:
172 return "OSX_10GIG";
173 default:
174 return "unknown";
175 }
176 }
177 return "n/a";
178 }
179
180 void qeth_set_recovery_task(struct qeth_card *card)
181 {
182 card->recovery_task = current;
183 }
184 EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
185
186 void qeth_clear_recovery_task(struct qeth_card *card)
187 {
188 card->recovery_task = NULL;
189 }
190 EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
191
192 static bool qeth_is_recovery_task(const struct qeth_card *card)
193 {
194 return card->recovery_task == current;
195 }
196
197 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
198 int clear_start_mask)
199 {
200 unsigned long flags;
201
202 spin_lock_irqsave(&card->thread_mask_lock, flags);
203 card->thread_allowed_mask = threads;
204 if (clear_start_mask)
205 card->thread_start_mask &= threads;
206 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
207 wake_up(&card->wait_q);
208 }
209 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
210
211 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
212 {
213 unsigned long flags;
214 int rc = 0;
215
216 spin_lock_irqsave(&card->thread_mask_lock, flags);
217 rc = (card->thread_running_mask & threads);
218 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
219 return rc;
220 }
221 EXPORT_SYMBOL_GPL(qeth_threads_running);
222
223 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
224 {
225 if (qeth_is_recovery_task(card))
226 return 0;
227 return wait_event_interruptible(card->wait_q,
228 qeth_threads_running(card, threads) == 0);
229 }
230 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
231
232 void qeth_clear_working_pool_list(struct qeth_card *card)
233 {
234 struct qeth_buffer_pool_entry *pool_entry, *tmp;
235
236 QETH_CARD_TEXT(card, 5, "clwrklst");
237 list_for_each_entry_safe(pool_entry, tmp,
238 &card->qdio.in_buf_pool.entry_list, list){
239 list_del(&pool_entry->list);
240 }
241 }
242 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
243
244 static int qeth_alloc_buffer_pool(struct qeth_card *card)
245 {
246 struct qeth_buffer_pool_entry *pool_entry;
247 void *ptr;
248 int i, j;
249
250 QETH_CARD_TEXT(card, 5, "alocpool");
251 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
252 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
253 if (!pool_entry) {
254 qeth_free_buffer_pool(card);
255 return -ENOMEM;
256 }
257 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
258 ptr = (void *) __get_free_page(GFP_KERNEL);
259 if (!ptr) {
260 while (j > 0)
261 free_page((unsigned long)
262 pool_entry->elements[--j]);
263 kfree(pool_entry);
264 qeth_free_buffer_pool(card);
265 return -ENOMEM;
266 }
267 pool_entry->elements[j] = ptr;
268 }
269 list_add(&pool_entry->init_list,
270 &card->qdio.init_pool.entry_list);
271 }
272 return 0;
273 }
274
275 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
276 {
277 QETH_CARD_TEXT(card, 2, "realcbp");
278
279 if ((card->state != CARD_STATE_DOWN) &&
280 (card->state != CARD_STATE_RECOVER))
281 return -EPERM;
282
283 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
284 qeth_clear_working_pool_list(card);
285 qeth_free_buffer_pool(card);
286 card->qdio.in_buf_pool.buf_count = bufcnt;
287 card->qdio.init_pool.buf_count = bufcnt;
288 return qeth_alloc_buffer_pool(card);
289 }
290 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
291
292 static inline int qeth_cq_init(struct qeth_card *card)
293 {
294 int rc;
295
296 if (card->options.cq == QETH_CQ_ENABLED) {
297 QETH_DBF_TEXT(SETUP, 2, "cqinit");
298 memset(card->qdio.c_q->qdio_bufs, 0,
299 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
300 card->qdio.c_q->next_buf_to_init = 127;
301 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
302 card->qdio.no_in_queues - 1, 0,
303 127);
304 if (rc) {
305 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
306 goto out;
307 }
308 }
309 rc = 0;
310 out:
311 return rc;
312 }
313
314 static inline int qeth_alloc_cq(struct qeth_card *card)
315 {
316 int rc;
317
318 if (card->options.cq == QETH_CQ_ENABLED) {
319 int i;
320 struct qdio_outbuf_state *outbuf_states;
321
322 QETH_DBF_TEXT(SETUP, 2, "cqon");
323 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
324 GFP_KERNEL);
325 if (!card->qdio.c_q) {
326 rc = -1;
327 goto kmsg_out;
328 }
329 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
330
331 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
332 card->qdio.c_q->bufs[i].buffer =
333 &card->qdio.c_q->qdio_bufs[i];
334 }
335
336 card->qdio.no_in_queues = 2;
337
338 card->qdio.out_bufstates =
339 kzalloc(card->qdio.no_out_queues *
340 QDIO_MAX_BUFFERS_PER_Q *
341 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
342 outbuf_states = card->qdio.out_bufstates;
343 if (outbuf_states == NULL) {
344 rc = -1;
345 goto free_cq_out;
346 }
347 for (i = 0; i < card->qdio.no_out_queues; ++i) {
348 card->qdio.out_qs[i]->bufstates = outbuf_states;
349 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
350 }
351 } else {
352 QETH_DBF_TEXT(SETUP, 2, "nocq");
353 card->qdio.c_q = NULL;
354 card->qdio.no_in_queues = 1;
355 }
356 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
357 rc = 0;
358 out:
359 return rc;
360 free_cq_out:
361 kfree(card->qdio.c_q);
362 card->qdio.c_q = NULL;
363 kmsg_out:
364 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
365 goto out;
366 }
367
368 static inline void qeth_free_cq(struct qeth_card *card)
369 {
370 if (card->qdio.c_q) {
371 --card->qdio.no_in_queues;
372 kfree(card->qdio.c_q);
373 card->qdio.c_q = NULL;
374 }
375 kfree(card->qdio.out_bufstates);
376 card->qdio.out_bufstates = NULL;
377 }
378
379 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
380 int delayed) {
381 enum iucv_tx_notify n;
382
383 switch (sbalf15) {
384 case 0:
385 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
386 break;
387 case 4:
388 case 16:
389 case 17:
390 case 18:
391 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
392 TX_NOTIFY_UNREACHABLE;
393 break;
394 default:
395 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
396 TX_NOTIFY_GENERALERROR;
397 break;
398 }
399
400 return n;
401 }
402
403 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
404 int bidx, int forced_cleanup)
405 {
406 if (q->card->options.cq != QETH_CQ_ENABLED)
407 return;
408
409 if (q->bufs[bidx]->next_pending != NULL) {
410 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
411 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
412
413 while (c) {
414 if (forced_cleanup ||
415 atomic_read(&c->state) ==
416 QETH_QDIO_BUF_HANDLED_DELAYED) {
417 struct qeth_qdio_out_buffer *f = c;
418 QETH_CARD_TEXT(f->q->card, 5, "fp");
419 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
420 /* release here to avoid interleaving between
421 outbound tasklet and inbound tasklet
422 regarding notifications and lifecycle */
423 qeth_release_skbs(c);
424
425 c = f->next_pending;
426 WARN_ON_ONCE(head->next_pending != f);
427 head->next_pending = c;
428 kmem_cache_free(qeth_qdio_outbuf_cache, f);
429 } else {
430 head = c;
431 c = c->next_pending;
432 }
433
434 }
435 }
436 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
437 QETH_QDIO_BUF_HANDLED_DELAYED)) {
438 /* for recovery situations */
439 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
440 qeth_init_qdio_out_buf(q, bidx);
441 QETH_CARD_TEXT(q->card, 2, "clprecov");
442 }
443 }
444
445
446 static inline void qeth_qdio_handle_aob(struct qeth_card *card,
447 unsigned long phys_aob_addr) {
448 struct qaob *aob;
449 struct qeth_qdio_out_buffer *buffer;
450 enum iucv_tx_notify notification;
451
452 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
453 QETH_CARD_TEXT(card, 5, "haob");
454 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
455 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
456 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
457
458 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
459 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
460 notification = TX_NOTIFY_OK;
461 } else {
462 WARN_ON_ONCE(atomic_read(&buffer->state) !=
463 QETH_QDIO_BUF_PENDING);
464 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
465 notification = TX_NOTIFY_DELAYED_OK;
466 }
467
468 if (aob->aorc != 0) {
469 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
470 notification = qeth_compute_cq_notification(aob->aorc, 1);
471 }
472 qeth_notify_skbs(buffer->q, buffer, notification);
473
474 buffer->aob = NULL;
475 qeth_clear_output_buffer(buffer->q, buffer,
476 QETH_QDIO_BUF_HANDLED_DELAYED);
477
478 /* from here on: do not touch buffer anymore */
479 qdio_release_aob(aob);
480 }
481
482 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
483 {
484 return card->options.cq == QETH_CQ_ENABLED &&
485 card->qdio.c_q != NULL &&
486 queue != 0 &&
487 queue == card->qdio.no_in_queues - 1;
488 }
489
490
491 static int qeth_issue_next_read(struct qeth_card *card)
492 {
493 int rc;
494 struct qeth_cmd_buffer *iob;
495
496 QETH_CARD_TEXT(card, 5, "issnxrd");
497 if (card->read.state != CH_STATE_UP)
498 return -EIO;
499 iob = qeth_get_buffer(&card->read);
500 if (!iob) {
501 dev_warn(&card->gdev->dev, "The qeth device driver "
502 "failed to recover an error on the device\n");
503 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
504 "available\n", dev_name(&card->gdev->dev));
505 return -ENOMEM;
506 }
507 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
508 QETH_CARD_TEXT(card, 6, "noirqpnd");
509 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
510 (addr_t) iob, 0, 0);
511 if (rc) {
512 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
513 "rc=%i\n", dev_name(&card->gdev->dev), rc);
514 atomic_set(&card->read.irq_pending, 0);
515 card->read_or_write_problem = 1;
516 qeth_schedule_recovery(card);
517 wake_up(&card->wait_q);
518 }
519 return rc;
520 }
521
522 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
523 {
524 struct qeth_reply *reply;
525
526 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
527 if (reply) {
528 atomic_set(&reply->refcnt, 1);
529 atomic_set(&reply->received, 0);
530 reply->card = card;
531 }
532 return reply;
533 }
534
535 static void qeth_get_reply(struct qeth_reply *reply)
536 {
537 WARN_ON(atomic_read(&reply->refcnt) <= 0);
538 atomic_inc(&reply->refcnt);
539 }
540
541 static void qeth_put_reply(struct qeth_reply *reply)
542 {
543 WARN_ON(atomic_read(&reply->refcnt) <= 0);
544 if (atomic_dec_and_test(&reply->refcnt))
545 kfree(reply);
546 }
547
548 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
549 struct qeth_card *card)
550 {
551 char *ipa_name;
552 int com = cmd->hdr.command;
553 ipa_name = qeth_get_ipa_cmd_name(com);
554 if (rc)
555 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
556 "x%X \"%s\"\n",
557 ipa_name, com, dev_name(&card->gdev->dev),
558 QETH_CARD_IFNAME(card), rc,
559 qeth_get_ipa_msg(rc));
560 else
561 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
562 ipa_name, com, dev_name(&card->gdev->dev),
563 QETH_CARD_IFNAME(card));
564 }
565
566 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
567 struct qeth_cmd_buffer *iob)
568 {
569 struct qeth_ipa_cmd *cmd = NULL;
570
571 QETH_CARD_TEXT(card, 5, "chkipad");
572 if (IS_IPA(iob->data)) {
573 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
574 if (IS_IPA_REPLY(cmd)) {
575 if (cmd->hdr.command != IPA_CMD_SETCCID &&
576 cmd->hdr.command != IPA_CMD_DELCCID &&
577 cmd->hdr.command != IPA_CMD_MODCCID &&
578 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
579 qeth_issue_ipa_msg(cmd,
580 cmd->hdr.return_code, card);
581 return cmd;
582 } else {
583 switch (cmd->hdr.command) {
584 case IPA_CMD_STOPLAN:
585 if (cmd->hdr.return_code ==
586 IPA_RC_VEPA_TO_VEB_TRANSITION) {
587 dev_err(&card->gdev->dev,
588 "Interface %s is down because the "
589 "adjacent port is no longer in "
590 "reflective relay mode\n",
591 QETH_CARD_IFNAME(card));
592 qeth_close_dev(card);
593 } else {
594 dev_warn(&card->gdev->dev,
595 "The link for interface %s on CHPID"
596 " 0x%X failed\n",
597 QETH_CARD_IFNAME(card),
598 card->info.chpid);
599 qeth_issue_ipa_msg(cmd,
600 cmd->hdr.return_code, card);
601 }
602 card->lan_online = 0;
603 if (card->dev && netif_carrier_ok(card->dev))
604 netif_carrier_off(card->dev);
605 return NULL;
606 case IPA_CMD_STARTLAN:
607 dev_info(&card->gdev->dev,
608 "The link for %s on CHPID 0x%X has"
609 " been restored\n",
610 QETH_CARD_IFNAME(card),
611 card->info.chpid);
612 netif_carrier_on(card->dev);
613 card->lan_online = 1;
614 if (card->info.hwtrap)
615 card->info.hwtrap = 2;
616 qeth_schedule_recovery(card);
617 return NULL;
618 case IPA_CMD_MODCCID:
619 return cmd;
620 case IPA_CMD_REGISTER_LOCAL_ADDR:
621 QETH_CARD_TEXT(card, 3, "irla");
622 break;
623 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
624 QETH_CARD_TEXT(card, 3, "urla");
625 break;
626 default:
627 QETH_DBF_MESSAGE(2, "Received data is IPA "
628 "but not a reply!\n");
629 break;
630 }
631 }
632 }
633 return cmd;
634 }
635
636 void qeth_clear_ipacmd_list(struct qeth_card *card)
637 {
638 struct qeth_reply *reply, *r;
639 unsigned long flags;
640
641 QETH_CARD_TEXT(card, 4, "clipalst");
642
643 spin_lock_irqsave(&card->lock, flags);
644 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
645 qeth_get_reply(reply);
646 reply->rc = -EIO;
647 atomic_inc(&reply->received);
648 list_del_init(&reply->list);
649 wake_up(&reply->wait_q);
650 qeth_put_reply(reply);
651 }
652 spin_unlock_irqrestore(&card->lock, flags);
653 atomic_set(&card->write.irq_pending, 0);
654 }
655 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
656
657 static int qeth_check_idx_response(struct qeth_card *card,
658 unsigned char *buffer)
659 {
660 if (!buffer)
661 return 0;
662
663 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
664 if ((buffer[2] & 0xc0) == 0xc0) {
665 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
666 "with cause code 0x%02x%s\n",
667 buffer[4],
668 ((buffer[4] == 0x22) ?
669 " -- try another portname" : ""));
670 QETH_CARD_TEXT(card, 2, "ckidxres");
671 QETH_CARD_TEXT(card, 2, " idxterm");
672 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
673 if (buffer[4] == 0xf6) {
674 dev_err(&card->gdev->dev,
675 "The qeth device is not configured "
676 "for the OSI layer required by z/VM\n");
677 return -EPERM;
678 }
679 return -EIO;
680 }
681 return 0;
682 }
683
684 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
685 __u32 len)
686 {
687 struct qeth_card *card;
688
689 card = CARD_FROM_CDEV(channel->ccwdev);
690 QETH_CARD_TEXT(card, 4, "setupccw");
691 if (channel == &card->read)
692 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
693 else
694 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
695 channel->ccw.count = len;
696 channel->ccw.cda = (__u32) __pa(iob);
697 }
698
699 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
700 {
701 __u8 index;
702
703 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
704 index = channel->io_buf_no;
705 do {
706 if (channel->iob[index].state == BUF_STATE_FREE) {
707 channel->iob[index].state = BUF_STATE_LOCKED;
708 channel->io_buf_no = (channel->io_buf_no + 1) %
709 QETH_CMD_BUFFER_NO;
710 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
711 return channel->iob + index;
712 }
713 index = (index + 1) % QETH_CMD_BUFFER_NO;
714 } while (index != channel->io_buf_no);
715
716 return NULL;
717 }
718
719 void qeth_release_buffer(struct qeth_channel *channel,
720 struct qeth_cmd_buffer *iob)
721 {
722 unsigned long flags;
723
724 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
725 spin_lock_irqsave(&channel->iob_lock, flags);
726 memset(iob->data, 0, QETH_BUFSIZE);
727 iob->state = BUF_STATE_FREE;
728 iob->callback = qeth_send_control_data_cb;
729 iob->rc = 0;
730 spin_unlock_irqrestore(&channel->iob_lock, flags);
731 wake_up(&channel->wait_q);
732 }
733 EXPORT_SYMBOL_GPL(qeth_release_buffer);
734
735 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
736 {
737 struct qeth_cmd_buffer *buffer = NULL;
738 unsigned long flags;
739
740 spin_lock_irqsave(&channel->iob_lock, flags);
741 buffer = __qeth_get_buffer(channel);
742 spin_unlock_irqrestore(&channel->iob_lock, flags);
743 return buffer;
744 }
745
746 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
747 {
748 struct qeth_cmd_buffer *buffer;
749 wait_event(channel->wait_q,
750 ((buffer = qeth_get_buffer(channel)) != NULL));
751 return buffer;
752 }
753 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
754
755 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
756 {
757 int cnt;
758
759 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
760 qeth_release_buffer(channel, &channel->iob[cnt]);
761 channel->buf_no = 0;
762 channel->io_buf_no = 0;
763 }
764 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
765
766 static void qeth_send_control_data_cb(struct qeth_channel *channel,
767 struct qeth_cmd_buffer *iob)
768 {
769 struct qeth_card *card;
770 struct qeth_reply *reply, *r;
771 struct qeth_ipa_cmd *cmd;
772 unsigned long flags;
773 int keep_reply;
774 int rc = 0;
775
776 card = CARD_FROM_CDEV(channel->ccwdev);
777 QETH_CARD_TEXT(card, 4, "sndctlcb");
778 rc = qeth_check_idx_response(card, iob->data);
779 switch (rc) {
780 case 0:
781 break;
782 case -EIO:
783 qeth_clear_ipacmd_list(card);
784 qeth_schedule_recovery(card);
785 /* fall through */
786 default:
787 goto out;
788 }
789
790 cmd = qeth_check_ipa_data(card, iob);
791 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
792 goto out;
793 /*in case of OSN : check if cmd is set */
794 if (card->info.type == QETH_CARD_TYPE_OSN &&
795 cmd &&
796 cmd->hdr.command != IPA_CMD_STARTLAN &&
797 card->osn_info.assist_cb != NULL) {
798 card->osn_info.assist_cb(card->dev, cmd);
799 goto out;
800 }
801
802 spin_lock_irqsave(&card->lock, flags);
803 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
804 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
805 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
806 qeth_get_reply(reply);
807 list_del_init(&reply->list);
808 spin_unlock_irqrestore(&card->lock, flags);
809 keep_reply = 0;
810 if (reply->callback != NULL) {
811 if (cmd) {
812 reply->offset = (__u16)((char *)cmd -
813 (char *)iob->data);
814 keep_reply = reply->callback(card,
815 reply,
816 (unsigned long)cmd);
817 } else
818 keep_reply = reply->callback(card,
819 reply,
820 (unsigned long)iob);
821 }
822 if (cmd)
823 reply->rc = (u16) cmd->hdr.return_code;
824 else if (iob->rc)
825 reply->rc = iob->rc;
826 if (keep_reply) {
827 spin_lock_irqsave(&card->lock, flags);
828 list_add_tail(&reply->list,
829 &card->cmd_waiter_list);
830 spin_unlock_irqrestore(&card->lock, flags);
831 } else {
832 atomic_inc(&reply->received);
833 wake_up(&reply->wait_q);
834 }
835 qeth_put_reply(reply);
836 goto out;
837 }
838 }
839 spin_unlock_irqrestore(&card->lock, flags);
840 out:
841 memcpy(&card->seqno.pdu_hdr_ack,
842 QETH_PDU_HEADER_SEQ_NO(iob->data),
843 QETH_SEQ_NO_LENGTH);
844 qeth_release_buffer(channel, iob);
845 }
846
847 static int qeth_setup_channel(struct qeth_channel *channel)
848 {
849 int cnt;
850
851 QETH_DBF_TEXT(SETUP, 2, "setupch");
852 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
853 channel->iob[cnt].data =
854 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
855 if (channel->iob[cnt].data == NULL)
856 break;
857 channel->iob[cnt].state = BUF_STATE_FREE;
858 channel->iob[cnt].channel = channel;
859 channel->iob[cnt].callback = qeth_send_control_data_cb;
860 channel->iob[cnt].rc = 0;
861 }
862 if (cnt < QETH_CMD_BUFFER_NO) {
863 while (cnt-- > 0)
864 kfree(channel->iob[cnt].data);
865 return -ENOMEM;
866 }
867 channel->buf_no = 0;
868 channel->io_buf_no = 0;
869 atomic_set(&channel->irq_pending, 0);
870 spin_lock_init(&channel->iob_lock);
871
872 init_waitqueue_head(&channel->wait_q);
873 return 0;
874 }
875
876 static int qeth_set_thread_start_bit(struct qeth_card *card,
877 unsigned long thread)
878 {
879 unsigned long flags;
880
881 spin_lock_irqsave(&card->thread_mask_lock, flags);
882 if (!(card->thread_allowed_mask & thread) ||
883 (card->thread_start_mask & thread)) {
884 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
885 return -EPERM;
886 }
887 card->thread_start_mask |= thread;
888 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
889 return 0;
890 }
891
892 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
893 {
894 unsigned long flags;
895
896 spin_lock_irqsave(&card->thread_mask_lock, flags);
897 card->thread_start_mask &= ~thread;
898 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
899 wake_up(&card->wait_q);
900 }
901 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
902
903 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
904 {
905 unsigned long flags;
906
907 spin_lock_irqsave(&card->thread_mask_lock, flags);
908 card->thread_running_mask &= ~thread;
909 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
910 wake_up(&card->wait_q);
911 }
912 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
913
914 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
915 {
916 unsigned long flags;
917 int rc = 0;
918
919 spin_lock_irqsave(&card->thread_mask_lock, flags);
920 if (card->thread_start_mask & thread) {
921 if ((card->thread_allowed_mask & thread) &&
922 !(card->thread_running_mask & thread)) {
923 rc = 1;
924 card->thread_start_mask &= ~thread;
925 card->thread_running_mask |= thread;
926 } else
927 rc = -EPERM;
928 }
929 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
930 return rc;
931 }
932
933 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
934 {
935 int rc = 0;
936
937 wait_event(card->wait_q,
938 (rc = __qeth_do_run_thread(card, thread)) >= 0);
939 return rc;
940 }
941 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
942
943 void qeth_schedule_recovery(struct qeth_card *card)
944 {
945 QETH_CARD_TEXT(card, 2, "startrec");
946 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
947 schedule_work(&card->kernel_thread_starter);
948 }
949 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
950
951 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
952 {
953 int dstat, cstat;
954 char *sense;
955 struct qeth_card *card;
956
957 sense = (char *) irb->ecw;
958 cstat = irb->scsw.cmd.cstat;
959 dstat = irb->scsw.cmd.dstat;
960 card = CARD_FROM_CDEV(cdev);
961
962 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
963 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
964 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
965 QETH_CARD_TEXT(card, 2, "CGENCHK");
966 dev_warn(&cdev->dev, "The qeth device driver "
967 "failed to recover an error on the device\n");
968 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
969 dev_name(&cdev->dev), dstat, cstat);
970 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
971 16, 1, irb, 64, 1);
972 return 1;
973 }
974
975 if (dstat & DEV_STAT_UNIT_CHECK) {
976 if (sense[SENSE_RESETTING_EVENT_BYTE] &
977 SENSE_RESETTING_EVENT_FLAG) {
978 QETH_CARD_TEXT(card, 2, "REVIND");
979 return 1;
980 }
981 if (sense[SENSE_COMMAND_REJECT_BYTE] &
982 SENSE_COMMAND_REJECT_FLAG) {
983 QETH_CARD_TEXT(card, 2, "CMDREJi");
984 return 1;
985 }
986 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
987 QETH_CARD_TEXT(card, 2, "AFFE");
988 return 1;
989 }
990 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
991 QETH_CARD_TEXT(card, 2, "ZEROSEN");
992 return 0;
993 }
994 QETH_CARD_TEXT(card, 2, "DGENCHK");
995 return 1;
996 }
997 return 0;
998 }
999
1000 static long __qeth_check_irb_error(struct ccw_device *cdev,
1001 unsigned long intparm, struct irb *irb)
1002 {
1003 struct qeth_card *card;
1004
1005 card = CARD_FROM_CDEV(cdev);
1006
1007 if (!IS_ERR(irb))
1008 return 0;
1009
1010 switch (PTR_ERR(irb)) {
1011 case -EIO:
1012 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1013 dev_name(&cdev->dev));
1014 QETH_CARD_TEXT(card, 2, "ckirberr");
1015 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
1016 break;
1017 case -ETIMEDOUT:
1018 dev_warn(&cdev->dev, "A hardware operation timed out"
1019 " on the device\n");
1020 QETH_CARD_TEXT(card, 2, "ckirberr");
1021 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
1022 if (intparm == QETH_RCD_PARM) {
1023 if (card && (card->data.ccwdev == cdev)) {
1024 card->data.state = CH_STATE_DOWN;
1025 wake_up(&card->wait_q);
1026 }
1027 }
1028 break;
1029 default:
1030 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1031 dev_name(&cdev->dev), PTR_ERR(irb));
1032 QETH_CARD_TEXT(card, 2, "ckirberr");
1033 QETH_CARD_TEXT(card, 2, " rc???");
1034 }
1035 return PTR_ERR(irb);
1036 }
1037
1038 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1039 struct irb *irb)
1040 {
1041 int rc;
1042 int cstat, dstat;
1043 struct qeth_cmd_buffer *buffer;
1044 struct qeth_channel *channel;
1045 struct qeth_card *card;
1046 struct qeth_cmd_buffer *iob;
1047 __u8 index;
1048
1049 if (__qeth_check_irb_error(cdev, intparm, irb))
1050 return;
1051 cstat = irb->scsw.cmd.cstat;
1052 dstat = irb->scsw.cmd.dstat;
1053
1054 card = CARD_FROM_CDEV(cdev);
1055 if (!card)
1056 return;
1057
1058 QETH_CARD_TEXT(card, 5, "irq");
1059
1060 if (card->read.ccwdev == cdev) {
1061 channel = &card->read;
1062 QETH_CARD_TEXT(card, 5, "read");
1063 } else if (card->write.ccwdev == cdev) {
1064 channel = &card->write;
1065 QETH_CARD_TEXT(card, 5, "write");
1066 } else {
1067 channel = &card->data;
1068 QETH_CARD_TEXT(card, 5, "data");
1069 }
1070 atomic_set(&channel->irq_pending, 0);
1071
1072 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
1073 channel->state = CH_STATE_STOPPED;
1074
1075 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
1076 channel->state = CH_STATE_HALTED;
1077
1078 /*let's wake up immediately on data channel*/
1079 if ((channel == &card->data) && (intparm != 0) &&
1080 (intparm != QETH_RCD_PARM))
1081 goto out;
1082
1083 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
1084 QETH_CARD_TEXT(card, 6, "clrchpar");
1085 /* we don't have to handle this further */
1086 intparm = 0;
1087 }
1088 if (intparm == QETH_HALT_CHANNEL_PARM) {
1089 QETH_CARD_TEXT(card, 6, "hltchpar");
1090 /* we don't have to handle this further */
1091 intparm = 0;
1092 }
1093 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1094 (dstat & DEV_STAT_UNIT_CHECK) ||
1095 (cstat)) {
1096 if (irb->esw.esw0.erw.cons) {
1097 dev_warn(&channel->ccwdev->dev,
1098 "The qeth device driver failed to recover "
1099 "an error on the device\n");
1100 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1101 "0x%X dstat 0x%X\n",
1102 dev_name(&channel->ccwdev->dev), cstat, dstat);
1103 print_hex_dump(KERN_WARNING, "qeth: irb ",
1104 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1105 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1106 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1107 }
1108 if (intparm == QETH_RCD_PARM) {
1109 channel->state = CH_STATE_DOWN;
1110 goto out;
1111 }
1112 rc = qeth_get_problem(cdev, irb);
1113 if (rc) {
1114 qeth_clear_ipacmd_list(card);
1115 qeth_schedule_recovery(card);
1116 goto out;
1117 }
1118 }
1119
1120 if (intparm == QETH_RCD_PARM) {
1121 channel->state = CH_STATE_RCD_DONE;
1122 goto out;
1123 }
1124 if (intparm) {
1125 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1126 buffer->state = BUF_STATE_PROCESSED;
1127 }
1128 if (channel == &card->data)
1129 return;
1130 if (channel == &card->read &&
1131 channel->state == CH_STATE_UP)
1132 qeth_issue_next_read(card);
1133
1134 iob = channel->iob;
1135 index = channel->buf_no;
1136 while (iob[index].state == BUF_STATE_PROCESSED) {
1137 if (iob[index].callback != NULL)
1138 iob[index].callback(channel, iob + index);
1139
1140 index = (index + 1) % QETH_CMD_BUFFER_NO;
1141 }
1142 channel->buf_no = index;
1143 out:
1144 wake_up(&card->wait_q);
1145 return;
1146 }
1147
1148 static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
1149 struct qeth_qdio_out_buffer *buf,
1150 enum iucv_tx_notify notification)
1151 {
1152 struct sk_buff *skb;
1153
1154 if (skb_queue_empty(&buf->skb_list))
1155 goto out;
1156 skb = skb_peek(&buf->skb_list);
1157 while (skb) {
1158 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1159 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1160 if (skb->protocol == ETH_P_AF_IUCV) {
1161 if (skb->sk) {
1162 struct iucv_sock *iucv = iucv_sk(skb->sk);
1163 iucv->sk_txnotify(skb, notification);
1164 }
1165 }
1166 if (skb_queue_is_last(&buf->skb_list, skb))
1167 skb = NULL;
1168 else
1169 skb = skb_queue_next(&buf->skb_list, skb);
1170 }
1171 out:
1172 return;
1173 }
1174
1175 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1176 {
1177 struct sk_buff *skb;
1178 struct iucv_sock *iucv;
1179 int notify_general_error = 0;
1180
1181 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1182 notify_general_error = 1;
1183
1184 /* release may never happen from within CQ tasklet scope */
1185 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
1186
1187 skb = skb_dequeue(&buf->skb_list);
1188 while (skb) {
1189 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1190 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
1191 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1192 if (skb->sk) {
1193 iucv = iucv_sk(skb->sk);
1194 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1195 }
1196 }
1197 atomic_dec(&skb->users);
1198 dev_kfree_skb_any(skb);
1199 skb = skb_dequeue(&buf->skb_list);
1200 }
1201 }
1202
1203 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1204 struct qeth_qdio_out_buffer *buf,
1205 enum qeth_qdio_buffer_states newbufstate)
1206 {
1207 int i;
1208
1209 /* is PCI flag set on buffer? */
1210 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1211 atomic_dec(&queue->set_pci_flags_count);
1212
1213 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1214 qeth_release_skbs(buf);
1215 }
1216 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
1217 if (buf->buffer->element[i].addr && buf->is_header[i])
1218 kmem_cache_free(qeth_core_header_cache,
1219 buf->buffer->element[i].addr);
1220 buf->is_header[i] = 0;
1221 buf->buffer->element[i].length = 0;
1222 buf->buffer->element[i].addr = NULL;
1223 buf->buffer->element[i].eflags = 0;
1224 buf->buffer->element[i].sflags = 0;
1225 }
1226 buf->buffer->element[15].eflags = 0;
1227 buf->buffer->element[15].sflags = 0;
1228 buf->next_element_to_fill = 0;
1229 atomic_set(&buf->state, newbufstate);
1230 }
1231
1232 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1233 {
1234 int j;
1235
1236 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1237 if (!q->bufs[j])
1238 continue;
1239 qeth_cleanup_handled_pending(q, j, 1);
1240 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1241 if (free) {
1242 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1243 q->bufs[j] = NULL;
1244 }
1245 }
1246 }
1247
1248 void qeth_clear_qdio_buffers(struct qeth_card *card)
1249 {
1250 int i;
1251
1252 QETH_CARD_TEXT(card, 2, "clearqdbf");
1253 /* clear outbound buffers to free skbs */
1254 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1255 if (card->qdio.out_qs[i]) {
1256 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
1257 }
1258 }
1259 }
1260 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1261
1262 static void qeth_free_buffer_pool(struct qeth_card *card)
1263 {
1264 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1265 int i = 0;
1266 list_for_each_entry_safe(pool_entry, tmp,
1267 &card->qdio.init_pool.entry_list, init_list){
1268 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1269 free_page((unsigned long)pool_entry->elements[i]);
1270 list_del(&pool_entry->init_list);
1271 kfree(pool_entry);
1272 }
1273 }
1274
1275 static void qeth_free_qdio_buffers(struct qeth_card *card)
1276 {
1277 int i, j;
1278
1279 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1280 QETH_QDIO_UNINITIALIZED)
1281 return;
1282
1283 qeth_free_cq(card);
1284 cancel_delayed_work_sync(&card->buffer_reclaim_work);
1285 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
1286 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
1287 kfree(card->qdio.in_q);
1288 card->qdio.in_q = NULL;
1289 /* inbound buffer pool */
1290 qeth_free_buffer_pool(card);
1291 /* free outbound qdio_qs */
1292 if (card->qdio.out_qs) {
1293 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1294 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
1295 kfree(card->qdio.out_qs[i]);
1296 }
1297 kfree(card->qdio.out_qs);
1298 card->qdio.out_qs = NULL;
1299 }
1300 }
1301
1302 static void qeth_clean_channel(struct qeth_channel *channel)
1303 {
1304 int cnt;
1305
1306 QETH_DBF_TEXT(SETUP, 2, "freech");
1307 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1308 kfree(channel->iob[cnt].data);
1309 }
1310
1311 static void qeth_set_single_write_queues(struct qeth_card *card)
1312 {
1313 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1314 (card->qdio.no_out_queues == 4))
1315 qeth_free_qdio_buffers(card);
1316
1317 card->qdio.no_out_queues = 1;
1318 if (card->qdio.default_out_queue != 0)
1319 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1320
1321 card->qdio.default_out_queue = 0;
1322 }
1323
1324 static void qeth_set_multiple_write_queues(struct qeth_card *card)
1325 {
1326 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1327 (card->qdio.no_out_queues == 1)) {
1328 qeth_free_qdio_buffers(card);
1329 card->qdio.default_out_queue = 2;
1330 }
1331 card->qdio.no_out_queues = 4;
1332 }
1333
1334 static void qeth_update_from_chp_desc(struct qeth_card *card)
1335 {
1336 struct ccw_device *ccwdev;
1337 struct channelPath_dsc {
1338 u8 flags;
1339 u8 lsn;
1340 u8 desc;
1341 u8 chpid;
1342 u8 swla;
1343 u8 zeroes;
1344 u8 chla;
1345 u8 chpp;
1346 } *chp_dsc;
1347
1348 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
1349
1350 ccwdev = card->data.ccwdev;
1351 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1352 if (!chp_dsc)
1353 goto out;
1354
1355 card->info.func_level = 0x4100 + chp_dsc->desc;
1356 if (card->info.type == QETH_CARD_TYPE_IQD)
1357 goto out;
1358
1359 /* CHPP field bit 6 == 1 -> single queue */
1360 if ((chp_dsc->chpp & 0x02) == 0x02)
1361 qeth_set_single_write_queues(card);
1362 else
1363 qeth_set_multiple_write_queues(card);
1364 out:
1365 kfree(chp_dsc);
1366 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1367 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1368 }
1369
1370 static void qeth_init_qdio_info(struct qeth_card *card)
1371 {
1372 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1373 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1374 /* inbound */
1375 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1376 if (card->info.type == QETH_CARD_TYPE_IQD)
1377 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1378 else
1379 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1380 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1381 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1382 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1383 }
1384
1385 static void qeth_set_intial_options(struct qeth_card *card)
1386 {
1387 card->options.route4.type = NO_ROUTER;
1388 card->options.route6.type = NO_ROUTER;
1389 card->options.fake_broadcast = 0;
1390 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1391 card->options.performance_stats = 0;
1392 card->options.rx_sg_cb = QETH_RX_SG_CB;
1393 card->options.isolation = ISOLATION_MODE_NONE;
1394 card->options.cq = QETH_CQ_DISABLED;
1395 }
1396
1397 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1398 {
1399 unsigned long flags;
1400 int rc = 0;
1401
1402 spin_lock_irqsave(&card->thread_mask_lock, flags);
1403 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
1404 (u8) card->thread_start_mask,
1405 (u8) card->thread_allowed_mask,
1406 (u8) card->thread_running_mask);
1407 rc = (card->thread_start_mask & thread);
1408 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1409 return rc;
1410 }
1411
1412 static void qeth_start_kernel_thread(struct work_struct *work)
1413 {
1414 struct task_struct *ts;
1415 struct qeth_card *card = container_of(work, struct qeth_card,
1416 kernel_thread_starter);
1417 QETH_CARD_TEXT(card , 2, "strthrd");
1418
1419 if (card->read.state != CH_STATE_UP &&
1420 card->write.state != CH_STATE_UP)
1421 return;
1422 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
1423 ts = kthread_run(card->discipline->recover, (void *)card,
1424 "qeth_recover");
1425 if (IS_ERR(ts)) {
1426 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1427 qeth_clear_thread_running_bit(card,
1428 QETH_RECOVER_THREAD);
1429 }
1430 }
1431 }
1432
1433 static int qeth_setup_card(struct qeth_card *card)
1434 {
1435
1436 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1437 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1438
1439 card->read.state = CH_STATE_DOWN;
1440 card->write.state = CH_STATE_DOWN;
1441 card->data.state = CH_STATE_DOWN;
1442 card->state = CARD_STATE_DOWN;
1443 card->lan_online = 0;
1444 card->read_or_write_problem = 0;
1445 card->dev = NULL;
1446 spin_lock_init(&card->vlanlock);
1447 spin_lock_init(&card->mclock);
1448 spin_lock_init(&card->lock);
1449 spin_lock_init(&card->ip_lock);
1450 spin_lock_init(&card->thread_mask_lock);
1451 mutex_init(&card->conf_mutex);
1452 mutex_init(&card->discipline_mutex);
1453 card->thread_start_mask = 0;
1454 card->thread_allowed_mask = 0;
1455 card->thread_running_mask = 0;
1456 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1457 INIT_LIST_HEAD(&card->ip_list);
1458 INIT_LIST_HEAD(card->ip_tbd_list);
1459 INIT_LIST_HEAD(&card->cmd_waiter_list);
1460 init_waitqueue_head(&card->wait_q);
1461 /* initial options */
1462 qeth_set_intial_options(card);
1463 /* IP address takeover */
1464 INIT_LIST_HEAD(&card->ipato.entries);
1465 card->ipato.enabled = 0;
1466 card->ipato.invert4 = 0;
1467 card->ipato.invert6 = 0;
1468 /* init QDIO stuff */
1469 qeth_init_qdio_info(card);
1470 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
1471 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
1472 return 0;
1473 }
1474
1475 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1476 {
1477 struct qeth_card *card = container_of(slr, struct qeth_card,
1478 qeth_service_level);
1479 if (card->info.mcl_level[0])
1480 seq_printf(m, "qeth: %s firmware level %s\n",
1481 CARD_BUS_ID(card), card->info.mcl_level);
1482 }
1483
1484 static struct qeth_card *qeth_alloc_card(void)
1485 {
1486 struct qeth_card *card;
1487
1488 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1489 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1490 if (!card)
1491 goto out;
1492 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1493 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
1494 if (!card->ip_tbd_list) {
1495 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1496 goto out_card;
1497 }
1498 if (qeth_setup_channel(&card->read))
1499 goto out_ip;
1500 if (qeth_setup_channel(&card->write))
1501 goto out_channel;
1502 card->options.layer2 = -1;
1503 card->qeth_service_level.seq_print = qeth_core_sl_print;
1504 register_service_level(&card->qeth_service_level);
1505 return card;
1506
1507 out_channel:
1508 qeth_clean_channel(&card->read);
1509 out_ip:
1510 kfree(card->ip_tbd_list);
1511 out_card:
1512 kfree(card);
1513 out:
1514 return NULL;
1515 }
1516
1517 static int qeth_determine_card_type(struct qeth_card *card)
1518 {
1519 int i = 0;
1520
1521 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1522
1523 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1524 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1525 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1526 if ((CARD_RDEV(card)->id.dev_type ==
1527 known_devices[i][QETH_DEV_TYPE_IND]) &&
1528 (CARD_RDEV(card)->id.dev_model ==
1529 known_devices[i][QETH_DEV_MODEL_IND])) {
1530 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1531 card->qdio.no_out_queues =
1532 known_devices[i][QETH_QUEUE_NO_IND];
1533 card->qdio.no_in_queues = 1;
1534 card->info.is_multicast_different =
1535 known_devices[i][QETH_MULTICAST_IND];
1536 qeth_update_from_chp_desc(card);
1537 return 0;
1538 }
1539 i++;
1540 }
1541 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1542 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1543 "unknown type\n");
1544 return -ENOENT;
1545 }
1546
1547 static int qeth_clear_channel(struct qeth_channel *channel)
1548 {
1549 unsigned long flags;
1550 struct qeth_card *card;
1551 int rc;
1552
1553 card = CARD_FROM_CDEV(channel->ccwdev);
1554 QETH_CARD_TEXT(card, 3, "clearch");
1555 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1556 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1557 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1558
1559 if (rc)
1560 return rc;
1561 rc = wait_event_interruptible_timeout(card->wait_q,
1562 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1563 if (rc == -ERESTARTSYS)
1564 return rc;
1565 if (channel->state != CH_STATE_STOPPED)
1566 return -ETIME;
1567 channel->state = CH_STATE_DOWN;
1568 return 0;
1569 }
1570
1571 static int qeth_halt_channel(struct qeth_channel *channel)
1572 {
1573 unsigned long flags;
1574 struct qeth_card *card;
1575 int rc;
1576
1577 card = CARD_FROM_CDEV(channel->ccwdev);
1578 QETH_CARD_TEXT(card, 3, "haltch");
1579 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1580 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1581 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1582
1583 if (rc)
1584 return rc;
1585 rc = wait_event_interruptible_timeout(card->wait_q,
1586 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1587 if (rc == -ERESTARTSYS)
1588 return rc;
1589 if (channel->state != CH_STATE_HALTED)
1590 return -ETIME;
1591 return 0;
1592 }
1593
1594 static int qeth_halt_channels(struct qeth_card *card)
1595 {
1596 int rc1 = 0, rc2 = 0, rc3 = 0;
1597
1598 QETH_CARD_TEXT(card, 3, "haltchs");
1599 rc1 = qeth_halt_channel(&card->read);
1600 rc2 = qeth_halt_channel(&card->write);
1601 rc3 = qeth_halt_channel(&card->data);
1602 if (rc1)
1603 return rc1;
1604 if (rc2)
1605 return rc2;
1606 return rc3;
1607 }
1608
1609 static int qeth_clear_channels(struct qeth_card *card)
1610 {
1611 int rc1 = 0, rc2 = 0, rc3 = 0;
1612
1613 QETH_CARD_TEXT(card, 3, "clearchs");
1614 rc1 = qeth_clear_channel(&card->read);
1615 rc2 = qeth_clear_channel(&card->write);
1616 rc3 = qeth_clear_channel(&card->data);
1617 if (rc1)
1618 return rc1;
1619 if (rc2)
1620 return rc2;
1621 return rc3;
1622 }
1623
1624 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1625 {
1626 int rc = 0;
1627
1628 QETH_CARD_TEXT(card, 3, "clhacrd");
1629
1630 if (halt)
1631 rc = qeth_halt_channels(card);
1632 if (rc)
1633 return rc;
1634 return qeth_clear_channels(card);
1635 }
1636
1637 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1638 {
1639 int rc = 0;
1640
1641 QETH_CARD_TEXT(card, 3, "qdioclr");
1642 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1643 QETH_QDIO_CLEANING)) {
1644 case QETH_QDIO_ESTABLISHED:
1645 if (card->info.type == QETH_CARD_TYPE_IQD)
1646 rc = qdio_shutdown(CARD_DDEV(card),
1647 QDIO_FLAG_CLEANUP_USING_HALT);
1648 else
1649 rc = qdio_shutdown(CARD_DDEV(card),
1650 QDIO_FLAG_CLEANUP_USING_CLEAR);
1651 if (rc)
1652 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
1653 qdio_free(CARD_DDEV(card));
1654 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1655 break;
1656 case QETH_QDIO_CLEANING:
1657 return rc;
1658 default:
1659 break;
1660 }
1661 rc = qeth_clear_halt_card(card, use_halt);
1662 if (rc)
1663 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
1664 card->state = CARD_STATE_DOWN;
1665 return rc;
1666 }
1667 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1668
1669 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1670 int *length)
1671 {
1672 struct ciw *ciw;
1673 char *rcd_buf;
1674 int ret;
1675 struct qeth_channel *channel = &card->data;
1676 unsigned long flags;
1677
1678 /*
1679 * scan for RCD command in extended SenseID data
1680 */
1681 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1682 if (!ciw || ciw->cmd == 0)
1683 return -EOPNOTSUPP;
1684 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1685 if (!rcd_buf)
1686 return -ENOMEM;
1687
1688 channel->ccw.cmd_code = ciw->cmd;
1689 channel->ccw.cda = (__u32) __pa(rcd_buf);
1690 channel->ccw.count = ciw->count;
1691 channel->ccw.flags = CCW_FLAG_SLI;
1692 channel->state = CH_STATE_RCD;
1693 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1694 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1695 QETH_RCD_PARM, LPM_ANYPATH, 0,
1696 QETH_RCD_TIMEOUT);
1697 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1698 if (!ret)
1699 wait_event(card->wait_q,
1700 (channel->state == CH_STATE_RCD_DONE ||
1701 channel->state == CH_STATE_DOWN));
1702 if (channel->state == CH_STATE_DOWN)
1703 ret = -EIO;
1704 else
1705 channel->state = CH_STATE_DOWN;
1706 if (ret) {
1707 kfree(rcd_buf);
1708 *buffer = NULL;
1709 *length = 0;
1710 } else {
1711 *length = ciw->count;
1712 *buffer = rcd_buf;
1713 }
1714 return ret;
1715 }
1716
1717 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1718 {
1719 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1720 card->info.chpid = prcd[30];
1721 card->info.unit_addr2 = prcd[31];
1722 card->info.cula = prcd[63];
1723 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1724 (prcd[0x11] == _ascebc['M']));
1725 }
1726
1727 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1728 {
1729 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1730
1731 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
1732 (prcd[76] == 0xF5 || prcd[76] == 0xF6)) {
1733 card->info.blkt.time_total = 250;
1734 card->info.blkt.inter_packet = 5;
1735 card->info.blkt.inter_packet_jumbo = 15;
1736 } else {
1737 card->info.blkt.time_total = 0;
1738 card->info.blkt.inter_packet = 0;
1739 card->info.blkt.inter_packet_jumbo = 0;
1740 }
1741 }
1742
1743 static void qeth_init_tokens(struct qeth_card *card)
1744 {
1745 card->token.issuer_rm_w = 0x00010103UL;
1746 card->token.cm_filter_w = 0x00010108UL;
1747 card->token.cm_connection_w = 0x0001010aUL;
1748 card->token.ulp_filter_w = 0x0001010bUL;
1749 card->token.ulp_connection_w = 0x0001010dUL;
1750 }
1751
1752 static void qeth_init_func_level(struct qeth_card *card)
1753 {
1754 switch (card->info.type) {
1755 case QETH_CARD_TYPE_IQD:
1756 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
1757 break;
1758 case QETH_CARD_TYPE_OSD:
1759 case QETH_CARD_TYPE_OSN:
1760 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1761 break;
1762 default:
1763 break;
1764 }
1765 }
1766
1767 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1768 void (*idx_reply_cb)(struct qeth_channel *,
1769 struct qeth_cmd_buffer *))
1770 {
1771 struct qeth_cmd_buffer *iob;
1772 unsigned long flags;
1773 int rc;
1774 struct qeth_card *card;
1775
1776 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1777 card = CARD_FROM_CDEV(channel->ccwdev);
1778 iob = qeth_get_buffer(channel);
1779 iob->callback = idx_reply_cb;
1780 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1781 channel->ccw.count = QETH_BUFSIZE;
1782 channel->ccw.cda = (__u32) __pa(iob->data);
1783
1784 wait_event(card->wait_q,
1785 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1786 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1787 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1788 rc = ccw_device_start(channel->ccwdev,
1789 &channel->ccw, (addr_t) iob, 0, 0);
1790 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1791
1792 if (rc) {
1793 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1794 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1795 atomic_set(&channel->irq_pending, 0);
1796 wake_up(&card->wait_q);
1797 return rc;
1798 }
1799 rc = wait_event_interruptible_timeout(card->wait_q,
1800 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1801 if (rc == -ERESTARTSYS)
1802 return rc;
1803 if (channel->state != CH_STATE_UP) {
1804 rc = -ETIME;
1805 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1806 qeth_clear_cmd_buffers(channel);
1807 } else
1808 rc = 0;
1809 return rc;
1810 }
1811
1812 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1813 void (*idx_reply_cb)(struct qeth_channel *,
1814 struct qeth_cmd_buffer *))
1815 {
1816 struct qeth_card *card;
1817 struct qeth_cmd_buffer *iob;
1818 unsigned long flags;
1819 __u16 temp;
1820 __u8 tmp;
1821 int rc;
1822 struct ccw_dev_id temp_devid;
1823
1824 card = CARD_FROM_CDEV(channel->ccwdev);
1825
1826 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1827
1828 iob = qeth_get_buffer(channel);
1829 iob->callback = idx_reply_cb;
1830 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1831 channel->ccw.count = IDX_ACTIVATE_SIZE;
1832 channel->ccw.cda = (__u32) __pa(iob->data);
1833 if (channel == &card->write) {
1834 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1835 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1836 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1837 card->seqno.trans_hdr++;
1838 } else {
1839 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1840 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1841 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1842 }
1843 tmp = ((__u8)card->info.portno) | 0x80;
1844 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1845 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1846 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1847 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1848 &card->info.func_level, sizeof(__u16));
1849 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1850 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1851 temp = (card->info.cula << 8) + card->info.unit_addr2;
1852 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1853
1854 wait_event(card->wait_q,
1855 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1856 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1857 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1858 rc = ccw_device_start(channel->ccwdev,
1859 &channel->ccw, (addr_t) iob, 0, 0);
1860 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1861
1862 if (rc) {
1863 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1864 rc);
1865 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1866 atomic_set(&channel->irq_pending, 0);
1867 wake_up(&card->wait_q);
1868 return rc;
1869 }
1870 rc = wait_event_interruptible_timeout(card->wait_q,
1871 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1872 if (rc == -ERESTARTSYS)
1873 return rc;
1874 if (channel->state != CH_STATE_ACTIVATING) {
1875 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1876 " failed to recover an error on the device\n");
1877 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1878 dev_name(&channel->ccwdev->dev));
1879 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1880 qeth_clear_cmd_buffers(channel);
1881 return -ETIME;
1882 }
1883 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1884 }
1885
1886 static int qeth_peer_func_level(int level)
1887 {
1888 if ((level & 0xff) == 8)
1889 return (level & 0xff) + 0x400;
1890 if (((level >> 8) & 3) == 1)
1891 return (level & 0xff) + 0x200;
1892 return level;
1893 }
1894
1895 static void qeth_idx_write_cb(struct qeth_channel *channel,
1896 struct qeth_cmd_buffer *iob)
1897 {
1898 struct qeth_card *card;
1899 __u16 temp;
1900
1901 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1902
1903 if (channel->state == CH_STATE_DOWN) {
1904 channel->state = CH_STATE_ACTIVATING;
1905 goto out;
1906 }
1907 card = CARD_FROM_CDEV(channel->ccwdev);
1908
1909 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1910 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
1911 dev_err(&card->write.ccwdev->dev,
1912 "The adapter is used exclusively by another "
1913 "host\n");
1914 else
1915 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1916 " negative reply\n",
1917 dev_name(&card->write.ccwdev->dev));
1918 goto out;
1919 }
1920 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1921 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1922 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1923 "function level mismatch (sent: 0x%x, received: "
1924 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1925 card->info.func_level, temp);
1926 goto out;
1927 }
1928 channel->state = CH_STATE_UP;
1929 out:
1930 qeth_release_buffer(channel, iob);
1931 }
1932
1933 static void qeth_idx_read_cb(struct qeth_channel *channel,
1934 struct qeth_cmd_buffer *iob)
1935 {
1936 struct qeth_card *card;
1937 __u16 temp;
1938
1939 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1940 if (channel->state == CH_STATE_DOWN) {
1941 channel->state = CH_STATE_ACTIVATING;
1942 goto out;
1943 }
1944
1945 card = CARD_FROM_CDEV(channel->ccwdev);
1946 if (qeth_check_idx_response(card, iob->data))
1947 goto out;
1948
1949 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1950 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1951 case QETH_IDX_ACT_ERR_EXCL:
1952 dev_err(&card->write.ccwdev->dev,
1953 "The adapter is used exclusively by another "
1954 "host\n");
1955 break;
1956 case QETH_IDX_ACT_ERR_AUTH:
1957 case QETH_IDX_ACT_ERR_AUTH_USER:
1958 dev_err(&card->read.ccwdev->dev,
1959 "Setting the device online failed because of "
1960 "insufficient authorization\n");
1961 break;
1962 default:
1963 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1964 " negative reply\n",
1965 dev_name(&card->read.ccwdev->dev));
1966 }
1967 QETH_CARD_TEXT_(card, 2, "idxread%c",
1968 QETH_IDX_ACT_CAUSE_CODE(iob->data));
1969 goto out;
1970 }
1971
1972 /**
1973 * * temporary fix for microcode bug
1974 * * to revert it,replace OR by AND
1975 * */
1976 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1977 (card->info.type == QETH_CARD_TYPE_OSD))
1978 card->info.portname_required = 1;
1979
1980 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1981 if (temp != qeth_peer_func_level(card->info.func_level)) {
1982 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1983 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1984 dev_name(&card->read.ccwdev->dev),
1985 card->info.func_level, temp);
1986 goto out;
1987 }
1988 memcpy(&card->token.issuer_rm_r,
1989 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1990 QETH_MPC_TOKEN_LENGTH);
1991 memcpy(&card->info.mcl_level[0],
1992 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1993 channel->state = CH_STATE_UP;
1994 out:
1995 qeth_release_buffer(channel, iob);
1996 }
1997
1998 void qeth_prepare_control_data(struct qeth_card *card, int len,
1999 struct qeth_cmd_buffer *iob)
2000 {
2001 qeth_setup_ccw(&card->write, iob->data, len);
2002 iob->callback = qeth_release_buffer;
2003
2004 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2005 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2006 card->seqno.trans_hdr++;
2007 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2008 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2009 card->seqno.pdu_hdr++;
2010 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2011 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
2012 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
2013 }
2014 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2015
2016 int qeth_send_control_data(struct qeth_card *card, int len,
2017 struct qeth_cmd_buffer *iob,
2018 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
2019 unsigned long),
2020 void *reply_param)
2021 {
2022 int rc;
2023 unsigned long flags;
2024 struct qeth_reply *reply = NULL;
2025 unsigned long timeout, event_timeout;
2026 struct qeth_ipa_cmd *cmd;
2027
2028 QETH_CARD_TEXT(card, 2, "sendctl");
2029
2030 if (card->read_or_write_problem) {
2031 qeth_release_buffer(iob->channel, iob);
2032 return -EIO;
2033 }
2034 reply = qeth_alloc_reply(card);
2035 if (!reply) {
2036 return -ENOMEM;
2037 }
2038 reply->callback = reply_cb;
2039 reply->param = reply_param;
2040 if (card->state == CARD_STATE_DOWN)
2041 reply->seqno = QETH_IDX_COMMAND_SEQNO;
2042 else
2043 reply->seqno = card->seqno.ipa++;
2044 init_waitqueue_head(&reply->wait_q);
2045 spin_lock_irqsave(&card->lock, flags);
2046 list_add_tail(&reply->list, &card->cmd_waiter_list);
2047 spin_unlock_irqrestore(&card->lock, flags);
2048 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
2049
2050 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
2051 qeth_prepare_control_data(card, len, iob);
2052
2053 if (IS_IPA(iob->data))
2054 event_timeout = QETH_IPA_TIMEOUT;
2055 else
2056 event_timeout = QETH_TIMEOUT;
2057 timeout = jiffies + event_timeout;
2058
2059 QETH_CARD_TEXT(card, 6, "noirqpnd");
2060 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2061 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2062 (addr_t) iob, 0, 0);
2063 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2064 if (rc) {
2065 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2066 "ccw_device_start rc = %i\n",
2067 dev_name(&card->write.ccwdev->dev), rc);
2068 QETH_CARD_TEXT_(card, 2, " err%d", rc);
2069 spin_lock_irqsave(&card->lock, flags);
2070 list_del_init(&reply->list);
2071 qeth_put_reply(reply);
2072 spin_unlock_irqrestore(&card->lock, flags);
2073 qeth_release_buffer(iob->channel, iob);
2074 atomic_set(&card->write.irq_pending, 0);
2075 wake_up(&card->wait_q);
2076 return rc;
2077 }
2078
2079 /* we have only one long running ipassist, since we can ensure
2080 process context of this command we can sleep */
2081 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2082 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2083 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2084 if (!wait_event_timeout(reply->wait_q,
2085 atomic_read(&reply->received), event_timeout))
2086 goto time_err;
2087 } else {
2088 while (!atomic_read(&reply->received)) {
2089 if (time_after(jiffies, timeout))
2090 goto time_err;
2091 cpu_relax();
2092 }
2093 }
2094
2095 if (reply->rc == -EIO)
2096 goto error;
2097 rc = reply->rc;
2098 qeth_put_reply(reply);
2099 return rc;
2100
2101 time_err:
2102 reply->rc = -ETIME;
2103 spin_lock_irqsave(&reply->card->lock, flags);
2104 list_del_init(&reply->list);
2105 spin_unlock_irqrestore(&reply->card->lock, flags);
2106 atomic_inc(&reply->received);
2107 error:
2108 atomic_set(&card->write.irq_pending, 0);
2109 qeth_release_buffer(iob->channel, iob);
2110 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
2111 rc = reply->rc;
2112 qeth_put_reply(reply);
2113 return rc;
2114 }
2115 EXPORT_SYMBOL_GPL(qeth_send_control_data);
2116
2117 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2118 unsigned long data)
2119 {
2120 struct qeth_cmd_buffer *iob;
2121
2122 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
2123
2124 iob = (struct qeth_cmd_buffer *) data;
2125 memcpy(&card->token.cm_filter_r,
2126 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2127 QETH_MPC_TOKEN_LENGTH);
2128 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2129 return 0;
2130 }
2131
2132 static int qeth_cm_enable(struct qeth_card *card)
2133 {
2134 int rc;
2135 struct qeth_cmd_buffer *iob;
2136
2137 QETH_DBF_TEXT(SETUP, 2, "cmenable");
2138
2139 iob = qeth_wait_for_buffer(&card->write);
2140 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2141 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2142 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2143 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2144 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2145
2146 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2147 qeth_cm_enable_cb, NULL);
2148 return rc;
2149 }
2150
2151 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2152 unsigned long data)
2153 {
2154
2155 struct qeth_cmd_buffer *iob;
2156
2157 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
2158
2159 iob = (struct qeth_cmd_buffer *) data;
2160 memcpy(&card->token.cm_connection_r,
2161 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2162 QETH_MPC_TOKEN_LENGTH);
2163 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2164 return 0;
2165 }
2166
2167 static int qeth_cm_setup(struct qeth_card *card)
2168 {
2169 int rc;
2170 struct qeth_cmd_buffer *iob;
2171
2172 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
2173
2174 iob = qeth_wait_for_buffer(&card->write);
2175 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2176 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2177 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2178 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2179 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2180 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2181 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2182 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2183 qeth_cm_setup_cb, NULL);
2184 return rc;
2185
2186 }
2187
2188 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2189 {
2190 switch (card->info.type) {
2191 case QETH_CARD_TYPE_UNKNOWN:
2192 return 1500;
2193 case QETH_CARD_TYPE_IQD:
2194 return card->info.max_mtu;
2195 case QETH_CARD_TYPE_OSD:
2196 switch (card->info.link_type) {
2197 case QETH_LINK_TYPE_HSTR:
2198 case QETH_LINK_TYPE_LANE_TR:
2199 return 2000;
2200 default:
2201 return card->options.layer2 ? 1500 : 1492;
2202 }
2203 case QETH_CARD_TYPE_OSM:
2204 case QETH_CARD_TYPE_OSX:
2205 return card->options.layer2 ? 1500 : 1492;
2206 default:
2207 return 1500;
2208 }
2209 }
2210
2211 static inline int qeth_get_mtu_outof_framesize(int framesize)
2212 {
2213 switch (framesize) {
2214 case 0x4000:
2215 return 8192;
2216 case 0x6000:
2217 return 16384;
2218 case 0xa000:
2219 return 32768;
2220 case 0xffff:
2221 return 57344;
2222 default:
2223 return 0;
2224 }
2225 }
2226
2227 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2228 {
2229 switch (card->info.type) {
2230 case QETH_CARD_TYPE_OSD:
2231 case QETH_CARD_TYPE_OSM:
2232 case QETH_CARD_TYPE_OSX:
2233 case QETH_CARD_TYPE_IQD:
2234 return ((mtu >= 576) &&
2235 (mtu <= card->info.max_mtu));
2236 case QETH_CARD_TYPE_OSN:
2237 case QETH_CARD_TYPE_UNKNOWN:
2238 default:
2239 return 1;
2240 }
2241 }
2242
2243 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2244 unsigned long data)
2245 {
2246
2247 __u16 mtu, framesize;
2248 __u16 len;
2249 __u8 link_type;
2250 struct qeth_cmd_buffer *iob;
2251
2252 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
2253
2254 iob = (struct qeth_cmd_buffer *) data;
2255 memcpy(&card->token.ulp_filter_r,
2256 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2257 QETH_MPC_TOKEN_LENGTH);
2258 if (card->info.type == QETH_CARD_TYPE_IQD) {
2259 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2260 mtu = qeth_get_mtu_outof_framesize(framesize);
2261 if (!mtu) {
2262 iob->rc = -EINVAL;
2263 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2264 return 0;
2265 }
2266 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2267 /* frame size has changed */
2268 if (card->dev &&
2269 ((card->dev->mtu == card->info.initial_mtu) ||
2270 (card->dev->mtu > mtu)))
2271 card->dev->mtu = mtu;
2272 qeth_free_qdio_buffers(card);
2273 }
2274 card->info.initial_mtu = mtu;
2275 card->info.max_mtu = mtu;
2276 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2277 } else {
2278 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2279 iob->data);
2280 card->info.initial_mtu = min(card->info.max_mtu,
2281 qeth_get_initial_mtu_for_card(card));
2282 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2283 }
2284
2285 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2286 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2287 memcpy(&link_type,
2288 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2289 card->info.link_type = link_type;
2290 } else
2291 card->info.link_type = 0;
2292 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
2293 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2294 return 0;
2295 }
2296
2297 static int qeth_ulp_enable(struct qeth_card *card)
2298 {
2299 int rc;
2300 char prot_type;
2301 struct qeth_cmd_buffer *iob;
2302
2303 /*FIXME: trace view callbacks*/
2304 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
2305
2306 iob = qeth_wait_for_buffer(&card->write);
2307 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2308
2309 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2310 (__u8) card->info.portno;
2311 if (card->options.layer2)
2312 if (card->info.type == QETH_CARD_TYPE_OSN)
2313 prot_type = QETH_PROT_OSN2;
2314 else
2315 prot_type = QETH_PROT_LAYER2;
2316 else
2317 prot_type = QETH_PROT_TCPIP;
2318
2319 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2320 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2321 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2322 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2323 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2324 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2325 card->info.portname, 9);
2326 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2327 qeth_ulp_enable_cb, NULL);
2328 return rc;
2329
2330 }
2331
2332 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2333 unsigned long data)
2334 {
2335 struct qeth_cmd_buffer *iob;
2336
2337 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
2338
2339 iob = (struct qeth_cmd_buffer *) data;
2340 memcpy(&card->token.ulp_connection_r,
2341 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2342 QETH_MPC_TOKEN_LENGTH);
2343 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2344 3)) {
2345 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2346 dev_err(&card->gdev->dev, "A connection could not be "
2347 "established because of an OLM limit\n");
2348 iob->rc = -EMLINK;
2349 }
2350 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2351 return 0;
2352 }
2353
2354 static int qeth_ulp_setup(struct qeth_card *card)
2355 {
2356 int rc;
2357 __u16 temp;
2358 struct qeth_cmd_buffer *iob;
2359 struct ccw_dev_id dev_id;
2360
2361 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2362
2363 iob = qeth_wait_for_buffer(&card->write);
2364 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2365
2366 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2367 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2368 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2369 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2370 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2371 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2372
2373 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2374 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2375 temp = (card->info.cula << 8) + card->info.unit_addr2;
2376 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2377 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2378 qeth_ulp_setup_cb, NULL);
2379 return rc;
2380 }
2381
2382 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2383 {
2384 int rc;
2385 struct qeth_qdio_out_buffer *newbuf;
2386
2387 rc = 0;
2388 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2389 if (!newbuf) {
2390 rc = -ENOMEM;
2391 goto out;
2392 }
2393 newbuf->buffer = &q->qdio_bufs[bidx];
2394 skb_queue_head_init(&newbuf->skb_list);
2395 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2396 newbuf->q = q;
2397 newbuf->aob = NULL;
2398 newbuf->next_pending = q->bufs[bidx];
2399 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2400 q->bufs[bidx] = newbuf;
2401 if (q->bufstates) {
2402 q->bufstates[bidx].user = newbuf;
2403 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2404 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2405 QETH_CARD_TEXT_(q->card, 2, "%lx",
2406 (long) newbuf->next_pending);
2407 }
2408 out:
2409 return rc;
2410 }
2411
2412
2413 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2414 {
2415 int i, j;
2416
2417 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2418
2419 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2420 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2421 return 0;
2422
2423 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
2424 GFP_KERNEL);
2425 if (!card->qdio.in_q)
2426 goto out_nomem;
2427 QETH_DBF_TEXT(SETUP, 2, "inq");
2428 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2429 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2430 /* give inbound qeth_qdio_buffers their qdio_buffers */
2431 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
2432 card->qdio.in_q->bufs[i].buffer =
2433 &card->qdio.in_q->qdio_bufs[i];
2434 card->qdio.in_q->bufs[i].rx_skb = NULL;
2435 }
2436 /* inbound buffer pool */
2437 if (qeth_alloc_buffer_pool(card))
2438 goto out_freeinq;
2439
2440 /* outbound */
2441 card->qdio.out_qs =
2442 kzalloc(card->qdio.no_out_queues *
2443 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2444 if (!card->qdio.out_qs)
2445 goto out_freepool;
2446 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2447 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
2448 GFP_KERNEL);
2449 if (!card->qdio.out_qs[i])
2450 goto out_freeoutq;
2451 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2452 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2453 card->qdio.out_qs[i]->queue_no = i;
2454 /* give outbound qeth_qdio_buffers their qdio_buffers */
2455 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2456 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2457 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2458 goto out_freeoutqbufs;
2459 }
2460 }
2461
2462 /* completion */
2463 if (qeth_alloc_cq(card))
2464 goto out_freeoutq;
2465
2466 return 0;
2467
2468 out_freeoutqbufs:
2469 while (j > 0) {
2470 --j;
2471 kmem_cache_free(qeth_qdio_outbuf_cache,
2472 card->qdio.out_qs[i]->bufs[j]);
2473 card->qdio.out_qs[i]->bufs[j] = NULL;
2474 }
2475 out_freeoutq:
2476 while (i > 0) {
2477 kfree(card->qdio.out_qs[--i]);
2478 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2479 }
2480 kfree(card->qdio.out_qs);
2481 card->qdio.out_qs = NULL;
2482 out_freepool:
2483 qeth_free_buffer_pool(card);
2484 out_freeinq:
2485 kfree(card->qdio.in_q);
2486 card->qdio.in_q = NULL;
2487 out_nomem:
2488 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2489 return -ENOMEM;
2490 }
2491
2492 static void qeth_create_qib_param_field(struct qeth_card *card,
2493 char *param_field)
2494 {
2495
2496 param_field[0] = _ascebc['P'];
2497 param_field[1] = _ascebc['C'];
2498 param_field[2] = _ascebc['I'];
2499 param_field[3] = _ascebc['T'];
2500 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2501 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2502 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2503 }
2504
2505 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2506 char *param_field)
2507 {
2508 param_field[16] = _ascebc['B'];
2509 param_field[17] = _ascebc['L'];
2510 param_field[18] = _ascebc['K'];
2511 param_field[19] = _ascebc['T'];
2512 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2513 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2514 *((unsigned int *) (&param_field[28])) =
2515 card->info.blkt.inter_packet_jumbo;
2516 }
2517
2518 static int qeth_qdio_activate(struct qeth_card *card)
2519 {
2520 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2521 return qdio_activate(CARD_DDEV(card));
2522 }
2523
2524 static int qeth_dm_act(struct qeth_card *card)
2525 {
2526 int rc;
2527 struct qeth_cmd_buffer *iob;
2528
2529 QETH_DBF_TEXT(SETUP, 2, "dmact");
2530
2531 iob = qeth_wait_for_buffer(&card->write);
2532 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2533
2534 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2535 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2536 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2537 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2538 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2539 return rc;
2540 }
2541
2542 static int qeth_mpc_initialize(struct qeth_card *card)
2543 {
2544 int rc;
2545
2546 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2547
2548 rc = qeth_issue_next_read(card);
2549 if (rc) {
2550 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2551 return rc;
2552 }
2553 rc = qeth_cm_enable(card);
2554 if (rc) {
2555 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2556 goto out_qdio;
2557 }
2558 rc = qeth_cm_setup(card);
2559 if (rc) {
2560 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2561 goto out_qdio;
2562 }
2563 rc = qeth_ulp_enable(card);
2564 if (rc) {
2565 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2566 goto out_qdio;
2567 }
2568 rc = qeth_ulp_setup(card);
2569 if (rc) {
2570 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2571 goto out_qdio;
2572 }
2573 rc = qeth_alloc_qdio_buffers(card);
2574 if (rc) {
2575 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2576 goto out_qdio;
2577 }
2578 rc = qeth_qdio_establish(card);
2579 if (rc) {
2580 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2581 qeth_free_qdio_buffers(card);
2582 goto out_qdio;
2583 }
2584 rc = qeth_qdio_activate(card);
2585 if (rc) {
2586 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2587 goto out_qdio;
2588 }
2589 rc = qeth_dm_act(card);
2590 if (rc) {
2591 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2592 goto out_qdio;
2593 }
2594
2595 return 0;
2596 out_qdio:
2597 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2598 return rc;
2599 }
2600
2601 static void qeth_print_status_with_portname(struct qeth_card *card)
2602 {
2603 char dbf_text[15];
2604 int i;
2605
2606 sprintf(dbf_text, "%s", card->info.portname + 1);
2607 for (i = 0; i < 8; i++)
2608 dbf_text[i] =
2609 (char) _ebcasc[(__u8) dbf_text[i]];
2610 dbf_text[8] = 0;
2611 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2612 "with link type %s (portname: %s)\n",
2613 qeth_get_cardname(card),
2614 (card->info.mcl_level[0]) ? " (level: " : "",
2615 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2616 (card->info.mcl_level[0]) ? ")" : "",
2617 qeth_get_cardname_short(card),
2618 dbf_text);
2619
2620 }
2621
2622 static void qeth_print_status_no_portname(struct qeth_card *card)
2623 {
2624 if (card->info.portname[0])
2625 dev_info(&card->gdev->dev, "Device is a%s "
2626 "card%s%s%s\nwith link type %s "
2627 "(no portname needed by interface).\n",
2628 qeth_get_cardname(card),
2629 (card->info.mcl_level[0]) ? " (level: " : "",
2630 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2631 (card->info.mcl_level[0]) ? ")" : "",
2632 qeth_get_cardname_short(card));
2633 else
2634 dev_info(&card->gdev->dev, "Device is a%s "
2635 "card%s%s%s\nwith link type %s.\n",
2636 qeth_get_cardname(card),
2637 (card->info.mcl_level[0]) ? " (level: " : "",
2638 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2639 (card->info.mcl_level[0]) ? ")" : "",
2640 qeth_get_cardname_short(card));
2641 }
2642
2643 void qeth_print_status_message(struct qeth_card *card)
2644 {
2645 switch (card->info.type) {
2646 case QETH_CARD_TYPE_OSD:
2647 case QETH_CARD_TYPE_OSM:
2648 case QETH_CARD_TYPE_OSX:
2649 /* VM will use a non-zero first character
2650 * to indicate a HiperSockets like reporting
2651 * of the level OSA sets the first character to zero
2652 * */
2653 if (!card->info.mcl_level[0]) {
2654 sprintf(card->info.mcl_level, "%02x%02x",
2655 card->info.mcl_level[2],
2656 card->info.mcl_level[3]);
2657
2658 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2659 break;
2660 }
2661 /* fallthrough */
2662 case QETH_CARD_TYPE_IQD:
2663 if ((card->info.guestlan) ||
2664 (card->info.mcl_level[0] & 0x80)) {
2665 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2666 card->info.mcl_level[0]];
2667 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2668 card->info.mcl_level[1]];
2669 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2670 card->info.mcl_level[2]];
2671 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2672 card->info.mcl_level[3]];
2673 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2674 }
2675 break;
2676 default:
2677 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2678 }
2679 if (card->info.portname_required)
2680 qeth_print_status_with_portname(card);
2681 else
2682 qeth_print_status_no_portname(card);
2683 }
2684 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2685
2686 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2687 {
2688 struct qeth_buffer_pool_entry *entry;
2689
2690 QETH_CARD_TEXT(card, 5, "inwrklst");
2691
2692 list_for_each_entry(entry,
2693 &card->qdio.init_pool.entry_list, init_list) {
2694 qeth_put_buffer_pool_entry(card, entry);
2695 }
2696 }
2697
2698 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2699 struct qeth_card *card)
2700 {
2701 struct list_head *plh;
2702 struct qeth_buffer_pool_entry *entry;
2703 int i, free;
2704 struct page *page;
2705
2706 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2707 return NULL;
2708
2709 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2710 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2711 free = 1;
2712 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2713 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2714 free = 0;
2715 break;
2716 }
2717 }
2718 if (free) {
2719 list_del_init(&entry->list);
2720 return entry;
2721 }
2722 }
2723
2724 /* no free buffer in pool so take first one and swap pages */
2725 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2726 struct qeth_buffer_pool_entry, list);
2727 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2728 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2729 page = alloc_page(GFP_ATOMIC);
2730 if (!page) {
2731 return NULL;
2732 } else {
2733 free_page((unsigned long)entry->elements[i]);
2734 entry->elements[i] = page_address(page);
2735 if (card->options.performance_stats)
2736 card->perf_stats.sg_alloc_page_rx++;
2737 }
2738 }
2739 }
2740 list_del_init(&entry->list);
2741 return entry;
2742 }
2743
2744 static int qeth_init_input_buffer(struct qeth_card *card,
2745 struct qeth_qdio_buffer *buf)
2746 {
2747 struct qeth_buffer_pool_entry *pool_entry;
2748 int i;
2749
2750 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2751 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2752 if (!buf->rx_skb)
2753 return 1;
2754 }
2755
2756 pool_entry = qeth_find_free_buffer_pool_entry(card);
2757 if (!pool_entry)
2758 return 1;
2759
2760 /*
2761 * since the buffer is accessed only from the input_tasklet
2762 * there shouldn't be a need to synchronize; also, since we use
2763 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2764 * buffers
2765 */
2766
2767 buf->pool_entry = pool_entry;
2768 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2769 buf->buffer->element[i].length = PAGE_SIZE;
2770 buf->buffer->element[i].addr = pool_entry->elements[i];
2771 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2772 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
2773 else
2774 buf->buffer->element[i].eflags = 0;
2775 buf->buffer->element[i].sflags = 0;
2776 }
2777 return 0;
2778 }
2779
2780 int qeth_init_qdio_queues(struct qeth_card *card)
2781 {
2782 int i, j;
2783 int rc;
2784
2785 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2786
2787 /* inbound queue */
2788 memset(card->qdio.in_q->qdio_bufs, 0,
2789 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2790 qeth_initialize_working_pool_list(card);
2791 /*give only as many buffers to hardware as we have buffer pool entries*/
2792 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2793 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2794 card->qdio.in_q->next_buf_to_init =
2795 card->qdio.in_buf_pool.buf_count - 1;
2796 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2797 card->qdio.in_buf_pool.buf_count - 1);
2798 if (rc) {
2799 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2800 return rc;
2801 }
2802
2803 /* completion */
2804 rc = qeth_cq_init(card);
2805 if (rc) {
2806 return rc;
2807 }
2808
2809 /* outbound queue */
2810 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2811 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2812 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2813 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2814 qeth_clear_output_buffer(card->qdio.out_qs[i],
2815 card->qdio.out_qs[i]->bufs[j],
2816 QETH_QDIO_BUF_EMPTY);
2817 }
2818 card->qdio.out_qs[i]->card = card;
2819 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2820 card->qdio.out_qs[i]->do_pack = 0;
2821 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2822 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2823 atomic_set(&card->qdio.out_qs[i]->state,
2824 QETH_OUT_Q_UNLOCKED);
2825 }
2826 return 0;
2827 }
2828 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2829
2830 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2831 {
2832 switch (link_type) {
2833 case QETH_LINK_TYPE_HSTR:
2834 return 2;
2835 default:
2836 return 1;
2837 }
2838 }
2839
2840 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2841 struct qeth_ipa_cmd *cmd, __u8 command,
2842 enum qeth_prot_versions prot)
2843 {
2844 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2845 cmd->hdr.command = command;
2846 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2847 cmd->hdr.seqno = card->seqno.ipa;
2848 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2849 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2850 if (card->options.layer2)
2851 cmd->hdr.prim_version_no = 2;
2852 else
2853 cmd->hdr.prim_version_no = 1;
2854 cmd->hdr.param_count = 1;
2855 cmd->hdr.prot_version = prot;
2856 cmd->hdr.ipa_supported = 0;
2857 cmd->hdr.ipa_enabled = 0;
2858 }
2859
2860 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2861 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2862 {
2863 struct qeth_cmd_buffer *iob;
2864 struct qeth_ipa_cmd *cmd;
2865
2866 iob = qeth_wait_for_buffer(&card->write);
2867 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2868 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2869
2870 return iob;
2871 }
2872 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2873
2874 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2875 char prot_type)
2876 {
2877 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2878 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2879 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2880 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2881 }
2882 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2883
2884 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2885 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2886 unsigned long),
2887 void *reply_param)
2888 {
2889 int rc;
2890 char prot_type;
2891
2892 QETH_CARD_TEXT(card, 4, "sendipa");
2893
2894 if (card->options.layer2)
2895 if (card->info.type == QETH_CARD_TYPE_OSN)
2896 prot_type = QETH_PROT_OSN2;
2897 else
2898 prot_type = QETH_PROT_LAYER2;
2899 else
2900 prot_type = QETH_PROT_TCPIP;
2901 qeth_prepare_ipa_cmd(card, iob, prot_type);
2902 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2903 iob, reply_cb, reply_param);
2904 if (rc == -ETIME) {
2905 qeth_clear_ipacmd_list(card);
2906 qeth_schedule_recovery(card);
2907 }
2908 return rc;
2909 }
2910 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2911
2912 int qeth_send_startlan(struct qeth_card *card)
2913 {
2914 int rc;
2915 struct qeth_cmd_buffer *iob;
2916
2917 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2918
2919 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2920 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2921 return rc;
2922 }
2923 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2924
2925 static int qeth_default_setadapterparms_cb(struct qeth_card *card,
2926 struct qeth_reply *reply, unsigned long data)
2927 {
2928 struct qeth_ipa_cmd *cmd;
2929
2930 QETH_CARD_TEXT(card, 4, "defadpcb");
2931
2932 cmd = (struct qeth_ipa_cmd *) data;
2933 if (cmd->hdr.return_code == 0)
2934 cmd->hdr.return_code =
2935 cmd->data.setadapterparms.hdr.return_code;
2936 return 0;
2937 }
2938
2939 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2940 struct qeth_reply *reply, unsigned long data)
2941 {
2942 struct qeth_ipa_cmd *cmd;
2943
2944 QETH_CARD_TEXT(card, 3, "quyadpcb");
2945
2946 cmd = (struct qeth_ipa_cmd *) data;
2947 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
2948 card->info.link_type =
2949 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2950 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2951 }
2952 card->options.adp.supported_funcs =
2953 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2954 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2955 }
2956
2957 static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2958 __u32 command, __u32 cmdlen)
2959 {
2960 struct qeth_cmd_buffer *iob;
2961 struct qeth_ipa_cmd *cmd;
2962
2963 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2964 QETH_PROT_IPV4);
2965 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2966 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2967 cmd->data.setadapterparms.hdr.command_code = command;
2968 cmd->data.setadapterparms.hdr.used_total = 1;
2969 cmd->data.setadapterparms.hdr.seq_no = 1;
2970
2971 return iob;
2972 }
2973
2974 int qeth_query_setadapterparms(struct qeth_card *card)
2975 {
2976 int rc;
2977 struct qeth_cmd_buffer *iob;
2978
2979 QETH_CARD_TEXT(card, 3, "queryadp");
2980 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2981 sizeof(struct qeth_ipacmd_setadpparms));
2982 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2983 return rc;
2984 }
2985 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2986
2987 static int qeth_query_ipassists_cb(struct qeth_card *card,
2988 struct qeth_reply *reply, unsigned long data)
2989 {
2990 struct qeth_ipa_cmd *cmd;
2991
2992 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2993
2994 cmd = (struct qeth_ipa_cmd *) data;
2995
2996 switch (cmd->hdr.return_code) {
2997 case IPA_RC_NOTSUPP:
2998 case IPA_RC_L2_UNSUPPORTED_CMD:
2999 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3000 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3001 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3002 return -0;
3003 default:
3004 if (cmd->hdr.return_code) {
3005 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3006 "rc=%d\n",
3007 dev_name(&card->gdev->dev),
3008 cmd->hdr.return_code);
3009 return 0;
3010 }
3011 }
3012
3013 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3014 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3015 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
3016 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
3017 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3018 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
3019 } else
3020 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3021 "\n", dev_name(&card->gdev->dev));
3022 return 0;
3023 }
3024
3025 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
3026 {
3027 int rc;
3028 struct qeth_cmd_buffer *iob;
3029
3030 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3031 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
3032 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3033 return rc;
3034 }
3035 EXPORT_SYMBOL_GPL(qeth_query_ipassists);
3036
3037 static int qeth_query_setdiagass_cb(struct qeth_card *card,
3038 struct qeth_reply *reply, unsigned long data)
3039 {
3040 struct qeth_ipa_cmd *cmd;
3041 __u16 rc;
3042
3043 cmd = (struct qeth_ipa_cmd *)data;
3044 rc = cmd->hdr.return_code;
3045 if (rc)
3046 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3047 else
3048 card->info.diagass_support = cmd->data.diagass.ext;
3049 return 0;
3050 }
3051
3052 static int qeth_query_setdiagass(struct qeth_card *card)
3053 {
3054 struct qeth_cmd_buffer *iob;
3055 struct qeth_ipa_cmd *cmd;
3056
3057 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3058 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3059 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3060 cmd->data.diagass.subcmd_len = 16;
3061 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3062 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3063 }
3064
3065 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3066 {
3067 unsigned long info = get_zeroed_page(GFP_KERNEL);
3068 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3069 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3070 struct ccw_dev_id ccwid;
3071 int level;
3072
3073 tid->chpid = card->info.chpid;
3074 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3075 tid->ssid = ccwid.ssid;
3076 tid->devno = ccwid.devno;
3077 if (!info)
3078 return;
3079 level = stsi(NULL, 0, 0, 0);
3080 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
3081 tid->lparnr = info222->lpar_number;
3082 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
3083 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3084 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3085 }
3086 free_page(info);
3087 return;
3088 }
3089
3090 static int qeth_hw_trap_cb(struct qeth_card *card,
3091 struct qeth_reply *reply, unsigned long data)
3092 {
3093 struct qeth_ipa_cmd *cmd;
3094 __u16 rc;
3095
3096 cmd = (struct qeth_ipa_cmd *)data;
3097 rc = cmd->hdr.return_code;
3098 if (rc)
3099 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3100 return 0;
3101 }
3102
3103 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3104 {
3105 struct qeth_cmd_buffer *iob;
3106 struct qeth_ipa_cmd *cmd;
3107
3108 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3109 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3110 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3111 cmd->data.diagass.subcmd_len = 80;
3112 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3113 cmd->data.diagass.type = 1;
3114 cmd->data.diagass.action = action;
3115 switch (action) {
3116 case QETH_DIAGS_TRAP_ARM:
3117 cmd->data.diagass.options = 0x0003;
3118 cmd->data.diagass.ext = 0x00010000 +
3119 sizeof(struct qeth_trap_id);
3120 qeth_get_trap_id(card,
3121 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3122 break;
3123 case QETH_DIAGS_TRAP_DISARM:
3124 cmd->data.diagass.options = 0x0001;
3125 break;
3126 case QETH_DIAGS_TRAP_CAPTURE:
3127 break;
3128 }
3129 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3130 }
3131 EXPORT_SYMBOL_GPL(qeth_hw_trap);
3132
3133 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3134 unsigned int qdio_error, const char *dbftext)
3135 {
3136 if (qdio_error) {
3137 QETH_CARD_TEXT(card, 2, dbftext);
3138 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3139 buf->element[15].sflags);
3140 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3141 buf->element[14].sflags);
3142 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3143 if ((buf->element[15].sflags) == 0x12) {
3144 card->stats.rx_dropped++;
3145 return 0;
3146 } else
3147 return 1;
3148 }
3149 return 0;
3150 }
3151 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3152
3153 void qeth_buffer_reclaim_work(struct work_struct *work)
3154 {
3155 struct qeth_card *card = container_of(work, struct qeth_card,
3156 buffer_reclaim_work.work);
3157
3158 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3159 qeth_queue_input_buffer(card, card->reclaim_index);
3160 }
3161
3162 void qeth_queue_input_buffer(struct qeth_card *card, int index)
3163 {
3164 struct qeth_qdio_q *queue = card->qdio.in_q;
3165 struct list_head *lh;
3166 int count;
3167 int i;
3168 int rc;
3169 int newcount = 0;
3170
3171 count = (index < queue->next_buf_to_init)?
3172 card->qdio.in_buf_pool.buf_count -
3173 (queue->next_buf_to_init - index) :
3174 card->qdio.in_buf_pool.buf_count -
3175 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3176 /* only requeue at a certain threshold to avoid SIGAs */
3177 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3178 for (i = queue->next_buf_to_init;
3179 i < queue->next_buf_to_init + count; ++i) {
3180 if (qeth_init_input_buffer(card,
3181 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3182 break;
3183 } else {
3184 newcount++;
3185 }
3186 }
3187
3188 if (newcount < count) {
3189 /* we are in memory shortage so we switch back to
3190 traditional skb allocation and drop packages */
3191 atomic_set(&card->force_alloc_skb, 3);
3192 count = newcount;
3193 } else {
3194 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3195 }
3196
3197 if (!count) {
3198 i = 0;
3199 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3200 i++;
3201 if (i == card->qdio.in_buf_pool.buf_count) {
3202 QETH_CARD_TEXT(card, 2, "qsarbw");
3203 card->reclaim_index = index;
3204 schedule_delayed_work(
3205 &card->buffer_reclaim_work,
3206 QETH_RECLAIM_WORK_TIME);
3207 }
3208 return;
3209 }
3210
3211 /*
3212 * according to old code it should be avoided to requeue all
3213 * 128 buffers in order to benefit from PCI avoidance.
3214 * this function keeps at least one buffer (the buffer at
3215 * 'index') un-requeued -> this buffer is the first buffer that
3216 * will be requeued the next time
3217 */
3218 if (card->options.performance_stats) {
3219 card->perf_stats.inbound_do_qdio_cnt++;
3220 card->perf_stats.inbound_do_qdio_start_time =
3221 qeth_get_micros();
3222 }
3223 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3224 queue->next_buf_to_init, count);
3225 if (card->options.performance_stats)
3226 card->perf_stats.inbound_do_qdio_time +=
3227 qeth_get_micros() -
3228 card->perf_stats.inbound_do_qdio_start_time;
3229 if (rc) {
3230 QETH_CARD_TEXT(card, 2, "qinberr");
3231 }
3232 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3233 QDIO_MAX_BUFFERS_PER_Q;
3234 }
3235 }
3236 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3237
3238 static int qeth_handle_send_error(struct qeth_card *card,
3239 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
3240 {
3241 int sbalf15 = buffer->buffer->element[15].sflags;
3242
3243 QETH_CARD_TEXT(card, 6, "hdsnderr");
3244 if (card->info.type == QETH_CARD_TYPE_IQD) {
3245 if (sbalf15 == 0) {
3246 qdio_err = 0;
3247 } else {
3248 qdio_err = 1;
3249 }
3250 }
3251 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
3252
3253 if (!qdio_err)
3254 return QETH_SEND_ERROR_NONE;
3255
3256 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3257 return QETH_SEND_ERROR_RETRY;
3258
3259 QETH_CARD_TEXT(card, 1, "lnkfail");
3260 QETH_CARD_TEXT_(card, 1, "%04x %02x",
3261 (u16)qdio_err, (u8)sbalf15);
3262 return QETH_SEND_ERROR_LINK_FAILURE;
3263 }
3264
3265 /*
3266 * Switched to packing state if the number of used buffers on a queue
3267 * reaches a certain limit.
3268 */
3269 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3270 {
3271 if (!queue->do_pack) {
3272 if (atomic_read(&queue->used_buffers)
3273 >= QETH_HIGH_WATERMARK_PACK){
3274 /* switch non-PACKING -> PACKING */
3275 QETH_CARD_TEXT(queue->card, 6, "np->pack");
3276 if (queue->card->options.performance_stats)
3277 queue->card->perf_stats.sc_dp_p++;
3278 queue->do_pack = 1;
3279 }
3280 }
3281 }
3282
3283 /*
3284 * Switches from packing to non-packing mode. If there is a packing
3285 * buffer on the queue this buffer will be prepared to be flushed.
3286 * In that case 1 is returned to inform the caller. If no buffer
3287 * has to be flushed, zero is returned.
3288 */
3289 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3290 {
3291 struct qeth_qdio_out_buffer *buffer;
3292 int flush_count = 0;
3293
3294 if (queue->do_pack) {
3295 if (atomic_read(&queue->used_buffers)
3296 <= QETH_LOW_WATERMARK_PACK) {
3297 /* switch PACKING -> non-PACKING */
3298 QETH_CARD_TEXT(queue->card, 6, "pack->np");
3299 if (queue->card->options.performance_stats)
3300 queue->card->perf_stats.sc_p_dp++;
3301 queue->do_pack = 0;
3302 /* flush packing buffers */
3303 buffer = queue->bufs[queue->next_buf_to_fill];
3304 if ((atomic_read(&buffer->state) ==
3305 QETH_QDIO_BUF_EMPTY) &&
3306 (buffer->next_element_to_fill > 0)) {
3307 atomic_set(&buffer->state,
3308 QETH_QDIO_BUF_PRIMED);
3309 flush_count++;
3310 queue->next_buf_to_fill =
3311 (queue->next_buf_to_fill + 1) %
3312 QDIO_MAX_BUFFERS_PER_Q;
3313 }
3314 }
3315 }
3316 return flush_count;
3317 }
3318
3319
3320 /*
3321 * Called to flush a packing buffer if no more pci flags are on the queue.
3322 * Checks if there is a packing buffer and prepares it to be flushed.
3323 * In that case returns 1, otherwise zero.
3324 */
3325 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3326 {
3327 struct qeth_qdio_out_buffer *buffer;
3328
3329 buffer = queue->bufs[queue->next_buf_to_fill];
3330 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3331 (buffer->next_element_to_fill > 0)) {
3332 /* it's a packing buffer */
3333 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3334 queue->next_buf_to_fill =
3335 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3336 return 1;
3337 }
3338 return 0;
3339 }
3340
3341 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3342 int count)
3343 {
3344 struct qeth_qdio_out_buffer *buf;
3345 int rc;
3346 int i;
3347 unsigned int qdio_flags;
3348
3349 for (i = index; i < index + count; ++i) {
3350 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3351 buf = queue->bufs[bidx];
3352 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3353 SBAL_EFLAGS_LAST_ENTRY;
3354
3355 if (queue->bufstates)
3356 queue->bufstates[bidx].user = buf;
3357
3358 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3359 continue;
3360
3361 if (!queue->do_pack) {
3362 if ((atomic_read(&queue->used_buffers) >=
3363 (QETH_HIGH_WATERMARK_PACK -
3364 QETH_WATERMARK_PACK_FUZZ)) &&
3365 !atomic_read(&queue->set_pci_flags_count)) {
3366 /* it's likely that we'll go to packing
3367 * mode soon */
3368 atomic_inc(&queue->set_pci_flags_count);
3369 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3370 }
3371 } else {
3372 if (!atomic_read(&queue->set_pci_flags_count)) {
3373 /*
3374 * there's no outstanding PCI any more, so we
3375 * have to request a PCI to be sure the the PCI
3376 * will wake at some time in the future then we
3377 * can flush packed buffers that might still be
3378 * hanging around, which can happen if no
3379 * further send was requested by the stack
3380 */
3381 atomic_inc(&queue->set_pci_flags_count);
3382 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3383 }
3384 }
3385 }
3386
3387 queue->card->dev->trans_start = jiffies;
3388 if (queue->card->options.performance_stats) {
3389 queue->card->perf_stats.outbound_do_qdio_cnt++;
3390 queue->card->perf_stats.outbound_do_qdio_start_time =
3391 qeth_get_micros();
3392 }
3393 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
3394 if (atomic_read(&queue->set_pci_flags_count))
3395 qdio_flags |= QDIO_FLAG_PCI_OUT;
3396 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
3397 queue->queue_no, index, count);
3398 if (queue->card->options.performance_stats)
3399 queue->card->perf_stats.outbound_do_qdio_time +=
3400 qeth_get_micros() -
3401 queue->card->perf_stats.outbound_do_qdio_start_time;
3402 atomic_add(count, &queue->used_buffers);
3403 if (rc) {
3404 queue->card->stats.tx_errors += count;
3405 /* ignore temporary SIGA errors without busy condition */
3406 if (rc == -ENOBUFS)
3407 return;
3408 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
3409 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3410 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3411 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
3412 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
3413
3414 /* this must not happen under normal circumstances. if it
3415 * happens something is really wrong -> recover */
3416 qeth_schedule_recovery(queue->card);
3417 return;
3418 }
3419 if (queue->card->options.performance_stats)
3420 queue->card->perf_stats.bufs_sent += count;
3421 }
3422
3423 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3424 {
3425 int index;
3426 int flush_cnt = 0;
3427 int q_was_packing = 0;
3428
3429 /*
3430 * check if weed have to switch to non-packing mode or if
3431 * we have to get a pci flag out on the queue
3432 */
3433 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3434 !atomic_read(&queue->set_pci_flags_count)) {
3435 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3436 QETH_OUT_Q_UNLOCKED) {
3437 /*
3438 * If we get in here, there was no action in
3439 * do_send_packet. So, we check if there is a
3440 * packing buffer to be flushed here.
3441 */
3442 netif_stop_queue(queue->card->dev);
3443 index = queue->next_buf_to_fill;
3444 q_was_packing = queue->do_pack;
3445 /* queue->do_pack may change */
3446 barrier();
3447 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3448 if (!flush_cnt &&
3449 !atomic_read(&queue->set_pci_flags_count))
3450 flush_cnt +=
3451 qeth_flush_buffers_on_no_pci(queue);
3452 if (queue->card->options.performance_stats &&
3453 q_was_packing)
3454 queue->card->perf_stats.bufs_sent_pack +=
3455 flush_cnt;
3456 if (flush_cnt)
3457 qeth_flush_buffers(queue, index, flush_cnt);
3458 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3459 }
3460 }
3461 }
3462
3463 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3464 unsigned long card_ptr)
3465 {
3466 struct qeth_card *card = (struct qeth_card *)card_ptr;
3467
3468 if (card->dev && (card->dev->flags & IFF_UP))
3469 napi_schedule(&card->napi);
3470 }
3471 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3472
3473 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3474 {
3475 int rc;
3476
3477 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3478 rc = -1;
3479 goto out;
3480 } else {
3481 if (card->options.cq == cq) {
3482 rc = 0;
3483 goto out;
3484 }
3485
3486 if (card->state != CARD_STATE_DOWN &&
3487 card->state != CARD_STATE_RECOVER) {
3488 rc = -1;
3489 goto out;
3490 }
3491
3492 qeth_free_qdio_buffers(card);
3493 card->options.cq = cq;
3494 rc = 0;
3495 }
3496 out:
3497 return rc;
3498
3499 }
3500 EXPORT_SYMBOL_GPL(qeth_configure_cq);
3501
3502
3503 static void qeth_qdio_cq_handler(struct qeth_card *card,
3504 unsigned int qdio_err,
3505 unsigned int queue, int first_element, int count) {
3506 struct qeth_qdio_q *cq = card->qdio.c_q;
3507 int i;
3508 int rc;
3509
3510 if (!qeth_is_cq(card, queue))
3511 goto out;
3512
3513 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3514 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3515 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3516
3517 if (qdio_err) {
3518 netif_stop_queue(card->dev);
3519 qeth_schedule_recovery(card);
3520 goto out;
3521 }
3522
3523 if (card->options.performance_stats) {
3524 card->perf_stats.cq_cnt++;
3525 card->perf_stats.cq_start_time = qeth_get_micros();
3526 }
3527
3528 for (i = first_element; i < first_element + count; ++i) {
3529 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3530 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3531 int e;
3532
3533 e = 0;
3534 while (buffer->element[e].addr) {
3535 unsigned long phys_aob_addr;
3536
3537 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3538 qeth_qdio_handle_aob(card, phys_aob_addr);
3539 buffer->element[e].addr = NULL;
3540 buffer->element[e].eflags = 0;
3541 buffer->element[e].sflags = 0;
3542 buffer->element[e].length = 0;
3543
3544 ++e;
3545 }
3546
3547 buffer->element[15].eflags = 0;
3548 buffer->element[15].sflags = 0;
3549 }
3550 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3551 card->qdio.c_q->next_buf_to_init,
3552 count);
3553 if (rc) {
3554 dev_warn(&card->gdev->dev,
3555 "QDIO reported an error, rc=%i\n", rc);
3556 QETH_CARD_TEXT(card, 2, "qcqherr");
3557 }
3558 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3559 + count) % QDIO_MAX_BUFFERS_PER_Q;
3560
3561 netif_wake_queue(card->dev);
3562
3563 if (card->options.performance_stats) {
3564 int delta_t = qeth_get_micros();
3565 delta_t -= card->perf_stats.cq_start_time;
3566 card->perf_stats.cq_time += delta_t;
3567 }
3568 out:
3569 return;
3570 }
3571
3572 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
3573 unsigned int queue, int first_elem, int count,
3574 unsigned long card_ptr)
3575 {
3576 struct qeth_card *card = (struct qeth_card *)card_ptr;
3577
3578 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3579 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3580
3581 if (qeth_is_cq(card, queue))
3582 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3583 else if (qdio_err)
3584 qeth_schedule_recovery(card);
3585
3586
3587 }
3588 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3589
3590 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3591 unsigned int qdio_error, int __queue, int first_element,
3592 int count, unsigned long card_ptr)
3593 {
3594 struct qeth_card *card = (struct qeth_card *) card_ptr;
3595 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3596 struct qeth_qdio_out_buffer *buffer;
3597 int i;
3598
3599 QETH_CARD_TEXT(card, 6, "qdouhdl");
3600 if (qdio_error & QDIO_ERROR_FATAL) {
3601 QETH_CARD_TEXT(card, 2, "achkcond");
3602 netif_stop_queue(card->dev);
3603 qeth_schedule_recovery(card);
3604 return;
3605 }
3606 if (card->options.performance_stats) {
3607 card->perf_stats.outbound_handler_cnt++;
3608 card->perf_stats.outbound_handler_start_time =
3609 qeth_get_micros();
3610 }
3611 for (i = first_element; i < (first_element + count); ++i) {
3612 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3613 buffer = queue->bufs[bidx];
3614 qeth_handle_send_error(card, buffer, qdio_error);
3615
3616 if (queue->bufstates &&
3617 (queue->bufstates[bidx].flags &
3618 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
3619 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
3620
3621 if (atomic_cmpxchg(&buffer->state,
3622 QETH_QDIO_BUF_PRIMED,
3623 QETH_QDIO_BUF_PENDING) ==
3624 QETH_QDIO_BUF_PRIMED) {
3625 qeth_notify_skbs(queue, buffer,
3626 TX_NOTIFY_PENDING);
3627 }
3628 buffer->aob = queue->bufstates[bidx].aob;
3629 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
3630 QETH_CARD_TEXT(queue->card, 5, "aob");
3631 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3632 virt_to_phys(buffer->aob));
3633 if (qeth_init_qdio_out_buf(queue, bidx)) {
3634 QETH_CARD_TEXT(card, 2, "outofbuf");
3635 qeth_schedule_recovery(card);
3636 }
3637 } else {
3638 if (card->options.cq == QETH_CQ_ENABLED) {
3639 enum iucv_tx_notify n;
3640
3641 n = qeth_compute_cq_notification(
3642 buffer->buffer->element[15].sflags, 0);
3643 qeth_notify_skbs(queue, buffer, n);
3644 }
3645
3646 qeth_clear_output_buffer(queue, buffer,
3647 QETH_QDIO_BUF_EMPTY);
3648 }
3649 qeth_cleanup_handled_pending(queue, bidx, 0);
3650 }
3651 atomic_sub(count, &queue->used_buffers);
3652 /* check if we need to do something on this outbound queue */
3653 if (card->info.type != QETH_CARD_TYPE_IQD)
3654 qeth_check_outbound_queue(queue);
3655
3656 netif_wake_queue(queue->card->dev);
3657 if (card->options.performance_stats)
3658 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3659 card->perf_stats.outbound_handler_start_time;
3660 }
3661 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3662
3663 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3664 int ipv, int cast_type)
3665 {
3666 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3667 card->info.type == QETH_CARD_TYPE_OSX))
3668 return card->qdio.default_out_queue;
3669 switch (card->qdio.no_out_queues) {
3670 case 4:
3671 if (cast_type && card->info.is_multicast_different)
3672 return card->info.is_multicast_different &
3673 (card->qdio.no_out_queues - 1);
3674 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3675 const u8 tos = ip_hdr(skb)->tos;
3676
3677 if (card->qdio.do_prio_queueing ==
3678 QETH_PRIO_Q_ING_TOS) {
3679 if (tos & IP_TOS_NOTIMPORTANT)
3680 return 3;
3681 if (tos & IP_TOS_HIGHRELIABILITY)
3682 return 2;
3683 if (tos & IP_TOS_HIGHTHROUGHPUT)
3684 return 1;
3685 if (tos & IP_TOS_LOWDELAY)
3686 return 0;
3687 }
3688 if (card->qdio.do_prio_queueing ==
3689 QETH_PRIO_Q_ING_PREC)
3690 return 3 - (tos >> 6);
3691 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3692 /* TODO: IPv6!!! */
3693 }
3694 return card->qdio.default_out_queue;
3695 case 1: /* fallthrough for single-out-queue 1920-device */
3696 default:
3697 return card->qdio.default_out_queue;
3698 }
3699 }
3700 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3701
3702 int qeth_get_elements_for_frags(struct sk_buff *skb)
3703 {
3704 int cnt, length, e, elements = 0;
3705 struct skb_frag_struct *frag;
3706 char *data;
3707
3708 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3709 frag = &skb_shinfo(skb)->frags[cnt];
3710 data = (char *)page_to_phys(skb_frag_page(frag)) +
3711 frag->page_offset;
3712 length = frag->size;
3713 e = PFN_UP((unsigned long)data + length - 1) -
3714 PFN_DOWN((unsigned long)data);
3715 elements += e;
3716 }
3717 return elements;
3718 }
3719 EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3720
3721 int qeth_get_elements_no(struct qeth_card *card,
3722 struct sk_buff *skb, int elems)
3723 {
3724 int dlen = skb->len - skb->data_len;
3725 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3726 PFN_DOWN((unsigned long)skb->data);
3727
3728 elements_needed += qeth_get_elements_for_frags(skb);
3729
3730 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3731 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3732 "(Number=%d / Length=%d). Discarded.\n",
3733 (elements_needed+elems), skb->len);
3734 return 0;
3735 }
3736 return elements_needed;
3737 }
3738 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3739
3740 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
3741 {
3742 int hroom, inpage, rest;
3743
3744 if (((unsigned long)skb->data & PAGE_MASK) !=
3745 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3746 hroom = skb_headroom(skb);
3747 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3748 rest = len - inpage;
3749 if (rest > hroom)
3750 return 1;
3751 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3752 skb->data -= rest;
3753 skb->tail -= rest;
3754 *hdr = (struct qeth_hdr *)skb->data;
3755 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3756 }
3757 return 0;
3758 }
3759 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3760
3761 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3762 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3763 int offset)
3764 {
3765 int length = skb->len - skb->data_len;
3766 int length_here;
3767 int element;
3768 char *data;
3769 int first_lap, cnt;
3770 struct skb_frag_struct *frag;
3771
3772 element = *next_element_to_fill;
3773 data = skb->data;
3774 first_lap = (is_tso == 0 ? 1 : 0);
3775
3776 if (offset >= 0) {
3777 data = skb->data + offset;
3778 length -= offset;
3779 first_lap = 0;
3780 }
3781
3782 while (length > 0) {
3783 /* length_here is the remaining amount of data in this page */
3784 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3785 if (length < length_here)
3786 length_here = length;
3787
3788 buffer->element[element].addr = data;
3789 buffer->element[element].length = length_here;
3790 length -= length_here;
3791 if (!length) {
3792 if (first_lap)
3793 if (skb_shinfo(skb)->nr_frags)
3794 buffer->element[element].eflags =
3795 SBAL_EFLAGS_FIRST_FRAG;
3796 else
3797 buffer->element[element].eflags = 0;
3798 else
3799 buffer->element[element].eflags =
3800 SBAL_EFLAGS_MIDDLE_FRAG;
3801 } else {
3802 if (first_lap)
3803 buffer->element[element].eflags =
3804 SBAL_EFLAGS_FIRST_FRAG;
3805 else
3806 buffer->element[element].eflags =
3807 SBAL_EFLAGS_MIDDLE_FRAG;
3808 }
3809 data += length_here;
3810 element++;
3811 first_lap = 0;
3812 }
3813
3814 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3815 frag = &skb_shinfo(skb)->frags[cnt];
3816 data = (char *)page_to_phys(skb_frag_page(frag)) +
3817 frag->page_offset;
3818 length = frag->size;
3819 while (length > 0) {
3820 length_here = PAGE_SIZE -
3821 ((unsigned long) data % PAGE_SIZE);
3822 if (length < length_here)
3823 length_here = length;
3824
3825 buffer->element[element].addr = data;
3826 buffer->element[element].length = length_here;
3827 buffer->element[element].eflags =
3828 SBAL_EFLAGS_MIDDLE_FRAG;
3829 length -= length_here;
3830 data += length_here;
3831 element++;
3832 }
3833 }
3834
3835 if (buffer->element[element - 1].eflags)
3836 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
3837 *next_element_to_fill = element;
3838 }
3839
3840 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3841 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3842 struct qeth_hdr *hdr, int offset, int hd_len)
3843 {
3844 struct qdio_buffer *buffer;
3845 int flush_cnt = 0, hdr_len, large_send = 0;
3846
3847 buffer = buf->buffer;
3848 atomic_inc(&skb->users);
3849 skb_queue_tail(&buf->skb_list, skb);
3850
3851 /*check first on TSO ....*/
3852 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3853 int element = buf->next_element_to_fill;
3854
3855 hdr_len = sizeof(struct qeth_hdr_tso) +
3856 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3857 /*fill first buffer entry only with header information */
3858 buffer->element[element].addr = skb->data;
3859 buffer->element[element].length = hdr_len;
3860 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3861 buf->next_element_to_fill++;
3862 skb->data += hdr_len;
3863 skb->len -= hdr_len;
3864 large_send = 1;
3865 }
3866
3867 if (offset >= 0) {
3868 int element = buf->next_element_to_fill;
3869 buffer->element[element].addr = hdr;
3870 buffer->element[element].length = sizeof(struct qeth_hdr) +
3871 hd_len;
3872 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3873 buf->is_header[element] = 1;
3874 buf->next_element_to_fill++;
3875 }
3876
3877 __qeth_fill_buffer(skb, buffer, large_send,
3878 (int *)&buf->next_element_to_fill, offset);
3879
3880 if (!queue->do_pack) {
3881 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
3882 /* set state to PRIMED -> will be flushed */
3883 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3884 flush_cnt = 1;
3885 } else {
3886 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
3887 if (queue->card->options.performance_stats)
3888 queue->card->perf_stats.skbs_sent_pack++;
3889 if (buf->next_element_to_fill >=
3890 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3891 /*
3892 * packed buffer if full -> set state PRIMED
3893 * -> will be flushed
3894 */
3895 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3896 flush_cnt = 1;
3897 }
3898 }
3899 return flush_cnt;
3900 }
3901
3902 int qeth_do_send_packet_fast(struct qeth_card *card,
3903 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3904 struct qeth_hdr *hdr, int elements_needed,
3905 int offset, int hd_len)
3906 {
3907 struct qeth_qdio_out_buffer *buffer;
3908 int index;
3909
3910 /* spin until we get the queue ... */
3911 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3912 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3913 /* ... now we've got the queue */
3914 index = queue->next_buf_to_fill;
3915 buffer = queue->bufs[queue->next_buf_to_fill];
3916 /*
3917 * check if buffer is empty to make sure that we do not 'overtake'
3918 * ourselves and try to fill a buffer that is already primed
3919 */
3920 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3921 goto out;
3922 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3923 QDIO_MAX_BUFFERS_PER_Q;
3924 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3925 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3926 qeth_flush_buffers(queue, index, 1);
3927 return 0;
3928 out:
3929 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3930 return -EBUSY;
3931 }
3932 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3933
3934 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3935 struct sk_buff *skb, struct qeth_hdr *hdr,
3936 int elements_needed)
3937 {
3938 struct qeth_qdio_out_buffer *buffer;
3939 int start_index;
3940 int flush_count = 0;
3941 int do_pack = 0;
3942 int tmp;
3943 int rc = 0;
3944
3945 /* spin until we get the queue ... */
3946 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3947 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3948 start_index = queue->next_buf_to_fill;
3949 buffer = queue->bufs[queue->next_buf_to_fill];
3950 /*
3951 * check if buffer is empty to make sure that we do not 'overtake'
3952 * ourselves and try to fill a buffer that is already primed
3953 */
3954 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3955 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3956 return -EBUSY;
3957 }
3958 /* check if we need to switch packing state of this queue */
3959 qeth_switch_to_packing_if_needed(queue);
3960 if (queue->do_pack) {
3961 do_pack = 1;
3962 /* does packet fit in current buffer? */
3963 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3964 buffer->next_element_to_fill) < elements_needed) {
3965 /* ... no -> set state PRIMED */
3966 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3967 flush_count++;
3968 queue->next_buf_to_fill =
3969 (queue->next_buf_to_fill + 1) %
3970 QDIO_MAX_BUFFERS_PER_Q;
3971 buffer = queue->bufs[queue->next_buf_to_fill];
3972 /* we did a step forward, so check buffer state
3973 * again */
3974 if (atomic_read(&buffer->state) !=
3975 QETH_QDIO_BUF_EMPTY) {
3976 qeth_flush_buffers(queue, start_index,
3977 flush_count);
3978 atomic_set(&queue->state,
3979 QETH_OUT_Q_UNLOCKED);
3980 return -EBUSY;
3981 }
3982 }
3983 }
3984 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3985 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3986 QDIO_MAX_BUFFERS_PER_Q;
3987 flush_count += tmp;
3988 if (flush_count)
3989 qeth_flush_buffers(queue, start_index, flush_count);
3990 else if (!atomic_read(&queue->set_pci_flags_count))
3991 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3992 /*
3993 * queue->state will go from LOCKED -> UNLOCKED or from
3994 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3995 * (switch packing state or flush buffer to get another pci flag out).
3996 * In that case we will enter this loop
3997 */
3998 while (atomic_dec_return(&queue->state)) {
3999 flush_count = 0;
4000 start_index = queue->next_buf_to_fill;
4001 /* check if we can go back to non-packing state */
4002 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
4003 /*
4004 * check if we need to flush a packing buffer to get a pci
4005 * flag out on the queue
4006 */
4007 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
4008 flush_count += qeth_flush_buffers_on_no_pci(queue);
4009 if (flush_count)
4010 qeth_flush_buffers(queue, start_index, flush_count);
4011 }
4012 /* at this point the queue is UNLOCKED again */
4013 if (queue->card->options.performance_stats && do_pack)
4014 queue->card->perf_stats.bufs_sent_pack += flush_count;
4015
4016 return rc;
4017 }
4018 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4019
4020 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4021 struct qeth_reply *reply, unsigned long data)
4022 {
4023 struct qeth_ipa_cmd *cmd;
4024 struct qeth_ipacmd_setadpparms *setparms;
4025
4026 QETH_CARD_TEXT(card, 4, "prmadpcb");
4027
4028 cmd = (struct qeth_ipa_cmd *) data;
4029 setparms = &(cmd->data.setadapterparms);
4030
4031 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
4032 if (cmd->hdr.return_code) {
4033 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
4034 setparms->data.mode = SET_PROMISC_MODE_OFF;
4035 }
4036 card->info.promisc_mode = setparms->data.mode;
4037 return 0;
4038 }
4039
4040 void qeth_setadp_promisc_mode(struct qeth_card *card)
4041 {
4042 enum qeth_ipa_promisc_modes mode;
4043 struct net_device *dev = card->dev;
4044 struct qeth_cmd_buffer *iob;
4045 struct qeth_ipa_cmd *cmd;
4046
4047 QETH_CARD_TEXT(card, 4, "setprom");
4048
4049 if (((dev->flags & IFF_PROMISC) &&
4050 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4051 (!(dev->flags & IFF_PROMISC) &&
4052 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4053 return;
4054 mode = SET_PROMISC_MODE_OFF;
4055 if (dev->flags & IFF_PROMISC)
4056 mode = SET_PROMISC_MODE_ON;
4057 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4058
4059 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
4060 sizeof(struct qeth_ipacmd_setadpparms));
4061 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
4062 cmd->data.setadapterparms.data.mode = mode;
4063 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4064 }
4065 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4066
4067 int qeth_change_mtu(struct net_device *dev, int new_mtu)
4068 {
4069 struct qeth_card *card;
4070 char dbf_text[15];
4071
4072 card = dev->ml_priv;
4073
4074 QETH_CARD_TEXT(card, 4, "chgmtu");
4075 sprintf(dbf_text, "%8x", new_mtu);
4076 QETH_CARD_TEXT(card, 4, dbf_text);
4077
4078 if (new_mtu < 64)
4079 return -EINVAL;
4080 if (new_mtu > 65535)
4081 return -EINVAL;
4082 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
4083 (!qeth_mtu_is_valid(card, new_mtu)))
4084 return -EINVAL;
4085 dev->mtu = new_mtu;
4086 return 0;
4087 }
4088 EXPORT_SYMBOL_GPL(qeth_change_mtu);
4089
4090 struct net_device_stats *qeth_get_stats(struct net_device *dev)
4091 {
4092 struct qeth_card *card;
4093
4094 card = dev->ml_priv;
4095
4096 QETH_CARD_TEXT(card, 5, "getstat");
4097
4098 return &card->stats;
4099 }
4100 EXPORT_SYMBOL_GPL(qeth_get_stats);
4101
4102 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4103 struct qeth_reply *reply, unsigned long data)
4104 {
4105 struct qeth_ipa_cmd *cmd;
4106
4107 QETH_CARD_TEXT(card, 4, "chgmaccb");
4108
4109 cmd = (struct qeth_ipa_cmd *) data;
4110 if (!card->options.layer2 ||
4111 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4112 memcpy(card->dev->dev_addr,
4113 &cmd->data.setadapterparms.data.change_addr.addr,
4114 OSA_ADDR_LEN);
4115 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4116 }
4117 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4118 return 0;
4119 }
4120
4121 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4122 {
4123 int rc;
4124 struct qeth_cmd_buffer *iob;
4125 struct qeth_ipa_cmd *cmd;
4126
4127 QETH_CARD_TEXT(card, 4, "chgmac");
4128
4129 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4130 sizeof(struct qeth_ipacmd_setadpparms));
4131 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4132 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4133 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4134 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4135 card->dev->dev_addr, OSA_ADDR_LEN);
4136 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4137 NULL);
4138 return rc;
4139 }
4140 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4141
4142 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4143 struct qeth_reply *reply, unsigned long data)
4144 {
4145 struct qeth_ipa_cmd *cmd;
4146 struct qeth_set_access_ctrl *access_ctrl_req;
4147 int fallback = *(int *)reply->param;
4148
4149 QETH_CARD_TEXT(card, 4, "setaccb");
4150
4151 cmd = (struct qeth_ipa_cmd *) data;
4152 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4153 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4154 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4155 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4156 cmd->data.setadapterparms.hdr.return_code);
4157 if (cmd->data.setadapterparms.hdr.return_code !=
4158 SET_ACCESS_CTRL_RC_SUCCESS)
4159 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4160 card->gdev->dev.kobj.name,
4161 access_ctrl_req->subcmd_code,
4162 cmd->data.setadapterparms.hdr.return_code);
4163 switch (cmd->data.setadapterparms.hdr.return_code) {
4164 case SET_ACCESS_CTRL_RC_SUCCESS:
4165 if (card->options.isolation == ISOLATION_MODE_NONE) {
4166 dev_info(&card->gdev->dev,
4167 "QDIO data connection isolation is deactivated\n");
4168 } else {
4169 dev_info(&card->gdev->dev,
4170 "QDIO data connection isolation is activated\n");
4171 }
4172 break;
4173 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4174 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4175 "deactivated\n", dev_name(&card->gdev->dev));
4176 if (fallback)
4177 card->options.isolation = card->options.prev_isolation;
4178 break;
4179 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4180 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4181 " activated\n", dev_name(&card->gdev->dev));
4182 if (fallback)
4183 card->options.isolation = card->options.prev_isolation;
4184 break;
4185 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
4186 dev_err(&card->gdev->dev, "Adapter does not "
4187 "support QDIO data connection isolation\n");
4188 break;
4189 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
4190 dev_err(&card->gdev->dev,
4191 "Adapter is dedicated. "
4192 "QDIO data connection isolation not supported\n");
4193 if (fallback)
4194 card->options.isolation = card->options.prev_isolation;
4195 break;
4196 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
4197 dev_err(&card->gdev->dev,
4198 "TSO does not permit QDIO data connection isolation\n");
4199 if (fallback)
4200 card->options.isolation = card->options.prev_isolation;
4201 break;
4202 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4203 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4204 "support reflective relay mode\n");
4205 if (fallback)
4206 card->options.isolation = card->options.prev_isolation;
4207 break;
4208 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4209 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4210 "enabled at the adjacent switch port");
4211 if (fallback)
4212 card->options.isolation = card->options.prev_isolation;
4213 break;
4214 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4215 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4216 "at the adjacent switch failed\n");
4217 break;
4218 default:
4219 /* this should never happen */
4220 if (fallback)
4221 card->options.isolation = card->options.prev_isolation;
4222 break;
4223 }
4224 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4225 return 0;
4226 }
4227
4228 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
4229 enum qeth_ipa_isolation_modes isolation, int fallback)
4230 {
4231 int rc;
4232 struct qeth_cmd_buffer *iob;
4233 struct qeth_ipa_cmd *cmd;
4234 struct qeth_set_access_ctrl *access_ctrl_req;
4235
4236 QETH_CARD_TEXT(card, 4, "setacctl");
4237
4238 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4239 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4240
4241 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4242 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4243 sizeof(struct qeth_set_access_ctrl));
4244 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4245 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4246 access_ctrl_req->subcmd_code = isolation;
4247
4248 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4249 &fallback);
4250 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4251 return rc;
4252 }
4253
4254 int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
4255 {
4256 int rc = 0;
4257
4258 QETH_CARD_TEXT(card, 4, "setactlo");
4259
4260 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4261 card->info.type == QETH_CARD_TYPE_OSX) &&
4262 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
4263 rc = qeth_setadpparms_set_access_ctrl(card,
4264 card->options.isolation, fallback);
4265 if (rc) {
4266 QETH_DBF_MESSAGE(3,
4267 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
4268 card->gdev->dev.kobj.name,
4269 rc);
4270 rc = -EOPNOTSUPP;
4271 }
4272 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4273 card->options.isolation = ISOLATION_MODE_NONE;
4274
4275 dev_err(&card->gdev->dev, "Adapter does not "
4276 "support QDIO data connection isolation\n");
4277 rc = -EOPNOTSUPP;
4278 }
4279 return rc;
4280 }
4281 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4282
4283 void qeth_tx_timeout(struct net_device *dev)
4284 {
4285 struct qeth_card *card;
4286
4287 card = dev->ml_priv;
4288 QETH_CARD_TEXT(card, 4, "txtimeo");
4289 card->stats.tx_errors++;
4290 qeth_schedule_recovery(card);
4291 }
4292 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4293
4294 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4295 {
4296 struct qeth_card *card = dev->ml_priv;
4297 int rc = 0;
4298
4299 switch (regnum) {
4300 case MII_BMCR: /* Basic mode control register */
4301 rc = BMCR_FULLDPLX;
4302 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4303 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4304 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4305 rc |= BMCR_SPEED100;
4306 break;
4307 case MII_BMSR: /* Basic mode status register */
4308 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4309 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4310 BMSR_100BASE4;
4311 break;
4312 case MII_PHYSID1: /* PHYS ID 1 */
4313 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4314 dev->dev_addr[2];
4315 rc = (rc >> 5) & 0xFFFF;
4316 break;
4317 case MII_PHYSID2: /* PHYS ID 2 */
4318 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4319 break;
4320 case MII_ADVERTISE: /* Advertisement control reg */
4321 rc = ADVERTISE_ALL;
4322 break;
4323 case MII_LPA: /* Link partner ability reg */
4324 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4325 LPA_100BASE4 | LPA_LPACK;
4326 break;
4327 case MII_EXPANSION: /* Expansion register */
4328 break;
4329 case MII_DCOUNTER: /* disconnect counter */
4330 break;
4331 case MII_FCSCOUNTER: /* false carrier counter */
4332 break;
4333 case MII_NWAYTEST: /* N-way auto-neg test register */
4334 break;
4335 case MII_RERRCOUNTER: /* rx error counter */
4336 rc = card->stats.rx_errors;
4337 break;
4338 case MII_SREVISION: /* silicon revision */
4339 break;
4340 case MII_RESV1: /* reserved 1 */
4341 break;
4342 case MII_LBRERROR: /* loopback, rx, bypass error */
4343 break;
4344 case MII_PHYADDR: /* physical address */
4345 break;
4346 case MII_RESV2: /* reserved 2 */
4347 break;
4348 case MII_TPISTATUS: /* TPI status for 10mbps */
4349 break;
4350 case MII_NCONFIG: /* network interface config */
4351 break;
4352 default:
4353 break;
4354 }
4355 return rc;
4356 }
4357 EXPORT_SYMBOL_GPL(qeth_mdio_read);
4358
4359 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4360 struct qeth_cmd_buffer *iob, int len,
4361 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4362 unsigned long),
4363 void *reply_param)
4364 {
4365 u16 s1, s2;
4366
4367 QETH_CARD_TEXT(card, 4, "sendsnmp");
4368
4369 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4370 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4371 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4372 /* adjust PDU length fields in IPA_PDU_HEADER */
4373 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4374 s2 = (u32) len;
4375 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4376 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4377 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4378 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4379 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4380 reply_cb, reply_param);
4381 }
4382
4383 static int qeth_snmp_command_cb(struct qeth_card *card,
4384 struct qeth_reply *reply, unsigned long sdata)
4385 {
4386 struct qeth_ipa_cmd *cmd;
4387 struct qeth_arp_query_info *qinfo;
4388 struct qeth_snmp_cmd *snmp;
4389 unsigned char *data;
4390 __u16 data_len;
4391
4392 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4393
4394 cmd = (struct qeth_ipa_cmd *) sdata;
4395 data = (unsigned char *)((char *)cmd - reply->offset);
4396 qinfo = (struct qeth_arp_query_info *) reply->param;
4397 snmp = &cmd->data.setadapterparms.data.snmp;
4398
4399 if (cmd->hdr.return_code) {
4400 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4401 return 0;
4402 }
4403 if (cmd->data.setadapterparms.hdr.return_code) {
4404 cmd->hdr.return_code =
4405 cmd->data.setadapterparms.hdr.return_code;
4406 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4407 return 0;
4408 }
4409 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4410 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4411 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4412 else
4413 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4414
4415 /* check if there is enough room in userspace */
4416 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
4417 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
4418 cmd->hdr.return_code = IPA_RC_ENOMEM;
4419 return 0;
4420 }
4421 QETH_CARD_TEXT_(card, 4, "snore%i",
4422 cmd->data.setadapterparms.hdr.used_total);
4423 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4424 cmd->data.setadapterparms.hdr.seq_no);
4425 /*copy entries to user buffer*/
4426 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4427 memcpy(qinfo->udata + qinfo->udata_offset,
4428 (char *)snmp,
4429 data_len + offsetof(struct qeth_snmp_cmd, data));
4430 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4431 } else {
4432 memcpy(qinfo->udata + qinfo->udata_offset,
4433 (char *)&snmp->request, data_len);
4434 }
4435 qinfo->udata_offset += data_len;
4436 /* check if all replies received ... */
4437 QETH_CARD_TEXT_(card, 4, "srtot%i",
4438 cmd->data.setadapterparms.hdr.used_total);
4439 QETH_CARD_TEXT_(card, 4, "srseq%i",
4440 cmd->data.setadapterparms.hdr.seq_no);
4441 if (cmd->data.setadapterparms.hdr.seq_no <
4442 cmd->data.setadapterparms.hdr.used_total)
4443 return 1;
4444 return 0;
4445 }
4446
4447 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4448 {
4449 struct qeth_cmd_buffer *iob;
4450 struct qeth_ipa_cmd *cmd;
4451 struct qeth_snmp_ureq *ureq;
4452 int req_len;
4453 struct qeth_arp_query_info qinfo = {0, };
4454 int rc = 0;
4455
4456 QETH_CARD_TEXT(card, 3, "snmpcmd");
4457
4458 if (card->info.guestlan)
4459 return -EOPNOTSUPP;
4460
4461 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4462 (!card->options.layer2)) {
4463 return -EOPNOTSUPP;
4464 }
4465 /* skip 4 bytes (data_len struct member) to get req_len */
4466 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4467 return -EFAULT;
4468 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4469 if (IS_ERR(ureq)) {
4470 QETH_CARD_TEXT(card, 2, "snmpnome");
4471 return PTR_ERR(ureq);
4472 }
4473 qinfo.udata_len = ureq->hdr.data_len;
4474 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4475 if (!qinfo.udata) {
4476 kfree(ureq);
4477 return -ENOMEM;
4478 }
4479 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4480
4481 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4482 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4483 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4484 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4485 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4486 qeth_snmp_command_cb, (void *)&qinfo);
4487 if (rc)
4488 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4489 QETH_CARD_IFNAME(card), rc);
4490 else {
4491 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4492 rc = -EFAULT;
4493 }
4494
4495 kfree(ureq);
4496 kfree(qinfo.udata);
4497 return rc;
4498 }
4499 EXPORT_SYMBOL_GPL(qeth_snmp_command);
4500
4501 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4502 struct qeth_reply *reply, unsigned long data)
4503 {
4504 struct qeth_ipa_cmd *cmd;
4505 struct qeth_qoat_priv *priv;
4506 char *resdata;
4507 int resdatalen;
4508
4509 QETH_CARD_TEXT(card, 3, "qoatcb");
4510
4511 cmd = (struct qeth_ipa_cmd *)data;
4512 priv = (struct qeth_qoat_priv *)reply->param;
4513 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4514 resdata = (char *)data + 28;
4515
4516 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4517 cmd->hdr.return_code = IPA_RC_FFFF;
4518 return 0;
4519 }
4520
4521 memcpy((priv->buffer + priv->response_len), resdata,
4522 resdatalen);
4523 priv->response_len += resdatalen;
4524
4525 if (cmd->data.setadapterparms.hdr.seq_no <
4526 cmd->data.setadapterparms.hdr.used_total)
4527 return 1;
4528 return 0;
4529 }
4530
4531 int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4532 {
4533 int rc = 0;
4534 struct qeth_cmd_buffer *iob;
4535 struct qeth_ipa_cmd *cmd;
4536 struct qeth_query_oat *oat_req;
4537 struct qeth_query_oat_data oat_data;
4538 struct qeth_qoat_priv priv;
4539 void __user *tmp;
4540
4541 QETH_CARD_TEXT(card, 3, "qoatcmd");
4542
4543 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4544 rc = -EOPNOTSUPP;
4545 goto out;
4546 }
4547
4548 if (copy_from_user(&oat_data, udata,
4549 sizeof(struct qeth_query_oat_data))) {
4550 rc = -EFAULT;
4551 goto out;
4552 }
4553
4554 priv.buffer_len = oat_data.buffer_len;
4555 priv.response_len = 0;
4556 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4557 if (!priv.buffer) {
4558 rc = -ENOMEM;
4559 goto out;
4560 }
4561
4562 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4563 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4564 sizeof(struct qeth_query_oat));
4565 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4566 oat_req = &cmd->data.setadapterparms.data.query_oat;
4567 oat_req->subcmd_code = oat_data.command;
4568
4569 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4570 &priv);
4571 if (!rc) {
4572 if (is_compat_task())
4573 tmp = compat_ptr(oat_data.ptr);
4574 else
4575 tmp = (void __user *)(unsigned long)oat_data.ptr;
4576
4577 if (copy_to_user(tmp, priv.buffer,
4578 priv.response_len)) {
4579 rc = -EFAULT;
4580 goto out_free;
4581 }
4582
4583 oat_data.response_len = priv.response_len;
4584
4585 if (copy_to_user(udata, &oat_data,
4586 sizeof(struct qeth_query_oat_data)))
4587 rc = -EFAULT;
4588 } else
4589 if (rc == IPA_RC_FFFF)
4590 rc = -EFAULT;
4591
4592 out_free:
4593 kfree(priv.buffer);
4594 out:
4595 return rc;
4596 }
4597 EXPORT_SYMBOL_GPL(qeth_query_oat_command);
4598
4599 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4600 {
4601 switch (card->info.type) {
4602 case QETH_CARD_TYPE_IQD:
4603 return 2;
4604 default:
4605 return 0;
4606 }
4607 }
4608
4609 static void qeth_determine_capabilities(struct qeth_card *card)
4610 {
4611 int rc;
4612 int length;
4613 char *prcd;
4614 struct ccw_device *ddev;
4615 int ddev_offline = 0;
4616
4617 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4618 ddev = CARD_DDEV(card);
4619 if (!ddev->online) {
4620 ddev_offline = 1;
4621 rc = ccw_device_set_online(ddev);
4622 if (rc) {
4623 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4624 goto out;
4625 }
4626 }
4627
4628 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4629 if (rc) {
4630 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4631 dev_name(&card->gdev->dev), rc);
4632 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4633 goto out_offline;
4634 }
4635 qeth_configure_unitaddr(card, prcd);
4636 if (ddev_offline)
4637 qeth_configure_blkt_default(card, prcd);
4638 kfree(prcd);
4639
4640 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4641 if (rc)
4642 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4643
4644 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4645 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4646 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4647 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4648 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4649 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4650 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4651 dev_info(&card->gdev->dev,
4652 "Completion Queueing supported\n");
4653 } else {
4654 card->options.cq = QETH_CQ_NOTAVAILABLE;
4655 }
4656
4657
4658 out_offline:
4659 if (ddev_offline == 1)
4660 ccw_device_set_offline(ddev);
4661 out:
4662 return;
4663 }
4664
4665 static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4666 struct qdio_buffer **in_sbal_ptrs,
4667 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4668 int i;
4669
4670 if (card->options.cq == QETH_CQ_ENABLED) {
4671 int offset = QDIO_MAX_BUFFERS_PER_Q *
4672 (card->qdio.no_in_queues - 1);
4673 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4674 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4675 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4676 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4677 }
4678
4679 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4680 }
4681 }
4682
4683 static int qeth_qdio_establish(struct qeth_card *card)
4684 {
4685 struct qdio_initialize init_data;
4686 char *qib_param_field;
4687 struct qdio_buffer **in_sbal_ptrs;
4688 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4689 struct qdio_buffer **out_sbal_ptrs;
4690 int i, j, k;
4691 int rc = 0;
4692
4693 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4694
4695 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4696 GFP_KERNEL);
4697 if (!qib_param_field) {
4698 rc = -ENOMEM;
4699 goto out_free_nothing;
4700 }
4701
4702 qeth_create_qib_param_field(card, qib_param_field);
4703 qeth_create_qib_param_field_blkt(card, qib_param_field);
4704
4705 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
4706 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4707 GFP_KERNEL);
4708 if (!in_sbal_ptrs) {
4709 rc = -ENOMEM;
4710 goto out_free_qib_param;
4711 }
4712 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4713 in_sbal_ptrs[i] = (struct qdio_buffer *)
4714 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
4715 }
4716
4717 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4718 GFP_KERNEL);
4719 if (!queue_start_poll) {
4720 rc = -ENOMEM;
4721 goto out_free_in_sbals;
4722 }
4723 for (i = 0; i < card->qdio.no_in_queues; ++i)
4724 queue_start_poll[i] = card->discipline->start_poll;
4725
4726 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
4727
4728 out_sbal_ptrs =
4729 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4730 sizeof(void *), GFP_KERNEL);
4731 if (!out_sbal_ptrs) {
4732 rc = -ENOMEM;
4733 goto out_free_queue_start_poll;
4734 }
4735 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4736 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4737 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
4738 card->qdio.out_qs[i]->bufs[j]->buffer);
4739 }
4740
4741 memset(&init_data, 0, sizeof(struct qdio_initialize));
4742 init_data.cdev = CARD_DDEV(card);
4743 init_data.q_format = qeth_get_qdio_q_format(card);
4744 init_data.qib_param_field_format = 0;
4745 init_data.qib_param_field = qib_param_field;
4746 init_data.no_input_qs = card->qdio.no_in_queues;
4747 init_data.no_output_qs = card->qdio.no_out_queues;
4748 init_data.input_handler = card->discipline->input_handler;
4749 init_data.output_handler = card->discipline->output_handler;
4750 init_data.queue_start_poll_array = queue_start_poll;
4751 init_data.int_parm = (unsigned long) card;
4752 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4753 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
4754 init_data.output_sbal_state_array = card->qdio.out_bufstates;
4755 init_data.scan_threshold =
4756 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4757
4758 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4759 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
4760 rc = qdio_allocate(&init_data);
4761 if (rc) {
4762 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4763 goto out;
4764 }
4765 rc = qdio_establish(&init_data);
4766 if (rc) {
4767 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4768 qdio_free(CARD_DDEV(card));
4769 }
4770 }
4771
4772 switch (card->options.cq) {
4773 case QETH_CQ_ENABLED:
4774 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4775 break;
4776 case QETH_CQ_DISABLED:
4777 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4778 break;
4779 default:
4780 break;
4781 }
4782 out:
4783 kfree(out_sbal_ptrs);
4784 out_free_queue_start_poll:
4785 kfree(queue_start_poll);
4786 out_free_in_sbals:
4787 kfree(in_sbal_ptrs);
4788 out_free_qib_param:
4789 kfree(qib_param_field);
4790 out_free_nothing:
4791 return rc;
4792 }
4793
4794 static void qeth_core_free_card(struct qeth_card *card)
4795 {
4796
4797 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4798 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4799 qeth_clean_channel(&card->read);
4800 qeth_clean_channel(&card->write);
4801 if (card->dev)
4802 free_netdev(card->dev);
4803 kfree(card->ip_tbd_list);
4804 qeth_free_qdio_buffers(card);
4805 unregister_service_level(&card->qeth_service_level);
4806 kfree(card);
4807 }
4808
4809 void qeth_trace_features(struct qeth_card *card)
4810 {
4811 QETH_CARD_TEXT(card, 2, "features");
4812 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs);
4813 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs);
4814 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs);
4815 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs);
4816 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs);
4817 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs);
4818 QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support);
4819 }
4820 EXPORT_SYMBOL_GPL(qeth_trace_features);
4821
4822 static struct ccw_device_id qeth_ids[] = {
4823 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4824 .driver_info = QETH_CARD_TYPE_OSD},
4825 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4826 .driver_info = QETH_CARD_TYPE_IQD},
4827 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4828 .driver_info = QETH_CARD_TYPE_OSN},
4829 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4830 .driver_info = QETH_CARD_TYPE_OSM},
4831 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4832 .driver_info = QETH_CARD_TYPE_OSX},
4833 {},
4834 };
4835 MODULE_DEVICE_TABLE(ccw, qeth_ids);
4836
4837 static struct ccw_driver qeth_ccw_driver = {
4838 .driver = {
4839 .owner = THIS_MODULE,
4840 .name = "qeth",
4841 },
4842 .ids = qeth_ids,
4843 .probe = ccwgroup_probe_ccwdev,
4844 .remove = ccwgroup_remove_ccwdev,
4845 };
4846
4847 int qeth_core_hardsetup_card(struct qeth_card *card)
4848 {
4849 int retries = 3;
4850 int rc;
4851
4852 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4853 atomic_set(&card->force_alloc_skb, 0);
4854 qeth_update_from_chp_desc(card);
4855 retry:
4856 if (retries < 3)
4857 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4858 dev_name(&card->gdev->dev));
4859 ccw_device_set_offline(CARD_DDEV(card));
4860 ccw_device_set_offline(CARD_WDEV(card));
4861 ccw_device_set_offline(CARD_RDEV(card));
4862 rc = ccw_device_set_online(CARD_RDEV(card));
4863 if (rc)
4864 goto retriable;
4865 rc = ccw_device_set_online(CARD_WDEV(card));
4866 if (rc)
4867 goto retriable;
4868 rc = ccw_device_set_online(CARD_DDEV(card));
4869 if (rc)
4870 goto retriable;
4871 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
4872 retriable:
4873 if (rc == -ERESTARTSYS) {
4874 QETH_DBF_TEXT(SETUP, 2, "break1");
4875 return rc;
4876 } else if (rc) {
4877 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4878 if (--retries < 0)
4879 goto out;
4880 else
4881 goto retry;
4882 }
4883 qeth_determine_capabilities(card);
4884 qeth_init_tokens(card);
4885 qeth_init_func_level(card);
4886 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4887 if (rc == -ERESTARTSYS) {
4888 QETH_DBF_TEXT(SETUP, 2, "break2");
4889 return rc;
4890 } else if (rc) {
4891 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4892 if (--retries < 0)
4893 goto out;
4894 else
4895 goto retry;
4896 }
4897 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4898 if (rc == -ERESTARTSYS) {
4899 QETH_DBF_TEXT(SETUP, 2, "break3");
4900 return rc;
4901 } else if (rc) {
4902 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4903 if (--retries < 0)
4904 goto out;
4905 else
4906 goto retry;
4907 }
4908 card->read_or_write_problem = 0;
4909 rc = qeth_mpc_initialize(card);
4910 if (rc) {
4911 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4912 goto out;
4913 }
4914
4915 card->options.ipa4.supported_funcs = 0;
4916 card->options.adp.supported_funcs = 0;
4917 card->info.diagass_support = 0;
4918 qeth_query_ipassists(card, QETH_PROT_IPV4);
4919 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4920 qeth_query_setadapterparms(card);
4921 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4922 qeth_query_setdiagass(card);
4923 return 0;
4924 out:
4925 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4926 "an error on the device\n");
4927 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4928 dev_name(&card->gdev->dev), rc);
4929 return rc;
4930 }
4931 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4932
4933 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
4934 struct qdio_buffer_element *element,
4935 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4936 {
4937 struct page *page = virt_to_page(element->addr);
4938 if (*pskb == NULL) {
4939 if (qethbuffer->rx_skb) {
4940 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
4941 *pskb = qethbuffer->rx_skb;
4942 qethbuffer->rx_skb = NULL;
4943 } else {
4944 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
4945 if (!(*pskb))
4946 return -ENOMEM;
4947 }
4948
4949 skb_reserve(*pskb, ETH_HLEN);
4950 if (data_len <= QETH_RX_PULL_LEN) {
4951 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4952 data_len);
4953 } else {
4954 get_page(page);
4955 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
4956 element->addr + offset, QETH_RX_PULL_LEN);
4957 skb_fill_page_desc(*pskb, *pfrag, page,
4958 offset + QETH_RX_PULL_LEN,
4959 data_len - QETH_RX_PULL_LEN);
4960 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
4961 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
4962 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4963 (*pfrag)++;
4964 }
4965 } else {
4966 get_page(page);
4967 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4968 (*pskb)->data_len += data_len;
4969 (*pskb)->len += data_len;
4970 (*pskb)->truesize += data_len;
4971 (*pfrag)++;
4972 }
4973
4974
4975 return 0;
4976 }
4977
4978 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
4979 struct qeth_qdio_buffer *qethbuffer,
4980 struct qdio_buffer_element **__element, int *__offset,
4981 struct qeth_hdr **hdr)
4982 {
4983 struct qdio_buffer_element *element = *__element;
4984 struct qdio_buffer *buffer = qethbuffer->buffer;
4985 int offset = *__offset;
4986 struct sk_buff *skb = NULL;
4987 int skb_len = 0;
4988 void *data_ptr;
4989 int data_len;
4990 int headroom = 0;
4991 int use_rx_sg = 0;
4992 int frag = 0;
4993
4994 /* qeth_hdr must not cross element boundaries */
4995 if (element->length < offset + sizeof(struct qeth_hdr)) {
4996 if (qeth_is_last_sbale(element))
4997 return NULL;
4998 element++;
4999 offset = 0;
5000 if (element->length < sizeof(struct qeth_hdr))
5001 return NULL;
5002 }
5003 *hdr = element->addr + offset;
5004
5005 offset += sizeof(struct qeth_hdr);
5006 switch ((*hdr)->hdr.l2.id) {
5007 case QETH_HEADER_TYPE_LAYER2:
5008 skb_len = (*hdr)->hdr.l2.pkt_length;
5009 break;
5010 case QETH_HEADER_TYPE_LAYER3:
5011 skb_len = (*hdr)->hdr.l3.length;
5012 headroom = ETH_HLEN;
5013 break;
5014 case QETH_HEADER_TYPE_OSN:
5015 skb_len = (*hdr)->hdr.osn.pdu_length;
5016 headroom = sizeof(struct qeth_hdr);
5017 break;
5018 default:
5019 break;
5020 }
5021
5022 if (!skb_len)
5023 return NULL;
5024
5025 if (((skb_len >= card->options.rx_sg_cb) &&
5026 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5027 (!atomic_read(&card->force_alloc_skb))) ||
5028 (card->options.cq == QETH_CQ_ENABLED)) {
5029 use_rx_sg = 1;
5030 } else {
5031 skb = dev_alloc_skb(skb_len + headroom);
5032 if (!skb)
5033 goto no_mem;
5034 if (headroom)
5035 skb_reserve(skb, headroom);
5036 }
5037
5038 data_ptr = element->addr + offset;
5039 while (skb_len) {
5040 data_len = min(skb_len, (int)(element->length - offset));
5041 if (data_len) {
5042 if (use_rx_sg) {
5043 if (qeth_create_skb_frag(qethbuffer, element,
5044 &skb, offset, &frag, data_len))
5045 goto no_mem;
5046 } else {
5047 memcpy(skb_put(skb, data_len), data_ptr,
5048 data_len);
5049 }
5050 }
5051 skb_len -= data_len;
5052 if (skb_len) {
5053 if (qeth_is_last_sbale(element)) {
5054 QETH_CARD_TEXT(card, 4, "unexeob");
5055 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
5056 dev_kfree_skb_any(skb);
5057 card->stats.rx_errors++;
5058 return NULL;
5059 }
5060 element++;
5061 offset = 0;
5062 data_ptr = element->addr;
5063 } else {
5064 offset += data_len;
5065 }
5066 }
5067 *__element = element;
5068 *__offset = offset;
5069 if (use_rx_sg && card->options.performance_stats) {
5070 card->perf_stats.sg_skbs_rx++;
5071 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5072 }
5073 return skb;
5074 no_mem:
5075 if (net_ratelimit()) {
5076 QETH_CARD_TEXT(card, 2, "noskbmem");
5077 }
5078 card->stats.rx_dropped++;
5079 return NULL;
5080 }
5081 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5082
5083 static void qeth_unregister_dbf_views(void)
5084 {
5085 int x;
5086 for (x = 0; x < QETH_DBF_INFOS; x++) {
5087 debug_unregister(qeth_dbf[x].id);
5088 qeth_dbf[x].id = NULL;
5089 }
5090 }
5091
5092 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
5093 {
5094 char dbf_txt_buf[32];
5095 va_list args;
5096
5097 if (level > id->level)
5098 return;
5099 va_start(args, fmt);
5100 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5101 va_end(args);
5102 debug_text_event(id, level, dbf_txt_buf);
5103 }
5104 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5105
5106 static int qeth_register_dbf_views(void)
5107 {
5108 int ret;
5109 int x;
5110
5111 for (x = 0; x < QETH_DBF_INFOS; x++) {
5112 /* register the areas */
5113 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5114 qeth_dbf[x].pages,
5115 qeth_dbf[x].areas,
5116 qeth_dbf[x].len);
5117 if (qeth_dbf[x].id == NULL) {
5118 qeth_unregister_dbf_views();
5119 return -ENOMEM;
5120 }
5121
5122 /* register a view */
5123 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5124 if (ret) {
5125 qeth_unregister_dbf_views();
5126 return ret;
5127 }
5128
5129 /* set a passing level */
5130 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5131 }
5132
5133 return 0;
5134 }
5135
5136 int qeth_core_load_discipline(struct qeth_card *card,
5137 enum qeth_discipline_id discipline)
5138 {
5139 int rc = 0;
5140 mutex_lock(&qeth_mod_mutex);
5141 switch (discipline) {
5142 case QETH_DISCIPLINE_LAYER3:
5143 card->discipline = try_then_request_module(
5144 symbol_get(qeth_l3_discipline), "qeth_l3");
5145 break;
5146 case QETH_DISCIPLINE_LAYER2:
5147 card->discipline = try_then_request_module(
5148 symbol_get(qeth_l2_discipline), "qeth_l2");
5149 break;
5150 }
5151 if (!card->discipline) {
5152 dev_err(&card->gdev->dev, "There is no kernel module to "
5153 "support discipline %d\n", discipline);
5154 rc = -EINVAL;
5155 }
5156 mutex_unlock(&qeth_mod_mutex);
5157 return rc;
5158 }
5159
5160 void qeth_core_free_discipline(struct qeth_card *card)
5161 {
5162 if (card->options.layer2)
5163 symbol_put(qeth_l2_discipline);
5164 else
5165 symbol_put(qeth_l3_discipline);
5166 card->discipline = NULL;
5167 }
5168
5169 static const struct device_type qeth_generic_devtype = {
5170 .name = "qeth_generic",
5171 .groups = qeth_generic_attr_groups,
5172 };
5173 static const struct device_type qeth_osn_devtype = {
5174 .name = "qeth_osn",
5175 .groups = qeth_osn_attr_groups,
5176 };
5177
5178 #define DBF_NAME_LEN 20
5179
5180 struct qeth_dbf_entry {
5181 char dbf_name[DBF_NAME_LEN];
5182 debug_info_t *dbf_info;
5183 struct list_head dbf_list;
5184 };
5185
5186 static LIST_HEAD(qeth_dbf_list);
5187 static DEFINE_MUTEX(qeth_dbf_list_mutex);
5188
5189 static debug_info_t *qeth_get_dbf_entry(char *name)
5190 {
5191 struct qeth_dbf_entry *entry;
5192 debug_info_t *rc = NULL;
5193
5194 mutex_lock(&qeth_dbf_list_mutex);
5195 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5196 if (strcmp(entry->dbf_name, name) == 0) {
5197 rc = entry->dbf_info;
5198 break;
5199 }
5200 }
5201 mutex_unlock(&qeth_dbf_list_mutex);
5202 return rc;
5203 }
5204
5205 static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5206 {
5207 struct qeth_dbf_entry *new_entry;
5208
5209 card->debug = debug_register(name, 2, 1, 8);
5210 if (!card->debug) {
5211 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5212 goto err;
5213 }
5214 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5215 goto err_dbg;
5216 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5217 if (!new_entry)
5218 goto err_dbg;
5219 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5220 new_entry->dbf_info = card->debug;
5221 mutex_lock(&qeth_dbf_list_mutex);
5222 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5223 mutex_unlock(&qeth_dbf_list_mutex);
5224
5225 return 0;
5226
5227 err_dbg:
5228 debug_unregister(card->debug);
5229 err:
5230 return -ENOMEM;
5231 }
5232
5233 static void qeth_clear_dbf_list(void)
5234 {
5235 struct qeth_dbf_entry *entry, *tmp;
5236
5237 mutex_lock(&qeth_dbf_list_mutex);
5238 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5239 list_del(&entry->dbf_list);
5240 debug_unregister(entry->dbf_info);
5241 kfree(entry);
5242 }
5243 mutex_unlock(&qeth_dbf_list_mutex);
5244 }
5245
5246 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5247 {
5248 struct qeth_card *card;
5249 struct device *dev;
5250 int rc;
5251 unsigned long flags;
5252 char dbf_name[DBF_NAME_LEN];
5253
5254 QETH_DBF_TEXT(SETUP, 2, "probedev");
5255
5256 dev = &gdev->dev;
5257 if (!get_device(dev))
5258 return -ENODEV;
5259
5260 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
5261
5262 card = qeth_alloc_card();
5263 if (!card) {
5264 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
5265 rc = -ENOMEM;
5266 goto err_dev;
5267 }
5268
5269 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5270 dev_name(&gdev->dev));
5271 card->debug = qeth_get_dbf_entry(dbf_name);
5272 if (!card->debug) {
5273 rc = qeth_add_dbf_entry(card, dbf_name);
5274 if (rc)
5275 goto err_card;
5276 }
5277
5278 card->read.ccwdev = gdev->cdev[0];
5279 card->write.ccwdev = gdev->cdev[1];
5280 card->data.ccwdev = gdev->cdev[2];
5281 dev_set_drvdata(&gdev->dev, card);
5282 card->gdev = gdev;
5283 gdev->cdev[0]->handler = qeth_irq;
5284 gdev->cdev[1]->handler = qeth_irq;
5285 gdev->cdev[2]->handler = qeth_irq;
5286
5287 rc = qeth_determine_card_type(card);
5288 if (rc) {
5289 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
5290 goto err_card;
5291 }
5292 rc = qeth_setup_card(card);
5293 if (rc) {
5294 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
5295 goto err_card;
5296 }
5297
5298 if (card->info.type == QETH_CARD_TYPE_OSN)
5299 gdev->dev.type = &qeth_osn_devtype;
5300 else
5301 gdev->dev.type = &qeth_generic_devtype;
5302
5303 switch (card->info.type) {
5304 case QETH_CARD_TYPE_OSN:
5305 case QETH_CARD_TYPE_OSM:
5306 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5307 if (rc)
5308 goto err_card;
5309 rc = card->discipline->setup(card->gdev);
5310 if (rc)
5311 goto err_disc;
5312 case QETH_CARD_TYPE_OSD:
5313 case QETH_CARD_TYPE_OSX:
5314 default:
5315 break;
5316 }
5317
5318 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5319 list_add_tail(&card->list, &qeth_core_card_list.list);
5320 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5321
5322 qeth_determine_capabilities(card);
5323 return 0;
5324
5325 err_disc:
5326 qeth_core_free_discipline(card);
5327 err_card:
5328 qeth_core_free_card(card);
5329 err_dev:
5330 put_device(dev);
5331 return rc;
5332 }
5333
5334 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5335 {
5336 unsigned long flags;
5337 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5338
5339 QETH_DBF_TEXT(SETUP, 2, "removedv");
5340
5341 if (card->discipline) {
5342 card->discipline->remove(gdev);
5343 qeth_core_free_discipline(card);
5344 }
5345
5346 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5347 list_del(&card->list);
5348 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5349 qeth_core_free_card(card);
5350 dev_set_drvdata(&gdev->dev, NULL);
5351 put_device(&gdev->dev);
5352 return;
5353 }
5354
5355 static int qeth_core_set_online(struct ccwgroup_device *gdev)
5356 {
5357 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5358 int rc = 0;
5359 int def_discipline;
5360
5361 if (!card->discipline) {
5362 if (card->info.type == QETH_CARD_TYPE_IQD)
5363 def_discipline = QETH_DISCIPLINE_LAYER3;
5364 else
5365 def_discipline = QETH_DISCIPLINE_LAYER2;
5366 rc = qeth_core_load_discipline(card, def_discipline);
5367 if (rc)
5368 goto err;
5369 rc = card->discipline->setup(card->gdev);
5370 if (rc)
5371 goto err;
5372 }
5373 rc = card->discipline->set_online(gdev);
5374 err:
5375 return rc;
5376 }
5377
5378 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5379 {
5380 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5381 return card->discipline->set_offline(gdev);
5382 }
5383
5384 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5385 {
5386 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5387 if (card->discipline && card->discipline->shutdown)
5388 card->discipline->shutdown(gdev);
5389 }
5390
5391 static int qeth_core_prepare(struct ccwgroup_device *gdev)
5392 {
5393 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5394 if (card->discipline && card->discipline->prepare)
5395 return card->discipline->prepare(gdev);
5396 return 0;
5397 }
5398
5399 static void qeth_core_complete(struct ccwgroup_device *gdev)
5400 {
5401 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5402 if (card->discipline && card->discipline->complete)
5403 card->discipline->complete(gdev);
5404 }
5405
5406 static int qeth_core_freeze(struct ccwgroup_device *gdev)
5407 {
5408 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5409 if (card->discipline && card->discipline->freeze)
5410 return card->discipline->freeze(gdev);
5411 return 0;
5412 }
5413
5414 static int qeth_core_thaw(struct ccwgroup_device *gdev)
5415 {
5416 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5417 if (card->discipline && card->discipline->thaw)
5418 return card->discipline->thaw(gdev);
5419 return 0;
5420 }
5421
5422 static int qeth_core_restore(struct ccwgroup_device *gdev)
5423 {
5424 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5425 if (card->discipline && card->discipline->restore)
5426 return card->discipline->restore(gdev);
5427 return 0;
5428 }
5429
5430 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
5431 .driver = {
5432 .owner = THIS_MODULE,
5433 .name = "qeth",
5434 },
5435 .setup = qeth_core_probe_device,
5436 .remove = qeth_core_remove_device,
5437 .set_online = qeth_core_set_online,
5438 .set_offline = qeth_core_set_offline,
5439 .shutdown = qeth_core_shutdown,
5440 .prepare = qeth_core_prepare,
5441 .complete = qeth_core_complete,
5442 .freeze = qeth_core_freeze,
5443 .thaw = qeth_core_thaw,
5444 .restore = qeth_core_restore,
5445 };
5446
5447 static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5448 const char *buf, size_t count)
5449 {
5450 int err;
5451
5452 err = ccwgroup_create_dev(qeth_core_root_dev,
5453 &qeth_core_ccwgroup_driver, 3, buf);
5454
5455 return err ? err : count;
5456 }
5457 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5458
5459 static struct attribute *qeth_drv_attrs[] = {
5460 &driver_attr_group.attr,
5461 NULL,
5462 };
5463 static struct attribute_group qeth_drv_attr_group = {
5464 .attrs = qeth_drv_attrs,
5465 };
5466 static const struct attribute_group *qeth_drv_attr_groups[] = {
5467 &qeth_drv_attr_group,
5468 NULL,
5469 };
5470
5471 static struct {
5472 const char str[ETH_GSTRING_LEN];
5473 } qeth_ethtool_stats_keys[] = {
5474 /* 0 */{"rx skbs"},
5475 {"rx buffers"},
5476 {"tx skbs"},
5477 {"tx buffers"},
5478 {"tx skbs no packing"},
5479 {"tx buffers no packing"},
5480 {"tx skbs packing"},
5481 {"tx buffers packing"},
5482 {"tx sg skbs"},
5483 {"tx sg frags"},
5484 /* 10 */{"rx sg skbs"},
5485 {"rx sg frags"},
5486 {"rx sg page allocs"},
5487 {"tx large kbytes"},
5488 {"tx large count"},
5489 {"tx pk state ch n->p"},
5490 {"tx pk state ch p->n"},
5491 {"tx pk watermark low"},
5492 {"tx pk watermark high"},
5493 {"queue 0 buffer usage"},
5494 /* 20 */{"queue 1 buffer usage"},
5495 {"queue 2 buffer usage"},
5496 {"queue 3 buffer usage"},
5497 {"rx poll time"},
5498 {"rx poll count"},
5499 {"rx do_QDIO time"},
5500 {"rx do_QDIO count"},
5501 {"tx handler time"},
5502 {"tx handler count"},
5503 {"tx time"},
5504 /* 30 */{"tx count"},
5505 {"tx do_QDIO time"},
5506 {"tx do_QDIO count"},
5507 {"tx csum"},
5508 {"tx lin"},
5509 {"cq handler count"},
5510 {"cq handler time"}
5511 };
5512
5513 int qeth_core_get_sset_count(struct net_device *dev, int stringset)
5514 {
5515 switch (stringset) {
5516 case ETH_SS_STATS:
5517 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5518 default:
5519 return -EINVAL;
5520 }
5521 }
5522 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
5523
5524 void qeth_core_get_ethtool_stats(struct net_device *dev,
5525 struct ethtool_stats *stats, u64 *data)
5526 {
5527 struct qeth_card *card = dev->ml_priv;
5528 data[0] = card->stats.rx_packets -
5529 card->perf_stats.initial_rx_packets;
5530 data[1] = card->perf_stats.bufs_rec;
5531 data[2] = card->stats.tx_packets -
5532 card->perf_stats.initial_tx_packets;
5533 data[3] = card->perf_stats.bufs_sent;
5534 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5535 - card->perf_stats.skbs_sent_pack;
5536 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5537 data[6] = card->perf_stats.skbs_sent_pack;
5538 data[7] = card->perf_stats.bufs_sent_pack;
5539 data[8] = card->perf_stats.sg_skbs_sent;
5540 data[9] = card->perf_stats.sg_frags_sent;
5541 data[10] = card->perf_stats.sg_skbs_rx;
5542 data[11] = card->perf_stats.sg_frags_rx;
5543 data[12] = card->perf_stats.sg_alloc_page_rx;
5544 data[13] = (card->perf_stats.large_send_bytes >> 10);
5545 data[14] = card->perf_stats.large_send_cnt;
5546 data[15] = card->perf_stats.sc_dp_p;
5547 data[16] = card->perf_stats.sc_p_dp;
5548 data[17] = QETH_LOW_WATERMARK_PACK;
5549 data[18] = QETH_HIGH_WATERMARK_PACK;
5550 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5551 data[20] = (card->qdio.no_out_queues > 1) ?
5552 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5553 data[21] = (card->qdio.no_out_queues > 2) ?
5554 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5555 data[22] = (card->qdio.no_out_queues > 3) ?
5556 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5557 data[23] = card->perf_stats.inbound_time;
5558 data[24] = card->perf_stats.inbound_cnt;
5559 data[25] = card->perf_stats.inbound_do_qdio_time;
5560 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5561 data[27] = card->perf_stats.outbound_handler_time;
5562 data[28] = card->perf_stats.outbound_handler_cnt;
5563 data[29] = card->perf_stats.outbound_time;
5564 data[30] = card->perf_stats.outbound_cnt;
5565 data[31] = card->perf_stats.outbound_do_qdio_time;
5566 data[32] = card->perf_stats.outbound_do_qdio_cnt;
5567 data[33] = card->perf_stats.tx_csum;
5568 data[34] = card->perf_stats.tx_lin;
5569 data[35] = card->perf_stats.cq_cnt;
5570 data[36] = card->perf_stats.cq_time;
5571 }
5572 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5573
5574 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5575 {
5576 switch (stringset) {
5577 case ETH_SS_STATS:
5578 memcpy(data, &qeth_ethtool_stats_keys,
5579 sizeof(qeth_ethtool_stats_keys));
5580 break;
5581 default:
5582 WARN_ON(1);
5583 break;
5584 }
5585 }
5586 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5587
5588 void qeth_core_get_drvinfo(struct net_device *dev,
5589 struct ethtool_drvinfo *info)
5590 {
5591 struct qeth_card *card = dev->ml_priv;
5592
5593 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
5594 sizeof(info->driver));
5595 strlcpy(info->version, "1.0", sizeof(info->version));
5596 strlcpy(info->fw_version, card->info.mcl_level,
5597 sizeof(info->fw_version));
5598 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
5599 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
5600 }
5601 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5602
5603 int qeth_core_ethtool_get_settings(struct net_device *netdev,
5604 struct ethtool_cmd *ecmd)
5605 {
5606 struct qeth_card *card = netdev->ml_priv;
5607 enum qeth_link_types link_type;
5608
5609 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5610 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5611 else
5612 link_type = card->info.link_type;
5613
5614 ecmd->transceiver = XCVR_INTERNAL;
5615 ecmd->supported = SUPPORTED_Autoneg;
5616 ecmd->advertising = ADVERTISED_Autoneg;
5617 ecmd->duplex = DUPLEX_FULL;
5618 ecmd->autoneg = AUTONEG_ENABLE;
5619
5620 switch (link_type) {
5621 case QETH_LINK_TYPE_FAST_ETH:
5622 case QETH_LINK_TYPE_LANE_ETH100:
5623 ecmd->supported |= SUPPORTED_10baseT_Half |
5624 SUPPORTED_10baseT_Full |
5625 SUPPORTED_100baseT_Half |
5626 SUPPORTED_100baseT_Full |
5627 SUPPORTED_TP;
5628 ecmd->advertising |= ADVERTISED_10baseT_Half |
5629 ADVERTISED_10baseT_Full |
5630 ADVERTISED_100baseT_Half |
5631 ADVERTISED_100baseT_Full |
5632 ADVERTISED_TP;
5633 ecmd->speed = SPEED_100;
5634 ecmd->port = PORT_TP;
5635 break;
5636
5637 case QETH_LINK_TYPE_GBIT_ETH:
5638 case QETH_LINK_TYPE_LANE_ETH1000:
5639 ecmd->supported |= SUPPORTED_10baseT_Half |
5640 SUPPORTED_10baseT_Full |
5641 SUPPORTED_100baseT_Half |
5642 SUPPORTED_100baseT_Full |
5643 SUPPORTED_1000baseT_Half |
5644 SUPPORTED_1000baseT_Full |
5645 SUPPORTED_FIBRE;
5646 ecmd->advertising |= ADVERTISED_10baseT_Half |
5647 ADVERTISED_10baseT_Full |
5648 ADVERTISED_100baseT_Half |
5649 ADVERTISED_100baseT_Full |
5650 ADVERTISED_1000baseT_Half |
5651 ADVERTISED_1000baseT_Full |
5652 ADVERTISED_FIBRE;
5653 ecmd->speed = SPEED_1000;
5654 ecmd->port = PORT_FIBRE;
5655 break;
5656
5657 case QETH_LINK_TYPE_10GBIT_ETH:
5658 ecmd->supported |= SUPPORTED_10baseT_Half |
5659 SUPPORTED_10baseT_Full |
5660 SUPPORTED_100baseT_Half |
5661 SUPPORTED_100baseT_Full |
5662 SUPPORTED_1000baseT_Half |
5663 SUPPORTED_1000baseT_Full |
5664 SUPPORTED_10000baseT_Full |
5665 SUPPORTED_FIBRE;
5666 ecmd->advertising |= ADVERTISED_10baseT_Half |
5667 ADVERTISED_10baseT_Full |
5668 ADVERTISED_100baseT_Half |
5669 ADVERTISED_100baseT_Full |
5670 ADVERTISED_1000baseT_Half |
5671 ADVERTISED_1000baseT_Full |
5672 ADVERTISED_10000baseT_Full |
5673 ADVERTISED_FIBRE;
5674 ecmd->speed = SPEED_10000;
5675 ecmd->port = PORT_FIBRE;
5676 break;
5677
5678 default:
5679 ecmd->supported |= SUPPORTED_10baseT_Half |
5680 SUPPORTED_10baseT_Full |
5681 SUPPORTED_TP;
5682 ecmd->advertising |= ADVERTISED_10baseT_Half |
5683 ADVERTISED_10baseT_Full |
5684 ADVERTISED_TP;
5685 ecmd->speed = SPEED_10;
5686 ecmd->port = PORT_TP;
5687 }
5688
5689 return 0;
5690 }
5691 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5692
5693 static int __init qeth_core_init(void)
5694 {
5695 int rc;
5696
5697 pr_info("loading core functions\n");
5698 INIT_LIST_HEAD(&qeth_core_card_list.list);
5699 INIT_LIST_HEAD(&qeth_dbf_list);
5700 rwlock_init(&qeth_core_card_list.rwlock);
5701 mutex_init(&qeth_mod_mutex);
5702
5703 qeth_wq = create_singlethread_workqueue("qeth_wq");
5704
5705 rc = qeth_register_dbf_views();
5706 if (rc)
5707 goto out_err;
5708 qeth_core_root_dev = root_device_register("qeth");
5709 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
5710 if (rc)
5711 goto register_err;
5712 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5713 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5714 if (!qeth_core_header_cache) {
5715 rc = -ENOMEM;
5716 goto slab_err;
5717 }
5718 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5719 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5720 if (!qeth_qdio_outbuf_cache) {
5721 rc = -ENOMEM;
5722 goto cqslab_err;
5723 }
5724 rc = ccw_driver_register(&qeth_ccw_driver);
5725 if (rc)
5726 goto ccw_err;
5727 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
5728 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5729 if (rc)
5730 goto ccwgroup_err;
5731
5732 return 0;
5733
5734 ccwgroup_err:
5735 ccw_driver_unregister(&qeth_ccw_driver);
5736 ccw_err:
5737 kmem_cache_destroy(qeth_qdio_outbuf_cache);
5738 cqslab_err:
5739 kmem_cache_destroy(qeth_core_header_cache);
5740 slab_err:
5741 root_device_unregister(qeth_core_root_dev);
5742 register_err:
5743 qeth_unregister_dbf_views();
5744 out_err:
5745 pr_err("Initializing the qeth device driver failed\n");
5746 return rc;
5747 }
5748
5749 static void __exit qeth_core_exit(void)
5750 {
5751 qeth_clear_dbf_list();
5752 destroy_workqueue(qeth_wq);
5753 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5754 ccw_driver_unregister(&qeth_ccw_driver);
5755 kmem_cache_destroy(qeth_qdio_outbuf_cache);
5756 kmem_cache_destroy(qeth_core_header_cache);
5757 root_device_unregister(qeth_core_root_dev);
5758 qeth_unregister_dbf_views();
5759 pr_info("core functions removed\n");
5760 }
5761
5762 module_init(qeth_core_init);
5763 module_exit(qeth_core_exit);
5764 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5765 MODULE_DESCRIPTION("qeth core functions");
5766 MODULE_LICENSE("GPL");
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