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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * NCR 5380 generic driver routines. These should make it *trivial*
4 * to implement 5380 SCSI drivers under Linux with a non-trantor
5 * architecture.
6 *
7 * Note that these routines also work with NR53c400 family chips.
8 *
9 * Copyright 1993, Drew Eckhardt
10 * Visionary Computing
11 * (Unix and Linux consulting and custom programming)
12 * drew@colorado.edu
13 * +1 (303) 666-5836
14 *
15 * For more information, please consult
16 *
17 * NCR 5380 Family
18 * SCSI Protocol Controller
19 * Databook
20 *
21 * NCR Microelectronics
22 * 1635 Aeroplaza Drive
23 * Colorado Springs, CO 80916
24 * 1+ (719) 578-3400
25 * 1+ (800) 334-5454
26 */
27
28 /*
29 * With contributions from Ray Van Tassle, Ingmar Baumgart,
30 * Ronald van Cuijlenborg, Alan Cox and others.
31 */
32
33 /* Ported to Atari by Roman Hodek and others. */
34
35 /* Adapted for the Sun 3 by Sam Creasey. */
36
37 /*
38 * Design
39 *
40 * This is a generic 5380 driver. To use it on a different platform,
41 * one simply writes appropriate system specific macros (ie, data
42 * transfer - some PC's will use the I/O bus, 68K's must use
43 * memory mapped) and drops this file in their 'C' wrapper.
44 *
45 * As far as command queueing, two queues are maintained for
46 * each 5380 in the system - commands that haven't been issued yet,
47 * and commands that are currently executing. This means that an
48 * unlimited number of commands may be queued, letting
49 * more commands propagate from the higher driver levels giving higher
50 * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported,
51 * allowing multiple commands to propagate all the way to a SCSI-II device
52 * while a command is already executing.
53 *
54 *
55 * Issues specific to the NCR5380 :
56 *
57 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
58 * piece of hardware that requires you to sit in a loop polling for
59 * the REQ signal as long as you are connected. Some devices are
60 * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
61 * while doing long seek operations. [...] These
62 * broken devices are the exception rather than the rule and I'd rather
63 * spend my time optimizing for the normal case.
64 *
65 * Architecture :
66 *
67 * At the heart of the design is a coroutine, NCR5380_main,
68 * which is started from a workqueue for each NCR5380 host in the
69 * system. It attempts to establish I_T_L or I_T_L_Q nexuses by
70 * removing the commands from the issue queue and calling
71 * NCR5380_select() if a nexus is not established.
72 *
73 * Once a nexus is established, the NCR5380_information_transfer()
74 * phase goes through the various phases as instructed by the target.
75 * if the target goes into MSG IN and sends a DISCONNECT message,
76 * the command structure is placed into the per instance disconnected
77 * queue, and NCR5380_main tries to find more work. If the target is
78 * idle for too long, the system will try to sleep.
79 *
80 * If a command has disconnected, eventually an interrupt will trigger,
81 * calling NCR5380_intr() which will in turn call NCR5380_reselect
82 * to reestablish a nexus. This will run main if necessary.
83 *
84 * On command termination, the done function will be called as
85 * appropriate.
86 *
87 * SCSI pointers are maintained in the SCp field of SCSI command
88 * structures, being initialized after the command is connected
89 * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
90 * Note that in violation of the standard, an implicit SAVE POINTERS operation
91 * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
92 */
93
94 /*
95 * Using this file :
96 * This file a skeleton Linux SCSI driver for the NCR 5380 series
97 * of chips. To use it, you write an architecture specific functions
98 * and macros and include this file in your driver.
99 *
100 * These macros MUST be defined :
101 *
102 * NCR5380_read(register) - read from the specified register
103 *
104 * NCR5380_write(register, value) - write to the specific register
105 *
106 * NCR5380_implementation_fields - additional fields needed for this
107 * specific implementation of the NCR5380
108 *
109 * Either real DMA *or* pseudo DMA may be implemented
110 *
111 * NCR5380_dma_xfer_len - determine size of DMA/PDMA transfer
112 * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380
113 * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory
114 * NCR5380_dma_residual - residual byte count
115 *
116 * The generic driver is initialized by calling NCR5380_init(instance),
117 * after setting the appropriate host specific fields and ID.
118 */
119
120 #ifndef NCR5380_io_delay
121 #define NCR5380_io_delay(x)
122 #endif
123
124 #ifndef NCR5380_acquire_dma_irq
125 #define NCR5380_acquire_dma_irq(x) (1)
126 #endif
127
128 #ifndef NCR5380_release_dma_irq
129 #define NCR5380_release_dma_irq(x)
130 #endif
131
132 static unsigned int disconnect_mask = ~0;
133 module_param(disconnect_mask, int, 0444);
134
135 static int do_abort(struct Scsi_Host *);
136 static void do_reset(struct Scsi_Host *);
137 static void bus_reset_cleanup(struct Scsi_Host *);
138
139 /**
140 * initialize_SCp - init the scsi pointer field
141 * @cmd: command block to set up
142 *
143 * Set up the internal fields in the SCSI command.
144 */
145
146 static inline void initialize_SCp(struct scsi_cmnd *cmd)
147 {
148 /*
149 * Initialize the Scsi Pointer field so that all of the commands in the
150 * various queues are valid.
151 */
152
153 if (scsi_bufflen(cmd)) {
154 cmd->SCp.buffer = scsi_sglist(cmd);
155 cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1;
156 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
157 cmd->SCp.this_residual = cmd->SCp.buffer->length;
158 } else {
159 cmd->SCp.buffer = NULL;
160 cmd->SCp.buffers_residual = 0;
161 cmd->SCp.ptr = NULL;
162 cmd->SCp.this_residual = 0;
163 }
164
165 cmd->SCp.Status = 0;
166 cmd->SCp.Message = 0;
167 }
168
169 /**
170 * NCR5380_poll_politely2 - wait for two chip register values
171 * @hostdata: host private data
172 * @reg1: 5380 register to poll
173 * @bit1: Bitmask to check
174 * @val1: Expected value
175 * @reg2: Second 5380 register to poll
176 * @bit2: Second bitmask to check
177 * @val2: Second expected value
178 * @wait: Time-out in jiffies
179 *
180 * Polls the chip in a reasonably efficient manner waiting for an
181 * event to occur. After a short quick poll we begin to yield the CPU
182 * (if possible). In irq contexts the time-out is arbitrarily limited.
183 * Callers may hold locks as long as they are held in irq mode.
184 *
185 * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
186 */
187
188 static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata,
189 unsigned int reg1, u8 bit1, u8 val1,
190 unsigned int reg2, u8 bit2, u8 val2,
191 unsigned long wait)
192 {
193 unsigned long n = hostdata->poll_loops;
194 unsigned long deadline = jiffies + wait;
195
196 do {
197 if ((NCR5380_read(reg1) & bit1) == val1)
198 return 0;
199 if ((NCR5380_read(reg2) & bit2) == val2)
200 return 0;
201 cpu_relax();
202 } while (n--);
203
204 if (irqs_disabled() || in_interrupt())
205 return -ETIMEDOUT;
206
207 /* Repeatedly sleep for 1 ms until deadline */
208 while (time_is_after_jiffies(deadline)) {
209 schedule_timeout_uninterruptible(1);
210 if ((NCR5380_read(reg1) & bit1) == val1)
211 return 0;
212 if ((NCR5380_read(reg2) & bit2) == val2)
213 return 0;
214 }
215
216 return -ETIMEDOUT;
217 }
218
219 #if NDEBUG
220 static struct {
221 unsigned char mask;
222 const char *name;
223 } signals[] = {
224 {SR_DBP, "PARITY"},
225 {SR_RST, "RST"},
226 {SR_BSY, "BSY"},
227 {SR_REQ, "REQ"},
228 {SR_MSG, "MSG"},
229 {SR_CD, "CD"},
230 {SR_IO, "IO"},
231 {SR_SEL, "SEL"},
232 {0, NULL}
233 },
234 basrs[] = {
235 {BASR_END_DMA_TRANSFER, "END OF DMA"},
236 {BASR_DRQ, "DRQ"},
237 {BASR_PARITY_ERROR, "PARITY ERROR"},
238 {BASR_IRQ, "IRQ"},
239 {BASR_PHASE_MATCH, "PHASE MATCH"},
240 {BASR_BUSY_ERROR, "BUSY ERROR"},
241 {BASR_ATN, "ATN"},
242 {BASR_ACK, "ACK"},
243 {0, NULL}
244 },
245 icrs[] = {
246 {ICR_ASSERT_RST, "ASSERT RST"},
247 {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"},
248 {ICR_ARBITRATION_LOST, "LOST ARB."},
249 {ICR_ASSERT_ACK, "ASSERT ACK"},
250 {ICR_ASSERT_BSY, "ASSERT BSY"},
251 {ICR_ASSERT_SEL, "ASSERT SEL"},
252 {ICR_ASSERT_ATN, "ASSERT ATN"},
253 {ICR_ASSERT_DATA, "ASSERT DATA"},
254 {0, NULL}
255 },
256 mrs[] = {
257 {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"},
258 {MR_TARGET, "TARGET"},
259 {MR_ENABLE_PAR_CHECK, "PARITY CHECK"},
260 {MR_ENABLE_PAR_INTR, "PARITY INTR"},
261 {MR_ENABLE_EOP_INTR, "EOP INTR"},
262 {MR_MONITOR_BSY, "MONITOR BSY"},
263 {MR_DMA_MODE, "DMA MODE"},
264 {MR_ARBITRATE, "ARBITRATE"},
265 {0, NULL}
266 };
267
268 /**
269 * NCR5380_print - print scsi bus signals
270 * @instance: adapter state to dump
271 *
272 * Print the SCSI bus signals for debugging purposes
273 */
274
275 static void NCR5380_print(struct Scsi_Host *instance)
276 {
277 struct NCR5380_hostdata *hostdata = shost_priv(instance);
278 unsigned char status, data, basr, mr, icr, i;
279
280 data = NCR5380_read(CURRENT_SCSI_DATA_REG);
281 status = NCR5380_read(STATUS_REG);
282 mr = NCR5380_read(MODE_REG);
283 icr = NCR5380_read(INITIATOR_COMMAND_REG);
284 basr = NCR5380_read(BUS_AND_STATUS_REG);
285
286 printk(KERN_DEBUG "SR = 0x%02x : ", status);
287 for (i = 0; signals[i].mask; ++i)
288 if (status & signals[i].mask)
289 printk(KERN_CONT "%s, ", signals[i].name);
290 printk(KERN_CONT "\nBASR = 0x%02x : ", basr);
291 for (i = 0; basrs[i].mask; ++i)
292 if (basr & basrs[i].mask)
293 printk(KERN_CONT "%s, ", basrs[i].name);
294 printk(KERN_CONT "\nICR = 0x%02x : ", icr);
295 for (i = 0; icrs[i].mask; ++i)
296 if (icr & icrs[i].mask)
297 printk(KERN_CONT "%s, ", icrs[i].name);
298 printk(KERN_CONT "\nMR = 0x%02x : ", mr);
299 for (i = 0; mrs[i].mask; ++i)
300 if (mr & mrs[i].mask)
301 printk(KERN_CONT "%s, ", mrs[i].name);
302 printk(KERN_CONT "\n");
303 }
304
305 static struct {
306 unsigned char value;
307 const char *name;
308 } phases[] = {
309 {PHASE_DATAOUT, "DATAOUT"},
310 {PHASE_DATAIN, "DATAIN"},
311 {PHASE_CMDOUT, "CMDOUT"},
312 {PHASE_STATIN, "STATIN"},
313 {PHASE_MSGOUT, "MSGOUT"},
314 {PHASE_MSGIN, "MSGIN"},
315 {PHASE_UNKNOWN, "UNKNOWN"}
316 };
317
318 /**
319 * NCR5380_print_phase - show SCSI phase
320 * @instance: adapter to dump
321 *
322 * Print the current SCSI phase for debugging purposes
323 */
324
325 static void NCR5380_print_phase(struct Scsi_Host *instance)
326 {
327 struct NCR5380_hostdata *hostdata = shost_priv(instance);
328 unsigned char status;
329 int i;
330
331 status = NCR5380_read(STATUS_REG);
332 if (!(status & SR_REQ))
333 shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
334 else {
335 for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
336 (phases[i].value != (status & PHASE_MASK)); ++i)
337 ;
338 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
339 }
340 }
341 #endif
342
343 /**
344 * NCR5380_info - report driver and host information
345 * @instance: relevant scsi host instance
346 *
347 * For use as the host template info() handler.
348 */
349
350 static const char *NCR5380_info(struct Scsi_Host *instance)
351 {
352 struct NCR5380_hostdata *hostdata = shost_priv(instance);
353
354 return hostdata->info;
355 }
356
357 /**
358 * NCR5380_init - initialise an NCR5380
359 * @instance: adapter to configure
360 * @flags: control flags
361 *
362 * Initializes *instance and corresponding 5380 chip,
363 * with flags OR'd into the initial flags value.
364 *
365 * Notes : I assume that the host, hostno, and id bits have been
366 * set correctly. I don't care about the irq and other fields.
367 *
368 * Returns 0 for success
369 */
370
371 static int NCR5380_init(struct Scsi_Host *instance, int flags)
372 {
373 struct NCR5380_hostdata *hostdata = shost_priv(instance);
374 int i;
375 unsigned long deadline;
376 unsigned long accesses_per_ms;
377
378 instance->max_lun = 7;
379
380 hostdata->host = instance;
381 hostdata->id_mask = 1 << instance->this_id;
382 hostdata->id_higher_mask = 0;
383 for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
384 if (i > hostdata->id_mask)
385 hostdata->id_higher_mask |= i;
386 for (i = 0; i < 8; ++i)
387 hostdata->busy[i] = 0;
388 hostdata->dma_len = 0;
389
390 spin_lock_init(&hostdata->lock);
391 hostdata->connected = NULL;
392 hostdata->sensing = NULL;
393 INIT_LIST_HEAD(&hostdata->autosense);
394 INIT_LIST_HEAD(&hostdata->unissued);
395 INIT_LIST_HEAD(&hostdata->disconnected);
396
397 hostdata->flags = flags;
398
399 INIT_WORK(&hostdata->main_task, NCR5380_main);
400 hostdata->work_q = alloc_workqueue("ncr5380_%d",
401 WQ_UNBOUND | WQ_MEM_RECLAIM,
402 1, instance->host_no);
403 if (!hostdata->work_q)
404 return -ENOMEM;
405
406 snprintf(hostdata->info, sizeof(hostdata->info),
407 "%s, irq %d, io_port 0x%lx, base 0x%lx, can_queue %d, cmd_per_lun %d, sg_tablesize %d, this_id %d, flags { %s%s%s}",
408 instance->hostt->name, instance->irq, hostdata->io_port,
409 hostdata->base, instance->can_queue, instance->cmd_per_lun,
410 instance->sg_tablesize, instance->this_id,
411 hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "",
412 hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
413 hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "");
414
415 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
416 NCR5380_write(MODE_REG, MR_BASE);
417 NCR5380_write(TARGET_COMMAND_REG, 0);
418 NCR5380_write(SELECT_ENABLE_REG, 0);
419
420 /* Calibrate register polling loop */
421 i = 0;
422 deadline = jiffies + 1;
423 do {
424 cpu_relax();
425 } while (time_is_after_jiffies(deadline));
426 deadline += msecs_to_jiffies(256);
427 do {
428 NCR5380_read(STATUS_REG);
429 ++i;
430 cpu_relax();
431 } while (time_is_after_jiffies(deadline));
432 accesses_per_ms = i / 256;
433 hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2;
434
435 return 0;
436 }
437
438 /**
439 * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems.
440 * @instance: adapter to check
441 *
442 * If the system crashed, it may have crashed with a connected target and
443 * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the
444 * currently established nexus, which we know nothing about. Failing that
445 * do a bus reset.
446 *
447 * Note that a bus reset will cause the chip to assert IRQ.
448 *
449 * Returns 0 if successful, otherwise -ENXIO.
450 */
451
452 static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
453 {
454 struct NCR5380_hostdata *hostdata = shost_priv(instance);
455 int pass;
456
457 for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
458 switch (pass) {
459 case 1:
460 case 3:
461 case 5:
462 shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
463 NCR5380_poll_politely(hostdata,
464 STATUS_REG, SR_BSY, 0, 5 * HZ);
465 break;
466 case 2:
467 shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
468 do_abort(instance);
469 break;
470 case 4:
471 shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
472 do_reset(instance);
473 /* Wait after a reset; the SCSI standard calls for
474 * 250ms, we wait 500ms to be on the safe side.
475 * But some Toshiba CD-ROMs need ten times that.
476 */
477 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
478 msleep(2500);
479 else
480 msleep(500);
481 break;
482 case 6:
483 shost_printk(KERN_ERR, instance, "bus locked solid\n");
484 return -ENXIO;
485 }
486 }
487 return 0;
488 }
489
490 /**
491 * NCR5380_exit - remove an NCR5380
492 * @instance: adapter to remove
493 *
494 * Assumes that no more work can be queued (e.g. by NCR5380_intr).
495 */
496
497 static void NCR5380_exit(struct Scsi_Host *instance)
498 {
499 struct NCR5380_hostdata *hostdata = shost_priv(instance);
500
501 cancel_work_sync(&hostdata->main_task);
502 destroy_workqueue(hostdata->work_q);
503 }
504
505 /**
506 * complete_cmd - finish processing a command and return it to the SCSI ML
507 * @instance: the host instance
508 * @cmd: command to complete
509 */
510
511 static void complete_cmd(struct Scsi_Host *instance,
512 struct scsi_cmnd *cmd)
513 {
514 struct NCR5380_hostdata *hostdata = shost_priv(instance);
515
516 dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
517
518 if (hostdata->sensing == cmd) {
519 /* Autosense processing ends here */
520 if (status_byte(cmd->result) != GOOD) {
521 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
522 } else {
523 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
524 set_driver_byte(cmd, DRIVER_SENSE);
525 }
526 hostdata->sensing = NULL;
527 }
528
529 cmd->scsi_done(cmd);
530 }
531
532 /**
533 * NCR5380_queue_command - queue a command
534 * @instance: the relevant SCSI adapter
535 * @cmd: SCSI command
536 *
537 * cmd is added to the per-instance issue queue, with minor
538 * twiddling done to the host specific fields of cmd. If the
539 * main coroutine is not running, it is restarted.
540 */
541
542 static int NCR5380_queue_command(struct Scsi_Host *instance,
543 struct scsi_cmnd *cmd)
544 {
545 struct NCR5380_hostdata *hostdata = shost_priv(instance);
546 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
547 unsigned long flags;
548
549 #if (NDEBUG & NDEBUG_NO_WRITE)
550 switch (cmd->cmnd[0]) {
551 case WRITE_6:
552 case WRITE_10:
553 shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
554 cmd->result = (DID_ERROR << 16);
555 cmd->scsi_done(cmd);
556 return 0;
557 }
558 #endif /* (NDEBUG & NDEBUG_NO_WRITE) */
559
560 cmd->result = 0;
561
562 if (!NCR5380_acquire_dma_irq(instance))
563 return SCSI_MLQUEUE_HOST_BUSY;
564
565 spin_lock_irqsave(&hostdata->lock, flags);
566
567 /*
568 * Insert the cmd into the issue queue. Note that REQUEST SENSE
569 * commands are added to the head of the queue since any command will
570 * clear the contingent allegiance condition that exists and the
571 * sense data is only guaranteed to be valid while the condition exists.
572 */
573
574 if (cmd->cmnd[0] == REQUEST_SENSE)
575 list_add(&ncmd->list, &hostdata->unissued);
576 else
577 list_add_tail(&ncmd->list, &hostdata->unissued);
578
579 spin_unlock_irqrestore(&hostdata->lock, flags);
580
581 dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
582 cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
583
584 /* Kick off command processing */
585 queue_work(hostdata->work_q, &hostdata->main_task);
586 return 0;
587 }
588
589 static inline void maybe_release_dma_irq(struct Scsi_Host *instance)
590 {
591 struct NCR5380_hostdata *hostdata = shost_priv(instance);
592
593 /* Caller does the locking needed to set & test these data atomically */
594 if (list_empty(&hostdata->disconnected) &&
595 list_empty(&hostdata->unissued) &&
596 list_empty(&hostdata->autosense) &&
597 !hostdata->connected &&
598 !hostdata->selecting) {
599 NCR5380_release_dma_irq(instance);
600 }
601 }
602
603 /**
604 * dequeue_next_cmd - dequeue a command for processing
605 * @instance: the scsi host instance
606 *
607 * Priority is given to commands on the autosense queue. These commands
608 * need autosense because of a CHECK CONDITION result.
609 *
610 * Returns a command pointer if a command is found for a target that is
611 * not already busy. Otherwise returns NULL.
612 */
613
614 static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
615 {
616 struct NCR5380_hostdata *hostdata = shost_priv(instance);
617 struct NCR5380_cmd *ncmd;
618 struct scsi_cmnd *cmd;
619
620 if (hostdata->sensing || list_empty(&hostdata->autosense)) {
621 list_for_each_entry(ncmd, &hostdata->unissued, list) {
622 cmd = NCR5380_to_scmd(ncmd);
623 dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
624 cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
625
626 if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
627 list_del(&ncmd->list);
628 dsprintk(NDEBUG_QUEUES, instance,
629 "dequeue: removed %p from issue queue\n", cmd);
630 return cmd;
631 }
632 }
633 } else {
634 /* Autosense processing begins here */
635 ncmd = list_first_entry(&hostdata->autosense,
636 struct NCR5380_cmd, list);
637 list_del(&ncmd->list);
638 cmd = NCR5380_to_scmd(ncmd);
639 dsprintk(NDEBUG_QUEUES, instance,
640 "dequeue: removed %p from autosense queue\n", cmd);
641 scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
642 hostdata->sensing = cmd;
643 return cmd;
644 }
645 return NULL;
646 }
647
648 static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
649 {
650 struct NCR5380_hostdata *hostdata = shost_priv(instance);
651 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
652
653 if (hostdata->sensing == cmd) {
654 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
655 list_add(&ncmd->list, &hostdata->autosense);
656 hostdata->sensing = NULL;
657 } else
658 list_add(&ncmd->list, &hostdata->unissued);
659 }
660
661 /**
662 * NCR5380_main - NCR state machines
663 *
664 * NCR5380_main is a coroutine that runs as long as more work can
665 * be done on the NCR5380 host adapters in a system. Both
666 * NCR5380_queue_command() and NCR5380_intr() will try to start it
667 * in case it is not running.
668 */
669
670 static void NCR5380_main(struct work_struct *work)
671 {
672 struct NCR5380_hostdata *hostdata =
673 container_of(work, struct NCR5380_hostdata, main_task);
674 struct Scsi_Host *instance = hostdata->host;
675 int done;
676
677 do {
678 done = 1;
679
680 spin_lock_irq(&hostdata->lock);
681 while (!hostdata->connected && !hostdata->selecting) {
682 struct scsi_cmnd *cmd = dequeue_next_cmd(instance);
683
684 if (!cmd)
685 break;
686
687 dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
688
689 /*
690 * Attempt to establish an I_T_L nexus here.
691 * On success, instance->hostdata->connected is set.
692 * On failure, we must add the command back to the
693 * issue queue so we can keep trying.
694 */
695 /*
696 * REQUEST SENSE commands are issued without tagged
697 * queueing, even on SCSI-II devices because the
698 * contingent allegiance condition exists for the
699 * entire unit.
700 */
701
702 if (!NCR5380_select(instance, cmd)) {
703 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
704 maybe_release_dma_irq(instance);
705 } else {
706 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
707 "main: select failed, returning %p to queue\n", cmd);
708 requeue_cmd(instance, cmd);
709 }
710 }
711 if (hostdata->connected && !hostdata->dma_len) {
712 dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
713 NCR5380_information_transfer(instance);
714 done = 0;
715 }
716 if (!hostdata->connected)
717 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
718 spin_unlock_irq(&hostdata->lock);
719 if (!done)
720 cond_resched();
721 } while (!done);
722 }
723
724 /*
725 * NCR5380_dma_complete - finish DMA transfer
726 * @instance: the scsi host instance
727 *
728 * Called by the interrupt handler when DMA finishes or a phase
729 * mismatch occurs (which would end the DMA transfer).
730 */
731
732 static void NCR5380_dma_complete(struct Scsi_Host *instance)
733 {
734 struct NCR5380_hostdata *hostdata = shost_priv(instance);
735 int transferred;
736 unsigned char **data;
737 int *count;
738 int saved_data = 0, overrun = 0;
739 unsigned char p;
740
741 if (hostdata->read_overruns) {
742 p = hostdata->connected->SCp.phase;
743 if (p & SR_IO) {
744 udelay(10);
745 if ((NCR5380_read(BUS_AND_STATUS_REG) &
746 (BASR_PHASE_MATCH | BASR_ACK)) ==
747 (BASR_PHASE_MATCH | BASR_ACK)) {
748 saved_data = NCR5380_read(INPUT_DATA_REG);
749 overrun = 1;
750 dsprintk(NDEBUG_DMA, instance, "read overrun handled\n");
751 }
752 }
753 }
754
755 #ifdef CONFIG_SUN3
756 if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) {
757 pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n",
758 instance->host_no);
759 BUG();
760 }
761
762 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
763 (BASR_PHASE_MATCH | BASR_ACK)) {
764 pr_err("scsi%d: BASR %02x\n", instance->host_no,
765 NCR5380_read(BUS_AND_STATUS_REG));
766 pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n",
767 instance->host_no);
768 BUG();
769 }
770 #endif
771
772 NCR5380_write(MODE_REG, MR_BASE);
773 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
774 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
775
776 transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata);
777 hostdata->dma_len = 0;
778
779 data = (unsigned char **)&hostdata->connected->SCp.ptr;
780 count = &hostdata->connected->SCp.this_residual;
781 *data += transferred;
782 *count -= transferred;
783
784 if (hostdata->read_overruns) {
785 int cnt, toPIO;
786
787 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
788 cnt = toPIO = hostdata->read_overruns;
789 if (overrun) {
790 dsprintk(NDEBUG_DMA, instance,
791 "Got an input overrun, using saved byte\n");
792 *(*data)++ = saved_data;
793 (*count)--;
794 cnt--;
795 toPIO--;
796 }
797 if (toPIO > 0) {
798 dsprintk(NDEBUG_DMA, instance,
799 "Doing %d byte PIO to 0x%p\n", cnt, *data);
800 NCR5380_transfer_pio(instance, &p, &cnt, data);
801 *count -= toPIO - cnt;
802 }
803 }
804 }
805 }
806
807 /**
808 * NCR5380_intr - generic NCR5380 irq handler
809 * @irq: interrupt number
810 * @dev_id: device info
811 *
812 * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
813 * from the disconnected queue, and restarting NCR5380_main()
814 * as required.
815 *
816 * The chip can assert IRQ in any of six different conditions. The IRQ flag
817 * is then cleared by reading the Reset Parity/Interrupt Register (RPIR).
818 * Three of these six conditions are latched in the Bus and Status Register:
819 * - End of DMA (cleared by ending DMA Mode)
820 * - Parity error (cleared by reading RPIR)
821 * - Loss of BSY (cleared by reading RPIR)
822 * Two conditions have flag bits that are not latched:
823 * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode)
824 * - Bus reset (non-maskable)
825 * The remaining condition has no flag bit at all:
826 * - Selection/reselection
827 *
828 * Hence, establishing the cause(s) of any interrupt is partly guesswork.
829 * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor
830 * claimed that "the design of the [DP8490] interrupt logic ensures
831 * interrupts will not be lost (they can be on the DP5380)."
832 * The L5380/53C80 datasheet from LOGIC Devices has more details.
833 *
834 * Checking for bus reset by reading RST is futile because of interrupt
835 * latency, but a bus reset will reset chip logic. Checking for parity error
836 * is unnecessary because that interrupt is never enabled. A Loss of BSY
837 * condition will clear DMA Mode. We can tell when this occurs because the
838 * the Busy Monitor interrupt is enabled together with DMA Mode.
839 */
840
841 static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id)
842 {
843 struct Scsi_Host *instance = dev_id;
844 struct NCR5380_hostdata *hostdata = shost_priv(instance);
845 int handled = 0;
846 unsigned char basr;
847 unsigned long flags;
848
849 spin_lock_irqsave(&hostdata->lock, flags);
850
851 basr = NCR5380_read(BUS_AND_STATUS_REG);
852 if (basr & BASR_IRQ) {
853 unsigned char mr = NCR5380_read(MODE_REG);
854 unsigned char sr = NCR5380_read(STATUS_REG);
855
856 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
857 irq, basr, sr, mr);
858
859 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
860 /* Probably End of DMA, Phase Mismatch or Loss of BSY.
861 * We ack IRQ after clearing Mode Register. Workarounds
862 * for End of DMA errata need to happen in DMA Mode.
863 */
864
865 dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
866
867 if (hostdata->connected) {
868 NCR5380_dma_complete(instance);
869 queue_work(hostdata->work_q, &hostdata->main_task);
870 } else {
871 NCR5380_write(MODE_REG, MR_BASE);
872 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
873 }
874 } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
875 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
876 /* Probably reselected */
877 NCR5380_write(SELECT_ENABLE_REG, 0);
878 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
879
880 dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
881
882 if (!hostdata->connected) {
883 NCR5380_reselect(instance);
884 queue_work(hostdata->work_q, &hostdata->main_task);
885 }
886 if (!hostdata->connected)
887 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
888 } else {
889 /* Probably Bus Reset */
890 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
891
892 if (sr & SR_RST) {
893 /* Certainly Bus Reset */
894 shost_printk(KERN_WARNING, instance,
895 "bus reset interrupt\n");
896 bus_reset_cleanup(instance);
897 } else {
898 dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
899 }
900 #ifdef SUN3_SCSI_VME
901 dregs->csr |= CSR_DMA_ENABLE;
902 #endif
903 }
904 handled = 1;
905 } else {
906 dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n");
907 #ifdef SUN3_SCSI_VME
908 dregs->csr |= CSR_DMA_ENABLE;
909 #endif
910 }
911
912 spin_unlock_irqrestore(&hostdata->lock, flags);
913
914 return IRQ_RETVAL(handled);
915 }
916
917 /**
918 * NCR5380_select - attempt arbitration and selection for a given command
919 * @instance: the Scsi_Host instance
920 * @cmd: the scsi_cmnd to execute
921 *
922 * This routine establishes an I_T_L nexus for a SCSI command. This involves
923 * ARBITRATION, SELECTION and MESSAGE OUT phases and an IDENTIFY message.
924 *
925 * Returns true if the operation should be retried.
926 * Returns false if it should not be retried.
927 *
928 * Side effects :
929 * If bus busy, arbitration failed, etc, NCR5380_select() will exit
930 * with registers as they should have been on entry - ie
931 * SELECT_ENABLE will be set appropriately, the NCR5380
932 * will cease to drive any SCSI bus signals.
933 *
934 * If successful : the I_T_L nexus will be established, and
935 * hostdata->connected will be set to cmd.
936 * SELECT interrupt will be disabled.
937 *
938 * If failed (no target) : cmd->scsi_done() will be called, and the
939 * cmd->result host byte set to DID_BAD_TARGET.
940 */
941
942 static bool NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
943 __releases(&hostdata->lock) __acquires(&hostdata->lock)
944 {
945 struct NCR5380_hostdata *hostdata = shost_priv(instance);
946 unsigned char tmp[3], phase;
947 unsigned char *data;
948 int len;
949 int err;
950 bool ret = true;
951 bool can_disconnect = instance->irq != NO_IRQ &&
952 cmd->cmnd[0] != REQUEST_SENSE &&
953 (disconnect_mask & BIT(scmd_id(cmd)));
954
955 NCR5380_dprint(NDEBUG_ARBITRATION, instance);
956 dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
957 instance->this_id);
958
959 /*
960 * Arbitration and selection phases are slow and involve dropping the
961 * lock, so we have to watch out for EH. An exception handler may
962 * change 'selecting' to NULL. This function will then return false
963 * so that the caller will forget about 'cmd'. (During information
964 * transfer phases, EH may change 'connected' to NULL.)
965 */
966 hostdata->selecting = cmd;
967
968 /*
969 * Set the phase bits to 0, otherwise the NCR5380 won't drive the
970 * data bus during SELECTION.
971 */
972
973 NCR5380_write(TARGET_COMMAND_REG, 0);
974
975 /*
976 * Start arbitration.
977 */
978
979 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
980 NCR5380_write(MODE_REG, MR_ARBITRATE);
981
982 /* The chip now waits for BUS FREE phase. Then after the 800 ns
983 * Bus Free Delay, arbitration will begin.
984 */
985
986 spin_unlock_irq(&hostdata->lock);
987 err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0,
988 INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
989 ICR_ARBITRATION_PROGRESS, HZ);
990 spin_lock_irq(&hostdata->lock);
991 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
992 /* Reselection interrupt */
993 goto out;
994 }
995 if (!hostdata->selecting) {
996 /* Command was aborted */
997 NCR5380_write(MODE_REG, MR_BASE);
998 return false;
999 }
1000 if (err < 0) {
1001 NCR5380_write(MODE_REG, MR_BASE);
1002 shost_printk(KERN_ERR, instance,
1003 "select: arbitration timeout\n");
1004 goto out;
1005 }
1006 spin_unlock_irq(&hostdata->lock);
1007
1008 /* The SCSI-2 arbitration delay is 2.4 us */
1009 udelay(3);
1010
1011 /* Check for lost arbitration */
1012 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1013 (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
1014 (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
1015 NCR5380_write(MODE_REG, MR_BASE);
1016 dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
1017 spin_lock_irq(&hostdata->lock);
1018 goto out;
1019 }
1020
1021 /* After/during arbitration, BSY should be asserted.
1022 * IBM DPES-31080 Version S31Q works now
1023 * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman)
1024 */
1025 NCR5380_write(INITIATOR_COMMAND_REG,
1026 ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
1027
1028 /*
1029 * Again, bus clear + bus settle time is 1.2us, however, this is
1030 * a minimum so we'll udelay ceil(1.2)
1031 */
1032
1033 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
1034 udelay(15);
1035 else
1036 udelay(2);
1037
1038 spin_lock_irq(&hostdata->lock);
1039
1040 /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */
1041 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
1042 goto out;
1043
1044 if (!hostdata->selecting) {
1045 NCR5380_write(MODE_REG, MR_BASE);
1046 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1047 return false;
1048 }
1049
1050 dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
1051
1052 /*
1053 * Now that we have won arbitration, start Selection process, asserting
1054 * the host and target ID's on the SCSI bus.
1055 */
1056
1057 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));
1058
1059 /*
1060 * Raise ATN while SEL is true before BSY goes false from arbitration,
1061 * since this is the only way to guarantee that we'll get a MESSAGE OUT
1062 * phase immediately after selection.
1063 */
1064
1065 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |
1066 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1067 NCR5380_write(MODE_REG, MR_BASE);
1068
1069 /*
1070 * Reselect interrupts must be turned off prior to the dropping of BSY,
1071 * otherwise we will trigger an interrupt.
1072 */
1073 NCR5380_write(SELECT_ENABLE_REG, 0);
1074
1075 spin_unlock_irq(&hostdata->lock);
1076
1077 /*
1078 * The initiator shall then wait at least two deskew delays and release
1079 * the BSY signal.
1080 */
1081 udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */
1082
1083 /* Reset BSY */
1084 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |
1085 ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1086
1087 /*
1088 * Something weird happens when we cease to drive BSY - looks
1089 * like the board/chip is letting us do another read before the
1090 * appropriate propagation delay has expired, and we're confusing
1091 * a BSY signal from ourselves as the target's response to SELECTION.
1092 *
1093 * A small delay (the 'C++' frontend breaks the pipeline with an
1094 * unnecessary jump, making it work on my 386-33/Trantor T128, the
1095 * tighter 'C' code breaks and requires this) solves the problem -
1096 * the 1 us delay is arbitrary, and only used because this delay will
1097 * be the same on other platforms and since it works here, it should
1098 * work there.
1099 *
1100 * wingel suggests that this could be due to failing to wait
1101 * one deskew delay.
1102 */
1103
1104 udelay(1);
1105
1106 dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
1107
1108 /*
1109 * The SCSI specification calls for a 250 ms timeout for the actual
1110 * selection.
1111 */
1112
1113 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY,
1114 msecs_to_jiffies(250));
1115
1116 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
1117 spin_lock_irq(&hostdata->lock);
1118 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1119 NCR5380_reselect(instance);
1120 shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
1121 goto out;
1122 }
1123
1124 if (err < 0) {
1125 spin_lock_irq(&hostdata->lock);
1126 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1127
1128 /* Can't touch cmd if it has been reclaimed by the scsi ML */
1129 if (!hostdata->selecting)
1130 return false;
1131
1132 cmd->result = DID_BAD_TARGET << 16;
1133 complete_cmd(instance, cmd);
1134 dsprintk(NDEBUG_SELECTION, instance,
1135 "target did not respond within 250ms\n");
1136 ret = false;
1137 goto out;
1138 }
1139
1140 /*
1141 * No less than two deskew delays after the initiator detects the
1142 * BSY signal is true, it shall release the SEL signal and may
1143 * change the DATA BUS. -wingel
1144 */
1145
1146 udelay(1);
1147
1148 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1149
1150 /*
1151 * Since we followed the SCSI spec, and raised ATN while SEL
1152 * was true but before BSY was false during selection, the information
1153 * transfer phase should be a MESSAGE OUT phase so that we can send the
1154 * IDENTIFY message.
1155 */
1156
1157 /* Wait for start of REQ/ACK handshake */
1158
1159 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
1160 spin_lock_irq(&hostdata->lock);
1161 if (err < 0) {
1162 shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
1163 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1164 goto out;
1165 }
1166 if (!hostdata->selecting) {
1167 do_abort(instance);
1168 return false;
1169 }
1170
1171 dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
1172 scmd_id(cmd));
1173 tmp[0] = IDENTIFY(can_disconnect, cmd->device->lun);
1174
1175 len = 1;
1176 data = tmp;
1177 phase = PHASE_MSGOUT;
1178 NCR5380_transfer_pio(instance, &phase, &len, &data);
1179 if (len) {
1180 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1181 cmd->result = DID_ERROR << 16;
1182 complete_cmd(instance, cmd);
1183 dsprintk(NDEBUG_SELECTION, instance, "IDENTIFY message transfer failed\n");
1184 ret = false;
1185 goto out;
1186 }
1187
1188 dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
1189
1190 hostdata->connected = cmd;
1191 hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun;
1192
1193 #ifdef SUN3_SCSI_VME
1194 dregs->csr |= CSR_INTR;
1195 #endif
1196
1197 initialize_SCp(cmd);
1198
1199 ret = false;
1200
1201 out:
1202 if (!hostdata->selecting)
1203 return NULL;
1204 hostdata->selecting = NULL;
1205 return ret;
1206 }
1207
1208 /*
1209 * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
1210 * unsigned char *phase, int *count, unsigned char **data)
1211 *
1212 * Purpose : transfers data in given phase using polled I/O
1213 *
1214 * Inputs : instance - instance of driver, *phase - pointer to
1215 * what phase is expected, *count - pointer to number of
1216 * bytes to transfer, **data - pointer to data pointer.
1217 *
1218 * Returns : -1 when different phase is entered without transferring
1219 * maximum number of bytes, 0 if all bytes are transferred or exit
1220 * is in same phase.
1221 *
1222 * Also, *phase, *count, *data are modified in place.
1223 *
1224 * XXX Note : handling for bus free may be useful.
1225 */
1226
1227 /*
1228 * Note : this code is not as quick as it could be, however it
1229 * IS 100% reliable, and for the actual data transfer where speed
1230 * counts, we will always do a pseudo DMA or DMA transfer.
1231 */
1232
1233 static int NCR5380_transfer_pio(struct Scsi_Host *instance,
1234 unsigned char *phase, int *count,
1235 unsigned char **data)
1236 {
1237 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1238 unsigned char p = *phase, tmp;
1239 int c = *count;
1240 unsigned char *d = *data;
1241
1242 /*
1243 * The NCR5380 chip will only drive the SCSI bus when the
1244 * phase specified in the appropriate bits of the TARGET COMMAND
1245 * REGISTER match the STATUS REGISTER
1246 */
1247
1248 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1249
1250 do {
1251 /*
1252 * Wait for assertion of REQ, after which the phase bits will be
1253 * valid
1254 */
1255
1256 if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0)
1257 break;
1258
1259 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
1260
1261 /* Check for phase mismatch */
1262 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
1263 dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
1264 NCR5380_dprint_phase(NDEBUG_PIO, instance);
1265 break;
1266 }
1267
1268 /* Do actual transfer from SCSI bus to / from memory */
1269 if (!(p & SR_IO))
1270 NCR5380_write(OUTPUT_DATA_REG, *d);
1271 else
1272 *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
1273
1274 ++d;
1275
1276 /*
1277 * The SCSI standard suggests that in MSGOUT phase, the initiator
1278 * should drop ATN on the last byte of the message phase
1279 * after REQ has been asserted for the handshake but before
1280 * the initiator raises ACK.
1281 */
1282
1283 if (!(p & SR_IO)) {
1284 if (!((p & SR_MSG) && c > 1)) {
1285 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1286 NCR5380_dprint(NDEBUG_PIO, instance);
1287 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1288 ICR_ASSERT_DATA | ICR_ASSERT_ACK);
1289 } else {
1290 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1291 ICR_ASSERT_DATA | ICR_ASSERT_ATN);
1292 NCR5380_dprint(NDEBUG_PIO, instance);
1293 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1294 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1295 }
1296 } else {
1297 NCR5380_dprint(NDEBUG_PIO, instance);
1298 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
1299 }
1300
1301 if (NCR5380_poll_politely(hostdata,
1302 STATUS_REG, SR_REQ, 0, 5 * HZ) < 0)
1303 break;
1304
1305 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
1306
1307 /*
1308 * We have several special cases to consider during REQ/ACK handshaking :
1309 * 1. We were in MSGOUT phase, and we are on the last byte of the
1310 * message. ATN must be dropped as ACK is dropped.
1311 *
1312 * 2. We are in a MSGIN phase, and we are on the last byte of the
1313 * message. We must exit with ACK asserted, so that the calling
1314 * code may raise ATN before dropping ACK to reject the message.
1315 *
1316 * 3. ACK and ATN are clear and the target may proceed as normal.
1317 */
1318 if (!(p == PHASE_MSGIN && c == 1)) {
1319 if (p == PHASE_MSGOUT && c > 1)
1320 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1321 else
1322 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1323 }
1324 } while (--c);
1325
1326 dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
1327
1328 *count = c;
1329 *data = d;
1330 tmp = NCR5380_read(STATUS_REG);
1331 /* The phase read from the bus is valid if either REQ is (already)
1332 * asserted or if ACK hasn't been released yet. The latter applies if
1333 * we're in MSG IN, DATA IN or STATUS and all bytes have been received.
1334 */
1335 if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
1336 *phase = tmp & PHASE_MASK;
1337 else
1338 *phase = PHASE_UNKNOWN;
1339
1340 if (!c || (*phase == p))
1341 return 0;
1342 else
1343 return -1;
1344 }
1345
1346 /**
1347 * do_reset - issue a reset command
1348 * @instance: adapter to reset
1349 *
1350 * Issue a reset sequence to the NCR5380 and try and get the bus
1351 * back into sane shape.
1352 *
1353 * This clears the reset interrupt flag because there may be no handler for
1354 * it. When the driver is initialized, the NCR5380_intr() handler has not yet
1355 * been installed. And when in EH we may have released the ST DMA interrupt.
1356 */
1357
1358 static void do_reset(struct Scsi_Host *instance)
1359 {
1360 struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance);
1361 unsigned long flags;
1362
1363 local_irq_save(flags);
1364 NCR5380_write(TARGET_COMMAND_REG,
1365 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1366 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
1367 udelay(50);
1368 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1369 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1370 local_irq_restore(flags);
1371 }
1372
1373 /**
1374 * do_abort - abort the currently established nexus by going to
1375 * MESSAGE OUT phase and sending an ABORT message.
1376 * @instance: relevant scsi host instance
1377 *
1378 * Returns 0 on success, -1 on failure.
1379 */
1380
1381 static int do_abort(struct Scsi_Host *instance)
1382 {
1383 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1384 unsigned char *msgptr, phase, tmp;
1385 int len;
1386 int rc;
1387
1388 /* Request message out phase */
1389 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1390
1391 /*
1392 * Wait for the target to indicate a valid phase by asserting
1393 * REQ. Once this happens, we'll have either a MSGOUT phase
1394 * and can immediately send the ABORT message, or we'll have some
1395 * other phase and will have to source/sink data.
1396 *
1397 * We really don't care what value was on the bus or what value
1398 * the target sees, so we just handshake.
1399 */
1400
1401 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ);
1402 if (rc < 0)
1403 goto timeout;
1404
1405 tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
1406
1407 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1408
1409 if (tmp != PHASE_MSGOUT) {
1410 NCR5380_write(INITIATOR_COMMAND_REG,
1411 ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1412 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0, 3 * HZ);
1413 if (rc < 0)
1414 goto timeout;
1415 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1416 }
1417
1418 tmp = ABORT;
1419 msgptr = &tmp;
1420 len = 1;
1421 phase = PHASE_MSGOUT;
1422 NCR5380_transfer_pio(instance, &phase, &len, &msgptr);
1423
1424 /*
1425 * If we got here, and the command completed successfully,
1426 * we're about to go into bus free state.
1427 */
1428
1429 return len ? -1 : 0;
1430
1431 timeout:
1432 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1433 return -1;
1434 }
1435
1436 /*
1437 * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
1438 * unsigned char *phase, int *count, unsigned char **data)
1439 *
1440 * Purpose : transfers data in given phase using either real
1441 * or pseudo DMA.
1442 *
1443 * Inputs : instance - instance of driver, *phase - pointer to
1444 * what phase is expected, *count - pointer to number of
1445 * bytes to transfer, **data - pointer to data pointer.
1446 *
1447 * Returns : -1 when different phase is entered without transferring
1448 * maximum number of bytes, 0 if all bytes or transferred or exit
1449 * is in same phase.
1450 *
1451 * Also, *phase, *count, *data are modified in place.
1452 */
1453
1454
1455 static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1456 unsigned char *phase, int *count,
1457 unsigned char **data)
1458 {
1459 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1460 int c = *count;
1461 unsigned char p = *phase;
1462 unsigned char *d = *data;
1463 unsigned char tmp;
1464 int result = 0;
1465
1466 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1467 *phase = tmp;
1468 return -1;
1469 }
1470
1471 hostdata->connected->SCp.phase = p;
1472
1473 if (p & SR_IO) {
1474 if (hostdata->read_overruns)
1475 c -= hostdata->read_overruns;
1476 else if (hostdata->flags & FLAG_DMA_FIXUP)
1477 --c;
1478 }
1479
1480 dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
1481 (p & SR_IO) ? "receive" : "send", c, d);
1482
1483 #ifdef CONFIG_SUN3
1484 /* send start chain */
1485 sun3scsi_dma_start(c, *data);
1486 #endif
1487
1488 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1489 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1490 MR_ENABLE_EOP_INTR);
1491
1492 if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) {
1493 /* On the Medusa, it is a must to initialize the DMA before
1494 * starting the NCR. This is also the cleaner way for the TT.
1495 */
1496 if (p & SR_IO)
1497 result = NCR5380_dma_recv_setup(hostdata, d, c);
1498 else
1499 result = NCR5380_dma_send_setup(hostdata, d, c);
1500 }
1501
1502 /*
1503 * On the PAS16 at least I/O recovery delays are not needed here.
1504 * Everyone else seems to want them.
1505 */
1506
1507 if (p & SR_IO) {
1508 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1509 NCR5380_io_delay(1);
1510 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
1511 } else {
1512 NCR5380_io_delay(1);
1513 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1514 NCR5380_io_delay(1);
1515 NCR5380_write(START_DMA_SEND_REG, 0);
1516 NCR5380_io_delay(1);
1517 }
1518
1519 #ifdef CONFIG_SUN3
1520 #ifdef SUN3_SCSI_VME
1521 dregs->csr |= CSR_DMA_ENABLE;
1522 #endif
1523 sun3_dma_active = 1;
1524 #endif
1525
1526 if (hostdata->flags & FLAG_LATE_DMA_SETUP) {
1527 /* On the Falcon, the DMA setup must be done after the last
1528 * NCR access, else the DMA setup gets trashed!
1529 */
1530 if (p & SR_IO)
1531 result = NCR5380_dma_recv_setup(hostdata, d, c);
1532 else
1533 result = NCR5380_dma_send_setup(hostdata, d, c);
1534 }
1535
1536 /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */
1537 if (result < 0)
1538 return result;
1539
1540 /* For real DMA, result is the byte count. DMA interrupt is expected. */
1541 if (result > 0) {
1542 hostdata->dma_len = result;
1543 return 0;
1544 }
1545
1546 /* The result is zero iff pseudo DMA send/receive was completed. */
1547 hostdata->dma_len = c;
1548
1549 /*
1550 * A note regarding the DMA errata workarounds for early NMOS silicon.
1551 *
1552 * For DMA sends, we want to wait until the last byte has been
1553 * transferred out over the bus before we turn off DMA mode. Alas, there
1554 * seems to be no terribly good way of doing this on a 5380 under all
1555 * conditions. For non-scatter-gather operations, we can wait until REQ
1556 * and ACK both go false, or until a phase mismatch occurs. Gather-sends
1557 * are nastier, since the device will be expecting more data than we
1558 * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we
1559 * could test Last Byte Sent to assure transfer (I imagine this is precisely
1560 * why this signal was added to the newer chips) but on the older 538[01]
1561 * this signal does not exist. The workaround for this lack is a watchdog;
1562 * we bail out of the wait-loop after a modest amount of wait-time if
1563 * the usual exit conditions are not met. Not a terribly clean or
1564 * correct solution :-%
1565 *
1566 * DMA receive is equally tricky due to a nasty characteristic of the NCR5380.
1567 * If the chip is in DMA receive mode, it will respond to a target's
1568 * REQ by latching the SCSI data into the INPUT DATA register and asserting
1569 * ACK, even if it has _already_ been notified by the DMA controller that
1570 * the current DMA transfer has completed! If the NCR5380 is then taken
1571 * out of DMA mode, this already-acknowledged byte is lost. This is
1572 * not a problem for "one DMA transfer per READ command", because
1573 * the situation will never arise... either all of the data is DMA'ed
1574 * properly, or the target switches to MESSAGE IN phase to signal a
1575 * disconnection (either operation bringing the DMA to a clean halt).
1576 * However, in order to handle scatter-receive, we must work around the
1577 * problem. The chosen fix is to DMA fewer bytes, then check for the
1578 * condition before taking the NCR5380 out of DMA mode. One or two extra
1579 * bytes are transferred via PIO as necessary to fill out the original
1580 * request.
1581 */
1582
1583 if (hostdata->flags & FLAG_DMA_FIXUP) {
1584 if (p & SR_IO) {
1585 /*
1586 * The workaround was to transfer fewer bytes than we
1587 * intended to with the pseudo-DMA read function, wait for
1588 * the chip to latch the last byte, read it, and then disable
1589 * pseudo-DMA mode.
1590 *
1591 * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
1592 * REQ is deasserted when ACK is asserted, and not reasserted
1593 * until ACK goes false. Since the NCR5380 won't lower ACK
1594 * until DACK is asserted, which won't happen unless we twiddle
1595 * the DMA port or we take the NCR5380 out of DMA mode, we
1596 * can guarantee that we won't handshake another extra
1597 * byte.
1598 */
1599
1600 if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG,
1601 BASR_DRQ, BASR_DRQ, HZ) < 0) {
1602 result = -1;
1603 shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
1604 }
1605 if (NCR5380_poll_politely(hostdata, STATUS_REG,
1606 SR_REQ, 0, HZ) < 0) {
1607 result = -1;
1608 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
1609 }
1610 d[*count - 1] = NCR5380_read(INPUT_DATA_REG);
1611 } else {
1612 /*
1613 * Wait for the last byte to be sent. If REQ is being asserted for
1614 * the byte we're interested, we'll ACK it and it will go false.
1615 */
1616 if (NCR5380_poll_politely2(hostdata,
1617 BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
1618 BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) {
1619 result = -1;
1620 shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
1621 }
1622 }
1623 }
1624
1625 NCR5380_dma_complete(instance);
1626 return result;
1627 }
1628
1629 /*
1630 * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
1631 *
1632 * Purpose : run through the various SCSI phases and do as the target
1633 * directs us to. Operates on the currently connected command,
1634 * instance->connected.
1635 *
1636 * Inputs : instance, instance for which we are doing commands
1637 *
1638 * Side effects : SCSI things happen, the disconnected queue will be
1639 * modified if a command disconnects, *instance->connected will
1640 * change.
1641 *
1642 * XXX Note : we need to watch for bus free or a reset condition here
1643 * to recover from an unexpected bus free condition.
1644 */
1645
1646 static void NCR5380_information_transfer(struct Scsi_Host *instance)
1647 __releases(&hostdata->lock) __acquires(&hostdata->lock)
1648 {
1649 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1650 unsigned char msgout = NOP;
1651 int sink = 0;
1652 int len;
1653 int transfersize;
1654 unsigned char *data;
1655 unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
1656 struct scsi_cmnd *cmd;
1657
1658 #ifdef SUN3_SCSI_VME
1659 dregs->csr |= CSR_INTR;
1660 #endif
1661
1662 while ((cmd = hostdata->connected)) {
1663 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1664
1665 tmp = NCR5380_read(STATUS_REG);
1666 /* We only have a valid SCSI phase when REQ is asserted */
1667 if (tmp & SR_REQ) {
1668 phase = (tmp & PHASE_MASK);
1669 if (phase != old_phase) {
1670 old_phase = phase;
1671 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
1672 }
1673 #ifdef CONFIG_SUN3
1674 if (phase == PHASE_CMDOUT &&
1675 sun3_dma_setup_done != cmd) {
1676 int count;
1677
1678 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
1679 ++cmd->SCp.buffer;
1680 --cmd->SCp.buffers_residual;
1681 cmd->SCp.this_residual = cmd->SCp.buffer->length;
1682 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
1683 }
1684
1685 count = sun3scsi_dma_xfer_len(hostdata, cmd);
1686
1687 if (count > 0) {
1688 if (rq_data_dir(cmd->request))
1689 sun3scsi_dma_send_setup(hostdata,
1690 cmd->SCp.ptr, count);
1691 else
1692 sun3scsi_dma_recv_setup(hostdata,
1693 cmd->SCp.ptr, count);
1694 sun3_dma_setup_done = cmd;
1695 }
1696 #ifdef SUN3_SCSI_VME
1697 dregs->csr |= CSR_INTR;
1698 #endif
1699 }
1700 #endif /* CONFIG_SUN3 */
1701
1702 if (sink && (phase != PHASE_MSGOUT)) {
1703 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1704
1705 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |
1706 ICR_ASSERT_ACK);
1707 while (NCR5380_read(STATUS_REG) & SR_REQ)
1708 ;
1709 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1710 ICR_ASSERT_ATN);
1711 sink = 0;
1712 continue;
1713 }
1714
1715 switch (phase) {
1716 case PHASE_DATAOUT:
1717 #if (NDEBUG & NDEBUG_NO_DATAOUT)
1718 shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
1719 sink = 1;
1720 do_abort(instance);
1721 cmd->result = DID_ERROR << 16;
1722 complete_cmd(instance, cmd);
1723 hostdata->connected = NULL;
1724 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1725 return;
1726 #endif
1727 case PHASE_DATAIN:
1728 /*
1729 * If there is no room left in the current buffer in the
1730 * scatter-gather list, move onto the next one.
1731 */
1732
1733 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
1734 ++cmd->SCp.buffer;
1735 --cmd->SCp.buffers_residual;
1736 cmd->SCp.this_residual = cmd->SCp.buffer->length;
1737 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
1738 dsprintk(NDEBUG_INFORMATION, instance, "%d bytes and %d buffers left\n",
1739 cmd->SCp.this_residual,
1740 cmd->SCp.buffers_residual);
1741 }
1742
1743 /*
1744 * The preferred transfer method is going to be
1745 * PSEUDO-DMA for systems that are strictly PIO,
1746 * since we can let the hardware do the handshaking.
1747 *
1748 * For this to work, we need to know the transfersize
1749 * ahead of time, since the pseudo-DMA code will sit
1750 * in an unconditional loop.
1751 */
1752
1753 transfersize = 0;
1754 if (!cmd->device->borken)
1755 transfersize = NCR5380_dma_xfer_len(hostdata, cmd);
1756
1757 if (transfersize > 0) {
1758 len = transfersize;
1759 if (NCR5380_transfer_dma(instance, &phase,
1760 &len, (unsigned char **)&cmd->SCp.ptr)) {
1761 /*
1762 * If the watchdog timer fires, all future
1763 * accesses to this device will use the
1764 * polled-IO.
1765 */
1766 scmd_printk(KERN_INFO, cmd,
1767 "switching to slow handshake\n");
1768 cmd->device->borken = 1;
1769 sink = 1;
1770 do_abort(instance);
1771 cmd->result = DID_ERROR << 16;
1772 /* XXX - need to source or sink data here, as appropriate */
1773 }
1774 } else {
1775 /* Transfer a small chunk so that the
1776 * irq mode lock is not held too long.
1777 */
1778 transfersize = min(cmd->SCp.this_residual,
1779 NCR5380_PIO_CHUNK_SIZE);
1780 len = transfersize;
1781 NCR5380_transfer_pio(instance, &phase, &len,
1782 (unsigned char **)&cmd->SCp.ptr);
1783 cmd->SCp.this_residual -= transfersize - len;
1784 }
1785 #ifdef CONFIG_SUN3
1786 if (sun3_dma_setup_done == cmd)
1787 sun3_dma_setup_done = NULL;
1788 #endif
1789 return;
1790 case PHASE_MSGIN:
1791 len = 1;
1792 data = &tmp;
1793 NCR5380_transfer_pio(instance, &phase, &len, &data);
1794 cmd->SCp.Message = tmp;
1795
1796 switch (tmp) {
1797 case ABORT:
1798 case COMMAND_COMPLETE:
1799 /* Accept message by clearing ACK */
1800 sink = 1;
1801 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1802 dsprintk(NDEBUG_QUEUES, instance,
1803 "COMMAND COMPLETE %p target %d lun %llu\n",
1804 cmd, scmd_id(cmd), cmd->device->lun);
1805
1806 hostdata->connected = NULL;
1807 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1808
1809 cmd->result &= ~0xffff;
1810 cmd->result |= cmd->SCp.Status;
1811 cmd->result |= cmd->SCp.Message << 8;
1812
1813 if (cmd->cmnd[0] == REQUEST_SENSE)
1814 complete_cmd(instance, cmd);
1815 else {
1816 if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION ||
1817 cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) {
1818 dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
1819 cmd);
1820 list_add_tail(&ncmd->list,
1821 &hostdata->autosense);
1822 } else
1823 complete_cmd(instance, cmd);
1824 }
1825
1826 /*
1827 * Restore phase bits to 0 so an interrupted selection,
1828 * arbitration can resume.
1829 */
1830 NCR5380_write(TARGET_COMMAND_REG, 0);
1831
1832 maybe_release_dma_irq(instance);
1833 return;
1834 case MESSAGE_REJECT:
1835 /* Accept message by clearing ACK */
1836 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1837 switch (hostdata->last_message) {
1838 case HEAD_OF_QUEUE_TAG:
1839 case ORDERED_QUEUE_TAG:
1840 case SIMPLE_QUEUE_TAG:
1841 cmd->device->simple_tags = 0;
1842 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1843 break;
1844 default:
1845 break;
1846 }
1847 break;
1848 case DISCONNECT:
1849 /* Accept message by clearing ACK */
1850 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1851 hostdata->connected = NULL;
1852 list_add(&ncmd->list, &hostdata->disconnected);
1853 dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
1854 instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
1855 cmd, scmd_id(cmd), cmd->device->lun);
1856
1857 /*
1858 * Restore phase bits to 0 so an interrupted selection,
1859 * arbitration can resume.
1860 */
1861 NCR5380_write(TARGET_COMMAND_REG, 0);
1862
1863 #ifdef SUN3_SCSI_VME
1864 dregs->csr |= CSR_DMA_ENABLE;
1865 #endif
1866 return;
1867 /*
1868 * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
1869 * operation, in violation of the SCSI spec so we can safely
1870 * ignore SAVE/RESTORE pointers calls.
1871 *
1872 * Unfortunately, some disks violate the SCSI spec and
1873 * don't issue the required SAVE_POINTERS message before
1874 * disconnecting, and we have to break spec to remain
1875 * compatible.
1876 */
1877 case SAVE_POINTERS:
1878 case RESTORE_POINTERS:
1879 /* Accept message by clearing ACK */
1880 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1881 break;
1882 case EXTENDED_MESSAGE:
1883 /*
1884 * Start the message buffer with the EXTENDED_MESSAGE
1885 * byte, since spi_print_msg() wants the whole thing.
1886 */
1887 extended_msg[0] = EXTENDED_MESSAGE;
1888 /* Accept first byte by clearing ACK */
1889 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1890
1891 spin_unlock_irq(&hostdata->lock);
1892
1893 dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
1894
1895 len = 2;
1896 data = extended_msg + 1;
1897 phase = PHASE_MSGIN;
1898 NCR5380_transfer_pio(instance, &phase, &len, &data);
1899 dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
1900 (int)extended_msg[1],
1901 (int)extended_msg[2]);
1902
1903 if (!len && extended_msg[1] > 0 &&
1904 extended_msg[1] <= sizeof(extended_msg) - 2) {
1905 /* Accept third byte by clearing ACK */
1906 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1907 len = extended_msg[1] - 1;
1908 data = extended_msg + 3;
1909 phase = PHASE_MSGIN;
1910
1911 NCR5380_transfer_pio(instance, &phase, &len, &data);
1912 dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
1913 len);
1914
1915 switch (extended_msg[2]) {
1916 case EXTENDED_SDTR:
1917 case EXTENDED_WDTR:
1918 tmp = 0;
1919 }
1920 } else if (len) {
1921 shost_printk(KERN_ERR, instance, "error receiving extended message\n");
1922 tmp = 0;
1923 } else {
1924 shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
1925 extended_msg[2], extended_msg[1]);
1926 tmp = 0;
1927 }
1928
1929 spin_lock_irq(&hostdata->lock);
1930 if (!hostdata->connected)
1931 return;
1932
1933 /* Fall through to reject message */
1934
1935 /*
1936 * If we get something weird that we aren't expecting,
1937 * reject it.
1938 */
1939 default:
1940 if (tmp == EXTENDED_MESSAGE)
1941 scmd_printk(KERN_INFO, cmd,
1942 "rejecting unknown extended message code %02x, length %d\n",
1943 extended_msg[2], extended_msg[1]);
1944 else if (tmp)
1945 scmd_printk(KERN_INFO, cmd,
1946 "rejecting unknown message code %02x\n",
1947 tmp);
1948
1949 msgout = MESSAGE_REJECT;
1950 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1951 break;
1952 } /* switch (tmp) */
1953 break;
1954 case PHASE_MSGOUT:
1955 len = 1;
1956 data = &msgout;
1957 hostdata->last_message = msgout;
1958 NCR5380_transfer_pio(instance, &phase, &len, &data);
1959 if (msgout == ABORT) {
1960 hostdata->connected = NULL;
1961 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1962 cmd->result = DID_ERROR << 16;
1963 complete_cmd(instance, cmd);
1964 maybe_release_dma_irq(instance);
1965 return;
1966 }
1967 msgout = NOP;
1968 break;
1969 case PHASE_CMDOUT:
1970 len = cmd->cmd_len;
1971 data = cmd->cmnd;
1972 /*
1973 * XXX for performance reasons, on machines with a
1974 * PSEUDO-DMA architecture we should probably
1975 * use the dma transfer function.
1976 */
1977 NCR5380_transfer_pio(instance, &phase, &len, &data);
1978 break;
1979 case PHASE_STATIN:
1980 len = 1;
1981 data = &tmp;
1982 NCR5380_transfer_pio(instance, &phase, &len, &data);
1983 cmd->SCp.Status = tmp;
1984 break;
1985 default:
1986 shost_printk(KERN_ERR, instance, "unknown phase\n");
1987 NCR5380_dprint(NDEBUG_ANY, instance);
1988 } /* switch(phase) */
1989 } else {
1990 spin_unlock_irq(&hostdata->lock);
1991 NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
1992 spin_lock_irq(&hostdata->lock);
1993 }
1994 }
1995 }
1996
1997 /*
1998 * Function : void NCR5380_reselect (struct Scsi_Host *instance)
1999 *
2000 * Purpose : does reselection, initializing the instance->connected
2001 * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q
2002 * nexus has been reestablished,
2003 *
2004 * Inputs : instance - this instance of the NCR5380.
2005 */
2006
2007 static void NCR5380_reselect(struct Scsi_Host *instance)
2008 {
2009 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2010 unsigned char target_mask;
2011 unsigned char lun;
2012 unsigned char msg[3];
2013 struct NCR5380_cmd *ncmd;
2014 struct scsi_cmnd *tmp;
2015
2016 /*
2017 * Disable arbitration, etc. since the host adapter obviously
2018 * lost, and tell an interrupted NCR5380_select() to restart.
2019 */
2020
2021 NCR5380_write(MODE_REG, MR_BASE);
2022
2023 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
2024 if (!target_mask || target_mask & (target_mask - 1)) {
2025 shost_printk(KERN_WARNING, instance,
2026 "reselect: bad target_mask 0x%02x\n", target_mask);
2027 return;
2028 }
2029
2030 /*
2031 * At this point, we have detected that our SCSI ID is on the bus,
2032 * SEL is true and BSY was false for at least one bus settle delay
2033 * (400 ns).
2034 *
2035 * We must assert BSY ourselves, until the target drops the SEL
2036 * signal.
2037 */
2038
2039 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
2040 if (NCR5380_poll_politely(hostdata,
2041 STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) {
2042 shost_printk(KERN_ERR, instance, "reselect: !SEL timeout\n");
2043 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2044 return;
2045 }
2046 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2047
2048 /*
2049 * Wait for target to go into MSGIN.
2050 */
2051
2052 if (NCR5380_poll_politely(hostdata,
2053 STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) {
2054 if ((NCR5380_read(STATUS_REG) & (SR_BSY | SR_SEL)) == 0)
2055 /* BUS FREE phase */
2056 return;
2057 shost_printk(KERN_ERR, instance, "reselect: REQ timeout\n");
2058 do_abort(instance);
2059 return;
2060 }
2061
2062 #ifdef CONFIG_SUN3
2063 /* acknowledge toggle to MSGIN */
2064 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN));
2065
2066 /* peek at the byte without really hitting the bus */
2067 msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG);
2068 #else
2069 {
2070 int len = 1;
2071 unsigned char *data = msg;
2072 unsigned char phase = PHASE_MSGIN;
2073
2074 NCR5380_transfer_pio(instance, &phase, &len, &data);
2075
2076 if (len) {
2077 do_abort(instance);
2078 return;
2079 }
2080 }
2081 #endif /* CONFIG_SUN3 */
2082
2083 if (!(msg[0] & 0x80)) {
2084 shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
2085 spi_print_msg(msg);
2086 printk("\n");
2087 do_abort(instance);
2088 return;
2089 }
2090 lun = msg[0] & 0x07;
2091
2092 /*
2093 * We need to add code for SCSI-II to track which devices have
2094 * I_T_L_Q nexuses established, and which have simple I_T_L
2095 * nexuses so we can chose to do additional data transfer.
2096 */
2097
2098 /*
2099 * Find the command corresponding to the I_T_L or I_T_L_Q nexus we
2100 * just reestablished, and remove it from the disconnected queue.
2101 */
2102
2103 tmp = NULL;
2104 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2105 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2106
2107 if (target_mask == (1 << scmd_id(cmd)) &&
2108 lun == (u8)cmd->device->lun) {
2109 list_del(&ncmd->list);
2110 tmp = cmd;
2111 break;
2112 }
2113 }
2114
2115 if (tmp) {
2116 dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
2117 "reselect: removed %p from disconnected queue\n", tmp);
2118 } else {
2119 int target = ffs(target_mask) - 1;
2120
2121 shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
2122 target_mask, lun);
2123 /*
2124 * Since we have an established nexus that we can't do anything
2125 * with, we must abort it.
2126 */
2127 if (do_abort(instance) == 0)
2128 hostdata->busy[target] &= ~(1 << lun);
2129 return;
2130 }
2131
2132 #ifdef CONFIG_SUN3
2133 if (sun3_dma_setup_done != tmp) {
2134 int count;
2135
2136 if (!tmp->SCp.this_residual && tmp->SCp.buffers_residual) {
2137 ++tmp->SCp.buffer;
2138 --tmp->SCp.buffers_residual;
2139 tmp->SCp.this_residual = tmp->SCp.buffer->length;
2140 tmp->SCp.ptr = sg_virt(tmp->SCp.buffer);
2141 }
2142
2143 count = sun3scsi_dma_xfer_len(hostdata, tmp);
2144
2145 if (count > 0) {
2146 if (rq_data_dir(tmp->request))
2147 sun3scsi_dma_send_setup(hostdata,
2148 tmp->SCp.ptr, count);
2149 else
2150 sun3scsi_dma_recv_setup(hostdata,
2151 tmp->SCp.ptr, count);
2152 sun3_dma_setup_done = tmp;
2153 }
2154 }
2155
2156 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
2157 #endif /* CONFIG_SUN3 */
2158
2159 /* Accept message by clearing ACK */
2160 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2161
2162 hostdata->connected = tmp;
2163 dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n",
2164 scmd_id(tmp), tmp->device->lun);
2165 }
2166
2167 /**
2168 * list_find_cmd - test for presence of a command in a linked list
2169 * @haystack: list of commands
2170 * @needle: command to search for
2171 */
2172
2173 static bool list_find_cmd(struct list_head *haystack,
2174 struct scsi_cmnd *needle)
2175 {
2176 struct NCR5380_cmd *ncmd;
2177
2178 list_for_each_entry(ncmd, haystack, list)
2179 if (NCR5380_to_scmd(ncmd) == needle)
2180 return true;
2181 return false;
2182 }
2183
2184 /**
2185 * list_remove_cmd - remove a command from linked list
2186 * @haystack: list of commands
2187 * @needle: command to remove
2188 */
2189
2190 static bool list_del_cmd(struct list_head *haystack,
2191 struct scsi_cmnd *needle)
2192 {
2193 if (list_find_cmd(haystack, needle)) {
2194 struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle);
2195
2196 list_del(&ncmd->list);
2197 return true;
2198 }
2199 return false;
2200 }
2201
2202 /**
2203 * NCR5380_abort - scsi host eh_abort_handler() method
2204 * @cmd: the command to be aborted
2205 *
2206 * Try to abort a given command by removing it from queues and/or sending
2207 * the target an abort message. This may not succeed in causing a target
2208 * to abort the command. Nonetheless, the low-level driver must forget about
2209 * the command because the mid-layer reclaims it and it may be re-issued.
2210 *
2211 * The normal path taken by a command is as follows. For EH we trace this
2212 * same path to locate and abort the command.
2213 *
2214 * unissued -> selecting -> [unissued -> selecting ->]... connected ->
2215 * [disconnected -> connected ->]...
2216 * [autosense -> connected ->] done
2217 *
2218 * If cmd was not found at all then presumably it has already been completed,
2219 * in which case return SUCCESS to try to avoid further EH measures.
2220 *
2221 * If the command has not completed yet, we must not fail to find it.
2222 * We have no option but to forget the aborted command (even if it still
2223 * lacks sense data). The mid-layer may re-issue a command that is in error
2224 * recovery (see scsi_send_eh_cmnd), but the logic and data structures in
2225 * this driver are such that a command can appear on one queue only.
2226 *
2227 * The lock protects driver data structures, but EH handlers also use it
2228 * to serialize their own execution and prevent their own re-entry.
2229 */
2230
2231 static int NCR5380_abort(struct scsi_cmnd *cmd)
2232 {
2233 struct Scsi_Host *instance = cmd->device->host;
2234 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2235 unsigned long flags;
2236 int result = SUCCESS;
2237
2238 spin_lock_irqsave(&hostdata->lock, flags);
2239
2240 #if (NDEBUG & NDEBUG_ANY)
2241 scmd_printk(KERN_INFO, cmd, __func__);
2242 #endif
2243 NCR5380_dprint(NDEBUG_ANY, instance);
2244 NCR5380_dprint_phase(NDEBUG_ANY, instance);
2245
2246 if (list_del_cmd(&hostdata->unissued, cmd)) {
2247 dsprintk(NDEBUG_ABORT, instance,
2248 "abort: removed %p from issue queue\n", cmd);
2249 cmd->result = DID_ABORT << 16;
2250 cmd->scsi_done(cmd); /* No tag or busy flag to worry about */
2251 goto out;
2252 }
2253
2254 if (hostdata->selecting == cmd) {
2255 dsprintk(NDEBUG_ABORT, instance,
2256 "abort: cmd %p == selecting\n", cmd);
2257 hostdata->selecting = NULL;
2258 cmd->result = DID_ABORT << 16;
2259 complete_cmd(instance, cmd);
2260 goto out;
2261 }
2262
2263 if (list_del_cmd(&hostdata->disconnected, cmd)) {
2264 dsprintk(NDEBUG_ABORT, instance,
2265 "abort: removed %p from disconnected list\n", cmd);
2266 /* Can't call NCR5380_select() and send ABORT because that
2267 * means releasing the lock. Need a bus reset.
2268 */
2269 set_host_byte(cmd, DID_ERROR);
2270 complete_cmd(instance, cmd);
2271 result = FAILED;
2272 goto out;
2273 }
2274
2275 if (hostdata->connected == cmd) {
2276 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2277 hostdata->connected = NULL;
2278 hostdata->dma_len = 0;
2279 if (do_abort(instance)) {
2280 set_host_byte(cmd, DID_ERROR);
2281 complete_cmd(instance, cmd);
2282 result = FAILED;
2283 goto out;
2284 }
2285 set_host_byte(cmd, DID_ABORT);
2286 complete_cmd(instance, cmd);
2287 goto out;
2288 }
2289
2290 if (list_del_cmd(&hostdata->autosense, cmd)) {
2291 dsprintk(NDEBUG_ABORT, instance,
2292 "abort: removed %p from sense queue\n", cmd);
2293 complete_cmd(instance, cmd);
2294 }
2295
2296 out:
2297 if (result == FAILED)
2298 dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
2299 else {
2300 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
2301 dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
2302 }
2303
2304 queue_work(hostdata->work_q, &hostdata->main_task);
2305 maybe_release_dma_irq(instance);
2306 spin_unlock_irqrestore(&hostdata->lock, flags);
2307
2308 return result;
2309 }
2310
2311
2312 static void bus_reset_cleanup(struct Scsi_Host *instance)
2313 {
2314 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2315 int i;
2316 struct NCR5380_cmd *ncmd;
2317
2318 /* reset NCR registers */
2319 NCR5380_write(MODE_REG, MR_BASE);
2320 NCR5380_write(TARGET_COMMAND_REG, 0);
2321 NCR5380_write(SELECT_ENABLE_REG, 0);
2322
2323 /* After the reset, there are no more connected or disconnected commands
2324 * and no busy units; so clear the low-level status here to avoid
2325 * conflicts when the mid-level code tries to wake up the affected
2326 * commands!
2327 */
2328
2329 if (hostdata->selecting) {
2330 hostdata->selecting->result = DID_RESET << 16;
2331 complete_cmd(instance, hostdata->selecting);
2332 hostdata->selecting = NULL;
2333 }
2334
2335 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2336 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2337
2338 set_host_byte(cmd, DID_RESET);
2339 complete_cmd(instance, cmd);
2340 }
2341 INIT_LIST_HEAD(&hostdata->disconnected);
2342
2343 list_for_each_entry(ncmd, &hostdata->autosense, list) {
2344 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2345
2346 cmd->scsi_done(cmd);
2347 }
2348 INIT_LIST_HEAD(&hostdata->autosense);
2349
2350 if (hostdata->connected) {
2351 set_host_byte(hostdata->connected, DID_RESET);
2352 complete_cmd(instance, hostdata->connected);
2353 hostdata->connected = NULL;
2354 }
2355
2356 for (i = 0; i < 8; ++i)
2357 hostdata->busy[i] = 0;
2358 hostdata->dma_len = 0;
2359
2360 queue_work(hostdata->work_q, &hostdata->main_task);
2361 maybe_release_dma_irq(instance);
2362 }
2363
2364 /**
2365 * NCR5380_host_reset - reset the SCSI host
2366 * @cmd: SCSI command undergoing EH
2367 *
2368 * Returns SUCCESS
2369 */
2370
2371 static int NCR5380_host_reset(struct scsi_cmnd *cmd)
2372 {
2373 struct Scsi_Host *instance = cmd->device->host;
2374 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2375 unsigned long flags;
2376 struct NCR5380_cmd *ncmd;
2377
2378 spin_lock_irqsave(&hostdata->lock, flags);
2379
2380 #if (NDEBUG & NDEBUG_ANY)
2381 shost_printk(KERN_INFO, instance, __func__);
2382 #endif
2383 NCR5380_dprint(NDEBUG_ANY, instance);
2384 NCR5380_dprint_phase(NDEBUG_ANY, instance);
2385
2386 list_for_each_entry(ncmd, &hostdata->unissued, list) {
2387 struct scsi_cmnd *scmd = NCR5380_to_scmd(ncmd);
2388
2389 scmd->result = DID_RESET << 16;
2390 scmd->scsi_done(scmd);
2391 }
2392 INIT_LIST_HEAD(&hostdata->unissued);
2393
2394 do_reset(instance);
2395 bus_reset_cleanup(instance);
2396
2397 spin_unlock_irqrestore(&hostdata->lock, flags);
2398
2399 return SUCCESS;
2400 }