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scsi: aacraid: Added new IWBR reset
[mirror_ubuntu-zesty-kernel.git] / drivers / scsi / aacraid / src.c
1 /*
2 * Adaptec AAC series RAID controller driver
3 * (c) Copyright 2001 Red Hat Inc.
4 *
5 * based on the old aacraid driver that is..
6 * Adaptec aacraid device driver for Linux.
7 *
8 * Copyright (c) 2000-2010 Adaptec, Inc.
9 * 2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2, or (at your option)
14 * any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; see the file COPYING. If not, write to
23 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Module Name:
26 * src.c
27 *
28 * Abstract: Hardware Device Interface for PMC SRC based controllers
29 *
30 */
31
32 #include <linux/kernel.h>
33 #include <linux/init.h>
34 #include <linux/types.h>
35 #include <linux/pci.h>
36 #include <linux/spinlock.h>
37 #include <linux/slab.h>
38 #include <linux/blkdev.h>
39 #include <linux/delay.h>
40 #include <linux/completion.h>
41 #include <linux/time.h>
42 #include <linux/interrupt.h>
43 #include <scsi/scsi_host.h>
44
45 #include "aacraid.h"
46
47 static int aac_src_get_sync_status(struct aac_dev *dev);
48
49 static irqreturn_t aac_src_intr_message(int irq, void *dev_id)
50 {
51 struct aac_msix_ctx *ctx;
52 struct aac_dev *dev;
53 unsigned long bellbits, bellbits_shifted;
54 int vector_no;
55 int isFastResponse, mode;
56 u32 index, handle;
57
58 ctx = (struct aac_msix_ctx *)dev_id;
59 dev = ctx->dev;
60 vector_no = ctx->vector_no;
61
62 if (dev->msi_enabled) {
63 mode = AAC_INT_MODE_MSI;
64 if (vector_no == 0) {
65 bellbits = src_readl(dev, MUnit.ODR_MSI);
66 if (bellbits & 0x40000)
67 mode |= AAC_INT_MODE_AIF;
68 if (bellbits & 0x1000)
69 mode |= AAC_INT_MODE_SYNC;
70 }
71 } else {
72 mode = AAC_INT_MODE_INTX;
73 bellbits = src_readl(dev, MUnit.ODR_R);
74 if (bellbits & PmDoorBellResponseSent) {
75 bellbits = PmDoorBellResponseSent;
76 src_writel(dev, MUnit.ODR_C, bellbits);
77 src_readl(dev, MUnit.ODR_C);
78 } else {
79 bellbits_shifted = (bellbits >> SRC_ODR_SHIFT);
80 src_writel(dev, MUnit.ODR_C, bellbits);
81 src_readl(dev, MUnit.ODR_C);
82
83 if (bellbits_shifted & DoorBellAifPending)
84 mode |= AAC_INT_MODE_AIF;
85 else if (bellbits_shifted & OUTBOUNDDOORBELL_0)
86 mode |= AAC_INT_MODE_SYNC;
87 }
88 }
89
90 if (mode & AAC_INT_MODE_SYNC) {
91 unsigned long sflags;
92 struct list_head *entry;
93 int send_it = 0;
94 extern int aac_sync_mode;
95
96 if (!aac_sync_mode && !dev->msi_enabled) {
97 src_writel(dev, MUnit.ODR_C, bellbits);
98 src_readl(dev, MUnit.ODR_C);
99 }
100
101 if (dev->sync_fib) {
102 if (dev->sync_fib->callback)
103 dev->sync_fib->callback(dev->sync_fib->callback_data,
104 dev->sync_fib);
105 spin_lock_irqsave(&dev->sync_fib->event_lock, sflags);
106 if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) {
107 dev->management_fib_count--;
108 up(&dev->sync_fib->event_wait);
109 }
110 spin_unlock_irqrestore(&dev->sync_fib->event_lock,
111 sflags);
112 spin_lock_irqsave(&dev->sync_lock, sflags);
113 if (!list_empty(&dev->sync_fib_list)) {
114 entry = dev->sync_fib_list.next;
115 dev->sync_fib = list_entry(entry,
116 struct fib,
117 fiblink);
118 list_del(entry);
119 send_it = 1;
120 } else {
121 dev->sync_fib = NULL;
122 }
123 spin_unlock_irqrestore(&dev->sync_lock, sflags);
124 if (send_it) {
125 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
126 (u32)dev->sync_fib->hw_fib_pa,
127 0, 0, 0, 0, 0,
128 NULL, NULL, NULL, NULL, NULL);
129 }
130 }
131 if (!dev->msi_enabled)
132 mode = 0;
133
134 }
135
136 if (mode & AAC_INT_MODE_AIF) {
137 /* handle AIF */
138 if (dev->sa_firmware) {
139 u32 events = src_readl(dev, MUnit.SCR0);
140
141 aac_intr_normal(dev, events, 1, 0, NULL);
142 writel(events, &dev->IndexRegs->Mailbox[0]);
143 src_writel(dev, MUnit.IDR, 1 << 23);
144 } else {
145 if (dev->aif_thread && dev->fsa_dev)
146 aac_intr_normal(dev, 0, 2, 0, NULL);
147 }
148 if (dev->msi_enabled)
149 aac_src_access_devreg(dev, AAC_CLEAR_AIF_BIT);
150 mode = 0;
151 }
152
153 if (mode) {
154 index = dev->host_rrq_idx[vector_no];
155
156 for (;;) {
157 isFastResponse = 0;
158 /* remove toggle bit (31) */
159 handle = le32_to_cpu((dev->host_rrq[index])
160 & 0x7fffffff);
161 /* check fast response bits (30, 1) */
162 if (handle & 0x40000000)
163 isFastResponse = 1;
164 handle &= 0x0000ffff;
165 if (handle == 0)
166 break;
167 handle >>= 2;
168 if (dev->msi_enabled && dev->max_msix > 1)
169 atomic_dec(&dev->rrq_outstanding[vector_no]);
170 aac_intr_normal(dev, handle, 0, isFastResponse, NULL);
171 dev->host_rrq[index++] = 0;
172 if (index == (vector_no + 1) * dev->vector_cap)
173 index = vector_no * dev->vector_cap;
174 dev->host_rrq_idx[vector_no] = index;
175 }
176 mode = 0;
177 }
178
179 return IRQ_HANDLED;
180 }
181
182 /**
183 * aac_src_disable_interrupt - Disable interrupts
184 * @dev: Adapter
185 */
186
187 static void aac_src_disable_interrupt(struct aac_dev *dev)
188 {
189 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
190 }
191
192 /**
193 * aac_src_enable_interrupt_message - Enable interrupts
194 * @dev: Adapter
195 */
196
197 static void aac_src_enable_interrupt_message(struct aac_dev *dev)
198 {
199 aac_src_access_devreg(dev, AAC_ENABLE_INTERRUPT);
200 }
201
202 /**
203 * src_sync_cmd - send a command and wait
204 * @dev: Adapter
205 * @command: Command to execute
206 * @p1: first parameter
207 * @ret: adapter status
208 *
209 * This routine will send a synchronous command to the adapter and wait
210 * for its completion.
211 */
212
213 static int src_sync_cmd(struct aac_dev *dev, u32 command,
214 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
215 u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
216 {
217 unsigned long start;
218 unsigned long delay;
219 int ok;
220
221 /*
222 * Write the command into Mailbox 0
223 */
224 writel(command, &dev->IndexRegs->Mailbox[0]);
225 /*
226 * Write the parameters into Mailboxes 1 - 6
227 */
228 writel(p1, &dev->IndexRegs->Mailbox[1]);
229 writel(p2, &dev->IndexRegs->Mailbox[2]);
230 writel(p3, &dev->IndexRegs->Mailbox[3]);
231 writel(p4, &dev->IndexRegs->Mailbox[4]);
232
233 /*
234 * Clear the synch command doorbell to start on a clean slate.
235 */
236 if (!dev->msi_enabled)
237 src_writel(dev,
238 MUnit.ODR_C,
239 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
240
241 /*
242 * Disable doorbell interrupts
243 */
244 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
245
246 /*
247 * Force the completion of the mask register write before issuing
248 * the interrupt.
249 */
250 src_readl(dev, MUnit.OIMR);
251
252 /*
253 * Signal that there is a new synch command
254 */
255 src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT);
256
257 if (!dev->sync_mode || command != SEND_SYNCHRONOUS_FIB) {
258 ok = 0;
259 start = jiffies;
260
261 if (command == IOP_RESET_ALWAYS) {
262 /* Wait up to 10 sec */
263 delay = 10*HZ;
264 } else {
265 /* Wait up to 5 minutes */
266 delay = 300*HZ;
267 }
268 while (time_before(jiffies, start+delay)) {
269 udelay(5); /* Delay 5 microseconds to let Mon960 get info. */
270 /*
271 * Mon960 will set doorbell0 bit when it has completed the command.
272 */
273 if (aac_src_get_sync_status(dev) & OUTBOUNDDOORBELL_0) {
274 /*
275 * Clear the doorbell.
276 */
277 if (dev->msi_enabled)
278 aac_src_access_devreg(dev,
279 AAC_CLEAR_SYNC_BIT);
280 else
281 src_writel(dev,
282 MUnit.ODR_C,
283 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
284 ok = 1;
285 break;
286 }
287 /*
288 * Yield the processor in case we are slow
289 */
290 msleep(1);
291 }
292 if (unlikely(ok != 1)) {
293 /*
294 * Restore interrupt mask even though we timed out
295 */
296 aac_adapter_enable_int(dev);
297 return -ETIMEDOUT;
298 }
299 /*
300 * Pull the synch status from Mailbox 0.
301 */
302 if (status)
303 *status = readl(&dev->IndexRegs->Mailbox[0]);
304 if (r1)
305 *r1 = readl(&dev->IndexRegs->Mailbox[1]);
306 if (r2)
307 *r2 = readl(&dev->IndexRegs->Mailbox[2]);
308 if (r3)
309 *r3 = readl(&dev->IndexRegs->Mailbox[3]);
310 if (r4)
311 *r4 = readl(&dev->IndexRegs->Mailbox[4]);
312 if (command == GET_COMM_PREFERRED_SETTINGS)
313 dev->max_msix =
314 readl(&dev->IndexRegs->Mailbox[5]) & 0xFFFF;
315 /*
316 * Clear the synch command doorbell.
317 */
318 if (!dev->msi_enabled)
319 src_writel(dev,
320 MUnit.ODR_C,
321 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
322 }
323
324 /*
325 * Restore interrupt mask
326 */
327 aac_adapter_enable_int(dev);
328 return 0;
329 }
330
331 /**
332 * aac_src_interrupt_adapter - interrupt adapter
333 * @dev: Adapter
334 *
335 * Send an interrupt to the i960 and breakpoint it.
336 */
337
338 static void aac_src_interrupt_adapter(struct aac_dev *dev)
339 {
340 src_sync_cmd(dev, BREAKPOINT_REQUEST,
341 0, 0, 0, 0, 0, 0,
342 NULL, NULL, NULL, NULL, NULL);
343 }
344
345 /**
346 * aac_src_notify_adapter - send an event to the adapter
347 * @dev: Adapter
348 * @event: Event to send
349 *
350 * Notify the i960 that something it probably cares about has
351 * happened.
352 */
353
354 static void aac_src_notify_adapter(struct aac_dev *dev, u32 event)
355 {
356 switch (event) {
357
358 case AdapNormCmdQue:
359 src_writel(dev, MUnit.ODR_C,
360 INBOUNDDOORBELL_1 << SRC_ODR_SHIFT);
361 break;
362 case HostNormRespNotFull:
363 src_writel(dev, MUnit.ODR_C,
364 INBOUNDDOORBELL_4 << SRC_ODR_SHIFT);
365 break;
366 case AdapNormRespQue:
367 src_writel(dev, MUnit.ODR_C,
368 INBOUNDDOORBELL_2 << SRC_ODR_SHIFT);
369 break;
370 case HostNormCmdNotFull:
371 src_writel(dev, MUnit.ODR_C,
372 INBOUNDDOORBELL_3 << SRC_ODR_SHIFT);
373 break;
374 case FastIo:
375 src_writel(dev, MUnit.ODR_C,
376 INBOUNDDOORBELL_6 << SRC_ODR_SHIFT);
377 break;
378 case AdapPrintfDone:
379 src_writel(dev, MUnit.ODR_C,
380 INBOUNDDOORBELL_5 << SRC_ODR_SHIFT);
381 break;
382 default:
383 BUG();
384 break;
385 }
386 }
387
388 /**
389 * aac_src_start_adapter - activate adapter
390 * @dev: Adapter
391 *
392 * Start up processing on an i960 based AAC adapter
393 */
394
395 static void aac_src_start_adapter(struct aac_dev *dev)
396 {
397 union aac_init *init;
398 int i;
399
400 /* reset host_rrq_idx first */
401 for (i = 0; i < dev->max_msix; i++) {
402 dev->host_rrq_idx[i] = i * dev->vector_cap;
403 atomic_set(&dev->rrq_outstanding[i], 0);
404 }
405 atomic_set(&dev->msix_counter, 0);
406 dev->fibs_pushed_no = 0;
407
408 init = dev->init;
409 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) {
410 init->r8.host_elapsed_seconds = cpu_to_le32(get_seconds());
411 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS,
412 (u32)(ulong)dev->init_pa,
413 (u32)((ulong)dev->init_pa>>32),
414 sizeof(struct _r8) +
415 (AAC_MAX_HRRQ - 1) * sizeof(struct _rrq),
416 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
417 } else {
418 init->r7.host_elapsed_seconds = cpu_to_le32(get_seconds());
419 // We can only use a 32 bit address here
420 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS,
421 (u32)(ulong)dev->init_pa, 0, 0, 0, 0, 0,
422 NULL, NULL, NULL, NULL, NULL);
423 }
424
425 }
426
427 /**
428 * aac_src_check_health
429 * @dev: device to check if healthy
430 *
431 * Will attempt to determine if the specified adapter is alive and
432 * capable of handling requests, returning 0 if alive.
433 */
434 static int aac_src_check_health(struct aac_dev *dev)
435 {
436 u32 status = src_readl(dev, MUnit.OMR);
437
438 /*
439 * Check to see if the board failed any self tests.
440 */
441 if (unlikely(status & SELF_TEST_FAILED))
442 return -1;
443
444 /*
445 * Check to see if the board panic'd.
446 */
447 if (unlikely(status & KERNEL_PANIC))
448 return (status >> 16) & 0xFF;
449 /*
450 * Wait for the adapter to be up and running.
451 */
452 if (unlikely(!(status & KERNEL_UP_AND_RUNNING)))
453 return -3;
454 /*
455 * Everything is OK
456 */
457 return 0;
458 }
459
460 static inline u32 aac_get_vector(struct aac_dev *dev)
461 {
462 return atomic_inc_return(&dev->msix_counter)%dev->max_msix;
463 }
464
465 /**
466 * aac_src_deliver_message
467 * @fib: fib to issue
468 *
469 * Will send a fib, returning 0 if successful.
470 */
471 static int aac_src_deliver_message(struct fib *fib)
472 {
473 struct aac_dev *dev = fib->dev;
474 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
475 u32 fibsize;
476 dma_addr_t address;
477 struct aac_fib_xporthdr *pFibX;
478 int native_hba;
479 #if !defined(writeq)
480 unsigned long flags;
481 #endif
482
483 u16 vector_no;
484
485 atomic_inc(&q->numpending);
486
487 native_hba = (fib->flags & FIB_CONTEXT_FLAG_NATIVE_HBA) ? 1 : 0;
488
489
490 if (dev->msi_enabled && dev->max_msix > 1 &&
491 (native_hba || fib->hw_fib_va->header.Command != AifRequest)) {
492
493 if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE3)
494 && dev->sa_firmware)
495 vector_no = aac_get_vector(dev);
496 else
497 vector_no = fib->vector_no;
498
499 if (native_hba) {
500 if (fib->flags & FIB_CONTEXT_FLAG_NATIVE_HBA_TMF) {
501 struct aac_hba_tm_req *tm_req;
502
503 tm_req = (struct aac_hba_tm_req *)
504 fib->hw_fib_va;
505 if (tm_req->iu_type ==
506 HBA_IU_TYPE_SCSI_TM_REQ) {
507 ((struct aac_hba_tm_req *)
508 fib->hw_fib_va)->reply_qid
509 = vector_no;
510 ((struct aac_hba_tm_req *)
511 fib->hw_fib_va)->request_id
512 += (vector_no << 16);
513 } else {
514 ((struct aac_hba_reset_req *)
515 fib->hw_fib_va)->reply_qid
516 = vector_no;
517 ((struct aac_hba_reset_req *)
518 fib->hw_fib_va)->request_id
519 += (vector_no << 16);
520 }
521 } else {
522 ((struct aac_hba_cmd_req *)
523 fib->hw_fib_va)->reply_qid
524 = vector_no;
525 ((struct aac_hba_cmd_req *)
526 fib->hw_fib_va)->request_id
527 += (vector_no << 16);
528 }
529 } else {
530 fib->hw_fib_va->header.Handle += (vector_no << 16);
531 }
532 } else {
533 vector_no = 0;
534 }
535
536 atomic_inc(&dev->rrq_outstanding[vector_no]);
537
538 if (native_hba) {
539 address = fib->hw_fib_pa;
540 fibsize = (fib->hbacmd_size + 127) / 128 - 1;
541 if (fibsize > 31)
542 fibsize = 31;
543 address |= fibsize;
544 #if defined(writeq)
545 src_writeq(dev, MUnit.IQN_L, (u64)address);
546 #else
547 spin_lock_irqsave(&fib->dev->iq_lock, flags);
548 src_writel(dev, MUnit.IQN_H,
549 upper_32_bits(address) & 0xffffffff);
550 src_writel(dev, MUnit.IQN_L, address & 0xffffffff);
551 spin_unlock_irqrestore(&fib->dev->iq_lock, flags);
552 #endif
553 } else {
554 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2 ||
555 dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) {
556 /* Calculate the amount to the fibsize bits */
557 fibsize = (le16_to_cpu(fib->hw_fib_va->header.Size)
558 + 127) / 128 - 1;
559 /* New FIB header, 32-bit */
560 address = fib->hw_fib_pa;
561 fib->hw_fib_va->header.StructType = FIB_MAGIC2;
562 fib->hw_fib_va->header.SenderFibAddress =
563 cpu_to_le32((u32)address);
564 fib->hw_fib_va->header.u.TimeStamp = 0;
565 WARN_ON(((u32)(((address) >> 16) >> 16)) != 0L);
566 } else {
567 /* Calculate the amount to the fibsize bits */
568 fibsize = (sizeof(struct aac_fib_xporthdr) +
569 le16_to_cpu(fib->hw_fib_va->header.Size)
570 + 127) / 128 - 1;
571 /* Fill XPORT header */
572 pFibX = (struct aac_fib_xporthdr *)
573 ((unsigned char *)fib->hw_fib_va -
574 sizeof(struct aac_fib_xporthdr));
575 pFibX->Handle = fib->hw_fib_va->header.Handle;
576 pFibX->HostAddress =
577 cpu_to_le64((u64)fib->hw_fib_pa);
578 pFibX->Size = cpu_to_le32(
579 le16_to_cpu(fib->hw_fib_va->header.Size));
580 address = fib->hw_fib_pa -
581 (u64)sizeof(struct aac_fib_xporthdr);
582 }
583 if (fibsize > 31)
584 fibsize = 31;
585 address |= fibsize;
586
587 #if defined(writeq)
588 src_writeq(dev, MUnit.IQ_L, (u64)address);
589 #else
590 spin_lock_irqsave(&fib->dev->iq_lock, flags);
591 src_writel(dev, MUnit.IQ_H,
592 upper_32_bits(address) & 0xffffffff);
593 src_writel(dev, MUnit.IQ_L, address & 0xffffffff);
594 spin_unlock_irqrestore(&fib->dev->iq_lock, flags);
595 #endif
596 }
597 return 0;
598 }
599
600 /**
601 * aac_src_ioremap
602 * @size: mapping resize request
603 *
604 */
605 static int aac_src_ioremap(struct aac_dev *dev, u32 size)
606 {
607 if (!size) {
608 iounmap(dev->regs.src.bar1);
609 dev->regs.src.bar1 = NULL;
610 iounmap(dev->regs.src.bar0);
611 dev->base = dev->regs.src.bar0 = NULL;
612 return 0;
613 }
614 dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2),
615 AAC_MIN_SRC_BAR1_SIZE);
616 dev->base = NULL;
617 if (dev->regs.src.bar1 == NULL)
618 return -1;
619 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
620 if (dev->base == NULL) {
621 iounmap(dev->regs.src.bar1);
622 dev->regs.src.bar1 = NULL;
623 return -1;
624 }
625 dev->IndexRegs = &((struct src_registers __iomem *)
626 dev->base)->u.tupelo.IndexRegs;
627 return 0;
628 }
629
630 /**
631 * aac_srcv_ioremap
632 * @size: mapping resize request
633 *
634 */
635 static int aac_srcv_ioremap(struct aac_dev *dev, u32 size)
636 {
637 if (!size) {
638 iounmap(dev->regs.src.bar0);
639 dev->base = dev->regs.src.bar0 = NULL;
640 return 0;
641 }
642
643 dev->regs.src.bar1 =
644 ioremap(pci_resource_start(dev->pdev, 2), AAC_MIN_SRCV_BAR1_SIZE);
645 dev->base = NULL;
646 if (dev->regs.src.bar1 == NULL)
647 return -1;
648 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
649 if (dev->base == NULL) {
650 iounmap(dev->regs.src.bar1);
651 dev->regs.src.bar1 = NULL;
652 return -1;
653 }
654 dev->IndexRegs = &((struct src_registers __iomem *)
655 dev->base)->u.denali.IndexRegs;
656 return 0;
657 }
658
659 static void aac_set_intx_mode(struct aac_dev *dev)
660 {
661 if (dev->msi_enabled) {
662 aac_src_access_devreg(dev, AAC_ENABLE_INTX);
663 dev->msi_enabled = 0;
664 msleep(5000); /* Delay 5 seconds */
665 }
666 }
667
668 static void aac_send_iop_reset(struct aac_dev *dev, int bled)
669 {
670 u32 var, reset_mask;
671
672 bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS,
673 0, 0, 0, 0, 0, 0, &var,
674 &reset_mask, NULL, NULL, NULL);
675
676 if ((bled || var != 0x00000001) && !dev->doorbell_mask)
677 bled = -EINVAL;
678 else if (dev->doorbell_mask) {
679 reset_mask = dev->doorbell_mask;
680 bled = 0;
681 var = 0x00000001;
682 }
683
684 aac_set_intx_mode(dev);
685
686 if (!bled && (dev->supplement_adapter_info.SupportedOptions2 &
687 AAC_OPTION_DOORBELL_RESET)) {
688 src_writel(dev, MUnit.IDR, reset_mask);
689 } else {
690 src_writel(dev, MUnit.IDR, 0x100);
691 }
692 msleep(30000);
693 }
694
695 static void aac_send_hardware_soft_reset(struct aac_dev *dev)
696 {
697 u_int32_t val;
698
699 val = readl(((char *)(dev->base) + IBW_SWR_OFFSET));
700 val |= 0x01;
701 writel(val, ((char *)(dev->base) + IBW_SWR_OFFSET));
702 msleep_interruptible(20000);
703 }
704
705 static int aac_src_restart_adapter(struct aac_dev *dev, int bled, u8 reset_type)
706 {
707 unsigned long status, start;
708
709 if (bled < 0)
710 goto invalid_out;
711
712 if (bled)
713 pr_err("%s%d: adapter kernel panic'd %x.\n",
714 dev->name, dev->id, bled);
715
716 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
717
718 switch (reset_type) {
719 case IOP_HWSOFT_RESET:
720 aac_send_iop_reset(dev, bled);
721 /*
722 * Check to see if KERNEL_UP_AND_RUNNING
723 * Wait for the adapter to be up and running.
724 * If !KERNEL_UP_AND_RUNNING issue HW Soft Reset
725 */
726 status = src_readl(dev, MUnit.OMR);
727 if (dev->sa_firmware
728 && !(status & KERNEL_UP_AND_RUNNING)) {
729 start = jiffies;
730 do {
731 status = src_readl(dev, MUnit.OMR);
732 if (time_after(jiffies,
733 start+HZ*SOFT_RESET_TIME)) {
734 aac_send_hardware_soft_reset(dev);
735 start = jiffies;
736 }
737 } while (!(status & KERNEL_UP_AND_RUNNING));
738 }
739 break;
740 case HW_SOFT_RESET:
741 if (dev->sa_firmware) {
742 aac_send_hardware_soft_reset(dev);
743 aac_set_intx_mode(dev);
744 }
745 break;
746 default:
747 aac_send_iop_reset(dev, bled);
748 break;
749 }
750
751 invalid_out:
752
753 if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC)
754 return -ENODEV;
755
756 if (startup_timeout < 300)
757 startup_timeout = 300;
758
759 return 0;
760 }
761
762 /**
763 * aac_src_select_comm - Select communications method
764 * @dev: Adapter
765 * @comm: communications method
766 */
767 static int aac_src_select_comm(struct aac_dev *dev, int comm)
768 {
769 switch (comm) {
770 case AAC_COMM_MESSAGE:
771 dev->a_ops.adapter_intr = aac_src_intr_message;
772 dev->a_ops.adapter_deliver = aac_src_deliver_message;
773 break;
774 default:
775 return 1;
776 }
777 return 0;
778 }
779
780 /**
781 * aac_src_init - initialize an Cardinal Frey Bar card
782 * @dev: device to configure
783 *
784 */
785
786 int aac_src_init(struct aac_dev *dev)
787 {
788 unsigned long start;
789 unsigned long status;
790 int restart = 0;
791 int instance = dev->id;
792 const char *name = dev->name;
793
794 dev->a_ops.adapter_ioremap = aac_src_ioremap;
795 dev->a_ops.adapter_comm = aac_src_select_comm;
796
797 dev->base_size = AAC_MIN_SRC_BAR0_SIZE;
798 if (aac_adapter_ioremap(dev, dev->base_size)) {
799 printk(KERN_WARNING "%s: unable to map adapter.\n", name);
800 goto error_iounmap;
801 }
802
803 /* Failure to reset here is an option ... */
804 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
805 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
806 if ((aac_reset_devices || reset_devices) &&
807 !aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET))
808 ++restart;
809 /*
810 * Check to see if the board panic'd while booting.
811 */
812 status = src_readl(dev, MUnit.OMR);
813 if (status & KERNEL_PANIC) {
814 if (aac_src_restart_adapter(dev,
815 aac_src_check_health(dev), IOP_HWSOFT_RESET))
816 goto error_iounmap;
817 ++restart;
818 }
819 /*
820 * Check to see if the board failed any self tests.
821 */
822 status = src_readl(dev, MUnit.OMR);
823 if (status & SELF_TEST_FAILED) {
824 printk(KERN_ERR "%s%d: adapter self-test failed.\n",
825 dev->name, instance);
826 goto error_iounmap;
827 }
828 /*
829 * Check to see if the monitor panic'd while booting.
830 */
831 if (status & MONITOR_PANIC) {
832 printk(KERN_ERR "%s%d: adapter monitor panic.\n",
833 dev->name, instance);
834 goto error_iounmap;
835 }
836 start = jiffies;
837 /*
838 * Wait for the adapter to be up and running. Wait up to 3 minutes
839 */
840 while (!((status = src_readl(dev, MUnit.OMR)) &
841 KERNEL_UP_AND_RUNNING)) {
842 if ((restart &&
843 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
844 time_after(jiffies, start+HZ*startup_timeout)) {
845 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
846 dev->name, instance, status);
847 goto error_iounmap;
848 }
849 if (!restart &&
850 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
851 time_after(jiffies, start + HZ *
852 ((startup_timeout > 60)
853 ? (startup_timeout - 60)
854 : (startup_timeout / 2))))) {
855 if (likely(!aac_src_restart_adapter(dev,
856 aac_src_check_health(dev), IOP_HWSOFT_RESET)))
857 start = jiffies;
858 ++restart;
859 }
860 msleep(1);
861 }
862 if (restart && aac_commit)
863 aac_commit = 1;
864 /*
865 * Fill in the common function dispatch table.
866 */
867 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
868 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
869 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
870 dev->a_ops.adapter_notify = aac_src_notify_adapter;
871 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
872 dev->a_ops.adapter_check_health = aac_src_check_health;
873 dev->a_ops.adapter_restart = aac_src_restart_adapter;
874 dev->a_ops.adapter_start = aac_src_start_adapter;
875
876 /*
877 * First clear out all interrupts. Then enable the one's that we
878 * can handle.
879 */
880 aac_adapter_comm(dev, AAC_COMM_MESSAGE);
881 aac_adapter_disable_int(dev);
882 src_writel(dev, MUnit.ODR_C, 0xffffffff);
883 aac_adapter_enable_int(dev);
884
885 if (aac_init_adapter(dev) == NULL)
886 goto error_iounmap;
887 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1)
888 goto error_iounmap;
889
890 dev->msi = !pci_enable_msi(dev->pdev);
891
892 dev->aac_msix[0].vector_no = 0;
893 dev->aac_msix[0].dev = dev;
894
895 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
896 IRQF_SHARED, "aacraid", &(dev->aac_msix[0])) < 0) {
897
898 if (dev->msi)
899 pci_disable_msi(dev->pdev);
900
901 printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
902 name, instance);
903 goto error_iounmap;
904 }
905 dev->dbg_base = pci_resource_start(dev->pdev, 2);
906 dev->dbg_base_mapped = dev->regs.src.bar1;
907 dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE;
908 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
909
910 aac_adapter_enable_int(dev);
911
912 if (!dev->sync_mode) {
913 /*
914 * Tell the adapter that all is configured, and it can
915 * start accepting requests
916 */
917 aac_src_start_adapter(dev);
918 }
919 return 0;
920
921 error_iounmap:
922
923 return -1;
924 }
925
926 /**
927 * aac_srcv_init - initialize an SRCv card
928 * @dev: device to configure
929 *
930 */
931
932 int aac_srcv_init(struct aac_dev *dev)
933 {
934 unsigned long start;
935 unsigned long status;
936 int restart = 0;
937 int instance = dev->id;
938 const char *name = dev->name;
939
940 dev->a_ops.adapter_ioremap = aac_srcv_ioremap;
941 dev->a_ops.adapter_comm = aac_src_select_comm;
942
943 dev->base_size = AAC_MIN_SRCV_BAR0_SIZE;
944 if (aac_adapter_ioremap(dev, dev->base_size)) {
945 printk(KERN_WARNING "%s: unable to map adapter.\n", name);
946 goto error_iounmap;
947 }
948
949 /* Failure to reset here is an option ... */
950 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
951 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
952 if ((aac_reset_devices || reset_devices) &&
953 !aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET))
954 ++restart;
955 /*
956 * Check to see if flash update is running.
957 * Wait for the adapter to be up and running. Wait up to 5 minutes
958 */
959 status = src_readl(dev, MUnit.OMR);
960 if (status & FLASH_UPD_PENDING) {
961 start = jiffies;
962 do {
963 status = src_readl(dev, MUnit.OMR);
964 if (time_after(jiffies, start+HZ*FWUPD_TIMEOUT)) {
965 printk(KERN_ERR "%s%d: adapter flash update failed.\n",
966 dev->name, instance);
967 goto error_iounmap;
968 }
969 } while (!(status & FLASH_UPD_SUCCESS) &&
970 !(status & FLASH_UPD_FAILED));
971 /* Delay 10 seconds.
972 * Because right now FW is doing a soft reset,
973 * do not read scratch pad register at this time
974 */
975 ssleep(10);
976 }
977 /*
978 * Check to see if the board panic'd while booting.
979 */
980 status = src_readl(dev, MUnit.OMR);
981 if (status & KERNEL_PANIC) {
982 if (aac_src_restart_adapter(dev,
983 aac_src_check_health(dev), IOP_HWSOFT_RESET))
984 goto error_iounmap;
985 ++restart;
986 }
987 /*
988 * Check to see if the board failed any self tests.
989 */
990 status = src_readl(dev, MUnit.OMR);
991 if (status & SELF_TEST_FAILED) {
992 printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
993 goto error_iounmap;
994 }
995 /*
996 * Check to see if the monitor panic'd while booting.
997 */
998 if (status & MONITOR_PANIC) {
999 printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
1000 goto error_iounmap;
1001 }
1002 start = jiffies;
1003 /*
1004 * Wait for the adapter to be up and running. Wait up to 3 minutes
1005 */
1006 while (!((status = src_readl(dev, MUnit.OMR)) &
1007 KERNEL_UP_AND_RUNNING) ||
1008 status == 0xffffffff) {
1009 if ((restart &&
1010 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
1011 time_after(jiffies, start+HZ*startup_timeout)) {
1012 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
1013 dev->name, instance, status);
1014 goto error_iounmap;
1015 }
1016 if (!restart &&
1017 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
1018 time_after(jiffies, start + HZ *
1019 ((startup_timeout > 60)
1020 ? (startup_timeout - 60)
1021 : (startup_timeout / 2))))) {
1022 if (likely(!aac_src_restart_adapter(dev,
1023 aac_src_check_health(dev), IOP_HWSOFT_RESET)))
1024 start = jiffies;
1025 ++restart;
1026 }
1027 msleep(1);
1028 }
1029 if (restart && aac_commit)
1030 aac_commit = 1;
1031 /*
1032 * Fill in the common function dispatch table.
1033 */
1034 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
1035 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
1036 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
1037 dev->a_ops.adapter_notify = aac_src_notify_adapter;
1038 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
1039 dev->a_ops.adapter_check_health = aac_src_check_health;
1040 dev->a_ops.adapter_restart = aac_src_restart_adapter;
1041 dev->a_ops.adapter_start = aac_src_start_adapter;
1042
1043 /*
1044 * First clear out all interrupts. Then enable the one's that we
1045 * can handle.
1046 */
1047 aac_adapter_comm(dev, AAC_COMM_MESSAGE);
1048 aac_adapter_disable_int(dev);
1049 src_writel(dev, MUnit.ODR_C, 0xffffffff);
1050 aac_adapter_enable_int(dev);
1051
1052 if (aac_init_adapter(dev) == NULL)
1053 goto error_iounmap;
1054 if ((dev->comm_interface != AAC_COMM_MESSAGE_TYPE2) &&
1055 (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3))
1056 goto error_iounmap;
1057 if (dev->msi_enabled)
1058 aac_src_access_devreg(dev, AAC_ENABLE_MSIX);
1059
1060 if (aac_acquire_irq(dev))
1061 goto error_iounmap;
1062
1063 dev->dbg_base = pci_resource_start(dev->pdev, 2);
1064 dev->dbg_base_mapped = dev->regs.src.bar1;
1065 dev->dbg_size = AAC_MIN_SRCV_BAR1_SIZE;
1066 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
1067
1068 aac_adapter_enable_int(dev);
1069
1070 if (!dev->sync_mode) {
1071 /*
1072 * Tell the adapter that all is configured, and it can
1073 * start accepting requests
1074 */
1075 aac_src_start_adapter(dev);
1076 }
1077 return 0;
1078
1079 error_iounmap:
1080
1081 return -1;
1082 }
1083
1084 void aac_src_access_devreg(struct aac_dev *dev, int mode)
1085 {
1086 u_int32_t val;
1087
1088 switch (mode) {
1089 case AAC_ENABLE_INTERRUPT:
1090 src_writel(dev,
1091 MUnit.OIMR,
1092 dev->OIMR = (dev->msi_enabled ?
1093 AAC_INT_ENABLE_TYPE1_MSIX :
1094 AAC_INT_ENABLE_TYPE1_INTX));
1095 break;
1096
1097 case AAC_DISABLE_INTERRUPT:
1098 src_writel(dev,
1099 MUnit.OIMR,
1100 dev->OIMR = AAC_INT_DISABLE_ALL);
1101 break;
1102
1103 case AAC_ENABLE_MSIX:
1104 /* set bit 6 */
1105 val = src_readl(dev, MUnit.IDR);
1106 val |= 0x40;
1107 src_writel(dev, MUnit.IDR, val);
1108 src_readl(dev, MUnit.IDR);
1109 /* unmask int. */
1110 val = PMC_ALL_INTERRUPT_BITS;
1111 src_writel(dev, MUnit.IOAR, val);
1112 val = src_readl(dev, MUnit.OIMR);
1113 src_writel(dev,
1114 MUnit.OIMR,
1115 val & (~(PMC_GLOBAL_INT_BIT2 | PMC_GLOBAL_INT_BIT0)));
1116 break;
1117
1118 case AAC_DISABLE_MSIX:
1119 /* reset bit 6 */
1120 val = src_readl(dev, MUnit.IDR);
1121 val &= ~0x40;
1122 src_writel(dev, MUnit.IDR, val);
1123 src_readl(dev, MUnit.IDR);
1124 break;
1125
1126 case AAC_CLEAR_AIF_BIT:
1127 /* set bit 5 */
1128 val = src_readl(dev, MUnit.IDR);
1129 val |= 0x20;
1130 src_writel(dev, MUnit.IDR, val);
1131 src_readl(dev, MUnit.IDR);
1132 break;
1133
1134 case AAC_CLEAR_SYNC_BIT:
1135 /* set bit 4 */
1136 val = src_readl(dev, MUnit.IDR);
1137 val |= 0x10;
1138 src_writel(dev, MUnit.IDR, val);
1139 src_readl(dev, MUnit.IDR);
1140 break;
1141
1142 case AAC_ENABLE_INTX:
1143 /* set bit 7 */
1144 val = src_readl(dev, MUnit.IDR);
1145 val |= 0x80;
1146 src_writel(dev, MUnit.IDR, val);
1147 src_readl(dev, MUnit.IDR);
1148 /* unmask int. */
1149 val = PMC_ALL_INTERRUPT_BITS;
1150 src_writel(dev, MUnit.IOAR, val);
1151 src_readl(dev, MUnit.IOAR);
1152 val = src_readl(dev, MUnit.OIMR);
1153 src_writel(dev, MUnit.OIMR,
1154 val & (~(PMC_GLOBAL_INT_BIT2)));
1155 break;
1156
1157 default:
1158 break;
1159 }
1160 }
1161
1162 static int aac_src_get_sync_status(struct aac_dev *dev)
1163 {
1164
1165 int val;
1166
1167 if (dev->msi_enabled)
1168 val = src_readl(dev, MUnit.ODR_MSI) & 0x1000 ? 1 : 0;
1169 else
1170 val = src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT;
1171
1172 return val;
1173 }
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