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scsi: aacraid: Added support for response path
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / aacraid / src.c
1 /*
2 * Adaptec AAC series RAID controller driver
3 * (c) Copyright 2001 Red Hat Inc.
4 *
5 * based on the old aacraid driver that is..
6 * Adaptec aacraid device driver for Linux.
7 *
8 * Copyright (c) 2000-2010 Adaptec, Inc.
9 * 2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2, or (at your option)
14 * any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; see the file COPYING. If not, write to
23 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Module Name:
26 * src.c
27 *
28 * Abstract: Hardware Device Interface for PMC SRC based controllers
29 *
30 */
31
32 #include <linux/kernel.h>
33 #include <linux/init.h>
34 #include <linux/types.h>
35 #include <linux/pci.h>
36 #include <linux/spinlock.h>
37 #include <linux/slab.h>
38 #include <linux/blkdev.h>
39 #include <linux/delay.h>
40 #include <linux/completion.h>
41 #include <linux/time.h>
42 #include <linux/interrupt.h>
43 #include <scsi/scsi_host.h>
44
45 #include "aacraid.h"
46
47 static int aac_src_get_sync_status(struct aac_dev *dev);
48
49 static irqreturn_t aac_src_intr_message(int irq, void *dev_id)
50 {
51 struct aac_msix_ctx *ctx;
52 struct aac_dev *dev;
53 unsigned long bellbits, bellbits_shifted;
54 int vector_no;
55 int isFastResponse, mode;
56 u32 index, handle;
57
58 ctx = (struct aac_msix_ctx *)dev_id;
59 dev = ctx->dev;
60 vector_no = ctx->vector_no;
61
62 if (dev->msi_enabled) {
63 mode = AAC_INT_MODE_MSI;
64 if (vector_no == 0) {
65 bellbits = src_readl(dev, MUnit.ODR_MSI);
66 if (bellbits & 0x40000)
67 mode |= AAC_INT_MODE_AIF;
68 if (bellbits & 0x1000)
69 mode |= AAC_INT_MODE_SYNC;
70 }
71 } else {
72 mode = AAC_INT_MODE_INTX;
73 bellbits = src_readl(dev, MUnit.ODR_R);
74 if (bellbits & PmDoorBellResponseSent) {
75 bellbits = PmDoorBellResponseSent;
76 src_writel(dev, MUnit.ODR_C, bellbits);
77 src_readl(dev, MUnit.ODR_C);
78 } else {
79 bellbits_shifted = (bellbits >> SRC_ODR_SHIFT);
80 src_writel(dev, MUnit.ODR_C, bellbits);
81 src_readl(dev, MUnit.ODR_C);
82
83 if (bellbits_shifted & DoorBellAifPending)
84 mode |= AAC_INT_MODE_AIF;
85 else if (bellbits_shifted & OUTBOUNDDOORBELL_0)
86 mode |= AAC_INT_MODE_SYNC;
87 }
88 }
89
90 if (mode & AAC_INT_MODE_SYNC) {
91 unsigned long sflags;
92 struct list_head *entry;
93 int send_it = 0;
94 extern int aac_sync_mode;
95
96 if (!aac_sync_mode && !dev->msi_enabled) {
97 src_writel(dev, MUnit.ODR_C, bellbits);
98 src_readl(dev, MUnit.ODR_C);
99 }
100
101 if (dev->sync_fib) {
102 if (dev->sync_fib->callback)
103 dev->sync_fib->callback(dev->sync_fib->callback_data,
104 dev->sync_fib);
105 spin_lock_irqsave(&dev->sync_fib->event_lock, sflags);
106 if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) {
107 dev->management_fib_count--;
108 up(&dev->sync_fib->event_wait);
109 }
110 spin_unlock_irqrestore(&dev->sync_fib->event_lock,
111 sflags);
112 spin_lock_irqsave(&dev->sync_lock, sflags);
113 if (!list_empty(&dev->sync_fib_list)) {
114 entry = dev->sync_fib_list.next;
115 dev->sync_fib = list_entry(entry,
116 struct fib,
117 fiblink);
118 list_del(entry);
119 send_it = 1;
120 } else {
121 dev->sync_fib = NULL;
122 }
123 spin_unlock_irqrestore(&dev->sync_lock, sflags);
124 if (send_it) {
125 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
126 (u32)dev->sync_fib->hw_fib_pa,
127 0, 0, 0, 0, 0,
128 NULL, NULL, NULL, NULL, NULL);
129 }
130 }
131 if (!dev->msi_enabled)
132 mode = 0;
133
134 }
135
136 if (mode & AAC_INT_MODE_AIF) {
137 /* handle AIF */
138 if (dev->sa_firmware) {
139 u32 events = src_readl(dev, MUnit.SCR0);
140
141 aac_intr_normal(dev, events, 1, 0, NULL);
142 writel(events, &dev->IndexRegs->Mailbox[0]);
143 src_writel(dev, MUnit.IDR, 1 << 23);
144 } else {
145 if (dev->aif_thread && dev->fsa_dev)
146 aac_intr_normal(dev, 0, 2, 0, NULL);
147 }
148 if (dev->msi_enabled)
149 aac_src_access_devreg(dev, AAC_CLEAR_AIF_BIT);
150 mode = 0;
151 }
152
153 if (mode) {
154 index = dev->host_rrq_idx[vector_no];
155
156 for (;;) {
157 isFastResponse = 0;
158 /* remove toggle bit (31) */
159 handle = le32_to_cpu((dev->host_rrq[index])
160 & 0x7fffffff);
161 /* check fast response bits (30, 1) */
162 if (handle & 0x40000000)
163 isFastResponse = 1;
164 handle &= 0x0000ffff;
165 if (handle == 0)
166 break;
167 handle >>= 2;
168 if (dev->msi_enabled && dev->max_msix > 1)
169 atomic_dec(&dev->rrq_outstanding[vector_no]);
170 aac_intr_normal(dev, handle, 0, isFastResponse, NULL);
171 dev->host_rrq[index++] = 0;
172 if (index == (vector_no + 1) * dev->vector_cap)
173 index = vector_no * dev->vector_cap;
174 dev->host_rrq_idx[vector_no] = index;
175 }
176 mode = 0;
177 }
178
179 return IRQ_HANDLED;
180 }
181
182 /**
183 * aac_src_disable_interrupt - Disable interrupts
184 * @dev: Adapter
185 */
186
187 static void aac_src_disable_interrupt(struct aac_dev *dev)
188 {
189 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
190 }
191
192 /**
193 * aac_src_enable_interrupt_message - Enable interrupts
194 * @dev: Adapter
195 */
196
197 static void aac_src_enable_interrupt_message(struct aac_dev *dev)
198 {
199 aac_src_access_devreg(dev, AAC_ENABLE_INTERRUPT);
200 }
201
202 /**
203 * src_sync_cmd - send a command and wait
204 * @dev: Adapter
205 * @command: Command to execute
206 * @p1: first parameter
207 * @ret: adapter status
208 *
209 * This routine will send a synchronous command to the adapter and wait
210 * for its completion.
211 */
212
213 static int src_sync_cmd(struct aac_dev *dev, u32 command,
214 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
215 u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
216 {
217 unsigned long start;
218 unsigned long delay;
219 int ok;
220
221 /*
222 * Write the command into Mailbox 0
223 */
224 writel(command, &dev->IndexRegs->Mailbox[0]);
225 /*
226 * Write the parameters into Mailboxes 1 - 6
227 */
228 writel(p1, &dev->IndexRegs->Mailbox[1]);
229 writel(p2, &dev->IndexRegs->Mailbox[2]);
230 writel(p3, &dev->IndexRegs->Mailbox[3]);
231 writel(p4, &dev->IndexRegs->Mailbox[4]);
232
233 /*
234 * Clear the synch command doorbell to start on a clean slate.
235 */
236 if (!dev->msi_enabled)
237 src_writel(dev,
238 MUnit.ODR_C,
239 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
240
241 /*
242 * Disable doorbell interrupts
243 */
244 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
245
246 /*
247 * Force the completion of the mask register write before issuing
248 * the interrupt.
249 */
250 src_readl(dev, MUnit.OIMR);
251
252 /*
253 * Signal that there is a new synch command
254 */
255 src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT);
256
257 if (!dev->sync_mode || command != SEND_SYNCHRONOUS_FIB) {
258 ok = 0;
259 start = jiffies;
260
261 if (command == IOP_RESET_ALWAYS) {
262 /* Wait up to 10 sec */
263 delay = 10*HZ;
264 } else {
265 /* Wait up to 5 minutes */
266 delay = 300*HZ;
267 }
268 while (time_before(jiffies, start+delay)) {
269 udelay(5); /* Delay 5 microseconds to let Mon960 get info. */
270 /*
271 * Mon960 will set doorbell0 bit when it has completed the command.
272 */
273 if (aac_src_get_sync_status(dev) & OUTBOUNDDOORBELL_0) {
274 /*
275 * Clear the doorbell.
276 */
277 if (dev->msi_enabled)
278 aac_src_access_devreg(dev,
279 AAC_CLEAR_SYNC_BIT);
280 else
281 src_writel(dev,
282 MUnit.ODR_C,
283 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
284 ok = 1;
285 break;
286 }
287 /*
288 * Yield the processor in case we are slow
289 */
290 msleep(1);
291 }
292 if (unlikely(ok != 1)) {
293 /*
294 * Restore interrupt mask even though we timed out
295 */
296 aac_adapter_enable_int(dev);
297 return -ETIMEDOUT;
298 }
299 /*
300 * Pull the synch status from Mailbox 0.
301 */
302 if (status)
303 *status = readl(&dev->IndexRegs->Mailbox[0]);
304 if (r1)
305 *r1 = readl(&dev->IndexRegs->Mailbox[1]);
306 if (r2)
307 *r2 = readl(&dev->IndexRegs->Mailbox[2]);
308 if (r3)
309 *r3 = readl(&dev->IndexRegs->Mailbox[3]);
310 if (r4)
311 *r4 = readl(&dev->IndexRegs->Mailbox[4]);
312 if (command == GET_COMM_PREFERRED_SETTINGS)
313 dev->max_msix =
314 readl(&dev->IndexRegs->Mailbox[5]) & 0xFFFF;
315 /*
316 * Clear the synch command doorbell.
317 */
318 if (!dev->msi_enabled)
319 src_writel(dev,
320 MUnit.ODR_C,
321 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
322 }
323
324 /*
325 * Restore interrupt mask
326 */
327 aac_adapter_enable_int(dev);
328 return 0;
329 }
330
331 /**
332 * aac_src_interrupt_adapter - interrupt adapter
333 * @dev: Adapter
334 *
335 * Send an interrupt to the i960 and breakpoint it.
336 */
337
338 static void aac_src_interrupt_adapter(struct aac_dev *dev)
339 {
340 src_sync_cmd(dev, BREAKPOINT_REQUEST,
341 0, 0, 0, 0, 0, 0,
342 NULL, NULL, NULL, NULL, NULL);
343 }
344
345 /**
346 * aac_src_notify_adapter - send an event to the adapter
347 * @dev: Adapter
348 * @event: Event to send
349 *
350 * Notify the i960 that something it probably cares about has
351 * happened.
352 */
353
354 static void aac_src_notify_adapter(struct aac_dev *dev, u32 event)
355 {
356 switch (event) {
357
358 case AdapNormCmdQue:
359 src_writel(dev, MUnit.ODR_C,
360 INBOUNDDOORBELL_1 << SRC_ODR_SHIFT);
361 break;
362 case HostNormRespNotFull:
363 src_writel(dev, MUnit.ODR_C,
364 INBOUNDDOORBELL_4 << SRC_ODR_SHIFT);
365 break;
366 case AdapNormRespQue:
367 src_writel(dev, MUnit.ODR_C,
368 INBOUNDDOORBELL_2 << SRC_ODR_SHIFT);
369 break;
370 case HostNormCmdNotFull:
371 src_writel(dev, MUnit.ODR_C,
372 INBOUNDDOORBELL_3 << SRC_ODR_SHIFT);
373 break;
374 case FastIo:
375 src_writel(dev, MUnit.ODR_C,
376 INBOUNDDOORBELL_6 << SRC_ODR_SHIFT);
377 break;
378 case AdapPrintfDone:
379 src_writel(dev, MUnit.ODR_C,
380 INBOUNDDOORBELL_5 << SRC_ODR_SHIFT);
381 break;
382 default:
383 BUG();
384 break;
385 }
386 }
387
388 /**
389 * aac_src_start_adapter - activate adapter
390 * @dev: Adapter
391 *
392 * Start up processing on an i960 based AAC adapter
393 */
394
395 static void aac_src_start_adapter(struct aac_dev *dev)
396 {
397 union aac_init *init;
398 int i;
399
400 /* reset host_rrq_idx first */
401 for (i = 0; i < dev->max_msix; i++) {
402 dev->host_rrq_idx[i] = i * dev->vector_cap;
403 atomic_set(&dev->rrq_outstanding[i], 0);
404 }
405 atomic_set(&dev->msix_counter, 0);
406 dev->fibs_pushed_no = 0;
407
408 init = dev->init;
409 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) {
410 init->r8.host_elapsed_seconds = cpu_to_le32(get_seconds());
411 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS,
412 (u32)(ulong)dev->init_pa,
413 (u32)((ulong)dev->init_pa>>32),
414 sizeof(struct _r8) +
415 (AAC_MAX_HRRQ - 1) * sizeof(struct _rrq),
416 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
417 } else {
418 init->r7.host_elapsed_seconds = cpu_to_le32(get_seconds());
419 // We can only use a 32 bit address here
420 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS,
421 (u32)(ulong)dev->init_pa, 0, 0, 0, 0, 0,
422 NULL, NULL, NULL, NULL, NULL);
423 }
424
425 }
426
427 /**
428 * aac_src_check_health
429 * @dev: device to check if healthy
430 *
431 * Will attempt to determine if the specified adapter is alive and
432 * capable of handling requests, returning 0 if alive.
433 */
434 static int aac_src_check_health(struct aac_dev *dev)
435 {
436 u32 status = src_readl(dev, MUnit.OMR);
437
438 /*
439 * Check to see if the board failed any self tests.
440 */
441 if (unlikely(status & SELF_TEST_FAILED))
442 return -1;
443
444 /*
445 * Check to see if the board panic'd.
446 */
447 if (unlikely(status & KERNEL_PANIC))
448 return (status >> 16) & 0xFF;
449 /*
450 * Wait for the adapter to be up and running.
451 */
452 if (unlikely(!(status & KERNEL_UP_AND_RUNNING)))
453 return -3;
454 /*
455 * Everything is OK
456 */
457 return 0;
458 }
459
460 /**
461 * aac_src_deliver_message
462 * @fib: fib to issue
463 *
464 * Will send a fib, returning 0 if successful.
465 */
466 static int aac_src_deliver_message(struct fib *fib)
467 {
468 struct aac_dev *dev = fib->dev;
469 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
470 u32 fibsize;
471 dma_addr_t address;
472 struct aac_fib_xporthdr *pFibX;
473 #if !defined(writeq)
474 unsigned long flags;
475 #endif
476
477 u16 hdr_size = le16_to_cpu(fib->hw_fib_va->header.Size);
478 u16 vector_no;
479
480 atomic_inc(&q->numpending);
481
482 if (dev->msi_enabled && fib->hw_fib_va->header.Command != AifRequest &&
483 dev->max_msix > 1) {
484 vector_no = fib->vector_no;
485 fib->hw_fib_va->header.Handle += (vector_no << 16);
486 } else {
487 vector_no = 0;
488 }
489
490 atomic_inc(&dev->rrq_outstanding[vector_no]);
491
492 if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) ||
493 (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3)) {
494 /* Calculate the amount to the fibsize bits */
495 fibsize = (hdr_size + 127) / 128 - 1;
496 if (fibsize > (ALIGN32 - 1))
497 return -EMSGSIZE;
498 /* New FIB header, 32-bit */
499 address = fib->hw_fib_pa;
500 fib->hw_fib_va->header.StructType = FIB_MAGIC2;
501 fib->hw_fib_va->header.SenderFibAddress = (u32)address;
502 fib->hw_fib_va->header.u.TimeStamp = 0;
503 BUG_ON(upper_32_bits(address) != 0L);
504 address |= fibsize;
505 } else {
506 /* Calculate the amount to the fibsize bits */
507 fibsize = (sizeof(struct aac_fib_xporthdr) + hdr_size + 127) / 128 - 1;
508 if (fibsize > (ALIGN32 - 1))
509 return -EMSGSIZE;
510
511 /* Fill XPORT header */
512 pFibX = (void *)fib->hw_fib_va - sizeof(struct aac_fib_xporthdr);
513 pFibX->Handle = cpu_to_le32(fib->hw_fib_va->header.Handle);
514 pFibX->HostAddress = cpu_to_le64(fib->hw_fib_pa);
515 pFibX->Size = cpu_to_le32(hdr_size);
516
517 /*
518 * The xport header has been 32-byte aligned for us so that fibsize
519 * can be masked out of this address by hardware. -- BenC
520 */
521 address = fib->hw_fib_pa - sizeof(struct aac_fib_xporthdr);
522 if (address & (ALIGN32 - 1))
523 return -EINVAL;
524 address |= fibsize;
525 }
526 #if defined(writeq)
527 src_writeq(dev, MUnit.IQ_L, (u64)address);
528 #else
529 spin_lock_irqsave(&fib->dev->iq_lock, flags);
530 src_writel(dev, MUnit.IQ_H, upper_32_bits(address) & 0xffffffff);
531 src_writel(dev, MUnit.IQ_L, address & 0xffffffff);
532 spin_unlock_irqrestore(&fib->dev->iq_lock, flags);
533 #endif
534 return 0;
535 }
536
537 /**
538 * aac_src_ioremap
539 * @size: mapping resize request
540 *
541 */
542 static int aac_src_ioremap(struct aac_dev *dev, u32 size)
543 {
544 if (!size) {
545 iounmap(dev->regs.src.bar1);
546 dev->regs.src.bar1 = NULL;
547 iounmap(dev->regs.src.bar0);
548 dev->base = dev->regs.src.bar0 = NULL;
549 return 0;
550 }
551 dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2),
552 AAC_MIN_SRC_BAR1_SIZE);
553 dev->base = NULL;
554 if (dev->regs.src.bar1 == NULL)
555 return -1;
556 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
557 if (dev->base == NULL) {
558 iounmap(dev->regs.src.bar1);
559 dev->regs.src.bar1 = NULL;
560 return -1;
561 }
562 dev->IndexRegs = &((struct src_registers __iomem *)
563 dev->base)->u.tupelo.IndexRegs;
564 return 0;
565 }
566
567 /**
568 * aac_srcv_ioremap
569 * @size: mapping resize request
570 *
571 */
572 static int aac_srcv_ioremap(struct aac_dev *dev, u32 size)
573 {
574 if (!size) {
575 iounmap(dev->regs.src.bar0);
576 dev->base = dev->regs.src.bar0 = NULL;
577 return 0;
578 }
579
580 dev->regs.src.bar1 =
581 ioremap(pci_resource_start(dev->pdev, 2), AAC_MIN_SRCV_BAR1_SIZE);
582 dev->base = NULL;
583 if (dev->regs.src.bar1 == NULL)
584 return -1;
585 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
586 if (dev->base == NULL) {
587 iounmap(dev->regs.src.bar1);
588 dev->regs.src.bar1 = NULL;
589 return -1;
590 }
591 dev->IndexRegs = &((struct src_registers __iomem *)
592 dev->base)->u.denali.IndexRegs;
593 return 0;
594 }
595
596 static int aac_src_restart_adapter(struct aac_dev *dev, int bled)
597 {
598 u32 var, reset_mask;
599
600 if (bled >= 0) {
601 if (bled)
602 printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n",
603 dev->name, dev->id, bled);
604 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
605 bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS,
606 0, 0, 0, 0, 0, 0, &var, &reset_mask, NULL, NULL, NULL);
607 if ((bled || (var != 0x00000001)) &&
608 !dev->doorbell_mask)
609 return -EINVAL;
610 else if (dev->doorbell_mask) {
611 reset_mask = dev->doorbell_mask;
612 bled = 0;
613 var = 0x00000001;
614 }
615
616 if ((dev->pdev->device == PMC_DEVICE_S7 ||
617 dev->pdev->device == PMC_DEVICE_S8 ||
618 dev->pdev->device == PMC_DEVICE_S9) && dev->msi_enabled) {
619 aac_src_access_devreg(dev, AAC_ENABLE_INTX);
620 dev->msi_enabled = 0;
621 msleep(5000); /* Delay 5 seconds */
622 }
623
624 if (!bled && (dev->supplement_adapter_info.SupportedOptions2 &
625 AAC_OPTION_DOORBELL_RESET)) {
626 src_writel(dev, MUnit.IDR, reset_mask);
627 ssleep(45);
628 } else {
629 src_writel(dev, MUnit.IDR, 0x100);
630 ssleep(45);
631 }
632 }
633
634 if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC)
635 return -ENODEV;
636
637 if (startup_timeout < 300)
638 startup_timeout = 300;
639
640 return 0;
641 }
642
643 /**
644 * aac_src_select_comm - Select communications method
645 * @dev: Adapter
646 * @comm: communications method
647 */
648 static int aac_src_select_comm(struct aac_dev *dev, int comm)
649 {
650 switch (comm) {
651 case AAC_COMM_MESSAGE:
652 dev->a_ops.adapter_intr = aac_src_intr_message;
653 dev->a_ops.adapter_deliver = aac_src_deliver_message;
654 break;
655 default:
656 return 1;
657 }
658 return 0;
659 }
660
661 /**
662 * aac_src_init - initialize an Cardinal Frey Bar card
663 * @dev: device to configure
664 *
665 */
666
667 int aac_src_init(struct aac_dev *dev)
668 {
669 unsigned long start;
670 unsigned long status;
671 int restart = 0;
672 int instance = dev->id;
673 const char *name = dev->name;
674
675 dev->a_ops.adapter_ioremap = aac_src_ioremap;
676 dev->a_ops.adapter_comm = aac_src_select_comm;
677
678 dev->base_size = AAC_MIN_SRC_BAR0_SIZE;
679 if (aac_adapter_ioremap(dev, dev->base_size)) {
680 printk(KERN_WARNING "%s: unable to map adapter.\n", name);
681 goto error_iounmap;
682 }
683
684 /* Failure to reset here is an option ... */
685 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
686 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
687 if ((aac_reset_devices || reset_devices) &&
688 !aac_src_restart_adapter(dev, 0))
689 ++restart;
690 /*
691 * Check to see if the board panic'd while booting.
692 */
693 status = src_readl(dev, MUnit.OMR);
694 if (status & KERNEL_PANIC) {
695 if (aac_src_restart_adapter(dev, aac_src_check_health(dev)))
696 goto error_iounmap;
697 ++restart;
698 }
699 /*
700 * Check to see if the board failed any self tests.
701 */
702 status = src_readl(dev, MUnit.OMR);
703 if (status & SELF_TEST_FAILED) {
704 printk(KERN_ERR "%s%d: adapter self-test failed.\n",
705 dev->name, instance);
706 goto error_iounmap;
707 }
708 /*
709 * Check to see if the monitor panic'd while booting.
710 */
711 if (status & MONITOR_PANIC) {
712 printk(KERN_ERR "%s%d: adapter monitor panic.\n",
713 dev->name, instance);
714 goto error_iounmap;
715 }
716 start = jiffies;
717 /*
718 * Wait for the adapter to be up and running. Wait up to 3 minutes
719 */
720 while (!((status = src_readl(dev, MUnit.OMR)) &
721 KERNEL_UP_AND_RUNNING)) {
722 if ((restart &&
723 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
724 time_after(jiffies, start+HZ*startup_timeout)) {
725 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
726 dev->name, instance, status);
727 goto error_iounmap;
728 }
729 if (!restart &&
730 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
731 time_after(jiffies, start + HZ *
732 ((startup_timeout > 60)
733 ? (startup_timeout - 60)
734 : (startup_timeout / 2))))) {
735 if (likely(!aac_src_restart_adapter(dev,
736 aac_src_check_health(dev))))
737 start = jiffies;
738 ++restart;
739 }
740 msleep(1);
741 }
742 if (restart && aac_commit)
743 aac_commit = 1;
744 /*
745 * Fill in the common function dispatch table.
746 */
747 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
748 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
749 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
750 dev->a_ops.adapter_notify = aac_src_notify_adapter;
751 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
752 dev->a_ops.adapter_check_health = aac_src_check_health;
753 dev->a_ops.adapter_restart = aac_src_restart_adapter;
754 dev->a_ops.adapter_start = aac_src_start_adapter;
755
756 /*
757 * First clear out all interrupts. Then enable the one's that we
758 * can handle.
759 */
760 aac_adapter_comm(dev, AAC_COMM_MESSAGE);
761 aac_adapter_disable_int(dev);
762 src_writel(dev, MUnit.ODR_C, 0xffffffff);
763 aac_adapter_enable_int(dev);
764
765 if (aac_init_adapter(dev) == NULL)
766 goto error_iounmap;
767 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1)
768 goto error_iounmap;
769
770 dev->msi = !pci_enable_msi(dev->pdev);
771
772 dev->aac_msix[0].vector_no = 0;
773 dev->aac_msix[0].dev = dev;
774
775 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
776 IRQF_SHARED, "aacraid", &(dev->aac_msix[0])) < 0) {
777
778 if (dev->msi)
779 pci_disable_msi(dev->pdev);
780
781 printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
782 name, instance);
783 goto error_iounmap;
784 }
785 dev->dbg_base = pci_resource_start(dev->pdev, 2);
786 dev->dbg_base_mapped = dev->regs.src.bar1;
787 dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE;
788 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
789
790 aac_adapter_enable_int(dev);
791
792 if (!dev->sync_mode) {
793 /*
794 * Tell the adapter that all is configured, and it can
795 * start accepting requests
796 */
797 aac_src_start_adapter(dev);
798 }
799 return 0;
800
801 error_iounmap:
802
803 return -1;
804 }
805
806 /**
807 * aac_srcv_init - initialize an SRCv card
808 * @dev: device to configure
809 *
810 */
811
812 int aac_srcv_init(struct aac_dev *dev)
813 {
814 unsigned long start;
815 unsigned long status;
816 int restart = 0;
817 int instance = dev->id;
818 const char *name = dev->name;
819
820 dev->a_ops.adapter_ioremap = aac_srcv_ioremap;
821 dev->a_ops.adapter_comm = aac_src_select_comm;
822
823 dev->base_size = AAC_MIN_SRCV_BAR0_SIZE;
824 if (aac_adapter_ioremap(dev, dev->base_size)) {
825 printk(KERN_WARNING "%s: unable to map adapter.\n", name);
826 goto error_iounmap;
827 }
828
829 /* Failure to reset here is an option ... */
830 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
831 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
832 if ((aac_reset_devices || reset_devices) &&
833 !aac_src_restart_adapter(dev, 0))
834 ++restart;
835 /*
836 * Check to see if flash update is running.
837 * Wait for the adapter to be up and running. Wait up to 5 minutes
838 */
839 status = src_readl(dev, MUnit.OMR);
840 if (status & FLASH_UPD_PENDING) {
841 start = jiffies;
842 do {
843 status = src_readl(dev, MUnit.OMR);
844 if (time_after(jiffies, start+HZ*FWUPD_TIMEOUT)) {
845 printk(KERN_ERR "%s%d: adapter flash update failed.\n",
846 dev->name, instance);
847 goto error_iounmap;
848 }
849 } while (!(status & FLASH_UPD_SUCCESS) &&
850 !(status & FLASH_UPD_FAILED));
851 /* Delay 10 seconds.
852 * Because right now FW is doing a soft reset,
853 * do not read scratch pad register at this time
854 */
855 ssleep(10);
856 }
857 /*
858 * Check to see if the board panic'd while booting.
859 */
860 status = src_readl(dev, MUnit.OMR);
861 if (status & KERNEL_PANIC) {
862 if (aac_src_restart_adapter(dev, aac_src_check_health(dev)))
863 goto error_iounmap;
864 ++restart;
865 }
866 /*
867 * Check to see if the board failed any self tests.
868 */
869 status = src_readl(dev, MUnit.OMR);
870 if (status & SELF_TEST_FAILED) {
871 printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
872 goto error_iounmap;
873 }
874 /*
875 * Check to see if the monitor panic'd while booting.
876 */
877 if (status & MONITOR_PANIC) {
878 printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
879 goto error_iounmap;
880 }
881 start = jiffies;
882 /*
883 * Wait for the adapter to be up and running. Wait up to 3 minutes
884 */
885 while (!((status = src_readl(dev, MUnit.OMR)) &
886 KERNEL_UP_AND_RUNNING) ||
887 status == 0xffffffff) {
888 if ((restart &&
889 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
890 time_after(jiffies, start+HZ*startup_timeout)) {
891 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
892 dev->name, instance, status);
893 goto error_iounmap;
894 }
895 if (!restart &&
896 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
897 time_after(jiffies, start + HZ *
898 ((startup_timeout > 60)
899 ? (startup_timeout - 60)
900 : (startup_timeout / 2))))) {
901 if (likely(!aac_src_restart_adapter(dev, aac_src_check_health(dev))))
902 start = jiffies;
903 ++restart;
904 }
905 msleep(1);
906 }
907 if (restart && aac_commit)
908 aac_commit = 1;
909 /*
910 * Fill in the common function dispatch table.
911 */
912 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
913 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
914 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
915 dev->a_ops.adapter_notify = aac_src_notify_adapter;
916 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
917 dev->a_ops.adapter_check_health = aac_src_check_health;
918 dev->a_ops.adapter_restart = aac_src_restart_adapter;
919 dev->a_ops.adapter_start = aac_src_start_adapter;
920
921 /*
922 * First clear out all interrupts. Then enable the one's that we
923 * can handle.
924 */
925 aac_adapter_comm(dev, AAC_COMM_MESSAGE);
926 aac_adapter_disable_int(dev);
927 src_writel(dev, MUnit.ODR_C, 0xffffffff);
928 aac_adapter_enable_int(dev);
929
930 if (aac_init_adapter(dev) == NULL)
931 goto error_iounmap;
932 if ((dev->comm_interface != AAC_COMM_MESSAGE_TYPE2) &&
933 (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3))
934 goto error_iounmap;
935 if (dev->msi_enabled)
936 aac_src_access_devreg(dev, AAC_ENABLE_MSIX);
937
938 if (aac_acquire_irq(dev))
939 goto error_iounmap;
940
941 dev->dbg_base = pci_resource_start(dev->pdev, 2);
942 dev->dbg_base_mapped = dev->regs.src.bar1;
943 dev->dbg_size = AAC_MIN_SRCV_BAR1_SIZE;
944 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
945
946 aac_adapter_enable_int(dev);
947
948 if (!dev->sync_mode) {
949 /*
950 * Tell the adapter that all is configured, and it can
951 * start accepting requests
952 */
953 aac_src_start_adapter(dev);
954 }
955 return 0;
956
957 error_iounmap:
958
959 return -1;
960 }
961
962 void aac_src_access_devreg(struct aac_dev *dev, int mode)
963 {
964 u_int32_t val;
965
966 switch (mode) {
967 case AAC_ENABLE_INTERRUPT:
968 src_writel(dev,
969 MUnit.OIMR,
970 dev->OIMR = (dev->msi_enabled ?
971 AAC_INT_ENABLE_TYPE1_MSIX :
972 AAC_INT_ENABLE_TYPE1_INTX));
973 break;
974
975 case AAC_DISABLE_INTERRUPT:
976 src_writel(dev,
977 MUnit.OIMR,
978 dev->OIMR = AAC_INT_DISABLE_ALL);
979 break;
980
981 case AAC_ENABLE_MSIX:
982 /* set bit 6 */
983 val = src_readl(dev, MUnit.IDR);
984 val |= 0x40;
985 src_writel(dev, MUnit.IDR, val);
986 src_readl(dev, MUnit.IDR);
987 /* unmask int. */
988 val = PMC_ALL_INTERRUPT_BITS;
989 src_writel(dev, MUnit.IOAR, val);
990 val = src_readl(dev, MUnit.OIMR);
991 src_writel(dev,
992 MUnit.OIMR,
993 val & (~(PMC_GLOBAL_INT_BIT2 | PMC_GLOBAL_INT_BIT0)));
994 break;
995
996 case AAC_DISABLE_MSIX:
997 /* reset bit 6 */
998 val = src_readl(dev, MUnit.IDR);
999 val &= ~0x40;
1000 src_writel(dev, MUnit.IDR, val);
1001 src_readl(dev, MUnit.IDR);
1002 break;
1003
1004 case AAC_CLEAR_AIF_BIT:
1005 /* set bit 5 */
1006 val = src_readl(dev, MUnit.IDR);
1007 val |= 0x20;
1008 src_writel(dev, MUnit.IDR, val);
1009 src_readl(dev, MUnit.IDR);
1010 break;
1011
1012 case AAC_CLEAR_SYNC_BIT:
1013 /* set bit 4 */
1014 val = src_readl(dev, MUnit.IDR);
1015 val |= 0x10;
1016 src_writel(dev, MUnit.IDR, val);
1017 src_readl(dev, MUnit.IDR);
1018 break;
1019
1020 case AAC_ENABLE_INTX:
1021 /* set bit 7 */
1022 val = src_readl(dev, MUnit.IDR);
1023 val |= 0x80;
1024 src_writel(dev, MUnit.IDR, val);
1025 src_readl(dev, MUnit.IDR);
1026 /* unmask int. */
1027 val = PMC_ALL_INTERRUPT_BITS;
1028 src_writel(dev, MUnit.IOAR, val);
1029 src_readl(dev, MUnit.IOAR);
1030 val = src_readl(dev, MUnit.OIMR);
1031 src_writel(dev, MUnit.OIMR,
1032 val & (~(PMC_GLOBAL_INT_BIT2)));
1033 break;
1034
1035 default:
1036 break;
1037 }
1038 }
1039
1040 static int aac_src_get_sync_status(struct aac_dev *dev)
1041 {
1042
1043 int val;
1044
1045 if (dev->msi_enabled)
1046 val = src_readl(dev, MUnit.ODR_MSI) & 0x1000 ? 1 : 0;
1047 else
1048 val = src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT;
1049
1050 return val;
1051 }
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