1 #define ASC_VERSION "3.4" /* AdvanSys Driver Version */
4 * advansys.c - Linux Host Driver for AdvanSys SCSI Adapters
6 * Copyright (c) 1995-2000 Advanced System Products, Inc.
7 * Copyright (c) 2000-2001 ConnectCom Solutions, Inc.
8 * Copyright (c) 2007 Matthew Wilcox <matthew@wil.cx>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
18 * As of March 8, 2000 Advanced System Products, Inc. (AdvanSys)
19 * changed its name to ConnectCom Solutions, Inc.
20 * On June 18, 2001 Initio Corp. acquired ConnectCom's SCSI assets
25 Documentation for the AdvanSys Driver
27 A. Linux Kernels Supported by this Driver
28 B. Adapters Supported by this Driver
29 C. Linux source files modified by AdvanSys Driver
31 E. Driver Compile Time Options and Debugging
33 G. Tests to run before releasing new driver
35 I. Known Problems/Fix List
36 J. Credits (Chronological Order)
38 A. Linux Kernels Supported by this Driver
40 This driver has been tested in the following Linux kernels: v2.2.18
41 v2.4.0. The driver is supported on v2.2 and v2.4 kernels and on x86,
42 alpha, and PowerPC platforms.
44 B. Adapters Supported by this Driver
46 AdvanSys (Advanced System Products, Inc.) manufactures the following
47 RISC-based, Bus-Mastering, Fast (10 Mhz) and Ultra (20 Mhz) Narrow
48 (8-bit transfer) SCSI Host Adapters for the ISA, EISA, VL, and PCI
49 buses and RISC-based, Bus-Mastering, Ultra (20 Mhz) Wide (16-bit
50 transfer) SCSI Host Adapters for the PCI bus.
52 The CDB counts below indicate the number of SCSI CDB (Command
53 Descriptor Block) requests that can be stored in the RISC chip
54 cache and board LRAM. A CDB is a single SCSI command. The driver
55 detect routine will display the number of CDBs available for each
56 adapter detected. The number of CDBs used by the driver can be
57 lowered in the BIOS by changing the 'Host Queue Size' adapter setting.
60 ABP-480 - Bus-Master CardBus (16 CDB) (2.4 kernel and greater)
62 Connectivity Products:
63 ABP510/5150 - Bus-Master ISA (240 CDB)
64 ABP5140 - Bus-Master ISA PnP (16 CDB)
65 ABP5142 - Bus-Master ISA PnP with floppy (16 CDB)
66 ABP902/3902 - Bus-Master PCI (16 CDB)
67 ABP3905 - Bus-Master PCI (16 CDB)
68 ABP915 - Bus-Master PCI (16 CDB)
69 ABP920 - Bus-Master PCI (16 CDB)
70 ABP3922 - Bus-Master PCI (16 CDB)
71 ABP3925 - Bus-Master PCI (16 CDB)
72 ABP930 - Bus-Master PCI (16 CDB)
73 ABP930U - Bus-Master PCI Ultra (16 CDB)
74 ABP930UA - Bus-Master PCI Ultra (16 CDB)
75 ABP960 - Bus-Master PCI MAC/PC (16 CDB)
76 ABP960U - Bus-Master PCI MAC/PC Ultra (16 CDB)
78 Single Channel Products:
79 ABP542 - Bus-Master ISA with floppy (240 CDB)
80 ABP742 - Bus-Master EISA (240 CDB)
81 ABP842 - Bus-Master VL (240 CDB)
82 ABP940 - Bus-Master PCI (240 CDB)
83 ABP940U - Bus-Master PCI Ultra (240 CDB)
84 ABP940UA/3940UA - Bus-Master PCI Ultra (240 CDB)
85 ABP970 - Bus-Master PCI MAC/PC (240 CDB)
86 ABP970U - Bus-Master PCI MAC/PC Ultra (240 CDB)
87 ABP3960UA - Bus-Master PCI MAC/PC Ultra (240 CDB)
88 ABP940UW/3940UW - Bus-Master PCI Ultra-Wide (253 CDB)
89 ABP970UW - Bus-Master PCI MAC/PC Ultra-Wide (253 CDB)
90 ABP3940U2W - Bus-Master PCI LVD/Ultra2-Wide (253 CDB)
92 Multi-Channel Products:
93 ABP752 - Dual Channel Bus-Master EISA (240 CDB Per Channel)
94 ABP852 - Dual Channel Bus-Master VL (240 CDB Per Channel)
95 ABP950 - Dual Channel Bus-Master PCI (240 CDB Per Channel)
96 ABP950UW - Dual Channel Bus-Master PCI Ultra-Wide (253 CDB Per Channel)
97 ABP980 - Four Channel Bus-Master PCI (240 CDB Per Channel)
98 ABP980U - Four Channel Bus-Master PCI Ultra (240 CDB Per Channel)
99 ABP980UA/3980UA - Four Channel Bus-Master PCI Ultra (16 CDB Per Chan.)
100 ABP3950U2W - Bus-Master PCI LVD/Ultra2-Wide and Ultra-Wide (253 CDB)
101 ABP3950U3W - Bus-Master PCI Dual LVD2/Ultra3-Wide (253 CDB)
103 C. Linux source files modified by AdvanSys Driver
105 This section for historical purposes documents the changes
106 originally made to the Linux kernel source to add the advansys
107 driver. As Linux has changed some of these files have also
110 1. linux/arch/i386/config.in:
112 bool 'AdvanSys SCSI support' CONFIG_SCSI_ADVANSYS y
114 2. linux/drivers/scsi/hosts.c:
116 #ifdef CONFIG_SCSI_ADVANSYS
117 #include "advansys.h"
120 and after "static struct scsi_host_template builtin_scsi_hosts[] =":
122 #ifdef CONFIG_SCSI_ADVANSYS
126 3. linux/drivers/scsi/Makefile:
128 ifdef CONFIG_SCSI_ADVANSYS
129 SCSI_SRCS := $(SCSI_SRCS) advansys.c
130 SCSI_OBJS := $(SCSI_OBJS) advansys.o
132 SCSI_MODULE_OBJS := $(SCSI_MODULE_OBJS) advansys.o
135 4. linux/init/main.c:
137 extern void advansys_setup(char *str, int *ints);
139 and add the following lines to the bootsetups[] array.
141 #ifdef CONFIG_SCSI_ADVANSYS
142 { "advansys=", advansys_setup },
147 1. Use tab stops set to 4 for the source files. For vi use 'se tabstops=4'.
149 2. This driver should be maintained in multiple files. But to make
150 it easier to include with Linux and to follow Linux conventions,
151 the whole driver is maintained in the source files advansys.h and
152 advansys.c. In this file logical sections of the driver begin with
153 a comment that contains '---'. The following are the logical sections
157 --- Linux Include File
160 --- Asc Library Constants and Macros
161 --- Adv Library Constants and Macros
162 --- Driver Constants and Macros
163 --- Driver Structures
165 --- Driver Function Prototypes
166 --- Linux 'struct scsi_host_template' and advansys_setup() Functions
167 --- Loadable Driver Support
168 --- Miscellaneous Driver Functions
169 --- Functions Required by the Asc Library
170 --- Functions Required by the Adv Library
171 --- Tracing and Debugging Functions
172 --- Asc Library Functions
173 --- Adv Library Functions
175 3. The string 'XXX' is used to flag code that needs to be re-written
176 or that contains a problem that needs to be addressed.
178 4. I have stripped comments from and reformatted the source for the
179 Asc Library and Adv Library to reduce the size of this file. This
180 source can be found under the following headings. The Asc Library
181 is used to support Narrow Boards. The Adv Library is used to
184 --- Asc Library Constants and Macros
185 --- Adv Library Constants and Macros
186 --- Asc Library Functions
187 --- Adv Library Functions
189 E. Driver Compile Time Options and Debugging
191 In this source file the following constants can be defined. They are
192 defined in the source below. Both of these options are enabled by
195 1. ADVANSYS_ASSERT - Enable driver assertions (Def: Enabled)
197 Enabling this option adds assertion logic statements to the
198 driver. If an assertion fails a message will be displayed to
199 the console, but the system will continue to operate. Any
200 assertions encountered should be reported to the person
201 responsible for the driver. Assertion statements may proactively
202 detect problems with the driver and facilitate fixing these
203 problems. Enabling assertions will add a small overhead to the
204 execution of the driver.
206 2. ADVANSYS_DEBUG - Enable driver debugging (Def: Disabled)
208 Enabling this option adds tracing functions to the driver and
209 the ability to set a driver tracing level at boot time. This
210 option will also export symbols not required outside the driver to
211 the kernel name space. This option is very useful for debugging
212 the driver, but it will add to the size of the driver execution
213 image and add overhead to the execution of the driver.
215 The amount of debugging output can be controlled with the global
216 variable 'asc_dbglvl'. The higher the number the more output. By
217 default the debug level is 0.
219 If the driver is loaded at boot time and the LILO Driver Option
220 is included in the system, the debug level can be changed by
221 specifying a 5th (ASC_NUM_IOPORT_PROBE + 1) I/O Port. The
222 first three hex digits of the pseudo I/O Port must be set to
223 'deb' and the fourth hex digit specifies the debug level: 0 - F.
224 The following command line will look for an adapter at 0x330
225 and set the debug level to 2.
227 linux advansys=0x330,0,0,0,0xdeb2
229 If the driver is built as a loadable module this variable can be
230 defined when the driver is loaded. The following insmod command
231 will set the debug level to one.
233 insmod advansys.o asc_dbglvl=1
235 Debugging Message Levels:
237 1: High-Level Tracing
240 To enable debug output to console, please make sure that:
242 a. System and kernel logging is enabled (syslogd, klogd running).
243 b. Kernel messages are routed to console output. Check
244 /etc/syslog.conf for an entry similar to this:
248 c. klogd is started with the appropriate -c parameter
251 This will cause printk() messages to be be displayed on the
252 current console. Refer to the klogd(8) and syslogd(8) man pages
255 Alternatively you can enable printk() to console with this
256 program. However, this is not the 'official' way to do this.
257 Debug output is logged in /var/log/messages.
261 syscall(103, 7, 0, 0);
264 Increasing LOG_BUF_LEN in kernel/printk.c to something like
265 40960 allows more debug messages to be buffered in the kernel
266 and written to the console or log file.
268 3. ADVANSYS_STATS - Enable statistics (Def: Enabled >= v1.3.0)
270 Enabling this option adds statistics collection and display
271 through /proc to the driver. The information is useful for
272 monitoring driver and device performance. It will add to the
273 size of the driver execution image and add minor overhead to
274 the execution of the driver.
276 Statistics are maintained on a per adapter basis. Driver entry
277 point call counts and transfer size counts are maintained.
278 Statistics are only available for kernels greater than or equal
279 to v1.3.0 with the CONFIG_PROC_FS (/proc) file system configured.
281 AdvanSys SCSI adapter files have the following path name format:
283 /proc/scsi/advansys/[0-(ASC_NUM_BOARD_SUPPORTED-1)]
285 This information can be displayed with cat. For example:
287 cat /proc/scsi/advansys/0
289 When ADVANSYS_STATS is not defined the AdvanSys /proc files only
290 contain adapter and device configuration information.
292 F. Driver LILO Option
294 If init/main.c is modified as described in the 'Directions for Adding
295 the AdvanSys Driver to Linux' section (B.4.) above, the driver will
296 recognize the 'advansys' LILO command line and /etc/lilo.conf option.
297 This option can be used to either disable I/O port scanning or to limit
298 scanning to 1 - 4 I/O ports. Regardless of the option setting EISA and
299 PCI boards will still be searched for and detected. This option only
300 affects searching for ISA and VL boards.
303 1. Eliminate I/O port scanning:
304 boot: linux advansys=
306 boot: linux advansys=0x0
307 2. Limit I/O port scanning to one I/O port:
308 boot: linux advansys=0x110
309 3. Limit I/O port scanning to four I/O ports:
310 boot: linux advansys=0x110,0x210,0x230,0x330
312 For a loadable module the same effect can be achieved by setting
313 the 'asc_iopflag' variable and 'asc_ioport' array when loading
316 insmod advansys.o asc_iopflag=1 asc_ioport=0x110,0x330
318 If ADVANSYS_DEBUG is defined a 5th (ASC_NUM_IOPORT_PROBE + 1)
319 I/O Port may be added to specify the driver debug level. Refer to
320 the 'Driver Compile Time Options and Debugging' section above for
323 G. Tests to run before releasing new driver
325 1. In the supported kernels verify there are no warning or compile
326 errors when the kernel is built as both a driver and as a module
327 and with the following options:
329 ADVANSYS_DEBUG - enabled and disabled
330 CONFIG_SMP - enabled and disabled
331 CONFIG_PROC_FS - enabled and disabled
333 2. Run tests on an x86, alpha, and PowerPC with at least one narrow
334 card and one wide card attached to a hard disk and CD-ROM drive:
335 fdisk, mkfs, fsck, bonnie, copy/compare test from the
336 CD-ROM to the hard drive.
344 1. Prevent advansys_detect() from being called twice.
345 2. Add LILO 0xdeb[0-f] option to set 'asc_dbglvl'.
348 1. Prevent re-entrancy in the interrupt handler which
349 resulted in the driver hanging Linux.
350 2. Fix problem that prevented ABP-940 cards from being
351 recognized on some PCI motherboards.
352 3. Add support for the ABP-5140 PnP ISA card.
353 4. Fix check condition return status.
354 5. Add conditionally compiled code for Linux v1.3.X.
357 1. Fix problem in advansys_biosparam() that resulted in the
358 wrong drive geometry being returned for drives > 1GB with
359 extended translation enabled.
360 2. Add additional tracing during device initialization.
361 3. Change code that only applies to ISA PnP adapter.
362 4. Eliminate 'make dep' warning.
363 5. Try to fix problem with handling resets by increasing their
367 1. Change definitions to eliminate conflicts with other subsystems.
368 2. Add versioning code for the shared interrupt changes.
369 3. Eliminate problem in asc_rmqueue() with iterating after removing
371 4. Remove reset request loop problem from the "Known Problems or
372 Issues" section. This problem was isolated and fixed in the
373 mid-level SCSI driver.
376 1. Add support for ABP-940U (PCI Ultra) adapter.
377 2. Add support for IRQ sharing by setting the IRQF_SHARED flag for
378 request_irq and supplying a dev_id pointer to both request_irq()
380 3. In AscSearchIOPortAddr11() restore a call to check_region() which
381 should be used before I/O port probing.
382 4. Fix bug in asc_prt_hex() which resulted in the displaying
384 5. Incorporate miscellaneous Asc Library bug fixes and new microcode.
385 6. Change driver versioning to be specific to each Linux sub-level.
386 7. Change statistics gathering to be per adapter instead of global
388 8. Add more information and statistics to the adapter /proc file:
389 /proc/scsi/advansys[0...].
390 9. Remove 'cmd_per_lun' from the "Known Problems or Issues" list.
391 This problem has been addressed with the SCSI mid-level changes
392 made in v1.3.89. The advansys_select_queue_depths() function
393 was added for the v1.3.89 changes.
396 1. Incorporate miscellaneous Asc Library bug fixes and new microcode.
399 1. Enable clustering and optimize the setting of the maximum number
400 of scatter gather elements for any particular board. Clustering
401 increases CPU utilization, but results in a relatively larger
402 increase in I/O throughput.
403 2. Improve the performance of the request queuing functions by
404 adding a last pointer to the queue structure.
405 3. Correct problems with reset and abort request handling that
406 could have hung or crashed Linux.
407 4. Add more information to the adapter /proc file:
408 /proc/scsi/advansys[0...].
409 5. Remove the request timeout issue form the driver issues list.
410 6. Miscellaneous documentation additions and changes.
413 1. Make changes to handle the new v2.1.0 kernel memory mapping
414 in which a kernel virtual address may not be equivalent to its
415 bus or DMA memory address.
416 2. Change abort and reset request handling to make it yet even
418 3. Try to mitigate request starvation by sending ordered requests
419 to heavily loaded, tag queuing enabled devices.
420 4. Maintain statistics on request response time.
421 5. Add request response time statistics and other information to
422 the adapter /proc file: /proc/scsi/advansys[0...].
425 1. Add conditionally compiled code (ASC_QUEUE_FLOW_CONTROL) to
426 make use of mid-level SCSI driver device queue depth flow
427 control mechanism. This will eliminate aborts caused by a
428 device being unable to keep up with requests and eliminate
429 repeat busy or QUEUE FULL status returned by a device.
430 2. Incorporate miscellaneous Asc Library bug fixes.
431 3. To allow the driver to work in kernels with broken module
432 support set 'cmd_per_lun' if the driver is compiled as a
433 module. This change affects kernels v1.3.89 to present.
434 4. Remove PCI BIOS address from the driver banner. The PCI BIOS
435 is relocated by the motherboard BIOS and its new address can
436 not be determined by the driver.
437 5. Add mid-level SCSI queue depth information to the adapter
438 /proc file: /proc/scsi/advansys[0...].
441 1. Change allocation of global structures used for device
442 initialization to guarantee they are in DMA-able memory.
443 Previously when the driver was loaded as a module these
444 structures might not have been in DMA-able memory, causing
445 device initialization to fail.
448 1. In advansys_reset(), if the request is a synchronous reset
449 request, even if the request serial number has changed, then
450 complete the request.
451 2. Add Asc Library bug fixes including new microcode.
452 3. Clear inquiry buffer before using it.
453 4. Correct ifdef typo.
456 1. Add Asc Library bug fixes including new microcode.
457 2. Add synchronous data transfer rate information to the
458 adapter /proc file: /proc/scsi/advansys[0...].
459 3. Change ADVANSYS_DEBUG to be disabled by default. This
460 will reduce the size of the driver image, eliminate execution
461 overhead, and remove unneeded symbols from the kernel symbol
462 space that were previously added by the driver.
463 4. Add new compile-time option ADVANSYS_ASSERT for assertion
464 code that used to be defined within ADVANSYS_DEBUG. This
465 option is enabled by default.
468 1. Change version number to 2.8 to synchronize the Linux driver
469 version numbering with other AdvanSys drivers.
470 2. Reformat source files without tabs to present the same view
471 of the file to everyone regardless of the editor tab setting
473 3. Add Asc Library bug fixes.
476 1. Change version number to 3.1 to indicate that support for
477 Ultra-Wide adapters (ABP-940UW) is included in this release.
478 2. Add Asc Library (Narrow Board) bug fixes.
479 3. Report an underrun condition with the host status byte set
480 to DID_UNDERRUN. Currently DID_UNDERRUN is defined to 0 which
481 causes the underrun condition to be ignored. When Linux defines
482 its own DID_UNDERRUN the constant defined in this file can be
484 4. Add patch to AscWaitTixISRDone().
485 5. Add support for up to 16 different AdvanSys host adapter SCSI
486 channels in one system. This allows four cards with four channels
487 to be used in one system.
490 1. Handle that PCI register base addresses are not always page
491 aligned even though ioremap() requires that the address argument
495 1. Update latest BIOS version checked for from the /proc file.
496 2. Don't set microcode SDTR variable at initialization. Instead
497 wait until device capabilities have been detected from an Inquiry
501 1. Improve performance when the driver is compiled as module by
502 allowing up to 64 scatter-gather elements instead of 8.
505 1. Set time delay in AscWaitTixISRDone() to 1000 ms.
506 2. Include SMP locking changes.
507 3. For v2.1.93 and newer kernels use CONFIG_PCI and new PCI BIOS
509 4. Update board serial number printing.
510 5. Try allocating an IRQ both with and without the IRQF_DISABLED
511 flag set to allow IRQ sharing with drivers that do not set
512 the IRQF_DISABLED flag. Also display a more descriptive error
513 message if request_irq() fails.
514 6. Update to latest Asc and Adv Libraries.
517 1. Update Adv Library to 4.16 which includes support for
518 the ASC38C0800 (Ultra2/LVD) IC.
521 1. Correct PCI compile time option for v2.1.93 and greater
522 kernels, advansys_info() string, and debug compile time
524 2. Correct DvcSleepMilliSecond() for v2.1.0 and greater
525 kernels. This caused an LVD detection/BIST problem problem
527 3. Sort PCI cards by PCI Bus, Slot, Function ascending order
528 to be consistent with the BIOS.
529 4. Update to Asc Library S121 and Adv Library 5.2.
532 1. Correct PCI card detection bug introduced in 3.2B that
533 prevented PCI cards from being detected in kernels older
537 1. Correct /proc device synchronous speed information display.
538 Also when re-negotiation is pending for a target device
539 note this condition with an * and footnote.
540 2. Correct initialization problem with Ultra-Wide cards that
541 have a pre-3.2 BIOS. A microcode variable changed locations
542 in 3.2 and greater BIOSes which caused WDTR to be attempted
543 erroneously with drives that don't support WDTR.
546 1. Fix compile error caused by v2.3.13 PCI structure change.
547 2. Remove field from ASCEEP_CONFIG that resulted in an EEPROM
548 checksum error for ISA cards.
549 3. Remove ASC_QUEUE_FLOW_CONTROL conditional code. The mid-level
550 SCSI changes that it depended on were never included in Linux.
553 1. Handle new initial function code added in v2.3.16 for all
557 1. Fix PCI board detection in v2.3.13 and greater kernels.
558 2. Fix comiple errors in v2.3.X with debugging enabled.
561 1. Add 64-bit address, long support for Alpha and UltraSPARC.
562 The driver has been verified to work on an Alpha system.
563 2. Add partial byte order handling support for Power PC and
564 other big-endian platforms. This support has not yet been
565 completed or verified.
566 3. For wide boards replace block zeroing of request and
567 scatter-gather structures with individual field initialization
568 to improve performance.
569 4. Correct and clarify ROM BIOS version detection.
572 1. Update to Adv Library 5.4.
573 2. Add v2.3.19 underrun reporting to asc_isr_callback() and
574 adv_isr_callback(). Remove DID_UNDERRUN constant and other
575 no longer needed code that previously documented the lack
576 of underrun handling.
579 1. Eliminate compile errors for v2.0 and earlier kernels.
582 1. Correct debug compile error in asc_prt_adv_scsi_req_q().
583 2. Update Adv Library to 5.5.
584 3. Add ifdef handling for /proc changes added in v2.3.28.
585 4. Increase Wide board scatter-gather list maximum length to
586 255 when the driver is compiled into the kernel.
589 1. Fix bug in adv_get_sglist() that caused an assertion failure
590 at line 7475. The reqp->sgblkp pointer must be initialized
591 to NULL in adv_get_sglist().
594 1. Really fix bug in adv_get_sglist().
595 2. Incorporate v2.3.29 changes into driver.
598 1. Add CONFIG_ISA ifdef code.
599 2. Include advansys_interrupts_enabled name change patch.
600 3. For >= v2.3.28 use new SCSI error handling with new function
601 advansys_eh_bus_reset(). Don't include an abort function
602 because of base library limitations.
603 4. For >= v2.3.28 use per board lock instead of io_request_lock.
604 5. For >= v2.3.28 eliminate advansys_command() and
605 advansys_command_done().
606 6. Add some changes for PowerPC (Big Endian) support, but it isn't
608 7. Fix "nonexistent resource free" problem that occurred on a module
609 unload for boards with an I/O space >= 255. The 'n_io_port' field
610 is only one byte and can not be used to hold an ioport length more
614 1. Update to Adv Library 5.8.
615 2. For wide cards add support for CDBs up to 16 bytes.
616 3. Eliminate warnings when CONFIG_PROC_FS is not defined.
619 1. Support for PowerPC (Big Endian) wide cards. Narrow cards
621 2. Change bitfields to shift and mask access for endian
625 1. Update for latest 2.4 kernel.
626 2. Test ABP-480 CardBus support in 2.4 kernel - works!
627 3. Update to Asc Library S123.
628 4. Update to Adv Library 5.12.
631 1. Update for latest 2.4 kernel.
632 2. Create patches for 2.2 and 2.4 kernels.
635 1. Now that 2.4 is released remove ifdef code for kernel versions
636 less than 2.2. The driver is now only supported in kernels 2.2,
638 2. Add code to release and acquire the io_request_lock in
639 the driver entrypoint functions: advansys_detect and
640 advansys_queuecommand. In kernel 2.4 the SCSI mid-level driver
641 still holds the io_request_lock on entry to SCSI low-level drivers.
642 This was supposed to be removed before 2.4 was released but never
643 happened. When the mid-level SCSI driver is changed all references
644 to the io_request_lock should be removed from the driver.
645 3. Simplify error handling by removing advansys_abort(),
646 AscAbortSRB(), AscResetDevice(). SCSI bus reset requests are
647 now handled by resetting the SCSI bus and fully re-initializing
648 the chip. This simple method of error recovery has proven to work
649 most reliably after attempts at different methods. Also now only
650 support the "new" error handling method and remove the obsolete
651 error handling interface.
652 4. Fix debug build errors.
655 1. Merge with ConnectCom version from Andy Kellner which
656 updates Adv Library to 5.14.
657 2. Make PowerPC (Big Endian) work for narrow cards and
658 fix problems writing EEPROM for wide cards.
659 3. Remove interrupts_enabled assertion function.
662 1. Return an error from narrow boards if passed a 16 byte
663 CDB. The wide board can already handle 16 byte CDBs.
666 1. hacks for lk 2.5 series (D. Gilbert)
669 1. change select_queue_depths to slave_configure
670 2. make cmd_per_lun be sane again
673 1. continuing cleanup for lk 2.6 series
674 2. Fix problem in lk 2.6.7-bk2 that broke PCI wide cards
675 3. Fix problem that oopsed ISA cards
677 I. Known Problems/Fix List (XXX)
679 1. Need to add memory mapping workaround. Test the memory mapping.
680 If it doesn't work revert to I/O port access. Can a test be done
682 2. Handle an interrupt not working. Keep an interrupt counter in
683 the interrupt handler. In the timeout function if the interrupt
684 has not occurred then print a message and run in polled mode.
685 3. Allow bus type scanning order to be changed.
686 4. Need to add support for target mode commands, cf. CAM XPT.
688 J. Credits (Chronological Order)
690 Bob Frey <bfrey@turbolinux.com.cn> wrote the AdvanSys SCSI driver
691 and maintained it up to 3.3F. He continues to answer questions
692 and help maintain the driver.
694 Nathan Hartwell <mage@cdc3.cdc.net> provided the directions and
695 basis for the Linux v1.3.X changes which were included in the
698 Thomas E Zerucha <zerucha@shell.portal.com> pointed out a bug
699 in advansys_biosparam() which was fixed in the 1.3 release.
701 Erik Ratcliffe <erik@caldera.com> has done testing of the
702 AdvanSys driver in the Caldera releases.
704 Rik van Riel <H.H.vanRiel@fys.ruu.nl> provided a patch to
705 AscWaitTixISRDone() which he found necessary to make the
706 driver work with a SCSI-1 disk.
708 Mark Moran <mmoran@mmoran.com> has helped test Ultra-Wide
709 support in the 3.1A driver.
711 Doug Gilbert <dgilbert@interlog.com> has made changes and
712 suggestions to improve the driver and done a lot of testing.
714 Ken Mort <ken@mort.net> reported a DEBUG compile bug fixed
717 Tom Rini <trini@kernel.crashing.org> provided the CONFIG_ISA
718 patch and helped with PowerPC wide and narrow board support.
720 Philip Blundell <philb@gnu.org> provided an
721 advansys_interrupts_enabled patch.
723 Dave Jones <dave@denial.force9.co.uk> reported the compiler
724 warnings generated when CONFIG_PROC_FS was not defined in
727 Jerry Quinn <jlquinn@us.ibm.com> fixed PowerPC support (endian
728 problems) for wide cards.
730 Bryan Henderson <bryanh@giraffe-data.com> helped debug narrow
733 Manuel Veloso <veloso@pobox.com> worked hard on PowerPC narrow
734 board support and fixed a bug in AscGetEEPConfig().
736 Arnaldo Carvalho de Melo <acme@conectiva.com.br> made
737 save_flags/restore_flags changes.
739 Andy Kellner <AKellner@connectcom.net> continues the Advansys SCSI
740 driver development for ConnectCom (Version > 3.3F).
742 K. ConnectCom (AdvanSys) Contact Information
744 Mail: ConnectCom Solutions, Inc.
747 Operator/Sales: 1-408-383-9400
749 Tech Support: 1-408-467-2930
750 Tech Support E-Mail: linux@connectcom.net
751 FTP Site: ftp.connectcom.net (login: anonymous)
752 Web Site: http://www.connectcom.net
757 * --- Linux Include Files
760 #include <linux/module.h>
761 #include <linux/string.h>
762 #include <linux/kernel.h>
763 #include <linux/types.h>
764 #include <linux/ioport.h>
765 #include <linux/interrupt.h>
766 #include <linux/delay.h>
767 #include <linux/slab.h>
768 #include <linux/mm.h>
769 #include <linux/proc_fs.h>
770 #include <linux/init.h>
771 #include <linux/blkdev.h>
772 #include <linux/pci.h>
773 #include <linux/spinlock.h>
774 #include <linux/dma-mapping.h>
777 #include <asm/system.h>
780 #include <scsi/scsi_cmnd.h>
781 #include <scsi/scsi_device.h>
782 #include <scsi/scsi_tcq.h>
783 #include <scsi/scsi.h>
784 #include <scsi/scsi_host.h>
786 /* FIXME: (by jejb@steeleye.com) This warning is present for two
789 * 1) This driver badly needs converting to the correct driver model
792 * 2) Although all of the necessary command mapping places have the
793 * appropriate dma_map.. APIs, the driver still processes its internal
794 * queue using bus_to_virt() and virt_to_bus() which are illegal under
795 * the API. The entire queue processing structure will need to be
796 * altered to fix this.
798 #warning this driver is still not properly converted to the DMA API
804 /* Enable driver assertions. */
805 #define ADVANSYS_ASSERT
807 /* Enable driver /proc statistics. */
808 #define ADVANSYS_STATS
810 /* Enable driver tracing. */
811 /* #define ADVANSYS_DEBUG */
814 * --- Asc Library Constants and Macros
817 #define ASC_LIB_VERSION_MAJOR 1
818 #define ASC_LIB_VERSION_MINOR 24
819 #define ASC_LIB_SERIAL_NUMBER 123
822 * Portable Data Types
824 * Any instance where a 32-bit long or pointer type is assumed
825 * for precision or HW defined structures, the following define
826 * types must be used. In Linux the char, short, and int types
827 * are all consistent at 8, 16, and 32 bits respectively. Pointers
828 * and long types are 64 bits on Alpha and UltraSPARC.
830 #define ASC_PADDR __u32 /* Physical/Bus address data type. */
831 #define ASC_VADDR __u32 /* Virtual address data type. */
832 #define ASC_DCNT __u32 /* Unsigned Data count type. */
833 #define ASC_SDCNT __s32 /* Signed Data count type. */
836 * These macros are used to convert a virtual address to a
837 * 32-bit value. This currently can be used on Linux Alpha
838 * which uses 64-bit virtual address but a 32-bit bus address.
839 * This is likely to break in the future, but doing this now
840 * will give us time to change the HW and FW to handle 64-bit
843 #define ASC_VADDR_TO_U32 virt_to_bus
844 #define ASC_U32_TO_VADDR bus_to_virt
846 typedef unsigned char uchar
;
857 #define UW_ERR (uint)(0xFFFF)
858 #define isodd_word(val) ((((uint)val) & (uint)0x0001) != 0)
859 #define AscPCIConfigVendorIDRegister 0x0000
860 #define AscPCIConfigDeviceIDRegister 0x0002
861 #define AscPCIConfigCommandRegister 0x0004
862 #define AscPCIConfigStatusRegister 0x0006
863 #define AscPCIConfigRevisionIDRegister 0x0008
864 #define AscPCIConfigCacheSize 0x000C
865 #define AscPCIConfigLatencyTimer 0x000D
866 #define AscPCIIOBaseRegister 0x0010
867 #define AscPCICmdRegBits_IOMemBusMaster 0x0007
868 #define ASC_PCI_ID2FUNC(id) (((id) >> 8) & 0x7)
869 #define ASC_PCI_MKID(bus, dev, func) ((((dev) & 0x1F) << 11) | (((func) & 0x7) << 8) | ((bus) & 0xFF))
871 #define ASC_DVCLIB_CALL_DONE (1)
872 #define ASC_DVCLIB_CALL_FAILED (0)
873 #define ASC_DVCLIB_CALL_ERROR (-1)
875 #define PCI_VENDOR_ID_ASP 0x10cd
876 #define PCI_DEVICE_ID_ASP_1200A 0x1100
877 #define PCI_DEVICE_ID_ASP_ABP940 0x1200
878 #define PCI_DEVICE_ID_ASP_ABP940U 0x1300
879 #define PCI_DEVICE_ID_ASP_ABP940UW 0x2300
880 #define PCI_DEVICE_ID_38C0800_REV1 0x2500
881 #define PCI_DEVICE_ID_38C1600_REV1 0x2700
884 * Enable CC_VERY_LONG_SG_LIST to support up to 64K element SG lists.
885 * The SRB structure will have to be changed and the ASC_SRB2SCSIQ()
886 * macro re-defined to be able to obtain a ASC_SCSI_Q pointer from the
889 #define CC_VERY_LONG_SG_LIST 0
890 #define ASC_SRB2SCSIQ(srb_ptr) (srb_ptr)
892 #define PortAddr unsigned short /* port address size */
893 #define inp(port) inb(port)
894 #define outp(port, byte) outb((byte), (port))
896 #define inpw(port) inw(port)
897 #define outpw(port, word) outw((word), (port))
899 #define ASC_MAX_SG_QUEUE 7
900 #define ASC_MAX_SG_LIST 255
902 #define ASC_CS_TYPE unsigned short
904 #define ASC_IS_ISA (0x0001)
905 #define ASC_IS_ISAPNP (0x0081)
906 #define ASC_IS_EISA (0x0002)
907 #define ASC_IS_PCI (0x0004)
908 #define ASC_IS_PCI_ULTRA (0x0104)
909 #define ASC_IS_PCMCIA (0x0008)
910 #define ASC_IS_MCA (0x0020)
911 #define ASC_IS_VL (0x0040)
912 #define ASC_ISA_PNP_PORT_ADDR (0x279)
913 #define ASC_ISA_PNP_PORT_WRITE (ASC_ISA_PNP_PORT_ADDR+0x800)
914 #define ASC_IS_WIDESCSI_16 (0x0100)
915 #define ASC_IS_WIDESCSI_32 (0x0200)
916 #define ASC_IS_BIG_ENDIAN (0x8000)
917 #define ASC_CHIP_MIN_VER_VL (0x01)
918 #define ASC_CHIP_MAX_VER_VL (0x07)
919 #define ASC_CHIP_MIN_VER_PCI (0x09)
920 #define ASC_CHIP_MAX_VER_PCI (0x0F)
921 #define ASC_CHIP_VER_PCI_BIT (0x08)
922 #define ASC_CHIP_MIN_VER_ISA (0x11)
923 #define ASC_CHIP_MIN_VER_ISA_PNP (0x21)
924 #define ASC_CHIP_MAX_VER_ISA (0x27)
925 #define ASC_CHIP_VER_ISA_BIT (0x30)
926 #define ASC_CHIP_VER_ISAPNP_BIT (0x20)
927 #define ASC_CHIP_VER_ASYN_BUG (0x21)
928 #define ASC_CHIP_VER_PCI 0x08
929 #define ASC_CHIP_VER_PCI_ULTRA_3150 (ASC_CHIP_VER_PCI | 0x02)
930 #define ASC_CHIP_VER_PCI_ULTRA_3050 (ASC_CHIP_VER_PCI | 0x03)
931 #define ASC_CHIP_MIN_VER_EISA (0x41)
932 #define ASC_CHIP_MAX_VER_EISA (0x47)
933 #define ASC_CHIP_VER_EISA_BIT (0x40)
934 #define ASC_CHIP_LATEST_VER_EISA ((ASC_CHIP_MIN_VER_EISA - 1) + 3)
935 #define ASC_MAX_LIB_SUPPORTED_ISA_CHIP_VER 0x21
936 #define ASC_MAX_LIB_SUPPORTED_PCI_CHIP_VER 0x0A
937 #define ASC_MAX_VL_DMA_ADDR (0x07FFFFFFL)
938 #define ASC_MAX_VL_DMA_COUNT (0x07FFFFFFL)
939 #define ASC_MAX_PCI_DMA_ADDR (0xFFFFFFFFL)
940 #define ASC_MAX_PCI_DMA_COUNT (0xFFFFFFFFL)
941 #define ASC_MAX_ISA_DMA_ADDR (0x00FFFFFFL)
942 #define ASC_MAX_ISA_DMA_COUNT (0x00FFFFFFL)
943 #define ASC_MAX_EISA_DMA_ADDR (0x07FFFFFFL)
944 #define ASC_MAX_EISA_DMA_COUNT (0x07FFFFFFL)
946 #define ASC_SCSI_ID_BITS 3
947 #define ASC_SCSI_TIX_TYPE uchar
948 #define ASC_ALL_DEVICE_BIT_SET 0xFF
949 #define ASC_SCSI_BIT_ID_TYPE uchar
950 #define ASC_MAX_TID 7
951 #define ASC_MAX_LUN 7
952 #define ASC_SCSI_WIDTH_BIT_SET 0xFF
953 #define ASC_MAX_SENSE_LEN 32
954 #define ASC_MIN_SENSE_LEN 14
955 #define ASC_MAX_CDB_LEN 12
956 #define ASC_SCSI_RESET_HOLD_TIME_US 60
958 #define ADV_INQ_CLOCKING_ST_ONLY 0x0
959 #define ADV_INQ_CLOCKING_DT_ONLY 0x1
960 #define ADV_INQ_CLOCKING_ST_AND_DT 0x3
963 * Inquiry SPC-2 SPI Byte 1 EVPD (Enable Vital Product Data)
964 * and CmdDt (Command Support Data) field bit definitions.
966 #define ADV_INQ_RTN_VPD_AND_CMDDT 0x3
967 #define ADV_INQ_RTN_CMDDT_FOR_OP_CODE 0x2
968 #define ADV_INQ_RTN_VPD_FOR_PG_CODE 0x1
969 #define ADV_INQ_RTN_STD_INQUIRY_DATA 0x0
971 #define ASC_SCSIDIR_NOCHK 0x00
972 #define ASC_SCSIDIR_T2H 0x08
973 #define ASC_SCSIDIR_H2T 0x10
974 #define ASC_SCSIDIR_NODATA 0x18
975 #define SCSI_ASC_NOMEDIA 0x3A
976 #define ASC_SRB_HOST(x) ((uchar)((uchar)(x) >> 4))
977 #define ASC_SRB_TID(x) ((uchar)((uchar)(x) & (uchar)0x0F))
978 #define ASC_SRB_LUN(x) ((uchar)((uint)(x) >> 13))
979 #define PUT_CDB1(x) ((uchar)((uint)(x) >> 8))
980 #define MS_CMD_DONE 0x00
981 #define MS_EXTEND 0x01
982 #define MS_SDTR_LEN 0x03
983 #define MS_SDTR_CODE 0x01
984 #define MS_WDTR_LEN 0x02
985 #define MS_WDTR_CODE 0x03
986 #define MS_MDP_LEN 0x05
987 #define MS_MDP_CODE 0x00
990 * Inquiry data structure and bitfield macros
992 * Only quantities of more than 1 bit are shifted, since the others are
993 * just tested for true or false. C bitfields aren't portable between big
994 * and little-endian platforms so they are not used.
997 #define ASC_INQ_DVC_TYPE(inq) ((inq)->periph & 0x1f)
998 #define ASC_INQ_QUALIFIER(inq) (((inq)->periph & 0xe0) >> 5)
999 #define ASC_INQ_DVC_TYPE_MOD(inq) ((inq)->devtype & 0x7f)
1000 #define ASC_INQ_REMOVABLE(inq) ((inq)->devtype & 0x80)
1001 #define ASC_INQ_ANSI_VER(inq) ((inq)->ver & 0x07)
1002 #define ASC_INQ_ECMA_VER(inq) (((inq)->ver & 0x38) >> 3)
1003 #define ASC_INQ_ISO_VER(inq) (((inq)->ver & 0xc0) >> 6)
1004 #define ASC_INQ_RESPONSE_FMT(inq) ((inq)->byte3 & 0x0f)
1005 #define ASC_INQ_TERM_IO(inq) ((inq)->byte3 & 0x40)
1006 #define ASC_INQ_ASYNC_NOTIF(inq) ((inq)->byte3 & 0x80)
1007 #define ASC_INQ_SOFT_RESET(inq) ((inq)->flags & 0x01)
1008 #define ASC_INQ_CMD_QUEUE(inq) ((inq)->flags & 0x02)
1009 #define ASC_INQ_LINK_CMD(inq) ((inq)->flags & 0x08)
1010 #define ASC_INQ_SYNC(inq) ((inq)->flags & 0x10)
1011 #define ASC_INQ_WIDE16(inq) ((inq)->flags & 0x20)
1012 #define ASC_INQ_WIDE32(inq) ((inq)->flags & 0x40)
1013 #define ASC_INQ_REL_ADDR(inq) ((inq)->flags & 0x80)
1014 #define ASC_INQ_INFO_UNIT(inq) ((inq)->info & 0x01)
1015 #define ASC_INQ_QUICK_ARB(inq) ((inq)->info & 0x02)
1016 #define ASC_INQ_CLOCKING(inq) (((inq)->info & 0x0c) >> 2)
1028 uchar product_id
[16];
1029 uchar product_rev_level
[4];
1032 #define ASC_SG_LIST_PER_Q 7
1033 #define QS_FREE 0x00
1034 #define QS_READY 0x01
1035 #define QS_DISC1 0x02
1036 #define QS_DISC2 0x04
1037 #define QS_BUSY 0x08
1038 #define QS_ABORTED 0x40
1039 #define QS_DONE 0x80
1040 #define QC_NO_CALLBACK 0x01
1041 #define QC_SG_SWAP_QUEUE 0x02
1042 #define QC_SG_HEAD 0x04
1043 #define QC_DATA_IN 0x08
1044 #define QC_DATA_OUT 0x10
1045 #define QC_URGENT 0x20
1046 #define QC_MSG_OUT 0x40
1047 #define QC_REQ_SENSE 0x80
1048 #define QCSG_SG_XFER_LIST 0x02
1049 #define QCSG_SG_XFER_MORE 0x04
1050 #define QCSG_SG_XFER_END 0x08
1051 #define QD_IN_PROGRESS 0x00
1052 #define QD_NO_ERROR 0x01
1053 #define QD_ABORTED_BY_HOST 0x02
1054 #define QD_WITH_ERROR 0x04
1055 #define QD_INVALID_REQUEST 0x80
1056 #define QD_INVALID_HOST_NUM 0x81
1057 #define QD_INVALID_DEVICE 0x82
1058 #define QD_ERR_INTERNAL 0xFF
1059 #define QHSTA_NO_ERROR 0x00
1060 #define QHSTA_M_SEL_TIMEOUT 0x11
1061 #define QHSTA_M_DATA_OVER_RUN 0x12
1062 #define QHSTA_M_DATA_UNDER_RUN 0x12
1063 #define QHSTA_M_UNEXPECTED_BUS_FREE 0x13
1064 #define QHSTA_M_BAD_BUS_PHASE_SEQ 0x14
1065 #define QHSTA_D_QDONE_SG_LIST_CORRUPTED 0x21
1066 #define QHSTA_D_ASC_DVC_ERROR_CODE_SET 0x22
1067 #define QHSTA_D_HOST_ABORT_FAILED 0x23
1068 #define QHSTA_D_EXE_SCSI_Q_FAILED 0x24
1069 #define QHSTA_D_EXE_SCSI_Q_BUSY_TIMEOUT 0x25
1070 #define QHSTA_D_ASPI_NO_BUF_POOL 0x26
1071 #define QHSTA_M_WTM_TIMEOUT 0x41
1072 #define QHSTA_M_BAD_CMPL_STATUS_IN 0x42
1073 #define QHSTA_M_NO_AUTO_REQ_SENSE 0x43
1074 #define QHSTA_M_AUTO_REQ_SENSE_FAIL 0x44
1075 #define QHSTA_M_TARGET_STATUS_BUSY 0x45
1076 #define QHSTA_M_BAD_TAG_CODE 0x46
1077 #define QHSTA_M_BAD_QUEUE_FULL_OR_BUSY 0x47
1078 #define QHSTA_M_HUNG_REQ_SCSI_BUS_RESET 0x48
1079 #define QHSTA_D_LRAM_CMP_ERROR 0x81
1080 #define QHSTA_M_MICRO_CODE_ERROR_HALT 0xA1
1081 #define ASC_FLAG_SCSIQ_REQ 0x01
1082 #define ASC_FLAG_BIOS_SCSIQ_REQ 0x02
1083 #define ASC_FLAG_BIOS_ASYNC_IO 0x04
1084 #define ASC_FLAG_SRB_LINEAR_ADDR 0x08
1085 #define ASC_FLAG_WIN16 0x10
1086 #define ASC_FLAG_WIN32 0x20
1087 #define ASC_FLAG_ISA_OVER_16MB 0x40
1088 #define ASC_FLAG_DOS_VM_CALLBACK 0x80
1089 #define ASC_TAG_FLAG_EXTRA_BYTES 0x10
1090 #define ASC_TAG_FLAG_DISABLE_DISCONNECT 0x04
1091 #define ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX 0x08
1092 #define ASC_TAG_FLAG_DISABLE_CHK_COND_INT_HOST 0x40
1093 #define ASC_SCSIQ_CPY_BEG 4
1094 #define ASC_SCSIQ_SGHD_CPY_BEG 2
1095 #define ASC_SCSIQ_B_FWD 0
1096 #define ASC_SCSIQ_B_BWD 1
1097 #define ASC_SCSIQ_B_STATUS 2
1098 #define ASC_SCSIQ_B_QNO 3
1099 #define ASC_SCSIQ_B_CNTL 4
1100 #define ASC_SCSIQ_B_SG_QUEUE_CNT 5
1101 #define ASC_SCSIQ_D_DATA_ADDR 8
1102 #define ASC_SCSIQ_D_DATA_CNT 12
1103 #define ASC_SCSIQ_B_SENSE_LEN 20
1104 #define ASC_SCSIQ_DONE_INFO_BEG 22
1105 #define ASC_SCSIQ_D_SRBPTR 22
1106 #define ASC_SCSIQ_B_TARGET_IX 26
1107 #define ASC_SCSIQ_B_CDB_LEN 28
1108 #define ASC_SCSIQ_B_TAG_CODE 29
1109 #define ASC_SCSIQ_W_VM_ID 30
1110 #define ASC_SCSIQ_DONE_STATUS 32
1111 #define ASC_SCSIQ_HOST_STATUS 33
1112 #define ASC_SCSIQ_SCSI_STATUS 34
1113 #define ASC_SCSIQ_CDB_BEG 36
1114 #define ASC_SCSIQ_DW_REMAIN_XFER_ADDR 56
1115 #define ASC_SCSIQ_DW_REMAIN_XFER_CNT 60
1116 #define ASC_SCSIQ_B_FIRST_SG_WK_QP 48
1117 #define ASC_SCSIQ_B_SG_WK_QP 49
1118 #define ASC_SCSIQ_B_SG_WK_IX 50
1119 #define ASC_SCSIQ_W_ALT_DC1 52
1120 #define ASC_SCSIQ_B_LIST_CNT 6
1121 #define ASC_SCSIQ_B_CUR_LIST_CNT 7
1122 #define ASC_SGQ_B_SG_CNTL 4
1123 #define ASC_SGQ_B_SG_HEAD_QP 5
1124 #define ASC_SGQ_B_SG_LIST_CNT 6
1125 #define ASC_SGQ_B_SG_CUR_LIST_CNT 7
1126 #define ASC_SGQ_LIST_BEG 8
1127 #define ASC_DEF_SCSI1_QNG 4
1128 #define ASC_MAX_SCSI1_QNG 4
1129 #define ASC_DEF_SCSI2_QNG 16
1130 #define ASC_MAX_SCSI2_QNG 32
1131 #define ASC_TAG_CODE_MASK 0x23
1132 #define ASC_STOP_REQ_RISC_STOP 0x01
1133 #define ASC_STOP_ACK_RISC_STOP 0x03
1134 #define ASC_STOP_CLEAN_UP_BUSY_Q 0x10
1135 #define ASC_STOP_CLEAN_UP_DISC_Q 0x20
1136 #define ASC_STOP_HOST_REQ_RISC_HALT 0x40
1137 #define ASC_TIDLUN_TO_IX(tid, lun) (ASC_SCSI_TIX_TYPE)((tid) + ((lun)<<ASC_SCSI_ID_BITS))
1138 #define ASC_TID_TO_TARGET_ID(tid) (ASC_SCSI_BIT_ID_TYPE)(0x01 << (tid))
1139 #define ASC_TIX_TO_TARGET_ID(tix) (0x01 << ((tix) & ASC_MAX_TID))
1140 #define ASC_TIX_TO_TID(tix) ((tix) & ASC_MAX_TID)
1141 #define ASC_TID_TO_TIX(tid) ((tid) & ASC_MAX_TID)
1142 #define ASC_TIX_TO_LUN(tix) (((tix) >> ASC_SCSI_ID_BITS) & ASC_MAX_LUN)
1143 #define ASC_QNO_TO_QADDR(q_no) ((ASC_QADR_BEG)+((int)(q_no) << 6))
1145 typedef struct asc_scsiq_1
{
1152 ASC_PADDR data_addr
;
1154 ASC_PADDR sense_addr
;
1159 typedef struct asc_scsiq_2
{
1168 typedef struct asc_scsiq_3
{
1175 typedef struct asc_scsiq_4
{
1176 uchar cdb
[ASC_MAX_CDB_LEN
];
1177 uchar y_first_sg_list_qp
;
1178 uchar y_working_sg_qp
;
1179 uchar y_working_sg_ix
;
1182 ushort x_reconnect_rtn
;
1183 ASC_PADDR x_saved_data_addr
;
1184 ASC_DCNT x_saved_data_cnt
;
1187 typedef struct asc_q_done_info
{
1196 ASC_DCNT remain_bytes
;
1199 typedef struct asc_sg_list
{
1204 typedef struct asc_sg_head
{
1207 ushort entry_to_copy
;
1209 ASC_SG_LIST sg_list
[ASC_MAX_SG_LIST
];
1212 #define ASC_MIN_SG_LIST 2
1214 typedef struct asc_min_sg_head
{
1217 ushort entry_to_copy
;
1219 ASC_SG_LIST sg_list
[ASC_MIN_SG_LIST
];
1222 #define QCX_SORT (0x0001)
1223 #define QCX_COALEASE (0x0002)
1225 typedef struct asc_scsi_q
{
1229 ASC_SG_HEAD
*sg_head
;
1230 ushort remain_sg_entry_cnt
;
1231 ushort next_sg_index
;
1234 typedef struct asc_scsi_req_q
{
1238 ASC_SG_HEAD
*sg_head
;
1241 uchar cdb
[ASC_MAX_CDB_LEN
];
1242 uchar sense
[ASC_MIN_SENSE_LEN
];
1245 typedef struct asc_scsi_bios_req_q
{
1249 ASC_SG_HEAD
*sg_head
;
1252 uchar cdb
[ASC_MAX_CDB_LEN
];
1253 uchar sense
[ASC_MIN_SENSE_LEN
];
1254 } ASC_SCSI_BIOS_REQ_Q
;
1256 typedef struct asc_risc_q
{
1265 typedef struct asc_sg_list_q
{
1271 uchar sg_cur_list_cnt
;
1274 typedef struct asc_risc_sg_list_q
{
1278 ASC_SG_LIST sg_list
[7];
1279 } ASC_RISC_SG_LIST_Q
;
1281 #define ASC_EXE_SCSI_IO_MAX_IDLE_LOOP 0x1000000UL
1282 #define ASC_EXE_SCSI_IO_MAX_WAIT_LOOP 1024
1283 #define ASCQ_ERR_NO_ERROR 0
1284 #define ASCQ_ERR_IO_NOT_FOUND 1
1285 #define ASCQ_ERR_LOCAL_MEM 2
1286 #define ASCQ_ERR_CHKSUM 3
1287 #define ASCQ_ERR_START_CHIP 4
1288 #define ASCQ_ERR_INT_TARGET_ID 5
1289 #define ASCQ_ERR_INT_LOCAL_MEM 6
1290 #define ASCQ_ERR_HALT_RISC 7
1291 #define ASCQ_ERR_GET_ASPI_ENTRY 8
1292 #define ASCQ_ERR_CLOSE_ASPI 9
1293 #define ASCQ_ERR_HOST_INQUIRY 0x0A
1294 #define ASCQ_ERR_SAVED_SRB_BAD 0x0B
1295 #define ASCQ_ERR_QCNTL_SG_LIST 0x0C
1296 #define ASCQ_ERR_Q_STATUS 0x0D
1297 #define ASCQ_ERR_WR_SCSIQ 0x0E
1298 #define ASCQ_ERR_PC_ADDR 0x0F
1299 #define ASCQ_ERR_SYN_OFFSET 0x10
1300 #define ASCQ_ERR_SYN_XFER_TIME 0x11
1301 #define ASCQ_ERR_LOCK_DMA 0x12
1302 #define ASCQ_ERR_UNLOCK_DMA 0x13
1303 #define ASCQ_ERR_VDS_CHK_INSTALL 0x14
1304 #define ASCQ_ERR_MICRO_CODE_HALT 0x15
1305 #define ASCQ_ERR_SET_LRAM_ADDR 0x16
1306 #define ASCQ_ERR_CUR_QNG 0x17
1307 #define ASCQ_ERR_SG_Q_LINKS 0x18
1308 #define ASCQ_ERR_SCSIQ_PTR 0x19
1309 #define ASCQ_ERR_ISR_RE_ENTRY 0x1A
1310 #define ASCQ_ERR_CRITICAL_RE_ENTRY 0x1B
1311 #define ASCQ_ERR_ISR_ON_CRITICAL 0x1C
1312 #define ASCQ_ERR_SG_LIST_ODD_ADDRESS 0x1D
1313 #define ASCQ_ERR_XFER_ADDRESS_TOO_BIG 0x1E
1314 #define ASCQ_ERR_SCSIQ_NULL_PTR 0x1F
1315 #define ASCQ_ERR_SCSIQ_BAD_NEXT_PTR 0x20
1316 #define ASCQ_ERR_GET_NUM_OF_FREE_Q 0x21
1317 #define ASCQ_ERR_SEND_SCSI_Q 0x22
1318 #define ASCQ_ERR_HOST_REQ_RISC_HALT 0x23
1319 #define ASCQ_ERR_RESET_SDTR 0x24
1322 * Warning code values are set in ASC_DVC_VAR 'warn_code'.
1324 #define ASC_WARN_NO_ERROR 0x0000
1325 #define ASC_WARN_IO_PORT_ROTATE 0x0001
1326 #define ASC_WARN_EEPROM_CHKSUM 0x0002
1327 #define ASC_WARN_IRQ_MODIFIED 0x0004
1328 #define ASC_WARN_AUTO_CONFIG 0x0008
1329 #define ASC_WARN_CMD_QNG_CONFLICT 0x0010
1330 #define ASC_WARN_EEPROM_RECOVER 0x0020
1331 #define ASC_WARN_CFG_MSW_RECOVER 0x0040
1332 #define ASC_WARN_SET_PCI_CONFIG_SPACE 0x0080
1335 * Error code values are set in ASC_DVC_VAR 'err_code'.
1337 #define ASC_IERR_WRITE_EEPROM 0x0001
1338 #define ASC_IERR_MCODE_CHKSUM 0x0002
1339 #define ASC_IERR_SET_PC_ADDR 0x0004
1340 #define ASC_IERR_START_STOP_CHIP 0x0008
1341 #define ASC_IERR_IRQ_NO 0x0010
1342 #define ASC_IERR_SET_IRQ_NO 0x0020
1343 #define ASC_IERR_CHIP_VERSION 0x0040
1344 #define ASC_IERR_SET_SCSI_ID 0x0080
1345 #define ASC_IERR_GET_PHY_ADDR 0x0100
1346 #define ASC_IERR_BAD_SIGNATURE 0x0200
1347 #define ASC_IERR_NO_BUS_TYPE 0x0400
1348 #define ASC_IERR_SCAM 0x0800
1349 #define ASC_IERR_SET_SDTR 0x1000
1350 #define ASC_IERR_RW_LRAM 0x8000
1352 #define ASC_DEF_IRQ_NO 10
1353 #define ASC_MAX_IRQ_NO 15
1354 #define ASC_MIN_IRQ_NO 10
1355 #define ASC_MIN_REMAIN_Q (0x02)
1356 #define ASC_DEF_MAX_TOTAL_QNG (0xF0)
1357 #define ASC_MIN_TAG_Q_PER_DVC (0x04)
1358 #define ASC_DEF_TAG_Q_PER_DVC (0x04)
1359 #define ASC_MIN_FREE_Q ASC_MIN_REMAIN_Q
1360 #define ASC_MIN_TOTAL_QNG ((ASC_MAX_SG_QUEUE)+(ASC_MIN_FREE_Q))
1361 #define ASC_MAX_TOTAL_QNG 240
1362 #define ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG 16
1363 #define ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG 8
1364 #define ASC_MAX_PCI_INRAM_TOTAL_QNG 20
1365 #define ASC_MAX_INRAM_TAG_QNG 16
1366 #define ASC_IOADR_TABLE_MAX_IX 11
1367 #define ASC_IOADR_GAP 0x10
1368 #define ASC_SEARCH_IOP_GAP 0x10
1369 #define ASC_MIN_IOP_ADDR (PortAddr)0x0100
1370 #define ASC_MAX_IOP_ADDR (PortAddr)0x3F0
1371 #define ASC_IOADR_1 (PortAddr)0x0110
1372 #define ASC_IOADR_2 (PortAddr)0x0130
1373 #define ASC_IOADR_3 (PortAddr)0x0150
1374 #define ASC_IOADR_4 (PortAddr)0x0190
1375 #define ASC_IOADR_5 (PortAddr)0x0210
1376 #define ASC_IOADR_6 (PortAddr)0x0230
1377 #define ASC_IOADR_7 (PortAddr)0x0250
1378 #define ASC_IOADR_8 (PortAddr)0x0330
1379 #define ASC_IOADR_DEF ASC_IOADR_8
1380 #define ASC_LIB_SCSIQ_WK_SP 256
1381 #define ASC_MAX_SYN_XFER_NO 16
1382 #define ASC_SYN_MAX_OFFSET 0x0F
1383 #define ASC_DEF_SDTR_OFFSET 0x0F
1384 #define ASC_DEF_SDTR_INDEX 0x00
1385 #define ASC_SDTR_ULTRA_PCI_10MB_INDEX 0x02
1386 #define SYN_XFER_NS_0 25
1387 #define SYN_XFER_NS_1 30
1388 #define SYN_XFER_NS_2 35
1389 #define SYN_XFER_NS_3 40
1390 #define SYN_XFER_NS_4 50
1391 #define SYN_XFER_NS_5 60
1392 #define SYN_XFER_NS_6 70
1393 #define SYN_XFER_NS_7 85
1394 #define SYN_ULTRA_XFER_NS_0 12
1395 #define SYN_ULTRA_XFER_NS_1 19
1396 #define SYN_ULTRA_XFER_NS_2 25
1397 #define SYN_ULTRA_XFER_NS_3 32
1398 #define SYN_ULTRA_XFER_NS_4 38
1399 #define SYN_ULTRA_XFER_NS_5 44
1400 #define SYN_ULTRA_XFER_NS_6 50
1401 #define SYN_ULTRA_XFER_NS_7 57
1402 #define SYN_ULTRA_XFER_NS_8 63
1403 #define SYN_ULTRA_XFER_NS_9 69
1404 #define SYN_ULTRA_XFER_NS_10 75
1405 #define SYN_ULTRA_XFER_NS_11 82
1406 #define SYN_ULTRA_XFER_NS_12 88
1407 #define SYN_ULTRA_XFER_NS_13 94
1408 #define SYN_ULTRA_XFER_NS_14 100
1409 #define SYN_ULTRA_XFER_NS_15 107
1411 typedef struct ext_msg
{
1417 uchar sdtr_xfer_period
;
1418 uchar sdtr_req_ack_offset
;
1433 #define xfer_period u_ext_msg.sdtr.sdtr_xfer_period
1434 #define req_ack_offset u_ext_msg.sdtr.sdtr_req_ack_offset
1435 #define wdtr_width u_ext_msg.wdtr.wdtr_width
1436 #define mdp_b3 u_ext_msg.mdp_b3
1437 #define mdp_b2 u_ext_msg.mdp_b2
1438 #define mdp_b1 u_ext_msg.mdp_b1
1439 #define mdp_b0 u_ext_msg.mdp_b0
1441 typedef struct asc_dvc_cfg
{
1442 ASC_SCSI_BIT_ID_TYPE can_tagged_qng
;
1443 ASC_SCSI_BIT_ID_TYPE cmd_qng_enabled
;
1444 ASC_SCSI_BIT_ID_TYPE disc_enable
;
1445 ASC_SCSI_BIT_ID_TYPE sdtr_enable
;
1447 uchar isa_dma_speed
;
1448 uchar isa_dma_channel
;
1450 ushort lib_serial_no
;
1453 ushort mcode_version
;
1454 uchar max_tag_qng
[ASC_MAX_TID
+ 1];
1456 uchar sdtr_period_offset
[ASC_MAX_TID
+ 1];
1457 ushort pci_slot_info
;
1458 uchar adapter_info
[6];
1462 #define ASC_DEF_DVC_CNTL 0xFFFF
1463 #define ASC_DEF_CHIP_SCSI_ID 7
1464 #define ASC_DEF_ISA_DMA_SPEED 4
1465 #define ASC_INIT_STATE_NULL 0x0000
1466 #define ASC_INIT_STATE_BEG_GET_CFG 0x0001
1467 #define ASC_INIT_STATE_END_GET_CFG 0x0002
1468 #define ASC_INIT_STATE_BEG_SET_CFG 0x0004
1469 #define ASC_INIT_STATE_END_SET_CFG 0x0008
1470 #define ASC_INIT_STATE_BEG_LOAD_MC 0x0010
1471 #define ASC_INIT_STATE_END_LOAD_MC 0x0020
1472 #define ASC_INIT_STATE_BEG_INQUIRY 0x0040
1473 #define ASC_INIT_STATE_END_INQUIRY 0x0080
1474 #define ASC_INIT_RESET_SCSI_DONE 0x0100
1475 #define ASC_INIT_STATE_WITHOUT_EEP 0x8000
1476 #define ASC_BUG_FIX_IF_NOT_DWB 0x0001
1477 #define ASC_BUG_FIX_ASYN_USE_SYN 0x0002
1478 #define ASYN_SDTR_DATA_FIX_PCI_REV_AB 0x41
1479 #define ASC_MIN_TAGGED_CMD 7
1480 #define ASC_MAX_SCSI_RESET_WAIT 30
1482 struct asc_dvc_var
; /* Forward Declaration. */
1484 typedef void (*ASC_ISR_CALLBACK
) (struct asc_dvc_var
*, ASC_QDONE_INFO
*);
1485 typedef int (*ASC_EXE_CALLBACK
) (struct asc_dvc_var
*, ASC_SCSI_Q
*);
1487 typedef struct asc_dvc_var
{
1491 ushort bug_fix_cntl
;
1493 ASC_ISR_CALLBACK isr_callback
;
1494 ASC_EXE_CALLBACK exe_callback
;
1495 ASC_SCSI_BIT_ID_TYPE init_sdtr
;
1496 ASC_SCSI_BIT_ID_TYPE sdtr_done
;
1497 ASC_SCSI_BIT_ID_TYPE use_tagged_qng
;
1498 ASC_SCSI_BIT_ID_TYPE unit_not_ready
;
1499 ASC_SCSI_BIT_ID_TYPE queue_full_or_busy
;
1500 ASC_SCSI_BIT_ID_TYPE start_motor
;
1501 uchar scsi_reset_wait
;
1504 uchar max_total_qng
;
1505 uchar cur_total_qng
;
1506 uchar in_critical_cnt
;
1508 uchar last_q_shortage
;
1510 uchar cur_dvc_qng
[ASC_MAX_TID
+ 1];
1511 uchar max_dvc_qng
[ASC_MAX_TID
+ 1];
1512 ASC_SCSI_Q
*scsiq_busy_head
[ASC_MAX_TID
+ 1];
1513 ASC_SCSI_Q
*scsiq_busy_tail
[ASC_MAX_TID
+ 1];
1514 uchar sdtr_period_tbl
[ASC_MAX_SYN_XFER_NO
];
1516 ASC_SCSI_BIT_ID_TYPE pci_fix_asyn_xfer_always
;
1519 uchar dos_int13_table
[ASC_MAX_TID
+ 1];
1520 ASC_DCNT max_dma_count
;
1521 ASC_SCSI_BIT_ID_TYPE no_scam
;
1522 ASC_SCSI_BIT_ID_TYPE pci_fix_asyn_xfer
;
1523 uchar max_sdtr_index
;
1524 uchar host_init_sdtr_index
;
1525 struct asc_board
*drv_ptr
;
1529 typedef struct asc_dvc_inq_info
{
1530 uchar type
[ASC_MAX_TID
+ 1][ASC_MAX_LUN
+ 1];
1533 typedef struct asc_cap_info
{
1538 typedef struct asc_cap_info_array
{
1539 ASC_CAP_INFO cap_info
[ASC_MAX_TID
+ 1][ASC_MAX_LUN
+ 1];
1540 } ASC_CAP_INFO_ARRAY
;
1542 #define ASC_MCNTL_NO_SEL_TIMEOUT (ushort)0x0001
1543 #define ASC_MCNTL_NULL_TARGET (ushort)0x0002
1544 #define ASC_CNTL_INITIATOR (ushort)0x0001
1545 #define ASC_CNTL_BIOS_GT_1GB (ushort)0x0002
1546 #define ASC_CNTL_BIOS_GT_2_DISK (ushort)0x0004
1547 #define ASC_CNTL_BIOS_REMOVABLE (ushort)0x0008
1548 #define ASC_CNTL_NO_SCAM (ushort)0x0010
1549 #define ASC_CNTL_INT_MULTI_Q (ushort)0x0080
1550 #define ASC_CNTL_NO_LUN_SUPPORT (ushort)0x0040
1551 #define ASC_CNTL_NO_VERIFY_COPY (ushort)0x0100
1552 #define ASC_CNTL_RESET_SCSI (ushort)0x0200
1553 #define ASC_CNTL_INIT_INQUIRY (ushort)0x0400
1554 #define ASC_CNTL_INIT_VERBOSE (ushort)0x0800
1555 #define ASC_CNTL_SCSI_PARITY (ushort)0x1000
1556 #define ASC_CNTL_BURST_MODE (ushort)0x2000
1557 #define ASC_CNTL_SDTR_ENABLE_ULTRA (ushort)0x4000
1558 #define ASC_EEP_DVC_CFG_BEG_VL 2
1559 #define ASC_EEP_MAX_DVC_ADDR_VL 15
1560 #define ASC_EEP_DVC_CFG_BEG 32
1561 #define ASC_EEP_MAX_DVC_ADDR 45
1562 #define ASC_EEP_DEFINED_WORDS 10
1563 #define ASC_EEP_MAX_ADDR 63
1564 #define ASC_EEP_RES_WORDS 0
1565 #define ASC_EEP_MAX_RETRY 20
1566 #define ASC_MAX_INIT_BUSY_RETRY 8
1567 #define ASC_EEP_ISA_PNP_WSIZE 16
1570 * These macros keep the chip SCSI id and ISA DMA speed
1571 * bitfields in board order. C bitfields aren't portable
1572 * between big and little-endian platforms so they are
1576 #define ASC_EEP_GET_CHIP_ID(cfg) ((cfg)->id_speed & 0x0f)
1577 #define ASC_EEP_GET_DMA_SPD(cfg) (((cfg)->id_speed & 0xf0) >> 4)
1578 #define ASC_EEP_SET_CHIP_ID(cfg, sid) \
1579 ((cfg)->id_speed = ((cfg)->id_speed & 0xf0) | ((sid) & ASC_MAX_TID))
1580 #define ASC_EEP_SET_DMA_SPD(cfg, spd) \
1581 ((cfg)->id_speed = ((cfg)->id_speed & 0x0f) | ((spd) & 0x0f) << 4)
1583 typedef struct asceep_config
{
1590 uchar max_total_qng
;
1593 uchar power_up_wait
;
1595 uchar id_speed
; /* low order 4 bits is chip scsi id */
1596 /* high order 4 bits is isa dma speed */
1597 uchar dos_int13_table
[ASC_MAX_TID
+ 1];
1598 uchar adapter_info
[6];
1603 #define ASC_PCI_CFG_LSW_SCSI_PARITY 0x0800
1604 #define ASC_PCI_CFG_LSW_BURST_MODE 0x0080
1605 #define ASC_PCI_CFG_LSW_INTR_ABLE 0x0020
1607 #define ASC_EEP_CMD_READ 0x80
1608 #define ASC_EEP_CMD_WRITE 0x40
1609 #define ASC_EEP_CMD_WRITE_ABLE 0x30
1610 #define ASC_EEP_CMD_WRITE_DISABLE 0x00
1611 #define ASC_OVERRUN_BSIZE 0x00000048UL
1612 #define ASC_CTRL_BREAK_ONCE 0x0001
1613 #define ASC_CTRL_BREAK_STAY_IDLE 0x0002
1614 #define ASCV_MSGOUT_BEG 0x0000
1615 #define ASCV_MSGOUT_SDTR_PERIOD (ASCV_MSGOUT_BEG+3)
1616 #define ASCV_MSGOUT_SDTR_OFFSET (ASCV_MSGOUT_BEG+4)
1617 #define ASCV_BREAK_SAVED_CODE (ushort)0x0006
1618 #define ASCV_MSGIN_BEG (ASCV_MSGOUT_BEG+8)
1619 #define ASCV_MSGIN_SDTR_PERIOD (ASCV_MSGIN_BEG+3)
1620 #define ASCV_MSGIN_SDTR_OFFSET (ASCV_MSGIN_BEG+4)
1621 #define ASCV_SDTR_DATA_BEG (ASCV_MSGIN_BEG+8)
1622 #define ASCV_SDTR_DONE_BEG (ASCV_SDTR_DATA_BEG+8)
1623 #define ASCV_MAX_DVC_QNG_BEG (ushort)0x0020
1624 #define ASCV_BREAK_ADDR (ushort)0x0028
1625 #define ASCV_BREAK_NOTIFY_COUNT (ushort)0x002A
1626 #define ASCV_BREAK_CONTROL (ushort)0x002C
1627 #define ASCV_BREAK_HIT_COUNT (ushort)0x002E
1629 #define ASCV_ASCDVC_ERR_CODE_W (ushort)0x0030
1630 #define ASCV_MCODE_CHKSUM_W (ushort)0x0032
1631 #define ASCV_MCODE_SIZE_W (ushort)0x0034
1632 #define ASCV_STOP_CODE_B (ushort)0x0036
1633 #define ASCV_DVC_ERR_CODE_B (ushort)0x0037
1634 #define ASCV_OVERRUN_PADDR_D (ushort)0x0038
1635 #define ASCV_OVERRUN_BSIZE_D (ushort)0x003C
1636 #define ASCV_HALTCODE_W (ushort)0x0040
1637 #define ASCV_CHKSUM_W (ushort)0x0042
1638 #define ASCV_MC_DATE_W (ushort)0x0044
1639 #define ASCV_MC_VER_W (ushort)0x0046
1640 #define ASCV_NEXTRDY_B (ushort)0x0048
1641 #define ASCV_DONENEXT_B (ushort)0x0049
1642 #define ASCV_USE_TAGGED_QNG_B (ushort)0x004A
1643 #define ASCV_SCSIBUSY_B (ushort)0x004B
1644 #define ASCV_Q_DONE_IN_PROGRESS_B (ushort)0x004C
1645 #define ASCV_CURCDB_B (ushort)0x004D
1646 #define ASCV_RCLUN_B (ushort)0x004E
1647 #define ASCV_BUSY_QHEAD_B (ushort)0x004F
1648 #define ASCV_DISC1_QHEAD_B (ushort)0x0050
1649 #define ASCV_DISC_ENABLE_B (ushort)0x0052
1650 #define ASCV_CAN_TAGGED_QNG_B (ushort)0x0053
1651 #define ASCV_HOSTSCSI_ID_B (ushort)0x0055
1652 #define ASCV_MCODE_CNTL_B (ushort)0x0056
1653 #define ASCV_NULL_TARGET_B (ushort)0x0057
1654 #define ASCV_FREE_Q_HEAD_W (ushort)0x0058
1655 #define ASCV_DONE_Q_TAIL_W (ushort)0x005A
1656 #define ASCV_FREE_Q_HEAD_B (ushort)(ASCV_FREE_Q_HEAD_W+1)
1657 #define ASCV_DONE_Q_TAIL_B (ushort)(ASCV_DONE_Q_TAIL_W+1)
1658 #define ASCV_HOST_FLAG_B (ushort)0x005D
1659 #define ASCV_TOTAL_READY_Q_B (ushort)0x0064
1660 #define ASCV_VER_SERIAL_B (ushort)0x0065
1661 #define ASCV_HALTCODE_SAVED_W (ushort)0x0066
1662 #define ASCV_WTM_FLAG_B (ushort)0x0068
1663 #define ASCV_RISC_FLAG_B (ushort)0x006A
1664 #define ASCV_REQ_SG_LIST_QP (ushort)0x006B
1665 #define ASC_HOST_FLAG_IN_ISR 0x01
1666 #define ASC_HOST_FLAG_ACK_INT 0x02
1667 #define ASC_RISC_FLAG_GEN_INT 0x01
1668 #define ASC_RISC_FLAG_REQ_SG_LIST 0x02
1669 #define IOP_CTRL (0x0F)
1670 #define IOP_STATUS (0x0E)
1671 #define IOP_INT_ACK IOP_STATUS
1672 #define IOP_REG_IFC (0x0D)
1673 #define IOP_SYN_OFFSET (0x0B)
1674 #define IOP_EXTRA_CONTROL (0x0D)
1675 #define IOP_REG_PC (0x0C)
1676 #define IOP_RAM_ADDR (0x0A)
1677 #define IOP_RAM_DATA (0x08)
1678 #define IOP_EEP_DATA (0x06)
1679 #define IOP_EEP_CMD (0x07)
1680 #define IOP_VERSION (0x03)
1681 #define IOP_CONFIG_HIGH (0x04)
1682 #define IOP_CONFIG_LOW (0x02)
1683 #define IOP_SIG_BYTE (0x01)
1684 #define IOP_SIG_WORD (0x00)
1685 #define IOP_REG_DC1 (0x0E)
1686 #define IOP_REG_DC0 (0x0C)
1687 #define IOP_REG_SB (0x0B)
1688 #define IOP_REG_DA1 (0x0A)
1689 #define IOP_REG_DA0 (0x08)
1690 #define IOP_REG_SC (0x09)
1691 #define IOP_DMA_SPEED (0x07)
1692 #define IOP_REG_FLAG (0x07)
1693 #define IOP_FIFO_H (0x06)
1694 #define IOP_FIFO_L (0x04)
1695 #define IOP_REG_ID (0x05)
1696 #define IOP_REG_QP (0x03)
1697 #define IOP_REG_IH (0x02)
1698 #define IOP_REG_IX (0x01)
1699 #define IOP_REG_AX (0x00)
1700 #define IFC_REG_LOCK (0x00)
1701 #define IFC_REG_UNLOCK (0x09)
1702 #define IFC_WR_EN_FILTER (0x10)
1703 #define IFC_RD_NO_EEPROM (0x10)
1704 #define IFC_SLEW_RATE (0x20)
1705 #define IFC_ACT_NEG (0x40)
1706 #define IFC_INP_FILTER (0x80)
1707 #define IFC_INIT_DEFAULT (IFC_ACT_NEG | IFC_REG_UNLOCK)
1708 #define SC_SEL (uchar)(0x80)
1709 #define SC_BSY (uchar)(0x40)
1710 #define SC_ACK (uchar)(0x20)
1711 #define SC_REQ (uchar)(0x10)
1712 #define SC_ATN (uchar)(0x08)
1713 #define SC_IO (uchar)(0x04)
1714 #define SC_CD (uchar)(0x02)
1715 #define SC_MSG (uchar)(0x01)
1716 #define SEC_SCSI_CTL (uchar)(0x80)
1717 #define SEC_ACTIVE_NEGATE (uchar)(0x40)
1718 #define SEC_SLEW_RATE (uchar)(0x20)
1719 #define SEC_ENABLE_FILTER (uchar)(0x10)
1720 #define ASC_HALT_EXTMSG_IN (ushort)0x8000
1721 #define ASC_HALT_CHK_CONDITION (ushort)0x8100
1722 #define ASC_HALT_SS_QUEUE_FULL (ushort)0x8200
1723 #define ASC_HALT_DISABLE_ASYN_USE_SYN_FIX (ushort)0x8300
1724 #define ASC_HALT_ENABLE_ASYN_USE_SYN_FIX (ushort)0x8400
1725 #define ASC_HALT_SDTR_REJECTED (ushort)0x4000
1726 #define ASC_HALT_HOST_COPY_SG_LIST_TO_RISC ( ushort )0x2000
1727 #define ASC_MAX_QNO 0xF8
1728 #define ASC_DATA_SEC_BEG (ushort)0x0080
1729 #define ASC_DATA_SEC_END (ushort)0x0080
1730 #define ASC_CODE_SEC_BEG (ushort)0x0080
1731 #define ASC_CODE_SEC_END (ushort)0x0080
1732 #define ASC_QADR_BEG (0x4000)
1733 #define ASC_QADR_USED (ushort)(ASC_MAX_QNO * 64)
1734 #define ASC_QADR_END (ushort)0x7FFF
1735 #define ASC_QLAST_ADR (ushort)0x7FC0
1736 #define ASC_QBLK_SIZE 0x40
1737 #define ASC_BIOS_DATA_QBEG 0xF8
1738 #define ASC_MIN_ACTIVE_QNO 0x01
1739 #define ASC_QLINK_END 0xFF
1740 #define ASC_EEPROM_WORDS 0x10
1741 #define ASC_MAX_MGS_LEN 0x10
1742 #define ASC_BIOS_ADDR_DEF 0xDC00
1743 #define ASC_BIOS_SIZE 0x3800
1744 #define ASC_BIOS_RAM_OFF 0x3800
1745 #define ASC_BIOS_RAM_SIZE 0x800
1746 #define ASC_BIOS_MIN_ADDR 0xC000
1747 #define ASC_BIOS_MAX_ADDR 0xEC00
1748 #define ASC_BIOS_BANK_SIZE 0x0400
1749 #define ASC_MCODE_START_ADDR 0x0080
1750 #define ASC_CFG0_HOST_INT_ON 0x0020
1751 #define ASC_CFG0_BIOS_ON 0x0040
1752 #define ASC_CFG0_VERA_BURST_ON 0x0080
1753 #define ASC_CFG0_SCSI_PARITY_ON 0x0800
1754 #define ASC_CFG1_SCSI_TARGET_ON 0x0080
1755 #define ASC_CFG1_LRAM_8BITS_ON 0x0800
1756 #define ASC_CFG_MSW_CLR_MASK 0x3080
1757 #define CSW_TEST1 (ASC_CS_TYPE)0x8000
1758 #define CSW_AUTO_CONFIG (ASC_CS_TYPE)0x4000
1759 #define CSW_RESERVED1 (ASC_CS_TYPE)0x2000
1760 #define CSW_IRQ_WRITTEN (ASC_CS_TYPE)0x1000
1761 #define CSW_33MHZ_SELECTED (ASC_CS_TYPE)0x0800
1762 #define CSW_TEST2 (ASC_CS_TYPE)0x0400
1763 #define CSW_TEST3 (ASC_CS_TYPE)0x0200
1764 #define CSW_RESERVED2 (ASC_CS_TYPE)0x0100
1765 #define CSW_DMA_DONE (ASC_CS_TYPE)0x0080
1766 #define CSW_FIFO_RDY (ASC_CS_TYPE)0x0040
1767 #define CSW_EEP_READ_DONE (ASC_CS_TYPE)0x0020
1768 #define CSW_HALTED (ASC_CS_TYPE)0x0010
1769 #define CSW_SCSI_RESET_ACTIVE (ASC_CS_TYPE)0x0008
1770 #define CSW_PARITY_ERR (ASC_CS_TYPE)0x0004
1771 #define CSW_SCSI_RESET_LATCH (ASC_CS_TYPE)0x0002
1772 #define CSW_INT_PENDING (ASC_CS_TYPE)0x0001
1773 #define CIW_CLR_SCSI_RESET_INT (ASC_CS_TYPE)0x1000
1774 #define CIW_INT_ACK (ASC_CS_TYPE)0x0100
1775 #define CIW_TEST1 (ASC_CS_TYPE)0x0200
1776 #define CIW_TEST2 (ASC_CS_TYPE)0x0400
1777 #define CIW_SEL_33MHZ (ASC_CS_TYPE)0x0800
1778 #define CIW_IRQ_ACT (ASC_CS_TYPE)0x1000
1779 #define CC_CHIP_RESET (uchar)0x80
1780 #define CC_SCSI_RESET (uchar)0x40
1781 #define CC_HALT (uchar)0x20
1782 #define CC_SINGLE_STEP (uchar)0x10
1783 #define CC_DMA_ABLE (uchar)0x08
1784 #define CC_TEST (uchar)0x04
1785 #define CC_BANK_ONE (uchar)0x02
1786 #define CC_DIAG (uchar)0x01
1787 #define ASC_1000_ID0W 0x04C1
1788 #define ASC_1000_ID0W_FIX 0x00C1
1789 #define ASC_1000_ID1B 0x25
1790 #define ASC_EISA_BIG_IOP_GAP (0x1C30-0x0C50)
1791 #define ASC_EISA_SMALL_IOP_GAP (0x0020)
1792 #define ASC_EISA_MIN_IOP_ADDR (0x0C30)
1793 #define ASC_EISA_MAX_IOP_ADDR (0xFC50)
1794 #define ASC_EISA_REV_IOP_MASK (0x0C83)
1795 #define ASC_EISA_PID_IOP_MASK (0x0C80)
1796 #define ASC_EISA_CFG_IOP_MASK (0x0C86)
1797 #define ASC_GET_EISA_SLOT(iop) (PortAddr)((iop) & 0xF000)
1798 #define ASC_EISA_ID_740 0x01745004UL
1799 #define ASC_EISA_ID_750 0x01755004UL
1800 #define INS_HALTINT (ushort)0x6281
1801 #define INS_HALT (ushort)0x6280
1802 #define INS_SINT (ushort)0x6200
1803 #define INS_RFLAG_WTM (ushort)0x7380
1804 #define ASC_MC_SAVE_CODE_WSIZE 0x500
1805 #define ASC_MC_SAVE_DATA_WSIZE 0x40
1807 typedef struct asc_mc_saved
{
1808 ushort data
[ASC_MC_SAVE_DATA_WSIZE
];
1809 ushort code
[ASC_MC_SAVE_CODE_WSIZE
];
1812 #define AscGetQDoneInProgress(port) AscReadLramByte((port), ASCV_Q_DONE_IN_PROGRESS_B)
1813 #define AscPutQDoneInProgress(port, val) AscWriteLramByte((port), ASCV_Q_DONE_IN_PROGRESS_B, val)
1814 #define AscGetVarFreeQHead(port) AscReadLramWord((port), ASCV_FREE_Q_HEAD_W)
1815 #define AscGetVarDoneQTail(port) AscReadLramWord((port), ASCV_DONE_Q_TAIL_W)
1816 #define AscPutVarFreeQHead(port, val) AscWriteLramWord((port), ASCV_FREE_Q_HEAD_W, val)
1817 #define AscPutVarDoneQTail(port, val) AscWriteLramWord((port), ASCV_DONE_Q_TAIL_W, val)
1818 #define AscGetRiscVarFreeQHead(port) AscReadLramByte((port), ASCV_NEXTRDY_B)
1819 #define AscGetRiscVarDoneQTail(port) AscReadLramByte((port), ASCV_DONENEXT_B)
1820 #define AscPutRiscVarFreeQHead(port, val) AscWriteLramByte((port), ASCV_NEXTRDY_B, val)
1821 #define AscPutRiscVarDoneQTail(port, val) AscWriteLramByte((port), ASCV_DONENEXT_B, val)
1822 #define AscPutMCodeSDTRDoneAtID(port, id, data) AscWriteLramByte((port), (ushort)((ushort)ASCV_SDTR_DONE_BEG+(ushort)id), (data));
1823 #define AscGetMCodeSDTRDoneAtID(port, id) AscReadLramByte((port), (ushort)((ushort)ASCV_SDTR_DONE_BEG+(ushort)id));
1824 #define AscPutMCodeInitSDTRAtID(port, id, data) AscWriteLramByte((port), (ushort)((ushort)ASCV_SDTR_DATA_BEG+(ushort)id), data);
1825 #define AscGetMCodeInitSDTRAtID(port, id) AscReadLramByte((port), (ushort)((ushort)ASCV_SDTR_DATA_BEG+(ushort)id));
1826 #define AscSynIndexToPeriod(index) (uchar)(asc_dvc->sdtr_period_tbl[ (index) ])
1827 #define AscGetChipSignatureByte(port) (uchar)inp((port)+IOP_SIG_BYTE)
1828 #define AscGetChipSignatureWord(port) (ushort)inpw((port)+IOP_SIG_WORD)
1829 #define AscGetChipVerNo(port) (uchar)inp((port)+IOP_VERSION)
1830 #define AscGetChipCfgLsw(port) (ushort)inpw((port)+IOP_CONFIG_LOW)
1831 #define AscGetChipCfgMsw(port) (ushort)inpw((port)+IOP_CONFIG_HIGH)
1832 #define AscSetChipCfgLsw(port, data) outpw((port)+IOP_CONFIG_LOW, data)
1833 #define AscSetChipCfgMsw(port, data) outpw((port)+IOP_CONFIG_HIGH, data)
1834 #define AscGetChipEEPCmd(port) (uchar)inp((port)+IOP_EEP_CMD)
1835 #define AscSetChipEEPCmd(port, data) outp((port)+IOP_EEP_CMD, data)
1836 #define AscGetChipEEPData(port) (ushort)inpw((port)+IOP_EEP_DATA)
1837 #define AscSetChipEEPData(port, data) outpw((port)+IOP_EEP_DATA, data)
1838 #define AscGetChipLramAddr(port) (ushort)inpw((PortAddr)((port)+IOP_RAM_ADDR))
1839 #define AscSetChipLramAddr(port, addr) outpw((PortAddr)((port)+IOP_RAM_ADDR), addr)
1840 #define AscGetChipLramData(port) (ushort)inpw((port)+IOP_RAM_DATA)
1841 #define AscSetChipLramData(port, data) outpw((port)+IOP_RAM_DATA, data)
1842 #define AscGetChipIFC(port) (uchar)inp((port)+IOP_REG_IFC)
1843 #define AscSetChipIFC(port, data) outp((port)+IOP_REG_IFC, data)
1844 #define AscGetChipStatus(port) (ASC_CS_TYPE)inpw((port)+IOP_STATUS)
1845 #define AscSetChipStatus(port, cs_val) outpw((port)+IOP_STATUS, cs_val)
1846 #define AscGetChipControl(port) (uchar)inp((port)+IOP_CTRL)
1847 #define AscSetChipControl(port, cc_val) outp((port)+IOP_CTRL, cc_val)
1848 #define AscGetChipSyn(port) (uchar)inp((port)+IOP_SYN_OFFSET)
1849 #define AscSetChipSyn(port, data) outp((port)+IOP_SYN_OFFSET, data)
1850 #define AscSetPCAddr(port, data) outpw((port)+IOP_REG_PC, data)
1851 #define AscGetPCAddr(port) (ushort)inpw((port)+IOP_REG_PC)
1852 #define AscIsIntPending(port) (AscGetChipStatus(port) & (CSW_INT_PENDING | CSW_SCSI_RESET_LATCH))
1853 #define AscGetChipScsiID(port) ((AscGetChipCfgLsw(port) >> 8) & ASC_MAX_TID)
1854 #define AscGetExtraControl(port) (uchar)inp((port)+IOP_EXTRA_CONTROL)
1855 #define AscSetExtraControl(port, data) outp((port)+IOP_EXTRA_CONTROL, data)
1856 #define AscReadChipAX(port) (ushort)inpw((port)+IOP_REG_AX)
1857 #define AscWriteChipAX(port, data) outpw((port)+IOP_REG_AX, data)
1858 #define AscReadChipIX(port) (uchar)inp((port)+IOP_REG_IX)
1859 #define AscWriteChipIX(port, data) outp((port)+IOP_REG_IX, data)
1860 #define AscReadChipIH(port) (ushort)inpw((port)+IOP_REG_IH)
1861 #define AscWriteChipIH(port, data) outpw((port)+IOP_REG_IH, data)
1862 #define AscReadChipQP(port) (uchar)inp((port)+IOP_REG_QP)
1863 #define AscWriteChipQP(port, data) outp((port)+IOP_REG_QP, data)
1864 #define AscReadChipFIFO_L(port) (ushort)inpw((port)+IOP_REG_FIFO_L)
1865 #define AscWriteChipFIFO_L(port, data) outpw((port)+IOP_REG_FIFO_L, data)
1866 #define AscReadChipFIFO_H(port) (ushort)inpw((port)+IOP_REG_FIFO_H)
1867 #define AscWriteChipFIFO_H(port, data) outpw((port)+IOP_REG_FIFO_H, data)
1868 #define AscReadChipDmaSpeed(port) (uchar)inp((port)+IOP_DMA_SPEED)
1869 #define AscWriteChipDmaSpeed(port, data) outp((port)+IOP_DMA_SPEED, data)
1870 #define AscReadChipDA0(port) (ushort)inpw((port)+IOP_REG_DA0)
1871 #define AscWriteChipDA0(port) outpw((port)+IOP_REG_DA0, data)
1872 #define AscReadChipDA1(port) (ushort)inpw((port)+IOP_REG_DA1)
1873 #define AscWriteChipDA1(port) outpw((port)+IOP_REG_DA1, data)
1874 #define AscReadChipDC0(port) (ushort)inpw((port)+IOP_REG_DC0)
1875 #define AscWriteChipDC0(port) outpw((port)+IOP_REG_DC0, data)
1876 #define AscReadChipDC1(port) (ushort)inpw((port)+IOP_REG_DC1)
1877 #define AscWriteChipDC1(port) outpw((port)+IOP_REG_DC1, data)
1878 #define AscReadChipDvcID(port) (uchar)inp((port)+IOP_REG_ID)
1879 #define AscWriteChipDvcID(port, data) outp((port)+IOP_REG_ID, data)
1881 static int AscWriteEEPCmdReg(PortAddr iop_base
, uchar cmd_reg
);
1882 static int AscWriteEEPDataReg(PortAddr iop_base
, ushort data_reg
);
1883 static void AscWaitEEPRead(void);
1884 static void AscWaitEEPWrite(void);
1885 static ushort
AscReadEEPWord(PortAddr
, uchar
);
1886 static ushort
AscWriteEEPWord(PortAddr
, uchar
, ushort
);
1887 static ushort
AscGetEEPConfig(PortAddr
, ASCEEP_CONFIG
*, ushort
);
1888 static int AscSetEEPConfigOnce(PortAddr
, ASCEEP_CONFIG
*, ushort
);
1889 static int AscSetEEPConfig(PortAddr
, ASCEEP_CONFIG
*, ushort
);
1890 static int AscStartChip(PortAddr
);
1891 static int AscStopChip(PortAddr
);
1892 static void AscSetChipIH(PortAddr
, ushort
);
1893 static int AscIsChipHalted(PortAddr
);
1894 static void AscAckInterrupt(PortAddr
);
1895 static void AscDisableInterrupt(PortAddr
);
1896 static void AscEnableInterrupt(PortAddr
);
1897 static void AscSetBank(PortAddr
, uchar
);
1898 static int AscResetChipAndScsiBus(ASC_DVC_VAR
*);
1900 static ushort
AscGetIsaDmaChannel(PortAddr
);
1901 static ushort
AscSetIsaDmaChannel(PortAddr
, ushort
);
1902 static uchar
AscSetIsaDmaSpeed(PortAddr
, uchar
);
1903 static uchar
AscGetIsaDmaSpeed(PortAddr
);
1904 #endif /* CONFIG_ISA */
1905 static uchar
AscReadLramByte(PortAddr
, ushort
);
1906 static ushort
AscReadLramWord(PortAddr
, ushort
);
1907 #if CC_VERY_LONG_SG_LIST
1908 static ASC_DCNT
AscReadLramDWord(PortAddr
, ushort
);
1909 #endif /* CC_VERY_LONG_SG_LIST */
1910 static void AscWriteLramWord(PortAddr
, ushort
, ushort
);
1911 static void AscWriteLramByte(PortAddr
, ushort
, uchar
);
1912 static ASC_DCNT
AscMemSumLramWord(PortAddr
, ushort
, int);
1913 static void AscMemWordSetLram(PortAddr
, ushort
, ushort
, int);
1914 static void AscMemWordCopyPtrToLram(PortAddr
, ushort
, uchar
*, int);
1915 static void AscMemDWordCopyPtrToLram(PortAddr
, ushort
, uchar
*, int);
1916 static void AscMemWordCopyPtrFromLram(PortAddr
, ushort
, uchar
*, int);
1917 static ushort
AscInitAscDvcVar(ASC_DVC_VAR
*);
1918 static ushort
AscInitFromEEP(ASC_DVC_VAR
*);
1919 static ushort
AscInitFromAscDvcVar(ASC_DVC_VAR
*);
1920 static ushort
AscInitMicroCodeVar(ASC_DVC_VAR
*);
1921 static int AscTestExternalLram(ASC_DVC_VAR
*);
1922 static uchar
AscMsgOutSDTR(ASC_DVC_VAR
*, uchar
, uchar
);
1923 static uchar
AscCalSDTRData(ASC_DVC_VAR
*, uchar
, uchar
);
1924 static void AscSetChipSDTR(PortAddr
, uchar
, uchar
);
1925 static uchar
AscGetSynPeriodIndex(ASC_DVC_VAR
*, uchar
);
1926 static uchar
AscAllocFreeQueue(PortAddr
, uchar
);
1927 static uchar
AscAllocMultipleFreeQueue(PortAddr
, uchar
, uchar
);
1928 static int AscHostReqRiscHalt(PortAddr
);
1929 static int AscStopQueueExe(PortAddr
);
1930 static int AscSendScsiQueue(ASC_DVC_VAR
*,
1931 ASC_SCSI_Q
*scsiq
, uchar n_q_required
);
1932 static int AscPutReadyQueue(ASC_DVC_VAR
*, ASC_SCSI_Q
*, uchar
);
1933 static int AscPutReadySgListQueue(ASC_DVC_VAR
*, ASC_SCSI_Q
*, uchar
);
1934 static int AscSetChipSynRegAtID(PortAddr
, uchar
, uchar
);
1935 static int AscSetRunChipSynRegAtID(PortAddr
, uchar
, uchar
);
1936 static ushort
AscInitLram(ASC_DVC_VAR
*);
1937 static ushort
AscInitQLinkVar(ASC_DVC_VAR
*);
1938 static int AscSetLibErrorCode(ASC_DVC_VAR
*, ushort
);
1939 static int AscIsrChipHalted(ASC_DVC_VAR
*);
1940 static uchar
_AscCopyLramScsiDoneQ(PortAddr
, ushort
,
1941 ASC_QDONE_INFO
*, ASC_DCNT
);
1942 static int AscIsrQDone(ASC_DVC_VAR
*);
1943 static int AscCompareString(uchar
*, uchar
*, int);
1945 static ushort
AscGetEisaChipCfg(PortAddr
);
1946 static ASC_DCNT
AscGetEisaProductID(PortAddr
);
1947 static PortAddr
AscSearchIOPortAddrEISA(PortAddr
);
1948 static PortAddr
AscSearchIOPortAddr11(PortAddr
);
1949 static PortAddr
AscSearchIOPortAddr(PortAddr
, ushort
);
1950 static void AscSetISAPNPWaitForKey(void);
1951 #endif /* CONFIG_ISA */
1952 static uchar
AscGetChipScsiCtrl(PortAddr
);
1953 static uchar
AscSetChipScsiID(PortAddr
, uchar
);
1954 static uchar
AscGetChipVersion(PortAddr
, ushort
);
1955 static ushort
AscGetChipBusType(PortAddr
);
1956 static ASC_DCNT
AscLoadMicroCode(PortAddr
, ushort
, uchar
*, ushort
);
1957 static int AscFindSignature(PortAddr
);
1958 static void AscToggleIRQAct(PortAddr
);
1959 static uchar
AscGetChipIRQ(PortAddr
, ushort
);
1960 static uchar
AscSetChipIRQ(PortAddr
, uchar
, ushort
);
1961 static ushort
AscGetChipBiosAddress(PortAddr
, ushort
);
1962 static inline ulong
DvcEnterCritical(void);
1963 static inline void DvcLeaveCritical(ulong
);
1965 static uchar
DvcReadPCIConfigByte(ASC_DVC_VAR
*, ushort
);
1966 static void DvcWritePCIConfigByte(ASC_DVC_VAR
*, ushort
, uchar
);
1967 #endif /* CONFIG_PCI */
1968 static ushort
AscGetChipBiosAddress(PortAddr
, ushort
);
1969 static void DvcSleepMilliSecond(ASC_DCNT
);
1970 static void DvcDelayNanoSecond(ASC_DVC_VAR
*, ASC_DCNT
);
1971 static void DvcPutScsiQ(PortAddr
, ushort
, uchar
*, int);
1972 static void DvcGetQinfo(PortAddr
, ushort
, uchar
*, int);
1973 static ushort
AscInitGetConfig(ASC_DVC_VAR
*);
1974 static ushort
AscInitSetConfig(ASC_DVC_VAR
*);
1975 static ushort
AscInitAsc1000Driver(ASC_DVC_VAR
*);
1976 static void AscAsyncFix(ASC_DVC_VAR
*, uchar
, ASC_SCSI_INQUIRY
*);
1977 static int AscTagQueuingSafe(ASC_SCSI_INQUIRY
*);
1978 static void AscInquiryHandling(ASC_DVC_VAR
*, uchar
, ASC_SCSI_INQUIRY
*);
1979 static int AscExeScsiQueue(ASC_DVC_VAR
*, ASC_SCSI_Q
*);
1980 static int AscISR(ASC_DVC_VAR
*);
1981 static uint
AscGetNumOfFreeQueue(ASC_DVC_VAR
*, uchar
, uchar
);
1982 static int AscSgListToQueue(int);
1984 static void AscEnableIsaDma(uchar
);
1985 #endif /* CONFIG_ISA */
1986 static ASC_DCNT
AscGetMaxDmaCount(ushort
);
1987 static const char *advansys_info(struct Scsi_Host
*shost
);
1990 * --- Adv Library Constants and Macros
1993 #define ADV_LIB_VERSION_MAJOR 5
1994 #define ADV_LIB_VERSION_MINOR 14
1997 * Define Adv Library required special types.
2001 * Portable Data Types
2003 * Any instance where a 32-bit long or pointer type is assumed
2004 * for precision or HW defined structures, the following define
2005 * types must be used. In Linux the char, short, and int types
2006 * are all consistent at 8, 16, and 32 bits respectively. Pointers
2007 * and long types are 64 bits on Alpha and UltraSPARC.
2009 #define ADV_PADDR __u32 /* Physical address data type. */
2010 #define ADV_VADDR __u32 /* Virtual address data type. */
2011 #define ADV_DCNT __u32 /* Unsigned Data count type. */
2012 #define ADV_SDCNT __s32 /* Signed Data count type. */
2015 * These macros are used to convert a virtual address to a
2016 * 32-bit value. This currently can be used on Linux Alpha
2017 * which uses 64-bit virtual address but a 32-bit bus address.
2018 * This is likely to break in the future, but doing this now
2019 * will give us time to change the HW and FW to handle 64-bit
2022 #define ADV_VADDR_TO_U32 virt_to_bus
2023 #define ADV_U32_TO_VADDR bus_to_virt
2025 #define AdvPortAddr void __iomem * /* Virtual memory address size */
2028 * Define Adv Library required memory access macros.
2030 #define ADV_MEM_READB(addr) readb(addr)
2031 #define ADV_MEM_READW(addr) readw(addr)
2032 #define ADV_MEM_WRITEB(addr, byte) writeb(byte, addr)
2033 #define ADV_MEM_WRITEW(addr, word) writew(word, addr)
2034 #define ADV_MEM_WRITEDW(addr, dword) writel(dword, addr)
2036 #define ADV_CARRIER_COUNT (ASC_DEF_MAX_HOST_QNG + 15)
2039 * For wide boards a CDB length maximum of 16 bytes
2042 #define ADV_MAX_CDB_LEN 16
2045 * Define total number of simultaneous maximum element scatter-gather
2046 * request blocks per wide adapter. ASC_DEF_MAX_HOST_QNG (253) is the
2047 * maximum number of outstanding commands per wide host adapter. Each
2048 * command uses one or more ADV_SG_BLOCK each with 15 scatter-gather
2049 * elements. Allow each command to have at least one ADV_SG_BLOCK structure.
2050 * This allows about 15 commands to have the maximum 17 ADV_SG_BLOCK
2051 * structures or 255 scatter-gather elements.
2054 #define ADV_TOT_SG_BLOCK ASC_DEF_MAX_HOST_QNG
2057 * Define Adv Library required maximum number of scatter-gather
2058 * elements per request.
2060 #define ADV_MAX_SG_LIST 255
2062 /* Number of SG blocks needed. */
2063 #define ADV_NUM_SG_BLOCK \
2064 ((ADV_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK)
2066 /* Total contiguous memory needed for SG blocks. */
2067 #define ADV_SG_TOTAL_MEM_SIZE \
2068 (sizeof(ADV_SG_BLOCK) * ADV_NUM_SG_BLOCK)
2070 #define ADV_PAGE_SIZE PAGE_SIZE
2072 #define ADV_NUM_PAGE_CROSSING \
2073 ((ADV_SG_TOTAL_MEM_SIZE + (ADV_PAGE_SIZE - 1))/ADV_PAGE_SIZE)
2075 #define ADV_EEP_DVC_CFG_BEGIN (0x00)
2076 #define ADV_EEP_DVC_CFG_END (0x15)
2077 #define ADV_EEP_DVC_CTL_BEGIN (0x16) /* location of OEM name */
2078 #define ADV_EEP_MAX_WORD_ADDR (0x1E)
2080 #define ADV_EEP_DELAY_MS 100
2082 #define ADV_EEPROM_BIG_ENDIAN 0x8000 /* EEPROM Bit 15 */
2083 #define ADV_EEPROM_BIOS_ENABLE 0x4000 /* EEPROM Bit 14 */
2085 * For the ASC3550 Bit 13 is Termination Polarity control bit.
2086 * For later ICs Bit 13 controls whether the CIS (Card Information
2087 * Service Section) is loaded from EEPROM.
2089 #define ADV_EEPROM_TERM_POL 0x2000 /* EEPROM Bit 13 */
2090 #define ADV_EEPROM_CIS_LD 0x2000 /* EEPROM Bit 13 */
2094 * If EEPROM Bit 11 is 0 for Function 0, then Function 0 will specify
2095 * INT A in the PCI Configuration Space Int Pin field. If it is 1, then
2096 * Function 0 will specify INT B.
2098 * If EEPROM Bit 11 is 0 for Function 1, then Function 1 will specify
2099 * INT B in the PCI Configuration Space Int Pin field. If it is 1, then
2100 * Function 1 will specify INT A.
2102 #define ADV_EEPROM_INTAB 0x0800 /* EEPROM Bit 11 */
2104 typedef struct adveep_3550_config
{
2105 /* Word Offset, Description */
2107 ushort cfg_lsw
; /* 00 power up initialization */
2108 /* bit 13 set - Term Polarity Control */
2109 /* bit 14 set - BIOS Enable */
2110 /* bit 15 set - Big Endian Mode */
2111 ushort cfg_msw
; /* 01 unused */
2112 ushort disc_enable
; /* 02 disconnect enable */
2113 ushort wdtr_able
; /* 03 Wide DTR able */
2114 ushort sdtr_able
; /* 04 Synchronous DTR able */
2115 ushort start_motor
; /* 05 send start up motor */
2116 ushort tagqng_able
; /* 06 tag queuing able */
2117 ushort bios_scan
; /* 07 BIOS device control */
2118 ushort scam_tolerant
; /* 08 no scam */
2120 uchar adapter_scsi_id
; /* 09 Host Adapter ID */
2121 uchar bios_boot_delay
; /* power up wait */
2123 uchar scsi_reset_delay
; /* 10 reset delay */
2124 uchar bios_id_lun
; /* first boot device scsi id & lun */
2125 /* high nibble is lun */
2126 /* low nibble is scsi id */
2128 uchar termination
; /* 11 0 - automatic */
2129 /* 1 - low off / high off */
2130 /* 2 - low off / high on */
2131 /* 3 - low on / high on */
2132 /* There is no low on / high off */
2134 uchar reserved1
; /* reserved byte (not used) */
2136 ushort bios_ctrl
; /* 12 BIOS control bits */
2137 /* bit 0 BIOS don't act as initiator. */
2138 /* bit 1 BIOS > 1 GB support */
2139 /* bit 2 BIOS > 2 Disk Support */
2140 /* bit 3 BIOS don't support removables */
2141 /* bit 4 BIOS support bootable CD */
2142 /* bit 5 BIOS scan enabled */
2143 /* bit 6 BIOS support multiple LUNs */
2144 /* bit 7 BIOS display of message */
2145 /* bit 8 SCAM disabled */
2146 /* bit 9 Reset SCSI bus during init. */
2148 /* bit 11 No verbose initialization. */
2149 /* bit 12 SCSI parity enabled */
2153 ushort ultra_able
; /* 13 ULTRA speed able */
2154 ushort reserved2
; /* 14 reserved */
2155 uchar max_host_qng
; /* 15 maximum host queuing */
2156 uchar max_dvc_qng
; /* maximum per device queuing */
2157 ushort dvc_cntl
; /* 16 control bit for driver */
2158 ushort bug_fix
; /* 17 control bit for bug fix */
2159 ushort serial_number_word1
; /* 18 Board serial number word 1 */
2160 ushort serial_number_word2
; /* 19 Board serial number word 2 */
2161 ushort serial_number_word3
; /* 20 Board serial number word 3 */
2162 ushort check_sum
; /* 21 EEP check sum */
2163 uchar oem_name
[16]; /* 22 OEM name */
2164 ushort dvc_err_code
; /* 30 last device driver error code */
2165 ushort adv_err_code
; /* 31 last uc and Adv Lib error code */
2166 ushort adv_err_addr
; /* 32 last uc error address */
2167 ushort saved_dvc_err_code
; /* 33 saved last dev. driver error code */
2168 ushort saved_adv_err_code
; /* 34 saved last uc and Adv Lib error code */
2169 ushort saved_adv_err_addr
; /* 35 saved last uc error address */
2170 ushort num_of_err
; /* 36 number of error */
2171 } ADVEEP_3550_CONFIG
;
2173 typedef struct adveep_38C0800_config
{
2174 /* Word Offset, Description */
2176 ushort cfg_lsw
; /* 00 power up initialization */
2177 /* bit 13 set - Load CIS */
2178 /* bit 14 set - BIOS Enable */
2179 /* bit 15 set - Big Endian Mode */
2180 ushort cfg_msw
; /* 01 unused */
2181 ushort disc_enable
; /* 02 disconnect enable */
2182 ushort wdtr_able
; /* 03 Wide DTR able */
2183 ushort sdtr_speed1
; /* 04 SDTR Speed TID 0-3 */
2184 ushort start_motor
; /* 05 send start up motor */
2185 ushort tagqng_able
; /* 06 tag queuing able */
2186 ushort bios_scan
; /* 07 BIOS device control */
2187 ushort scam_tolerant
; /* 08 no scam */
2189 uchar adapter_scsi_id
; /* 09 Host Adapter ID */
2190 uchar bios_boot_delay
; /* power up wait */
2192 uchar scsi_reset_delay
; /* 10 reset delay */
2193 uchar bios_id_lun
; /* first boot device scsi id & lun */
2194 /* high nibble is lun */
2195 /* low nibble is scsi id */
2197 uchar termination_se
; /* 11 0 - automatic */
2198 /* 1 - low off / high off */
2199 /* 2 - low off / high on */
2200 /* 3 - low on / high on */
2201 /* There is no low on / high off */
2203 uchar termination_lvd
; /* 11 0 - automatic */
2204 /* 1 - low off / high off */
2205 /* 2 - low off / high on */
2206 /* 3 - low on / high on */
2207 /* There is no low on / high off */
2209 ushort bios_ctrl
; /* 12 BIOS control bits */
2210 /* bit 0 BIOS don't act as initiator. */
2211 /* bit 1 BIOS > 1 GB support */
2212 /* bit 2 BIOS > 2 Disk Support */
2213 /* bit 3 BIOS don't support removables */
2214 /* bit 4 BIOS support bootable CD */
2215 /* bit 5 BIOS scan enabled */
2216 /* bit 6 BIOS support multiple LUNs */
2217 /* bit 7 BIOS display of message */
2218 /* bit 8 SCAM disabled */
2219 /* bit 9 Reset SCSI bus during init. */
2221 /* bit 11 No verbose initialization. */
2222 /* bit 12 SCSI parity enabled */
2226 ushort sdtr_speed2
; /* 13 SDTR speed TID 4-7 */
2227 ushort sdtr_speed3
; /* 14 SDTR speed TID 8-11 */
2228 uchar max_host_qng
; /* 15 maximum host queueing */
2229 uchar max_dvc_qng
; /* maximum per device queuing */
2230 ushort dvc_cntl
; /* 16 control bit for driver */
2231 ushort sdtr_speed4
; /* 17 SDTR speed 4 TID 12-15 */
2232 ushort serial_number_word1
; /* 18 Board serial number word 1 */
2233 ushort serial_number_word2
; /* 19 Board serial number word 2 */
2234 ushort serial_number_word3
; /* 20 Board serial number word 3 */
2235 ushort check_sum
; /* 21 EEP check sum */
2236 uchar oem_name
[16]; /* 22 OEM name */
2237 ushort dvc_err_code
; /* 30 last device driver error code */
2238 ushort adv_err_code
; /* 31 last uc and Adv Lib error code */
2239 ushort adv_err_addr
; /* 32 last uc error address */
2240 ushort saved_dvc_err_code
; /* 33 saved last dev. driver error code */
2241 ushort saved_adv_err_code
; /* 34 saved last uc and Adv Lib error code */
2242 ushort saved_adv_err_addr
; /* 35 saved last uc error address */
2243 ushort reserved36
; /* 36 reserved */
2244 ushort reserved37
; /* 37 reserved */
2245 ushort reserved38
; /* 38 reserved */
2246 ushort reserved39
; /* 39 reserved */
2247 ushort reserved40
; /* 40 reserved */
2248 ushort reserved41
; /* 41 reserved */
2249 ushort reserved42
; /* 42 reserved */
2250 ushort reserved43
; /* 43 reserved */
2251 ushort reserved44
; /* 44 reserved */
2252 ushort reserved45
; /* 45 reserved */
2253 ushort reserved46
; /* 46 reserved */
2254 ushort reserved47
; /* 47 reserved */
2255 ushort reserved48
; /* 48 reserved */
2256 ushort reserved49
; /* 49 reserved */
2257 ushort reserved50
; /* 50 reserved */
2258 ushort reserved51
; /* 51 reserved */
2259 ushort reserved52
; /* 52 reserved */
2260 ushort reserved53
; /* 53 reserved */
2261 ushort reserved54
; /* 54 reserved */
2262 ushort reserved55
; /* 55 reserved */
2263 ushort cisptr_lsw
; /* 56 CIS PTR LSW */
2264 ushort cisprt_msw
; /* 57 CIS PTR MSW */
2265 ushort subsysvid
; /* 58 SubSystem Vendor ID */
2266 ushort subsysid
; /* 59 SubSystem ID */
2267 ushort reserved60
; /* 60 reserved */
2268 ushort reserved61
; /* 61 reserved */
2269 ushort reserved62
; /* 62 reserved */
2270 ushort reserved63
; /* 63 reserved */
2271 } ADVEEP_38C0800_CONFIG
;
2273 typedef struct adveep_38C1600_config
{
2274 /* Word Offset, Description */
2276 ushort cfg_lsw
; /* 00 power up initialization */
2277 /* bit 11 set - Func. 0 INTB, Func. 1 INTA */
2278 /* clear - Func. 0 INTA, Func. 1 INTB */
2279 /* bit 13 set - Load CIS */
2280 /* bit 14 set - BIOS Enable */
2281 /* bit 15 set - Big Endian Mode */
2282 ushort cfg_msw
; /* 01 unused */
2283 ushort disc_enable
; /* 02 disconnect enable */
2284 ushort wdtr_able
; /* 03 Wide DTR able */
2285 ushort sdtr_speed1
; /* 04 SDTR Speed TID 0-3 */
2286 ushort start_motor
; /* 05 send start up motor */
2287 ushort tagqng_able
; /* 06 tag queuing able */
2288 ushort bios_scan
; /* 07 BIOS device control */
2289 ushort scam_tolerant
; /* 08 no scam */
2291 uchar adapter_scsi_id
; /* 09 Host Adapter ID */
2292 uchar bios_boot_delay
; /* power up wait */
2294 uchar scsi_reset_delay
; /* 10 reset delay */
2295 uchar bios_id_lun
; /* first boot device scsi id & lun */
2296 /* high nibble is lun */
2297 /* low nibble is scsi id */
2299 uchar termination_se
; /* 11 0 - automatic */
2300 /* 1 - low off / high off */
2301 /* 2 - low off / high on */
2302 /* 3 - low on / high on */
2303 /* There is no low on / high off */
2305 uchar termination_lvd
; /* 11 0 - automatic */
2306 /* 1 - low off / high off */
2307 /* 2 - low off / high on */
2308 /* 3 - low on / high on */
2309 /* There is no low on / high off */
2311 ushort bios_ctrl
; /* 12 BIOS control bits */
2312 /* bit 0 BIOS don't act as initiator. */
2313 /* bit 1 BIOS > 1 GB support */
2314 /* bit 2 BIOS > 2 Disk Support */
2315 /* bit 3 BIOS don't support removables */
2316 /* bit 4 BIOS support bootable CD */
2317 /* bit 5 BIOS scan enabled */
2318 /* bit 6 BIOS support multiple LUNs */
2319 /* bit 7 BIOS display of message */
2320 /* bit 8 SCAM disabled */
2321 /* bit 9 Reset SCSI bus during init. */
2322 /* bit 10 Basic Integrity Checking disabled */
2323 /* bit 11 No verbose initialization. */
2324 /* bit 12 SCSI parity enabled */
2325 /* bit 13 AIPP (Asyn. Info. Ph. Prot.) dis. */
2328 ushort sdtr_speed2
; /* 13 SDTR speed TID 4-7 */
2329 ushort sdtr_speed3
; /* 14 SDTR speed TID 8-11 */
2330 uchar max_host_qng
; /* 15 maximum host queueing */
2331 uchar max_dvc_qng
; /* maximum per device queuing */
2332 ushort dvc_cntl
; /* 16 control bit for driver */
2333 ushort sdtr_speed4
; /* 17 SDTR speed 4 TID 12-15 */
2334 ushort serial_number_word1
; /* 18 Board serial number word 1 */
2335 ushort serial_number_word2
; /* 19 Board serial number word 2 */
2336 ushort serial_number_word3
; /* 20 Board serial number word 3 */
2337 ushort check_sum
; /* 21 EEP check sum */
2338 uchar oem_name
[16]; /* 22 OEM name */
2339 ushort dvc_err_code
; /* 30 last device driver error code */
2340 ushort adv_err_code
; /* 31 last uc and Adv Lib error code */
2341 ushort adv_err_addr
; /* 32 last uc error address */
2342 ushort saved_dvc_err_code
; /* 33 saved last dev. driver error code */
2343 ushort saved_adv_err_code
; /* 34 saved last uc and Adv Lib error code */
2344 ushort saved_adv_err_addr
; /* 35 saved last uc error address */
2345 ushort reserved36
; /* 36 reserved */
2346 ushort reserved37
; /* 37 reserved */
2347 ushort reserved38
; /* 38 reserved */
2348 ushort reserved39
; /* 39 reserved */
2349 ushort reserved40
; /* 40 reserved */
2350 ushort reserved41
; /* 41 reserved */
2351 ushort reserved42
; /* 42 reserved */
2352 ushort reserved43
; /* 43 reserved */
2353 ushort reserved44
; /* 44 reserved */
2354 ushort reserved45
; /* 45 reserved */
2355 ushort reserved46
; /* 46 reserved */
2356 ushort reserved47
; /* 47 reserved */
2357 ushort reserved48
; /* 48 reserved */
2358 ushort reserved49
; /* 49 reserved */
2359 ushort reserved50
; /* 50 reserved */
2360 ushort reserved51
; /* 51 reserved */
2361 ushort reserved52
; /* 52 reserved */
2362 ushort reserved53
; /* 53 reserved */
2363 ushort reserved54
; /* 54 reserved */
2364 ushort reserved55
; /* 55 reserved */
2365 ushort cisptr_lsw
; /* 56 CIS PTR LSW */
2366 ushort cisprt_msw
; /* 57 CIS PTR MSW */
2367 ushort subsysvid
; /* 58 SubSystem Vendor ID */
2368 ushort subsysid
; /* 59 SubSystem ID */
2369 ushort reserved60
; /* 60 reserved */
2370 ushort reserved61
; /* 61 reserved */
2371 ushort reserved62
; /* 62 reserved */
2372 ushort reserved63
; /* 63 reserved */
2373 } ADVEEP_38C1600_CONFIG
;
2378 #define ASC_EEP_CMD_DONE 0x0200
2379 #define ASC_EEP_CMD_DONE_ERR 0x0001
2382 #define EEP_CFG_WORD_BIG_ENDIAN 0x8000
2385 #define BIOS_CTRL_BIOS 0x0001
2386 #define BIOS_CTRL_EXTENDED_XLAT 0x0002
2387 #define BIOS_CTRL_GT_2_DISK 0x0004
2388 #define BIOS_CTRL_BIOS_REMOVABLE 0x0008
2389 #define BIOS_CTRL_BOOTABLE_CD 0x0010
2390 #define BIOS_CTRL_MULTIPLE_LUN 0x0040
2391 #define BIOS_CTRL_DISPLAY_MSG 0x0080
2392 #define BIOS_CTRL_NO_SCAM 0x0100
2393 #define BIOS_CTRL_RESET_SCSI_BUS 0x0200
2394 #define BIOS_CTRL_INIT_VERBOSE 0x0800
2395 #define BIOS_CTRL_SCSI_PARITY 0x1000
2396 #define BIOS_CTRL_AIPP_DIS 0x2000
2398 #define ADV_3550_MEMSIZE 0x2000 /* 8 KB Internal Memory */
2399 #define ADV_3550_IOLEN 0x40 /* I/O Port Range in bytes */
2401 #define ADV_38C0800_MEMSIZE 0x4000 /* 16 KB Internal Memory */
2402 #define ADV_38C0800_IOLEN 0x100 /* I/O Port Range in bytes */
2405 * XXX - Since ASC38C1600 Rev.3 has a local RAM failure issue, there is
2406 * a special 16K Adv Library and Microcode version. After the issue is
2407 * resolved, should restore 32K support.
2409 * #define ADV_38C1600_MEMSIZE 0x8000L * 32 KB Internal Memory *
2411 #define ADV_38C1600_MEMSIZE 0x4000 /* 16 KB Internal Memory */
2412 #define ADV_38C1600_IOLEN 0x100 /* I/O Port Range 256 bytes */
2413 #define ADV_38C1600_MEMLEN 0x1000 /* Memory Range 4KB bytes */
2416 * Byte I/O register address from base of 'iop_base'.
2418 #define IOPB_INTR_STATUS_REG 0x00
2419 #define IOPB_CHIP_ID_1 0x01
2420 #define IOPB_INTR_ENABLES 0x02
2421 #define IOPB_CHIP_TYPE_REV 0x03
2422 #define IOPB_RES_ADDR_4 0x04
2423 #define IOPB_RES_ADDR_5 0x05
2424 #define IOPB_RAM_DATA 0x06
2425 #define IOPB_RES_ADDR_7 0x07
2426 #define IOPB_FLAG_REG 0x08
2427 #define IOPB_RES_ADDR_9 0x09
2428 #define IOPB_RISC_CSR 0x0A
2429 #define IOPB_RES_ADDR_B 0x0B
2430 #define IOPB_RES_ADDR_C 0x0C
2431 #define IOPB_RES_ADDR_D 0x0D
2432 #define IOPB_SOFT_OVER_WR 0x0E
2433 #define IOPB_RES_ADDR_F 0x0F
2434 #define IOPB_MEM_CFG 0x10
2435 #define IOPB_RES_ADDR_11 0x11
2436 #define IOPB_GPIO_DATA 0x12
2437 #define IOPB_RES_ADDR_13 0x13
2438 #define IOPB_FLASH_PAGE 0x14
2439 #define IOPB_RES_ADDR_15 0x15
2440 #define IOPB_GPIO_CNTL 0x16
2441 #define IOPB_RES_ADDR_17 0x17
2442 #define IOPB_FLASH_DATA 0x18
2443 #define IOPB_RES_ADDR_19 0x19
2444 #define IOPB_RES_ADDR_1A 0x1A
2445 #define IOPB_RES_ADDR_1B 0x1B
2446 #define IOPB_RES_ADDR_1C 0x1C
2447 #define IOPB_RES_ADDR_1D 0x1D
2448 #define IOPB_RES_ADDR_1E 0x1E
2449 #define IOPB_RES_ADDR_1F 0x1F
2450 #define IOPB_DMA_CFG0 0x20
2451 #define IOPB_DMA_CFG1 0x21
2452 #define IOPB_TICKLE 0x22
2453 #define IOPB_DMA_REG_WR 0x23
2454 #define IOPB_SDMA_STATUS 0x24
2455 #define IOPB_SCSI_BYTE_CNT 0x25
2456 #define IOPB_HOST_BYTE_CNT 0x26
2457 #define IOPB_BYTE_LEFT_TO_XFER 0x27
2458 #define IOPB_BYTE_TO_XFER_0 0x28
2459 #define IOPB_BYTE_TO_XFER_1 0x29
2460 #define IOPB_BYTE_TO_XFER_2 0x2A
2461 #define IOPB_BYTE_TO_XFER_3 0x2B
2462 #define IOPB_ACC_GRP 0x2C
2463 #define IOPB_RES_ADDR_2D 0x2D
2464 #define IOPB_DEV_ID 0x2E
2465 #define IOPB_RES_ADDR_2F 0x2F
2466 #define IOPB_SCSI_DATA 0x30
2467 #define IOPB_RES_ADDR_31 0x31
2468 #define IOPB_RES_ADDR_32 0x32
2469 #define IOPB_SCSI_DATA_HSHK 0x33
2470 #define IOPB_SCSI_CTRL 0x34
2471 #define IOPB_RES_ADDR_35 0x35
2472 #define IOPB_RES_ADDR_36 0x36
2473 #define IOPB_RES_ADDR_37 0x37
2474 #define IOPB_RAM_BIST 0x38
2475 #define IOPB_PLL_TEST 0x39
2476 #define IOPB_PCI_INT_CFG 0x3A
2477 #define IOPB_RES_ADDR_3B 0x3B
2478 #define IOPB_RFIFO_CNT 0x3C
2479 #define IOPB_RES_ADDR_3D 0x3D
2480 #define IOPB_RES_ADDR_3E 0x3E
2481 #define IOPB_RES_ADDR_3F 0x3F
2484 * Word I/O register address from base of 'iop_base'.
2486 #define IOPW_CHIP_ID_0 0x00 /* CID0 */
2487 #define IOPW_CTRL_REG 0x02 /* CC */
2488 #define IOPW_RAM_ADDR 0x04 /* LA */
2489 #define IOPW_RAM_DATA 0x06 /* LD */
2490 #define IOPW_RES_ADDR_08 0x08
2491 #define IOPW_RISC_CSR 0x0A /* CSR */
2492 #define IOPW_SCSI_CFG0 0x0C /* CFG0 */
2493 #define IOPW_SCSI_CFG1 0x0E /* CFG1 */
2494 #define IOPW_RES_ADDR_10 0x10
2495 #define IOPW_SEL_MASK 0x12 /* SM */
2496 #define IOPW_RES_ADDR_14 0x14
2497 #define IOPW_FLASH_ADDR 0x16 /* FA */
2498 #define IOPW_RES_ADDR_18 0x18
2499 #define IOPW_EE_CMD 0x1A /* EC */
2500 #define IOPW_EE_DATA 0x1C /* ED */
2501 #define IOPW_SFIFO_CNT 0x1E /* SFC */
2502 #define IOPW_RES_ADDR_20 0x20
2503 #define IOPW_Q_BASE 0x22 /* QB */
2504 #define IOPW_QP 0x24 /* QP */
2505 #define IOPW_IX 0x26 /* IX */
2506 #define IOPW_SP 0x28 /* SP */
2507 #define IOPW_PC 0x2A /* PC */
2508 #define IOPW_RES_ADDR_2C 0x2C
2509 #define IOPW_RES_ADDR_2E 0x2E
2510 #define IOPW_SCSI_DATA 0x30 /* SD */
2511 #define IOPW_SCSI_DATA_HSHK 0x32 /* SDH */
2512 #define IOPW_SCSI_CTRL 0x34 /* SC */
2513 #define IOPW_HSHK_CFG 0x36 /* HCFG */
2514 #define IOPW_SXFR_STATUS 0x36 /* SXS */
2515 #define IOPW_SXFR_CNTL 0x38 /* SXL */
2516 #define IOPW_SXFR_CNTH 0x3A /* SXH */
2517 #define IOPW_RES_ADDR_3C 0x3C
2518 #define IOPW_RFIFO_DATA 0x3E /* RFD */
2521 * Doubleword I/O register address from base of 'iop_base'.
2523 #define IOPDW_RES_ADDR_0 0x00
2524 #define IOPDW_RAM_DATA 0x04
2525 #define IOPDW_RES_ADDR_8 0x08
2526 #define IOPDW_RES_ADDR_C 0x0C
2527 #define IOPDW_RES_ADDR_10 0x10
2528 #define IOPDW_COMMA 0x14
2529 #define IOPDW_COMMB 0x18
2530 #define IOPDW_RES_ADDR_1C 0x1C
2531 #define IOPDW_SDMA_ADDR0 0x20
2532 #define IOPDW_SDMA_ADDR1 0x24
2533 #define IOPDW_SDMA_COUNT 0x28
2534 #define IOPDW_SDMA_ERROR 0x2C
2535 #define IOPDW_RDMA_ADDR0 0x30
2536 #define IOPDW_RDMA_ADDR1 0x34
2537 #define IOPDW_RDMA_COUNT 0x38
2538 #define IOPDW_RDMA_ERROR 0x3C
2540 #define ADV_CHIP_ID_BYTE 0x25
2541 #define ADV_CHIP_ID_WORD 0x04C1
2543 #define ADV_SC_SCSI_BUS_RESET 0x2000
2545 #define ADV_INTR_ENABLE_HOST_INTR 0x01
2546 #define ADV_INTR_ENABLE_SEL_INTR 0x02
2547 #define ADV_INTR_ENABLE_DPR_INTR 0x04
2548 #define ADV_INTR_ENABLE_RTA_INTR 0x08
2549 #define ADV_INTR_ENABLE_RMA_INTR 0x10
2550 #define ADV_INTR_ENABLE_RST_INTR 0x20
2551 #define ADV_INTR_ENABLE_DPE_INTR 0x40
2552 #define ADV_INTR_ENABLE_GLOBAL_INTR 0x80
2554 #define ADV_INTR_STATUS_INTRA 0x01
2555 #define ADV_INTR_STATUS_INTRB 0x02
2556 #define ADV_INTR_STATUS_INTRC 0x04
2558 #define ADV_RISC_CSR_STOP (0x0000)
2559 #define ADV_RISC_TEST_COND (0x2000)
2560 #define ADV_RISC_CSR_RUN (0x4000)
2561 #define ADV_RISC_CSR_SINGLE_STEP (0x8000)
2563 #define ADV_CTRL_REG_HOST_INTR 0x0100
2564 #define ADV_CTRL_REG_SEL_INTR 0x0200
2565 #define ADV_CTRL_REG_DPR_INTR 0x0400
2566 #define ADV_CTRL_REG_RTA_INTR 0x0800
2567 #define ADV_CTRL_REG_RMA_INTR 0x1000
2568 #define ADV_CTRL_REG_RES_BIT14 0x2000
2569 #define ADV_CTRL_REG_DPE_INTR 0x4000
2570 #define ADV_CTRL_REG_POWER_DONE 0x8000
2571 #define ADV_CTRL_REG_ANY_INTR 0xFF00
2573 #define ADV_CTRL_REG_CMD_RESET 0x00C6
2574 #define ADV_CTRL_REG_CMD_WR_IO_REG 0x00C5
2575 #define ADV_CTRL_REG_CMD_RD_IO_REG 0x00C4
2576 #define ADV_CTRL_REG_CMD_WR_PCI_CFG_SPACE 0x00C3
2577 #define ADV_CTRL_REG_CMD_RD_PCI_CFG_SPACE 0x00C2
2579 #define ADV_TICKLE_NOP 0x00
2580 #define ADV_TICKLE_A 0x01
2581 #define ADV_TICKLE_B 0x02
2582 #define ADV_TICKLE_C 0x03
2584 #define ADV_SCSI_CTRL_RSTOUT 0x2000
2586 #define AdvIsIntPending(port) \
2587 (AdvReadWordRegister(port, IOPW_CTRL_REG) & ADV_CTRL_REG_HOST_INTR)
2590 * SCSI_CFG0 Register bit definitions
2592 #define TIMER_MODEAB 0xC000 /* Watchdog, Second, and Select. Timer Ctrl. */
2593 #define PARITY_EN 0x2000 /* Enable SCSI Parity Error detection */
2594 #define EVEN_PARITY 0x1000 /* Select Even Parity */
2595 #define WD_LONG 0x0800 /* Watchdog Interval, 1: 57 min, 0: 13 sec */
2596 #define QUEUE_128 0x0400 /* Queue Size, 1: 128 byte, 0: 64 byte */
2597 #define PRIM_MODE 0x0100 /* Primitive SCSI mode */
2598 #define SCAM_EN 0x0080 /* Enable SCAM selection */
2599 #define SEL_TMO_LONG 0x0040 /* Sel/Resel Timeout, 1: 400 ms, 0: 1.6 ms */
2600 #define CFRM_ID 0x0020 /* SCAM id sel. confirm., 1: fast, 0: 6.4 ms */
2601 #define OUR_ID_EN 0x0010 /* Enable OUR_ID bits */
2602 #define OUR_ID 0x000F /* SCSI ID */
2605 * SCSI_CFG1 Register bit definitions
2607 #define BIG_ENDIAN 0x8000 /* Enable Big Endian Mode MIO:15, EEP:15 */
2608 #define TERM_POL 0x2000 /* Terminator Polarity Ctrl. MIO:13, EEP:13 */
2609 #define SLEW_RATE 0x1000 /* SCSI output buffer slew rate */
2610 #define FILTER_SEL 0x0C00 /* Filter Period Selection */
2611 #define FLTR_DISABLE 0x0000 /* Input Filtering Disabled */
2612 #define FLTR_11_TO_20NS 0x0800 /* Input Filtering 11ns to 20ns */
2613 #define FLTR_21_TO_39NS 0x0C00 /* Input Filtering 21ns to 39ns */
2614 #define ACTIVE_DBL 0x0200 /* Disable Active Negation */
2615 #define DIFF_MODE 0x0100 /* SCSI differential Mode (Read-Only) */
2616 #define DIFF_SENSE 0x0080 /* 1: No SE cables, 0: SE cable (Read-Only) */
2617 #define TERM_CTL_SEL 0x0040 /* Enable TERM_CTL_H and TERM_CTL_L */
2618 #define TERM_CTL 0x0030 /* External SCSI Termination Bits */
2619 #define TERM_CTL_H 0x0020 /* Enable External SCSI Upper Termination */
2620 #define TERM_CTL_L 0x0010 /* Enable External SCSI Lower Termination */
2621 #define CABLE_DETECT 0x000F /* External SCSI Cable Connection Status */
2624 * Addendum for ASC-38C0800 Chip
2626 * The ASC-38C1600 Chip uses the same definitions except that the
2627 * bus mode override bits [12:10] have been moved to byte register
2628 * offset 0xE (IOPB_SOFT_OVER_WR) bits [12:10]. The [12:10] bits in
2629 * SCSI_CFG1 are read-only and always available. Bit 14 (DIS_TERM_DRV)
2630 * is not needed. The [12:10] bits in IOPB_SOFT_OVER_WR are write-only.
2631 * Also each ASC-38C1600 function or channel uses only cable bits [5:4]
2632 * and [1:0]. Bits [14], [7:6], [3:2] are unused.
2634 #define DIS_TERM_DRV 0x4000 /* 1: Read c_det[3:0], 0: cannot read */
2635 #define HVD_LVD_SE 0x1C00 /* Device Detect Bits */
2636 #define HVD 0x1000 /* HVD Device Detect */
2637 #define LVD 0x0800 /* LVD Device Detect */
2638 #define SE 0x0400 /* SE Device Detect */
2639 #define TERM_LVD 0x00C0 /* LVD Termination Bits */
2640 #define TERM_LVD_HI 0x0080 /* Enable LVD Upper Termination */
2641 #define TERM_LVD_LO 0x0040 /* Enable LVD Lower Termination */
2642 #define TERM_SE 0x0030 /* SE Termination Bits */
2643 #define TERM_SE_HI 0x0020 /* Enable SE Upper Termination */
2644 #define TERM_SE_LO 0x0010 /* Enable SE Lower Termination */
2645 #define C_DET_LVD 0x000C /* LVD Cable Detect Bits */
2646 #define C_DET3 0x0008 /* Cable Detect for LVD External Wide */
2647 #define C_DET2 0x0004 /* Cable Detect for LVD Internal Wide */
2648 #define C_DET_SE 0x0003 /* SE Cable Detect Bits */
2649 #define C_DET1 0x0002 /* Cable Detect for SE Internal Wide */
2650 #define C_DET0 0x0001 /* Cable Detect for SE Internal Narrow */
2652 #define CABLE_ILLEGAL_A 0x7
2653 /* x 0 0 0 | on on | Illegal (all 3 connectors are used) */
2655 #define CABLE_ILLEGAL_B 0xB
2656 /* 0 x 0 0 | on on | Illegal (all 3 connectors are used) */
2659 * MEM_CFG Register bit definitions
2661 #define BIOS_EN 0x40 /* BIOS Enable MIO:14,EEP:14 */
2662 #define FAST_EE_CLK 0x20 /* Diagnostic Bit */
2663 #define RAM_SZ 0x1C /* Specify size of RAM to RISC */
2664 #define RAM_SZ_2KB 0x00 /* 2 KB */
2665 #define RAM_SZ_4KB 0x04 /* 4 KB */
2666 #define RAM_SZ_8KB 0x08 /* 8 KB */
2667 #define RAM_SZ_16KB 0x0C /* 16 KB */
2668 #define RAM_SZ_32KB 0x10 /* 32 KB */
2669 #define RAM_SZ_64KB 0x14 /* 64 KB */
2672 * DMA_CFG0 Register bit definitions
2674 * This register is only accessible to the host.
2676 #define BC_THRESH_ENB 0x80 /* PCI DMA Start Conditions */
2677 #define FIFO_THRESH 0x70 /* PCI DMA FIFO Threshold */
2678 #define FIFO_THRESH_16B 0x00 /* 16 bytes */
2679 #define FIFO_THRESH_32B 0x20 /* 32 bytes */
2680 #define FIFO_THRESH_48B 0x30 /* 48 bytes */
2681 #define FIFO_THRESH_64B 0x40 /* 64 bytes */
2682 #define FIFO_THRESH_80B 0x50 /* 80 bytes (default) */
2683 #define FIFO_THRESH_96B 0x60 /* 96 bytes */
2684 #define FIFO_THRESH_112B 0x70 /* 112 bytes */
2685 #define START_CTL 0x0C /* DMA start conditions */
2686 #define START_CTL_TH 0x00 /* Wait threshold level (default) */
2687 #define START_CTL_ID 0x04 /* Wait SDMA/SBUS idle */
2688 #define START_CTL_THID 0x08 /* Wait threshold and SDMA/SBUS idle */
2689 #define START_CTL_EMFU 0x0C /* Wait SDMA FIFO empty/full */
2690 #define READ_CMD 0x03 /* Memory Read Method */
2691 #define READ_CMD_MR 0x00 /* Memory Read */
2692 #define READ_CMD_MRL 0x02 /* Memory Read Long */
2693 #define READ_CMD_MRM 0x03 /* Memory Read Multiple (default) */
2696 * ASC-38C0800 RAM BIST Register bit definitions
2698 #define RAM_TEST_MODE 0x80
2699 #define PRE_TEST_MODE 0x40
2700 #define NORMAL_MODE 0x00
2701 #define RAM_TEST_DONE 0x10
2702 #define RAM_TEST_STATUS 0x0F
2703 #define RAM_TEST_HOST_ERROR 0x08
2704 #define RAM_TEST_INTRAM_ERROR 0x04
2705 #define RAM_TEST_RISC_ERROR 0x02
2706 #define RAM_TEST_SCSI_ERROR 0x01
2707 #define RAM_TEST_SUCCESS 0x00
2708 #define PRE_TEST_VALUE 0x05
2709 #define NORMAL_VALUE 0x00
2712 * ASC38C1600 Definitions
2714 * IOPB_PCI_INT_CFG Bit Field Definitions
2717 #define INTAB_LD 0x80 /* Value loaded from EEPROM Bit 11. */
2720 * Bit 1 can be set to change the interrupt for the Function to operate in
2721 * Totem Pole mode. By default Bit 1 is 0 and the interrupt operates in
2722 * Open Drain mode. Both functions of the ASC38C1600 must be set to the same
2723 * mode, otherwise the operating mode is undefined.
2725 #define TOTEMPOLE 0x02
2728 * Bit 0 can be used to change the Int Pin for the Function. The value is
2729 * 0 by default for both Functions with Function 0 using INT A and Function
2730 * B using INT B. For Function 0 if set, INT B is used. For Function 1 if set,
2733 * EEPROM Word 0 Bit 11 for each Function may change the initial Int Pin
2734 * value specified in the PCI Configuration Space.
2741 * Adv Library Status Definitions
2745 #define ADV_NOERROR 1
2746 #define ADV_SUCCESS 1
2748 #define ADV_ERROR (-1)
2751 * ADV_DVC_VAR 'warn_code' values
2753 #define ASC_WARN_BUSRESET_ERROR 0x0001 /* SCSI Bus Reset error */
2754 #define ASC_WARN_EEPROM_CHKSUM 0x0002 /* EEP check sum error */
2755 #define ASC_WARN_EEPROM_TERMINATION 0x0004 /* EEP termination bad field */
2756 #define ASC_WARN_SET_PCI_CONFIG_SPACE 0x0080 /* PCI config space set error */
2757 #define ASC_WARN_ERROR 0xFFFF /* ADV_ERROR return */
2759 #define ADV_MAX_TID 15 /* max. target identifier */
2760 #define ADV_MAX_LUN 7 /* max. logical unit number */
2763 * Error code values are set in ADV_DVC_VAR 'err_code'.
2765 #define ASC_IERR_WRITE_EEPROM 0x0001 /* write EEPROM error */
2766 #define ASC_IERR_MCODE_CHKSUM 0x0002 /* micro code check sum error */
2767 #define ASC_IERR_NO_CARRIER 0x0004 /* No more carrier memory. */
2768 #define ASC_IERR_START_STOP_CHIP 0x0008 /* start/stop chip failed */
2769 #define ASC_IERR_CHIP_VERSION 0x0040 /* wrong chip version */
2770 #define ASC_IERR_SET_SCSI_ID 0x0080 /* set SCSI ID failed */
2771 #define ASC_IERR_HVD_DEVICE 0x0100 /* HVD attached to LVD connector. */
2772 #define ASC_IERR_BAD_SIGNATURE 0x0200 /* signature not found */
2773 #define ASC_IERR_ILLEGAL_CONNECTION 0x0400 /* Illegal cable connection */
2774 #define ASC_IERR_SINGLE_END_DEVICE 0x0800 /* Single-end used w/differential */
2775 #define ASC_IERR_REVERSED_CABLE 0x1000 /* Narrow flat cable reversed */
2776 #define ASC_IERR_BIST_PRE_TEST 0x2000 /* BIST pre-test error */
2777 #define ASC_IERR_BIST_RAM_TEST 0x4000 /* BIST RAM test error */
2778 #define ASC_IERR_BAD_CHIPTYPE 0x8000 /* Invalid 'chip_type' setting. */
2781 * Fixed locations of microcode operating variables.
2783 #define ASC_MC_CODE_BEGIN_ADDR 0x0028 /* microcode start address */
2784 #define ASC_MC_CODE_END_ADDR 0x002A /* microcode end address */
2785 #define ASC_MC_CODE_CHK_SUM 0x002C /* microcode code checksum */
2786 #define ASC_MC_VERSION_DATE 0x0038 /* microcode version */
2787 #define ASC_MC_VERSION_NUM 0x003A /* microcode number */
2788 #define ASC_MC_BIOSMEM 0x0040 /* BIOS RISC Memory Start */
2789 #define ASC_MC_BIOSLEN 0x0050 /* BIOS RISC Memory Length */
2790 #define ASC_MC_BIOS_SIGNATURE 0x0058 /* BIOS Signature 0x55AA */
2791 #define ASC_MC_BIOS_VERSION 0x005A /* BIOS Version (2 bytes) */
2792 #define ASC_MC_SDTR_SPEED1 0x0090 /* SDTR Speed for TID 0-3 */
2793 #define ASC_MC_SDTR_SPEED2 0x0092 /* SDTR Speed for TID 4-7 */
2794 #define ASC_MC_SDTR_SPEED3 0x0094 /* SDTR Speed for TID 8-11 */
2795 #define ASC_MC_SDTR_SPEED4 0x0096 /* SDTR Speed for TID 12-15 */
2796 #define ASC_MC_CHIP_TYPE 0x009A
2797 #define ASC_MC_INTRB_CODE 0x009B
2798 #define ASC_MC_WDTR_ABLE 0x009C
2799 #define ASC_MC_SDTR_ABLE 0x009E
2800 #define ASC_MC_TAGQNG_ABLE 0x00A0
2801 #define ASC_MC_DISC_ENABLE 0x00A2
2802 #define ASC_MC_IDLE_CMD_STATUS 0x00A4
2803 #define ASC_MC_IDLE_CMD 0x00A6
2804 #define ASC_MC_IDLE_CMD_PARAMETER 0x00A8
2805 #define ASC_MC_DEFAULT_SCSI_CFG0 0x00AC
2806 #define ASC_MC_DEFAULT_SCSI_CFG1 0x00AE
2807 #define ASC_MC_DEFAULT_MEM_CFG 0x00B0
2808 #define ASC_MC_DEFAULT_SEL_MASK 0x00B2
2809 #define ASC_MC_SDTR_DONE 0x00B6
2810 #define ASC_MC_NUMBER_OF_QUEUED_CMD 0x00C0
2811 #define ASC_MC_NUMBER_OF_MAX_CMD 0x00D0
2812 #define ASC_MC_DEVICE_HSHK_CFG_TABLE 0x0100
2813 #define ASC_MC_CONTROL_FLAG 0x0122 /* Microcode control flag. */
2814 #define ASC_MC_WDTR_DONE 0x0124
2815 #define ASC_MC_CAM_MODE_MASK 0x015E /* CAM mode TID bitmask. */
2816 #define ASC_MC_ICQ 0x0160
2817 #define ASC_MC_IRQ 0x0164
2818 #define ASC_MC_PPR_ABLE 0x017A
2821 * BIOS LRAM variable absolute offsets.
2823 #define BIOS_CODESEG 0x54
2824 #define BIOS_CODELEN 0x56
2825 #define BIOS_SIGNATURE 0x58
2826 #define BIOS_VERSION 0x5A
2829 * Microcode Control Flags
2831 * Flags set by the Adv Library in RISC variable 'control_flag' (0x122)
2832 * and handled by the microcode.
2834 #define CONTROL_FLAG_IGNORE_PERR 0x0001 /* Ignore DMA Parity Errors */
2835 #define CONTROL_FLAG_ENABLE_AIPP 0x0002 /* Enabled AIPP checking. */
2838 * ASC_MC_DEVICE_HSHK_CFG_TABLE microcode table or HSHK_CFG register format
2840 #define HSHK_CFG_WIDE_XFR 0x8000
2841 #define HSHK_CFG_RATE 0x0F00
2842 #define HSHK_CFG_OFFSET 0x001F
2844 #define ASC_DEF_MAX_HOST_QNG 0xFD /* Max. number of host commands (253) */
2845 #define ASC_DEF_MIN_HOST_QNG 0x10 /* Min. number of host commands (16) */
2846 #define ASC_DEF_MAX_DVC_QNG 0x3F /* Max. number commands per device (63) */
2847 #define ASC_DEF_MIN_DVC_QNG 0x04 /* Min. number commands per device (4) */
2849 #define ASC_QC_DATA_CHECK 0x01 /* Require ASC_QC_DATA_OUT set or clear. */
2850 #define ASC_QC_DATA_OUT 0x02 /* Data out DMA transfer. */
2851 #define ASC_QC_START_MOTOR 0x04 /* Send auto-start motor before request. */
2852 #define ASC_QC_NO_OVERRUN 0x08 /* Don't report overrun. */
2853 #define ASC_QC_FREEZE_TIDQ 0x10 /* Freeze TID queue after request. XXX TBD */
2855 #define ASC_QSC_NO_DISC 0x01 /* Don't allow disconnect for request. */
2856 #define ASC_QSC_NO_TAGMSG 0x02 /* Don't allow tag queuing for request. */
2857 #define ASC_QSC_NO_SYNC 0x04 /* Don't use Synch. transfer on request. */
2858 #define ASC_QSC_NO_WIDE 0x08 /* Don't use Wide transfer on request. */
2859 #define ASC_QSC_REDO_DTR 0x10 /* Renegotiate WDTR/SDTR before request. */
2861 * Note: If a Tag Message is to be sent and neither ASC_QSC_HEAD_TAG or
2862 * ASC_QSC_ORDERED_TAG is set, then a Simple Tag Message (0x20) is used.
2864 #define ASC_QSC_HEAD_TAG 0x40 /* Use Head Tag Message (0x21). */
2865 #define ASC_QSC_ORDERED_TAG 0x80 /* Use Ordered Tag Message (0x22). */
2868 * All fields here are accessed by the board microcode and need to be
2871 typedef struct adv_carr_t
{
2872 ADV_VADDR carr_va
; /* Carrier Virtual Address */
2873 ADV_PADDR carr_pa
; /* Carrier Physical Address */
2874 ADV_VADDR areq_vpa
; /* ASC_SCSI_REQ_Q Virtual or Physical Address */
2876 * next_vpa [31:4] Carrier Virtual or Physical Next Pointer
2878 * next_vpa [3:1] Reserved Bits
2879 * next_vpa [0] Done Flag set in Response Queue.
2885 * Mask used to eliminate low 4 bits of carrier 'next_vpa' field.
2887 #define ASC_NEXT_VPA_MASK 0xFFFFFFF0
2889 #define ASC_RQ_DONE 0x00000001
2890 #define ASC_RQ_GOOD 0x00000002
2891 #define ASC_CQ_STOPPER 0x00000000
2893 #define ASC_GET_CARRP(carrp) ((carrp) & ASC_NEXT_VPA_MASK)
2895 #define ADV_CARRIER_NUM_PAGE_CROSSING \
2896 (((ADV_CARRIER_COUNT * sizeof(ADV_CARR_T)) + \
2897 (ADV_PAGE_SIZE - 1))/ADV_PAGE_SIZE)
2899 #define ADV_CARRIER_BUFSIZE \
2900 ((ADV_CARRIER_COUNT + ADV_CARRIER_NUM_PAGE_CROSSING) * sizeof(ADV_CARR_T))
2903 * ASC_SCSI_REQ_Q 'a_flag' definitions
2905 * The Adv Library should limit use to the lower nibble (4 bits) of
2906 * a_flag. Drivers are free to use the upper nibble (4 bits) of a_flag.
2908 #define ADV_POLL_REQUEST 0x01 /* poll for request completion */
2909 #define ADV_SCSIQ_DONE 0x02 /* request done */
2910 #define ADV_DONT_RETRY 0x08 /* don't do retry */
2912 #define ADV_CHIP_ASC3550 0x01 /* Ultra-Wide IC */
2913 #define ADV_CHIP_ASC38C0800 0x02 /* Ultra2-Wide/LVD IC */
2914 #define ADV_CHIP_ASC38C1600 0x03 /* Ultra3-Wide/LVD2 IC */
2917 * Adapter temporary configuration structure
2919 * This structure can be discarded after initialization. Don't add
2920 * fields here needed after initialization.
2922 * Field naming convention:
2924 * *_enable indicates the field enables or disables a feature. The
2925 * value of the field is never reset.
2927 typedef struct adv_dvc_cfg
{
2928 ushort disc_enable
; /* enable disconnection */
2929 uchar chip_version
; /* chip version */
2930 uchar termination
; /* Term. Ctrl. bits 6-5 of SCSI_CFG1 register */
2931 ushort lib_version
; /* Adv Library version number */
2932 ushort control_flag
; /* Microcode Control Flag */
2933 ushort mcode_date
; /* Microcode date */
2934 ushort mcode_version
; /* Microcode version */
2935 ushort pci_slot_info
; /* high byte device/function number */
2936 /* bits 7-3 device num., bits 2-0 function num. */
2937 /* low byte bus num. */
2938 ushort serial1
; /* EEPROM serial number word 1 */
2939 ushort serial2
; /* EEPROM serial number word 2 */
2940 ushort serial3
; /* EEPROM serial number word 3 */
2941 struct device
*dev
; /* pointer to the pci dev structure for this board */
2945 struct adv_scsi_req_q
;
2947 typedef void (*ADV_ISR_CALLBACK
)
2948 (struct adv_dvc_var
*, struct adv_scsi_req_q
*);
2950 typedef void (*ADV_ASYNC_CALLBACK
)
2951 (struct adv_dvc_var
*, uchar
);
2954 * Adapter operation variable structure.
2956 * One structure is required per host adapter.
2958 * Field naming convention:
2960 * *_able indicates both whether a feature should be enabled or disabled
2961 * and whether a device isi capable of the feature. At initialization
2962 * this field may be set, but later if a device is found to be incapable
2963 * of the feature, the field is cleared.
2965 typedef struct adv_dvc_var
{
2966 AdvPortAddr iop_base
; /* I/O port address */
2967 ushort err_code
; /* fatal error code */
2968 ushort bios_ctrl
; /* BIOS control word, EEPROM word 12 */
2969 ADV_ISR_CALLBACK isr_callback
;
2970 ADV_ASYNC_CALLBACK async_callback
;
2971 ushort wdtr_able
; /* try WDTR for a device */
2972 ushort sdtr_able
; /* try SDTR for a device */
2973 ushort ultra_able
; /* try SDTR Ultra speed for a device */
2974 ushort sdtr_speed1
; /* EEPROM SDTR Speed for TID 0-3 */
2975 ushort sdtr_speed2
; /* EEPROM SDTR Speed for TID 4-7 */
2976 ushort sdtr_speed3
; /* EEPROM SDTR Speed for TID 8-11 */
2977 ushort sdtr_speed4
; /* EEPROM SDTR Speed for TID 12-15 */
2978 ushort tagqng_able
; /* try tagged queuing with a device */
2979 ushort ppr_able
; /* PPR message capable per TID bitmask. */
2980 uchar max_dvc_qng
; /* maximum number of tagged commands per device */
2981 ushort start_motor
; /* start motor command allowed */
2982 uchar scsi_reset_wait
; /* delay in seconds after scsi bus reset */
2983 uchar chip_no
; /* should be assigned by caller */
2984 uchar max_host_qng
; /* maximum number of Q'ed command allowed */
2985 uchar irq_no
; /* IRQ number */
2986 ushort no_scam
; /* scam_tolerant of EEPROM */
2987 struct asc_board
*drv_ptr
; /* driver pointer to private structure */
2988 uchar chip_scsi_id
; /* chip SCSI target ID */
2990 uchar bist_err_code
;
2991 ADV_CARR_T
*carrier_buf
;
2992 ADV_CARR_T
*carr_freelist
; /* Carrier free list. */
2993 ADV_CARR_T
*icq_sp
; /* Initiator command queue stopper pointer. */
2994 ADV_CARR_T
*irq_sp
; /* Initiator response queue stopper pointer. */
2995 ushort carr_pending_cnt
; /* Count of pending carriers. */
2997 * Note: The following fields will not be used after initialization. The
2998 * driver may discard the buffer after initialization is done.
3000 ADV_DVC_CFG
*cfg
; /* temporary configuration structure */
3003 #define NO_OF_SG_PER_BLOCK 15
3005 typedef struct asc_sg_block
{
3009 uchar sg_cnt
; /* Valid entries in block. */
3010 ADV_PADDR sg_ptr
; /* Pointer to next sg block. */
3012 ADV_PADDR sg_addr
; /* SG element address. */
3013 ADV_DCNT sg_count
; /* SG element count. */
3014 } sg_list
[NO_OF_SG_PER_BLOCK
];
3018 * ADV_SCSI_REQ_Q - microcode request structure
3020 * All fields in this structure up to byte 60 are used by the microcode.
3021 * The microcode makes assumptions about the size and ordering of fields
3022 * in this structure. Do not change the structure definition here without
3023 * coordinating the change with the microcode.
3025 * All fields accessed by microcode must be maintained in little_endian
3028 typedef struct adv_scsi_req_q
{
3029 uchar cntl
; /* Ucode flags and state (ASC_MC_QC_*). */
3031 uchar target_id
; /* Device target identifier. */
3032 uchar target_lun
; /* Device target logical unit number. */
3033 ADV_PADDR data_addr
; /* Data buffer physical address. */
3034 ADV_DCNT data_cnt
; /* Data count. Ucode sets to residual. */
3035 ADV_PADDR sense_addr
;
3039 uchar cdb_len
; /* SCSI CDB length. Must <= 16 bytes. */
3041 uchar done_status
; /* Completion status. */
3042 uchar scsi_status
; /* SCSI status byte. */
3043 uchar host_status
; /* Ucode host status. */
3044 uchar sg_working_ix
;
3045 uchar cdb
[12]; /* SCSI CDB bytes 0-11. */
3046 ADV_PADDR sg_real_addr
; /* SG list physical address. */
3047 ADV_PADDR scsiq_rptr
;
3048 uchar cdb16
[4]; /* SCSI CDB bytes 12-15. */
3049 ADV_VADDR scsiq_ptr
;
3052 * End of microcode structure - 60 bytes. The rest of the structure
3053 * is used by the Adv Library and ignored by the microcode.
3056 ADV_SG_BLOCK
*sg_list_ptr
; /* SG list virtual address. */
3057 char *vdata_addr
; /* Data buffer virtual address. */
3059 uchar pad
[2]; /* Pad out to a word boundary. */
3063 * Microcode idle loop commands
3065 #define IDLE_CMD_COMPLETED 0
3066 #define IDLE_CMD_STOP_CHIP 0x0001
3067 #define IDLE_CMD_STOP_CHIP_SEND_INT 0x0002
3068 #define IDLE_CMD_SEND_INT 0x0004
3069 #define IDLE_CMD_ABORT 0x0008
3070 #define IDLE_CMD_DEVICE_RESET 0x0010
3071 #define IDLE_CMD_SCSI_RESET_START 0x0020 /* Assert SCSI Bus Reset */
3072 #define IDLE_CMD_SCSI_RESET_END 0x0040 /* Deassert SCSI Bus Reset */
3073 #define IDLE_CMD_SCSIREQ 0x0080
3075 #define IDLE_CMD_STATUS_SUCCESS 0x0001
3076 #define IDLE_CMD_STATUS_FAILURE 0x0002
3079 * AdvSendIdleCmd() flag definitions.
3081 #define ADV_NOWAIT 0x01
3084 * Wait loop time out values.
3086 #define SCSI_WAIT_10_SEC 10UL /* 10 seconds */
3087 #define SCSI_WAIT_100_MSEC 100UL /* 100 milliseconds */
3088 #define SCSI_US_PER_MSEC 1000 /* microseconds per millisecond */
3089 #define SCSI_MS_PER_SEC 1000UL /* milliseconds per second */
3090 #define SCSI_MAX_RETRY 10 /* retry count */
3092 #define ADV_ASYNC_RDMA_FAILURE 0x01 /* Fatal RDMA failure. */
3093 #define ADV_ASYNC_SCSI_BUS_RESET_DET 0x02 /* Detected SCSI Bus Reset. */
3094 #define ADV_ASYNC_CARRIER_READY_FAILURE 0x03 /* Carrier Ready failure. */
3095 #define ADV_RDMA_IN_CARR_AND_Q_INVALID 0x04 /* RDMAed-in data invalid. */
3097 #define ADV_HOST_SCSI_BUS_RESET 0x80 /* Host Initiated SCSI Bus Reset. */
3100 * Device drivers must define the following functions.
3102 static inline ulong
DvcEnterCritical(void);
3103 static inline void DvcLeaveCritical(ulong
);
3104 static void DvcSleepMilliSecond(ADV_DCNT
);
3105 static uchar
DvcAdvReadPCIConfigByte(ADV_DVC_VAR
*, ushort
);
3106 static void DvcAdvWritePCIConfigByte(ADV_DVC_VAR
*, ushort
, uchar
);
3107 static ADV_PADDR
DvcGetPhyAddr(ADV_DVC_VAR
*, ADV_SCSI_REQ_Q
*,
3108 uchar
*, ASC_SDCNT
*, int);
3109 static void DvcDelayMicroSecond(ADV_DVC_VAR
*, ushort
);
3112 * Adv Library functions available to drivers.
3114 static int AdvExeScsiQueue(ADV_DVC_VAR
*, ADV_SCSI_REQ_Q
*);
3115 static int AdvISR(ADV_DVC_VAR
*);
3116 static int AdvInitGetConfig(ADV_DVC_VAR
*);
3117 static int AdvInitAsc3550Driver(ADV_DVC_VAR
*);
3118 static int AdvInitAsc38C0800Driver(ADV_DVC_VAR
*);
3119 static int AdvInitAsc38C1600Driver(ADV_DVC_VAR
*);
3120 static int AdvResetChipAndSB(ADV_DVC_VAR
*);
3121 static int AdvResetSB(ADV_DVC_VAR
*asc_dvc
);
3124 * Internal Adv Library functions.
3126 static int AdvSendIdleCmd(ADV_DVC_VAR
*, ushort
, ADV_DCNT
);
3127 static void AdvInquiryHandling(ADV_DVC_VAR
*, ADV_SCSI_REQ_Q
*);
3128 static int AdvInitFrom3550EEP(ADV_DVC_VAR
*);
3129 static int AdvInitFrom38C0800EEP(ADV_DVC_VAR
*);
3130 static int AdvInitFrom38C1600EEP(ADV_DVC_VAR
*);
3131 static ushort
AdvGet3550EEPConfig(AdvPortAddr
, ADVEEP_3550_CONFIG
*);
3132 static void AdvSet3550EEPConfig(AdvPortAddr
, ADVEEP_3550_CONFIG
*);
3133 static ushort
AdvGet38C0800EEPConfig(AdvPortAddr
, ADVEEP_38C0800_CONFIG
*);
3134 static void AdvSet38C0800EEPConfig(AdvPortAddr
, ADVEEP_38C0800_CONFIG
*);
3135 static ushort
AdvGet38C1600EEPConfig(AdvPortAddr
, ADVEEP_38C1600_CONFIG
*);
3136 static void AdvSet38C1600EEPConfig(AdvPortAddr
, ADVEEP_38C1600_CONFIG
*);
3137 static void AdvWaitEEPCmd(AdvPortAddr
);
3138 static ushort
AdvReadEEPWord(AdvPortAddr
, int);
3141 * PCI Bus Definitions
3143 #define AscPCICmdRegBits_BusMastering 0x0007
3144 #define AscPCICmdRegBits_ParErrRespCtrl 0x0040
3146 /* Read byte from a register. */
3147 #define AdvReadByteRegister(iop_base, reg_off) \
3148 (ADV_MEM_READB((iop_base) + (reg_off)))
3150 /* Write byte to a register. */
3151 #define AdvWriteByteRegister(iop_base, reg_off, byte) \
3152 (ADV_MEM_WRITEB((iop_base) + (reg_off), (byte)))
3154 /* Read word (2 bytes) from a register. */
3155 #define AdvReadWordRegister(iop_base, reg_off) \
3156 (ADV_MEM_READW((iop_base) + (reg_off)))
3158 /* Write word (2 bytes) to a register. */
3159 #define AdvWriteWordRegister(iop_base, reg_off, word) \
3160 (ADV_MEM_WRITEW((iop_base) + (reg_off), (word)))
3162 /* Write dword (4 bytes) to a register. */
3163 #define AdvWriteDWordRegister(iop_base, reg_off, dword) \
3164 (ADV_MEM_WRITEDW((iop_base) + (reg_off), (dword)))
3166 /* Read byte from LRAM. */
3167 #define AdvReadByteLram(iop_base, addr, byte) \
3169 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)); \
3170 (byte) = ADV_MEM_READB((iop_base) + IOPB_RAM_DATA); \
3173 /* Write byte to LRAM. */
3174 #define AdvWriteByteLram(iop_base, addr, byte) \
3175 (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)), \
3176 ADV_MEM_WRITEB((iop_base) + IOPB_RAM_DATA, (byte)))
3178 /* Read word (2 bytes) from LRAM. */
3179 #define AdvReadWordLram(iop_base, addr, word) \
3181 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)); \
3182 (word) = (ADV_MEM_READW((iop_base) + IOPW_RAM_DATA)); \
3185 /* Write word (2 bytes) to LRAM. */
3186 #define AdvWriteWordLram(iop_base, addr, word) \
3187 (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)), \
3188 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, (word)))
3190 /* Write little-endian double word (4 bytes) to LRAM */
3191 /* Because of unspecified C language ordering don't use auto-increment. */
3192 #define AdvWriteDWordLramNoSwap(iop_base, addr, dword) \
3193 ((ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)), \
3194 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, \
3195 cpu_to_le16((ushort) ((dword) & 0xFFFF)))), \
3196 (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr) + 2), \
3197 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, \
3198 cpu_to_le16((ushort) ((dword >> 16) & 0xFFFF)))))
3200 /* Read word (2 bytes) from LRAM assuming that the address is already set. */
3201 #define AdvReadWordAutoIncLram(iop_base) \
3202 (ADV_MEM_READW((iop_base) + IOPW_RAM_DATA))
3204 /* Write word (2 bytes) to LRAM assuming that the address is already set. */
3205 #define AdvWriteWordAutoIncLram(iop_base, word) \
3206 (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, (word)))
3209 * Define macro to check for Condor signature.
3211 * Evaluate to ADV_TRUE if a Condor chip is found the specified port
3212 * address 'iop_base'. Otherwise evalue to ADV_FALSE.
3214 #define AdvFindSignature(iop_base) \
3215 (((AdvReadByteRegister((iop_base), IOPB_CHIP_ID_1) == \
3216 ADV_CHIP_ID_BYTE) && \
3217 (AdvReadWordRegister((iop_base), IOPW_CHIP_ID_0) == \
3218 ADV_CHIP_ID_WORD)) ? ADV_TRUE : ADV_FALSE)
3221 * Define macro to Return the version number of the chip at 'iop_base'.
3223 * The second parameter 'bus_type' is currently unused.
3225 #define AdvGetChipVersion(iop_base, bus_type) \
3226 AdvReadByteRegister((iop_base), IOPB_CHIP_TYPE_REV)
3229 * Abort an SRB in the chip's RISC Memory. The 'srb_ptr' argument must
3230 * match the ASC_SCSI_REQ_Q 'srb_ptr' field.
3232 * If the request has not yet been sent to the device it will simply be
3233 * aborted from RISC memory. If the request is disconnected it will be
3234 * aborted on reselection by sending an Abort Message to the target ID.
3237 * ADV_TRUE(1) - Queue was successfully aborted.
3238 * ADV_FALSE(0) - Queue was not found on the active queue list.
3240 #define AdvAbortQueue(asc_dvc, scsiq) \
3241 AdvSendIdleCmd((asc_dvc), (ushort) IDLE_CMD_ABORT, \
3245 * Send a Bus Device Reset Message to the specified target ID.
3247 * All outstanding commands will be purged if sending the
3248 * Bus Device Reset Message is successful.
3251 * ADV_TRUE(1) - All requests on the target are purged.
3252 * ADV_FALSE(0) - Couldn't issue Bus Device Reset Message; Requests
3255 #define AdvResetDevice(asc_dvc, target_id) \
3256 AdvSendIdleCmd((asc_dvc), (ushort) IDLE_CMD_DEVICE_RESET, \
3257 (ADV_DCNT) (target_id))
3260 * SCSI Wide Type definition.
3262 #define ADV_SCSI_BIT_ID_TYPE ushort
3265 * AdvInitScsiTarget() 'cntl_flag' options.
3267 #define ADV_SCAN_LUN 0x01
3268 #define ADV_CAPINFO_NOLUN 0x02
3271 * Convert target id to target id bit mask.
3273 #define ADV_TID_TO_TIDMASK(tid) (0x01 << ((tid) & ADV_MAX_TID))
3276 * ASC_SCSI_REQ_Q 'done_status' and 'host_status' return values.
3279 #define QD_NO_STATUS 0x00 /* Request not completed yet. */
3280 #define QD_NO_ERROR 0x01
3281 #define QD_ABORTED_BY_HOST 0x02
3282 #define QD_WITH_ERROR 0x04
3284 #define QHSTA_NO_ERROR 0x00
3285 #define QHSTA_M_SEL_TIMEOUT 0x11
3286 #define QHSTA_M_DATA_OVER_RUN 0x12
3287 #define QHSTA_M_UNEXPECTED_BUS_FREE 0x13
3288 #define QHSTA_M_QUEUE_ABORTED 0x15
3289 #define QHSTA_M_SXFR_SDMA_ERR 0x16 /* SXFR_STATUS SCSI DMA Error */
3290 #define QHSTA_M_SXFR_SXFR_PERR 0x17 /* SXFR_STATUS SCSI Bus Parity Error */
3291 #define QHSTA_M_RDMA_PERR 0x18 /* RISC PCI DMA parity error */
3292 #define QHSTA_M_SXFR_OFF_UFLW 0x19 /* SXFR_STATUS Offset Underflow */
3293 #define QHSTA_M_SXFR_OFF_OFLW 0x20 /* SXFR_STATUS Offset Overflow */
3294 #define QHSTA_M_SXFR_WD_TMO 0x21 /* SXFR_STATUS Watchdog Timeout */
3295 #define QHSTA_M_SXFR_DESELECTED 0x22 /* SXFR_STATUS Deselected */
3296 /* Note: QHSTA_M_SXFR_XFR_OFLW is identical to QHSTA_M_DATA_OVER_RUN. */
3297 #define QHSTA_M_SXFR_XFR_OFLW 0x12 /* SXFR_STATUS Transfer Overflow */
3298 #define QHSTA_M_SXFR_XFR_PH_ERR 0x24 /* SXFR_STATUS Transfer Phase Error */
3299 #define QHSTA_M_SXFR_UNKNOWN_ERROR 0x25 /* SXFR_STATUS Unknown Error */
3300 #define QHSTA_M_SCSI_BUS_RESET 0x30 /* Request aborted from SBR */
3301 #define QHSTA_M_SCSI_BUS_RESET_UNSOL 0x31 /* Request aborted from unsol. SBR */
3302 #define QHSTA_M_BUS_DEVICE_RESET 0x32 /* Request aborted from BDR */
3303 #define QHSTA_M_DIRECTION_ERR 0x35 /* Data Phase mismatch */
3304 #define QHSTA_M_DIRECTION_ERR_HUNG 0x36 /* Data Phase mismatch and bus hang */
3305 #define QHSTA_M_WTM_TIMEOUT 0x41
3306 #define QHSTA_M_BAD_CMPL_STATUS_IN 0x42
3307 #define QHSTA_M_NO_AUTO_REQ_SENSE 0x43
3308 #define QHSTA_M_AUTO_REQ_SENSE_FAIL 0x44
3309 #define QHSTA_M_INVALID_DEVICE 0x45 /* Bad target ID */
3310 #define QHSTA_M_FROZEN_TIDQ 0x46 /* TID Queue frozen. */
3311 #define QHSTA_M_SGBACKUP_ERROR 0x47 /* Scatter-Gather backup error */
3314 * Default EEPROM Configuration structure defined in a_init.c.
3316 static ADVEEP_3550_CONFIG Default_3550_EEPROM_Config
;
3317 static ADVEEP_38C0800_CONFIG Default_38C0800_EEPROM_Config
;
3318 static ADVEEP_38C1600_CONFIG Default_38C1600_EEPROM_Config
;
3321 * DvcGetPhyAddr() flag arguments
3323 #define ADV_IS_SCSIQ_FLAG 0x01 /* 'addr' is ASC_SCSI_REQ_Q pointer */
3324 #define ADV_ASCGETSGLIST_VADDR 0x02 /* 'addr' is AscGetSGList() virtual addr */
3325 #define ADV_IS_SENSE_FLAG 0x04 /* 'addr' is sense virtual pointer */
3326 #define ADV_IS_DATA_FLAG 0x08 /* 'addr' is data virtual pointer */
3327 #define ADV_IS_SGLIST_FLAG 0x10 /* 'addr' is sglist virtual pointer */
3328 #define ADV_IS_CARRIER_FLAG 0x20 /* 'addr' is ADV_CARR_T pointer */
3330 /* Return the address that is aligned at the next doubleword >= to 'addr'. */
3331 #define ADV_8BALIGN(addr) (((ulong) (addr) + 0x7) & ~0x7)
3332 #define ADV_16BALIGN(addr) (((ulong) (addr) + 0xF) & ~0xF)
3333 #define ADV_32BALIGN(addr) (((ulong) (addr) + 0x1F) & ~0x1F)
3336 * Total contiguous memory needed for driver SG blocks.
3338 * ADV_MAX_SG_LIST must be defined by a driver. It is the maximum
3339 * number of scatter-gather elements the driver supports in a
3343 #define ADV_SG_LIST_MAX_BYTE_SIZE \
3344 (sizeof(ADV_SG_BLOCK) * \
3345 ((ADV_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK))
3348 * Inquiry data structure and bitfield macros
3350 * Using bitfields to access the subchar data isn't portable across
3351 * endianness, so instead mask and shift. Only quantities of more
3352 * than 1 bit are shifted, since the others are just tested for true
3356 #define ADV_INQ_DVC_TYPE(inq) ((inq)->periph & 0x1f)
3357 #define ADV_INQ_QUALIFIER(inq) (((inq)->periph & 0xe0) >> 5)
3358 #define ADV_INQ_DVC_TYPE_MOD(inq) ((inq)->devtype & 0x7f)
3359 #define ADV_INQ_REMOVABLE(inq) ((inq)->devtype & 0x80)
3360 #define ADV_INQ_ANSI_VER(inq) ((inq)->ver & 0x07)
3361 #define ADV_INQ_ECMA_VER(inq) (((inq)->ver & 0x38) >> 3)
3362 #define ADV_INQ_ISO_VER(inq) (((inq)->ver & 0xc0) >> 6)
3363 #define ADV_INQ_RESPONSE_FMT(inq) ((inq)->byte3 & 0x0f)
3364 #define ADV_INQ_TERM_IO(inq) ((inq)->byte3 & 0x40)
3365 #define ADV_INQ_ASYNC_NOTIF(inq) ((inq)->byte3 & 0x80)
3366 #define ADV_INQ_SOFT_RESET(inq) ((inq)->flags & 0x01)
3367 #define ADV_INQ_CMD_QUEUE(inq) ((inq)->flags & 0x02)
3368 #define ADV_INQ_LINK_CMD(inq) ((inq)->flags & 0x08)
3369 #define ADV_INQ_SYNC(inq) ((inq)->flags & 0x10)
3370 #define ADV_INQ_WIDE16(inq) ((inq)->flags & 0x20)
3371 #define ADV_INQ_WIDE32(inq) ((inq)->flags & 0x40)
3372 #define ADV_INQ_REL_ADDR(inq) ((inq)->flags & 0x80)
3373 #define ADV_INQ_INFO_UNIT(inq) ((inq)->info & 0x01)
3374 #define ADV_INQ_QUICK_ARB(inq) ((inq)->info & 0x02)
3375 #define ADV_INQ_CLOCKING(inq) (((inq)->info & 0x0c) >> 2)
3378 uchar periph
; /* peripheral device type [0:4] */
3379 /* peripheral qualifier [5:7] */
3380 uchar devtype
; /* device type modifier (for SCSI I) [0:6] */
3381 /* RMB - removable medium bit [7] */
3382 uchar ver
; /* ANSI approved version [0:2] */
3383 /* ECMA version [3:5] */
3384 /* ISO version [6:7] */
3385 uchar byte3
; /* response data format [0:3] */
3390 /* reserved [4:5] */
3391 /* terminate I/O process bit (see 5.6.22) [6] */
3392 /* asynch. event notification (processor) [7] */
3393 uchar add_len
; /* additional length */
3394 uchar res1
; /* reserved */
3395 uchar res2
; /* reserved */
3396 uchar flags
; /* soft reset implemented [0] */
3397 /* command queuing [1] */
3399 /* linked command for this logical unit [3] */
3400 /* synchronous data transfer [4] */
3401 /* wide bus 16 bit data transfer [5] */
3402 /* wide bus 32 bit data transfer [6] */
3403 /* relative addressing mode [7] */
3404 uchar vendor_id
[8]; /* vendor identification */
3405 uchar product_id
[16]; /* product identification */
3406 uchar product_rev_level
[4]; /* product revision level */
3407 uchar vendor_specific
[20]; /* vendor specific */
3408 uchar info
; /* information unit supported [0] */
3409 /* quick arbitrate supported [1] */
3410 /* clocking field [2:3] */
3411 /* reserved [4:7] */
3412 uchar res3
; /* reserved */
3413 } ADV_SCSI_INQUIRY
; /* 58 bytes */
3416 * --- Driver Constants and Macros
3419 #define ASC_NUM_BOARD_SUPPORTED 16
3420 #define ASC_NUM_IOPORT_PROBE 4
3421 #define ASC_NUM_BUS 3
3423 /* Reference Scsi_Host hostdata */
3424 #define ASC_BOARDP(host) ((asc_board_t *) &((host)->hostdata))
3426 /* asc_board_t flags */
3427 #define ASC_HOST_IN_RESET 0x01
3428 #define ASC_IS_WIDE_BOARD 0x04 /* AdvanSys Wide Board */
3429 #define ASC_SELECT_QUEUE_DEPTHS 0x08
3431 #define ASC_NARROW_BOARD(boardp) (((boardp)->flags & ASC_IS_WIDE_BOARD) == 0)
3432 #define ASC_WIDE_BOARD(boardp) ((boardp)->flags & ASC_IS_WIDE_BOARD)
3434 #define NO_ISA_DMA 0xff /* No ISA DMA Channel Used */
3436 #define ASC_INFO_SIZE 128 /* advansys_info() line size */
3438 #ifdef CONFIG_PROC_FS
3439 /* /proc/scsi/advansys/[0...] related definitions */
3440 #define ASC_PRTBUF_SIZE 2048
3441 #define ASC_PRTLINE_SIZE 160
3443 #define ASC_PRT_NEXT() \
3447 if (leftlen == 0) { \
3452 #endif /* CONFIG_PROC_FS */
3454 /* Asc Library return codes */
3457 #define ASC_NOERROR 1
3459 #define ASC_ERROR (-1)
3461 /* struct scsi_cmnd function return codes */
3462 #define STATUS_BYTE(byte) (byte)
3463 #define MSG_BYTE(byte) ((byte) << 8)
3464 #define HOST_BYTE(byte) ((byte) << 16)
3465 #define DRIVER_BYTE(byte) ((byte) << 24)
3468 * The following definitions and macros are OS independent interfaces to
3469 * the queue functions:
3470 * REQ - SCSI request structure
3471 * REQP - pointer to SCSI request structure
3472 * REQPTID(reqp) - reqp's target id
3473 * REQPNEXT(reqp) - reqp's next pointer
3474 * REQPNEXTP(reqp) - pointer to reqp's next pointer
3475 * REQPTIME(reqp) - reqp's time stamp value
3476 * REQTIMESTAMP() - system time stamp value
3478 typedef struct scsi_cmnd REQ
, *REQP
;
3479 #define REQPNEXT(reqp) ((REQP) ((reqp)->host_scribble))
3480 #define REQPNEXTP(reqp) ((REQP *) &((reqp)->host_scribble))
3481 #define REQPTID(reqp) ((reqp)->device->id)
3482 #define REQPTIME(reqp) ((reqp)->SCp.this_residual)
3483 #define REQTIMESTAMP() (jiffies)
3485 #define REQTIMESTAT(function, ascq, reqp, tid) \
3488 * If the request time stamp is less than the system time stamp, then \
3489 * maybe the system time stamp wrapped. Set the request time to zero.\
3491 if (REQPTIME(reqp) <= REQTIMESTAMP()) { \
3492 REQPTIME(reqp) = REQTIMESTAMP() - REQPTIME(reqp); \
3494 /* Indicate an error occurred with the assertion. */ \
3495 ASC_ASSERT(REQPTIME(reqp) <= REQTIMESTAMP()); \
3496 REQPTIME(reqp) = 0; \
3498 /* Handle first minimum time case without external initialization. */ \
3499 if (((ascq)->q_tot_cnt[tid] == 1) || \
3500 (REQPTIME(reqp) < (ascq)->q_min_tim[tid])) { \
3501 (ascq)->q_min_tim[tid] = REQPTIME(reqp); \
3502 ASC_DBG3(1, "%s: new q_min_tim[%d] %u\n", \
3503 (function), (tid), (ascq)->q_min_tim[tid]); \
3505 if (REQPTIME(reqp) > (ascq)->q_max_tim[tid]) { \
3506 (ascq)->q_max_tim[tid] = REQPTIME(reqp); \
3507 ASC_DBG3(1, "%s: new q_max_tim[%d] %u\n", \
3508 (function), tid, (ascq)->q_max_tim[tid]); \
3510 (ascq)->q_tot_tim[tid] += REQPTIME(reqp); \
3511 /* Reset the time stamp field. */ \
3512 REQPTIME(reqp) = 0; \
3515 /* asc_enqueue() flags */
3519 /* asc_dequeue_list() argument */
3520 #define ASC_TID_ALL (-1)
3522 /* Return non-zero, if the queue is empty. */
3523 #define ASC_QUEUE_EMPTY(ascq) ((ascq)->q_tidmask == 0)
3525 #ifndef ADVANSYS_STATS
3526 #define ASC_STATS(shost, counter)
3527 #define ASC_STATS_ADD(shost, counter, count)
3528 #else /* ADVANSYS_STATS */
3529 #define ASC_STATS(shost, counter) \
3530 (ASC_BOARDP(shost)->asc_stats.counter++)
3532 #define ASC_STATS_ADD(shost, counter, count) \
3533 (ASC_BOARDP(shost)->asc_stats.counter += (count))
3534 #endif /* ADVANSYS_STATS */
3536 #define ASC_CEILING(val, unit) (((val) + ((unit) - 1))/(unit))
3538 /* If the result wraps when calculating tenths, return 0. */
3539 #define ASC_TENTHS(num, den) \
3540 (((10 * ((num)/(den))) > (((num) * 10)/(den))) ? \
3541 0 : ((((num) * 10)/(den)) - (10 * ((num)/(den)))))
3544 * Display a message to the console.
3546 #define ASC_PRINT(s) \
3548 printk("advansys: "); \
3552 #define ASC_PRINT1(s, a1) \
3554 printk("advansys: "); \
3555 printk((s), (a1)); \
3558 #define ASC_PRINT2(s, a1, a2) \
3560 printk("advansys: "); \
3561 printk((s), (a1), (a2)); \
3564 #define ASC_PRINT3(s, a1, a2, a3) \
3566 printk("advansys: "); \
3567 printk((s), (a1), (a2), (a3)); \
3570 #define ASC_PRINT4(s, a1, a2, a3, a4) \
3572 printk("advansys: "); \
3573 printk((s), (a1), (a2), (a3), (a4)); \
3576 #ifndef ADVANSYS_DEBUG
3578 #define ASC_DBG(lvl, s)
3579 #define ASC_DBG1(lvl, s, a1)
3580 #define ASC_DBG2(lvl, s, a1, a2)
3581 #define ASC_DBG3(lvl, s, a1, a2, a3)
3582 #define ASC_DBG4(lvl, s, a1, a2, a3, a4)
3583 #define ASC_DBG_PRT_SCSI_HOST(lvl, s)
3584 #define ASC_DBG_PRT_SCSI_CMND(lvl, s)
3585 #define ASC_DBG_PRT_ASC_SCSI_Q(lvl, scsiqp)
3586 #define ASC_DBG_PRT_ADV_SCSI_REQ_Q(lvl, scsiqp)
3587 #define ASC_DBG_PRT_ASC_QDONE_INFO(lvl, qdone)
3588 #define ADV_DBG_PRT_ADV_SCSI_REQ_Q(lvl, scsiqp)
3589 #define ASC_DBG_PRT_HEX(lvl, name, start, length)
3590 #define ASC_DBG_PRT_CDB(lvl, cdb, len)
3591 #define ASC_DBG_PRT_SENSE(lvl, sense, len)
3592 #define ASC_DBG_PRT_INQUIRY(lvl, inq, len)
3594 #else /* ADVANSYS_DEBUG */
3597 * Debugging Message Levels:
3599 * 1: High-Level Tracing
3600 * 2-N: Verbose Tracing
3603 #define ASC_DBG(lvl, s) \
3605 if (asc_dbglvl >= (lvl)) { \
3610 #define ASC_DBG1(lvl, s, a1) \
3612 if (asc_dbglvl >= (lvl)) { \
3613 printk((s), (a1)); \
3617 #define ASC_DBG2(lvl, s, a1, a2) \
3619 if (asc_dbglvl >= (lvl)) { \
3620 printk((s), (a1), (a2)); \
3624 #define ASC_DBG3(lvl, s, a1, a2, a3) \
3626 if (asc_dbglvl >= (lvl)) { \
3627 printk((s), (a1), (a2), (a3)); \
3631 #define ASC_DBG4(lvl, s, a1, a2, a3, a4) \
3633 if (asc_dbglvl >= (lvl)) { \
3634 printk((s), (a1), (a2), (a3), (a4)); \
3638 #define ASC_DBG_PRT_SCSI_HOST(lvl, s) \
3640 if (asc_dbglvl >= (lvl)) { \
3641 asc_prt_scsi_host(s); \
3645 #define ASC_DBG_PRT_SCSI_CMND(lvl, s) \
3647 if (asc_dbglvl >= (lvl)) { \
3648 asc_prt_scsi_cmnd(s); \
3652 #define ASC_DBG_PRT_ASC_SCSI_Q(lvl, scsiqp) \
3654 if (asc_dbglvl >= (lvl)) { \
3655 asc_prt_asc_scsi_q(scsiqp); \
3659 #define ASC_DBG_PRT_ASC_QDONE_INFO(lvl, qdone) \
3661 if (asc_dbglvl >= (lvl)) { \
3662 asc_prt_asc_qdone_info(qdone); \
3666 #define ASC_DBG_PRT_ADV_SCSI_REQ_Q(lvl, scsiqp) \
3668 if (asc_dbglvl >= (lvl)) { \
3669 asc_prt_adv_scsi_req_q(scsiqp); \
3673 #define ASC_DBG_PRT_HEX(lvl, name, start, length) \
3675 if (asc_dbglvl >= (lvl)) { \
3676 asc_prt_hex((name), (start), (length)); \
3680 #define ASC_DBG_PRT_CDB(lvl, cdb, len) \
3681 ASC_DBG_PRT_HEX((lvl), "CDB", (uchar *) (cdb), (len));
3683 #define ASC_DBG_PRT_SENSE(lvl, sense, len) \
3684 ASC_DBG_PRT_HEX((lvl), "SENSE", (uchar *) (sense), (len));
3686 #define ASC_DBG_PRT_INQUIRY(lvl, inq, len) \
3687 ASC_DBG_PRT_HEX((lvl), "INQUIRY", (uchar *) (inq), (len));
3688 #endif /* ADVANSYS_DEBUG */
3690 #ifndef ADVANSYS_ASSERT
3691 #define ASC_ASSERT(a)
3692 #else /* ADVANSYS_ASSERT */
3694 #define ASC_ASSERT(a) \
3697 printk("ASC_ASSERT() Failure: file %s, line %d\n", \
3698 __FILE__, __LINE__); \
3702 #endif /* ADVANSYS_ASSERT */
3705 * --- Driver Structures
3708 #ifdef ADVANSYS_STATS
3710 /* Per board statistics structure */
3712 /* Driver Entrypoint Statistics */
3713 ADV_DCNT queuecommand
; /* # calls to advansys_queuecommand() */
3714 ADV_DCNT reset
; /* # calls to advansys_eh_bus_reset() */
3715 ADV_DCNT biosparam
; /* # calls to advansys_biosparam() */
3716 ADV_DCNT interrupt
; /* # advansys_interrupt() calls */
3717 ADV_DCNT callback
; /* # calls to asc/adv_isr_callback() */
3718 ADV_DCNT done
; /* # calls to request's scsi_done function */
3719 ADV_DCNT build_error
; /* # asc/adv_build_req() ASC_ERROR returns. */
3720 ADV_DCNT adv_build_noreq
; /* # adv_build_req() adv_req_t alloc. fail. */
3721 ADV_DCNT adv_build_nosg
; /* # adv_build_req() adv_sgblk_t alloc. fail. */
3722 /* AscExeScsiQueue()/AdvExeScsiQueue() Statistics */
3723 ADV_DCNT exe_noerror
; /* # ASC_NOERROR returns. */
3724 ADV_DCNT exe_busy
; /* # ASC_BUSY returns. */
3725 ADV_DCNT exe_error
; /* # ASC_ERROR returns. */
3726 ADV_DCNT exe_unknown
; /* # unknown returns. */
3727 /* Data Transfer Statistics */
3728 ADV_DCNT cont_cnt
; /* # non-scatter-gather I/O requests received */
3729 ADV_DCNT cont_xfer
; /* # contiguous transfer 512-bytes */
3730 ADV_DCNT sg_cnt
; /* # scatter-gather I/O requests received */
3731 ADV_DCNT sg_elem
; /* # scatter-gather elements */
3732 ADV_DCNT sg_xfer
; /* # scatter-gather transfer 512-bytes */
3734 #endif /* ADVANSYS_STATS */
3737 * Request queuing structure
3739 typedef struct asc_queue
{
3740 ADV_SCSI_BIT_ID_TYPE q_tidmask
; /* queue mask */
3741 REQP q_first
[ADV_MAX_TID
+ 1]; /* first queued request */
3742 REQP q_last
[ADV_MAX_TID
+ 1]; /* last queued request */
3743 #ifdef ADVANSYS_STATS
3744 short q_cur_cnt
[ADV_MAX_TID
+ 1]; /* current queue count */
3745 short q_max_cnt
[ADV_MAX_TID
+ 1]; /* maximum queue count */
3746 ADV_DCNT q_tot_cnt
[ADV_MAX_TID
+ 1]; /* total enqueue count */
3747 ADV_DCNT q_tot_tim
[ADV_MAX_TID
+ 1]; /* total time queued */
3748 ushort q_max_tim
[ADV_MAX_TID
+ 1]; /* maximum time queued */
3749 ushort q_min_tim
[ADV_MAX_TID
+ 1]; /* minimum time queued */
3750 #endif /* ADVANSYS_STATS */
3754 * Adv Library Request Structures
3756 * The following two structures are used to process Wide Board requests.
3758 * The ADV_SCSI_REQ_Q structure in adv_req_t is passed to the Adv Library
3759 * and microcode with the ADV_SCSI_REQ_Q field 'srb_ptr' pointing to the
3760 * adv_req_t. The adv_req_t structure 'cmndp' field in turn points to the
3761 * Mid-Level SCSI request structure.
3763 * Zero or more ADV_SG_BLOCK are used with each ADV_SCSI_REQ_Q. Each
3764 * ADV_SG_BLOCK structure holds 15 scatter-gather elements. Under Linux
3765 * up to 255 scatter-gather elements may be used per request or
3768 * Both structures must be 32 byte aligned.
3770 typedef struct adv_sgblk
{
3771 ADV_SG_BLOCK sg_block
; /* Sgblock structure. */
3772 uchar align
[32]; /* Sgblock structure padding. */
3773 struct adv_sgblk
*next_sgblkp
; /* Next scatter-gather structure. */
3776 typedef struct adv_req
{
3777 ADV_SCSI_REQ_Q scsi_req_q
; /* Adv Library request structure. */
3778 uchar align
[32]; /* Request structure padding. */
3779 struct scsi_cmnd
*cmndp
; /* Mid-Level SCSI command pointer. */
3780 adv_sgblk_t
*sgblkp
; /* Adv Library scatter-gather pointer. */
3781 struct adv_req
*next_reqp
; /* Next Request Structure. */
3785 * Structure allocated for each board.
3787 * This structure is allocated by scsi_host_alloc() at the end
3788 * of the 'Scsi_Host' structure starting at the 'hostdata'
3789 * field. It is guaranteed to be allocated from DMA-able memory.
3791 typedef struct asc_board
{
3792 int id
; /* Board Id */
3793 uint flags
; /* Board flags */
3795 ASC_DVC_VAR asc_dvc_var
; /* Narrow board */
3796 ADV_DVC_VAR adv_dvc_var
; /* Wide board */
3799 ASC_DVC_CFG asc_dvc_cfg
; /* Narrow board */
3800 ADV_DVC_CFG adv_dvc_cfg
; /* Wide board */
3802 ushort asc_n_io_port
; /* Number I/O ports. */
3803 asc_queue_t active
; /* Active command queue */
3804 asc_queue_t waiting
; /* Waiting command queue */
3805 asc_queue_t done
; /* Done command queue */
3806 ADV_SCSI_BIT_ID_TYPE init_tidmask
; /* Target init./valid mask */
3807 struct scsi_device
*device
[ADV_MAX_TID
+ 1]; /* Mid-Level Scsi Device */
3808 ushort reqcnt
[ADV_MAX_TID
+ 1]; /* Starvation request count */
3809 ADV_SCSI_BIT_ID_TYPE queue_full
; /* Queue full mask */
3810 ushort queue_full_cnt
[ADV_MAX_TID
+ 1]; /* Queue full count */
3812 ASCEEP_CONFIG asc_eep
; /* Narrow EEPROM config. */
3813 ADVEEP_3550_CONFIG adv_3550_eep
; /* 3550 EEPROM config. */
3814 ADVEEP_38C0800_CONFIG adv_38C0800_eep
; /* 38C0800 EEPROM config. */
3815 ADVEEP_38C1600_CONFIG adv_38C1600_eep
; /* 38C1600 EEPROM config. */
3817 ulong last_reset
; /* Saved last reset time */
3818 spinlock_t lock
; /* Board spinlock */
3819 /* /proc/scsi/advansys/[0...] */
3820 char *prtbuf
; /* /proc print buffer */
3821 #ifdef ADVANSYS_STATS
3822 struct asc_stats asc_stats
; /* Board statistics */
3823 #endif /* ADVANSYS_STATS */
3825 * The following fields are used only for Narrow Boards.
3827 /* The following three structures must be in DMA-able memory. */
3828 ASC_SCSI_REQ_Q scsireqq
;
3829 ASC_CAP_INFO cap_info
;
3830 ASC_SCSI_INQUIRY inquiry
;
3831 uchar sdtr_data
[ASC_MAX_TID
+ 1]; /* SDTR information */
3833 * The following fields are used only for Wide Boards.
3835 void __iomem
*ioremap_addr
; /* I/O Memory remap address. */
3836 ushort ioport
; /* I/O Port address. */
3837 ADV_CARR_T
*carrp
; /* ADV_CARR_T memory block. */
3838 adv_req_t
*orig_reqp
; /* adv_req_t memory block. */
3839 adv_req_t
*adv_reqp
; /* Request structures. */
3840 adv_sgblk_t
*adv_sgblkp
; /* Scatter-gather structures. */
3841 ushort bios_signature
; /* BIOS Signature. */
3842 ushort bios_version
; /* BIOS Version. */
3843 ushort bios_codeseg
; /* BIOS Code Segment. */
3844 ushort bios_codelen
; /* BIOS Code Segment Length. */
3847 /* Number of boards detected in system. */
3848 static int asc_board_count
;
3850 /* Number of boards detected by advansys_detect */
3851 static int asc_legacy_count
;
3852 static struct Scsi_Host
*asc_host
[ASC_NUM_BOARD_SUPPORTED
] = { NULL
};
3854 /* Overrun buffer used by all narrow boards. */
3855 static uchar overrun_buf
[ASC_OVERRUN_BSIZE
] = { 0 };
3858 * Global structures required to issue a command.
3860 static ASC_SCSI_Q asc_scsi_q
= { {0} };
3861 static ASC_SG_HEAD asc_sg_head
= { 0 };
3863 /* List of bus types probed in advansys_detect. */
3864 static ushort asc_bus
[ASC_NUM_BUS
] __initdata
= {
3870 static int asc_iopflag
= ASC_FALSE
;
3871 static int asc_ioport
[ASC_NUM_IOPORT_PROBE
] = { 0, 0, 0, 0 };
3873 #ifdef ADVANSYS_DEBUG
3874 static char *asc_bus_name
[ASC_NUM_BUS
] = {
3880 static int asc_dbglvl
= 3;
3881 #endif /* ADVANSYS_DEBUG */
3883 /* Declaration for Asc Library internal data referenced by driver. */
3884 static PortAddr _asc_def_iop_base
[];
3887 * --- Driver Function Prototypes
3889 * advansys.h contains function prototypes for functions global to Linux.
3892 static int advansys_slave_configure(struct scsi_device
*);
3893 static void asc_scsi_done_list(struct scsi_cmnd
*);
3894 static int asc_execute_scsi_cmnd(struct scsi_cmnd
*);
3895 static int asc_build_req(asc_board_t
*, struct scsi_cmnd
*);
3896 static int adv_build_req(asc_board_t
*, struct scsi_cmnd
*, ADV_SCSI_REQ_Q
**);
3897 static int adv_get_sglist(asc_board_t
*, adv_req_t
*, struct scsi_cmnd
*, int);
3898 static void asc_isr_callback(ASC_DVC_VAR
*, ASC_QDONE_INFO
*);
3899 static void adv_isr_callback(ADV_DVC_VAR
*, ADV_SCSI_REQ_Q
*);
3900 static void adv_async_callback(ADV_DVC_VAR
*, uchar
);
3901 static void asc_enqueue(asc_queue_t
*, REQP
, int);
3902 static REQP
asc_dequeue(asc_queue_t
*, int);
3903 static REQP
asc_dequeue_list(asc_queue_t
*, REQP
*, int);
3904 static int asc_rmqueue(asc_queue_t
*, REQP
);
3905 static void asc_execute_queue(asc_queue_t
*);
3906 #ifdef CONFIG_PROC_FS
3907 static int asc_proc_copy(off_t
, off_t
, char *, int, char *, int);
3908 static int asc_prt_board_devices(struct Scsi_Host
*, char *, int);
3909 static int asc_prt_adv_bios(struct Scsi_Host
*, char *, int);
3910 static int asc_get_eeprom_string(ushort
*serialnum
, uchar
*cp
);
3911 static int asc_prt_asc_board_eeprom(struct Scsi_Host
*, char *, int);
3912 static int asc_prt_adv_board_eeprom(struct Scsi_Host
*, char *, int);
3913 static int asc_prt_driver_conf(struct Scsi_Host
*, char *, int);
3914 static int asc_prt_asc_board_info(struct Scsi_Host
*, char *, int);
3915 static int asc_prt_adv_board_info(struct Scsi_Host
*, char *, int);
3916 static int asc_prt_line(char *, int, char *fmt
, ...);
3917 #endif /* CONFIG_PROC_FS */
3919 /* Declaration for Asc Library internal functions referenced by driver. */
3920 static int AscFindSignature(PortAddr
);
3921 static ushort
AscGetEEPConfig(PortAddr
, ASCEEP_CONFIG
*, ushort
);
3923 /* Statistics function prototypes. */
3924 #ifdef ADVANSYS_STATS
3925 #ifdef CONFIG_PROC_FS
3926 static int asc_prt_board_stats(struct Scsi_Host
*, char *, int);
3927 static int asc_prt_target_stats(struct Scsi_Host
*, int, char *, int);
3928 #endif /* CONFIG_PROC_FS */
3929 #endif /* ADVANSYS_STATS */
3931 /* Debug function prototypes. */
3932 #ifdef ADVANSYS_DEBUG
3933 static void asc_prt_scsi_host(struct Scsi_Host
*);
3934 static void asc_prt_scsi_cmnd(struct scsi_cmnd
*);
3935 static void asc_prt_asc_dvc_cfg(ASC_DVC_CFG
*);
3936 static void asc_prt_asc_dvc_var(ASC_DVC_VAR
*);
3937 static void asc_prt_asc_scsi_q(ASC_SCSI_Q
*);
3938 static void asc_prt_asc_qdone_info(ASC_QDONE_INFO
*);
3939 static void asc_prt_adv_dvc_cfg(ADV_DVC_CFG
*);
3940 static void asc_prt_adv_dvc_var(ADV_DVC_VAR
*);
3941 static void asc_prt_adv_scsi_req_q(ADV_SCSI_REQ_Q
*);
3942 static void asc_prt_adv_sgblock(int, ADV_SG_BLOCK
*);
3943 static void asc_prt_hex(char *f
, uchar
*, int);
3944 #endif /* ADVANSYS_DEBUG */
3946 #ifdef CONFIG_PROC_FS
3948 * advansys_proc_info() - /proc/scsi/advansys/[0-(ASC_NUM_BOARD_SUPPORTED-1)]
3950 * *buffer: I/O buffer
3951 * **start: if inout == FALSE pointer into buffer where user read should start
3952 * offset: current offset into a /proc/scsi/advansys/[0...] file
3953 * length: length of buffer
3954 * hostno: Scsi_Host host_no
3955 * inout: TRUE - user is writing; FALSE - user is reading
3957 * Return the number of bytes read from or written to a
3958 * /proc/scsi/advansys/[0...] file.
3960 * Note: This function uses the per board buffer 'prtbuf' which is
3961 * allocated when the board is initialized in advansys_detect(). The
3962 * buffer is ASC_PRTBUF_SIZE bytes. The function asc_proc_copy() is
3963 * used to write to the buffer. The way asc_proc_copy() is written
3964 * if 'prtbuf' is too small it will not be overwritten. Instead the
3965 * user just won't get all the available statistics.
3968 advansys_proc_info(struct Scsi_Host
*shost
, char *buffer
, char **start
,
3969 off_t offset
, int length
, int inout
)
3971 asc_board_t
*boardp
;
3979 #ifdef ADVANSYS_STATS
3981 #endif /* ADVANSYS_STATS */
3983 ASC_DBG(1, "advansys_proc_info: begin\n");
3986 * User write not supported.
3988 if (inout
== TRUE
) {
3993 * User read of /proc/scsi/advansys/[0...] file.
3996 boardp
= ASC_BOARDP(shost
);
3998 /* Copy read data starting at the beginning of the buffer. */
4006 * Get board configuration information.
4008 * advansys_info() returns the board string from its own static buffer.
4010 cp
= (char *)advansys_info(shost
);
4013 /* Copy board information. */
4014 cnt
= asc_proc_copy(advoffset
, offset
, curbuf
, leftlen
, cp
, cplen
);
4018 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4025 * Display Wide Board BIOS Information.
4027 if (ASC_WIDE_BOARD(boardp
)) {
4028 cp
= boardp
->prtbuf
;
4029 cplen
= asc_prt_adv_bios(shost
, cp
, ASC_PRTBUF_SIZE
);
4030 ASC_ASSERT(cplen
< ASC_PRTBUF_SIZE
);
4032 asc_proc_copy(advoffset
, offset
, curbuf
, leftlen
, cp
,
4037 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4045 * Display driver information for each device attached to the board.
4047 cp
= boardp
->prtbuf
;
4048 cplen
= asc_prt_board_devices(shost
, cp
, ASC_PRTBUF_SIZE
);
4049 ASC_ASSERT(cplen
< ASC_PRTBUF_SIZE
);
4050 cnt
= asc_proc_copy(advoffset
, offset
, curbuf
, leftlen
, cp
, cplen
);
4054 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4061 * Display EEPROM configuration for the board.
4063 cp
= boardp
->prtbuf
;
4064 if (ASC_NARROW_BOARD(boardp
)) {
4065 cplen
= asc_prt_asc_board_eeprom(shost
, cp
, ASC_PRTBUF_SIZE
);
4067 cplen
= asc_prt_adv_board_eeprom(shost
, cp
, ASC_PRTBUF_SIZE
);
4069 ASC_ASSERT(cplen
< ASC_PRTBUF_SIZE
);
4070 cnt
= asc_proc_copy(advoffset
, offset
, curbuf
, leftlen
, cp
, cplen
);
4074 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4081 * Display driver configuration and information for the board.
4083 cp
= boardp
->prtbuf
;
4084 cplen
= asc_prt_driver_conf(shost
, cp
, ASC_PRTBUF_SIZE
);
4085 ASC_ASSERT(cplen
< ASC_PRTBUF_SIZE
);
4086 cnt
= asc_proc_copy(advoffset
, offset
, curbuf
, leftlen
, cp
, cplen
);
4090 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4096 #ifdef ADVANSYS_STATS
4098 * Display driver statistics for the board.
4100 cp
= boardp
->prtbuf
;
4101 cplen
= asc_prt_board_stats(shost
, cp
, ASC_PRTBUF_SIZE
);
4102 ASC_ASSERT(cplen
<= ASC_PRTBUF_SIZE
);
4103 cnt
= asc_proc_copy(advoffset
, offset
, curbuf
, leftlen
, cp
, cplen
);
4107 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4114 * Display driver statistics for each target.
4116 for (tgt_id
= 0; tgt_id
<= ADV_MAX_TID
; tgt_id
++) {
4117 cp
= boardp
->prtbuf
;
4118 cplen
= asc_prt_target_stats(shost
, tgt_id
, cp
,
4120 ASC_ASSERT(cplen
<= ASC_PRTBUF_SIZE
);
4122 asc_proc_copy(advoffset
, offset
, curbuf
, leftlen
, cp
,
4127 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4133 #endif /* ADVANSYS_STATS */
4136 * Display Asc Library dynamic configuration information
4139 cp
= boardp
->prtbuf
;
4140 if (ASC_NARROW_BOARD(boardp
)) {
4141 cplen
= asc_prt_asc_board_info(shost
, cp
, ASC_PRTBUF_SIZE
);
4143 cplen
= asc_prt_adv_board_info(shost
, cp
, ASC_PRTBUF_SIZE
);
4145 ASC_ASSERT(cplen
< ASC_PRTBUF_SIZE
);
4146 cnt
= asc_proc_copy(advoffset
, offset
, curbuf
, leftlen
, cp
, cplen
);
4150 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4156 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt
);
4160 #endif /* CONFIG_PROC_FS */
4165 * Return suitable for printing on the console with the argument
4166 * adapter's configuration information.
4168 * Note: The information line should not exceed ASC_INFO_SIZE bytes,
4169 * otherwise the static 'info' array will be overrun.
4171 static const char *advansys_info(struct Scsi_Host
*shost
)
4173 static char info
[ASC_INFO_SIZE
];
4174 asc_board_t
*boardp
;
4175 ASC_DVC_VAR
*asc_dvc_varp
;
4176 ADV_DVC_VAR
*adv_dvc_varp
;
4179 char *widename
= NULL
;
4181 boardp
= ASC_BOARDP(shost
);
4182 if (ASC_NARROW_BOARD(boardp
)) {
4183 asc_dvc_varp
= &boardp
->dvc_var
.asc_dvc_var
;
4184 ASC_DBG(1, "advansys_info: begin\n");
4185 if (asc_dvc_varp
->bus_type
& ASC_IS_ISA
) {
4186 if ((asc_dvc_varp
->bus_type
& ASC_IS_ISAPNP
) ==
4188 busname
= "ISA PnP";
4192 /* Don't reference 'shost->n_io_port'; It may be truncated. */
4194 "AdvanSys SCSI %s: %s: IO 0x%lX-0x%lX, IRQ 0x%X, DMA 0x%X",
4195 ASC_VERSION
, busname
,
4196 (ulong
)shost
->io_port
,
4197 (ulong
)shost
->io_port
+ boardp
->asc_n_io_port
-
4198 1, shost
->irq
, shost
->dma_channel
);
4200 if (asc_dvc_varp
->bus_type
& ASC_IS_VL
) {
4202 } else if (asc_dvc_varp
->bus_type
& ASC_IS_EISA
) {
4204 } else if (asc_dvc_varp
->bus_type
& ASC_IS_PCI
) {
4205 if ((asc_dvc_varp
->bus_type
& ASC_IS_PCI_ULTRA
)
4206 == ASC_IS_PCI_ULTRA
) {
4207 busname
= "PCI Ultra";
4214 ("advansys_info: board %d: unknown bus type %d\n",
4215 boardp
->id
, asc_dvc_varp
->bus_type
);
4217 /* Don't reference 'shost->n_io_port'; It may be truncated. */
4219 "AdvanSys SCSI %s: %s: IO 0x%lX-0x%lX, IRQ 0x%X",
4220 ASC_VERSION
, busname
,
4221 (ulong
)shost
->io_port
,
4222 (ulong
)shost
->io_port
+ boardp
->asc_n_io_port
-
4227 * Wide Adapter Information
4229 * Memory-mapped I/O is used instead of I/O space to access
4230 * the adapter, but display the I/O Port range. The Memory
4231 * I/O address is displayed through the driver /proc file.
4233 adv_dvc_varp
= &boardp
->dvc_var
.adv_dvc_var
;
4234 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
4235 iolen
= ADV_3550_IOLEN
;
4236 widename
= "Ultra-Wide";
4237 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
4238 iolen
= ADV_38C0800_IOLEN
;
4239 widename
= "Ultra2-Wide";
4241 iolen
= ADV_38C1600_IOLEN
;
4242 widename
= "Ultra3-Wide";
4245 "AdvanSys SCSI %s: PCI %s: PCIMEM 0x%lX-0x%lX, IRQ 0x%X",
4246 ASC_VERSION
, widename
, (ulong
)adv_dvc_varp
->iop_base
,
4247 (ulong
)adv_dvc_varp
->iop_base
+ iolen
- 1, shost
->irq
);
4249 ASC_ASSERT(strlen(info
) < ASC_INFO_SIZE
);
4250 ASC_DBG(1, "advansys_info: end\n");
4255 * advansys_queuecommand() - interrupt-driven I/O entrypoint.
4257 * This function always returns 0. Command return status is saved
4258 * in the 'scp' result field.
4261 advansys_queuecommand(struct scsi_cmnd
*scp
, void (*done
) (struct scsi_cmnd
*))
4263 struct Scsi_Host
*shost
;
4264 asc_board_t
*boardp
;
4266 struct scsi_cmnd
*done_scp
;
4268 shost
= scp
->device
->host
;
4269 boardp
= ASC_BOARDP(shost
);
4270 ASC_STATS(shost
, queuecommand
);
4272 /* host_lock taken by mid-level prior to call but need to protect */
4273 /* against own ISR */
4274 spin_lock_irqsave(&boardp
->lock
, flags
);
4277 * Block new commands while handling a reset or abort request.
4279 if (boardp
->flags
& ASC_HOST_IN_RESET
) {
4281 "advansys_queuecommand: scp 0x%lx blocked for reset request\n",
4283 scp
->result
= HOST_BYTE(DID_RESET
);
4286 * Add blocked requests to the board's 'done' queue. The queued
4287 * requests will be completed at the end of the abort or reset
4290 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
4291 spin_unlock_irqrestore(&boardp
->lock
, flags
);
4296 * Attempt to execute any waiting commands for the board.
4298 if (!ASC_QUEUE_EMPTY(&boardp
->waiting
)) {
4300 "advansys_queuecommand: before asc_execute_queue() waiting\n");
4301 asc_execute_queue(&boardp
->waiting
);
4305 * Save the function pointer to Linux mid-level 'done' function
4306 * and attempt to execute the command.
4308 * If ASC_NOERROR is returned the request has been added to the
4309 * board's 'active' queue and will be completed by the interrupt
4312 * If ASC_BUSY is returned add the request to the board's per
4313 * target waiting list. This is the first time the request has
4314 * been tried. Add it to the back of the waiting list. It will be
4317 * If an error occurred, the request will have been placed on the
4318 * board's 'done' queue and must be completed before returning.
4320 scp
->scsi_done
= done
;
4321 switch (asc_execute_scsi_cmnd(scp
)) {
4325 asc_enqueue(&boardp
->waiting
, scp
, ASC_BACK
);
4329 done_scp
= asc_dequeue_list(&boardp
->done
, NULL
, ASC_TID_ALL
);
4330 /* Interrupts could be enabled here. */
4331 asc_scsi_done_list(done_scp
);
4334 spin_unlock_irqrestore(&boardp
->lock
, flags
);
4342 * Reset the bus associated with the command 'scp'.
4344 * This function runs its own thread. Interrupts must be blocked but
4345 * sleeping is allowed and no locking other than for host structures is
4346 * required. Returns SUCCESS or FAILED.
4348 static int advansys_reset(struct scsi_cmnd
*scp
)
4350 struct Scsi_Host
*shost
;
4351 asc_board_t
*boardp
;
4352 ASC_DVC_VAR
*asc_dvc_varp
;
4353 ADV_DVC_VAR
*adv_dvc_varp
;
4355 struct scsi_cmnd
*done_scp
= NULL
, *last_scp
= NULL
;
4356 struct scsi_cmnd
*tscp
, *new_last_scp
;
4360 ASC_DBG1(1, "advansys_reset: 0x%lx\n", (ulong
)scp
);
4362 #ifdef ADVANSYS_STATS
4363 if (scp
->device
->host
!= NULL
) {
4364 ASC_STATS(scp
->device
->host
, reset
);
4366 #endif /* ADVANSYS_STATS */
4368 if ((shost
= scp
->device
->host
) == NULL
) {
4369 scp
->result
= HOST_BYTE(DID_ERROR
);
4373 boardp
= ASC_BOARDP(shost
);
4375 ASC_PRINT1("advansys_reset: board %d: SCSI bus reset started...\n",
4378 * Check for re-entrancy.
4380 spin_lock_irqsave(&boardp
->lock
, flags
);
4381 if (boardp
->flags
& ASC_HOST_IN_RESET
) {
4382 spin_unlock_irqrestore(&boardp
->lock
, flags
);
4385 boardp
->flags
|= ASC_HOST_IN_RESET
;
4386 spin_unlock_irqrestore(&boardp
->lock
, flags
);
4388 if (ASC_NARROW_BOARD(boardp
)) {
4392 asc_dvc_varp
= &boardp
->dvc_var
.asc_dvc_var
;
4395 * Reset the chip and SCSI bus.
4397 ASC_DBG(1, "advansys_reset: before AscInitAsc1000Driver()\n");
4398 status
= AscInitAsc1000Driver(asc_dvc_varp
);
4400 /* Refer to ASC_IERR_* defintions for meaning of 'err_code'. */
4401 if (asc_dvc_varp
->err_code
) {
4403 ("advansys_reset: board %d: SCSI bus reset error: 0x%x\n",
4404 boardp
->id
, asc_dvc_varp
->err_code
);
4406 } else if (status
) {
4408 ("advansys_reset: board %d: SCSI bus reset warning: 0x%x\n",
4409 boardp
->id
, status
);
4412 ("advansys_reset: board %d: SCSI bus reset successful.\n",
4416 ASC_DBG(1, "advansys_reset: after AscInitAsc1000Driver()\n");
4417 spin_lock_irqsave(&boardp
->lock
, flags
);
4423 * If the suggest reset bus flags are set, then reset the bus.
4424 * Otherwise only reset the device.
4426 adv_dvc_varp
= &boardp
->dvc_var
.adv_dvc_var
;
4429 * Reset the target's SCSI bus.
4431 ASC_DBG(1, "advansys_reset: before AdvResetChipAndSB()\n");
4432 switch (AdvResetChipAndSB(adv_dvc_varp
)) {
4435 ("advansys_reset: board %d: SCSI bus reset successful.\n",
4441 ("advansys_reset: board %d: SCSI bus reset error.\n",
4446 spin_lock_irqsave(&boardp
->lock
, flags
);
4447 (void)AdvISR(adv_dvc_varp
);
4449 /* Board lock is held. */
4452 * Dequeue all board 'done' requests. A pointer to the last request
4453 * is returned in 'last_scp'.
4455 done_scp
= asc_dequeue_list(&boardp
->done
, &last_scp
, ASC_TID_ALL
);
4458 * Dequeue all board 'active' requests for all devices and set
4459 * the request status to DID_RESET. A pointer to the last request
4460 * is returned in 'last_scp'.
4462 if (done_scp
== NULL
) {
4464 asc_dequeue_list(&boardp
->active
, &last_scp
, ASC_TID_ALL
);
4465 for (tscp
= done_scp
; tscp
; tscp
= REQPNEXT(tscp
)) {
4466 tscp
->result
= HOST_BYTE(DID_RESET
);
4469 /* Append to 'done_scp' at the end with 'last_scp'. */
4470 ASC_ASSERT(last_scp
!= NULL
);
4471 last_scp
->host_scribble
=
4472 (unsigned char *)asc_dequeue_list(&boardp
->active
,
4475 if (new_last_scp
!= NULL
) {
4476 ASC_ASSERT(REQPNEXT(last_scp
) != NULL
);
4477 for (tscp
= REQPNEXT(last_scp
); tscp
;
4478 tscp
= REQPNEXT(tscp
)) {
4479 tscp
->result
= HOST_BYTE(DID_RESET
);
4481 last_scp
= new_last_scp
;
4486 * Dequeue all 'waiting' requests and set the request status
4489 if (done_scp
== NULL
) {
4491 asc_dequeue_list(&boardp
->waiting
, &last_scp
, ASC_TID_ALL
);
4492 for (tscp
= done_scp
; tscp
; tscp
= REQPNEXT(tscp
)) {
4493 tscp
->result
= HOST_BYTE(DID_RESET
);
4496 /* Append to 'done_scp' at the end with 'last_scp'. */
4497 ASC_ASSERT(last_scp
!= NULL
);
4498 last_scp
->host_scribble
=
4499 (unsigned char *)asc_dequeue_list(&boardp
->waiting
,
4502 if (new_last_scp
!= NULL
) {
4503 ASC_ASSERT(REQPNEXT(last_scp
) != NULL
);
4504 for (tscp
= REQPNEXT(last_scp
); tscp
;
4505 tscp
= REQPNEXT(tscp
)) {
4506 tscp
->result
= HOST_BYTE(DID_RESET
);
4508 last_scp
= new_last_scp
;
4512 /* Save the time of the most recently completed reset. */
4513 boardp
->last_reset
= jiffies
;
4515 /* Clear reset flag. */
4516 boardp
->flags
&= ~ASC_HOST_IN_RESET
;
4517 spin_unlock_irqrestore(&boardp
->lock
, flags
);
4520 * Complete all the 'done_scp' requests.
4522 if (done_scp
!= NULL
) {
4523 asc_scsi_done_list(done_scp
);
4526 ASC_DBG1(1, "advansys_reset: ret %d\n", ret
);
4532 * advansys_biosparam()
4534 * Translate disk drive geometry if the "BIOS greater than 1 GB"
4535 * support is enabled for a drive.
4537 * ip (information pointer) is an int array with the following definition:
4543 advansys_biosparam(struct scsi_device
*sdev
, struct block_device
*bdev
,
4544 sector_t capacity
, int ip
[])
4546 asc_board_t
*boardp
;
4548 ASC_DBG(1, "advansys_biosparam: begin\n");
4549 ASC_STATS(sdev
->host
, biosparam
);
4550 boardp
= ASC_BOARDP(sdev
->host
);
4551 if (ASC_NARROW_BOARD(boardp
)) {
4552 if ((boardp
->dvc_var
.asc_dvc_var
.dvc_cntl
&
4553 ASC_CNTL_BIOS_GT_1GB
) && capacity
> 0x200000) {
4561 if ((boardp
->dvc_var
.adv_dvc_var
.bios_ctrl
&
4562 BIOS_CTRL_EXTENDED_XLAT
) && capacity
> 0x200000) {
4570 ip
[2] = (unsigned long)capacity
/ (ip
[0] * ip
[1]);
4571 ASC_DBG(1, "advansys_biosparam: end\n");
4575 static struct scsi_host_template advansys_template
= {
4576 .proc_name
= "advansys",
4577 #ifdef CONFIG_PROC_FS
4578 .proc_info
= advansys_proc_info
,
4581 .info
= advansys_info
,
4582 .queuecommand
= advansys_queuecommand
,
4583 .eh_bus_reset_handler
= advansys_reset
,
4584 .bios_param
= advansys_biosparam
,
4585 .slave_configure
= advansys_slave_configure
,
4587 * Because the driver may control an ISA adapter 'unchecked_isa_dma'
4588 * must be set. The flag will be cleared in advansys_board_found
4589 * for non-ISA adapters.
4591 .unchecked_isa_dma
= 1,
4593 * All adapters controlled by this driver are capable of large
4594 * scatter-gather lists. According to the mid-level SCSI documentation
4595 * this obviates any performance gain provided by setting
4596 * 'use_clustering'. But empirically while CPU utilization is increased
4597 * by enabling clustering, I/O throughput increases as well.
4599 .use_clustering
= ENABLE_CLUSTERING
,
4603 * --- Miscellaneous Driver Functions
4607 * First-level interrupt handler.
4609 * 'dev_id' is a pointer to the interrupting adapter's asc_board_t. Because
4610 * all boards are currently checked for interrupts on each interrupt, 'dev_id'
4611 * is not referenced. 'dev_id' could be used to identify an interrupt passed
4612 * to the AdvanSys driver which is for a device sharing an interrupt with
4613 * an AdvanSys adapter.
4615 static irqreturn_t
advansys_interrupt(int irq
, void *dev_id
)
4617 unsigned long flags
;
4618 struct scsi_cmnd
*done_scp
= NULL
, *last_scp
= NULL
;
4619 struct scsi_cmnd
*new_last_scp
;
4620 struct Scsi_Host
*shost
= dev_id
;
4621 asc_board_t
*boardp
= ASC_BOARDP(shost
);
4622 irqreturn_t result
= IRQ_NONE
;
4624 ASC_DBG1(2, "advansys_interrupt: boardp 0x%p\n", boardp
);
4625 spin_lock_irqsave(&boardp
->lock
, flags
);
4626 if (ASC_NARROW_BOARD(boardp
)) {
4630 if (AscIsIntPending(shost
->io_port
)) {
4631 result
= IRQ_HANDLED
;
4632 ASC_STATS(shost
, interrupt
);
4633 ASC_DBG(1, "advansys_interrupt: before AscISR()\n");
4634 AscISR(&boardp
->dvc_var
.asc_dvc_var
);
4640 ASC_DBG(1, "advansys_interrupt: before AdvISR()\n");
4641 if (AdvISR(&boardp
->dvc_var
.adv_dvc_var
)) {
4642 result
= IRQ_HANDLED
;
4643 ASC_STATS(shost
, interrupt
);
4648 * Start waiting requests and create a list of completed requests.
4650 * If a reset request is being performed for the board, the reset
4651 * handler will complete pending requests after it has completed.
4653 if ((boardp
->flags
& ASC_HOST_IN_RESET
) == 0) {
4654 ASC_DBG2(1, "advansys_interrupt: done_scp 0x%p, "
4655 "last_scp 0x%p\n", done_scp
, last_scp
);
4657 /* Start any waiting commands for the board. */
4658 if (!ASC_QUEUE_EMPTY(&boardp
->waiting
)) {
4659 ASC_DBG(1, "advansys_interrupt: before "
4660 "asc_execute_queue()\n");
4661 asc_execute_queue(&boardp
->waiting
);
4665 * Add to the list of requests that must be completed.
4667 * 'done_scp' will always be NULL on the first iteration of
4668 * this loop. 'last_scp' is set at the same time as 'done_scp'.
4670 if (done_scp
== NULL
) {
4671 done_scp
= asc_dequeue_list(&boardp
->done
,
4672 &last_scp
, ASC_TID_ALL
);
4674 ASC_ASSERT(last_scp
!= NULL
);
4675 last_scp
->host_scribble
=
4676 (unsigned char *)asc_dequeue_list(&boardp
->
4680 if (new_last_scp
!= NULL
) {
4681 ASC_ASSERT(REQPNEXT(last_scp
) != NULL
);
4682 last_scp
= new_last_scp
;
4686 spin_unlock_irqrestore(&boardp
->lock
, flags
);
4689 * If interrupts were enabled on entry, then they
4690 * are now enabled here.
4692 * Complete all requests on the done list.
4695 asc_scsi_done_list(done_scp
);
4697 ASC_DBG(1, "advansys_interrupt: end\n");
4702 * Set the number of commands to queue per device for the
4703 * specified host adapter.
4705 static int advansys_slave_configure(struct scsi_device
*device
)
4707 asc_board_t
*boardp
;
4709 boardp
= ASC_BOARDP(device
->host
);
4710 boardp
->flags
|= ASC_SELECT_QUEUE_DEPTHS
;
4712 * Save a pointer to the device and set its initial/maximum
4713 * queue depth. Only save the pointer for a lun0 dev though.
4715 if (device
->lun
== 0)
4716 boardp
->device
[device
->id
] = device
;
4717 if (device
->tagged_supported
) {
4718 if (ASC_NARROW_BOARD(boardp
)) {
4719 scsi_adjust_queue_depth(device
, MSG_ORDERED_TAG
,
4720 boardp
->dvc_var
.asc_dvc_var
.
4721 max_dvc_qng
[device
->id
]);
4723 scsi_adjust_queue_depth(device
, MSG_ORDERED_TAG
,
4724 boardp
->dvc_var
.adv_dvc_var
.
4728 scsi_adjust_queue_depth(device
, 0, device
->host
->cmd_per_lun
);
4731 "advansys_slave_configure: device 0x%lx, boardp 0x%lx, id %d, depth %d\n",
4732 (ulong
)device
, (ulong
)boardp
, device
->id
, device
->queue_depth
);
4737 * Complete all requests on the singly linked list pointed
4740 * Interrupts can be enabled on entry.
4742 static void asc_scsi_done_list(struct scsi_cmnd
*scp
)
4744 struct scsi_cmnd
*tscp
;
4746 ASC_DBG(2, "asc_scsi_done_list: begin\n");
4747 while (scp
!= NULL
) {
4748 asc_board_t
*boardp
;
4751 ASC_DBG1(3, "asc_scsi_done_list: scp 0x%lx\n", (ulong
)scp
);
4752 tscp
= REQPNEXT(scp
);
4753 scp
->host_scribble
= NULL
;
4755 boardp
= ASC_BOARDP(scp
->device
->host
);
4757 if (ASC_NARROW_BOARD(boardp
))
4758 dev
= boardp
->dvc_cfg
.asc_dvc_cfg
.dev
;
4760 dev
= boardp
->dvc_cfg
.adv_dvc_cfg
.dev
;
4764 (struct scatterlist
*)scp
->request_buffer
,
4765 scp
->use_sg
, scp
->sc_data_direction
);
4766 else if (scp
->request_bufflen
)
4767 dma_unmap_single(dev
, scp
->SCp
.dma_handle
,
4768 scp
->request_bufflen
,
4769 scp
->sc_data_direction
);
4771 ASC_STATS(scp
->device
->host
, done
);
4772 ASC_ASSERT(scp
->scsi_done
!= NULL
);
4774 scp
->scsi_done(scp
);
4778 ASC_DBG(2, "asc_scsi_done_list: done\n");
4783 * Execute a single 'Scsi_Cmnd'.
4785 * The function 'done' is called when the request has been completed.
4789 * host - board controlling device
4790 * device - device to send command
4791 * target - target of device
4792 * lun - lun of device
4793 * cmd_len - length of SCSI CDB
4794 * cmnd - buffer for SCSI 8, 10, or 12 byte CDB
4795 * use_sg - if non-zero indicates scatter-gather request with use_sg elements
4797 * if (use_sg == 0) {
4798 * request_buffer - buffer address for request
4799 * request_bufflen - length of request buffer
4801 * request_buffer - pointer to scatterlist structure
4804 * sense_buffer - sense command buffer
4806 * result (4 bytes of an int):
4808 * 0 SCSI Status Byte Code
4809 * 1 SCSI One Byte Message Code
4811 * 3 Mid-Level Error Code
4813 * host driver fields:
4814 * SCp - Scsi_Pointer used for command processing status
4815 * scsi_done - used to save caller's done function
4816 * host_scribble - used for pointer to another struct scsi_cmnd
4818 * If this function returns ASC_NOERROR the request has been enqueued
4819 * on the board's 'active' queue and will be completed from the
4820 * interrupt handler.
4822 * If this function returns ASC_NOERROR the request has been enqueued
4823 * on the board's 'done' queue and must be completed by the caller.
4825 * If ASC_BUSY is returned the request will be enqueued by the
4826 * caller on the target's waiting queue and re-tried later.
4828 static int asc_execute_scsi_cmnd(struct scsi_cmnd
*scp
)
4830 asc_board_t
*boardp
;
4831 ASC_DVC_VAR
*asc_dvc_varp
;
4832 ADV_DVC_VAR
*adv_dvc_varp
;
4833 ADV_SCSI_REQ_Q
*adv_scsiqp
;
4834 struct scsi_device
*device
;
4837 ASC_DBG2(1, "asc_execute_scsi_cmnd: scp 0x%lx, done 0x%lx\n",
4838 (ulong
)scp
, (ulong
)scp
->scsi_done
);
4840 boardp
= ASC_BOARDP(scp
->device
->host
);
4841 device
= boardp
->device
[scp
->device
->id
];
4843 if (ASC_NARROW_BOARD(boardp
)) {
4845 * Build and execute Narrow Board request.
4848 asc_dvc_varp
= &boardp
->dvc_var
.asc_dvc_var
;
4851 * Build Asc Library request structure using the
4852 * global structures 'asc_scsi_req' and 'asc_sg_head'.
4854 * If an error is returned, then the request has been
4855 * queued on the board done queue. It will be completed
4858 * asc_build_req() can not return ASC_BUSY.
4860 if (asc_build_req(boardp
, scp
) == ASC_ERROR
) {
4861 ASC_STATS(scp
->device
->host
, build_error
);
4866 * Execute the command. If there is no error, add the command
4867 * to the active queue.
4869 switch (ret
= AscExeScsiQueue(asc_dvc_varp
, &asc_scsi_q
)) {
4871 ASC_STATS(scp
->device
->host
, exe_noerror
);
4873 * Increment monotonically increasing per device successful
4874 * request counter. Wrapping doesn't matter.
4876 boardp
->reqcnt
[scp
->device
->id
]++;
4877 asc_enqueue(&boardp
->active
, scp
, ASC_BACK
);
4879 "asc_execute_scsi_cmnd: AscExeScsiQueue(), ASC_NOERROR\n");
4883 * Caller will enqueue request on the target's waiting queue
4886 ASC_STATS(scp
->device
->host
, exe_busy
);
4890 ("asc_execute_scsi_cmnd: board %d: AscExeScsiQueue() ASC_ERROR, err_code 0x%x\n",
4891 boardp
->id
, asc_dvc_varp
->err_code
);
4892 ASC_STATS(scp
->device
->host
, exe_error
);
4893 scp
->result
= HOST_BYTE(DID_ERROR
);
4894 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
4898 ("asc_execute_scsi_cmnd: board %d: AscExeScsiQueue() unknown, err_code 0x%x\n",
4899 boardp
->id
, asc_dvc_varp
->err_code
);
4900 ASC_STATS(scp
->device
->host
, exe_unknown
);
4901 scp
->result
= HOST_BYTE(DID_ERROR
);
4902 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
4907 * Build and execute Wide Board request.
4909 adv_dvc_varp
= &boardp
->dvc_var
.adv_dvc_var
;
4912 * Build and get a pointer to an Adv Library request structure.
4914 * If the request is successfully built then send it below,
4915 * otherwise return with an error.
4917 switch (adv_build_req(boardp
, scp
, &adv_scsiqp
)) {
4920 "asc_execute_scsi_cmnd: adv_build_req ASC_NOERROR\n");
4924 "asc_execute_scsi_cmnd: adv_build_req ASC_BUSY\n");
4926 * If busy is returned the request has not been enqueued.
4927 * It will be enqueued by the caller on the target's waiting
4928 * queue and retried later.
4930 * The asc_stats fields 'adv_build_noreq' and 'adv_build_nosg'
4931 * count wide board busy conditions. They are updated in
4932 * adv_build_req and adv_get_sglist, respectively.
4937 * If an error is returned, then the request has been
4938 * queued on the board done queue. It will be completed
4943 "asc_execute_scsi_cmnd: adv_build_req ASC_ERROR\n");
4944 ASC_STATS(scp
->device
->host
, build_error
);
4949 * Execute the command. If there is no error, add the command
4950 * to the active queue.
4952 switch (ret
= AdvExeScsiQueue(adv_dvc_varp
, adv_scsiqp
)) {
4954 ASC_STATS(scp
->device
->host
, exe_noerror
);
4956 * Increment monotonically increasing per device successful
4957 * request counter. Wrapping doesn't matter.
4959 boardp
->reqcnt
[scp
->device
->id
]++;
4960 asc_enqueue(&boardp
->active
, scp
, ASC_BACK
);
4962 "asc_execute_scsi_cmnd: AdvExeScsiQueue(), ASC_NOERROR\n");
4966 * Caller will enqueue request on the target's waiting queue
4969 ASC_STATS(scp
->device
->host
, exe_busy
);
4973 ("asc_execute_scsi_cmnd: board %d: AdvExeScsiQueue() ASC_ERROR, err_code 0x%x\n",
4974 boardp
->id
, adv_dvc_varp
->err_code
);
4975 ASC_STATS(scp
->device
->host
, exe_error
);
4976 scp
->result
= HOST_BYTE(DID_ERROR
);
4977 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
4981 ("asc_execute_scsi_cmnd: board %d: AdvExeScsiQueue() unknown, err_code 0x%x\n",
4982 boardp
->id
, adv_dvc_varp
->err_code
);
4983 ASC_STATS(scp
->device
->host
, exe_unknown
);
4984 scp
->result
= HOST_BYTE(DID_ERROR
);
4985 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
4990 ASC_DBG(1, "asc_execute_scsi_cmnd: end\n");
4995 * Build a request structure for the Asc Library (Narrow Board).
4997 * The global structures 'asc_scsi_q' and 'asc_sg_head' are
4998 * used to build the request.
5000 * If an error occurs, then queue the request on the board done
5001 * queue and return ASC_ERROR.
5003 static int asc_build_req(asc_board_t
*boardp
, struct scsi_cmnd
*scp
)
5005 struct device
*dev
= boardp
->dvc_cfg
.asc_dvc_cfg
.dev
;
5008 * Mutually exclusive access is required to 'asc_scsi_q' and
5009 * 'asc_sg_head' until after the request is started.
5011 memset(&asc_scsi_q
, 0, sizeof(ASC_SCSI_Q
));
5014 * Point the ASC_SCSI_Q to the 'struct scsi_cmnd'.
5016 asc_scsi_q
.q2
.srb_ptr
= ASC_VADDR_TO_U32(scp
);
5019 * Build the ASC_SCSI_Q request.
5021 * For narrow boards a CDB length maximum of 12 bytes
5024 if (scp
->cmd_len
> ASC_MAX_CDB_LEN
) {
5026 ("asc_build_req: board %d: cmd_len %d > ASC_MAX_CDB_LEN %d\n",
5027 boardp
->id
, scp
->cmd_len
, ASC_MAX_CDB_LEN
);
5028 scp
->result
= HOST_BYTE(DID_ERROR
);
5029 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
5032 asc_scsi_q
.cdbptr
= &scp
->cmnd
[0];
5033 asc_scsi_q
.q2
.cdb_len
= scp
->cmd_len
;
5034 asc_scsi_q
.q1
.target_id
= ASC_TID_TO_TARGET_ID(scp
->device
->id
);
5035 asc_scsi_q
.q1
.target_lun
= scp
->device
->lun
;
5036 asc_scsi_q
.q2
.target_ix
=
5037 ASC_TIDLUN_TO_IX(scp
->device
->id
, scp
->device
->lun
);
5038 asc_scsi_q
.q1
.sense_addr
=
5039 cpu_to_le32(virt_to_bus(&scp
->sense_buffer
[0]));
5040 asc_scsi_q
.q1
.sense_len
= sizeof(scp
->sense_buffer
);
5043 * If there are any outstanding requests for the current target,
5044 * then every 255th request send an ORDERED request. This heuristic
5045 * tries to retain the benefit of request sorting while preventing
5046 * request starvation. 255 is the max number of tags or pending commands
5047 * a device may have outstanding.
5049 * The request count is incremented below for every successfully
5053 if ((boardp
->dvc_var
.asc_dvc_var
.cur_dvc_qng
[scp
->device
->id
] > 0) &&
5054 (boardp
->reqcnt
[scp
->device
->id
] % 255) == 0) {
5055 asc_scsi_q
.q2
.tag_code
= MSG_ORDERED_TAG
;
5057 asc_scsi_q
.q2
.tag_code
= MSG_SIMPLE_TAG
;
5061 * Build ASC_SCSI_Q for a contiguous buffer or a scatter-gather
5064 if (scp
->use_sg
== 0) {
5066 * CDB request of single contiguous buffer.
5068 ASC_STATS(scp
->device
->host
, cont_cnt
);
5069 scp
->SCp
.dma_handle
= scp
->request_bufflen
?
5070 dma_map_single(dev
, scp
->request_buffer
,
5071 scp
->request_bufflen
,
5072 scp
->sc_data_direction
) : 0;
5073 asc_scsi_q
.q1
.data_addr
= cpu_to_le32(scp
->SCp
.dma_handle
);
5074 asc_scsi_q
.q1
.data_cnt
= cpu_to_le32(scp
->request_bufflen
);
5075 ASC_STATS_ADD(scp
->device
->host
, cont_xfer
,
5076 ASC_CEILING(scp
->request_bufflen
, 512));
5077 asc_scsi_q
.q1
.sg_queue_cnt
= 0;
5078 asc_scsi_q
.sg_head
= NULL
;
5081 * CDB scatter-gather request list.
5085 struct scatterlist
*slp
;
5087 slp
= (struct scatterlist
*)scp
->request_buffer
;
5089 dma_map_sg(dev
, slp
, scp
->use_sg
, scp
->sc_data_direction
);
5091 if (use_sg
> scp
->device
->host
->sg_tablesize
) {
5093 ("asc_build_req: board %d: use_sg %d > sg_tablesize %d\n",
5095 scp
->device
->host
->sg_tablesize
);
5096 dma_unmap_sg(dev
, slp
, scp
->use_sg
,
5097 scp
->sc_data_direction
);
5098 scp
->result
= HOST_BYTE(DID_ERROR
);
5099 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
5103 ASC_STATS(scp
->device
->host
, sg_cnt
);
5106 * Use global ASC_SG_HEAD structure and set the ASC_SCSI_Q
5107 * structure to point to it.
5109 memset(&asc_sg_head
, 0, sizeof(ASC_SG_HEAD
));
5111 asc_scsi_q
.q1
.cntl
|= QC_SG_HEAD
;
5112 asc_scsi_q
.sg_head
= &asc_sg_head
;
5113 asc_scsi_q
.q1
.data_cnt
= 0;
5114 asc_scsi_q
.q1
.data_addr
= 0;
5115 /* This is a byte value, otherwise it would need to be swapped. */
5116 asc_sg_head
.entry_cnt
= asc_scsi_q
.q1
.sg_queue_cnt
= use_sg
;
5117 ASC_STATS_ADD(scp
->device
->host
, sg_elem
,
5118 asc_sg_head
.entry_cnt
);
5121 * Convert scatter-gather list into ASC_SG_HEAD list.
5123 for (sgcnt
= 0; sgcnt
< use_sg
; sgcnt
++, slp
++) {
5124 asc_sg_head
.sg_list
[sgcnt
].addr
=
5125 cpu_to_le32(sg_dma_address(slp
));
5126 asc_sg_head
.sg_list
[sgcnt
].bytes
=
5127 cpu_to_le32(sg_dma_len(slp
));
5128 ASC_STATS_ADD(scp
->device
->host
, sg_xfer
,
5129 ASC_CEILING(sg_dma_len(slp
), 512));
5133 ASC_DBG_PRT_ASC_SCSI_Q(2, &asc_scsi_q
);
5134 ASC_DBG_PRT_CDB(1, scp
->cmnd
, scp
->cmd_len
);
5140 * Build a request structure for the Adv Library (Wide Board).
5142 * If an adv_req_t can not be allocated to issue the request,
5143 * then return ASC_BUSY. If an error occurs, then return ASC_ERROR.
5145 * Multi-byte fields in the ASC_SCSI_REQ_Q that are used by the
5146 * microcode for DMA addresses or math operations are byte swapped
5147 * to little-endian order.
5150 adv_build_req(asc_board_t
*boardp
, struct scsi_cmnd
*scp
,
5151 ADV_SCSI_REQ_Q
**adv_scsiqpp
)
5154 ADV_SCSI_REQ_Q
*scsiqp
;
5157 struct device
*dev
= boardp
->dvc_cfg
.adv_dvc_cfg
.dev
;
5160 * Allocate an adv_req_t structure from the board to execute
5163 if (boardp
->adv_reqp
== NULL
) {
5164 ASC_DBG(1, "adv_build_req: no free adv_req_t\n");
5165 ASC_STATS(scp
->device
->host
, adv_build_noreq
);
5168 reqp
= boardp
->adv_reqp
;
5169 boardp
->adv_reqp
= reqp
->next_reqp
;
5170 reqp
->next_reqp
= NULL
;
5174 * Get 32-byte aligned ADV_SCSI_REQ_Q and ADV_SG_BLOCK pointers.
5176 scsiqp
= (ADV_SCSI_REQ_Q
*)ADV_32BALIGN(&reqp
->scsi_req_q
);
5179 * Initialize the structure.
5181 scsiqp
->cntl
= scsiqp
->scsi_cntl
= scsiqp
->done_status
= 0;
5184 * Set the ADV_SCSI_REQ_Q 'srb_ptr' to point to the adv_req_t structure.
5186 scsiqp
->srb_ptr
= ASC_VADDR_TO_U32(reqp
);
5189 * Set the adv_req_t 'cmndp' to point to the struct scsi_cmnd structure.
5194 * Build the ADV_SCSI_REQ_Q request.
5198 * Set CDB length and copy it to the request structure.
5199 * For wide boards a CDB length maximum of 16 bytes
5202 if (scp
->cmd_len
> ADV_MAX_CDB_LEN
) {
5204 ("adv_build_req: board %d: cmd_len %d > ADV_MAX_CDB_LEN %d\n",
5205 boardp
->id
, scp
->cmd_len
, ADV_MAX_CDB_LEN
);
5206 scp
->result
= HOST_BYTE(DID_ERROR
);
5207 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
5210 scsiqp
->cdb_len
= scp
->cmd_len
;
5211 /* Copy first 12 CDB bytes to cdb[]. */
5212 for (i
= 0; i
< scp
->cmd_len
&& i
< 12; i
++) {
5213 scsiqp
->cdb
[i
] = scp
->cmnd
[i
];
5215 /* Copy last 4 CDB bytes, if present, to cdb16[]. */
5216 for (; i
< scp
->cmd_len
; i
++) {
5217 scsiqp
->cdb16
[i
- 12] = scp
->cmnd
[i
];
5220 scsiqp
->target_id
= scp
->device
->id
;
5221 scsiqp
->target_lun
= scp
->device
->lun
;
5223 scsiqp
->sense_addr
= cpu_to_le32(virt_to_bus(&scp
->sense_buffer
[0]));
5224 scsiqp
->sense_len
= sizeof(scp
->sense_buffer
);
5227 * Build ADV_SCSI_REQ_Q for a contiguous buffer or a scatter-gather
5231 scsiqp
->data_cnt
= cpu_to_le32(scp
->request_bufflen
);
5232 scsiqp
->vdata_addr
= scp
->request_buffer
;
5233 scsiqp
->data_addr
= cpu_to_le32(virt_to_bus(scp
->request_buffer
));
5235 if (scp
->use_sg
== 0) {
5237 * CDB request of single contiguous buffer.
5239 reqp
->sgblkp
= NULL
;
5240 scsiqp
->data_cnt
= cpu_to_le32(scp
->request_bufflen
);
5241 if (scp
->request_bufflen
) {
5242 scsiqp
->vdata_addr
= scp
->request_buffer
;
5243 scp
->SCp
.dma_handle
=
5244 dma_map_single(dev
, scp
->request_buffer
,
5245 scp
->request_bufflen
,
5246 scp
->sc_data_direction
);
5248 scsiqp
->vdata_addr
= NULL
;
5249 scp
->SCp
.dma_handle
= 0;
5251 scsiqp
->data_addr
= cpu_to_le32(scp
->SCp
.dma_handle
);
5252 scsiqp
->sg_list_ptr
= NULL
;
5253 scsiqp
->sg_real_addr
= 0;
5254 ASC_STATS(scp
->device
->host
, cont_cnt
);
5255 ASC_STATS_ADD(scp
->device
->host
, cont_xfer
,
5256 ASC_CEILING(scp
->request_bufflen
, 512));
5259 * CDB scatter-gather request list.
5261 struct scatterlist
*slp
;
5264 slp
= (struct scatterlist
*)scp
->request_buffer
;
5266 dma_map_sg(dev
, slp
, scp
->use_sg
, scp
->sc_data_direction
);
5268 if (use_sg
> ADV_MAX_SG_LIST
) {
5270 ("adv_build_req: board %d: use_sg %d > ADV_MAX_SG_LIST %d\n",
5272 scp
->device
->host
->sg_tablesize
);
5273 dma_unmap_sg(dev
, slp
, scp
->use_sg
,
5274 scp
->sc_data_direction
);
5275 scp
->result
= HOST_BYTE(DID_ERROR
);
5276 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
5279 * Free the 'adv_req_t' structure by adding it back to the
5282 reqp
->next_reqp
= boardp
->adv_reqp
;
5283 boardp
->adv_reqp
= reqp
;
5289 adv_get_sglist(boardp
, reqp
, scp
,
5290 use_sg
)) != ADV_SUCCESS
) {
5292 * Free the adv_req_t structure by adding it back to the
5295 reqp
->next_reqp
= boardp
->adv_reqp
;
5296 boardp
->adv_reqp
= reqp
;
5301 ASC_STATS(scp
->device
->host
, sg_cnt
);
5302 ASC_STATS_ADD(scp
->device
->host
, sg_elem
, use_sg
);
5305 ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp
);
5306 ASC_DBG_PRT_CDB(1, scp
->cmnd
, scp
->cmd_len
);
5308 *adv_scsiqpp
= scsiqp
;
5314 * Build scatter-gather list for Adv Library (Wide Board).
5316 * Additional ADV_SG_BLOCK structures will need to be allocated
5317 * if the total number of scatter-gather elements exceeds
5318 * NO_OF_SG_PER_BLOCK (15). The ADV_SG_BLOCK structures are
5319 * assumed to be physically contiguous.
5322 * ADV_SUCCESS(1) - SG List successfully created
5323 * ADV_ERROR(-1) - SG List creation failed
5326 adv_get_sglist(asc_board_t
*boardp
, adv_req_t
*reqp
, struct scsi_cmnd
*scp
,
5329 adv_sgblk_t
*sgblkp
;
5330 ADV_SCSI_REQ_Q
*scsiqp
;
5331 struct scatterlist
*slp
;
5333 ADV_SG_BLOCK
*sg_block
, *prev_sg_block
;
5334 ADV_PADDR sg_block_paddr
;
5337 scsiqp
= (ADV_SCSI_REQ_Q
*)ADV_32BALIGN(&reqp
->scsi_req_q
);
5338 slp
= (struct scatterlist
*)scp
->request_buffer
;
5339 sg_elem_cnt
= use_sg
;
5340 prev_sg_block
= NULL
;
5341 reqp
->sgblkp
= NULL
;
5345 * Allocate a 'adv_sgblk_t' structure from the board free
5346 * list. One 'adv_sgblk_t' structure holds NO_OF_SG_PER_BLOCK
5347 * (15) scatter-gather elements.
5349 if ((sgblkp
= boardp
->adv_sgblkp
) == NULL
) {
5350 ASC_DBG(1, "adv_get_sglist: no free adv_sgblk_t\n");
5351 ASC_STATS(scp
->device
->host
, adv_build_nosg
);
5354 * Allocation failed. Free 'adv_sgblk_t' structures already
5355 * allocated for the request.
5357 while ((sgblkp
= reqp
->sgblkp
) != NULL
) {
5358 /* Remove 'sgblkp' from the request list. */
5359 reqp
->sgblkp
= sgblkp
->next_sgblkp
;
5361 /* Add 'sgblkp' to the board free list. */
5362 sgblkp
->next_sgblkp
= boardp
->adv_sgblkp
;
5363 boardp
->adv_sgblkp
= sgblkp
;
5367 /* Complete 'adv_sgblk_t' board allocation. */
5368 boardp
->adv_sgblkp
= sgblkp
->next_sgblkp
;
5369 sgblkp
->next_sgblkp
= NULL
;
5372 * Get 8 byte aligned virtual and physical addresses for
5373 * the allocated ADV_SG_BLOCK structure.
5376 (ADV_SG_BLOCK
*)ADV_8BALIGN(&sgblkp
->sg_block
);
5377 sg_block_paddr
= virt_to_bus(sg_block
);
5380 * Check if this is the first 'adv_sgblk_t' for the request.
5382 if (reqp
->sgblkp
== NULL
) {
5383 /* Request's first scatter-gather block. */
5384 reqp
->sgblkp
= sgblkp
;
5387 * Set ADV_SCSI_REQ_T ADV_SG_BLOCK virtual and physical
5390 scsiqp
->sg_list_ptr
= sg_block
;
5391 scsiqp
->sg_real_addr
=
5392 cpu_to_le32(sg_block_paddr
);
5394 /* Request's second or later scatter-gather block. */
5395 sgblkp
->next_sgblkp
= reqp
->sgblkp
;
5396 reqp
->sgblkp
= sgblkp
;
5399 * Point the previous ADV_SG_BLOCK structure to
5400 * the newly allocated ADV_SG_BLOCK structure.
5402 ASC_ASSERT(prev_sg_block
!= NULL
);
5403 prev_sg_block
->sg_ptr
=
5404 cpu_to_le32(sg_block_paddr
);
5408 for (i
= 0; i
< NO_OF_SG_PER_BLOCK
; i
++) {
5409 sg_block
->sg_list
[i
].sg_addr
=
5410 cpu_to_le32(sg_dma_address(slp
));
5411 sg_block
->sg_list
[i
].sg_count
=
5412 cpu_to_le32(sg_dma_len(slp
));
5413 ASC_STATS_ADD(scp
->device
->host
, sg_xfer
,
5414 ASC_CEILING(sg_dma_len(slp
), 512));
5416 if (--sg_elem_cnt
== 0) { /* Last ADV_SG_BLOCK and scatter-gather entry. */
5417 sg_block
->sg_cnt
= i
+ 1;
5418 sg_block
->sg_ptr
= 0L; /* Last ADV_SG_BLOCK in list. */
5423 sg_block
->sg_cnt
= NO_OF_SG_PER_BLOCK
;
5424 prev_sg_block
= sg_block
;
5431 * asc_isr_callback() - Second Level Interrupt Handler called by AscISR().
5433 * Interrupt callback function for the Narrow SCSI Asc Library.
5435 static void asc_isr_callback(ASC_DVC_VAR
*asc_dvc_varp
, ASC_QDONE_INFO
*qdonep
)
5437 asc_board_t
*boardp
;
5438 struct scsi_cmnd
*scp
;
5439 struct Scsi_Host
*shost
;
5441 ASC_DBG2(1, "asc_isr_callback: asc_dvc_varp 0x%lx, qdonep 0x%lx\n",
5442 (ulong
)asc_dvc_varp
, (ulong
)qdonep
);
5443 ASC_DBG_PRT_ASC_QDONE_INFO(2, qdonep
);
5446 * Get the struct scsi_cmnd structure and Scsi_Host structure for the
5447 * command that has been completed.
5449 scp
= (struct scsi_cmnd
*)ASC_U32_TO_VADDR(qdonep
->d2
.srb_ptr
);
5450 ASC_DBG1(1, "asc_isr_callback: scp 0x%lx\n", (ulong
)scp
);
5453 ASC_PRINT("asc_isr_callback: scp is NULL\n");
5456 ASC_DBG_PRT_CDB(2, scp
->cmnd
, scp
->cmd_len
);
5458 shost
= scp
->device
->host
;
5459 ASC_STATS(shost
, callback
);
5460 ASC_DBG1(1, "asc_isr_callback: shost 0x%lx\n", (ulong
)shost
);
5463 * If the request isn't found on the active queue, it may
5464 * have been removed to handle a reset request.
5465 * Display a message and return.
5467 boardp
= ASC_BOARDP(shost
);
5468 ASC_ASSERT(asc_dvc_varp
== &boardp
->dvc_var
.asc_dvc_var
);
5469 if (asc_rmqueue(&boardp
->active
, scp
) == ASC_FALSE
) {
5471 ("asc_isr_callback: board %d: scp 0x%lx not on active queue\n",
5472 boardp
->id
, (ulong
)scp
);
5477 * 'qdonep' contains the command's ending status.
5479 switch (qdonep
->d3
.done_stat
) {
5481 ASC_DBG(2, "asc_isr_callback: QD_NO_ERROR\n");
5485 * If an INQUIRY command completed successfully, then call
5486 * the AscInquiryHandling() function to set-up the device.
5488 if (scp
->cmnd
[0] == INQUIRY
&& scp
->device
->lun
== 0 &&
5489 (scp
->request_bufflen
- qdonep
->remain_bytes
) >= 8) {
5490 AscInquiryHandling(asc_dvc_varp
, scp
->device
->id
& 0x7,
5491 (ASC_SCSI_INQUIRY
*)scp
->
5496 * Check for an underrun condition.
5498 * If there was no error and an underrun condition, then
5499 * then return the number of underrun bytes.
5501 if (scp
->request_bufflen
!= 0 && qdonep
->remain_bytes
!= 0 &&
5502 qdonep
->remain_bytes
<= scp
->request_bufflen
) {
5504 "asc_isr_callback: underrun condition %u bytes\n",
5505 (unsigned)qdonep
->remain_bytes
);
5506 scp
->resid
= qdonep
->remain_bytes
;
5511 ASC_DBG(2, "asc_isr_callback: QD_WITH_ERROR\n");
5512 switch (qdonep
->d3
.host_stat
) {
5513 case QHSTA_NO_ERROR
:
5514 if (qdonep
->d3
.scsi_stat
== SAM_STAT_CHECK_CONDITION
) {
5516 "asc_isr_callback: SAM_STAT_CHECK_CONDITION\n");
5517 ASC_DBG_PRT_SENSE(2, scp
->sense_buffer
,
5518 sizeof(scp
->sense_buffer
));
5520 * Note: The 'status_byte()' macro used by target drivers
5521 * defined in scsi.h shifts the status byte returned by
5522 * host drivers right by 1 bit. This is why target drivers
5523 * also use right shifted status byte definitions. For
5524 * instance target drivers use CHECK_CONDITION, defined to
5525 * 0x1, instead of the SCSI defined check condition value
5526 * of 0x2. Host drivers are supposed to return the status
5527 * byte as it is defined by SCSI.
5529 scp
->result
= DRIVER_BYTE(DRIVER_SENSE
) |
5530 STATUS_BYTE(qdonep
->d3
.scsi_stat
);
5532 scp
->result
= STATUS_BYTE(qdonep
->d3
.scsi_stat
);
5537 /* QHSTA error occurred */
5538 ASC_DBG1(1, "asc_isr_callback: host_stat 0x%x\n",
5539 qdonep
->d3
.host_stat
);
5540 scp
->result
= HOST_BYTE(DID_BAD_TARGET
);
5545 case QD_ABORTED_BY_HOST
:
5546 ASC_DBG(1, "asc_isr_callback: QD_ABORTED_BY_HOST\n");
5548 HOST_BYTE(DID_ABORT
) | MSG_BYTE(qdonep
->d3
.
5550 STATUS_BYTE(qdonep
->d3
.scsi_stat
);
5554 ASC_DBG1(1, "asc_isr_callback: done_stat 0x%x\n",
5555 qdonep
->d3
.done_stat
);
5557 HOST_BYTE(DID_ERROR
) | MSG_BYTE(qdonep
->d3
.
5559 STATUS_BYTE(qdonep
->d3
.scsi_stat
);
5564 * If the 'init_tidmask' bit isn't already set for the target and the
5565 * current request finished normally, then set the bit for the target
5566 * to indicate that a device is present.
5568 if ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(scp
->device
->id
)) == 0 &&
5569 qdonep
->d3
.done_stat
== QD_NO_ERROR
&&
5570 qdonep
->d3
.host_stat
== QHSTA_NO_ERROR
) {
5571 boardp
->init_tidmask
|= ADV_TID_TO_TIDMASK(scp
->device
->id
);
5575 * Because interrupts may be enabled by the 'struct scsi_cmnd' done
5576 * function, add the command to the end of the board's done queue.
5577 * The done function for the command will be called from
5578 * advansys_interrupt().
5580 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
5586 * adv_isr_callback() - Second Level Interrupt Handler called by AdvISR().
5588 * Callback function for the Wide SCSI Adv Library.
5590 static void adv_isr_callback(ADV_DVC_VAR
*adv_dvc_varp
, ADV_SCSI_REQ_Q
*scsiqp
)
5592 asc_board_t
*boardp
;
5594 adv_sgblk_t
*sgblkp
;
5595 struct scsi_cmnd
*scp
;
5596 struct Scsi_Host
*shost
;
5599 ASC_DBG2(1, "adv_isr_callback: adv_dvc_varp 0x%lx, scsiqp 0x%lx\n",
5600 (ulong
)adv_dvc_varp
, (ulong
)scsiqp
);
5601 ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp
);
5604 * Get the adv_req_t structure for the command that has been
5605 * completed. The adv_req_t structure actually contains the
5606 * completed ADV_SCSI_REQ_Q structure.
5608 reqp
= (adv_req_t
*)ADV_U32_TO_VADDR(scsiqp
->srb_ptr
);
5609 ASC_DBG1(1, "adv_isr_callback: reqp 0x%lx\n", (ulong
)reqp
);
5611 ASC_PRINT("adv_isr_callback: reqp is NULL\n");
5616 * Get the struct scsi_cmnd structure and Scsi_Host structure for the
5617 * command that has been completed.
5619 * Note: The adv_req_t request structure and adv_sgblk_t structure,
5620 * if any, are dropped, because a board structure pointer can not be
5624 ASC_DBG1(1, "adv_isr_callback: scp 0x%lx\n", (ulong
)scp
);
5627 ("adv_isr_callback: scp is NULL; adv_req_t dropped.\n");
5630 ASC_DBG_PRT_CDB(2, scp
->cmnd
, scp
->cmd_len
);
5632 shost
= scp
->device
->host
;
5633 ASC_STATS(shost
, callback
);
5634 ASC_DBG1(1, "adv_isr_callback: shost 0x%lx\n", (ulong
)shost
);
5637 * If the request isn't found on the active queue, it may have been
5638 * removed to handle a reset request. Display a message and return.
5640 * Note: Because the structure may still be in use don't attempt
5641 * to free the adv_req_t and adv_sgblk_t, if any, structures.
5643 boardp
= ASC_BOARDP(shost
);
5644 ASC_ASSERT(adv_dvc_varp
== &boardp
->dvc_var
.adv_dvc_var
);
5645 if (asc_rmqueue(&boardp
->active
, scp
) == ASC_FALSE
) {
5647 ("adv_isr_callback: board %d: scp 0x%lx not on active queue\n",
5648 boardp
->id
, (ulong
)scp
);
5653 * 'done_status' contains the command's ending status.
5655 switch (scsiqp
->done_status
) {
5657 ASC_DBG(2, "adv_isr_callback: QD_NO_ERROR\n");
5661 * Check for an underrun condition.
5663 * If there was no error and an underrun condition, then
5664 * then return the number of underrun bytes.
5666 resid_cnt
= le32_to_cpu(scsiqp
->data_cnt
);
5667 if (scp
->request_bufflen
!= 0 && resid_cnt
!= 0 &&
5668 resid_cnt
<= scp
->request_bufflen
) {
5670 "adv_isr_callback: underrun condition %lu bytes\n",
5672 scp
->resid
= resid_cnt
;
5677 ASC_DBG(2, "adv_isr_callback: QD_WITH_ERROR\n");
5678 switch (scsiqp
->host_status
) {
5679 case QHSTA_NO_ERROR
:
5680 if (scsiqp
->scsi_status
== SAM_STAT_CHECK_CONDITION
) {
5682 "adv_isr_callback: SAM_STAT_CHECK_CONDITION\n");
5683 ASC_DBG_PRT_SENSE(2, scp
->sense_buffer
,
5684 sizeof(scp
->sense_buffer
));
5686 * Note: The 'status_byte()' macro used by target drivers
5687 * defined in scsi.h shifts the status byte returned by
5688 * host drivers right by 1 bit. This is why target drivers
5689 * also use right shifted status byte definitions. For
5690 * instance target drivers use CHECK_CONDITION, defined to
5691 * 0x1, instead of the SCSI defined check condition value
5692 * of 0x2. Host drivers are supposed to return the status
5693 * byte as it is defined by SCSI.
5695 scp
->result
= DRIVER_BYTE(DRIVER_SENSE
) |
5696 STATUS_BYTE(scsiqp
->scsi_status
);
5698 scp
->result
= STATUS_BYTE(scsiqp
->scsi_status
);
5703 /* Some other QHSTA error occurred. */
5704 ASC_DBG1(1, "adv_isr_callback: host_status 0x%x\n",
5705 scsiqp
->host_status
);
5706 scp
->result
= HOST_BYTE(DID_BAD_TARGET
);
5711 case QD_ABORTED_BY_HOST
:
5712 ASC_DBG(1, "adv_isr_callback: QD_ABORTED_BY_HOST\n");
5714 HOST_BYTE(DID_ABORT
) | STATUS_BYTE(scsiqp
->scsi_status
);
5718 ASC_DBG1(1, "adv_isr_callback: done_status 0x%x\n",
5719 scsiqp
->done_status
);
5721 HOST_BYTE(DID_ERROR
) | STATUS_BYTE(scsiqp
->scsi_status
);
5726 * If the 'init_tidmask' bit isn't already set for the target and the
5727 * current request finished normally, then set the bit for the target
5728 * to indicate that a device is present.
5730 if ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(scp
->device
->id
)) == 0 &&
5731 scsiqp
->done_status
== QD_NO_ERROR
&&
5732 scsiqp
->host_status
== QHSTA_NO_ERROR
) {
5733 boardp
->init_tidmask
|= ADV_TID_TO_TIDMASK(scp
->device
->id
);
5737 * Because interrupts may be enabled by the 'struct scsi_cmnd' done
5738 * function, add the command to the end of the board's done queue.
5739 * The done function for the command will be called from
5740 * advansys_interrupt().
5742 asc_enqueue(&boardp
->done
, scp
, ASC_BACK
);
5745 * Free all 'adv_sgblk_t' structures allocated for the request.
5747 while ((sgblkp
= reqp
->sgblkp
) != NULL
) {
5748 /* Remove 'sgblkp' from the request list. */
5749 reqp
->sgblkp
= sgblkp
->next_sgblkp
;
5751 /* Add 'sgblkp' to the board free list. */
5752 sgblkp
->next_sgblkp
= boardp
->adv_sgblkp
;
5753 boardp
->adv_sgblkp
= sgblkp
;
5757 * Free the adv_req_t structure used with the command by adding
5758 * it back to the board free list.
5760 reqp
->next_reqp
= boardp
->adv_reqp
;
5761 boardp
->adv_reqp
= reqp
;
5763 ASC_DBG(1, "adv_isr_callback: done\n");
5769 * adv_async_callback() - Adv Library asynchronous event callback function.
5771 static void adv_async_callback(ADV_DVC_VAR
*adv_dvc_varp
, uchar code
)
5774 case ADV_ASYNC_SCSI_BUS_RESET_DET
:
5776 * The firmware detected a SCSI Bus reset.
5779 "adv_async_callback: ADV_ASYNC_SCSI_BUS_RESET_DET\n");
5782 case ADV_ASYNC_RDMA_FAILURE
:
5784 * Handle RDMA failure by resetting the SCSI Bus and
5785 * possibly the chip if it is unresponsive. Log the error
5786 * with a unique code.
5788 ASC_DBG(0, "adv_async_callback: ADV_ASYNC_RDMA_FAILURE\n");
5789 AdvResetChipAndSB(adv_dvc_varp
);
5792 case ADV_HOST_SCSI_BUS_RESET
:
5794 * Host generated SCSI bus reset occurred.
5796 ASC_DBG(0, "adv_async_callback: ADV_HOST_SCSI_BUS_RESET\n");
5800 ASC_DBG1(0, "DvcAsyncCallBack: unknown code 0x%x\n", code
);
5806 * Add a 'REQP' to the end of specified queue. Set 'tidmask'
5807 * to indicate a command is queued for the device.
5809 * 'flag' may be either ASC_FRONT or ASC_BACK.
5811 * 'REQPNEXT(reqp)' returns reqp's next pointer.
5813 static void asc_enqueue(asc_queue_t
*ascq
, REQP reqp
, int flag
)
5817 ASC_DBG3(3, "asc_enqueue: ascq 0x%lx, reqp 0x%lx, flag %d\n",
5818 (ulong
)ascq
, (ulong
)reqp
, flag
);
5819 ASC_ASSERT(reqp
!= NULL
);
5820 ASC_ASSERT(flag
== ASC_FRONT
|| flag
== ASC_BACK
);
5821 tid
= REQPTID(reqp
);
5822 ASC_ASSERT(tid
>= 0 && tid
<= ADV_MAX_TID
);
5823 if (flag
== ASC_FRONT
) {
5824 reqp
->host_scribble
= (unsigned char *)ascq
->q_first
[tid
];
5825 ascq
->q_first
[tid
] = reqp
;
5826 /* If the queue was empty, set the last pointer. */
5827 if (ascq
->q_last
[tid
] == NULL
) {
5828 ascq
->q_last
[tid
] = reqp
;
5830 } else { /* ASC_BACK */
5831 if (ascq
->q_last
[tid
] != NULL
) {
5832 ascq
->q_last
[tid
]->host_scribble
=
5833 (unsigned char *)reqp
;
5835 ascq
->q_last
[tid
] = reqp
;
5836 reqp
->host_scribble
= NULL
;
5837 /* If the queue was empty, set the first pointer. */
5838 if (ascq
->q_first
[tid
] == NULL
) {
5839 ascq
->q_first
[tid
] = reqp
;
5842 /* The queue has at least one entry, set its bit. */
5843 ascq
->q_tidmask
|= ADV_TID_TO_TIDMASK(tid
);
5844 #ifdef ADVANSYS_STATS
5845 /* Maintain request queue statistics. */
5846 ascq
->q_tot_cnt
[tid
]++;
5847 ascq
->q_cur_cnt
[tid
]++;
5848 if (ascq
->q_cur_cnt
[tid
] > ascq
->q_max_cnt
[tid
]) {
5849 ascq
->q_max_cnt
[tid
] = ascq
->q_cur_cnt
[tid
];
5850 ASC_DBG2(2, "asc_enqueue: new q_max_cnt[%d] %d\n",
5851 tid
, ascq
->q_max_cnt
[tid
]);
5853 REQPTIME(reqp
) = REQTIMESTAMP();
5854 #endif /* ADVANSYS_STATS */
5855 ASC_DBG1(3, "asc_enqueue: reqp 0x%lx\n", (ulong
)reqp
);
5860 * Return first queued 'REQP' on the specified queue for
5861 * the specified target device. Clear the 'tidmask' bit for
5862 * the device if no more commands are left queued for it.
5864 * 'REQPNEXT(reqp)' returns reqp's next pointer.
5866 static REQP
asc_dequeue(asc_queue_t
*ascq
, int tid
)
5870 ASC_DBG2(3, "asc_dequeue: ascq 0x%lx, tid %d\n", (ulong
)ascq
, tid
);
5871 ASC_ASSERT(tid
>= 0 && tid
<= ADV_MAX_TID
);
5872 if ((reqp
= ascq
->q_first
[tid
]) != NULL
) {
5873 ASC_ASSERT(ascq
->q_tidmask
& ADV_TID_TO_TIDMASK(tid
));
5874 ascq
->q_first
[tid
] = REQPNEXT(reqp
);
5875 /* If the queue is empty, clear its bit and the last pointer. */
5876 if (ascq
->q_first
[tid
] == NULL
) {
5877 ascq
->q_tidmask
&= ~ADV_TID_TO_TIDMASK(tid
);
5878 ASC_ASSERT(ascq
->q_last
[tid
] == reqp
);
5879 ascq
->q_last
[tid
] = NULL
;
5881 #ifdef ADVANSYS_STATS
5882 /* Maintain request queue statistics. */
5883 ascq
->q_cur_cnt
[tid
]--;
5884 ASC_ASSERT(ascq
->q_cur_cnt
[tid
] >= 0);
5885 REQTIMESTAT("asc_dequeue", ascq
, reqp
, tid
);
5886 #endif /* ADVANSYS_STATS */
5888 ASC_DBG1(3, "asc_dequeue: reqp 0x%lx\n", (ulong
)reqp
);
5893 * Return a pointer to a singly linked list of all the requests queued
5894 * for 'tid' on the 'asc_queue_t' pointed to by 'ascq'.
5896 * If 'lastpp' is not NULL, '*lastpp' will be set to point to the
5897 * the last request returned in the singly linked list.
5899 * 'tid' should either be a valid target id or if it is ASC_TID_ALL,
5900 * then all queued requests are concatenated into one list and
5903 * Note: If 'lastpp' is used to append a new list to the end of
5904 * an old list, only change the old list last pointer if '*lastpp'
5905 * (or the function return value) is not NULL, i.e. use a temporary
5906 * variable for 'lastpp' and check its value after the function return
5907 * before assigning it to the list last pointer.
5909 * Unfortunately collecting queuing time statistics adds overhead to
5910 * the function that isn't inherent to the function's algorithm.
5912 static REQP
asc_dequeue_list(asc_queue_t
*ascq
, REQP
*lastpp
, int tid
)
5917 ASC_DBG2(3, "asc_dequeue_list: ascq 0x%lx, tid %d\n", (ulong
)ascq
, tid
);
5918 ASC_ASSERT((tid
== ASC_TID_ALL
) || (tid
>= 0 && tid
<= ADV_MAX_TID
));
5921 * If 'tid' is not ASC_TID_ALL, return requests only for
5922 * the specified 'tid'. If 'tid' is ASC_TID_ALL, return all
5923 * requests for all tids.
5925 if (tid
!= ASC_TID_ALL
) {
5926 /* Return all requests for the specified 'tid'. */
5927 if ((ascq
->q_tidmask
& ADV_TID_TO_TIDMASK(tid
)) == 0) {
5928 /* List is empty; Set first and last return pointers to NULL. */
5929 firstp
= lastp
= NULL
;
5931 firstp
= ascq
->q_first
[tid
];
5932 lastp
= ascq
->q_last
[tid
];
5933 ascq
->q_first
[tid
] = ascq
->q_last
[tid
] = NULL
;
5934 ascq
->q_tidmask
&= ~ADV_TID_TO_TIDMASK(tid
);
5935 #ifdef ADVANSYS_STATS
5938 ascq
->q_cur_cnt
[tid
] = 0;
5939 for (reqp
= firstp
; reqp
; reqp
= REQPNEXT(reqp
)) {
5940 REQTIMESTAT("asc_dequeue_list", ascq
,
5944 #endif /* ADVANSYS_STATS */
5947 /* Return all requests for all tids. */
5948 firstp
= lastp
= NULL
;
5949 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
5950 if (ascq
->q_tidmask
& ADV_TID_TO_TIDMASK(i
)) {
5951 if (firstp
== NULL
) {
5952 firstp
= ascq
->q_first
[i
];
5953 lastp
= ascq
->q_last
[i
];
5955 ASC_ASSERT(lastp
!= NULL
);
5956 lastp
->host_scribble
=
5957 (unsigned char *)ascq
->q_first
[i
];
5958 lastp
= ascq
->q_last
[i
];
5960 ascq
->q_first
[i
] = ascq
->q_last
[i
] = NULL
;
5961 ascq
->q_tidmask
&= ~ADV_TID_TO_TIDMASK(i
);
5962 #ifdef ADVANSYS_STATS
5963 ascq
->q_cur_cnt
[i
] = 0;
5964 #endif /* ADVANSYS_STATS */
5967 #ifdef ADVANSYS_STATS
5970 for (reqp
= firstp
; reqp
; reqp
= REQPNEXT(reqp
)) {
5971 REQTIMESTAT("asc_dequeue_list", ascq
, reqp
,
5975 #endif /* ADVANSYS_STATS */
5980 ASC_DBG1(3, "asc_dequeue_list: firstp 0x%lx\n", (ulong
)firstp
);
5985 * Remove the specified 'REQP' from the specified queue for
5986 * the specified target device. Clear the 'tidmask' bit for the
5987 * device if no more commands are left queued for it.
5989 * 'REQPNEXT(reqp)' returns reqp's the next pointer.
5991 * Return ASC_TRUE if the command was found and removed,
5992 * otherwise return ASC_FALSE.
5994 static int asc_rmqueue(asc_queue_t
*ascq
, REQP reqp
)
5998 int ret
= ASC_FALSE
;
6000 ASC_DBG2(3, "asc_rmqueue: ascq 0x%lx, reqp 0x%lx\n",
6001 (ulong
)ascq
, (ulong
)reqp
);
6002 ASC_ASSERT(reqp
!= NULL
);
6004 tid
= REQPTID(reqp
);
6005 ASC_ASSERT(tid
>= 0 && tid
<= ADV_MAX_TID
);
6008 * Handle the common case of 'reqp' being the first
6009 * entry on the queue.
6011 if (reqp
== ascq
->q_first
[tid
]) {
6013 ascq
->q_first
[tid
] = REQPNEXT(reqp
);
6014 /* If the queue is now empty, clear its bit and the last pointer. */
6015 if (ascq
->q_first
[tid
] == NULL
) {
6016 ascq
->q_tidmask
&= ~ADV_TID_TO_TIDMASK(tid
);
6017 ASC_ASSERT(ascq
->q_last
[tid
] == reqp
);
6018 ascq
->q_last
[tid
] = NULL
;
6020 } else if (ascq
->q_first
[tid
] != NULL
) {
6021 ASC_ASSERT(ascq
->q_last
[tid
] != NULL
);
6023 * Because the case of 'reqp' being the first entry has been
6024 * handled above and it is known the queue is not empty, if
6025 * 'reqp' is found on the queue it is guaranteed the queue will
6026 * not become empty and that 'q_first[tid]' will not be changed.
6028 * Set 'prevp' to the first entry, 'currp' to the second entry,
6029 * and search for 'reqp'.
6031 for (prevp
= ascq
->q_first
[tid
], currp
= REQPNEXT(prevp
);
6032 currp
; prevp
= currp
, currp
= REQPNEXT(currp
)) {
6033 if (currp
== reqp
) {
6035 prevp
->host_scribble
=
6036 (unsigned char *)REQPNEXT(currp
);
6037 reqp
->host_scribble
= NULL
;
6038 if (ascq
->q_last
[tid
] == reqp
) {
6039 ascq
->q_last
[tid
] = prevp
;
6045 #ifdef ADVANSYS_STATS
6046 /* Maintain request queue statistics. */
6047 if (ret
== ASC_TRUE
) {
6048 ascq
->q_cur_cnt
[tid
]--;
6049 REQTIMESTAT("asc_rmqueue", ascq
, reqp
, tid
);
6051 ASC_ASSERT(ascq
->q_cur_cnt
[tid
] >= 0);
6052 #endif /* ADVANSYS_STATS */
6053 ASC_DBG2(3, "asc_rmqueue: reqp 0x%lx, ret %d\n", (ulong
)reqp
, ret
);
6058 * Execute as many queued requests as possible for the specified queue.
6060 * Calls asc_execute_scsi_cmnd() to execute a REQP/struct scsi_cmnd.
6062 static void asc_execute_queue(asc_queue_t
*ascq
)
6064 ADV_SCSI_BIT_ID_TYPE scan_tidmask
;
6068 ASC_DBG1(1, "asc_execute_queue: ascq 0x%lx\n", (ulong
)ascq
);
6070 * Execute queued commands for devices attached to
6071 * the current board in round-robin fashion.
6073 scan_tidmask
= ascq
->q_tidmask
;
6075 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6076 if (scan_tidmask
& ADV_TID_TO_TIDMASK(i
)) {
6077 if ((reqp
= asc_dequeue(ascq
, i
)) == NULL
) {
6078 scan_tidmask
&= ~ADV_TID_TO_TIDMASK(i
);
6080 if (asc_execute_scsi_cmnd
6081 ((struct scsi_cmnd
*)reqp
)
6083 scan_tidmask
&= ~ADV_TID_TO_TIDMASK(i
);
6085 * The request returned ASC_BUSY. Enqueue at the front of
6086 * target's waiting list to maintain correct ordering.
6088 asc_enqueue(ascq
, reqp
, ASC_FRONT
);
6092 } while (scan_tidmask
);
6096 #ifdef CONFIG_PROC_FS
6098 * asc_prt_board_devices()
6100 * Print driver information for devices attached to the board.
6102 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
6103 * cf. asc_prt_line().
6105 * Return the number of characters copied into 'cp'. No more than
6106 * 'cplen' characters will be copied to 'cp'.
6108 static int asc_prt_board_devices(struct Scsi_Host
*shost
, char *cp
, int cplen
)
6110 asc_board_t
*boardp
;
6117 boardp
= ASC_BOARDP(shost
);
6121 len
= asc_prt_line(cp
, leftlen
,
6122 "\nDevice Information for AdvanSys SCSI Host %d:\n",
6126 if (ASC_NARROW_BOARD(boardp
)) {
6127 chip_scsi_id
= boardp
->dvc_cfg
.asc_dvc_cfg
.chip_scsi_id
;
6129 chip_scsi_id
= boardp
->dvc_var
.adv_dvc_var
.chip_scsi_id
;
6132 len
= asc_prt_line(cp
, leftlen
, "Target IDs Detected:");
6134 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6135 if (boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) {
6136 len
= asc_prt_line(cp
, leftlen
, " %X,", i
);
6140 len
= asc_prt_line(cp
, leftlen
, " (%X=Host Adapter)\n", chip_scsi_id
);
6147 * Display Wide Board BIOS Information.
6149 static int asc_prt_adv_bios(struct Scsi_Host
*shost
, char *cp
, int cplen
)
6151 asc_board_t
*boardp
;
6155 ushort major
, minor
, letter
;
6157 boardp
= ASC_BOARDP(shost
);
6161 len
= asc_prt_line(cp
, leftlen
, "\nROM BIOS Version: ");
6165 * If the BIOS saved a valid signature, then fill in
6166 * the BIOS code segment base address.
6168 if (boardp
->bios_signature
!= 0x55AA) {
6169 len
= asc_prt_line(cp
, leftlen
, "Disabled or Pre-3.1\n");
6171 len
= asc_prt_line(cp
, leftlen
,
6172 "BIOS either disabled or Pre-3.1. If it is pre-3.1, then a newer version\n");
6174 len
= asc_prt_line(cp
, leftlen
,
6175 "can be found at the ConnectCom FTP site: ftp://ftp.connectcom.net/pub\n");
6178 major
= (boardp
->bios_version
>> 12) & 0xF;
6179 minor
= (boardp
->bios_version
>> 8) & 0xF;
6180 letter
= (boardp
->bios_version
& 0xFF);
6182 len
= asc_prt_line(cp
, leftlen
, "%d.%d%c\n",
6184 letter
>= 26 ? '?' : letter
+ 'A');
6188 * Current available ROM BIOS release is 3.1I for UW
6189 * and 3.2I for U2W. This code doesn't differentiate
6190 * UW and U2W boards.
6192 if (major
< 3 || (major
<= 3 && minor
< 1) ||
6193 (major
<= 3 && minor
<= 1 && letter
< ('I' - 'A'))) {
6194 len
= asc_prt_line(cp
, leftlen
,
6195 "Newer version of ROM BIOS is available at the ConnectCom FTP site:\n");
6197 len
= asc_prt_line(cp
, leftlen
,
6198 "ftp://ftp.connectcom.net/pub\n");
6207 * Add serial number to information bar if signature AAh
6208 * is found in at bit 15-9 (7 bits) of word 1.
6210 * Serial Number consists fo 12 alpha-numeric digits.
6212 * 1 - Product type (A,B,C,D..) Word0: 15-13 (3 bits)
6213 * 2 - MFG Location (A,B,C,D..) Word0: 12-10 (3 bits)
6214 * 3-4 - Product ID (0-99) Word0: 9-0 (10 bits)
6215 * 5 - Product revision (A-J) Word0: " "
6217 * Signature Word1: 15-9 (7 bits)
6218 * 6 - Year (0-9) Word1: 8-6 (3 bits) & Word2: 15 (1 bit)
6219 * 7-8 - Week of the year (1-52) Word1: 5-0 (6 bits)
6221 * 9-12 - Serial Number (A001-Z999) Word2: 14-0 (15 bits)
6223 * Note 1: Only production cards will have a serial number.
6225 * Note 2: Signature is most significant 7 bits (0xFE).
6227 * Returns ASC_TRUE if serial number found, otherwise returns ASC_FALSE.
6229 static int asc_get_eeprom_string(ushort
*serialnum
, uchar
*cp
)
6233 if ((serialnum
[1] & 0xFE00) != ((ushort
)0xAA << 8)) {
6237 * First word - 6 digits.
6241 /* Product type - 1st digit. */
6242 if ((*cp
= 'A' + ((w
& 0xE000) >> 13)) == 'H') {
6243 /* Product type is P=Prototype */
6248 /* Manufacturing location - 2nd digit. */
6249 *cp
++ = 'A' + ((w
& 0x1C00) >> 10);
6251 /* Product ID - 3rd, 4th digits. */
6253 *cp
++ = '0' + (num
/ 100);
6255 *cp
++ = '0' + (num
/ 10);
6257 /* Product revision - 5th digit. */
6258 *cp
++ = 'A' + (num
% 10);
6268 * If bit 15 of third word is set, then the
6269 * last digit of the year is greater than 7.
6271 if (serialnum
[2] & 0x8000) {
6272 *cp
++ = '8' + ((w
& 0x1C0) >> 6);
6274 *cp
++ = '0' + ((w
& 0x1C0) >> 6);
6277 /* Week of year - 7th, 8th digits. */
6279 *cp
++ = '0' + num
/ 10;
6286 w
= serialnum
[2] & 0x7FFF;
6288 /* Serial number - 9th digit. */
6289 *cp
++ = 'A' + (w
/ 1000);
6291 /* 10th, 11th, 12th digits. */
6293 *cp
++ = '0' + num
/ 100;
6295 *cp
++ = '0' + num
/ 10;
6299 *cp
= '\0'; /* Null Terminate the string. */
6305 * asc_prt_asc_board_eeprom()
6307 * Print board EEPROM configuration.
6309 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
6310 * cf. asc_prt_line().
6312 * Return the number of characters copied into 'cp'. No more than
6313 * 'cplen' characters will be copied to 'cp'.
6315 static int asc_prt_asc_board_eeprom(struct Scsi_Host
*shost
, char *cp
, int cplen
)
6317 asc_board_t
*boardp
;
6318 ASC_DVC_VAR
*asc_dvc_varp
;
6325 int isa_dma_speed
[] = { 10, 8, 7, 6, 5, 4, 3, 2 };
6326 #endif /* CONFIG_ISA */
6327 uchar serialstr
[13];
6329 boardp
= ASC_BOARDP(shost
);
6330 asc_dvc_varp
= &boardp
->dvc_var
.asc_dvc_var
;
6331 ep
= &boardp
->eep_config
.asc_eep
;
6336 len
= asc_prt_line(cp
, leftlen
,
6337 "\nEEPROM Settings for AdvanSys SCSI Host %d:\n",
6341 if (asc_get_eeprom_string((ushort
*)&ep
->adapter_info
[0], serialstr
)
6344 asc_prt_line(cp
, leftlen
, " Serial Number: %s\n",
6348 if (ep
->adapter_info
[5] == 0xBB) {
6349 len
= asc_prt_line(cp
, leftlen
,
6350 " Default Settings Used for EEPROM-less Adapter.\n");
6353 len
= asc_prt_line(cp
, leftlen
,
6354 " Serial Number Signature Not Present.\n");
6359 len
= asc_prt_line(cp
, leftlen
,
6360 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
6361 ASC_EEP_GET_CHIP_ID(ep
), ep
->max_total_qng
,
6365 len
= asc_prt_line(cp
, leftlen
,
6366 " cntl 0x%x, no_scam 0x%x\n", ep
->cntl
, ep
->no_scam
);
6369 len
= asc_prt_line(cp
, leftlen
, " Target ID: ");
6371 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6372 len
= asc_prt_line(cp
, leftlen
, " %d", i
);
6375 len
= asc_prt_line(cp
, leftlen
, "\n");
6378 len
= asc_prt_line(cp
, leftlen
, " Disconnects: ");
6380 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6381 len
= asc_prt_line(cp
, leftlen
, " %c",
6383 disc_enable
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' :
6387 len
= asc_prt_line(cp
, leftlen
, "\n");
6390 len
= asc_prt_line(cp
, leftlen
, " Command Queuing: ");
6392 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6393 len
= asc_prt_line(cp
, leftlen
, " %c",
6395 use_cmd_qng
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' :
6399 len
= asc_prt_line(cp
, leftlen
, "\n");
6402 len
= asc_prt_line(cp
, leftlen
, " Start Motor: ");
6404 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6405 len
= asc_prt_line(cp
, leftlen
, " %c",
6407 start_motor
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' :
6411 len
= asc_prt_line(cp
, leftlen
, "\n");
6414 len
= asc_prt_line(cp
, leftlen
, " Synchronous Transfer:");
6416 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6417 len
= asc_prt_line(cp
, leftlen
, " %c",
6419 init_sdtr
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' :
6423 len
= asc_prt_line(cp
, leftlen
, "\n");
6427 if (asc_dvc_varp
->bus_type
& ASC_IS_ISA
) {
6428 len
= asc_prt_line(cp
, leftlen
,
6429 " Host ISA DMA speed: %d MB/S\n",
6430 isa_dma_speed
[ASC_EEP_GET_DMA_SPD(ep
)]);
6433 #endif /* CONFIG_ISA */
6439 * asc_prt_adv_board_eeprom()
6441 * Print board EEPROM configuration.
6443 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
6444 * cf. asc_prt_line().
6446 * Return the number of characters copied into 'cp'. No more than
6447 * 'cplen' characters will be copied to 'cp'.
6449 static int asc_prt_adv_board_eeprom(struct Scsi_Host
*shost
, char *cp
, int cplen
)
6451 asc_board_t
*boardp
;
6452 ADV_DVC_VAR
*adv_dvc_varp
;
6458 uchar serialstr
[13];
6459 ADVEEP_3550_CONFIG
*ep_3550
= NULL
;
6460 ADVEEP_38C0800_CONFIG
*ep_38C0800
= NULL
;
6461 ADVEEP_38C1600_CONFIG
*ep_38C1600
= NULL
;
6464 ushort sdtr_speed
= 0;
6466 boardp
= ASC_BOARDP(shost
);
6467 adv_dvc_varp
= &boardp
->dvc_var
.adv_dvc_var
;
6468 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6469 ep_3550
= &boardp
->eep_config
.adv_3550_eep
;
6470 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6471 ep_38C0800
= &boardp
->eep_config
.adv_38C0800_eep
;
6473 ep_38C1600
= &boardp
->eep_config
.adv_38C1600_eep
;
6479 len
= asc_prt_line(cp
, leftlen
,
6480 "\nEEPROM Settings for AdvanSys SCSI Host %d:\n",
6484 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6485 wordp
= &ep_3550
->serial_number_word1
;
6486 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6487 wordp
= &ep_38C0800
->serial_number_word1
;
6489 wordp
= &ep_38C1600
->serial_number_word1
;
6492 if (asc_get_eeprom_string(wordp
, serialstr
) == ASC_TRUE
) {
6494 asc_prt_line(cp
, leftlen
, " Serial Number: %s\n",
6498 len
= asc_prt_line(cp
, leftlen
,
6499 " Serial Number Signature Not Present.\n");
6503 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6504 len
= asc_prt_line(cp
, leftlen
,
6505 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
6506 ep_3550
->adapter_scsi_id
,
6507 ep_3550
->max_host_qng
, ep_3550
->max_dvc_qng
);
6509 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6510 len
= asc_prt_line(cp
, leftlen
,
6511 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
6512 ep_38C0800
->adapter_scsi_id
,
6513 ep_38C0800
->max_host_qng
,
6514 ep_38C0800
->max_dvc_qng
);
6517 len
= asc_prt_line(cp
, leftlen
,
6518 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
6519 ep_38C1600
->adapter_scsi_id
,
6520 ep_38C1600
->max_host_qng
,
6521 ep_38C1600
->max_dvc_qng
);
6524 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6525 word
= ep_3550
->termination
;
6526 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6527 word
= ep_38C0800
->termination_lvd
;
6529 word
= ep_38C1600
->termination_lvd
;
6533 termstr
= "Low Off/High Off";
6536 termstr
= "Low Off/High On";
6539 termstr
= "Low On/High On";
6543 termstr
= "Automatic";
6547 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6548 len
= asc_prt_line(cp
, leftlen
,
6549 " termination: %u (%s), bios_ctrl: 0x%x\n",
6550 ep_3550
->termination
, termstr
,
6551 ep_3550
->bios_ctrl
);
6553 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6554 len
= asc_prt_line(cp
, leftlen
,
6555 " termination: %u (%s), bios_ctrl: 0x%x\n",
6556 ep_38C0800
->termination_lvd
, termstr
,
6557 ep_38C0800
->bios_ctrl
);
6560 len
= asc_prt_line(cp
, leftlen
,
6561 " termination: %u (%s), bios_ctrl: 0x%x\n",
6562 ep_38C1600
->termination_lvd
, termstr
,
6563 ep_38C1600
->bios_ctrl
);
6567 len
= asc_prt_line(cp
, leftlen
, " Target ID: ");
6569 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6570 len
= asc_prt_line(cp
, leftlen
, " %X", i
);
6573 len
= asc_prt_line(cp
, leftlen
, "\n");
6576 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6577 word
= ep_3550
->disc_enable
;
6578 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6579 word
= ep_38C0800
->disc_enable
;
6581 word
= ep_38C1600
->disc_enable
;
6583 len
= asc_prt_line(cp
, leftlen
, " Disconnects: ");
6585 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6586 len
= asc_prt_line(cp
, leftlen
, " %c",
6587 (word
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' : 'N');
6590 len
= asc_prt_line(cp
, leftlen
, "\n");
6593 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6594 word
= ep_3550
->tagqng_able
;
6595 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6596 word
= ep_38C0800
->tagqng_able
;
6598 word
= ep_38C1600
->tagqng_able
;
6600 len
= asc_prt_line(cp
, leftlen
, " Command Queuing: ");
6602 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6603 len
= asc_prt_line(cp
, leftlen
, " %c",
6604 (word
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' : 'N');
6607 len
= asc_prt_line(cp
, leftlen
, "\n");
6610 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6611 word
= ep_3550
->start_motor
;
6612 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6613 word
= ep_38C0800
->start_motor
;
6615 word
= ep_38C1600
->start_motor
;
6617 len
= asc_prt_line(cp
, leftlen
, " Start Motor: ");
6619 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6620 len
= asc_prt_line(cp
, leftlen
, " %c",
6621 (word
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' : 'N');
6624 len
= asc_prt_line(cp
, leftlen
, "\n");
6627 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6628 len
= asc_prt_line(cp
, leftlen
, " Synchronous Transfer:");
6630 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6631 len
= asc_prt_line(cp
, leftlen
, " %c",
6633 sdtr_able
& ADV_TID_TO_TIDMASK(i
)) ?
6637 len
= asc_prt_line(cp
, leftlen
, "\n");
6641 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6642 len
= asc_prt_line(cp
, leftlen
, " Ultra Transfer: ");
6644 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6645 len
= asc_prt_line(cp
, leftlen
, " %c",
6647 ultra_able
& ADV_TID_TO_TIDMASK(i
))
6651 len
= asc_prt_line(cp
, leftlen
, "\n");
6655 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
6656 word
= ep_3550
->wdtr_able
;
6657 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
6658 word
= ep_38C0800
->wdtr_able
;
6660 word
= ep_38C1600
->wdtr_able
;
6662 len
= asc_prt_line(cp
, leftlen
, " Wide Transfer: ");
6664 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6665 len
= asc_prt_line(cp
, leftlen
, " %c",
6666 (word
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' : 'N');
6669 len
= asc_prt_line(cp
, leftlen
, "\n");
6672 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
||
6673 adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C1600
) {
6674 len
= asc_prt_line(cp
, leftlen
,
6675 " Synchronous Transfer Speed (Mhz):\n ");
6677 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
6681 sdtr_speed
= adv_dvc_varp
->sdtr_speed1
;
6682 } else if (i
== 4) {
6683 sdtr_speed
= adv_dvc_varp
->sdtr_speed2
;
6684 } else if (i
== 8) {
6685 sdtr_speed
= adv_dvc_varp
->sdtr_speed3
;
6686 } else if (i
== 12) {
6687 sdtr_speed
= adv_dvc_varp
->sdtr_speed4
;
6689 switch (sdtr_speed
& ADV_MAX_TID
) {
6712 len
= asc_prt_line(cp
, leftlen
, "%X:%s ", i
, speed_str
);
6715 len
= asc_prt_line(cp
, leftlen
, "\n ");
6720 len
= asc_prt_line(cp
, leftlen
, "\n");
6728 * asc_prt_driver_conf()
6730 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
6731 * cf. asc_prt_line().
6733 * Return the number of characters copied into 'cp'. No more than
6734 * 'cplen' characters will be copied to 'cp'.
6736 static int asc_prt_driver_conf(struct Scsi_Host
*shost
, char *cp
, int cplen
)
6738 asc_board_t
*boardp
;
6744 boardp
= ASC_BOARDP(shost
);
6749 len
= asc_prt_line(cp
, leftlen
,
6750 "\nLinux Driver Configuration and Information for AdvanSys SCSI Host %d:\n",
6754 len
= asc_prt_line(cp
, leftlen
,
6755 " host_busy %u, last_reset %u, max_id %u, max_lun %u, max_channel %u\n",
6756 shost
->host_busy
, shost
->last_reset
, shost
->max_id
,
6757 shost
->max_lun
, shost
->max_channel
);
6760 len
= asc_prt_line(cp
, leftlen
,
6761 " unique_id %d, can_queue %d, this_id %d, sg_tablesize %u, cmd_per_lun %u\n",
6762 shost
->unique_id
, shost
->can_queue
, shost
->this_id
,
6763 shost
->sg_tablesize
, shost
->cmd_per_lun
);
6766 len
= asc_prt_line(cp
, leftlen
,
6767 " unchecked_isa_dma %d, use_clustering %d\n",
6768 shost
->unchecked_isa_dma
, shost
->use_clustering
);
6771 len
= asc_prt_line(cp
, leftlen
,
6772 " flags 0x%x, last_reset 0x%x, jiffies 0x%x, asc_n_io_port 0x%x\n",
6773 boardp
->flags
, boardp
->last_reset
, jiffies
,
6774 boardp
->asc_n_io_port
);
6777 /* 'shost->n_io_port' may be truncated because it is only one byte. */
6778 len
= asc_prt_line(cp
, leftlen
,
6779 " io_port 0x%x, n_io_port 0x%x\n",
6780 shost
->io_port
, shost
->n_io_port
);
6783 if (ASC_NARROW_BOARD(boardp
)) {
6784 chip_scsi_id
= boardp
->dvc_cfg
.asc_dvc_cfg
.chip_scsi_id
;
6786 chip_scsi_id
= boardp
->dvc_var
.adv_dvc_var
.chip_scsi_id
;
6793 * asc_prt_asc_board_info()
6795 * Print dynamic board configuration information.
6797 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
6798 * cf. asc_prt_line().
6800 * Return the number of characters copied into 'cp'. No more than
6801 * 'cplen' characters will be copied to 'cp'.
6803 static int asc_prt_asc_board_info(struct Scsi_Host
*shost
, char *cp
, int cplen
)
6805 asc_board_t
*boardp
;
6813 int renegotiate
= 0;
6815 boardp
= ASC_BOARDP(shost
);
6816 v
= &boardp
->dvc_var
.asc_dvc_var
;
6817 c
= &boardp
->dvc_cfg
.asc_dvc_cfg
;
6818 chip_scsi_id
= c
->chip_scsi_id
;
6823 len
= asc_prt_line(cp
, leftlen
,
6824 "\nAsc Library Configuration and Statistics for AdvanSys SCSI Host %d:\n",
6828 len
= asc_prt_line(cp
, leftlen
,
6829 " chip_version %u, lib_version 0x%x, lib_serial_no %u, mcode_date 0x%x\n",
6830 c
->chip_version
, c
->lib_version
, c
->lib_serial_no
,
6834 len
= asc_prt_line(cp
, leftlen
,
6835 " mcode_version 0x%x, err_code %u\n",
6836 c
->mcode_version
, v
->err_code
);
6839 /* Current number of commands waiting for the host. */
6840 len
= asc_prt_line(cp
, leftlen
,
6841 " Total Command Pending: %d\n", v
->cur_total_qng
);
6844 len
= asc_prt_line(cp
, leftlen
, " Command Queuing:");
6846 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6847 if ((chip_scsi_id
== i
) ||
6848 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
6851 len
= asc_prt_line(cp
, leftlen
, " %X:%c",
6854 use_tagged_qng
& ADV_TID_TO_TIDMASK(i
)) ?
6858 len
= asc_prt_line(cp
, leftlen
, "\n");
6861 /* Current number of commands waiting for a device. */
6862 len
= asc_prt_line(cp
, leftlen
, " Command Queue Pending:");
6864 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6865 if ((chip_scsi_id
== i
) ||
6866 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
6869 len
= asc_prt_line(cp
, leftlen
, " %X:%u", i
, v
->cur_dvc_qng
[i
]);
6872 len
= asc_prt_line(cp
, leftlen
, "\n");
6875 /* Current limit on number of commands that can be sent to a device. */
6876 len
= asc_prt_line(cp
, leftlen
, " Command Queue Limit:");
6878 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6879 if ((chip_scsi_id
== i
) ||
6880 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
6883 len
= asc_prt_line(cp
, leftlen
, " %X:%u", i
, v
->max_dvc_qng
[i
]);
6886 len
= asc_prt_line(cp
, leftlen
, "\n");
6889 /* Indicate whether the device has returned queue full status. */
6890 len
= asc_prt_line(cp
, leftlen
, " Command Queue Full:");
6892 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6893 if ((chip_scsi_id
== i
) ||
6894 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
6897 if (boardp
->queue_full
& ADV_TID_TO_TIDMASK(i
)) {
6898 len
= asc_prt_line(cp
, leftlen
, " %X:Y-%d",
6899 i
, boardp
->queue_full_cnt
[i
]);
6901 len
= asc_prt_line(cp
, leftlen
, " %X:N", i
);
6905 len
= asc_prt_line(cp
, leftlen
, "\n");
6908 len
= asc_prt_line(cp
, leftlen
, " Synchronous Transfer:");
6910 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6911 if ((chip_scsi_id
== i
) ||
6912 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
6915 len
= asc_prt_line(cp
, leftlen
, " %X:%c",
6918 sdtr_done
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' :
6922 len
= asc_prt_line(cp
, leftlen
, "\n");
6925 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
6926 uchar syn_period_ix
;
6928 if ((chip_scsi_id
== i
) ||
6929 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0) ||
6930 ((v
->init_sdtr
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
6934 len
= asc_prt_line(cp
, leftlen
, " %X:", i
);
6937 if ((boardp
->sdtr_data
[i
] & ASC_SYN_MAX_OFFSET
) == 0) {
6938 len
= asc_prt_line(cp
, leftlen
, " Asynchronous");
6942 (boardp
->sdtr_data
[i
] >> 4) & (v
->max_sdtr_index
-
6945 len
= asc_prt_line(cp
, leftlen
,
6946 " Transfer Period Factor: %d (%d.%d Mhz),",
6947 v
->sdtr_period_tbl
[syn_period_ix
],
6949 v
->sdtr_period_tbl
[syn_period_ix
],
6956 len
= asc_prt_line(cp
, leftlen
, " REQ/ACK Offset: %d",
6958 sdtr_data
[i
] & ASC_SYN_MAX_OFFSET
);
6962 if ((v
->sdtr_done
& ADV_TID_TO_TIDMASK(i
)) == 0) {
6963 len
= asc_prt_line(cp
, leftlen
, "*\n");
6966 len
= asc_prt_line(cp
, leftlen
, "\n");
6972 len
= asc_prt_line(cp
, leftlen
,
6973 " * = Re-negotiation pending before next command.\n");
6981 * asc_prt_adv_board_info()
6983 * Print dynamic board configuration information.
6985 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
6986 * cf. asc_prt_line().
6988 * Return the number of characters copied into 'cp'. No more than
6989 * 'cplen' characters will be copied to 'cp'.
6991 static int asc_prt_adv_board_info(struct Scsi_Host
*shost
, char *cp
, int cplen
)
6993 asc_board_t
*boardp
;
7000 AdvPortAddr iop_base
;
7001 ushort chip_scsi_id
;
7005 ushort sdtr_able
, wdtr_able
;
7006 ushort wdtr_done
, sdtr_done
;
7008 int renegotiate
= 0;
7010 boardp
= ASC_BOARDP(shost
);
7011 v
= &boardp
->dvc_var
.adv_dvc_var
;
7012 c
= &boardp
->dvc_cfg
.adv_dvc_cfg
;
7013 iop_base
= v
->iop_base
;
7014 chip_scsi_id
= v
->chip_scsi_id
;
7019 len
= asc_prt_line(cp
, leftlen
,
7020 "\nAdv Library Configuration and Statistics for AdvanSys SCSI Host %d:\n",
7024 len
= asc_prt_line(cp
, leftlen
,
7025 " iop_base 0x%lx, cable_detect: %X, err_code %u\n",
7027 AdvReadWordRegister(iop_base
,
7028 IOPW_SCSI_CFG1
) & CABLE_DETECT
,
7032 len
= asc_prt_line(cp
, leftlen
,
7033 " chip_version %u, lib_version 0x%x, mcode_date 0x%x, mcode_version 0x%x\n",
7034 c
->chip_version
, c
->lib_version
, c
->mcode_date
,
7038 AdvReadWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
, tagqng_able
);
7039 len
= asc_prt_line(cp
, leftlen
, " Queuing Enabled:");
7041 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
7042 if ((chip_scsi_id
== i
) ||
7043 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7047 len
= asc_prt_line(cp
, leftlen
, " %X:%c",
7049 (tagqng_able
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' :
7053 len
= asc_prt_line(cp
, leftlen
, "\n");
7056 len
= asc_prt_line(cp
, leftlen
, " Queue Limit:");
7058 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
7059 if ((chip_scsi_id
== i
) ||
7060 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7064 AdvReadByteLram(iop_base
, ASC_MC_NUMBER_OF_MAX_CMD
+ i
,
7067 len
= asc_prt_line(cp
, leftlen
, " %X:%d", i
, lrambyte
);
7070 len
= asc_prt_line(cp
, leftlen
, "\n");
7073 len
= asc_prt_line(cp
, leftlen
, " Command Pending:");
7075 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
7076 if ((chip_scsi_id
== i
) ||
7077 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7081 AdvReadByteLram(iop_base
, ASC_MC_NUMBER_OF_QUEUED_CMD
+ i
,
7084 len
= asc_prt_line(cp
, leftlen
, " %X:%d", i
, lrambyte
);
7087 len
= asc_prt_line(cp
, leftlen
, "\n");
7090 AdvReadWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
7091 len
= asc_prt_line(cp
, leftlen
, " Wide Enabled:");
7093 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
7094 if ((chip_scsi_id
== i
) ||
7095 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7099 len
= asc_prt_line(cp
, leftlen
, " %X:%c",
7101 (wdtr_able
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' :
7105 len
= asc_prt_line(cp
, leftlen
, "\n");
7108 AdvReadWordLram(iop_base
, ASC_MC_WDTR_DONE
, wdtr_done
);
7109 len
= asc_prt_line(cp
, leftlen
, " Transfer Bit Width:");
7111 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
7112 if ((chip_scsi_id
== i
) ||
7113 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7117 AdvReadWordLram(iop_base
,
7118 ASC_MC_DEVICE_HSHK_CFG_TABLE
+ (2 * i
),
7121 len
= asc_prt_line(cp
, leftlen
, " %X:%d",
7122 i
, (lramword
& 0x8000) ? 16 : 8);
7125 if ((wdtr_able
& ADV_TID_TO_TIDMASK(i
)) &&
7126 (wdtr_done
& ADV_TID_TO_TIDMASK(i
)) == 0) {
7127 len
= asc_prt_line(cp
, leftlen
, "*");
7132 len
= asc_prt_line(cp
, leftlen
, "\n");
7135 AdvReadWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
7136 len
= asc_prt_line(cp
, leftlen
, " Synchronous Enabled:");
7138 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
7139 if ((chip_scsi_id
== i
) ||
7140 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7144 len
= asc_prt_line(cp
, leftlen
, " %X:%c",
7146 (sdtr_able
& ADV_TID_TO_TIDMASK(i
)) ? 'Y' :
7150 len
= asc_prt_line(cp
, leftlen
, "\n");
7153 AdvReadWordLram(iop_base
, ASC_MC_SDTR_DONE
, sdtr_done
);
7154 for (i
= 0; i
<= ADV_MAX_TID
; i
++) {
7156 AdvReadWordLram(iop_base
,
7157 ASC_MC_DEVICE_HSHK_CFG_TABLE
+ (2 * i
),
7159 lramword
&= ~0x8000;
7161 if ((chip_scsi_id
== i
) ||
7162 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(i
)) == 0) ||
7163 ((sdtr_able
& ADV_TID_TO_TIDMASK(i
)) == 0)) {
7167 len
= asc_prt_line(cp
, leftlen
, " %X:", i
);
7170 if ((lramword
& 0x1F) == 0) { /* Check for REQ/ACK Offset 0. */
7171 len
= asc_prt_line(cp
, leftlen
, " Asynchronous");
7175 asc_prt_line(cp
, leftlen
,
7176 " Transfer Period Factor: ");
7179 if ((lramword
& 0x1F00) == 0x1100) { /* 80 Mhz */
7181 asc_prt_line(cp
, leftlen
, "9 (80.0 Mhz),");
7183 } else if ((lramword
& 0x1F00) == 0x1000) { /* 40 Mhz */
7185 asc_prt_line(cp
, leftlen
, "10 (40.0 Mhz),");
7187 } else { /* 20 Mhz or below. */
7189 period
= (((lramword
>> 8) * 25) + 50) / 4;
7191 if (period
== 0) { /* Should never happen. */
7193 asc_prt_line(cp
, leftlen
,
7197 len
= asc_prt_line(cp
, leftlen
,
7199 period
, 250 / period
,
7206 len
= asc_prt_line(cp
, leftlen
, " REQ/ACK Offset: %d",
7211 if ((sdtr_done
& ADV_TID_TO_TIDMASK(i
)) == 0) {
7212 len
= asc_prt_line(cp
, leftlen
, "*\n");
7215 len
= asc_prt_line(cp
, leftlen
, "\n");
7221 len
= asc_prt_line(cp
, leftlen
,
7222 " * = Re-negotiation pending before next command.\n");
7232 * Copy proc information to a read buffer taking into account the current
7233 * read offset in the file and the remaining space in the read buffer.
7236 asc_proc_copy(off_t advoffset
, off_t offset
, char *curbuf
, int leftlen
,
7237 char *cp
, int cplen
)
7241 ASC_DBG3(2, "asc_proc_copy: offset %d, advoffset %d, cplen %d\n",
7242 (unsigned)offset
, (unsigned)advoffset
, cplen
);
7243 if (offset
<= advoffset
) {
7244 /* Read offset below current offset, copy everything. */
7245 cnt
= min(cplen
, leftlen
);
7246 ASC_DBG3(2, "asc_proc_copy: curbuf 0x%lx, cp 0x%lx, cnt %d\n",
7247 (ulong
)curbuf
, (ulong
)cp
, cnt
);
7248 memcpy(curbuf
, cp
, cnt
);
7249 } else if (offset
< advoffset
+ cplen
) {
7250 /* Read offset within current range, partial copy. */
7251 cnt
= (advoffset
+ cplen
) - offset
;
7252 cp
= (cp
+ cplen
) - cnt
;
7253 cnt
= min(cnt
, leftlen
);
7254 ASC_DBG3(2, "asc_proc_copy: curbuf 0x%lx, cp 0x%lx, cnt %d\n",
7255 (ulong
)curbuf
, (ulong
)cp
, cnt
);
7256 memcpy(curbuf
, cp
, cnt
);
7264 * If 'cp' is NULL print to the console, otherwise print to a buffer.
7266 * Return 0 if printing to the console, otherwise return the number of
7267 * bytes written to the buffer.
7269 * Note: If any single line is greater than ASC_PRTLINE_SIZE bytes the stack
7270 * will be corrupted. 's[]' is defined to be ASC_PRTLINE_SIZE bytes.
7272 static int asc_prt_line(char *buf
, int buflen
, char *fmt
, ...)
7276 char s
[ASC_PRTLINE_SIZE
];
7278 va_start(args
, fmt
);
7279 ret
= vsprintf(s
, fmt
, args
);
7280 ASC_ASSERT(ret
< ASC_PRTLINE_SIZE
);
7285 ret
= min(buflen
, ret
);
7286 memcpy(buf
, s
, ret
);
7291 #endif /* CONFIG_PROC_FS */
7294 * --- Functions Required by the Asc Library
7298 * Delay for 'n' milliseconds. Don't use the 'jiffies'
7299 * global variable which is incremented once every 5 ms
7300 * from a timer interrupt, because this function may be
7301 * called when interrupts are disabled.
7303 static void DvcSleepMilliSecond(ADV_DCNT n
)
7305 ASC_DBG1(4, "DvcSleepMilliSecond: %lu\n", (ulong
)n
);
7310 * Currently and inline noop but leave as a placeholder.
7311 * Leave DvcEnterCritical() as a noop placeholder.
7313 static inline ulong
DvcEnterCritical(void)
7319 * Critical sections are all protected by the board spinlock.
7320 * Leave DvcLeaveCritical() as a noop placeholder.
7322 static inline void DvcLeaveCritical(ulong flags
)
7329 * DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words)
7331 * Calling/Exit State:
7335 * Output an ASC_SCSI_Q structure to the chip
7338 DvcPutScsiQ(PortAddr iop_base
, ushort s_addr
, uchar
*outbuf
, int words
)
7342 ASC_DBG_PRT_HEX(2, "DvcPutScsiQ", outbuf
, 2 * words
);
7343 AscSetChipLramAddr(iop_base
, s_addr
);
7344 for (i
= 0; i
< 2 * words
; i
+= 2) {
7345 if (i
== 4 || i
== 20) {
7348 outpw(iop_base
+ IOP_RAM_DATA
,
7349 ((ushort
)outbuf
[i
+ 1] << 8) | outbuf
[i
]);
7355 * DvcGetQinfo(PortAddr iop_base, ushort s_addr, uchar *inbuf, int words)
7357 * Calling/Exit State:
7361 * Input an ASC_QDONE_INFO structure from the chip
7364 DvcGetQinfo(PortAddr iop_base
, ushort s_addr
, uchar
*inbuf
, int words
)
7369 AscSetChipLramAddr(iop_base
, s_addr
);
7370 for (i
= 0; i
< 2 * words
; i
+= 2) {
7374 word
= inpw(iop_base
+ IOP_RAM_DATA
);
7375 inbuf
[i
] = word
& 0xff;
7376 inbuf
[i
+ 1] = (word
>> 8) & 0xff;
7378 ASC_DBG_PRT_HEX(2, "DvcGetQinfo", inbuf
, 2 * words
);
7382 * Read a PCI configuration byte.
7384 static uchar __devinit
DvcReadPCIConfigByte(ASC_DVC_VAR
*asc_dvc
, ushort offset
)
7388 pci_read_config_byte(to_pci_dev(asc_dvc
->cfg
->dev
), offset
, &byte_data
);
7390 #else /* !defined(CONFIG_PCI) */
7392 #endif /* !defined(CONFIG_PCI) */
7396 * Write a PCI configuration byte.
7398 static void __devinit
7399 DvcWritePCIConfigByte(ASC_DVC_VAR
*asc_dvc
, ushort offset
, uchar byte_data
)
7402 pci_write_config_byte(to_pci_dev(asc_dvc
->cfg
->dev
), offset
, byte_data
);
7403 #endif /* CONFIG_PCI */
7407 * Return the BIOS address of the adapter at the specified
7408 * I/O port and with the specified bus type.
7410 static ushort __devinit
AscGetChipBiosAddress(PortAddr iop_base
, ushort bus_type
)
7416 * The PCI BIOS is re-located by the motherboard BIOS. Because
7417 * of this the driver can not determine where a PCI BIOS is
7418 * loaded and executes.
7420 if (bus_type
& ASC_IS_PCI
) {
7424 if ((bus_type
& ASC_IS_EISA
) != 0) {
7425 cfg_lsw
= AscGetEisaChipCfg(iop_base
);
7427 bios_addr
= (ushort
)(ASC_BIOS_MIN_ADDR
+
7428 (cfg_lsw
* ASC_BIOS_BANK_SIZE
));
7431 #endif /* CONFIG_ISA */
7433 cfg_lsw
= AscGetChipCfgLsw(iop_base
);
7436 * ISA PnP uses the top bit as the 32K BIOS flag
7438 if (bus_type
== ASC_IS_ISAPNP
) {
7442 bios_addr
= (ushort
)(((cfg_lsw
>> 12) * ASC_BIOS_BANK_SIZE
) +
7448 * --- Functions Required by the Adv Library
7454 * Return the physical address of 'vaddr' and set '*lenp' to the
7455 * number of physically contiguous bytes that follow 'vaddr'.
7456 * 'flag' indicates the type of structure whose physical address
7457 * is being translated.
7459 * Note: Because Linux currently doesn't page the kernel and all
7460 * kernel buffers are physically contiguous, leave '*lenp' unchanged.
7463 DvcGetPhyAddr(ADV_DVC_VAR
*asc_dvc
, ADV_SCSI_REQ_Q
*scsiq
,
7464 uchar
*vaddr
, ADV_SDCNT
*lenp
, int flag
)
7468 paddr
= virt_to_bus(vaddr
);
7471 "DvcGetPhyAddr: vaddr 0x%lx, lenp 0x%lx *lenp %lu, paddr 0x%lx\n",
7472 (ulong
)vaddr
, (ulong
)lenp
, (ulong
)*((ulong
*)lenp
),
7479 * Read a PCI configuration byte.
7481 static uchar __devinit
DvcAdvReadPCIConfigByte(ADV_DVC_VAR
*asc_dvc
, ushort offset
)
7485 pci_read_config_byte(to_pci_dev(asc_dvc
->cfg
->dev
), offset
, &byte_data
);
7487 #else /* CONFIG_PCI */
7489 #endif /* CONFIG_PCI */
7493 * Write a PCI configuration byte.
7495 static void __devinit
7496 DvcAdvWritePCIConfigByte(ADV_DVC_VAR
*asc_dvc
, ushort offset
, uchar byte_data
)
7499 pci_write_config_byte(to_pci_dev(asc_dvc
->cfg
->dev
), offset
, byte_data
);
7500 #else /* CONFIG_PCI */
7502 #endif /* CONFIG_PCI */
7506 * --- Tracing and Debugging Functions
7509 #ifdef ADVANSYS_STATS
7510 #ifdef CONFIG_PROC_FS
7512 * asc_prt_board_stats()
7514 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
7515 * cf. asc_prt_line().
7517 * Return the number of characters copied into 'cp'. No more than
7518 * 'cplen' characters will be copied to 'cp'.
7520 static int asc_prt_board_stats(struct Scsi_Host
*shost
, char *cp
, int cplen
)
7525 struct asc_stats
*s
;
7526 asc_board_t
*boardp
;
7531 boardp
= ASC_BOARDP(shost
);
7532 s
= &boardp
->asc_stats
;
7534 len
= asc_prt_line(cp
, leftlen
,
7535 "\nLinux Driver Statistics for AdvanSys SCSI Host %d:\n",
7539 len
= asc_prt_line(cp
, leftlen
,
7540 " queuecommand %lu, reset %lu, biosparam %lu, interrupt %lu\n",
7541 s
->queuecommand
, s
->reset
, s
->biosparam
,
7545 len
= asc_prt_line(cp
, leftlen
,
7546 " callback %lu, done %lu, build_error %lu, build_noreq %lu, build_nosg %lu\n",
7547 s
->callback
, s
->done
, s
->build_error
,
7548 s
->adv_build_noreq
, s
->adv_build_nosg
);
7551 len
= asc_prt_line(cp
, leftlen
,
7552 " exe_noerror %lu, exe_busy %lu, exe_error %lu, exe_unknown %lu\n",
7553 s
->exe_noerror
, s
->exe_busy
, s
->exe_error
,
7558 * Display data transfer statistics.
7560 if (s
->cont_cnt
> 0) {
7561 len
= asc_prt_line(cp
, leftlen
, " cont_cnt %lu, ", s
->cont_cnt
);
7564 len
= asc_prt_line(cp
, leftlen
, "cont_xfer %lu.%01lu kb ",
7566 ASC_TENTHS(s
->cont_xfer
, 2));
7569 /* Contiguous transfer average size */
7570 len
= asc_prt_line(cp
, leftlen
, "avg_xfer %lu.%01lu kb\n",
7571 (s
->cont_xfer
/ 2) / s
->cont_cnt
,
7572 ASC_TENTHS((s
->cont_xfer
/ 2), s
->cont_cnt
));
7576 if (s
->sg_cnt
> 0) {
7578 len
= asc_prt_line(cp
, leftlen
, " sg_cnt %lu, sg_elem %lu, ",
7579 s
->sg_cnt
, s
->sg_elem
);
7582 len
= asc_prt_line(cp
, leftlen
, "sg_xfer %lu.%01lu kb\n",
7583 s
->sg_xfer
/ 2, ASC_TENTHS(s
->sg_xfer
, 2));
7586 /* Scatter gather transfer statistics */
7587 len
= asc_prt_line(cp
, leftlen
, " avg_num_elem %lu.%01lu, ",
7588 s
->sg_elem
/ s
->sg_cnt
,
7589 ASC_TENTHS(s
->sg_elem
, s
->sg_cnt
));
7592 len
= asc_prt_line(cp
, leftlen
, "avg_elem_size %lu.%01lu kb, ",
7593 (s
->sg_xfer
/ 2) / s
->sg_elem
,
7594 ASC_TENTHS((s
->sg_xfer
/ 2), s
->sg_elem
));
7597 len
= asc_prt_line(cp
, leftlen
, "avg_xfer_size %lu.%01lu kb\n",
7598 (s
->sg_xfer
/ 2) / s
->sg_cnt
,
7599 ASC_TENTHS((s
->sg_xfer
/ 2), s
->sg_cnt
));
7604 * Display request queuing statistics.
7606 len
= asc_prt_line(cp
, leftlen
,
7607 " Active and Waiting Request Queues (Time Unit: %d HZ):\n",
7615 * asc_prt_target_stats()
7617 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
7618 * cf. asc_prt_line().
7620 * This is separated from asc_prt_board_stats because a full set
7621 * of targets will overflow ASC_PRTBUF_SIZE.
7623 * Return the number of characters copied into 'cp'. No more than
7624 * 'cplen' characters will be copied to 'cp'.
7627 asc_prt_target_stats(struct Scsi_Host
*shost
, int tgt_id
, char *cp
, int cplen
)
7632 struct asc_stats
*s
;
7633 ushort chip_scsi_id
;
7634 asc_board_t
*boardp
;
7635 asc_queue_t
*active
;
7636 asc_queue_t
*waiting
;
7641 boardp
= ASC_BOARDP(shost
);
7642 s
= &boardp
->asc_stats
;
7644 active
= &ASC_BOARDP(shost
)->active
;
7645 waiting
= &ASC_BOARDP(shost
)->waiting
;
7647 if (ASC_NARROW_BOARD(boardp
)) {
7648 chip_scsi_id
= boardp
->dvc_cfg
.asc_dvc_cfg
.chip_scsi_id
;
7650 chip_scsi_id
= boardp
->dvc_var
.adv_dvc_var
.chip_scsi_id
;
7653 if ((chip_scsi_id
== tgt_id
) ||
7654 ((boardp
->init_tidmask
& ADV_TID_TO_TIDMASK(tgt_id
)) == 0)) {
7659 if (active
->q_tot_cnt
[tgt_id
] > 0
7660 || waiting
->q_tot_cnt
[tgt_id
] > 0) {
7661 len
= asc_prt_line(cp
, leftlen
, " target %d\n", tgt_id
);
7664 len
= asc_prt_line(cp
, leftlen
,
7665 " active: cnt [cur %d, max %d, tot %u], time [min %d, max %d, avg %lu.%01lu]\n",
7666 active
->q_cur_cnt
[tgt_id
],
7667 active
->q_max_cnt
[tgt_id
],
7668 active
->q_tot_cnt
[tgt_id
],
7669 active
->q_min_tim
[tgt_id
],
7670 active
->q_max_tim
[tgt_id
],
7671 (active
->q_tot_cnt
[tgt_id
] ==
7676 (active
->q_tot_cnt
[tgt_id
] ==
7677 0) ? 0 : ASC_TENTHS(active
->
7685 len
= asc_prt_line(cp
, leftlen
,
7686 " waiting: cnt [cur %d, max %d, tot %u], time [min %u, max %u, avg %lu.%01lu]\n",
7687 waiting
->q_cur_cnt
[tgt_id
],
7688 waiting
->q_max_cnt
[tgt_id
],
7689 waiting
->q_tot_cnt
[tgt_id
],
7690 waiting
->q_min_tim
[tgt_id
],
7691 waiting
->q_max_tim
[tgt_id
],
7692 (waiting
->q_tot_cnt
[tgt_id
] ==
7697 (waiting
->q_tot_cnt
[tgt_id
] ==
7698 0) ? 0 : ASC_TENTHS(waiting
->
7710 #endif /* CONFIG_PROC_FS */
7711 #endif /* ADVANSYS_STATS */
7713 #ifdef ADVANSYS_DEBUG
7715 * asc_prt_scsi_host()
7717 static void asc_prt_scsi_host(struct Scsi_Host
*s
)
7719 asc_board_t
*boardp
;
7721 boardp
= ASC_BOARDP(s
);
7723 printk("Scsi_Host at addr 0x%lx\n", (ulong
)s
);
7724 printk(" host_busy %u, host_no %d, last_reset %d,\n",
7725 s
->host_busy
, s
->host_no
, (unsigned)s
->last_reset
);
7727 printk(" base 0x%lx, io_port 0x%lx, n_io_port %u, irq 0x%x,\n",
7728 (ulong
)s
->base
, (ulong
)s
->io_port
, s
->n_io_port
, s
->irq
);
7730 printk(" dma_channel %d, this_id %d, can_queue %d,\n",
7731 s
->dma_channel
, s
->this_id
, s
->can_queue
);
7733 printk(" cmd_per_lun %d, sg_tablesize %d, unchecked_isa_dma %d\n",
7734 s
->cmd_per_lun
, s
->sg_tablesize
, s
->unchecked_isa_dma
);
7736 if (ASC_NARROW_BOARD(boardp
)) {
7737 asc_prt_asc_dvc_var(&ASC_BOARDP(s
)->dvc_var
.asc_dvc_var
);
7738 asc_prt_asc_dvc_cfg(&ASC_BOARDP(s
)->dvc_cfg
.asc_dvc_cfg
);
7740 asc_prt_adv_dvc_var(&ASC_BOARDP(s
)->dvc_var
.adv_dvc_var
);
7741 asc_prt_adv_dvc_cfg(&ASC_BOARDP(s
)->dvc_cfg
.adv_dvc_cfg
);
7746 * asc_prt_scsi_cmnd()
7748 static void asc_prt_scsi_cmnd(struct scsi_cmnd
*s
)
7750 printk("struct scsi_cmnd at addr 0x%lx\n", (ulong
)s
);
7752 printk(" host 0x%lx, device 0x%lx, target %u, lun %u, channel %u,\n",
7753 (ulong
)s
->device
->host
, (ulong
)s
->device
, s
->device
->id
,
7754 s
->device
->lun
, s
->device
->channel
);
7756 asc_prt_hex(" CDB", s
->cmnd
, s
->cmd_len
);
7758 printk("sc_data_direction %u, resid %d\n",
7759 s
->sc_data_direction
, s
->resid
);
7761 printk(" use_sg %u, sglist_len %u\n", s
->use_sg
, s
->sglist_len
);
7763 printk(" serial_number 0x%x, retries %d, allowed %d\n",
7764 (unsigned)s
->serial_number
, s
->retries
, s
->allowed
);
7766 printk(" timeout_per_command %d\n", s
->timeout_per_command
);
7769 (" scsi_done 0x%lx, done 0x%lx, host_scribble 0x%lx, result 0x%x\n",
7770 (ulong
)s
->scsi_done
, (ulong
)s
->done
, (ulong
)s
->host_scribble
,
7773 printk(" tag %u, pid %u\n", (unsigned)s
->tag
, (unsigned)s
->pid
);
7777 * asc_prt_asc_dvc_var()
7779 static void asc_prt_asc_dvc_var(ASC_DVC_VAR
*h
)
7781 printk("ASC_DVC_VAR at addr 0x%lx\n", (ulong
)h
);
7784 (" iop_base 0x%x, err_code 0x%x, dvc_cntl 0x%x, bug_fix_cntl %d,\n",
7785 h
->iop_base
, h
->err_code
, h
->dvc_cntl
, h
->bug_fix_cntl
);
7788 (" bus_type %d, isr_callback 0x%lx, exe_callback 0x%lx, init_sdtr 0x%x,\n",
7789 h
->bus_type
, (ulong
)h
->isr_callback
, (ulong
)h
->exe_callback
,
7790 (unsigned)h
->init_sdtr
);
7793 (" sdtr_done 0x%x, use_tagged_qng 0x%x, unit_not_ready 0x%x, chip_no 0x%x,\n",
7794 (unsigned)h
->sdtr_done
, (unsigned)h
->use_tagged_qng
,
7795 (unsigned)h
->unit_not_ready
, (unsigned)h
->chip_no
);
7798 (" queue_full_or_busy 0x%x, start_motor 0x%x, scsi_reset_wait %u,\n",
7799 (unsigned)h
->queue_full_or_busy
, (unsigned)h
->start_motor
,
7800 (unsigned)h
->scsi_reset_wait
);
7803 (" is_in_int %u, max_total_qng %u, cur_total_qng %u, in_critical_cnt %u,\n",
7804 (unsigned)h
->is_in_int
, (unsigned)h
->max_total_qng
,
7805 (unsigned)h
->cur_total_qng
, (unsigned)h
->in_critical_cnt
);
7808 (" last_q_shortage %u, init_state 0x%x, no_scam 0x%x, pci_fix_asyn_xfer 0x%x,\n",
7809 (unsigned)h
->last_q_shortage
, (unsigned)h
->init_state
,
7810 (unsigned)h
->no_scam
, (unsigned)h
->pci_fix_asyn_xfer
);
7812 printk(" cfg 0x%lx, irq_no 0x%x\n", (ulong
)h
->cfg
, (unsigned)h
->irq_no
);
7816 * asc_prt_asc_dvc_cfg()
7818 static void asc_prt_asc_dvc_cfg(ASC_DVC_CFG
*h
)
7820 printk("ASC_DVC_CFG at addr 0x%lx\n", (ulong
)h
);
7822 printk(" can_tagged_qng 0x%x, cmd_qng_enabled 0x%x,\n",
7823 h
->can_tagged_qng
, h
->cmd_qng_enabled
);
7824 printk(" disc_enable 0x%x, sdtr_enable 0x%x,\n",
7825 h
->disc_enable
, h
->sdtr_enable
);
7828 (" chip_scsi_id %d, isa_dma_speed %d, isa_dma_channel %d, chip_version %d,\n",
7829 h
->chip_scsi_id
, h
->isa_dma_speed
, h
->isa_dma_channel
,
7833 (" pci_device_id %d, lib_serial_no %u, lib_version %u, mcode_date 0x%x,\n",
7834 to_pci_dev(h
->dev
)->device
, h
->lib_serial_no
, h
->lib_version
,
7837 printk(" mcode_version %d, overrun_buf 0x%lx\n",
7838 h
->mcode_version
, (ulong
)h
->overrun_buf
);
7842 * asc_prt_asc_scsi_q()
7844 static void asc_prt_asc_scsi_q(ASC_SCSI_Q
*q
)
7849 printk("ASC_SCSI_Q at addr 0x%lx\n", (ulong
)q
);
7852 (" target_ix 0x%x, target_lun %u, srb_ptr 0x%lx, tag_code 0x%x,\n",
7853 q
->q2
.target_ix
, q
->q1
.target_lun
, (ulong
)q
->q2
.srb_ptr
,
7857 (" data_addr 0x%lx, data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n",
7858 (ulong
)le32_to_cpu(q
->q1
.data_addr
),
7859 (ulong
)le32_to_cpu(q
->q1
.data_cnt
),
7860 (ulong
)le32_to_cpu(q
->q1
.sense_addr
), q
->q1
.sense_len
);
7862 printk(" cdbptr 0x%lx, cdb_len %u, sg_head 0x%lx, sg_queue_cnt %u\n",
7863 (ulong
)q
->cdbptr
, q
->q2
.cdb_len
,
7864 (ulong
)q
->sg_head
, q
->q1
.sg_queue_cnt
);
7868 printk("ASC_SG_HEAD at addr 0x%lx\n", (ulong
)sgp
);
7869 printk(" entry_cnt %u, queue_cnt %u\n", sgp
->entry_cnt
,
7871 for (i
= 0; i
< sgp
->entry_cnt
; i
++) {
7872 printk(" [%u]: addr 0x%lx, bytes %lu\n",
7873 i
, (ulong
)le32_to_cpu(sgp
->sg_list
[i
].addr
),
7874 (ulong
)le32_to_cpu(sgp
->sg_list
[i
].bytes
));
7881 * asc_prt_asc_qdone_info()
7883 static void asc_prt_asc_qdone_info(ASC_QDONE_INFO
*q
)
7885 printk("ASC_QDONE_INFO at addr 0x%lx\n", (ulong
)q
);
7886 printk(" srb_ptr 0x%lx, target_ix %u, cdb_len %u, tag_code %u,\n",
7887 (ulong
)q
->d2
.srb_ptr
, q
->d2
.target_ix
, q
->d2
.cdb_len
,
7890 (" done_stat 0x%x, host_stat 0x%x, scsi_stat 0x%x, scsi_msg 0x%x\n",
7891 q
->d3
.done_stat
, q
->d3
.host_stat
, q
->d3
.scsi_stat
, q
->d3
.scsi_msg
);
7895 * asc_prt_adv_dvc_var()
7897 * Display an ADV_DVC_VAR structure.
7899 static void asc_prt_adv_dvc_var(ADV_DVC_VAR
*h
)
7901 printk(" ADV_DVC_VAR at addr 0x%lx\n", (ulong
)h
);
7903 printk(" iop_base 0x%lx, err_code 0x%x, ultra_able 0x%x\n",
7904 (ulong
)h
->iop_base
, h
->err_code
, (unsigned)h
->ultra_able
);
7906 printk(" isr_callback 0x%lx, sdtr_able 0x%x, wdtr_able 0x%x\n",
7907 (ulong
)h
->isr_callback
, (unsigned)h
->sdtr_able
,
7908 (unsigned)h
->wdtr_able
);
7910 printk(" start_motor 0x%x, scsi_reset_wait 0x%x, irq_no 0x%x,\n",
7911 (unsigned)h
->start_motor
,
7912 (unsigned)h
->scsi_reset_wait
, (unsigned)h
->irq_no
);
7914 printk(" max_host_qng %u, max_dvc_qng %u, carr_freelist 0x%lxn\n",
7915 (unsigned)h
->max_host_qng
, (unsigned)h
->max_dvc_qng
,
7916 (ulong
)h
->carr_freelist
);
7918 printk(" icq_sp 0x%lx, irq_sp 0x%lx\n",
7919 (ulong
)h
->icq_sp
, (ulong
)h
->irq_sp
);
7921 printk(" no_scam 0x%x, tagqng_able 0x%x\n",
7922 (unsigned)h
->no_scam
, (unsigned)h
->tagqng_able
);
7924 printk(" chip_scsi_id 0x%x, cfg 0x%lx\n",
7925 (unsigned)h
->chip_scsi_id
, (ulong
)h
->cfg
);
7929 * asc_prt_adv_dvc_cfg()
7931 * Display an ADV_DVC_CFG structure.
7933 static void asc_prt_adv_dvc_cfg(ADV_DVC_CFG
*h
)
7935 printk(" ADV_DVC_CFG at addr 0x%lx\n", (ulong
)h
);
7937 printk(" disc_enable 0x%x, termination 0x%x\n",
7938 h
->disc_enable
, h
->termination
);
7940 printk(" chip_version 0x%x, mcode_date 0x%x\n",
7941 h
->chip_version
, h
->mcode_date
);
7943 printk(" mcode_version 0x%x, pci_device_id 0x%x, lib_version %u\n",
7944 h
->mcode_version
, to_pci_dev(h
->dev
)->device
, h
->lib_version
);
7946 printk(" control_flag 0x%x, pci_slot_info 0x%x\n",
7947 h
->control_flag
, h
->pci_slot_info
);
7951 * asc_prt_adv_scsi_req_q()
7953 * Display an ADV_SCSI_REQ_Q structure.
7955 static void asc_prt_adv_scsi_req_q(ADV_SCSI_REQ_Q
*q
)
7958 struct asc_sg_block
*sg_ptr
;
7960 printk("ADV_SCSI_REQ_Q at addr 0x%lx\n", (ulong
)q
);
7962 printk(" target_id %u, target_lun %u, srb_ptr 0x%lx, a_flag 0x%x\n",
7963 q
->target_id
, q
->target_lun
, (ulong
)q
->srb_ptr
, q
->a_flag
);
7965 printk(" cntl 0x%x, data_addr 0x%lx, vdata_addr 0x%lx\n",
7966 q
->cntl
, (ulong
)le32_to_cpu(q
->data_addr
), (ulong
)q
->vdata_addr
);
7968 printk(" data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n",
7969 (ulong
)le32_to_cpu(q
->data_cnt
),
7970 (ulong
)le32_to_cpu(q
->sense_addr
), q
->sense_len
);
7973 (" cdb_len %u, done_status 0x%x, host_status 0x%x, scsi_status 0x%x\n",
7974 q
->cdb_len
, q
->done_status
, q
->host_status
, q
->scsi_status
);
7976 printk(" sg_working_ix 0x%x, target_cmd %u\n",
7977 q
->sg_working_ix
, q
->target_cmd
);
7979 printk(" scsiq_rptr 0x%lx, sg_real_addr 0x%lx, sg_list_ptr 0x%lx\n",
7980 (ulong
)le32_to_cpu(q
->scsiq_rptr
),
7981 (ulong
)le32_to_cpu(q
->sg_real_addr
), (ulong
)q
->sg_list_ptr
);
7983 /* Display the request's ADV_SG_BLOCK structures. */
7984 if (q
->sg_list_ptr
!= NULL
) {
7988 * 'sg_ptr' is a physical address. Convert it to a virtual
7989 * address by indexing 'sg_blk_cnt' into the virtual address
7990 * array 'sg_list_ptr'.
7992 * XXX - Assumes all SG physical blocks are virtually contiguous.
7995 &(((ADV_SG_BLOCK
*)(q
->sg_list_ptr
))[sg_blk_cnt
]);
7996 asc_prt_adv_sgblock(sg_blk_cnt
, sg_ptr
);
7997 if (sg_ptr
->sg_ptr
== 0) {
8006 * asc_prt_adv_sgblock()
8008 * Display an ADV_SG_BLOCK structure.
8010 static void asc_prt_adv_sgblock(int sgblockno
, ADV_SG_BLOCK
*b
)
8014 printk(" ASC_SG_BLOCK at addr 0x%lx (sgblockno %d)\n",
8015 (ulong
)b
, sgblockno
);
8016 printk(" sg_cnt %u, sg_ptr 0x%lx\n",
8017 b
->sg_cnt
, (ulong
)le32_to_cpu(b
->sg_ptr
));
8018 ASC_ASSERT(b
->sg_cnt
<= NO_OF_SG_PER_BLOCK
);
8019 if (b
->sg_ptr
!= 0) {
8020 ASC_ASSERT(b
->sg_cnt
== NO_OF_SG_PER_BLOCK
);
8022 for (i
= 0; i
< b
->sg_cnt
; i
++) {
8023 printk(" [%u]: sg_addr 0x%lx, sg_count 0x%lx\n",
8024 i
, (ulong
)b
->sg_list
[i
].sg_addr
,
8025 (ulong
)b
->sg_list
[i
].sg_count
);
8032 * Print hexadecimal output in 4 byte groupings 32 bytes
8033 * or 8 double-words per line.
8035 static void asc_prt_hex(char *f
, uchar
*s
, int l
)
8042 printk("%s: (%d bytes)\n", f
, l
);
8044 for (i
= 0; i
< l
; i
+= 32) {
8046 /* Display a maximum of 8 double-words per line. */
8047 if ((k
= (l
- i
) / 4) >= 8) {
8054 for (j
= 0; j
< k
; j
++) {
8055 printk(" %2.2X%2.2X%2.2X%2.2X",
8056 (unsigned)s
[i
+ (j
* 4)],
8057 (unsigned)s
[i
+ (j
* 4) + 1],
8058 (unsigned)s
[i
+ (j
* 4) + 2],
8059 (unsigned)s
[i
+ (j
* 4) + 3]);
8067 printk(" %2.2X", (unsigned)s
[i
+ (j
* 4)]);
8070 printk(" %2.2X%2.2X",
8071 (unsigned)s
[i
+ (j
* 4)],
8072 (unsigned)s
[i
+ (j
* 4) + 1]);
8075 printk(" %2.2X%2.2X%2.2X",
8076 (unsigned)s
[i
+ (j
* 4) + 1],
8077 (unsigned)s
[i
+ (j
* 4) + 2],
8078 (unsigned)s
[i
+ (j
* 4) + 3]);
8085 #endif /* ADVANSYS_DEBUG */
8088 * --- Asc Library Functions
8091 static ushort __devinit
AscGetEisaChipCfg(PortAddr iop_base
)
8093 PortAddr eisa_cfg_iop
;
8095 eisa_cfg_iop
= (PortAddr
) ASC_GET_EISA_SLOT(iop_base
) |
8096 (PortAddr
) (ASC_EISA_CFG_IOP_MASK
);
8097 return (inpw(eisa_cfg_iop
));
8100 static uchar __devinit
AscSetChipScsiID(PortAddr iop_base
, uchar new_host_id
)
8104 if (AscGetChipScsiID(iop_base
) == new_host_id
) {
8105 return (new_host_id
);
8107 cfg_lsw
= AscGetChipCfgLsw(iop_base
);
8109 cfg_lsw
|= (ushort
)((new_host_id
& ASC_MAX_TID
) << 8);
8110 AscSetChipCfgLsw(iop_base
, cfg_lsw
);
8111 return (AscGetChipScsiID(iop_base
));
8114 static uchar __devinit
AscGetChipScsiCtrl(PortAddr iop_base
)
8118 AscSetBank(iop_base
, 1);
8119 sc
= inp(iop_base
+ IOP_REG_SC
);
8120 AscSetBank(iop_base
, 0);
8124 static uchar __devinit
AscGetChipVersion(PortAddr iop_base
, ushort bus_type
)
8126 if ((bus_type
& ASC_IS_EISA
) != 0) {
8129 eisa_iop
= (PortAddr
) ASC_GET_EISA_SLOT(iop_base
) |
8130 (PortAddr
) ASC_EISA_REV_IOP_MASK
;
8131 revision
= inp(eisa_iop
);
8132 return ((uchar
)((ASC_CHIP_MIN_VER_EISA
- 1) + revision
));
8134 return (AscGetChipVerNo(iop_base
));
8137 static ushort __devinit
AscGetChipBusType(PortAddr iop_base
)
8141 chip_ver
= AscGetChipVerNo(iop_base
);
8142 if ((chip_ver
>= ASC_CHIP_MIN_VER_VL
)
8143 && (chip_ver
<= ASC_CHIP_MAX_VER_VL
)
8145 if (((iop_base
& 0x0C30) == 0x0C30)
8146 || ((iop_base
& 0x0C50) == 0x0C50)
8148 return (ASC_IS_EISA
);
8152 if ((chip_ver
>= ASC_CHIP_MIN_VER_ISA
) &&
8153 (chip_ver
<= ASC_CHIP_MAX_VER_ISA
)) {
8154 if (chip_ver
>= ASC_CHIP_MIN_VER_ISA_PNP
) {
8155 return (ASC_IS_ISAPNP
);
8157 return (ASC_IS_ISA
);
8158 } else if ((chip_ver
>= ASC_CHIP_MIN_VER_PCI
) &&
8159 (chip_ver
<= ASC_CHIP_MAX_VER_PCI
)) {
8160 return (ASC_IS_PCI
);
8166 AscLoadMicroCode(PortAddr iop_base
,
8167 ushort s_addr
, uchar
*mcode_buf
, ushort mcode_size
)
8170 ushort mcode_word_size
;
8171 ushort mcode_chksum
;
8173 /* Write the microcode buffer starting at LRAM address 0. */
8174 mcode_word_size
= (ushort
)(mcode_size
>> 1);
8175 AscMemWordSetLram(iop_base
, s_addr
, 0, mcode_word_size
);
8176 AscMemWordCopyPtrToLram(iop_base
, s_addr
, mcode_buf
, mcode_word_size
);
8178 chksum
= AscMemSumLramWord(iop_base
, s_addr
, mcode_word_size
);
8179 ASC_DBG1(1, "AscLoadMicroCode: chksum 0x%lx\n", (ulong
)chksum
);
8180 mcode_chksum
= (ushort
)AscMemSumLramWord(iop_base
,
8181 (ushort
)ASC_CODE_SEC_BEG
,
8182 (ushort
)((mcode_size
-
8186 ASC_DBG1(1, "AscLoadMicroCode: mcode_chksum 0x%lx\n",
8187 (ulong
)mcode_chksum
);
8188 AscWriteLramWord(iop_base
, ASCV_MCODE_CHKSUM_W
, mcode_chksum
);
8189 AscWriteLramWord(iop_base
, ASCV_MCODE_SIZE_W
, mcode_size
);
8193 static int AscFindSignature(PortAddr iop_base
)
8197 ASC_DBG2(1, "AscFindSignature: AscGetChipSignatureByte(0x%x) 0x%x\n",
8198 iop_base
, AscGetChipSignatureByte(iop_base
));
8199 if (AscGetChipSignatureByte(iop_base
) == (uchar
)ASC_1000_ID1B
) {
8201 "AscFindSignature: AscGetChipSignatureWord(0x%x) 0x%x\n",
8202 iop_base
, AscGetChipSignatureWord(iop_base
));
8203 sig_word
= AscGetChipSignatureWord(iop_base
);
8204 if ((sig_word
== (ushort
)ASC_1000_ID0W
) ||
8205 (sig_word
== (ushort
)ASC_1000_ID0W_FIX
)) {
8212 static PortAddr _asc_def_iop_base
[ASC_IOADR_TABLE_MAX_IX
] __initdata
= {
8213 0x100, ASC_IOADR_1
, 0x120, ASC_IOADR_2
, 0x140, ASC_IOADR_3
, ASC_IOADR_4
,
8214 ASC_IOADR_5
, ASC_IOADR_6
, ASC_IOADR_7
, ASC_IOADR_8
8218 static uchar _isa_pnp_inited __initdata
= 0;
8220 static PortAddr __init
AscSearchIOPortAddr(PortAddr iop_beg
, ushort bus_type
)
8222 if (bus_type
& ASC_IS_VL
) {
8223 while ((iop_beg
= AscSearchIOPortAddr11(iop_beg
)) != 0) {
8224 if (AscGetChipVersion(iop_beg
, bus_type
) <=
8225 ASC_CHIP_MAX_VER_VL
) {
8231 if (bus_type
& ASC_IS_ISA
) {
8232 if (_isa_pnp_inited
== 0) {
8233 AscSetISAPNPWaitForKey();
8236 while ((iop_beg
= AscSearchIOPortAddr11(iop_beg
)) != 0) {
8237 if ((AscGetChipVersion(iop_beg
, bus_type
) &
8238 ASC_CHIP_VER_ISA_BIT
) != 0) {
8244 if (bus_type
& ASC_IS_EISA
) {
8245 if ((iop_beg
= AscSearchIOPortAddrEISA(iop_beg
)) != 0) {
8253 static PortAddr __init
AscSearchIOPortAddr11(PortAddr s_addr
)
8258 for (i
= 0; i
< ASC_IOADR_TABLE_MAX_IX
; i
++) {
8259 if (_asc_def_iop_base
[i
] > s_addr
) {
8263 for (; i
< ASC_IOADR_TABLE_MAX_IX
; i
++) {
8264 iop_base
= _asc_def_iop_base
[i
];
8265 if (!request_region(iop_base
, ASC_IOADR_GAP
, "advansys")) {
8267 "AscSearchIOPortAddr11: check_region() failed I/O port 0x%x\n",
8271 ASC_DBG1(1, "AscSearchIOPortAddr11: probing I/O port 0x%x\n",
8273 release_region(iop_base
, ASC_IOADR_GAP
);
8274 if (AscFindSignature(iop_base
)) {
8281 static void __init
AscSetISAPNPWaitForKey(void)
8283 outp(ASC_ISA_PNP_PORT_ADDR
, 0x02);
8284 outp(ASC_ISA_PNP_PORT_WRITE
, 0x02);
8287 #endif /* CONFIG_ISA */
8289 static void __devinit
AscToggleIRQAct(PortAddr iop_base
)
8291 AscSetChipStatus(iop_base
, CIW_IRQ_ACT
);
8292 AscSetChipStatus(iop_base
, 0);
8296 static uchar __devinit
AscGetChipIRQ(PortAddr iop_base
, ushort bus_type
)
8301 if ((bus_type
& ASC_IS_EISA
) != 0) {
8302 cfg_lsw
= AscGetEisaChipCfg(iop_base
);
8303 chip_irq
= (uchar
)(((cfg_lsw
>> 8) & 0x07) + 10);
8304 if ((chip_irq
== 13) || (chip_irq
> 15)) {
8309 if ((bus_type
& ASC_IS_VL
) != 0) {
8310 cfg_lsw
= AscGetChipCfgLsw(iop_base
);
8311 chip_irq
= (uchar
)(((cfg_lsw
>> 2) & 0x07));
8312 if ((chip_irq
== 0) || (chip_irq
== 4) || (chip_irq
== 7)) {
8315 return ((uchar
)(chip_irq
+ (ASC_MIN_IRQ_NO
- 1)));
8317 cfg_lsw
= AscGetChipCfgLsw(iop_base
);
8318 chip_irq
= (uchar
)(((cfg_lsw
>> 2) & 0x03));
8320 chip_irq
+= (uchar
)2;
8321 return ((uchar
)(chip_irq
+ ASC_MIN_IRQ_NO
));
8324 static uchar __devinit
8325 AscSetChipIRQ(PortAddr iop_base
, uchar irq_no
, ushort bus_type
)
8329 if ((bus_type
& ASC_IS_VL
) != 0) {
8331 if ((irq_no
< ASC_MIN_IRQ_NO
)
8332 || (irq_no
> ASC_MAX_IRQ_NO
)) {
8335 irq_no
-= (uchar
)((ASC_MIN_IRQ_NO
- 1));
8338 cfg_lsw
= (ushort
)(AscGetChipCfgLsw(iop_base
) & 0xFFE3);
8339 cfg_lsw
|= (ushort
)0x0010;
8340 AscSetChipCfgLsw(iop_base
, cfg_lsw
);
8341 AscToggleIRQAct(iop_base
);
8342 cfg_lsw
= (ushort
)(AscGetChipCfgLsw(iop_base
) & 0xFFE0);
8343 cfg_lsw
|= (ushort
)((irq_no
& 0x07) << 2);
8344 AscSetChipCfgLsw(iop_base
, cfg_lsw
);
8345 AscToggleIRQAct(iop_base
);
8346 return (AscGetChipIRQ(iop_base
, bus_type
));
8348 if ((bus_type
& (ASC_IS_ISA
)) != 0) {
8351 irq_no
-= (uchar
)ASC_MIN_IRQ_NO
;
8352 cfg_lsw
= (ushort
)(AscGetChipCfgLsw(iop_base
) & 0xFFF3);
8353 cfg_lsw
|= (ushort
)((irq_no
& 0x03) << 2);
8354 AscSetChipCfgLsw(iop_base
, cfg_lsw
);
8355 return (AscGetChipIRQ(iop_base
, bus_type
));
8361 static void __devinit
AscEnableIsaDma(uchar dma_channel
)
8363 if (dma_channel
< 4) {
8364 outp(0x000B, (ushort
)(0xC0 | dma_channel
));
8365 outp(0x000A, dma_channel
);
8366 } else if (dma_channel
< 8) {
8367 outp(0x00D6, (ushort
)(0xC0 | (dma_channel
- 4)));
8368 outp(0x00D4, (ushort
)(dma_channel
- 4));
8372 #endif /* CONFIG_ISA */
8374 static int AscIsrChipHalted(ASC_DVC_VAR
*asc_dvc
)
8380 ushort int_halt_code
;
8381 ASC_SCSI_BIT_ID_TYPE scsi_busy
;
8382 ASC_SCSI_BIT_ID_TYPE target_id
;
8389 uchar q_cntl
, tid_no
;
8393 asc_board_t
*boardp
;
8395 ASC_ASSERT(asc_dvc
->drv_ptr
!= NULL
);
8396 boardp
= asc_dvc
->drv_ptr
;
8398 iop_base
= asc_dvc
->iop_base
;
8399 int_halt_code
= AscReadLramWord(iop_base
, ASCV_HALTCODE_W
);
8401 halt_qp
= AscReadLramByte(iop_base
, ASCV_CURCDB_B
);
8402 halt_q_addr
= ASC_QNO_TO_QADDR(halt_qp
);
8403 target_ix
= AscReadLramByte(iop_base
,
8404 (ushort
)(halt_q_addr
+
8405 (ushort
)ASC_SCSIQ_B_TARGET_IX
));
8407 AscReadLramByte(iop_base
,
8408 (ushort
)(halt_q_addr
+ (ushort
)ASC_SCSIQ_B_CNTL
));
8409 tid_no
= ASC_TIX_TO_TID(target_ix
);
8410 target_id
= (uchar
)ASC_TID_TO_TARGET_ID(tid_no
);
8411 if (asc_dvc
->pci_fix_asyn_xfer
& target_id
) {
8412 asyn_sdtr
= ASYN_SDTR_DATA_FIX_PCI_REV_AB
;
8416 if (int_halt_code
== ASC_HALT_DISABLE_ASYN_USE_SYN_FIX
) {
8417 if (asc_dvc
->pci_fix_asyn_xfer
& target_id
) {
8418 AscSetChipSDTR(iop_base
, 0, tid_no
);
8419 boardp
->sdtr_data
[tid_no
] = 0;
8421 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8423 } else if (int_halt_code
== ASC_HALT_ENABLE_ASYN_USE_SYN_FIX
) {
8424 if (asc_dvc
->pci_fix_asyn_xfer
& target_id
) {
8425 AscSetChipSDTR(iop_base
, asyn_sdtr
, tid_no
);
8426 boardp
->sdtr_data
[tid_no
] = asyn_sdtr
;
8428 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8430 } else if (int_halt_code
== ASC_HALT_EXTMSG_IN
) {
8432 AscMemWordCopyPtrFromLram(iop_base
,
8435 sizeof(EXT_MSG
) >> 1);
8437 if (ext_msg
.msg_type
== MS_EXTEND
&&
8438 ext_msg
.msg_req
== MS_SDTR_CODE
&&
8439 ext_msg
.msg_len
== MS_SDTR_LEN
) {
8441 if ((ext_msg
.req_ack_offset
> ASC_SYN_MAX_OFFSET
)) {
8443 sdtr_accept
= FALSE
;
8444 ext_msg
.req_ack_offset
= ASC_SYN_MAX_OFFSET
;
8446 if ((ext_msg
.xfer_period
<
8447 asc_dvc
->sdtr_period_tbl
[asc_dvc
->
8448 host_init_sdtr_index
])
8449 || (ext_msg
.xfer_period
>
8450 asc_dvc
->sdtr_period_tbl
[asc_dvc
->
8452 sdtr_accept
= FALSE
;
8453 ext_msg
.xfer_period
=
8454 asc_dvc
->sdtr_period_tbl
[asc_dvc
->
8455 host_init_sdtr_index
];
8459 AscCalSDTRData(asc_dvc
, ext_msg
.xfer_period
,
8460 ext_msg
.req_ack_offset
);
8461 if ((sdtr_data
== 0xFF)) {
8463 q_cntl
|= QC_MSG_OUT
;
8464 asc_dvc
->init_sdtr
&= ~target_id
;
8465 asc_dvc
->sdtr_done
&= ~target_id
;
8466 AscSetChipSDTR(iop_base
, asyn_sdtr
,
8468 boardp
->sdtr_data
[tid_no
] = asyn_sdtr
;
8471 if (ext_msg
.req_ack_offset
== 0) {
8473 q_cntl
&= ~QC_MSG_OUT
;
8474 asc_dvc
->init_sdtr
&= ~target_id
;
8475 asc_dvc
->sdtr_done
&= ~target_id
;
8476 AscSetChipSDTR(iop_base
, asyn_sdtr
, tid_no
);
8478 if (sdtr_accept
&& (q_cntl
& QC_MSG_OUT
)) {
8480 q_cntl
&= ~QC_MSG_OUT
;
8481 asc_dvc
->sdtr_done
|= target_id
;
8482 asc_dvc
->init_sdtr
|= target_id
;
8483 asc_dvc
->pci_fix_asyn_xfer
&=
8486 AscCalSDTRData(asc_dvc
,
8487 ext_msg
.xfer_period
,
8490 AscSetChipSDTR(iop_base
, sdtr_data
,
8492 boardp
->sdtr_data
[tid_no
] = sdtr_data
;
8495 q_cntl
|= QC_MSG_OUT
;
8496 AscMsgOutSDTR(asc_dvc
,
8497 ext_msg
.xfer_period
,
8498 ext_msg
.req_ack_offset
);
8499 asc_dvc
->pci_fix_asyn_xfer
&=
8502 AscCalSDTRData(asc_dvc
,
8503 ext_msg
.xfer_period
,
8506 AscSetChipSDTR(iop_base
, sdtr_data
,
8508 boardp
->sdtr_data
[tid_no
] = sdtr_data
;
8509 asc_dvc
->sdtr_done
|= target_id
;
8510 asc_dvc
->init_sdtr
|= target_id
;
8514 AscWriteLramByte(iop_base
,
8515 (ushort
)(halt_q_addr
+
8516 (ushort
)ASC_SCSIQ_B_CNTL
),
8518 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8520 } else if (ext_msg
.msg_type
== MS_EXTEND
&&
8521 ext_msg
.msg_req
== MS_WDTR_CODE
&&
8522 ext_msg
.msg_len
== MS_WDTR_LEN
) {
8524 ext_msg
.wdtr_width
= 0;
8525 AscMemWordCopyPtrToLram(iop_base
,
8528 sizeof(EXT_MSG
) >> 1);
8529 q_cntl
|= QC_MSG_OUT
;
8530 AscWriteLramByte(iop_base
,
8531 (ushort
)(halt_q_addr
+
8532 (ushort
)ASC_SCSIQ_B_CNTL
),
8534 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8538 ext_msg
.msg_type
= MESSAGE_REJECT
;
8539 AscMemWordCopyPtrToLram(iop_base
,
8542 sizeof(EXT_MSG
) >> 1);
8543 q_cntl
|= QC_MSG_OUT
;
8544 AscWriteLramByte(iop_base
,
8545 (ushort
)(halt_q_addr
+
8546 (ushort
)ASC_SCSIQ_B_CNTL
),
8548 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8551 } else if (int_halt_code
== ASC_HALT_CHK_CONDITION
) {
8553 q_cntl
|= QC_REQ_SENSE
;
8555 if ((asc_dvc
->init_sdtr
& target_id
) != 0) {
8557 asc_dvc
->sdtr_done
&= ~target_id
;
8559 sdtr_data
= AscGetMCodeInitSDTRAtID(iop_base
, tid_no
);
8560 q_cntl
|= QC_MSG_OUT
;
8561 AscMsgOutSDTR(asc_dvc
,
8563 sdtr_period_tbl
[(sdtr_data
>> 4) &
8567 (uchar
)(sdtr_data
& (uchar
)
8568 ASC_SYN_MAX_OFFSET
));
8571 AscWriteLramByte(iop_base
,
8572 (ushort
)(halt_q_addr
+
8573 (ushort
)ASC_SCSIQ_B_CNTL
), q_cntl
);
8575 tag_code
= AscReadLramByte(iop_base
,
8576 (ushort
)(halt_q_addr
+ (ushort
)
8577 ASC_SCSIQ_B_TAG_CODE
));
8579 if ((asc_dvc
->pci_fix_asyn_xfer
& target_id
)
8580 && !(asc_dvc
->pci_fix_asyn_xfer_always
& target_id
)
8583 tag_code
|= (ASC_TAG_FLAG_DISABLE_DISCONNECT
8584 | ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX
);
8587 AscWriteLramByte(iop_base
,
8588 (ushort
)(halt_q_addr
+
8589 (ushort
)ASC_SCSIQ_B_TAG_CODE
),
8592 q_status
= AscReadLramByte(iop_base
,
8593 (ushort
)(halt_q_addr
+ (ushort
)
8594 ASC_SCSIQ_B_STATUS
));
8595 q_status
|= (QS_READY
| QS_BUSY
);
8596 AscWriteLramByte(iop_base
,
8597 (ushort
)(halt_q_addr
+
8598 (ushort
)ASC_SCSIQ_B_STATUS
),
8601 scsi_busy
= AscReadLramByte(iop_base
, (ushort
)ASCV_SCSIBUSY_B
);
8602 scsi_busy
&= ~target_id
;
8603 AscWriteLramByte(iop_base
, (ushort
)ASCV_SCSIBUSY_B
, scsi_busy
);
8605 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8607 } else if (int_halt_code
== ASC_HALT_SDTR_REJECTED
) {
8609 AscMemWordCopyPtrFromLram(iop_base
,
8612 sizeof(EXT_MSG
) >> 1);
8614 if ((out_msg
.msg_type
== MS_EXTEND
) &&
8615 (out_msg
.msg_len
== MS_SDTR_LEN
) &&
8616 (out_msg
.msg_req
== MS_SDTR_CODE
)) {
8618 asc_dvc
->init_sdtr
&= ~target_id
;
8619 asc_dvc
->sdtr_done
&= ~target_id
;
8620 AscSetChipSDTR(iop_base
, asyn_sdtr
, tid_no
);
8621 boardp
->sdtr_data
[tid_no
] = asyn_sdtr
;
8623 q_cntl
&= ~QC_MSG_OUT
;
8624 AscWriteLramByte(iop_base
,
8625 (ushort
)(halt_q_addr
+
8626 (ushort
)ASC_SCSIQ_B_CNTL
), q_cntl
);
8627 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8629 } else if (int_halt_code
== ASC_HALT_SS_QUEUE_FULL
) {
8631 scsi_status
= AscReadLramByte(iop_base
,
8632 (ushort
)((ushort
)halt_q_addr
+
8634 ASC_SCSIQ_SCSI_STATUS
));
8636 AscReadLramByte(iop_base
,
8637 (ushort
)((ushort
)ASC_QADR_BEG
+
8638 (ushort
)target_ix
));
8639 if ((cur_dvc_qng
> 0) && (asc_dvc
->cur_dvc_qng
[tid_no
] > 0)) {
8641 scsi_busy
= AscReadLramByte(iop_base
,
8642 (ushort
)ASCV_SCSIBUSY_B
);
8643 scsi_busy
|= target_id
;
8644 AscWriteLramByte(iop_base
,
8645 (ushort
)ASCV_SCSIBUSY_B
, scsi_busy
);
8646 asc_dvc
->queue_full_or_busy
|= target_id
;
8648 if (scsi_status
== SAM_STAT_TASK_SET_FULL
) {
8649 if (cur_dvc_qng
> ASC_MIN_TAGGED_CMD
) {
8651 asc_dvc
->max_dvc_qng
[tid_no
] =
8654 AscWriteLramByte(iop_base
,
8656 ASCV_MAX_DVC_QNG_BEG
8662 * Set the device queue depth to the number of
8663 * active requests when the QUEUE FULL condition
8666 boardp
->queue_full
|= target_id
;
8667 boardp
->queue_full_cnt
[tid_no
] =
8672 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8675 #if CC_VERY_LONG_SG_LIST
8676 else if (int_halt_code
== ASC_HALT_HOST_COPY_SG_LIST_TO_RISC
) {
8680 uchar first_sg_wk_q_no
;
8681 ASC_SCSI_Q
*scsiq
; /* Ptr to driver request. */
8682 ASC_SG_HEAD
*sg_head
; /* Ptr to driver SG request. */
8683 ASC_SG_LIST_Q scsi_sg_q
; /* Structure written to queue. */
8684 ushort sg_list_dwords
;
8685 ushort sg_entry_cnt
;
8689 q_no
= AscReadLramByte(iop_base
, (ushort
)ASCV_REQ_SG_LIST_QP
);
8690 if (q_no
== ASC_QLINK_END
) {
8694 q_addr
= ASC_QNO_TO_QADDR(q_no
);
8697 * Convert the request's SRB pointer to a host ASC_SCSI_REQ
8698 * structure pointer using a macro provided by the driver.
8699 * The ASC_SCSI_REQ pointer provides a pointer to the
8700 * host ASC_SG_HEAD structure.
8702 /* Read request's SRB pointer. */
8703 scsiq
= (ASC_SCSI_Q
*)
8704 ASC_SRB2SCSIQ(ASC_U32_TO_VADDR(AscReadLramDWord(iop_base
,
8707 ASC_SCSIQ_D_SRBPTR
))));
8710 * Get request's first and working SG queue.
8712 sg_wk_q_no
= AscReadLramByte(iop_base
,
8714 ASC_SCSIQ_B_SG_WK_QP
));
8716 first_sg_wk_q_no
= AscReadLramByte(iop_base
,
8718 ASC_SCSIQ_B_FIRST_SG_WK_QP
));
8721 * Reset request's working SG queue back to the
8724 AscWriteLramByte(iop_base
,
8726 (ushort
)ASC_SCSIQ_B_SG_WK_QP
),
8729 sg_head
= scsiq
->sg_head
;
8732 * Set sg_entry_cnt to the number of SG elements
8733 * that will be completed on this interrupt.
8735 * Note: The allocated SG queues contain ASC_MAX_SG_LIST - 1
8736 * SG elements. The data_cnt and data_addr fields which
8737 * add 1 to the SG element capacity are not used when
8738 * restarting SG handling after a halt.
8740 if (scsiq
->remain_sg_entry_cnt
> (ASC_MAX_SG_LIST
- 1)) {
8741 sg_entry_cnt
= ASC_MAX_SG_LIST
- 1;
8744 * Keep track of remaining number of SG elements that will
8745 * need to be handled on the next interrupt.
8747 scsiq
->remain_sg_entry_cnt
-= (ASC_MAX_SG_LIST
- 1);
8749 sg_entry_cnt
= scsiq
->remain_sg_entry_cnt
;
8750 scsiq
->remain_sg_entry_cnt
= 0;
8754 * Copy SG elements into the list of allocated SG queues.
8756 * Last index completed is saved in scsiq->next_sg_index.
8758 next_qp
= first_sg_wk_q_no
;
8759 q_addr
= ASC_QNO_TO_QADDR(next_qp
);
8760 scsi_sg_q
.sg_head_qp
= q_no
;
8761 scsi_sg_q
.cntl
= QCSG_SG_XFER_LIST
;
8762 for (i
= 0; i
< sg_head
->queue_cnt
; i
++) {
8763 scsi_sg_q
.seq_no
= i
+ 1;
8764 if (sg_entry_cnt
> ASC_SG_LIST_PER_Q
) {
8765 sg_list_dwords
= (uchar
)(ASC_SG_LIST_PER_Q
* 2);
8766 sg_entry_cnt
-= ASC_SG_LIST_PER_Q
;
8768 * After very first SG queue RISC FW uses next
8769 * SG queue first element then checks sg_list_cnt
8770 * against zero and then decrements, so set
8771 * sg_list_cnt 1 less than number of SG elements
8774 scsi_sg_q
.sg_list_cnt
= ASC_SG_LIST_PER_Q
- 1;
8775 scsi_sg_q
.sg_cur_list_cnt
=
8776 ASC_SG_LIST_PER_Q
- 1;
8779 * This is the last SG queue in the list of
8780 * allocated SG queues. If there are more
8781 * SG elements than will fit in the allocated
8782 * queues, then set the QCSG_SG_XFER_MORE flag.
8784 if (scsiq
->remain_sg_entry_cnt
!= 0) {
8785 scsi_sg_q
.cntl
|= QCSG_SG_XFER_MORE
;
8787 scsi_sg_q
.cntl
|= QCSG_SG_XFER_END
;
8789 /* equals sg_entry_cnt * 2 */
8790 sg_list_dwords
= sg_entry_cnt
<< 1;
8791 scsi_sg_q
.sg_list_cnt
= sg_entry_cnt
- 1;
8792 scsi_sg_q
.sg_cur_list_cnt
= sg_entry_cnt
- 1;
8796 scsi_sg_q
.q_no
= next_qp
;
8797 AscMemWordCopyPtrToLram(iop_base
,
8798 q_addr
+ ASC_SCSIQ_SGHD_CPY_BEG
,
8799 (uchar
*)&scsi_sg_q
,
8800 sizeof(ASC_SG_LIST_Q
) >> 1);
8802 AscMemDWordCopyPtrToLram(iop_base
,
8803 q_addr
+ ASC_SGQ_LIST_BEG
,
8805 sg_list
[scsiq
->next_sg_index
],
8808 scsiq
->next_sg_index
+= ASC_SG_LIST_PER_Q
;
8811 * If the just completed SG queue contained the
8812 * last SG element, then no more SG queues need
8815 if (scsi_sg_q
.cntl
& QCSG_SG_XFER_END
) {
8819 next_qp
= AscReadLramByte(iop_base
,
8822 q_addr
= ASC_QNO_TO_QADDR(next_qp
);
8826 * Clear the halt condition so the RISC will be restarted
8829 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
8832 #endif /* CC_VERY_LONG_SG_LIST */
8837 _AscCopyLramScsiDoneQ(PortAddr iop_base
,
8839 ASC_QDONE_INFO
*scsiq
, ASC_DCNT max_dma_count
)
8844 DvcGetQinfo(iop_base
,
8845 q_addr
+ ASC_SCSIQ_DONE_INFO_BEG
,
8847 (sizeof(ASC_SCSIQ_2
) + sizeof(ASC_SCSIQ_3
)) / 2);
8849 _val
= AscReadLramWord(iop_base
,
8850 (ushort
)(q_addr
+ (ushort
)ASC_SCSIQ_B_STATUS
));
8851 scsiq
->q_status
= (uchar
)_val
;
8852 scsiq
->q_no
= (uchar
)(_val
>> 8);
8853 _val
= AscReadLramWord(iop_base
,
8854 (ushort
)(q_addr
+ (ushort
)ASC_SCSIQ_B_CNTL
));
8855 scsiq
->cntl
= (uchar
)_val
;
8856 sg_queue_cnt
= (uchar
)(_val
>> 8);
8857 _val
= AscReadLramWord(iop_base
,
8859 (ushort
)ASC_SCSIQ_B_SENSE_LEN
));
8860 scsiq
->sense_len
= (uchar
)_val
;
8861 scsiq
->extra_bytes
= (uchar
)(_val
>> 8);
8864 * Read high word of remain bytes from alternate location.
8866 scsiq
->remain_bytes
= (((ADV_DCNT
)AscReadLramWord(iop_base
,
8869 ASC_SCSIQ_W_ALT_DC1
)))
8872 * Read low word of remain bytes from original location.
8874 scsiq
->remain_bytes
+= AscReadLramWord(iop_base
,
8875 (ushort
)(q_addr
+ (ushort
)
8876 ASC_SCSIQ_DW_REMAIN_XFER_CNT
));
8878 scsiq
->remain_bytes
&= max_dma_count
;
8879 return (sg_queue_cnt
);
8882 static int AscIsrQDone(ASC_DVC_VAR
*asc_dvc
)
8891 ASC_SCSI_BIT_ID_TYPE scsi_busy
;
8892 ASC_SCSI_BIT_ID_TYPE target_id
;
8896 uchar cur_target_qng
;
8897 ASC_QDONE_INFO scsiq_buf
;
8898 ASC_QDONE_INFO
*scsiq
;
8900 ASC_ISR_CALLBACK asc_isr_callback
;
8902 iop_base
= asc_dvc
->iop_base
;
8903 asc_isr_callback
= asc_dvc
->isr_callback
;
8905 scsiq
= (ASC_QDONE_INFO
*)&scsiq_buf
;
8906 done_q_tail
= (uchar
)AscGetVarDoneQTail(iop_base
);
8907 q_addr
= ASC_QNO_TO_QADDR(done_q_tail
);
8908 next_qp
= AscReadLramByte(iop_base
,
8909 (ushort
)(q_addr
+ (ushort
)ASC_SCSIQ_B_FWD
));
8910 if (next_qp
!= ASC_QLINK_END
) {
8911 AscPutVarDoneQTail(iop_base
, next_qp
);
8912 q_addr
= ASC_QNO_TO_QADDR(next_qp
);
8913 sg_queue_cnt
= _AscCopyLramScsiDoneQ(iop_base
, q_addr
, scsiq
,
8914 asc_dvc
->max_dma_count
);
8915 AscWriteLramByte(iop_base
,
8917 (ushort
)ASC_SCSIQ_B_STATUS
),
8919 q_status
& (uchar
)~(QS_READY
|
8921 tid_no
= ASC_TIX_TO_TID(scsiq
->d2
.target_ix
);
8922 target_id
= ASC_TIX_TO_TARGET_ID(scsiq
->d2
.target_ix
);
8923 if ((scsiq
->cntl
& QC_SG_HEAD
) != 0) {
8925 sg_list_qp
= next_qp
;
8926 for (q_cnt
= 0; q_cnt
< sg_queue_cnt
; q_cnt
++) {
8927 sg_list_qp
= AscReadLramByte(iop_base
,
8931 sg_q_addr
= ASC_QNO_TO_QADDR(sg_list_qp
);
8932 if (sg_list_qp
== ASC_QLINK_END
) {
8933 AscSetLibErrorCode(asc_dvc
,
8934 ASCQ_ERR_SG_Q_LINKS
);
8935 scsiq
->d3
.done_stat
= QD_WITH_ERROR
;
8936 scsiq
->d3
.host_stat
=
8937 QHSTA_D_QDONE_SG_LIST_CORRUPTED
;
8938 goto FATAL_ERR_QDONE
;
8940 AscWriteLramByte(iop_base
,
8941 (ushort
)(sg_q_addr
+ (ushort
)
8942 ASC_SCSIQ_B_STATUS
),
8945 n_q_used
= sg_queue_cnt
+ 1;
8946 AscPutVarDoneQTail(iop_base
, sg_list_qp
);
8948 if (asc_dvc
->queue_full_or_busy
& target_id
) {
8949 cur_target_qng
= AscReadLramByte(iop_base
,
8955 if (cur_target_qng
< asc_dvc
->max_dvc_qng
[tid_no
]) {
8956 scsi_busy
= AscReadLramByte(iop_base
, (ushort
)
8958 scsi_busy
&= ~target_id
;
8959 AscWriteLramByte(iop_base
,
8960 (ushort
)ASCV_SCSIBUSY_B
,
8962 asc_dvc
->queue_full_or_busy
&= ~target_id
;
8965 if (asc_dvc
->cur_total_qng
>= n_q_used
) {
8966 asc_dvc
->cur_total_qng
-= n_q_used
;
8967 if (asc_dvc
->cur_dvc_qng
[tid_no
] != 0) {
8968 asc_dvc
->cur_dvc_qng
[tid_no
]--;
8971 AscSetLibErrorCode(asc_dvc
, ASCQ_ERR_CUR_QNG
);
8972 scsiq
->d3
.done_stat
= QD_WITH_ERROR
;
8973 goto FATAL_ERR_QDONE
;
8975 if ((scsiq
->d2
.srb_ptr
== 0UL) ||
8976 ((scsiq
->q_status
& QS_ABORTED
) != 0)) {
8978 } else if (scsiq
->q_status
== QS_DONE
) {
8979 false_overrun
= FALSE
;
8980 if (scsiq
->extra_bytes
!= 0) {
8981 scsiq
->remain_bytes
+=
8982 (ADV_DCNT
)scsiq
->extra_bytes
;
8984 if (scsiq
->d3
.done_stat
== QD_WITH_ERROR
) {
8985 if (scsiq
->d3
.host_stat
==
8986 QHSTA_M_DATA_OVER_RUN
) {
8988 cntl
& (QC_DATA_IN
| QC_DATA_OUT
))
8990 scsiq
->d3
.done_stat
=
8992 scsiq
->d3
.host_stat
=
8994 } else if (false_overrun
) {
8995 scsiq
->d3
.done_stat
=
8997 scsiq
->d3
.host_stat
=
9000 } else if (scsiq
->d3
.host_stat
==
9001 QHSTA_M_HUNG_REQ_SCSI_BUS_RESET
) {
9002 AscStopChip(iop_base
);
9003 AscSetChipControl(iop_base
,
9004 (uchar
)(CC_SCSI_RESET
9006 DvcDelayNanoSecond(asc_dvc
, 60000);
9007 AscSetChipControl(iop_base
, CC_HALT
);
9008 AscSetChipStatus(iop_base
,
9009 CIW_CLR_SCSI_RESET_INT
);
9010 AscSetChipStatus(iop_base
, 0);
9011 AscSetChipControl(iop_base
, 0);
9014 if ((scsiq
->cntl
& QC_NO_CALLBACK
) == 0) {
9015 (*asc_isr_callback
) (asc_dvc
, scsiq
);
9017 if ((AscReadLramByte(iop_base
,
9018 (ushort
)(q_addr
+ (ushort
)
9021 asc_dvc
->unit_not_ready
&= ~target_id
;
9022 if (scsiq
->d3
.done_stat
!= QD_NO_ERROR
) {
9023 asc_dvc
->start_motor
&=
9030 AscSetLibErrorCode(asc_dvc
, ASCQ_ERR_Q_STATUS
);
9032 if ((scsiq
->cntl
& QC_NO_CALLBACK
) == 0) {
9033 (*asc_isr_callback
) (asc_dvc
, scsiq
);
9041 static int AscISR(ASC_DVC_VAR
*asc_dvc
)
9043 ASC_CS_TYPE chipstat
;
9045 ushort saved_ram_addr
;
9047 uchar saved_ctrl_reg
;
9052 iop_base
= asc_dvc
->iop_base
;
9053 int_pending
= FALSE
;
9055 if (AscIsIntPending(iop_base
) == 0) {
9059 if (((asc_dvc
->init_state
& ASC_INIT_STATE_END_LOAD_MC
) == 0)
9060 || (asc_dvc
->isr_callback
== 0)
9064 if (asc_dvc
->in_critical_cnt
!= 0) {
9065 AscSetLibErrorCode(asc_dvc
, ASCQ_ERR_ISR_ON_CRITICAL
);
9068 if (asc_dvc
->is_in_int
) {
9069 AscSetLibErrorCode(asc_dvc
, ASCQ_ERR_ISR_RE_ENTRY
);
9072 asc_dvc
->is_in_int
= TRUE
;
9073 ctrl_reg
= AscGetChipControl(iop_base
);
9074 saved_ctrl_reg
= ctrl_reg
& (~(CC_SCSI_RESET
| CC_CHIP_RESET
|
9075 CC_SINGLE_STEP
| CC_DIAG
| CC_TEST
));
9076 chipstat
= AscGetChipStatus(iop_base
);
9077 if (chipstat
& CSW_SCSI_RESET_LATCH
) {
9078 if (!(asc_dvc
->bus_type
& (ASC_IS_VL
| ASC_IS_EISA
))) {
9081 asc_dvc
->sdtr_done
= 0;
9082 saved_ctrl_reg
&= (uchar
)(~CC_HALT
);
9083 while ((AscGetChipStatus(iop_base
) &
9084 CSW_SCSI_RESET_ACTIVE
) && (i
-- > 0)) {
9085 DvcSleepMilliSecond(100);
9087 AscSetChipControl(iop_base
, (CC_CHIP_RESET
| CC_HALT
));
9088 AscSetChipControl(iop_base
, CC_HALT
);
9089 AscSetChipStatus(iop_base
, CIW_CLR_SCSI_RESET_INT
);
9090 AscSetChipStatus(iop_base
, 0);
9091 chipstat
= AscGetChipStatus(iop_base
);
9094 saved_ram_addr
= AscGetChipLramAddr(iop_base
);
9095 host_flag
= AscReadLramByte(iop_base
,
9097 (uchar
)(~ASC_HOST_FLAG_IN_ISR
);
9098 AscWriteLramByte(iop_base
, ASCV_HOST_FLAG_B
,
9099 (uchar
)(host_flag
| (uchar
)ASC_HOST_FLAG_IN_ISR
));
9100 if ((chipstat
& CSW_INT_PENDING
)
9103 AscAckInterrupt(iop_base
);
9105 if ((chipstat
& CSW_HALTED
) && (ctrl_reg
& CC_SINGLE_STEP
)) {
9106 if (AscIsrChipHalted(asc_dvc
) == ERR
) {
9107 goto ISR_REPORT_QDONE_FATAL_ERROR
;
9109 saved_ctrl_reg
&= (uchar
)(~CC_HALT
);
9112 ISR_REPORT_QDONE_FATAL_ERROR
:
9113 if ((asc_dvc
->dvc_cntl
& ASC_CNTL_INT_MULTI_Q
) != 0) {
9115 AscIsrQDone(asc_dvc
)) & 0x01) != 0) {
9120 AscIsrQDone(asc_dvc
)) == 1) {
9123 } while (status
== 0x11);
9125 if ((status
& 0x80) != 0)
9129 AscWriteLramByte(iop_base
, ASCV_HOST_FLAG_B
, host_flag
);
9130 AscSetChipLramAddr(iop_base
, saved_ram_addr
);
9131 AscSetChipControl(iop_base
, saved_ctrl_reg
);
9132 asc_dvc
->is_in_int
= FALSE
;
9133 return (int_pending
);
9136 /* Microcode buffer is kept after initialization for error recovery. */
9137 static uchar _asc_mcode_buf
[] = {
9138 0x01, 0x03, 0x01, 0x19, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
9139 0x00, 0x00, 0x00, 0x00,
9140 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x00, 0x00, 0x00, 0x00,
9141 0x00, 0x00, 0x00, 0x00,
9142 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
9143 0x00, 0x00, 0x00, 0x00,
9144 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
9145 0x00, 0x00, 0x00, 0x00,
9146 0x00, 0x00, 0x00, 0x00, 0xC3, 0x12, 0x0D, 0x05, 0x01, 0x00, 0x00, 0x00,
9147 0x00, 0xFF, 0x00, 0x00,
9148 0x00, 0x00, 0x00, 0x00, 0xFF, 0x80, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00,
9149 0x00, 0x00, 0x00, 0x00,
9150 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0xFF,
9151 0x00, 0x00, 0x00, 0x00,
9152 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x88,
9153 0x00, 0x00, 0x00, 0x00,
9154 0x80, 0x73, 0x48, 0x04, 0x36, 0x00, 0x00, 0xA2, 0xC2, 0x00, 0x80, 0x73,
9155 0x03, 0x23, 0x36, 0x40,
9156 0xB6, 0x00, 0x36, 0x00, 0x05, 0xD6, 0x0C, 0xD2, 0x12, 0xDA, 0x00, 0xA2,
9157 0xC2, 0x00, 0x92, 0x80,
9158 0x1E, 0x98, 0x50, 0x00, 0xF5, 0x00, 0x48, 0x98, 0xDF, 0x23, 0x36, 0x60,
9159 0xB6, 0x00, 0x92, 0x80,
9160 0x4F, 0x00, 0xF5, 0x00, 0x48, 0x98, 0xEF, 0x23, 0x36, 0x60, 0xB6, 0x00,
9161 0x92, 0x80, 0x80, 0x62,
9162 0x92, 0x80, 0x00, 0x46, 0x15, 0xEE, 0x13, 0xEA, 0x02, 0x01, 0x09, 0xD8,
9163 0xCD, 0x04, 0x4D, 0x00,
9164 0x00, 0xA3, 0xD6, 0x00, 0xA6, 0x97, 0x7F, 0x23, 0x04, 0x61, 0x84, 0x01,
9165 0xE6, 0x84, 0xD2, 0xC1,
9166 0x80, 0x73, 0xCD, 0x04, 0x4D, 0x00, 0x00, 0xA3, 0xDA, 0x01, 0xA6, 0x97,
9167 0xC6, 0x81, 0xC2, 0x88,
9168 0x80, 0x73, 0x80, 0x77, 0x00, 0x01, 0x01, 0xA1, 0xFE, 0x00, 0x4F, 0x00,
9169 0x84, 0x97, 0x07, 0xA6,
9170 0x08, 0x01, 0x00, 0x33, 0x03, 0x00, 0xC2, 0x88, 0x03, 0x03, 0x01, 0xDE,
9171 0xC2, 0x88, 0xCE, 0x00,
9172 0x69, 0x60, 0xCE, 0x00, 0x02, 0x03, 0x4A, 0x60, 0x00, 0xA2, 0x78, 0x01,
9173 0x80, 0x63, 0x07, 0xA6,
9174 0x24, 0x01, 0x78, 0x81, 0x03, 0x03, 0x80, 0x63, 0xE2, 0x00, 0x07, 0xA6,
9175 0x34, 0x01, 0x00, 0x33,
9176 0x04, 0x00, 0xC2, 0x88, 0x03, 0x07, 0x02, 0x01, 0x04, 0xCA, 0x0D, 0x23,
9177 0x68, 0x98, 0x4D, 0x04,
9178 0x04, 0x85, 0x05, 0xD8, 0x0D, 0x23, 0x68, 0x98, 0xCD, 0x04, 0x15, 0x23,
9179 0xF8, 0x88, 0xFB, 0x23,
9180 0x02, 0x61, 0x82, 0x01, 0x80, 0x63, 0x02, 0x03, 0x06, 0xA3, 0x62, 0x01,
9181 0x00, 0x33, 0x0A, 0x00,
9182 0xC2, 0x88, 0x4E, 0x00, 0x07, 0xA3, 0x6E, 0x01, 0x00, 0x33, 0x0B, 0x00,
9183 0xC2, 0x88, 0xCD, 0x04,
9184 0x36, 0x2D, 0x00, 0x33, 0x1A, 0x00, 0xC2, 0x88, 0x50, 0x04, 0x88, 0x81,
9185 0x06, 0xAB, 0x82, 0x01,
9186 0x88, 0x81, 0x4E, 0x00, 0x07, 0xA3, 0x92, 0x01, 0x50, 0x00, 0x00, 0xA3,
9187 0x3C, 0x01, 0x00, 0x05,
9188 0x7C, 0x81, 0x46, 0x97, 0x02, 0x01, 0x05, 0xC6, 0x04, 0x23, 0xA0, 0x01,
9189 0x15, 0x23, 0xA1, 0x01,
9190 0xBE, 0x81, 0xFD, 0x23, 0x02, 0x61, 0x82, 0x01, 0x0A, 0xDA, 0x4A, 0x00,
9191 0x06, 0x61, 0x00, 0xA0,
9192 0xB4, 0x01, 0x80, 0x63, 0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33, 0x1B, 0x00,
9193 0xC2, 0x88, 0x06, 0x23,
9194 0x68, 0x98, 0xCD, 0x04, 0xE6, 0x84, 0x06, 0x01, 0x00, 0xA2, 0xD4, 0x01,
9195 0x57, 0x60, 0x00, 0xA0,
9196 0xDA, 0x01, 0xE6, 0x84, 0x80, 0x23, 0xA0, 0x01, 0xE6, 0x84, 0x80, 0x73,
9197 0x4B, 0x00, 0x06, 0x61,
9198 0x00, 0xA2, 0x00, 0x02, 0x04, 0x01, 0x0C, 0xDE, 0x02, 0x01, 0x03, 0xCC,
9199 0x4F, 0x00, 0x84, 0x97,
9200 0xFC, 0x81, 0x08, 0x23, 0x02, 0x41, 0x82, 0x01, 0x4F, 0x00, 0x62, 0x97,
9201 0x48, 0x04, 0x84, 0x80,
9202 0xF0, 0x97, 0x00, 0x46, 0x56, 0x00, 0x03, 0xC0, 0x01, 0x23, 0xE8, 0x00,
9203 0x81, 0x73, 0x06, 0x29,
9204 0x03, 0x42, 0x06, 0xE2, 0x03, 0xEE, 0x6B, 0xEB, 0x11, 0x23, 0xF8, 0x88,
9205 0x04, 0x98, 0xF0, 0x80,
9206 0x80, 0x73, 0x80, 0x77, 0x07, 0xA4, 0x2A, 0x02, 0x7C, 0x95, 0x06, 0xA6,
9207 0x34, 0x02, 0x03, 0xA6,
9208 0x4C, 0x04, 0x46, 0x82, 0x04, 0x01, 0x03, 0xD8, 0xB4, 0x98, 0x6A, 0x96,
9209 0x46, 0x82, 0xFE, 0x95,
9210 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0xB6, 0x2D, 0x02, 0xA6, 0x6C, 0x02,
9211 0x07, 0xA6, 0x5A, 0x02,
9212 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x62, 0x02, 0xC2, 0x88, 0x7C, 0x95,
9213 0x48, 0x82, 0x60, 0x96,
9214 0x48, 0x82, 0x04, 0x23, 0xA0, 0x01, 0x14, 0x23, 0xA1, 0x01, 0x3C, 0x84,
9215 0x04, 0x01, 0x0C, 0xDC,
9216 0xE0, 0x23, 0x25, 0x61, 0xEF, 0x00, 0x14, 0x01, 0x4F, 0x04, 0xA8, 0x01,
9217 0x6F, 0x00, 0xA5, 0x01,
9218 0x03, 0x23, 0xA4, 0x01, 0x06, 0x23, 0x9C, 0x01, 0x24, 0x2B, 0x1C, 0x01,
9219 0x02, 0xA6, 0xAA, 0x02,
9220 0x07, 0xA6, 0x5A, 0x02, 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x20, 0x04,
9221 0x01, 0xA6, 0xB4, 0x02,
9222 0x00, 0xA6, 0xB4, 0x02, 0x00, 0x33, 0x12, 0x00, 0xC2, 0x88, 0x00, 0x0E,
9223 0x80, 0x63, 0x00, 0x43,
9224 0x00, 0xA0, 0x8C, 0x02, 0x4D, 0x04, 0x04, 0x01, 0x0B, 0xDC, 0xE7, 0x23,
9225 0x04, 0x61, 0x84, 0x01,
9226 0x10, 0x31, 0x12, 0x35, 0x14, 0x01, 0xEC, 0x00, 0x6C, 0x38, 0x00, 0x3F,
9227 0x00, 0x00, 0xEA, 0x82,
9228 0x18, 0x23, 0x04, 0x61, 0x18, 0xA0, 0xE2, 0x02, 0x04, 0x01, 0xA2, 0xC8,
9229 0x00, 0x33, 0x1F, 0x00,
9230 0xC2, 0x88, 0x08, 0x31, 0x0A, 0x35, 0x0C, 0x39, 0x0E, 0x3D, 0x7E, 0x98,
9231 0xB6, 0x2D, 0x01, 0xA6,
9232 0x14, 0x03, 0x00, 0xA6, 0x14, 0x03, 0x07, 0xA6, 0x0C, 0x03, 0x06, 0xA6,
9233 0x10, 0x03, 0x03, 0xA6,
9234 0x20, 0x04, 0x02, 0xA6, 0x6C, 0x02, 0x00, 0x33, 0x33, 0x00, 0xC2, 0x88,
9235 0x7C, 0x95, 0xEE, 0x82,
9236 0x60, 0x96, 0xEE, 0x82, 0x82, 0x98, 0x80, 0x42, 0x7E, 0x98, 0x64, 0xE4,
9237 0x04, 0x01, 0x2D, 0xC8,
9238 0x31, 0x05, 0x07, 0x01, 0x00, 0xA2, 0x54, 0x03, 0x00, 0x43, 0x87, 0x01,
9239 0x05, 0x05, 0x86, 0x98,
9240 0x7E, 0x98, 0x00, 0xA6, 0x16, 0x03, 0x07, 0xA6, 0x4C, 0x03, 0x03, 0xA6,
9241 0x3C, 0x04, 0x06, 0xA6,
9242 0x50, 0x03, 0x01, 0xA6, 0x16, 0x03, 0x00, 0x33, 0x25, 0x00, 0xC2, 0x88,
9243 0x7C, 0x95, 0x32, 0x83,
9244 0x60, 0x96, 0x32, 0x83, 0x04, 0x01, 0x10, 0xCE, 0x07, 0xC8, 0x05, 0x05,
9245 0xEB, 0x04, 0x00, 0x33,
9246 0x00, 0x20, 0xC0, 0x20, 0x81, 0x62, 0x72, 0x83, 0x00, 0x01, 0x05, 0x05,
9247 0xFF, 0xA2, 0x7A, 0x03,
9248 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x2E, 0x83, 0x05, 0x05, 0x15, 0x01,
9249 0x00, 0xA2, 0x9A, 0x03,
9250 0xEC, 0x00, 0x6E, 0x00, 0x95, 0x01, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00,
9251 0x01, 0xA6, 0x96, 0x03,
9252 0x00, 0xA6, 0x96, 0x03, 0x10, 0x84, 0x80, 0x42, 0x7E, 0x98, 0x01, 0xA6,
9253 0xA4, 0x03, 0x00, 0xA6,
9254 0xBC, 0x03, 0x10, 0x84, 0xA8, 0x98, 0x80, 0x42, 0x01, 0xA6, 0xA4, 0x03,
9255 0x07, 0xA6, 0xB2, 0x03,
9256 0xD4, 0x83, 0x7C, 0x95, 0xA8, 0x83, 0x00, 0x33, 0x2F, 0x00, 0xC2, 0x88,
9257 0xA8, 0x98, 0x80, 0x42,
9258 0x00, 0xA6, 0xBC, 0x03, 0x07, 0xA6, 0xCA, 0x03, 0xD4, 0x83, 0x7C, 0x95,
9259 0xC0, 0x83, 0x00, 0x33,
9260 0x26, 0x00, 0xC2, 0x88, 0x38, 0x2B, 0x80, 0x32, 0x80, 0x36, 0x04, 0x23,
9261 0xA0, 0x01, 0x12, 0x23,
9262 0xA1, 0x01, 0x10, 0x84, 0x07, 0xF0, 0x06, 0xA4, 0xF4, 0x03, 0x80, 0x6B,
9263 0x80, 0x67, 0x05, 0x23,
9264 0x83, 0x03, 0x80, 0x63, 0x03, 0xA6, 0x0E, 0x04, 0x07, 0xA6, 0x06, 0x04,
9265 0x06, 0xA6, 0x0A, 0x04,
9266 0x00, 0x33, 0x17, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0xF4, 0x83, 0x60, 0x96,
9267 0xF4, 0x83, 0x20, 0x84,
9268 0x07, 0xF0, 0x06, 0xA4, 0x20, 0x04, 0x80, 0x6B, 0x80, 0x67, 0x05, 0x23,
9269 0x83, 0x03, 0x80, 0x63,
9270 0xB6, 0x2D, 0x03, 0xA6, 0x3C, 0x04, 0x07, 0xA6, 0x34, 0x04, 0x06, 0xA6,
9271 0x38, 0x04, 0x00, 0x33,
9272 0x30, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0x20, 0x84, 0x60, 0x96, 0x20, 0x84,
9273 0x1D, 0x01, 0x06, 0xCC,
9274 0x00, 0x33, 0x00, 0x84, 0xC0, 0x20, 0x00, 0x23, 0xEA, 0x00, 0x81, 0x62,
9275 0xA2, 0x0D, 0x80, 0x63,
9276 0x07, 0xA6, 0x5A, 0x04, 0x00, 0x33, 0x18, 0x00, 0xC2, 0x88, 0x03, 0x03,
9277 0x80, 0x63, 0xA3, 0x01,
9278 0x07, 0xA4, 0x64, 0x04, 0x23, 0x01, 0x00, 0xA2, 0x86, 0x04, 0x0A, 0xA0,
9279 0x76, 0x04, 0xE0, 0x00,
9280 0x00, 0x33, 0x1D, 0x00, 0xC2, 0x88, 0x0B, 0xA0, 0x82, 0x04, 0xE0, 0x00,
9281 0x00, 0x33, 0x1E, 0x00,
9282 0xC2, 0x88, 0x42, 0x23, 0xF8, 0x88, 0x00, 0x23, 0x22, 0xA3, 0xE6, 0x04,
9283 0x08, 0x23, 0x22, 0xA3,
9284 0xA2, 0x04, 0x28, 0x23, 0x22, 0xA3, 0xAE, 0x04, 0x02, 0x23, 0x22, 0xA3,
9285 0xC4, 0x04, 0x42, 0x23,
9286 0xF8, 0x88, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA0, 0xAE, 0x04, 0x45, 0x23,
9287 0xF8, 0x88, 0x04, 0x98,
9288 0x00, 0xA2, 0xC0, 0x04, 0xB4, 0x98, 0x00, 0x33, 0x00, 0x82, 0xC0, 0x20,
9289 0x81, 0x62, 0xE8, 0x81,
9290 0x47, 0x23, 0xF8, 0x88, 0x04, 0x01, 0x0B, 0xDE, 0x04, 0x98, 0xB4, 0x98,
9291 0x00, 0x33, 0x00, 0x81,
9292 0xC0, 0x20, 0x81, 0x62, 0x14, 0x01, 0x00, 0xA0, 0x00, 0x02, 0x43, 0x23,
9293 0xF8, 0x88, 0x04, 0x23,
9294 0xA0, 0x01, 0x44, 0x23, 0xA1, 0x01, 0x80, 0x73, 0x4D, 0x00, 0x03, 0xA3,
9295 0xF4, 0x04, 0x00, 0x33,
9296 0x27, 0x00, 0xC2, 0x88, 0x04, 0x01, 0x04, 0xDC, 0x02, 0x23, 0xA2, 0x01,
9297 0x04, 0x23, 0xA0, 0x01,
9298 0x04, 0x98, 0x26, 0x95, 0x4B, 0x00, 0xF6, 0x00, 0x4F, 0x04, 0x4F, 0x00,
9299 0x00, 0xA3, 0x22, 0x05,
9300 0x00, 0x05, 0x76, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x1C, 0x05, 0x0A, 0x85,
9301 0x46, 0x97, 0xCD, 0x04,
9302 0x24, 0x85, 0x48, 0x04, 0x84, 0x80, 0x02, 0x01, 0x03, 0xDA, 0x80, 0x23,
9303 0x82, 0x01, 0x34, 0x85,
9304 0x02, 0x23, 0xA0, 0x01, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x40, 0x05,
9305 0x1D, 0x01, 0x04, 0xD6,
9306 0xFF, 0x23, 0x86, 0x41, 0x4B, 0x60, 0xCB, 0x00, 0xFF, 0x23, 0x80, 0x01,
9307 0x49, 0x00, 0x81, 0x01,
9308 0x04, 0x01, 0x02, 0xC8, 0x30, 0x01, 0x80, 0x01, 0xF7, 0x04, 0x03, 0x01,
9309 0x49, 0x04, 0x80, 0x01,
9310 0xC9, 0x00, 0x00, 0x05, 0x00, 0x01, 0xFF, 0xA0, 0x60, 0x05, 0x77, 0x04,
9311 0x01, 0x23, 0xEA, 0x00,
9312 0x5D, 0x00, 0xFE, 0xC7, 0x00, 0x62, 0x00, 0x23, 0xEA, 0x00, 0x00, 0x63,
9313 0x07, 0xA4, 0xF8, 0x05,
9314 0x03, 0x03, 0x02, 0xA0, 0x8E, 0x05, 0xF4, 0x85, 0x00, 0x33, 0x2D, 0x00,
9315 0xC2, 0x88, 0x04, 0xA0,
9316 0xB8, 0x05, 0x80, 0x63, 0x00, 0x23, 0xDF, 0x00, 0x4A, 0x00, 0x06, 0x61,
9317 0x00, 0xA2, 0xA4, 0x05,
9318 0x1D, 0x01, 0x06, 0xD6, 0x02, 0x23, 0x02, 0x41, 0x82, 0x01, 0x50, 0x00,
9319 0x62, 0x97, 0x04, 0x85,
9320 0x04, 0x23, 0x02, 0x41, 0x82, 0x01, 0x04, 0x85, 0x08, 0xA0, 0xBE, 0x05,
9321 0xF4, 0x85, 0x03, 0xA0,
9322 0xC4, 0x05, 0xF4, 0x85, 0x01, 0xA0, 0xCE, 0x05, 0x88, 0x00, 0x80, 0x63,
9323 0xCC, 0x86, 0x07, 0xA0,
9324 0xEE, 0x05, 0x5F, 0x00, 0x00, 0x2B, 0xDF, 0x08, 0x00, 0xA2, 0xE6, 0x05,
9325 0x80, 0x67, 0x80, 0x63,
9326 0x01, 0xA2, 0x7A, 0x06, 0x7C, 0x85, 0x06, 0x23, 0x68, 0x98, 0x48, 0x23,
9327 0xF8, 0x88, 0x07, 0x23,
9328 0x80, 0x00, 0x06, 0x87, 0x80, 0x63, 0x7C, 0x85, 0x00, 0x23, 0xDF, 0x00,
9329 0x00, 0x63, 0x4A, 0x00,
9330 0x06, 0x61, 0x00, 0xA2, 0x36, 0x06, 0x1D, 0x01, 0x16, 0xD4, 0xC0, 0x23,
9331 0x07, 0x41, 0x83, 0x03,
9332 0x80, 0x63, 0x06, 0xA6, 0x1C, 0x06, 0x00, 0x33, 0x37, 0x00, 0xC2, 0x88,
9333 0x1D, 0x01, 0x01, 0xD6,
9334 0x20, 0x23, 0x63, 0x60, 0x83, 0x03, 0x80, 0x63, 0x02, 0x23, 0xDF, 0x00,
9335 0x07, 0xA6, 0x7C, 0x05,
9336 0xEF, 0x04, 0x6F, 0x00, 0x00, 0x63, 0x4B, 0x00, 0x06, 0x41, 0xCB, 0x00,
9337 0x52, 0x00, 0x06, 0x61,
9338 0x00, 0xA2, 0x4E, 0x06, 0x1D, 0x01, 0x03, 0xCA, 0xC0, 0x23, 0x07, 0x41,
9339 0x00, 0x63, 0x1D, 0x01,
9340 0x04, 0xCC, 0x00, 0x33, 0x00, 0x83, 0xC0, 0x20, 0x81, 0x62, 0x80, 0x23,
9341 0x07, 0x41, 0x00, 0x63,
9342 0x80, 0x67, 0x08, 0x23, 0x83, 0x03, 0x80, 0x63, 0x00, 0x63, 0x01, 0x23,
9343 0xDF, 0x00, 0x06, 0xA6,
9344 0x84, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x80, 0x67, 0x80, 0x63, 0x00, 0x33,
9345 0x00, 0x40, 0xC0, 0x20,
9346 0x81, 0x62, 0x00, 0x63, 0x00, 0x00, 0xFE, 0x95, 0x83, 0x03, 0x80, 0x63,
9347 0x06, 0xA6, 0x94, 0x06,
9348 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x00, 0x01, 0xA0, 0x14, 0x07, 0x00, 0x2B,
9349 0x40, 0x0E, 0x80, 0x63,
9350 0x01, 0x00, 0x06, 0xA6, 0xAA, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x40, 0x0E,
9351 0x80, 0x63, 0x00, 0x43,
9352 0x00, 0xA0, 0xA2, 0x06, 0x06, 0xA6, 0xBC, 0x06, 0x07, 0xA6, 0x7C, 0x05,
9353 0x80, 0x67, 0x40, 0x0E,
9354 0x80, 0x63, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x23, 0xDF, 0x00, 0x00, 0x63,
9355 0x07, 0xA6, 0xD6, 0x06,
9356 0x00, 0x33, 0x2A, 0x00, 0xC2, 0x88, 0x03, 0x03, 0x80, 0x63, 0x89, 0x00,
9357 0x0A, 0x2B, 0x07, 0xA6,
9358 0xE8, 0x06, 0x00, 0x33, 0x29, 0x00, 0xC2, 0x88, 0x00, 0x43, 0x00, 0xA2,
9359 0xF4, 0x06, 0xC0, 0x0E,
9360 0x80, 0x63, 0xDE, 0x86, 0xC0, 0x0E, 0x00, 0x33, 0x00, 0x80, 0xC0, 0x20,
9361 0x81, 0x62, 0x04, 0x01,
9362 0x02, 0xDA, 0x80, 0x63, 0x7C, 0x85, 0x80, 0x7B, 0x80, 0x63, 0x06, 0xA6,
9363 0x8C, 0x06, 0x00, 0x33,
9364 0x2C, 0x00, 0xC2, 0x88, 0x0C, 0xA2, 0x2E, 0x07, 0xFE, 0x95, 0x83, 0x03,
9365 0x80, 0x63, 0x06, 0xA6,
9366 0x2C, 0x07, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x33, 0x3D, 0x00, 0xC2, 0x88,
9367 0x00, 0x00, 0x80, 0x67,
9368 0x83, 0x03, 0x80, 0x63, 0x0C, 0xA0, 0x44, 0x07, 0x07, 0xA6, 0x7C, 0x05,
9369 0xBF, 0x23, 0x04, 0x61,
9370 0x84, 0x01, 0xE6, 0x84, 0x00, 0x63, 0xF0, 0x04, 0x01, 0x01, 0xF1, 0x00,
9371 0x00, 0x01, 0xF2, 0x00,
9372 0x01, 0x05, 0x80, 0x01, 0x72, 0x04, 0x71, 0x00, 0x81, 0x01, 0x70, 0x04,
9373 0x80, 0x05, 0x81, 0x05,
9374 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x01, 0x01, 0xF1, 0x00,
9375 0x70, 0x00, 0x81, 0x01,
9376 0x70, 0x04, 0x71, 0x00, 0x81, 0x01, 0x72, 0x00, 0x80, 0x01, 0x71, 0x04,
9377 0x70, 0x00, 0x80, 0x01,
9378 0x70, 0x04, 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x00, 0x01,
9379 0xF1, 0x00, 0x70, 0x00,
9380 0x80, 0x01, 0x70, 0x04, 0x71, 0x00, 0x80, 0x01, 0x72, 0x00, 0x81, 0x01,
9381 0x71, 0x04, 0x70, 0x00,
9382 0x81, 0x01, 0x70, 0x04, 0x00, 0x63, 0x00, 0x23, 0xB3, 0x01, 0x83, 0x05,
9383 0xA3, 0x01, 0xA2, 0x01,
9384 0xA1, 0x01, 0x01, 0x23, 0xA0, 0x01, 0x00, 0x01, 0xC8, 0x00, 0x03, 0xA1,
9385 0xC4, 0x07, 0x00, 0x33,
9386 0x07, 0x00, 0xC2, 0x88, 0x80, 0x05, 0x81, 0x05, 0x04, 0x01, 0x11, 0xC8,
9387 0x48, 0x00, 0xB0, 0x01,
9388 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x05, 0x01, 0x48, 0x04, 0x00, 0x43,
9389 0x00, 0xA2, 0xE4, 0x07,
9390 0x00, 0x05, 0xDA, 0x87, 0x00, 0x01, 0xC8, 0x00, 0xFF, 0x23, 0x80, 0x01,
9391 0x05, 0x05, 0x00, 0x63,
9392 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, 0x00, 0x02, 0x80, 0x43,
9393 0x76, 0x08, 0x80, 0x02,
9394 0x77, 0x04, 0x00, 0x63, 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04,
9395 0x00, 0x02, 0x00, 0xA0,
9396 0x14, 0x08, 0x16, 0x88, 0x00, 0x43, 0x76, 0x08, 0x80, 0x02, 0x77, 0x04,
9397 0x00, 0x63, 0xF3, 0x04,
9398 0x00, 0x23, 0xF4, 0x00, 0x74, 0x00, 0x80, 0x43, 0xF4, 0x00, 0xCF, 0x40,
9399 0x00, 0xA2, 0x44, 0x08,
9400 0x74, 0x04, 0x02, 0x01, 0xF7, 0xC9, 0xF6, 0xD9, 0x00, 0x01, 0x01, 0xA1,
9401 0x24, 0x08, 0x04, 0x98,
9402 0x26, 0x95, 0x24, 0x88, 0x73, 0x04, 0x00, 0x63, 0xF3, 0x04, 0x75, 0x04,
9403 0x5A, 0x88, 0x02, 0x01,
9404 0x04, 0xD8, 0x46, 0x97, 0x04, 0x98, 0x26, 0x95, 0x4A, 0x88, 0x75, 0x00,
9405 0x00, 0xA3, 0x64, 0x08,
9406 0x00, 0x05, 0x4E, 0x88, 0x73, 0x04, 0x00, 0x63, 0x80, 0x7B, 0x80, 0x63,
9407 0x06, 0xA6, 0x76, 0x08,
9408 0x00, 0x33, 0x3E, 0x00, 0xC2, 0x88, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63,
9409 0x00, 0x63, 0x38, 0x2B,
9410 0x9C, 0x88, 0x38, 0x2B, 0x92, 0x88, 0x32, 0x09, 0x31, 0x05, 0x92, 0x98,
9411 0x05, 0x05, 0xB2, 0x09,
9412 0x00, 0x63, 0x00, 0x32, 0x00, 0x36, 0x00, 0x3A, 0x00, 0x3E, 0x00, 0x63,
9413 0x80, 0x32, 0x80, 0x36,
9414 0x80, 0x3A, 0x80, 0x3E, 0xB4, 0x3D, 0x00, 0x63, 0x38, 0x2B, 0x40, 0x32,
9415 0x40, 0x36, 0x40, 0x3A,
9416 0x40, 0x3E, 0x00, 0x63, 0x5A, 0x20, 0xC9, 0x40, 0x00, 0xA0, 0xB4, 0x08,
9417 0x5D, 0x00, 0xFE, 0xC3,
9418 0x00, 0x63, 0x80, 0x73, 0xE6, 0x20, 0x02, 0x23, 0xE8, 0x00, 0x82, 0x73,
9419 0xFF, 0xFD, 0x80, 0x73,
9420 0x13, 0x23, 0xF8, 0x88, 0x66, 0x20, 0xC0, 0x20, 0x04, 0x23, 0xA0, 0x01,
9421 0xA1, 0x23, 0xA1, 0x01,
9422 0x81, 0x62, 0xE2, 0x88, 0x80, 0x73, 0x80, 0x77, 0x68, 0x00, 0x00, 0xA2,
9423 0x80, 0x00, 0x03, 0xC2,
9424 0xF1, 0xC7, 0x41, 0x23, 0xF8, 0x88, 0x11, 0x23, 0xA1, 0x01, 0x04, 0x23,
9425 0xA0, 0x01, 0xE6, 0x84,
9428 static ushort _asc_mcode_size
= sizeof(_asc_mcode_buf
);
9429 static ADV_DCNT _asc_mcode_chksum
= 0x012C453FUL
;
9431 #define ASC_SYN_OFFSET_ONE_DISABLE_LIST 16
9432 static uchar _syn_offset_one_disable_cmd
[ASC_SYN_OFFSET_ONE_DISABLE_LIST
] = {
9451 static int AscExeScsiQueue(ASC_DVC_VAR
*asc_dvc
, ASC_SCSI_Q
*scsiq
)
9454 ulong last_int_level
;
9457 int disable_syn_offset_one_fix
;
9460 ASC_EXE_CALLBACK asc_exe_callback
;
9461 ushort sg_entry_cnt
= 0;
9462 ushort sg_entry_cnt_minus_one
= 0;
9469 ASC_SG_HEAD
*sg_head
;
9472 iop_base
= asc_dvc
->iop_base
;
9473 sg_head
= scsiq
->sg_head
;
9474 asc_exe_callback
= asc_dvc
->exe_callback
;
9475 if (asc_dvc
->err_code
!= 0)
9477 if (scsiq
== (ASC_SCSI_Q
*)0L) {
9478 AscSetLibErrorCode(asc_dvc
, ASCQ_ERR_SCSIQ_NULL_PTR
);
9482 if ((scsiq
->q2
.tag_code
& ASC_TAG_FLAG_EXTRA_BYTES
) == 0) {
9483 scsiq
->q1
.extra_bytes
= 0;
9486 target_ix
= scsiq
->q2
.target_ix
;
9487 tid_no
= ASC_TIX_TO_TID(target_ix
);
9489 if (scsiq
->cdbptr
[0] == REQUEST_SENSE
) {
9490 if ((asc_dvc
->init_sdtr
& scsiq
->q1
.target_id
) != 0) {
9491 asc_dvc
->sdtr_done
&= ~scsiq
->q1
.target_id
;
9492 sdtr_data
= AscGetMCodeInitSDTRAtID(iop_base
, tid_no
);
9493 AscMsgOutSDTR(asc_dvc
,
9495 sdtr_period_tbl
[(sdtr_data
>> 4) &
9499 (uchar
)(sdtr_data
& (uchar
)
9500 ASC_SYN_MAX_OFFSET
));
9501 scsiq
->q1
.cntl
|= (QC_MSG_OUT
| QC_URGENT
);
9504 last_int_level
= DvcEnterCritical();
9505 if (asc_dvc
->in_critical_cnt
!= 0) {
9506 DvcLeaveCritical(last_int_level
);
9507 AscSetLibErrorCode(asc_dvc
, ASCQ_ERR_CRITICAL_RE_ENTRY
);
9510 asc_dvc
->in_critical_cnt
++;
9511 if ((scsiq
->q1
.cntl
& QC_SG_HEAD
) != 0) {
9512 if ((sg_entry_cnt
= sg_head
->entry_cnt
) == 0) {
9513 asc_dvc
->in_critical_cnt
--;
9514 DvcLeaveCritical(last_int_level
);
9517 #if !CC_VERY_LONG_SG_LIST
9518 if (sg_entry_cnt
> ASC_MAX_SG_LIST
) {
9519 asc_dvc
->in_critical_cnt
--;
9520 DvcLeaveCritical(last_int_level
);
9523 #endif /* !CC_VERY_LONG_SG_LIST */
9524 if (sg_entry_cnt
== 1) {
9525 scsiq
->q1
.data_addr
=
9526 (ADV_PADDR
)sg_head
->sg_list
[0].addr
;
9527 scsiq
->q1
.data_cnt
=
9528 (ADV_DCNT
)sg_head
->sg_list
[0].bytes
;
9529 scsiq
->q1
.cntl
&= ~(QC_SG_HEAD
| QC_SG_SWAP_QUEUE
);
9531 sg_entry_cnt_minus_one
= sg_entry_cnt
- 1;
9533 scsi_cmd
= scsiq
->cdbptr
[0];
9534 disable_syn_offset_one_fix
= FALSE
;
9535 if ((asc_dvc
->pci_fix_asyn_xfer
& scsiq
->q1
.target_id
) &&
9536 !(asc_dvc
->pci_fix_asyn_xfer_always
& scsiq
->q1
.target_id
)) {
9537 if (scsiq
->q1
.cntl
& QC_SG_HEAD
) {
9539 for (i
= 0; i
< sg_entry_cnt
; i
++) {
9541 (ADV_DCNT
)le32_to_cpu(sg_head
->sg_list
[i
].
9545 data_cnt
= le32_to_cpu(scsiq
->q1
.data_cnt
);
9547 if (data_cnt
!= 0UL) {
9548 if (data_cnt
< 512UL) {
9549 disable_syn_offset_one_fix
= TRUE
;
9551 for (i
= 0; i
< ASC_SYN_OFFSET_ONE_DISABLE_LIST
;
9554 _syn_offset_one_disable_cmd
[i
];
9555 if (disable_cmd
== 0xFF) {
9558 if (scsi_cmd
== disable_cmd
) {
9559 disable_syn_offset_one_fix
=
9567 if (disable_syn_offset_one_fix
) {
9568 scsiq
->q2
.tag_code
&= ~MSG_SIMPLE_TAG
;
9569 scsiq
->q2
.tag_code
|= (ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX
|
9570 ASC_TAG_FLAG_DISABLE_DISCONNECT
);
9572 scsiq
->q2
.tag_code
&= 0x27;
9574 if ((scsiq
->q1
.cntl
& QC_SG_HEAD
) != 0) {
9575 if (asc_dvc
->bug_fix_cntl
) {
9576 if (asc_dvc
->bug_fix_cntl
& ASC_BUG_FIX_IF_NOT_DWB
) {
9577 if ((scsi_cmd
== READ_6
) ||
9578 (scsi_cmd
== READ_10
)) {
9580 (ADV_PADDR
)le32_to_cpu(sg_head
->
9582 [sg_entry_cnt_minus_one
].
9584 (ADV_DCNT
)le32_to_cpu(sg_head
->
9586 [sg_entry_cnt_minus_one
].
9589 (uchar
)((ushort
)addr
& 0x0003);
9590 if ((extra_bytes
!= 0)
9594 ASC_TAG_FLAG_EXTRA_BYTES
)
9596 scsiq
->q2
.tag_code
|=
9597 ASC_TAG_FLAG_EXTRA_BYTES
;
9598 scsiq
->q1
.extra_bytes
=
9601 le32_to_cpu(sg_head
->
9603 [sg_entry_cnt_minus_one
].
9606 (ASC_DCNT
) extra_bytes
;
9609 [sg_entry_cnt_minus_one
].
9611 cpu_to_le32(data_cnt
);
9616 sg_head
->entry_to_copy
= sg_head
->entry_cnt
;
9617 #if CC_VERY_LONG_SG_LIST
9619 * Set the sg_entry_cnt to the maximum possible. The rest of
9620 * the SG elements will be copied when the RISC completes the
9621 * SG elements that fit and halts.
9623 if (sg_entry_cnt
> ASC_MAX_SG_LIST
) {
9624 sg_entry_cnt
= ASC_MAX_SG_LIST
;
9626 #endif /* CC_VERY_LONG_SG_LIST */
9627 n_q_required
= AscSgListToQueue(sg_entry_cnt
);
9628 if ((AscGetNumOfFreeQueue(asc_dvc
, target_ix
, n_q_required
) >=
9629 (uint
) n_q_required
)
9630 || ((scsiq
->q1
.cntl
& QC_URGENT
) != 0)) {
9632 AscSendScsiQueue(asc_dvc
, scsiq
,
9633 n_q_required
)) == 1) {
9634 asc_dvc
->in_critical_cnt
--;
9635 if (asc_exe_callback
!= 0) {
9636 (*asc_exe_callback
) (asc_dvc
, scsiq
);
9638 DvcLeaveCritical(last_int_level
);
9643 if (asc_dvc
->bug_fix_cntl
) {
9644 if (asc_dvc
->bug_fix_cntl
& ASC_BUG_FIX_IF_NOT_DWB
) {
9645 if ((scsi_cmd
== READ_6
) ||
9646 (scsi_cmd
== READ_10
)) {
9648 le32_to_cpu(scsiq
->q1
.data_addr
) +
9649 le32_to_cpu(scsiq
->q1
.data_cnt
);
9651 (uchar
)((ushort
)addr
& 0x0003);
9652 if ((extra_bytes
!= 0)
9656 ASC_TAG_FLAG_EXTRA_BYTES
)
9659 le32_to_cpu(scsiq
->q1
.
9661 if (((ushort
)data_cnt
& 0x01FF)
9663 scsiq
->q2
.tag_code
|=
9664 ASC_TAG_FLAG_EXTRA_BYTES
;
9665 data_cnt
-= (ASC_DCNT
)
9667 scsiq
->q1
.data_cnt
=
9670 scsiq
->q1
.extra_bytes
=
9678 if ((AscGetNumOfFreeQueue(asc_dvc
, target_ix
, 1) >= 1) ||
9679 ((scsiq
->q1
.cntl
& QC_URGENT
) != 0)) {
9680 if ((sta
= AscSendScsiQueue(asc_dvc
, scsiq
,
9681 n_q_required
)) == 1) {
9682 asc_dvc
->in_critical_cnt
--;
9683 if (asc_exe_callback
!= 0) {
9684 (*asc_exe_callback
) (asc_dvc
, scsiq
);
9686 DvcLeaveCritical(last_int_level
);
9691 asc_dvc
->in_critical_cnt
--;
9692 DvcLeaveCritical(last_int_level
);
9697 AscSendScsiQueue(ASC_DVC_VAR
*asc_dvc
, ASC_SCSI_Q
*scsiq
, uchar n_q_required
)
9706 iop_base
= asc_dvc
->iop_base
;
9707 target_ix
= scsiq
->q2
.target_ix
;
9708 tid_no
= ASC_TIX_TO_TID(target_ix
);
9710 free_q_head
= (uchar
)AscGetVarFreeQHead(iop_base
);
9711 if (n_q_required
> 1) {
9712 if ((next_qp
= AscAllocMultipleFreeQueue(iop_base
,
9713 free_q_head
, (uchar
)
9715 != (uchar
)ASC_QLINK_END
) {
9716 asc_dvc
->last_q_shortage
= 0;
9717 scsiq
->sg_head
->queue_cnt
= n_q_required
- 1;
9718 scsiq
->q1
.q_no
= free_q_head
;
9719 if ((sta
= AscPutReadySgListQueue(asc_dvc
, scsiq
,
9720 free_q_head
)) == 1) {
9721 AscPutVarFreeQHead(iop_base
, next_qp
);
9722 asc_dvc
->cur_total_qng
+= (uchar
)(n_q_required
);
9723 asc_dvc
->cur_dvc_qng
[tid_no
]++;
9727 } else if (n_q_required
== 1) {
9728 if ((next_qp
= AscAllocFreeQueue(iop_base
,
9731 scsiq
->q1
.q_no
= free_q_head
;
9732 if ((sta
= AscPutReadyQueue(asc_dvc
, scsiq
,
9733 free_q_head
)) == 1) {
9734 AscPutVarFreeQHead(iop_base
, next_qp
);
9735 asc_dvc
->cur_total_qng
++;
9736 asc_dvc
->cur_dvc_qng
[tid_no
]++;
9744 static int AscSgListToQueue(int sg_list
)
9748 n_sg_list_qs
= ((sg_list
- 1) / ASC_SG_LIST_PER_Q
);
9749 if (((sg_list
- 1) % ASC_SG_LIST_PER_Q
) != 0)
9751 return (n_sg_list_qs
+ 1);
9755 AscGetNumOfFreeQueue(ASC_DVC_VAR
*asc_dvc
, uchar target_ix
, uchar n_qs
)
9759 ASC_SCSI_BIT_ID_TYPE target_id
;
9762 target_id
= ASC_TIX_TO_TARGET_ID(target_ix
);
9763 tid_no
= ASC_TIX_TO_TID(target_ix
);
9764 if ((asc_dvc
->unit_not_ready
& target_id
) ||
9765 (asc_dvc
->queue_full_or_busy
& target_id
)) {
9769 cur_used_qs
= (uint
) asc_dvc
->cur_total_qng
+
9770 (uint
) asc_dvc
->last_q_shortage
+ (uint
) ASC_MIN_FREE_Q
;
9772 cur_used_qs
= (uint
) asc_dvc
->cur_total_qng
+
9773 (uint
) ASC_MIN_FREE_Q
;
9775 if ((uint
) (cur_used_qs
+ n_qs
) <= (uint
) asc_dvc
->max_total_qng
) {
9776 cur_free_qs
= (uint
) asc_dvc
->max_total_qng
- cur_used_qs
;
9777 if (asc_dvc
->cur_dvc_qng
[tid_no
] >=
9778 asc_dvc
->max_dvc_qng
[tid_no
]) {
9781 return (cur_free_qs
);
9784 if ((n_qs
> asc_dvc
->last_q_shortage
)
9785 && (n_qs
<= (asc_dvc
->max_total_qng
- ASC_MIN_FREE_Q
))) {
9786 asc_dvc
->last_q_shortage
= n_qs
;
9792 static int AscPutReadyQueue(ASC_DVC_VAR
*asc_dvc
, ASC_SCSI_Q
*scsiq
, uchar q_no
)
9797 uchar syn_period_ix
;
9801 iop_base
= asc_dvc
->iop_base
;
9802 if (((asc_dvc
->init_sdtr
& scsiq
->q1
.target_id
) != 0) &&
9803 ((asc_dvc
->sdtr_done
& scsiq
->q1
.target_id
) == 0)) {
9804 tid_no
= ASC_TIX_TO_TID(scsiq
->q2
.target_ix
);
9805 sdtr_data
= AscGetMCodeInitSDTRAtID(iop_base
, tid_no
);
9807 (sdtr_data
>> 4) & (asc_dvc
->max_sdtr_index
- 1);
9808 syn_offset
= sdtr_data
& ASC_SYN_MAX_OFFSET
;
9809 AscMsgOutSDTR(asc_dvc
,
9810 asc_dvc
->sdtr_period_tbl
[syn_period_ix
],
9812 scsiq
->q1
.cntl
|= QC_MSG_OUT
;
9814 q_addr
= ASC_QNO_TO_QADDR(q_no
);
9815 if ((scsiq
->q1
.target_id
& asc_dvc
->use_tagged_qng
) == 0) {
9816 scsiq
->q2
.tag_code
&= ~MSG_SIMPLE_TAG
;
9818 scsiq
->q1
.status
= QS_FREE
;
9819 AscMemWordCopyPtrToLram(iop_base
,
9820 q_addr
+ ASC_SCSIQ_CDB_BEG
,
9821 (uchar
*)scsiq
->cdbptr
, scsiq
->q2
.cdb_len
>> 1);
9823 DvcPutScsiQ(iop_base
,
9824 q_addr
+ ASC_SCSIQ_CPY_BEG
,
9825 (uchar
*)&scsiq
->q1
.cntl
,
9826 ((sizeof(ASC_SCSIQ_1
) + sizeof(ASC_SCSIQ_2
)) / 2) - 1);
9827 AscWriteLramWord(iop_base
,
9828 (ushort
)(q_addr
+ (ushort
)ASC_SCSIQ_B_STATUS
),
9829 (ushort
)(((ushort
)scsiq
->q1
.
9830 q_no
<< 8) | (ushort
)QS_READY
));
9835 AscPutReadySgListQueue(ASC_DVC_VAR
*asc_dvc
, ASC_SCSI_Q
*scsiq
, uchar q_no
)
9839 ASC_SG_HEAD
*sg_head
;
9840 ASC_SG_LIST_Q scsi_sg_q
;
9841 ASC_DCNT saved_data_addr
;
9842 ASC_DCNT saved_data_cnt
;
9844 ushort sg_list_dwords
;
9846 ushort sg_entry_cnt
;
9850 iop_base
= asc_dvc
->iop_base
;
9851 sg_head
= scsiq
->sg_head
;
9852 saved_data_addr
= scsiq
->q1
.data_addr
;
9853 saved_data_cnt
= scsiq
->q1
.data_cnt
;
9854 scsiq
->q1
.data_addr
= (ASC_PADDR
) sg_head
->sg_list
[0].addr
;
9855 scsiq
->q1
.data_cnt
= (ASC_DCNT
) sg_head
->sg_list
[0].bytes
;
9856 #if CC_VERY_LONG_SG_LIST
9858 * If sg_head->entry_cnt is greater than ASC_MAX_SG_LIST
9859 * then not all SG elements will fit in the allocated queues.
9860 * The rest of the SG elements will be copied when the RISC
9861 * completes the SG elements that fit and halts.
9863 if (sg_head
->entry_cnt
> ASC_MAX_SG_LIST
) {
9865 * Set sg_entry_cnt to be the number of SG elements that
9866 * will fit in the allocated SG queues. It is minus 1, because
9867 * the first SG element is handled above. ASC_MAX_SG_LIST is
9868 * already inflated by 1 to account for this. For example it
9869 * may be 50 which is 1 + 7 queues * 7 SG elements.
9871 sg_entry_cnt
= ASC_MAX_SG_LIST
- 1;
9874 * Keep track of remaining number of SG elements that will
9875 * need to be handled from a_isr.c.
9877 scsiq
->remain_sg_entry_cnt
=
9878 sg_head
->entry_cnt
- ASC_MAX_SG_LIST
;
9880 #endif /* CC_VERY_LONG_SG_LIST */
9882 * Set sg_entry_cnt to be the number of SG elements that
9883 * will fit in the allocated SG queues. It is minus 1, because
9884 * the first SG element is handled above.
9886 sg_entry_cnt
= sg_head
->entry_cnt
- 1;
9887 #if CC_VERY_LONG_SG_LIST
9889 #endif /* CC_VERY_LONG_SG_LIST */
9890 if (sg_entry_cnt
!= 0) {
9891 scsiq
->q1
.cntl
|= QC_SG_HEAD
;
9892 q_addr
= ASC_QNO_TO_QADDR(q_no
);
9894 scsiq
->q1
.sg_queue_cnt
= sg_head
->queue_cnt
;
9895 scsi_sg_q
.sg_head_qp
= q_no
;
9896 scsi_sg_q
.cntl
= QCSG_SG_XFER_LIST
;
9897 for (i
= 0; i
< sg_head
->queue_cnt
; i
++) {
9898 scsi_sg_q
.seq_no
= i
+ 1;
9899 if (sg_entry_cnt
> ASC_SG_LIST_PER_Q
) {
9900 sg_list_dwords
= (uchar
)(ASC_SG_LIST_PER_Q
* 2);
9901 sg_entry_cnt
-= ASC_SG_LIST_PER_Q
;
9903 scsi_sg_q
.sg_list_cnt
=
9905 scsi_sg_q
.sg_cur_list_cnt
=
9908 scsi_sg_q
.sg_list_cnt
=
9909 ASC_SG_LIST_PER_Q
- 1;
9910 scsi_sg_q
.sg_cur_list_cnt
=
9911 ASC_SG_LIST_PER_Q
- 1;
9914 #if CC_VERY_LONG_SG_LIST
9916 * This is the last SG queue in the list of
9917 * allocated SG queues. If there are more
9918 * SG elements than will fit in the allocated
9919 * queues, then set the QCSG_SG_XFER_MORE flag.
9921 if (sg_head
->entry_cnt
> ASC_MAX_SG_LIST
) {
9922 scsi_sg_q
.cntl
|= QCSG_SG_XFER_MORE
;
9924 #endif /* CC_VERY_LONG_SG_LIST */
9925 scsi_sg_q
.cntl
|= QCSG_SG_XFER_END
;
9926 #if CC_VERY_LONG_SG_LIST
9928 #endif /* CC_VERY_LONG_SG_LIST */
9929 sg_list_dwords
= sg_entry_cnt
<< 1;
9931 scsi_sg_q
.sg_list_cnt
= sg_entry_cnt
;
9932 scsi_sg_q
.sg_cur_list_cnt
=
9935 scsi_sg_q
.sg_list_cnt
=
9937 scsi_sg_q
.sg_cur_list_cnt
=
9942 next_qp
= AscReadLramByte(iop_base
,
9945 scsi_sg_q
.q_no
= next_qp
;
9946 q_addr
= ASC_QNO_TO_QADDR(next_qp
);
9947 AscMemWordCopyPtrToLram(iop_base
,
9948 q_addr
+ ASC_SCSIQ_SGHD_CPY_BEG
,
9949 (uchar
*)&scsi_sg_q
,
9950 sizeof(ASC_SG_LIST_Q
) >> 1);
9951 AscMemDWordCopyPtrToLram(iop_base
,
9952 q_addr
+ ASC_SGQ_LIST_BEG
,
9956 sg_index
+= ASC_SG_LIST_PER_Q
;
9957 scsiq
->next_sg_index
= sg_index
;
9960 scsiq
->q1
.cntl
&= ~QC_SG_HEAD
;
9962 sta
= AscPutReadyQueue(asc_dvc
, scsiq
, q_no
);
9963 scsiq
->q1
.data_addr
= saved_data_addr
;
9964 scsiq
->q1
.data_cnt
= saved_data_cnt
;
9969 AscSetRunChipSynRegAtID(PortAddr iop_base
, uchar tid_no
, uchar sdtr_data
)
9973 if (AscHostReqRiscHalt(iop_base
)) {
9974 sta
= AscSetChipSynRegAtID(iop_base
, tid_no
, sdtr_data
);
9975 AscStartChip(iop_base
);
9981 static int AscSetChipSynRegAtID(PortAddr iop_base
, uchar id
, uchar sdtr_data
)
9983 ASC_SCSI_BIT_ID_TYPE org_id
;
9987 AscSetBank(iop_base
, 1);
9988 org_id
= AscReadChipDvcID(iop_base
);
9989 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
9990 if (org_id
== (0x01 << i
))
9993 org_id
= (ASC_SCSI_BIT_ID_TYPE
) i
;
9994 AscWriteChipDvcID(iop_base
, id
);
9995 if (AscReadChipDvcID(iop_base
) == (0x01 << id
)) {
9996 AscSetBank(iop_base
, 0);
9997 AscSetChipSyn(iop_base
, sdtr_data
);
9998 if (AscGetChipSyn(iop_base
) != sdtr_data
) {
10004 AscSetBank(iop_base
, 1);
10005 AscWriteChipDvcID(iop_base
, org_id
);
10006 AscSetBank(iop_base
, 0);
10010 static ushort
AscInitLram(ASC_DVC_VAR
*asc_dvc
)
10017 iop_base
= asc_dvc
->iop_base
;
10019 AscMemWordSetLram(iop_base
, ASC_QADR_BEG
, 0,
10020 (ushort
)(((int)(asc_dvc
->max_total_qng
+ 2 + 1) *
10023 i
= ASC_MIN_ACTIVE_QNO
;
10024 s_addr
= ASC_QADR_BEG
+ ASC_QBLK_SIZE
;
10025 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_FWD
),
10027 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_BWD
),
10028 (uchar
)(asc_dvc
->max_total_qng
));
10029 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_QNO
),
10032 s_addr
+= ASC_QBLK_SIZE
;
10033 for (; i
< asc_dvc
->max_total_qng
; i
++, s_addr
+= ASC_QBLK_SIZE
) {
10034 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_FWD
),
10036 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_BWD
),
10038 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_QNO
),
10041 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_FWD
),
10042 (uchar
)ASC_QLINK_END
);
10043 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_BWD
),
10044 (uchar
)(asc_dvc
->max_total_qng
- 1));
10045 AscWriteLramByte(iop_base
, (ushort
)(s_addr
+ ASC_SCSIQ_B_QNO
),
10046 (uchar
)asc_dvc
->max_total_qng
);
10048 s_addr
+= ASC_QBLK_SIZE
;
10049 for (; i
<= (uchar
)(asc_dvc
->max_total_qng
+ 3);
10050 i
++, s_addr
+= ASC_QBLK_SIZE
) {
10051 AscWriteLramByte(iop_base
,
10052 (ushort
)(s_addr
+ (ushort
)ASC_SCSIQ_B_FWD
), i
);
10053 AscWriteLramByte(iop_base
,
10054 (ushort
)(s_addr
+ (ushort
)ASC_SCSIQ_B_BWD
), i
);
10055 AscWriteLramByte(iop_base
,
10056 (ushort
)(s_addr
+ (ushort
)ASC_SCSIQ_B_QNO
), i
);
10058 return (warn_code
);
10061 static ushort
AscInitQLinkVar(ASC_DVC_VAR
*asc_dvc
)
10067 iop_base
= asc_dvc
->iop_base
;
10068 AscPutRiscVarFreeQHead(iop_base
, 1);
10069 AscPutRiscVarDoneQTail(iop_base
, asc_dvc
->max_total_qng
);
10070 AscPutVarFreeQHead(iop_base
, 1);
10071 AscPutVarDoneQTail(iop_base
, asc_dvc
->max_total_qng
);
10072 AscWriteLramByte(iop_base
, ASCV_BUSY_QHEAD_B
,
10073 (uchar
)((int)asc_dvc
->max_total_qng
+ 1));
10074 AscWriteLramByte(iop_base
, ASCV_DISC1_QHEAD_B
,
10075 (uchar
)((int)asc_dvc
->max_total_qng
+ 2));
10076 AscWriteLramByte(iop_base
, (ushort
)ASCV_TOTAL_READY_Q_B
,
10077 asc_dvc
->max_total_qng
);
10078 AscWriteLramWord(iop_base
, ASCV_ASCDVC_ERR_CODE_W
, 0);
10079 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0);
10080 AscWriteLramByte(iop_base
, ASCV_STOP_CODE_B
, 0);
10081 AscWriteLramByte(iop_base
, ASCV_SCSIBUSY_B
, 0);
10082 AscWriteLramByte(iop_base
, ASCV_WTM_FLAG_B
, 0);
10083 AscPutQDoneInProgress(iop_base
, 0);
10084 lram_addr
= ASC_QADR_BEG
;
10085 for (i
= 0; i
< 32; i
++, lram_addr
+= 2) {
10086 AscWriteLramWord(iop_base
, lram_addr
, 0);
10091 static int AscSetLibErrorCode(ASC_DVC_VAR
*asc_dvc
, ushort err_code
)
10093 if (asc_dvc
->err_code
== 0) {
10094 asc_dvc
->err_code
= err_code
;
10095 AscWriteLramWord(asc_dvc
->iop_base
, ASCV_ASCDVC_ERR_CODE_W
,
10102 AscMsgOutSDTR(ASC_DVC_VAR
*asc_dvc
, uchar sdtr_period
, uchar sdtr_offset
)
10105 uchar sdtr_period_index
;
10108 iop_base
= asc_dvc
->iop_base
;
10109 sdtr_buf
.msg_type
= MS_EXTEND
;
10110 sdtr_buf
.msg_len
= MS_SDTR_LEN
;
10111 sdtr_buf
.msg_req
= MS_SDTR_CODE
;
10112 sdtr_buf
.xfer_period
= sdtr_period
;
10113 sdtr_offset
&= ASC_SYN_MAX_OFFSET
;
10114 sdtr_buf
.req_ack_offset
= sdtr_offset
;
10115 if ((sdtr_period_index
=
10116 AscGetSynPeriodIndex(asc_dvc
, sdtr_period
)) <=
10117 asc_dvc
->max_sdtr_index
) {
10118 AscMemWordCopyPtrToLram(iop_base
,
10120 (uchar
*)&sdtr_buf
,
10121 sizeof(EXT_MSG
) >> 1);
10122 return ((sdtr_period_index
<< 4) | sdtr_offset
);
10125 sdtr_buf
.req_ack_offset
= 0;
10126 AscMemWordCopyPtrToLram(iop_base
,
10128 (uchar
*)&sdtr_buf
,
10129 sizeof(EXT_MSG
) >> 1);
10135 AscCalSDTRData(ASC_DVC_VAR
*asc_dvc
, uchar sdtr_period
, uchar syn_offset
)
10138 uchar sdtr_period_ix
;
10140 sdtr_period_ix
= AscGetSynPeriodIndex(asc_dvc
, sdtr_period
);
10141 if ((sdtr_period_ix
> asc_dvc
->max_sdtr_index
)
10145 byte
= (sdtr_period_ix
<< 4) | (syn_offset
& ASC_SYN_MAX_OFFSET
);
10149 static void AscSetChipSDTR(PortAddr iop_base
, uchar sdtr_data
, uchar tid_no
)
10151 AscSetChipSynRegAtID(iop_base
, tid_no
, sdtr_data
);
10152 AscPutMCodeSDTRDoneAtID(iop_base
, tid_no
, sdtr_data
);
10156 static uchar
AscGetSynPeriodIndex(ASC_DVC_VAR
*asc_dvc
, uchar syn_time
)
10158 uchar
*period_table
;
10163 period_table
= asc_dvc
->sdtr_period_tbl
;
10164 max_index
= (int)asc_dvc
->max_sdtr_index
;
10165 min_index
= (int)asc_dvc
->host_init_sdtr_index
;
10166 if ((syn_time
<= period_table
[max_index
])) {
10167 for (i
= min_index
; i
< (max_index
- 1); i
++) {
10168 if (syn_time
<= period_table
[i
]) {
10172 return ((uchar
)max_index
);
10174 return ((uchar
)(max_index
+ 1));
10178 static uchar
AscAllocFreeQueue(PortAddr iop_base
, uchar free_q_head
)
10184 q_addr
= ASC_QNO_TO_QADDR(free_q_head
);
10185 q_status
= (uchar
)AscReadLramByte(iop_base
,
10187 ASC_SCSIQ_B_STATUS
));
10188 next_qp
= AscReadLramByte(iop_base
, (ushort
)(q_addr
+ ASC_SCSIQ_B_FWD
));
10189 if (((q_status
& QS_READY
) == 0) && (next_qp
!= ASC_QLINK_END
)) {
10192 return (ASC_QLINK_END
);
10196 AscAllocMultipleFreeQueue(PortAddr iop_base
, uchar free_q_head
, uchar n_free_q
)
10200 for (i
= 0; i
< n_free_q
; i
++) {
10201 if ((free_q_head
= AscAllocFreeQueue(iop_base
, free_q_head
))
10202 == ASC_QLINK_END
) {
10203 return (ASC_QLINK_END
);
10206 return (free_q_head
);
10209 static int AscHostReqRiscHalt(PortAddr iop_base
)
10213 uchar saved_stop_code
;
10215 if (AscIsChipHalted(iop_base
))
10217 saved_stop_code
= AscReadLramByte(iop_base
, ASCV_STOP_CODE_B
);
10218 AscWriteLramByte(iop_base
, ASCV_STOP_CODE_B
,
10219 ASC_STOP_HOST_REQ_RISC_HALT
| ASC_STOP_REQ_RISC_STOP
);
10221 if (AscIsChipHalted(iop_base
)) {
10225 DvcSleepMilliSecond(100);
10226 } while (count
++ < 20);
10227 AscWriteLramByte(iop_base
, ASCV_STOP_CODE_B
, saved_stop_code
);
10231 static int AscStopQueueExe(PortAddr iop_base
)
10235 if (AscReadLramByte(iop_base
, ASCV_STOP_CODE_B
) == 0) {
10236 AscWriteLramByte(iop_base
, ASCV_STOP_CODE_B
,
10237 ASC_STOP_REQ_RISC_STOP
);
10239 if (AscReadLramByte(iop_base
, ASCV_STOP_CODE_B
) &
10240 ASC_STOP_ACK_RISC_STOP
) {
10243 DvcSleepMilliSecond(100);
10244 } while (count
++ < 20);
10249 static void DvcDelayMicroSecond(ADV_DVC_VAR
*asc_dvc
, ushort micro_sec
)
10254 static void DvcDelayNanoSecond(ASC_DVC_VAR
*asc_dvc
, ASC_DCNT nano_sec
)
10256 udelay((nano_sec
+ 999) / 1000);
10260 static ASC_DCNT __init
AscGetEisaProductID(PortAddr iop_base
)
10263 ushort product_id_high
, product_id_low
;
10264 ASC_DCNT product_id
;
10266 eisa_iop
= ASC_GET_EISA_SLOT(iop_base
) | ASC_EISA_PID_IOP_MASK
;
10267 product_id_low
= inpw(eisa_iop
);
10268 product_id_high
= inpw(eisa_iop
+ 2);
10269 product_id
= ((ASC_DCNT
) product_id_high
<< 16) |
10270 (ASC_DCNT
) product_id_low
;
10271 return (product_id
);
10274 static PortAddr __init
AscSearchIOPortAddrEISA(PortAddr iop_base
)
10276 ASC_DCNT eisa_product_id
;
10278 if (iop_base
== 0) {
10279 iop_base
= ASC_EISA_MIN_IOP_ADDR
;
10281 if (iop_base
== ASC_EISA_MAX_IOP_ADDR
)
10283 if ((iop_base
& 0x0050) == 0x0050) {
10284 iop_base
+= ASC_EISA_BIG_IOP_GAP
;
10286 iop_base
+= ASC_EISA_SMALL_IOP_GAP
;
10289 while (iop_base
<= ASC_EISA_MAX_IOP_ADDR
) {
10290 eisa_product_id
= AscGetEisaProductID(iop_base
);
10291 if ((eisa_product_id
== ASC_EISA_ID_740
) ||
10292 (eisa_product_id
== ASC_EISA_ID_750
)) {
10293 if (AscFindSignature(iop_base
)) {
10294 inpw(iop_base
+ 4);
10298 if (iop_base
== ASC_EISA_MAX_IOP_ADDR
)
10300 if ((iop_base
& 0x0050) == 0x0050) {
10301 iop_base
+= ASC_EISA_BIG_IOP_GAP
;
10303 iop_base
+= ASC_EISA_SMALL_IOP_GAP
;
10308 #endif /* CONFIG_ISA */
10310 static int AscStartChip(PortAddr iop_base
)
10312 AscSetChipControl(iop_base
, 0);
10313 if ((AscGetChipStatus(iop_base
) & CSW_HALTED
) != 0) {
10319 static int AscStopChip(PortAddr iop_base
)
10324 AscGetChipControl(iop_base
) &
10325 (~(CC_SINGLE_STEP
| CC_TEST
| CC_DIAG
));
10326 AscSetChipControl(iop_base
, (uchar
)(cc_val
| CC_HALT
));
10327 AscSetChipIH(iop_base
, INS_HALT
);
10328 AscSetChipIH(iop_base
, INS_RFLAG_WTM
);
10329 if ((AscGetChipStatus(iop_base
) & CSW_HALTED
) == 0) {
10335 static int AscIsChipHalted(PortAddr iop_base
)
10337 if ((AscGetChipStatus(iop_base
) & CSW_HALTED
) != 0) {
10338 if ((AscGetChipControl(iop_base
) & CC_HALT
) != 0) {
10345 static void AscSetChipIH(PortAddr iop_base
, ushort ins_code
)
10347 AscSetBank(iop_base
, 1);
10348 AscWriteChipIH(iop_base
, ins_code
);
10349 AscSetBank(iop_base
, 0);
10353 static void AscAckInterrupt(PortAddr iop_base
)
10361 risc_flag
= AscReadLramByte(iop_base
, ASCV_RISC_FLAG_B
);
10362 if (loop
++ > 0x7FFF) {
10365 } while ((risc_flag
& ASC_RISC_FLAG_GEN_INT
) != 0);
10367 AscReadLramByte(iop_base
,
10368 ASCV_HOST_FLAG_B
) & (~ASC_HOST_FLAG_ACK_INT
);
10369 AscWriteLramByte(iop_base
, ASCV_HOST_FLAG_B
,
10370 (uchar
)(host_flag
| ASC_HOST_FLAG_ACK_INT
));
10371 AscSetChipStatus(iop_base
, CIW_INT_ACK
);
10373 while (AscGetChipStatus(iop_base
) & CSW_INT_PENDING
) {
10374 AscSetChipStatus(iop_base
, CIW_INT_ACK
);
10379 AscWriteLramByte(iop_base
, ASCV_HOST_FLAG_B
, host_flag
);
10383 static void AscDisableInterrupt(PortAddr iop_base
)
10387 cfg
= AscGetChipCfgLsw(iop_base
);
10388 AscSetChipCfgLsw(iop_base
, cfg
& (~ASC_CFG0_HOST_INT_ON
));
10392 static void AscEnableInterrupt(PortAddr iop_base
)
10396 cfg
= AscGetChipCfgLsw(iop_base
);
10397 AscSetChipCfgLsw(iop_base
, cfg
| ASC_CFG0_HOST_INT_ON
);
10401 static void AscSetBank(PortAddr iop_base
, uchar bank
)
10405 val
= AscGetChipControl(iop_base
) &
10407 (CC_SINGLE_STEP
| CC_TEST
| CC_DIAG
| CC_SCSI_RESET
|
10410 val
|= CC_BANK_ONE
;
10411 } else if (bank
== 2) {
10412 val
|= CC_DIAG
| CC_BANK_ONE
;
10414 val
&= ~CC_BANK_ONE
;
10416 AscSetChipControl(iop_base
, val
);
10420 static int AscResetChipAndScsiBus(ASC_DVC_VAR
*asc_dvc
)
10425 iop_base
= asc_dvc
->iop_base
;
10426 while ((AscGetChipStatus(iop_base
) & CSW_SCSI_RESET_ACTIVE
)
10428 DvcSleepMilliSecond(100);
10430 AscStopChip(iop_base
);
10431 AscSetChipControl(iop_base
, CC_CHIP_RESET
| CC_SCSI_RESET
| CC_HALT
);
10432 DvcDelayNanoSecond(asc_dvc
, 60000);
10433 AscSetChipIH(iop_base
, INS_RFLAG_WTM
);
10434 AscSetChipIH(iop_base
, INS_HALT
);
10435 AscSetChipControl(iop_base
, CC_CHIP_RESET
| CC_HALT
);
10436 AscSetChipControl(iop_base
, CC_HALT
);
10437 DvcSleepMilliSecond(200);
10438 AscSetChipStatus(iop_base
, CIW_CLR_SCSI_RESET_INT
);
10439 AscSetChipStatus(iop_base
, 0);
10440 return (AscIsChipHalted(iop_base
));
10443 static ASC_DCNT __devinit
AscGetMaxDmaCount(ushort bus_type
)
10445 if (bus_type
& ASC_IS_ISA
)
10446 return (ASC_MAX_ISA_DMA_COUNT
);
10447 else if (bus_type
& (ASC_IS_EISA
| ASC_IS_VL
))
10448 return (ASC_MAX_VL_DMA_COUNT
);
10449 return (ASC_MAX_PCI_DMA_COUNT
);
10453 static ushort __devinit
AscGetIsaDmaChannel(PortAddr iop_base
)
10457 channel
= AscGetChipCfgLsw(iop_base
) & 0x0003;
10458 if (channel
== 0x03)
10460 else if (channel
== 0x00)
10462 return (channel
+ 4);
10465 static ushort __devinit
AscSetIsaDmaChannel(PortAddr iop_base
, ushort dma_channel
)
10470 if ((dma_channel
>= 5) && (dma_channel
<= 7)) {
10471 if (dma_channel
== 7)
10474 value
= dma_channel
- 4;
10475 cfg_lsw
= AscGetChipCfgLsw(iop_base
) & 0xFFFC;
10477 AscSetChipCfgLsw(iop_base
, cfg_lsw
);
10478 return (AscGetIsaDmaChannel(iop_base
));
10483 static uchar __devinit
AscSetIsaDmaSpeed(PortAddr iop_base
, uchar speed_value
)
10485 speed_value
&= 0x07;
10486 AscSetBank(iop_base
, 1);
10487 AscWriteChipDmaSpeed(iop_base
, speed_value
);
10488 AscSetBank(iop_base
, 0);
10489 return (AscGetIsaDmaSpeed(iop_base
));
10492 static uchar __devinit
AscGetIsaDmaSpeed(PortAddr iop_base
)
10496 AscSetBank(iop_base
, 1);
10497 speed_value
= AscReadChipDmaSpeed(iop_base
);
10498 speed_value
&= 0x07;
10499 AscSetBank(iop_base
, 0);
10500 return (speed_value
);
10502 #endif /* CONFIG_ISA */
10504 static ushort __devinit
10505 AscReadPCIConfigWord(ASC_DVC_VAR
*asc_dvc
, ushort pci_config_offset
)
10509 lsb
= DvcReadPCIConfigByte(asc_dvc
, pci_config_offset
);
10510 msb
= DvcReadPCIConfigByte(asc_dvc
, pci_config_offset
+ 1);
10511 return ((ushort
)((msb
<< 8) | lsb
));
10514 static ushort __devinit
AscInitGetConfig(ASC_DVC_VAR
*asc_dvc
)
10518 ushort PCIDeviceID
;
10519 ushort PCIVendorID
;
10520 uchar PCIRevisionID
;
10521 uchar prevCmdRegBits
;
10524 iop_base
= asc_dvc
->iop_base
;
10525 asc_dvc
->init_state
= ASC_INIT_STATE_BEG_GET_CFG
;
10526 if (asc_dvc
->err_code
!= 0) {
10529 if (asc_dvc
->bus_type
== ASC_IS_PCI
) {
10530 PCIVendorID
= AscReadPCIConfigWord(asc_dvc
,
10531 AscPCIConfigVendorIDRegister
);
10533 PCIDeviceID
= AscReadPCIConfigWord(asc_dvc
,
10534 AscPCIConfigDeviceIDRegister
);
10536 PCIRevisionID
= DvcReadPCIConfigByte(asc_dvc
,
10537 AscPCIConfigRevisionIDRegister
);
10539 if (PCIVendorID
!= PCI_VENDOR_ID_ASP
) {
10540 warn_code
|= ASC_WARN_SET_PCI_CONFIG_SPACE
;
10542 prevCmdRegBits
= DvcReadPCIConfigByte(asc_dvc
,
10543 AscPCIConfigCommandRegister
);
10545 if ((prevCmdRegBits
& AscPCICmdRegBits_IOMemBusMaster
) !=
10546 AscPCICmdRegBits_IOMemBusMaster
) {
10547 DvcWritePCIConfigByte(asc_dvc
,
10548 AscPCIConfigCommandRegister
,
10550 AscPCICmdRegBits_IOMemBusMaster
));
10552 if ((DvcReadPCIConfigByte(asc_dvc
,
10553 AscPCIConfigCommandRegister
)
10554 & AscPCICmdRegBits_IOMemBusMaster
)
10555 != AscPCICmdRegBits_IOMemBusMaster
) {
10556 warn_code
|= ASC_WARN_SET_PCI_CONFIG_SPACE
;
10559 if ((PCIDeviceID
== PCI_DEVICE_ID_ASP_1200A
) ||
10560 (PCIDeviceID
== PCI_DEVICE_ID_ASP_ABP940
)) {
10561 DvcWritePCIConfigByte(asc_dvc
,
10562 AscPCIConfigLatencyTimer
, 0x00);
10563 if (DvcReadPCIConfigByte
10564 (asc_dvc
, AscPCIConfigLatencyTimer
)
10566 warn_code
|= ASC_WARN_SET_PCI_CONFIG_SPACE
;
10568 } else if (PCIDeviceID
== PCI_DEVICE_ID_ASP_ABP940U
) {
10569 if (DvcReadPCIConfigByte(asc_dvc
,
10570 AscPCIConfigLatencyTimer
) <
10572 DvcWritePCIConfigByte(asc_dvc
,
10573 AscPCIConfigLatencyTimer
,
10576 if (DvcReadPCIConfigByte(asc_dvc
,
10577 AscPCIConfigLatencyTimer
)
10580 ASC_WARN_SET_PCI_CONFIG_SPACE
;
10586 if (AscFindSignature(iop_base
)) {
10587 warn_code
|= AscInitAscDvcVar(asc_dvc
);
10588 warn_code
|= AscInitFromEEP(asc_dvc
);
10589 asc_dvc
->init_state
|= ASC_INIT_STATE_END_GET_CFG
;
10590 if (asc_dvc
->scsi_reset_wait
> ASC_MAX_SCSI_RESET_WAIT
) {
10591 asc_dvc
->scsi_reset_wait
= ASC_MAX_SCSI_RESET_WAIT
;
10594 asc_dvc
->err_code
= ASC_IERR_BAD_SIGNATURE
;
10596 return (warn_code
);
10599 static ushort __devinit
AscInitSetConfig(ASC_DVC_VAR
*asc_dvc
)
10601 ushort warn_code
= 0;
10603 asc_dvc
->init_state
|= ASC_INIT_STATE_BEG_SET_CFG
;
10604 if (asc_dvc
->err_code
!= 0)
10606 if (AscFindSignature(asc_dvc
->iop_base
)) {
10607 warn_code
|= AscInitFromAscDvcVar(asc_dvc
);
10608 asc_dvc
->init_state
|= ASC_INIT_STATE_END_SET_CFG
;
10610 asc_dvc
->err_code
= ASC_IERR_BAD_SIGNATURE
;
10612 return (warn_code
);
10615 static ushort __devinit
AscInitFromAscDvcVar(ASC_DVC_VAR
*asc_dvc
)
10620 ushort pci_device_id
= 0;
10622 iop_base
= asc_dvc
->iop_base
;
10624 if (asc_dvc
->cfg
->dev
)
10625 pci_device_id
= to_pci_dev(asc_dvc
->cfg
->dev
)->device
;
10628 cfg_msw
= AscGetChipCfgMsw(iop_base
);
10629 if ((cfg_msw
& ASC_CFG_MSW_CLR_MASK
) != 0) {
10630 cfg_msw
&= (~(ASC_CFG_MSW_CLR_MASK
));
10631 warn_code
|= ASC_WARN_CFG_MSW_RECOVER
;
10632 AscSetChipCfgMsw(iop_base
, cfg_msw
);
10634 if ((asc_dvc
->cfg
->cmd_qng_enabled
& asc_dvc
->cfg
->disc_enable
) !=
10635 asc_dvc
->cfg
->cmd_qng_enabled
) {
10636 asc_dvc
->cfg
->disc_enable
= asc_dvc
->cfg
->cmd_qng_enabled
;
10637 warn_code
|= ASC_WARN_CMD_QNG_CONFLICT
;
10639 if (AscGetChipStatus(iop_base
) & CSW_AUTO_CONFIG
) {
10640 warn_code
|= ASC_WARN_AUTO_CONFIG
;
10642 if ((asc_dvc
->bus_type
& (ASC_IS_ISA
| ASC_IS_VL
)) != 0) {
10643 if (AscSetChipIRQ(iop_base
, asc_dvc
->irq_no
, asc_dvc
->bus_type
)
10644 != asc_dvc
->irq_no
) {
10645 asc_dvc
->err_code
|= ASC_IERR_SET_IRQ_NO
;
10648 if (asc_dvc
->bus_type
& ASC_IS_PCI
) {
10650 AscSetChipCfgMsw(iop_base
, cfg_msw
);
10651 if ((asc_dvc
->bus_type
& ASC_IS_PCI_ULTRA
) == ASC_IS_PCI_ULTRA
) {
10653 if ((pci_device_id
== PCI_DEVICE_ID_ASP_1200A
) ||
10654 (pci_device_id
== PCI_DEVICE_ID_ASP_ABP940
)) {
10655 asc_dvc
->bug_fix_cntl
|= ASC_BUG_FIX_IF_NOT_DWB
;
10656 asc_dvc
->bug_fix_cntl
|=
10657 ASC_BUG_FIX_ASYN_USE_SYN
;
10660 } else if (asc_dvc
->bus_type
== ASC_IS_ISAPNP
) {
10661 if (AscGetChipVersion(iop_base
, asc_dvc
->bus_type
)
10662 == ASC_CHIP_VER_ASYN_BUG
) {
10663 asc_dvc
->bug_fix_cntl
|= ASC_BUG_FIX_ASYN_USE_SYN
;
10666 if (AscSetChipScsiID(iop_base
, asc_dvc
->cfg
->chip_scsi_id
) !=
10667 asc_dvc
->cfg
->chip_scsi_id
) {
10668 asc_dvc
->err_code
|= ASC_IERR_SET_SCSI_ID
;
10671 if (asc_dvc
->bus_type
& ASC_IS_ISA
) {
10672 AscSetIsaDmaChannel(iop_base
, asc_dvc
->cfg
->isa_dma_channel
);
10673 AscSetIsaDmaSpeed(iop_base
, asc_dvc
->cfg
->isa_dma_speed
);
10675 #endif /* CONFIG_ISA */
10676 return (warn_code
);
10679 static ushort
AscInitAsc1000Driver(ASC_DVC_VAR
*asc_dvc
)
10684 iop_base
= asc_dvc
->iop_base
;
10686 if ((asc_dvc
->dvc_cntl
& ASC_CNTL_RESET_SCSI
) &&
10687 !(asc_dvc
->init_state
& ASC_INIT_RESET_SCSI_DONE
)) {
10688 AscResetChipAndScsiBus(asc_dvc
);
10689 DvcSleepMilliSecond((ASC_DCNT
)
10690 ((ushort
)asc_dvc
->scsi_reset_wait
* 1000));
10692 asc_dvc
->init_state
|= ASC_INIT_STATE_BEG_LOAD_MC
;
10693 if (asc_dvc
->err_code
!= 0)
10695 if (!AscFindSignature(asc_dvc
->iop_base
)) {
10696 asc_dvc
->err_code
= ASC_IERR_BAD_SIGNATURE
;
10697 return (warn_code
);
10699 AscDisableInterrupt(iop_base
);
10700 warn_code
|= AscInitLram(asc_dvc
);
10701 if (asc_dvc
->err_code
!= 0)
10703 ASC_DBG1(1, "AscInitAsc1000Driver: _asc_mcode_chksum 0x%lx\n",
10704 (ulong
)_asc_mcode_chksum
);
10705 if (AscLoadMicroCode(iop_base
, 0, _asc_mcode_buf
,
10706 _asc_mcode_size
) != _asc_mcode_chksum
) {
10707 asc_dvc
->err_code
|= ASC_IERR_MCODE_CHKSUM
;
10708 return (warn_code
);
10710 warn_code
|= AscInitMicroCodeVar(asc_dvc
);
10711 asc_dvc
->init_state
|= ASC_INIT_STATE_END_LOAD_MC
;
10712 AscEnableInterrupt(iop_base
);
10713 return (warn_code
);
10716 static ushort __devinit
AscInitAscDvcVar(ASC_DVC_VAR
*asc_dvc
)
10721 uchar chip_version
;
10723 iop_base
= asc_dvc
->iop_base
;
10725 asc_dvc
->err_code
= 0;
10726 if ((asc_dvc
->bus_type
&
10727 (ASC_IS_ISA
| ASC_IS_PCI
| ASC_IS_EISA
| ASC_IS_VL
)) == 0) {
10728 asc_dvc
->err_code
|= ASC_IERR_NO_BUS_TYPE
;
10730 AscSetChipControl(iop_base
, CC_HALT
);
10731 AscSetChipStatus(iop_base
, 0);
10732 asc_dvc
->bug_fix_cntl
= 0;
10733 asc_dvc
->pci_fix_asyn_xfer
= 0;
10734 asc_dvc
->pci_fix_asyn_xfer_always
= 0;
10735 /* asc_dvc->init_state initalized in AscInitGetConfig(). */
10736 asc_dvc
->sdtr_done
= 0;
10737 asc_dvc
->cur_total_qng
= 0;
10738 asc_dvc
->is_in_int
= 0;
10739 asc_dvc
->in_critical_cnt
= 0;
10740 asc_dvc
->last_q_shortage
= 0;
10741 asc_dvc
->use_tagged_qng
= 0;
10742 asc_dvc
->no_scam
= 0;
10743 asc_dvc
->unit_not_ready
= 0;
10744 asc_dvc
->queue_full_or_busy
= 0;
10745 asc_dvc
->redo_scam
= 0;
10747 asc_dvc
->host_init_sdtr_index
= 0;
10748 asc_dvc
->cfg
->can_tagged_qng
= 0;
10749 asc_dvc
->cfg
->cmd_qng_enabled
= 0;
10750 asc_dvc
->dvc_cntl
= ASC_DEF_DVC_CNTL
;
10751 asc_dvc
->init_sdtr
= 0;
10752 asc_dvc
->max_total_qng
= ASC_DEF_MAX_TOTAL_QNG
;
10753 asc_dvc
->scsi_reset_wait
= 3;
10754 asc_dvc
->start_motor
= ASC_SCSI_WIDTH_BIT_SET
;
10755 asc_dvc
->max_dma_count
= AscGetMaxDmaCount(asc_dvc
->bus_type
);
10756 asc_dvc
->cfg
->sdtr_enable
= ASC_SCSI_WIDTH_BIT_SET
;
10757 asc_dvc
->cfg
->disc_enable
= ASC_SCSI_WIDTH_BIT_SET
;
10758 asc_dvc
->cfg
->chip_scsi_id
= ASC_DEF_CHIP_SCSI_ID
;
10759 asc_dvc
->cfg
->lib_serial_no
= ASC_LIB_SERIAL_NUMBER
;
10760 asc_dvc
->cfg
->lib_version
= (ASC_LIB_VERSION_MAJOR
<< 8) |
10761 ASC_LIB_VERSION_MINOR
;
10762 chip_version
= AscGetChipVersion(iop_base
, asc_dvc
->bus_type
);
10763 asc_dvc
->cfg
->chip_version
= chip_version
;
10764 asc_dvc
->sdtr_period_tbl
[0] = SYN_XFER_NS_0
;
10765 asc_dvc
->sdtr_period_tbl
[1] = SYN_XFER_NS_1
;
10766 asc_dvc
->sdtr_period_tbl
[2] = SYN_XFER_NS_2
;
10767 asc_dvc
->sdtr_period_tbl
[3] = SYN_XFER_NS_3
;
10768 asc_dvc
->sdtr_period_tbl
[4] = SYN_XFER_NS_4
;
10769 asc_dvc
->sdtr_period_tbl
[5] = SYN_XFER_NS_5
;
10770 asc_dvc
->sdtr_period_tbl
[6] = SYN_XFER_NS_6
;
10771 asc_dvc
->sdtr_period_tbl
[7] = SYN_XFER_NS_7
;
10772 asc_dvc
->max_sdtr_index
= 7;
10773 if ((asc_dvc
->bus_type
& ASC_IS_PCI
) &&
10774 (chip_version
>= ASC_CHIP_VER_PCI_ULTRA_3150
)) {
10775 asc_dvc
->bus_type
= ASC_IS_PCI_ULTRA
;
10776 asc_dvc
->sdtr_period_tbl
[0] = SYN_ULTRA_XFER_NS_0
;
10777 asc_dvc
->sdtr_period_tbl
[1] = SYN_ULTRA_XFER_NS_1
;
10778 asc_dvc
->sdtr_period_tbl
[2] = SYN_ULTRA_XFER_NS_2
;
10779 asc_dvc
->sdtr_period_tbl
[3] = SYN_ULTRA_XFER_NS_3
;
10780 asc_dvc
->sdtr_period_tbl
[4] = SYN_ULTRA_XFER_NS_4
;
10781 asc_dvc
->sdtr_period_tbl
[5] = SYN_ULTRA_XFER_NS_5
;
10782 asc_dvc
->sdtr_period_tbl
[6] = SYN_ULTRA_XFER_NS_6
;
10783 asc_dvc
->sdtr_period_tbl
[7] = SYN_ULTRA_XFER_NS_7
;
10784 asc_dvc
->sdtr_period_tbl
[8] = SYN_ULTRA_XFER_NS_8
;
10785 asc_dvc
->sdtr_period_tbl
[9] = SYN_ULTRA_XFER_NS_9
;
10786 asc_dvc
->sdtr_period_tbl
[10] = SYN_ULTRA_XFER_NS_10
;
10787 asc_dvc
->sdtr_period_tbl
[11] = SYN_ULTRA_XFER_NS_11
;
10788 asc_dvc
->sdtr_period_tbl
[12] = SYN_ULTRA_XFER_NS_12
;
10789 asc_dvc
->sdtr_period_tbl
[13] = SYN_ULTRA_XFER_NS_13
;
10790 asc_dvc
->sdtr_period_tbl
[14] = SYN_ULTRA_XFER_NS_14
;
10791 asc_dvc
->sdtr_period_tbl
[15] = SYN_ULTRA_XFER_NS_15
;
10792 asc_dvc
->max_sdtr_index
= 15;
10793 if (chip_version
== ASC_CHIP_VER_PCI_ULTRA_3150
) {
10794 AscSetExtraControl(iop_base
,
10795 (SEC_ACTIVE_NEGATE
| SEC_SLEW_RATE
));
10796 } else if (chip_version
>= ASC_CHIP_VER_PCI_ULTRA_3050
) {
10797 AscSetExtraControl(iop_base
,
10798 (SEC_ACTIVE_NEGATE
|
10799 SEC_ENABLE_FILTER
));
10802 if (asc_dvc
->bus_type
== ASC_IS_PCI
) {
10803 AscSetExtraControl(iop_base
,
10804 (SEC_ACTIVE_NEGATE
| SEC_SLEW_RATE
));
10807 asc_dvc
->cfg
->isa_dma_speed
= ASC_DEF_ISA_DMA_SPEED
;
10808 if (AscGetChipBusType(iop_base
) == ASC_IS_ISAPNP
) {
10809 AscSetChipIFC(iop_base
, IFC_INIT_DEFAULT
);
10810 asc_dvc
->bus_type
= ASC_IS_ISAPNP
;
10813 if ((asc_dvc
->bus_type
& ASC_IS_ISA
) != 0) {
10814 asc_dvc
->cfg
->isa_dma_channel
=
10815 (uchar
)AscGetIsaDmaChannel(iop_base
);
10817 #endif /* CONFIG_ISA */
10818 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
10819 asc_dvc
->cur_dvc_qng
[i
] = 0;
10820 asc_dvc
->max_dvc_qng
[i
] = ASC_MAX_SCSI1_QNG
;
10821 asc_dvc
->scsiq_busy_head
[i
] = (ASC_SCSI_Q
*)0L;
10822 asc_dvc
->scsiq_busy_tail
[i
] = (ASC_SCSI_Q
*)0L;
10823 asc_dvc
->cfg
->max_tag_qng
[i
] = ASC_MAX_INRAM_TAG_QNG
;
10825 return (warn_code
);
10828 static ushort __devinit
AscInitFromEEP(ASC_DVC_VAR
*asc_dvc
)
10830 ASCEEP_CONFIG eep_config_buf
;
10831 ASCEEP_CONFIG
*eep_config
;
10835 ushort cfg_msw
, cfg_lsw
;
10839 iop_base
= asc_dvc
->iop_base
;
10841 AscWriteLramWord(iop_base
, ASCV_HALTCODE_W
, 0x00FE);
10842 AscStopQueueExe(iop_base
);
10843 if ((AscStopChip(iop_base
) == FALSE
) ||
10844 (AscGetChipScsiCtrl(iop_base
) != 0)) {
10845 asc_dvc
->init_state
|= ASC_INIT_RESET_SCSI_DONE
;
10846 AscResetChipAndScsiBus(asc_dvc
);
10847 DvcSleepMilliSecond((ASC_DCNT
)
10848 ((ushort
)asc_dvc
->scsi_reset_wait
* 1000));
10850 if (AscIsChipHalted(iop_base
) == FALSE
) {
10851 asc_dvc
->err_code
|= ASC_IERR_START_STOP_CHIP
;
10852 return (warn_code
);
10854 AscSetPCAddr(iop_base
, ASC_MCODE_START_ADDR
);
10855 if (AscGetPCAddr(iop_base
) != ASC_MCODE_START_ADDR
) {
10856 asc_dvc
->err_code
|= ASC_IERR_SET_PC_ADDR
;
10857 return (warn_code
);
10859 eep_config
= (ASCEEP_CONFIG
*)&eep_config_buf
;
10860 cfg_msw
= AscGetChipCfgMsw(iop_base
);
10861 cfg_lsw
= AscGetChipCfgLsw(iop_base
);
10862 if ((cfg_msw
& ASC_CFG_MSW_CLR_MASK
) != 0) {
10863 cfg_msw
&= (~(ASC_CFG_MSW_CLR_MASK
));
10864 warn_code
|= ASC_WARN_CFG_MSW_RECOVER
;
10865 AscSetChipCfgMsw(iop_base
, cfg_msw
);
10867 chksum
= AscGetEEPConfig(iop_base
, eep_config
, asc_dvc
->bus_type
);
10868 ASC_DBG1(1, "AscInitFromEEP: chksum 0x%x\n", chksum
);
10872 if (AscGetChipStatus(iop_base
) & CSW_AUTO_CONFIG
) {
10873 warn_code
|= ASC_WARN_AUTO_CONFIG
;
10874 if (asc_dvc
->cfg
->chip_version
== 3) {
10875 if (eep_config
->cfg_lsw
!= cfg_lsw
) {
10876 warn_code
|= ASC_WARN_EEPROM_RECOVER
;
10877 eep_config
->cfg_lsw
=
10878 AscGetChipCfgLsw(iop_base
);
10880 if (eep_config
->cfg_msw
!= cfg_msw
) {
10881 warn_code
|= ASC_WARN_EEPROM_RECOVER
;
10882 eep_config
->cfg_msw
=
10883 AscGetChipCfgMsw(iop_base
);
10887 eep_config
->cfg_msw
&= ~ASC_CFG_MSW_CLR_MASK
;
10888 eep_config
->cfg_lsw
|= ASC_CFG0_HOST_INT_ON
;
10889 ASC_DBG1(1, "AscInitFromEEP: eep_config->chksum 0x%x\n",
10890 eep_config
->chksum
);
10891 if (chksum
!= eep_config
->chksum
) {
10892 if (AscGetChipVersion(iop_base
, asc_dvc
->bus_type
) ==
10893 ASC_CHIP_VER_PCI_ULTRA_3050
) {
10895 "AscInitFromEEP: chksum error ignored; EEPROM-less board\n");
10896 eep_config
->init_sdtr
= 0xFF;
10897 eep_config
->disc_enable
= 0xFF;
10898 eep_config
->start_motor
= 0xFF;
10899 eep_config
->use_cmd_qng
= 0;
10900 eep_config
->max_total_qng
= 0xF0;
10901 eep_config
->max_tag_qng
= 0x20;
10902 eep_config
->cntl
= 0xBFFF;
10903 ASC_EEP_SET_CHIP_ID(eep_config
, 7);
10904 eep_config
->no_scam
= 0;
10905 eep_config
->adapter_info
[0] = 0;
10906 eep_config
->adapter_info
[1] = 0;
10907 eep_config
->adapter_info
[2] = 0;
10908 eep_config
->adapter_info
[3] = 0;
10909 eep_config
->adapter_info
[4] = 0;
10910 /* Indicate EEPROM-less board. */
10911 eep_config
->adapter_info
[5] = 0xBB;
10914 ("AscInitFromEEP: EEPROM checksum error; Will try to re-write EEPROM.\n");
10916 warn_code
|= ASC_WARN_EEPROM_CHKSUM
;
10919 asc_dvc
->cfg
->sdtr_enable
= eep_config
->init_sdtr
;
10920 asc_dvc
->cfg
->disc_enable
= eep_config
->disc_enable
;
10921 asc_dvc
->cfg
->cmd_qng_enabled
= eep_config
->use_cmd_qng
;
10922 asc_dvc
->cfg
->isa_dma_speed
= ASC_EEP_GET_DMA_SPD(eep_config
);
10923 asc_dvc
->start_motor
= eep_config
->start_motor
;
10924 asc_dvc
->dvc_cntl
= eep_config
->cntl
;
10925 asc_dvc
->no_scam
= eep_config
->no_scam
;
10926 asc_dvc
->cfg
->adapter_info
[0] = eep_config
->adapter_info
[0];
10927 asc_dvc
->cfg
->adapter_info
[1] = eep_config
->adapter_info
[1];
10928 asc_dvc
->cfg
->adapter_info
[2] = eep_config
->adapter_info
[2];
10929 asc_dvc
->cfg
->adapter_info
[3] = eep_config
->adapter_info
[3];
10930 asc_dvc
->cfg
->adapter_info
[4] = eep_config
->adapter_info
[4];
10931 asc_dvc
->cfg
->adapter_info
[5] = eep_config
->adapter_info
[5];
10932 if (!AscTestExternalLram(asc_dvc
)) {
10933 if (((asc_dvc
->bus_type
& ASC_IS_PCI_ULTRA
) ==
10934 ASC_IS_PCI_ULTRA
)) {
10935 eep_config
->max_total_qng
=
10936 ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG
;
10937 eep_config
->max_tag_qng
=
10938 ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG
;
10940 eep_config
->cfg_msw
|= 0x0800;
10942 AscSetChipCfgMsw(iop_base
, cfg_msw
);
10943 eep_config
->max_total_qng
= ASC_MAX_PCI_INRAM_TOTAL_QNG
;
10944 eep_config
->max_tag_qng
= ASC_MAX_INRAM_TAG_QNG
;
10948 if (eep_config
->max_total_qng
< ASC_MIN_TOTAL_QNG
) {
10949 eep_config
->max_total_qng
= ASC_MIN_TOTAL_QNG
;
10951 if (eep_config
->max_total_qng
> ASC_MAX_TOTAL_QNG
) {
10952 eep_config
->max_total_qng
= ASC_MAX_TOTAL_QNG
;
10954 if (eep_config
->max_tag_qng
> eep_config
->max_total_qng
) {
10955 eep_config
->max_tag_qng
= eep_config
->max_total_qng
;
10957 if (eep_config
->max_tag_qng
< ASC_MIN_TAG_Q_PER_DVC
) {
10958 eep_config
->max_tag_qng
= ASC_MIN_TAG_Q_PER_DVC
;
10960 asc_dvc
->max_total_qng
= eep_config
->max_total_qng
;
10961 if ((eep_config
->use_cmd_qng
& eep_config
->disc_enable
) !=
10962 eep_config
->use_cmd_qng
) {
10963 eep_config
->disc_enable
= eep_config
->use_cmd_qng
;
10964 warn_code
|= ASC_WARN_CMD_QNG_CONFLICT
;
10966 if (asc_dvc
->bus_type
& (ASC_IS_ISA
| ASC_IS_VL
| ASC_IS_EISA
)) {
10967 asc_dvc
->irq_no
= AscGetChipIRQ(iop_base
, asc_dvc
->bus_type
);
10969 ASC_EEP_SET_CHIP_ID(eep_config
,
10970 ASC_EEP_GET_CHIP_ID(eep_config
) & ASC_MAX_TID
);
10971 asc_dvc
->cfg
->chip_scsi_id
= ASC_EEP_GET_CHIP_ID(eep_config
);
10972 if (((asc_dvc
->bus_type
& ASC_IS_PCI_ULTRA
) == ASC_IS_PCI_ULTRA
) &&
10973 !(asc_dvc
->dvc_cntl
& ASC_CNTL_SDTR_ENABLE_ULTRA
)) {
10974 asc_dvc
->host_init_sdtr_index
= ASC_SDTR_ULTRA_PCI_10MB_INDEX
;
10977 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
10978 asc_dvc
->dos_int13_table
[i
] = eep_config
->dos_int13_table
[i
];
10979 asc_dvc
->cfg
->max_tag_qng
[i
] = eep_config
->max_tag_qng
;
10980 asc_dvc
->cfg
->sdtr_period_offset
[i
] =
10981 (uchar
)(ASC_DEF_SDTR_OFFSET
|
10982 (asc_dvc
->host_init_sdtr_index
<< 4));
10984 eep_config
->cfg_msw
= AscGetChipCfgMsw(iop_base
);
10987 AscSetEEPConfig(iop_base
, eep_config
,
10988 asc_dvc
->bus_type
)) != 0) {
10990 ("AscInitFromEEP: Failed to re-write EEPROM with %d errors.\n",
10994 ("AscInitFromEEP: Successfully re-wrote EEPROM.\n");
10997 return (warn_code
);
11000 static ushort
AscInitMicroCodeVar(ASC_DVC_VAR
*asc_dvc
)
11005 ASC_PADDR phy_addr
;
11008 iop_base
= asc_dvc
->iop_base
;
11010 for (i
= 0; i
<= ASC_MAX_TID
; i
++) {
11011 AscPutMCodeInitSDTRAtID(iop_base
, i
,
11012 asc_dvc
->cfg
->sdtr_period_offset
[i
]
11016 AscInitQLinkVar(asc_dvc
);
11017 AscWriteLramByte(iop_base
, ASCV_DISC_ENABLE_B
,
11018 asc_dvc
->cfg
->disc_enable
);
11019 AscWriteLramByte(iop_base
, ASCV_HOSTSCSI_ID_B
,
11020 ASC_TID_TO_TARGET_ID(asc_dvc
->cfg
->chip_scsi_id
));
11022 /* Align overrun buffer on an 8 byte boundary. */
11023 phy_addr
= virt_to_bus(asc_dvc
->cfg
->overrun_buf
);
11024 phy_addr
= cpu_to_le32((phy_addr
+ 7) & ~0x7);
11025 AscMemDWordCopyPtrToLram(iop_base
, ASCV_OVERRUN_PADDR_D
,
11026 (uchar
*)&phy_addr
, 1);
11027 phy_size
= cpu_to_le32(ASC_OVERRUN_BSIZE
- 8);
11028 AscMemDWordCopyPtrToLram(iop_base
, ASCV_OVERRUN_BSIZE_D
,
11029 (uchar
*)&phy_size
, 1);
11031 asc_dvc
->cfg
->mcode_date
=
11032 AscReadLramWord(iop_base
, (ushort
)ASCV_MC_DATE_W
);
11033 asc_dvc
->cfg
->mcode_version
=
11034 AscReadLramWord(iop_base
, (ushort
)ASCV_MC_VER_W
);
11036 AscSetPCAddr(iop_base
, ASC_MCODE_START_ADDR
);
11037 if (AscGetPCAddr(iop_base
) != ASC_MCODE_START_ADDR
) {
11038 asc_dvc
->err_code
|= ASC_IERR_SET_PC_ADDR
;
11039 return (warn_code
);
11041 if (AscStartChip(iop_base
) != 1) {
11042 asc_dvc
->err_code
|= ASC_IERR_START_STOP_CHIP
;
11043 return (warn_code
);
11046 return (warn_code
);
11049 static int __devinit
AscTestExternalLram(ASC_DVC_VAR
*asc_dvc
)
11056 iop_base
= asc_dvc
->iop_base
;
11058 q_addr
= ASC_QNO_TO_QADDR(241);
11059 saved_word
= AscReadLramWord(iop_base
, q_addr
);
11060 AscSetChipLramAddr(iop_base
, q_addr
);
11061 AscSetChipLramData(iop_base
, 0x55AA);
11062 DvcSleepMilliSecond(10);
11063 AscSetChipLramAddr(iop_base
, q_addr
);
11064 if (AscGetChipLramData(iop_base
) == 0x55AA) {
11066 AscWriteLramWord(iop_base
, q_addr
, saved_word
);
11071 static int __devinit
AscWriteEEPCmdReg(PortAddr iop_base
, uchar cmd_reg
)
11078 AscSetChipEEPCmd(iop_base
, cmd_reg
);
11079 DvcSleepMilliSecond(1);
11080 read_back
= AscGetChipEEPCmd(iop_base
);
11081 if (read_back
== cmd_reg
) {
11084 if (retry
++ > ASC_EEP_MAX_RETRY
) {
11090 static int __devinit
AscWriteEEPDataReg(PortAddr iop_base
, ushort data_reg
)
11097 AscSetChipEEPData(iop_base
, data_reg
);
11098 DvcSleepMilliSecond(1);
11099 read_back
= AscGetChipEEPData(iop_base
);
11100 if (read_back
== data_reg
) {
11103 if (retry
++ > ASC_EEP_MAX_RETRY
) {
11109 static void __devinit
AscWaitEEPRead(void)
11111 DvcSleepMilliSecond(1);
11115 static void __devinit
AscWaitEEPWrite(void)
11117 DvcSleepMilliSecond(20);
11121 static ushort __devinit
AscReadEEPWord(PortAddr iop_base
, uchar addr
)
11126 AscWriteEEPCmdReg(iop_base
, ASC_EEP_CMD_WRITE_DISABLE
);
11128 cmd_reg
= addr
| ASC_EEP_CMD_READ
;
11129 AscWriteEEPCmdReg(iop_base
, cmd_reg
);
11131 read_wval
= AscGetChipEEPData(iop_base
);
11133 return (read_wval
);
11136 static ushort __devinit
11137 AscWriteEEPWord(PortAddr iop_base
, uchar addr
, ushort word_val
)
11141 read_wval
= AscReadEEPWord(iop_base
, addr
);
11142 if (read_wval
!= word_val
) {
11143 AscWriteEEPCmdReg(iop_base
, ASC_EEP_CMD_WRITE_ABLE
);
11145 AscWriteEEPDataReg(iop_base
, word_val
);
11147 AscWriteEEPCmdReg(iop_base
,
11148 (uchar
)((uchar
)ASC_EEP_CMD_WRITE
| addr
));
11150 AscWriteEEPCmdReg(iop_base
, ASC_EEP_CMD_WRITE_DISABLE
);
11152 return (AscReadEEPWord(iop_base
, addr
));
11154 return (read_wval
);
11157 static ushort __devinit
11158 AscGetEEPConfig(PortAddr iop_base
, ASCEEP_CONFIG
*cfg_buf
, ushort bus_type
)
11165 int uchar_end_in_config
= ASC_EEP_MAX_DVC_ADDR
- 2;
11168 wbuf
= (ushort
*)cfg_buf
;
11170 /* Read two config words; Byte-swapping done by AscReadEEPWord(). */
11171 for (s_addr
= 0; s_addr
< 2; s_addr
++, wbuf
++) {
11172 *wbuf
= AscReadEEPWord(iop_base
, (uchar
)s_addr
);
11175 if (bus_type
& ASC_IS_VL
) {
11176 cfg_beg
= ASC_EEP_DVC_CFG_BEG_VL
;
11177 cfg_end
= ASC_EEP_MAX_DVC_ADDR_VL
;
11179 cfg_beg
= ASC_EEP_DVC_CFG_BEG
;
11180 cfg_end
= ASC_EEP_MAX_DVC_ADDR
;
11182 for (s_addr
= cfg_beg
; s_addr
<= (cfg_end
- 1); s_addr
++, wbuf
++) {
11183 wval
= AscReadEEPWord(iop_base
, (uchar
)s_addr
);
11184 if (s_addr
<= uchar_end_in_config
) {
11186 * Swap all char fields - must unswap bytes already swapped
11187 * by AscReadEEPWord().
11189 *wbuf
= le16_to_cpu(wval
);
11191 /* Don't swap word field at the end - cntl field. */
11194 sum
+= wval
; /* Checksum treats all EEPROM data as words. */
11197 * Read the checksum word which will be compared against 'sum'
11198 * by the caller. Word field already swapped.
11200 *wbuf
= AscReadEEPWord(iop_base
, (uchar
)s_addr
);
11204 static int __devinit
11205 AscSetEEPConfigOnce(PortAddr iop_base
, ASCEEP_CONFIG
*cfg_buf
, ushort bus_type
)
11214 int uchar_end_in_config
= ASC_EEP_MAX_DVC_ADDR
- 2;
11216 wbuf
= (ushort
*)cfg_buf
;
11219 /* Write two config words; AscWriteEEPWord() will swap bytes. */
11220 for (s_addr
= 0; s_addr
< 2; s_addr
++, wbuf
++) {
11222 if (*wbuf
!= AscWriteEEPWord(iop_base
, (uchar
)s_addr
, *wbuf
)) {
11226 if (bus_type
& ASC_IS_VL
) {
11227 cfg_beg
= ASC_EEP_DVC_CFG_BEG_VL
;
11228 cfg_end
= ASC_EEP_MAX_DVC_ADDR_VL
;
11230 cfg_beg
= ASC_EEP_DVC_CFG_BEG
;
11231 cfg_end
= ASC_EEP_MAX_DVC_ADDR
;
11233 for (s_addr
= cfg_beg
; s_addr
<= (cfg_end
- 1); s_addr
++, wbuf
++) {
11234 if (s_addr
<= uchar_end_in_config
) {
11236 * This is a char field. Swap char fields before they are
11237 * swapped again by AscWriteEEPWord().
11239 word
= cpu_to_le16(*wbuf
);
11241 AscWriteEEPWord(iop_base
, (uchar
)s_addr
, word
)) {
11245 /* Don't swap word field at the end - cntl field. */
11247 AscWriteEEPWord(iop_base
, (uchar
)s_addr
, *wbuf
)) {
11251 sum
+= *wbuf
; /* Checksum calculated from word values. */
11253 /* Write checksum word. It will be swapped by AscWriteEEPWord(). */
11255 if (sum
!= AscWriteEEPWord(iop_base
, (uchar
)s_addr
, sum
)) {
11259 /* Read EEPROM back again. */
11260 wbuf
= (ushort
*)cfg_buf
;
11262 * Read two config words; Byte-swapping done by AscReadEEPWord().
11264 for (s_addr
= 0; s_addr
< 2; s_addr
++, wbuf
++) {
11265 if (*wbuf
!= AscReadEEPWord(iop_base
, (uchar
)s_addr
)) {
11269 if (bus_type
& ASC_IS_VL
) {
11270 cfg_beg
= ASC_EEP_DVC_CFG_BEG_VL
;
11271 cfg_end
= ASC_EEP_MAX_DVC_ADDR_VL
;
11273 cfg_beg
= ASC_EEP_DVC_CFG_BEG
;
11274 cfg_end
= ASC_EEP_MAX_DVC_ADDR
;
11276 for (s_addr
= cfg_beg
; s_addr
<= (cfg_end
- 1); s_addr
++, wbuf
++) {
11277 if (s_addr
<= uchar_end_in_config
) {
11279 * Swap all char fields. Must unswap bytes already swapped
11280 * by AscReadEEPWord().
11283 le16_to_cpu(AscReadEEPWord
11284 (iop_base
, (uchar
)s_addr
));
11286 /* Don't swap word field at the end - cntl field. */
11287 word
= AscReadEEPWord(iop_base
, (uchar
)s_addr
);
11289 if (*wbuf
!= word
) {
11293 /* Read checksum; Byte swapping not needed. */
11294 if (AscReadEEPWord(iop_base
, (uchar
)s_addr
) != sum
) {
11300 static int __devinit
11301 AscSetEEPConfig(PortAddr iop_base
, ASCEEP_CONFIG
*cfg_buf
, ushort bus_type
)
11308 if ((n_error
= AscSetEEPConfigOnce(iop_base
, cfg_buf
,
11312 if (++retry
> ASC_EEP_MAX_RETRY
) {
11320 AscAsyncFix(ASC_DVC_VAR
*asc_dvc
, uchar tid_no
, ASC_SCSI_INQUIRY
*inq
)
11323 ASC_SCSI_BIT_ID_TYPE tid_bits
;
11325 dvc_type
= ASC_INQ_DVC_TYPE(inq
);
11326 tid_bits
= ASC_TIX_TO_TARGET_ID(tid_no
);
11328 if (asc_dvc
->bug_fix_cntl
& ASC_BUG_FIX_ASYN_USE_SYN
) {
11329 if (!(asc_dvc
->init_sdtr
& tid_bits
)) {
11330 if ((dvc_type
== TYPE_ROM
) &&
11331 (AscCompareString((uchar
*)inq
->vendor_id
,
11332 (uchar
*)"HP ", 3) == 0)) {
11333 asc_dvc
->pci_fix_asyn_xfer_always
|= tid_bits
;
11335 asc_dvc
->pci_fix_asyn_xfer
|= tid_bits
;
11336 if ((dvc_type
== TYPE_PROCESSOR
) ||
11337 (dvc_type
== TYPE_SCANNER
) ||
11338 (dvc_type
== TYPE_ROM
) || (dvc_type
== TYPE_TAPE
)) {
11339 asc_dvc
->pci_fix_asyn_xfer
&= ~tid_bits
;
11342 if (asc_dvc
->pci_fix_asyn_xfer
& tid_bits
) {
11343 AscSetRunChipSynRegAtID(asc_dvc
->iop_base
,
11345 ASYN_SDTR_DATA_FIX_PCI_REV_AB
);
11352 static int AscTagQueuingSafe(ASC_SCSI_INQUIRY
*inq
)
11354 if ((inq
->add_len
>= 32) &&
11355 (AscCompareString((uchar
*)inq
->vendor_id
,
11356 (uchar
*)"QUANTUM XP34301", 15) == 0) &&
11357 (AscCompareString((uchar
*)inq
->product_rev_level
,
11358 (uchar
*)"1071", 4) == 0)) {
11365 AscInquiryHandling(ASC_DVC_VAR
*asc_dvc
, uchar tid_no
, ASC_SCSI_INQUIRY
*inq
)
11367 ASC_SCSI_BIT_ID_TYPE tid_bit
= ASC_TIX_TO_TARGET_ID(tid_no
);
11368 ASC_SCSI_BIT_ID_TYPE orig_init_sdtr
, orig_use_tagged_qng
;
11370 orig_init_sdtr
= asc_dvc
->init_sdtr
;
11371 orig_use_tagged_qng
= asc_dvc
->use_tagged_qng
;
11373 asc_dvc
->init_sdtr
&= ~tid_bit
;
11374 asc_dvc
->cfg
->can_tagged_qng
&= ~tid_bit
;
11375 asc_dvc
->use_tagged_qng
&= ~tid_bit
;
11377 if (ASC_INQ_RESPONSE_FMT(inq
) >= 2 || ASC_INQ_ANSI_VER(inq
) >= 2) {
11378 if ((asc_dvc
->cfg
->sdtr_enable
& tid_bit
) && ASC_INQ_SYNC(inq
)) {
11379 asc_dvc
->init_sdtr
|= tid_bit
;
11381 if ((asc_dvc
->cfg
->cmd_qng_enabled
& tid_bit
) &&
11382 ASC_INQ_CMD_QUEUE(inq
)) {
11383 if (AscTagQueuingSafe(inq
)) {
11384 asc_dvc
->use_tagged_qng
|= tid_bit
;
11385 asc_dvc
->cfg
->can_tagged_qng
|= tid_bit
;
11389 if (orig_use_tagged_qng
!= asc_dvc
->use_tagged_qng
) {
11390 AscWriteLramByte(asc_dvc
->iop_base
, ASCV_DISC_ENABLE_B
,
11391 asc_dvc
->cfg
->disc_enable
);
11392 AscWriteLramByte(asc_dvc
->iop_base
, ASCV_USE_TAGGED_QNG_B
,
11393 asc_dvc
->use_tagged_qng
);
11394 AscWriteLramByte(asc_dvc
->iop_base
, ASCV_CAN_TAGGED_QNG_B
,
11395 asc_dvc
->cfg
->can_tagged_qng
);
11397 asc_dvc
->max_dvc_qng
[tid_no
] =
11398 asc_dvc
->cfg
->max_tag_qng
[tid_no
];
11399 AscWriteLramByte(asc_dvc
->iop_base
,
11400 (ushort
)(ASCV_MAX_DVC_QNG_BEG
+ tid_no
),
11401 asc_dvc
->max_dvc_qng
[tid_no
]);
11403 if (orig_init_sdtr
!= asc_dvc
->init_sdtr
) {
11404 AscAsyncFix(asc_dvc
, tid_no
, inq
);
11409 static int AscCompareString(uchar
*str1
, uchar
*str2
, int len
)
11414 for (i
= 0; i
< len
; i
++) {
11415 diff
= (int)(str1
[i
] - str2
[i
]);
11422 static uchar
AscReadLramByte(PortAddr iop_base
, ushort addr
)
11427 if (isodd_word(addr
)) {
11428 AscSetChipLramAddr(iop_base
, addr
- 1);
11429 word_data
= AscGetChipLramData(iop_base
);
11430 byte_data
= (uchar
)((word_data
>> 8) & 0xFF);
11432 AscSetChipLramAddr(iop_base
, addr
);
11433 word_data
= AscGetChipLramData(iop_base
);
11434 byte_data
= (uchar
)(word_data
& 0xFF);
11436 return (byte_data
);
11439 static ushort
AscReadLramWord(PortAddr iop_base
, ushort addr
)
11443 AscSetChipLramAddr(iop_base
, addr
);
11444 word_data
= AscGetChipLramData(iop_base
);
11445 return (word_data
);
11448 #if CC_VERY_LONG_SG_LIST
11449 static ASC_DCNT
AscReadLramDWord(PortAddr iop_base
, ushort addr
)
11451 ushort val_low
, val_high
;
11452 ASC_DCNT dword_data
;
11454 AscSetChipLramAddr(iop_base
, addr
);
11455 val_low
= AscGetChipLramData(iop_base
);
11456 val_high
= AscGetChipLramData(iop_base
);
11457 dword_data
= ((ASC_DCNT
) val_high
<< 16) | (ASC_DCNT
) val_low
;
11458 return (dword_data
);
11460 #endif /* CC_VERY_LONG_SG_LIST */
11462 static void AscWriteLramWord(PortAddr iop_base
, ushort addr
, ushort word_val
)
11464 AscSetChipLramAddr(iop_base
, addr
);
11465 AscSetChipLramData(iop_base
, word_val
);
11469 static void AscWriteLramByte(PortAddr iop_base
, ushort addr
, uchar byte_val
)
11473 if (isodd_word(addr
)) {
11475 word_data
= AscReadLramWord(iop_base
, addr
);
11476 word_data
&= 0x00FF;
11477 word_data
|= (((ushort
)byte_val
<< 8) & 0xFF00);
11479 word_data
= AscReadLramWord(iop_base
, addr
);
11480 word_data
&= 0xFF00;
11481 word_data
|= ((ushort
)byte_val
& 0x00FF);
11483 AscWriteLramWord(iop_base
, addr
, word_data
);
11488 * Copy 2 bytes to LRAM.
11490 * The source data is assumed to be in little-endian order in memory
11491 * and is maintained in little-endian order when written to LRAM.
11494 AscMemWordCopyPtrToLram(PortAddr iop_base
,
11495 ushort s_addr
, uchar
*s_buffer
, int words
)
11499 AscSetChipLramAddr(iop_base
, s_addr
);
11500 for (i
= 0; i
< 2 * words
; i
+= 2) {
11502 * On a little-endian system the second argument below
11503 * produces a little-endian ushort which is written to
11504 * LRAM in little-endian order. On a big-endian system
11505 * the second argument produces a big-endian ushort which
11506 * is "transparently" byte-swapped by outpw() and written
11507 * in little-endian order to LRAM.
11509 outpw(iop_base
+ IOP_RAM_DATA
,
11510 ((ushort
)s_buffer
[i
+ 1] << 8) | s_buffer
[i
]);
11516 * Copy 4 bytes to LRAM.
11518 * The source data is assumed to be in little-endian order in memory
11519 * and is maintained in little-endian order when writen to LRAM.
11522 AscMemDWordCopyPtrToLram(PortAddr iop_base
,
11523 ushort s_addr
, uchar
*s_buffer
, int dwords
)
11527 AscSetChipLramAddr(iop_base
, s_addr
);
11528 for (i
= 0; i
< 4 * dwords
; i
+= 4) {
11529 outpw(iop_base
+ IOP_RAM_DATA
, ((ushort
)s_buffer
[i
+ 1] << 8) | s_buffer
[i
]); /* LSW */
11530 outpw(iop_base
+ IOP_RAM_DATA
, ((ushort
)s_buffer
[i
+ 3] << 8) | s_buffer
[i
+ 2]); /* MSW */
11536 * Copy 2 bytes from LRAM.
11538 * The source data is assumed to be in little-endian order in LRAM
11539 * and is maintained in little-endian order when written to memory.
11542 AscMemWordCopyPtrFromLram(PortAddr iop_base
,
11543 ushort s_addr
, uchar
*d_buffer
, int words
)
11548 AscSetChipLramAddr(iop_base
, s_addr
);
11549 for (i
= 0; i
< 2 * words
; i
+= 2) {
11550 word
= inpw(iop_base
+ IOP_RAM_DATA
);
11551 d_buffer
[i
] = word
& 0xff;
11552 d_buffer
[i
+ 1] = (word
>> 8) & 0xff;
11557 static ASC_DCNT
AscMemSumLramWord(PortAddr iop_base
, ushort s_addr
, int words
)
11563 for (i
= 0; i
< words
; i
++, s_addr
+= 2) {
11564 sum
+= AscReadLramWord(iop_base
, s_addr
);
11570 AscMemWordSetLram(PortAddr iop_base
, ushort s_addr
, ushort set_wval
, int words
)
11574 AscSetChipLramAddr(iop_base
, s_addr
);
11575 for (i
= 0; i
< words
; i
++) {
11576 AscSetChipLramData(iop_base
, set_wval
);
11582 * --- Adv Library Functions
11587 /* Microcode buffer is kept after initialization for error recovery. */
11588 static unsigned char _adv_asc3550_buf
[] = {
11589 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0x16, 0x18, 0xe4, 0x00, 0xfc,
11590 0x01, 0x00, 0x48, 0xe4,
11591 0xbe, 0x18, 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00, 0x00, 0xfa, 0xff, 0xff,
11592 0x28, 0x0e, 0x9e, 0xe7,
11593 0xff, 0x00, 0x82, 0xe7, 0x00, 0xea, 0x00, 0xf6, 0x01, 0xe6, 0x09, 0xe7,
11594 0x55, 0xf0, 0x01, 0xf6,
11595 0x01, 0xfa, 0x08, 0x00, 0x03, 0x00, 0x04, 0x00, 0x18, 0xf4, 0x10, 0x00,
11596 0x00, 0xec, 0x85, 0xf0,
11597 0xbc, 0x00, 0xd5, 0xf0, 0x8e, 0x0c, 0x38, 0x54, 0x00, 0xe6, 0x1e, 0xf0,
11598 0x86, 0xf0, 0xb4, 0x00,
11599 0x98, 0x57, 0xd0, 0x01, 0x0c, 0x1c, 0x3e, 0x1c, 0x0c, 0x00, 0xbb, 0x00,
11600 0xaa, 0x18, 0x02, 0x80,
11601 0x32, 0xf0, 0x01, 0xfc, 0x88, 0x0c, 0xc6, 0x12, 0x02, 0x13, 0x18, 0x40,
11602 0x00, 0x57, 0x01, 0xea,
11603 0x3c, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12, 0x3e, 0x57, 0x00, 0x80,
11604 0x03, 0xe6, 0xb6, 0x00,
11605 0xc0, 0x00, 0x01, 0x01, 0x3e, 0x01, 0xda, 0x0f, 0x22, 0x10, 0x08, 0x12,
11606 0x02, 0x4a, 0xb9, 0x54,
11607 0x03, 0x58, 0x1b, 0x80, 0x30, 0xe4, 0x4b, 0xe4, 0x20, 0x00, 0x32, 0x00,
11608 0x3e, 0x00, 0x80, 0x00,
11609 0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01, 0x70, 0x01, 0x72, 0x01,
11610 0x74, 0x01, 0x76, 0x01,
11611 0x78, 0x01, 0x62, 0x0a, 0x92, 0x0c, 0x2c, 0x10, 0x2e, 0x10, 0x06, 0x13,
11612 0x4c, 0x1c, 0xbb, 0x55,
11613 0x3c, 0x56, 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0, 0xb1, 0xf0,
11614 0x03, 0xf7, 0x06, 0xf7,
11615 0x03, 0xfc, 0x0f, 0x00, 0x40, 0x00, 0xbe, 0x00, 0x00, 0x01, 0xb0, 0x08,
11616 0x30, 0x13, 0x64, 0x15,
11617 0x32, 0x1c, 0x38, 0x1c, 0x4e, 0x1c, 0x10, 0x44, 0x02, 0x48, 0x00, 0x4c,
11618 0x04, 0xea, 0x5d, 0xf0,
11619 0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x34, 0x00, 0x36, 0x00, 0x98, 0x00,
11620 0xcc, 0x00, 0x20, 0x01,
11621 0x4e, 0x01, 0x4e, 0x0b, 0x1e, 0x0e, 0x0c, 0x10, 0x0a, 0x12, 0x04, 0x13,
11622 0x40, 0x13, 0x30, 0x1c,
11623 0x00, 0x4e, 0xbd, 0x56, 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0,
11624 0x59, 0xf0, 0xa7, 0xf0,
11625 0xb8, 0xf0, 0x0e, 0xf7, 0x06, 0x00, 0x19, 0x00, 0x33, 0x00, 0x9b, 0x00,
11626 0xa4, 0x00, 0xb5, 0x00,
11627 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00, 0xe7, 0x00, 0xde, 0x03, 0x56, 0x0a,
11628 0x14, 0x0e, 0x02, 0x10,
11629 0x04, 0x10, 0x0a, 0x10, 0x36, 0x10, 0x0a, 0x13, 0x12, 0x13, 0x52, 0x13,
11630 0x10, 0x15, 0x14, 0x15,
11631 0xac, 0x16, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, 0x08, 0x44, 0x38, 0x44,
11632 0x91, 0x44, 0x0a, 0x45,
11633 0x48, 0x46, 0x01, 0x48, 0x68, 0x54, 0x83, 0x55, 0xb0, 0x57, 0x01, 0x58,
11634 0x83, 0x59, 0x05, 0xe6,
11635 0x0b, 0xf0, 0x0c, 0xf0, 0x5c, 0xf0, 0x4b, 0xf4, 0x04, 0xf8, 0x05, 0xf8,
11636 0x02, 0xfa, 0x03, 0xfa,
11637 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00, 0x0a, 0x00, 0x0d, 0x00, 0x1c, 0x00,
11638 0x9e, 0x00, 0xa8, 0x00,
11639 0xaa, 0x00, 0xb9, 0x00, 0xe0, 0x00, 0x22, 0x01, 0x26, 0x01, 0x79, 0x01,
11640 0x7a, 0x01, 0xc0, 0x01,
11641 0xc2, 0x01, 0x7c, 0x02, 0x5a, 0x03, 0xea, 0x04, 0xe8, 0x07, 0x68, 0x08,
11642 0x69, 0x08, 0xba, 0x08,
11643 0xe9, 0x09, 0x06, 0x0b, 0x3a, 0x0e, 0x00, 0x10, 0x1a, 0x10, 0xed, 0x10,
11644 0xf1, 0x10, 0x06, 0x12,
11645 0x0c, 0x13, 0x16, 0x13, 0x1e, 0x13, 0x82, 0x13, 0x42, 0x14, 0xd6, 0x14,
11646 0x8a, 0x15, 0xc6, 0x17,
11647 0xd2, 0x17, 0x6b, 0x18, 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40,
11648 0x0e, 0x47, 0x48, 0x47,
11649 0x41, 0x48, 0x89, 0x48, 0x80, 0x4c, 0x00, 0x54, 0x44, 0x55, 0xe5, 0x55,
11650 0x14, 0x56, 0x77, 0x57,
11651 0xbf, 0x57, 0x40, 0x5c, 0x06, 0x80, 0x08, 0x90, 0x03, 0xa1, 0xfe, 0x9c,
11652 0xf0, 0x29, 0x02, 0xfe,
11653 0xb8, 0x0c, 0xff, 0x10, 0x00, 0x00, 0xd0, 0xfe, 0xcc, 0x18, 0x00, 0xcf,
11654 0xfe, 0x80, 0x01, 0xff,
11655 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00,
11656 0x00, 0xfe, 0x57, 0x24,
11657 0x00, 0xfe, 0x48, 0x00, 0x4f, 0xff, 0x04, 0x00, 0x00, 0x10, 0xff, 0x09,
11658 0x00, 0x00, 0xff, 0x08,
11659 0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10,
11660 0xff, 0xff, 0xff, 0x0f,
11661 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00,
11662 0xfe, 0x04, 0xf7, 0xcf,
11663 0x2a, 0x67, 0x0b, 0x01, 0xfe, 0xce, 0x0e, 0xfe, 0x04, 0xf7, 0xcf, 0x67,
11664 0x0b, 0x3c, 0x2a, 0xfe,
11665 0x3d, 0xf0, 0xfe, 0x02, 0x02, 0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x91, 0xf0,
11666 0xfe, 0xf0, 0x01, 0xfe,
11667 0x90, 0xf0, 0xfe, 0xf0, 0x01, 0xfe, 0x8f, 0xf0, 0x9c, 0x05, 0x51, 0x3b,
11668 0x02, 0xfe, 0xd4, 0x0c,
11669 0x01, 0xfe, 0x44, 0x0d, 0xfe, 0xdd, 0x12, 0xfe, 0xfc, 0x10, 0xfe, 0x28,
11670 0x1c, 0x05, 0xfe, 0xa6,
11671 0x00, 0xfe, 0xd3, 0x12, 0x47, 0x18, 0xfe, 0xa6, 0x00, 0xb5, 0xfe, 0x48,
11672 0xf0, 0xfe, 0x86, 0x02,
11673 0xfe, 0x49, 0xf0, 0xfe, 0xa0, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xbe, 0x02,
11674 0xfe, 0x46, 0xf0, 0xfe,
11675 0x50, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x56, 0x02, 0xfe, 0x43, 0xf0, 0xfe,
11676 0x44, 0x02, 0xfe, 0x44,
11677 0xf0, 0xfe, 0x48, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x4c, 0x02, 0x17, 0x0b,
11678 0xa0, 0x17, 0x06, 0x18,
11679 0x96, 0x02, 0x29, 0xfe, 0x00, 0x1c, 0xde, 0xfe, 0x02, 0x1c, 0xdd, 0xfe,
11680 0x1e, 0x1c, 0xfe, 0xe9,
11681 0x10, 0x01, 0xfe, 0x20, 0x17, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc, 0xc7,
11682 0x0a, 0x6b, 0x01, 0x9e,
11683 0x02, 0x29, 0x14, 0x4d, 0x37, 0x97, 0x01, 0xfe, 0x64, 0x0f, 0x0a, 0x6b,
11684 0x01, 0x82, 0xfe, 0xbd,
11685 0x10, 0x0a, 0x6b, 0x01, 0x82, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe,
11686 0x58, 0x1c, 0x17, 0x06,
11687 0x18, 0x96, 0x2a, 0x25, 0x29, 0xfe, 0x3d, 0xf0, 0xfe, 0x02, 0x02, 0x21,
11688 0xfe, 0x94, 0x02, 0xfe,
11689 0x5a, 0x1c, 0xea, 0xfe, 0x14, 0x1c, 0x14, 0xfe, 0x30, 0x00, 0x37, 0x97,
11690 0x01, 0xfe, 0x54, 0x0f,
11691 0x17, 0x06, 0x18, 0x96, 0x02, 0xd0, 0x1e, 0x20, 0x07, 0x10, 0x34, 0xfe,
11692 0x69, 0x10, 0x17, 0x06,
11693 0x18, 0x96, 0xfe, 0x04, 0xec, 0x20, 0x46, 0x3d, 0x12, 0x20, 0xfe, 0x05,
11694 0xf6, 0xc7, 0x01, 0xfe,
11695 0x52, 0x16, 0x09, 0x4a, 0x4c, 0x35, 0x11, 0x2d, 0x3c, 0x8a, 0x01, 0xe6,
11696 0x02, 0x29, 0x0a, 0x40,
11697 0x01, 0x0e, 0x07, 0x00, 0x5d, 0x01, 0x6f, 0xfe, 0x18, 0x10, 0xfe, 0x41,
11698 0x58, 0x0a, 0x99, 0x01,
11699 0x0e, 0xfe, 0xc8, 0x54, 0x64, 0xfe, 0x0c, 0x03, 0x01, 0xe6, 0x02, 0x29,
11700 0x2a, 0x46, 0xfe, 0x02,
11701 0xe8, 0x27, 0xf8, 0xfe, 0x9e, 0x43, 0xf7, 0xfe, 0x27, 0xf0, 0xfe, 0xdc,
11702 0x01, 0xfe, 0x07, 0x4b,
11703 0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x40, 0x1c, 0x25, 0xd2, 0xfe, 0x26, 0xf0,
11704 0xfe, 0x56, 0x03, 0xfe,
11705 0xa0, 0xf0, 0xfe, 0x44, 0x03, 0xfe, 0x11, 0xf0, 0x9c, 0xfe, 0xef, 0x10,
11706 0xfe, 0x9f, 0xf0, 0xfe,
11707 0x64, 0x03, 0xeb, 0x0f, 0xfe, 0x11, 0x00, 0x02, 0x5a, 0x2a, 0xfe, 0x48,
11708 0x1c, 0xeb, 0x09, 0x04,
11709 0x1d, 0xfe, 0x18, 0x13, 0x23, 0x1e, 0x98, 0xac, 0x12, 0x98, 0x0a, 0x40,
11710 0x01, 0x0e, 0xac, 0x75,
11711 0x01, 0xfe, 0xbc, 0x15, 0x11, 0xca, 0x25, 0xd2, 0xfe, 0x01, 0xf0, 0xd2,
11712 0xfe, 0x82, 0xf0, 0xfe,
11713 0x92, 0x03, 0xec, 0x11, 0xfe, 0xe4, 0x00, 0x65, 0xfe, 0xa4, 0x03, 0x25,
11714 0x32, 0x1f, 0xfe, 0xb4,
11715 0x03, 0x01, 0x43, 0xfe, 0x06, 0xf0, 0xfe, 0xc4, 0x03, 0x8d, 0x81, 0xfe,
11716 0x0a, 0xf0, 0xfe, 0x7a,
11717 0x06, 0x02, 0x22, 0x05, 0x6b, 0x28, 0x16, 0xfe, 0xf6, 0x04, 0x14, 0x2c,
11718 0x01, 0x33, 0x8f, 0xfe,
11719 0x66, 0x02, 0x02, 0xd1, 0xeb, 0x2a, 0x67, 0x1a, 0xfe, 0x67, 0x1b, 0xf8,
11720 0xf7, 0xfe, 0x48, 0x1c,
11721 0x70, 0x01, 0x6e, 0x87, 0x0a, 0x40, 0x01, 0x0e, 0x07, 0x00, 0x16, 0xd3,
11722 0x0a, 0xca, 0x01, 0x0e,
11723 0x74, 0x60, 0x59, 0x76, 0x27, 0x05, 0x6b, 0x28, 0xfe, 0x10, 0x12, 0x14,
11724 0x2c, 0x01, 0x33, 0x8f,
11725 0xfe, 0x66, 0x02, 0x02, 0xd1, 0xbc, 0x7d, 0xbd, 0x7f, 0x25, 0x22, 0x65,
11726 0xfe, 0x3c, 0x04, 0x1f,
11727 0xfe, 0x38, 0x04, 0x68, 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x4e,
11728 0x12, 0x2b, 0xff, 0x02,
11729 0x00, 0x10, 0x01, 0x08, 0x1f, 0xfe, 0xe0, 0x04, 0x2b, 0x01, 0x08, 0x1f,
11730 0x22, 0x30, 0x2e, 0xd5,
11731 0xfe, 0x4c, 0x44, 0xfe, 0x4c, 0x12, 0x60, 0xfe, 0x44, 0x48, 0x13, 0x2c,
11732 0xfe, 0x4c, 0x54, 0x64,
11733 0xd3, 0x46, 0x76, 0x27, 0xfa, 0xef, 0xfe, 0x62, 0x13, 0x09, 0x04, 0x1d,
11734 0xfe, 0x2a, 0x13, 0x2f,
11735 0x07, 0x7e, 0xa5, 0xfe, 0x20, 0x10, 0x13, 0x2c, 0xfe, 0x4c, 0x54, 0x64,
11736 0xd3, 0xfa, 0xef, 0x86,
11737 0x09, 0x04, 0x1d, 0xfe, 0x08, 0x13, 0x2f, 0x07, 0x7e, 0x6e, 0x09, 0x04,
11738 0x1d, 0xfe, 0x1c, 0x12,
11739 0x14, 0x92, 0x09, 0x04, 0x06, 0x3b, 0x14, 0xc4, 0x01, 0x33, 0x8f, 0xfe,
11740 0x70, 0x0c, 0x02, 0x22,
11741 0x2b, 0x11, 0xfe, 0xe6, 0x00, 0xfe, 0x1c, 0x90, 0xf9, 0x03, 0x14, 0x92,
11742 0x01, 0x33, 0x02, 0x29,
11743 0xfe, 0x42, 0x5b, 0x67, 0x1a, 0xfe, 0x46, 0x59, 0xf8, 0xf7, 0xfe, 0x87,
11744 0x80, 0xfe, 0x31, 0xe4,
11745 0x4f, 0x09, 0x04, 0x0b, 0xfe, 0x78, 0x13, 0xfe, 0x20, 0x80, 0x07, 0x1a,
11746 0xfe, 0x70, 0x12, 0x49,
11747 0x04, 0x06, 0xfe, 0x60, 0x13, 0x05, 0xfe, 0xa2, 0x00, 0x28, 0x16, 0xfe,
11748 0x80, 0x05, 0xfe, 0x31,
11749 0xe4, 0x6a, 0x49, 0x04, 0x0b, 0xfe, 0x4a, 0x13, 0x05, 0xfe, 0xa0, 0x00,
11750 0x28, 0xfe, 0x42, 0x12,
11751 0x5e, 0x01, 0x08, 0x25, 0x32, 0xf1, 0x01, 0x08, 0x26, 0xfe, 0x98, 0x05,
11752 0x11, 0xfe, 0xe3, 0x00,
11753 0x23, 0x49, 0xfe, 0x4a, 0xf0, 0xfe, 0x6a, 0x05, 0xfe, 0x49, 0xf0, 0xfe,
11754 0x64, 0x05, 0x83, 0x24,
11755 0xfe, 0x21, 0x00, 0xa1, 0x24, 0xfe, 0x22, 0x00, 0xa0, 0x24, 0x4c, 0xfe,
11756 0x09, 0x48, 0x01, 0x08,
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12187 0x27, 0x01, 0xda, 0x17, 0x06, 0x03, 0x3c, 0x8a, 0x09, 0x4a, 0x1d, 0x35,
12188 0x11, 0x2d, 0x01, 0x6f,
12189 0x17, 0x06, 0x03, 0xfe, 0x38, 0x90, 0xfe, 0xba, 0x90, 0x79, 0xc7, 0x68,
12190 0xc8, 0xfe, 0x48, 0x55,
12191 0x34, 0xfe, 0xc9, 0x55, 0x03, 0x1e, 0x98, 0x73, 0x12, 0x98, 0x03, 0x0a,
12192 0x99, 0x01, 0x0e, 0xf0,
12193 0x0a, 0x40, 0x01, 0x0e, 0xfe, 0x49, 0x44, 0x16, 0xfe, 0xf0, 0x17, 0x73,
12194 0x75, 0x03, 0x0a, 0x42,
12195 0x01, 0x0e, 0x07, 0x10, 0x45, 0x0a, 0x51, 0x01, 0x9e, 0x0a, 0x40, 0x01,
12196 0x0e, 0x73, 0x75, 0x03,
12197 0xfe, 0x4e, 0xe4, 0x1a, 0x64, 0xfe, 0x24, 0x18, 0x05, 0xfe, 0x90, 0x00,
12198 0xfe, 0x3a, 0x45, 0x5b,
12199 0xfe, 0x4e, 0xe4, 0xc2, 0x64, 0xfe, 0x36, 0x18, 0x05, 0xfe, 0x92, 0x00,
12200 0xfe, 0x02, 0xe6, 0x1b,
12201 0xdc, 0xfe, 0x4e, 0xe4, 0xfe, 0x0b, 0x00, 0x64, 0xfe, 0x48, 0x18, 0x05,
12202 0xfe, 0x94, 0x00, 0xfe,
12203 0x02, 0xe6, 0x19, 0xfe, 0x08, 0x10, 0x05, 0xfe, 0x96, 0x00, 0xfe, 0x02,
12204 0xe6, 0x2c, 0xfe, 0x4e,
12205 0x45, 0xfe, 0x0c, 0x12, 0xaf, 0xff, 0x04, 0x68, 0x54, 0xde, 0x1c, 0x69,
12206 0x03, 0x07, 0x7a, 0xfe,
12207 0x5a, 0xf0, 0xfe, 0x74, 0x18, 0x24, 0xfe, 0x09, 0x00, 0xfe, 0x34, 0x10,
12208 0x07, 0x1b, 0xfe, 0x5a,
12209 0xf0, 0xfe, 0x82, 0x18, 0x24, 0xc3, 0xfe, 0x26, 0x10, 0x07, 0x1a, 0x5d,
12210 0x24, 0x2c, 0xdc, 0x07,
12211 0x0b, 0x5d, 0x24, 0x93, 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x5d, 0x24, 0x4d,
12212 0x9f, 0xad, 0x03, 0x14,
12213 0xfe, 0x09, 0x00, 0x01, 0x33, 0xfe, 0x04, 0xfe, 0x7d, 0x05, 0x7f, 0xf9,
12214 0x03, 0x25, 0xfe, 0xca,
12215 0x18, 0xfe, 0x14, 0xf0, 0x08, 0x65, 0xfe, 0xc6, 0x18, 0x03, 0xff, 0x1a,
12219 static unsigned short _adv_asc3550_size
= sizeof(_adv_asc3550_buf
); /* 0x13AD */
12220 static ADV_DCNT _adv_asc3550_chksum
= 0x04D52DDDUL
; /* Expanded little-endian checksum. */
12222 /* Microcode buffer is kept after initialization for error recovery. */
12223 static unsigned char _adv_asc38C0800_buf
[] = {
12224 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0xfc, 0x00, 0x16, 0x18, 0xe4,
12225 0x01, 0x00, 0x48, 0xe4,
12226 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00, 0xce, 0x19, 0x00, 0xfa, 0xff, 0xff,
12227 0x1c, 0x0f, 0x00, 0xf6,
12228 0x9e, 0xe7, 0xff, 0x00, 0x82, 0xe7, 0x00, 0xea, 0x01, 0xfa, 0x01, 0xe6,
12229 0x09, 0xe7, 0x55, 0xf0,
12230 0x01, 0xf6, 0x03, 0x00, 0x04, 0x00, 0x10, 0x00, 0x1e, 0xf0, 0x85, 0xf0,
12231 0x18, 0xf4, 0x08, 0x00,
12232 0xbc, 0x00, 0x38, 0x54, 0x00, 0xec, 0xd5, 0xf0, 0x82, 0x0d, 0x00, 0xe6,
12233 0x86, 0xf0, 0xb1, 0xf0,
12234 0x98, 0x57, 0x01, 0xfc, 0xb4, 0x00, 0xd4, 0x01, 0x0c, 0x1c, 0x3e, 0x1c,
12235 0x3c, 0x00, 0xbb, 0x00,
12236 0x00, 0x10, 0xba, 0x19, 0x02, 0x80, 0x32, 0xf0, 0x7c, 0x0d, 0x02, 0x13,
12237 0xba, 0x13, 0x18, 0x40,
12238 0x00, 0x57, 0x01, 0xea, 0x02, 0xfc, 0x03, 0xfc, 0x3e, 0x00, 0x6c, 0x01,
12239 0x6e, 0x01, 0x74, 0x01,
12240 0x76, 0x01, 0xb9, 0x54, 0x3e, 0x57, 0x00, 0x80, 0x03, 0xe6, 0xb6, 0x00,
12241 0xc0, 0x00, 0x01, 0x01,
12242 0x3e, 0x01, 0x7a, 0x01, 0xca, 0x08, 0xce, 0x10, 0x16, 0x11, 0x04, 0x12,
12243 0x08, 0x12, 0x02, 0x4a,
12244 0xbb, 0x55, 0x3c, 0x56, 0x03, 0x58, 0x1b, 0x80, 0x30, 0xe4, 0x4b, 0xe4,
12245 0x5d, 0xf0, 0x02, 0xfa,
12246 0x20, 0x00, 0x32, 0x00, 0x40, 0x00, 0x80, 0x00, 0x24, 0x01, 0x3c, 0x01,
12247 0x68, 0x01, 0x6a, 0x01,
12248 0x70, 0x01, 0x72, 0x01, 0x78, 0x01, 0x7c, 0x01, 0x62, 0x0a, 0x86, 0x0d,
12249 0x06, 0x13, 0x4c, 0x1c,
12250 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0, 0x03, 0xf7, 0x0c, 0x00,
12251 0x0f, 0x00, 0x47, 0x00,
12252 0xbe, 0x00, 0x00, 0x01, 0x20, 0x11, 0x5c, 0x16, 0x32, 0x1c, 0x38, 0x1c,
12253 0x4e, 0x1c, 0x10, 0x44,
12254 0x00, 0x4c, 0x04, 0xea, 0x5c, 0xf0, 0xa7, 0xf0, 0x04, 0xf6, 0x03, 0xfa,
12255 0x05, 0x00, 0x34, 0x00,
12256 0x36, 0x00, 0x98, 0x00, 0xcc, 0x00, 0x20, 0x01, 0x4e, 0x01, 0x4a, 0x0b,
12257 0x42, 0x0c, 0x12, 0x0f,
12258 0x0c, 0x10, 0x22, 0x11, 0x0a, 0x12, 0x04, 0x13, 0x30, 0x1c, 0x02, 0x48,
12259 0x00, 0x4e, 0x42, 0x54,
12260 0x44, 0x55, 0xbd, 0x56, 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0,
12261 0x59, 0xf0, 0xb8, 0xf0,
12262 0x4b, 0xf4, 0x06, 0xf7, 0x0e, 0xf7, 0x04, 0xfc, 0x05, 0xfc, 0x06, 0x00,
12263 0x19, 0x00, 0x33, 0x00,
12264 0x9b, 0x00, 0xa4, 0x00, 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00,
12265 0xe7, 0x00, 0xe2, 0x03,
12266 0x08, 0x0f, 0x02, 0x10, 0x04, 0x10, 0x0a, 0x10, 0x0a, 0x13, 0x0c, 0x13,
12267 0x12, 0x13, 0x24, 0x14,
12268 0x34, 0x14, 0x04, 0x16, 0x08, 0x16, 0xa4, 0x17, 0x20, 0x1c, 0x34, 0x1c,
12269 0x36, 0x1c, 0x08, 0x44,
12270 0x38, 0x44, 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46, 0x01, 0x48, 0x68, 0x54,
12271 0x3a, 0x55, 0x83, 0x55,
12272 0xe5, 0x55, 0xb0, 0x57, 0x01, 0x58, 0x83, 0x59, 0x05, 0xe6, 0x0b, 0xf0,
12273 0x0c, 0xf0, 0x04, 0xf8,
12274 0x05, 0xf8, 0x07, 0x00, 0x0a, 0x00, 0x1c, 0x00, 0x1e, 0x00, 0x9e, 0x00,
12275 0xa8, 0x00, 0xaa, 0x00,
12276 0xb9, 0x00, 0xe0, 0x00, 0x22, 0x01, 0x26, 0x01, 0x79, 0x01, 0x7e, 0x01,
12277 0xc4, 0x01, 0xc6, 0x01,
12278 0x80, 0x02, 0x5e, 0x03, 0xee, 0x04, 0x9a, 0x06, 0xf8, 0x07, 0x62, 0x08,
12279 0x68, 0x08, 0x69, 0x08,
12280 0xd6, 0x08, 0xe9, 0x09, 0xfa, 0x0b, 0x2e, 0x0f, 0x12, 0x10, 0x1a, 0x10,
12281 0xed, 0x10, 0xf1, 0x10,
12282 0x2a, 0x11, 0x06, 0x12, 0x0c, 0x12, 0x3e, 0x12, 0x10, 0x13, 0x16, 0x13,
12283 0x1e, 0x13, 0x46, 0x14,
12284 0x76, 0x14, 0x82, 0x14, 0x36, 0x15, 0xca, 0x15, 0x6b, 0x18, 0xbe, 0x18,
12285 0xca, 0x18, 0xe6, 0x19,
12286 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40, 0x0e, 0x47, 0xfe, 0x9c,
12287 0xf0, 0x2b, 0x02, 0xfe,
12288 0xac, 0x0d, 0xff, 0x10, 0x00, 0x00, 0xd7, 0xfe, 0xe8, 0x19, 0x00, 0xd6,
12289 0xfe, 0x84, 0x01, 0xff,
12290 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00,
12291 0x00, 0xfe, 0x57, 0x24,
12292 0x00, 0xfe, 0x4c, 0x00, 0x5b, 0xff, 0x04, 0x00, 0x00, 0x11, 0xff, 0x09,
12293 0x00, 0x00, 0xff, 0x08,
12294 0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10,
12295 0xff, 0xff, 0xff, 0x11,
12296 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00,
12297 0xfe, 0x04, 0xf7, 0xd6,
12298 0x2c, 0x99, 0x0a, 0x01, 0xfe, 0xc2, 0x0f, 0xfe, 0x04, 0xf7, 0xd6, 0x99,
12299 0x0a, 0x42, 0x2c, 0xfe,
12300 0x3d, 0xf0, 0xfe, 0x06, 0x02, 0xfe, 0x20, 0xf0, 0xa7, 0xfe, 0x91, 0xf0,
12301 0xfe, 0xf4, 0x01, 0xfe,
12302 0x90, 0xf0, 0xfe, 0xf4, 0x01, 0xfe, 0x8f, 0xf0, 0xa7, 0x03, 0x5d, 0x4d,
12303 0x02, 0xfe, 0xc8, 0x0d,
12304 0x01, 0xfe, 0x38, 0x0e, 0xfe, 0xdd, 0x12, 0xfe, 0xfc, 0x10, 0xfe, 0x28,
12305 0x1c, 0x03, 0xfe, 0xa6,
12306 0x00, 0xfe, 0xd3, 0x12, 0x41, 0x14, 0xfe, 0xa6, 0x00, 0xc2, 0xfe, 0x48,
12307 0xf0, 0xfe, 0x8a, 0x02,
12308 0xfe, 0x49, 0xf0, 0xfe, 0xa4, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc2, 0x02,
12309 0xfe, 0x46, 0xf0, 0xfe,
12310 0x54, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x5a, 0x02, 0xfe, 0x43, 0xf0, 0xfe,
12311 0x48, 0x02, 0xfe, 0x44,
12312 0xf0, 0xfe, 0x4c, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x50, 0x02, 0x18, 0x0a,
12313 0xaa, 0x18, 0x06, 0x14,
12314 0xa1, 0x02, 0x2b, 0xfe, 0x00, 0x1c, 0xe7, 0xfe, 0x02, 0x1c, 0xe6, 0xfe,
12315 0x1e, 0x1c, 0xfe, 0xe9,
12316 0x10, 0x01, 0xfe, 0x18, 0x18, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc, 0xce,
12317 0x09, 0x70, 0x01, 0xa8,
12318 0x02, 0x2b, 0x15, 0x59, 0x39, 0xa2, 0x01, 0xfe, 0x58, 0x10, 0x09, 0x70,
12319 0x01, 0x87, 0xfe, 0xbd,
12320 0x10, 0x09, 0x70, 0x01, 0x87, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe,
12321 0x58, 0x1c, 0x18, 0x06,
12322 0x14, 0xa1, 0x2c, 0x1c, 0x2b, 0xfe, 0x3d, 0xf0, 0xfe, 0x06, 0x02, 0x23,
12323 0xfe, 0x98, 0x02, 0xfe,
12324 0x5a, 0x1c, 0xf8, 0xfe, 0x14, 0x1c, 0x15, 0xfe, 0x30, 0x00, 0x39, 0xa2,
12325 0x01, 0xfe, 0x48, 0x10,
12326 0x18, 0x06, 0x14, 0xa1, 0x02, 0xd7, 0x22, 0x20, 0x07, 0x11, 0x35, 0xfe,
12327 0x69, 0x10, 0x18, 0x06,
12328 0x14, 0xa1, 0xfe, 0x04, 0xec, 0x20, 0x4f, 0x43, 0x13, 0x20, 0xfe, 0x05,
12329 0xf6, 0xce, 0x01, 0xfe,
12330 0x4a, 0x17, 0x08, 0x54, 0x58, 0x37, 0x12, 0x2f, 0x42, 0x92, 0x01, 0xfe,
12331 0x82, 0x16, 0x02, 0x2b,
12332 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x66, 0x01, 0x73, 0xfe, 0x18, 0x10,
12333 0xfe, 0x41, 0x58, 0x09,
12334 0xa4, 0x01, 0x0e, 0xfe, 0xc8, 0x54, 0x6b, 0xfe, 0x10, 0x03, 0x01, 0xfe,
12335 0x82, 0x16, 0x02, 0x2b,
12336 0x2c, 0x4f, 0xfe, 0x02, 0xe8, 0x2a, 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43,
12337 0xfe, 0x77, 0x57, 0xfe,
12338 0x27, 0xf0, 0xfe, 0xe0, 0x01, 0xfe, 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xa7,
12339 0xfe, 0x40, 0x1c, 0x1c,
12340 0xd9, 0xfe, 0x26, 0xf0, 0xfe, 0x5a, 0x03, 0xfe, 0xa0, 0xf0, 0xfe, 0x48,
12341 0x03, 0xfe, 0x11, 0xf0,
12342 0xa7, 0xfe, 0xef, 0x10, 0xfe, 0x9f, 0xf0, 0xfe, 0x68, 0x03, 0xf9, 0x10,
12343 0xfe, 0x11, 0x00, 0x02,
12344 0x65, 0x2c, 0xfe, 0x48, 0x1c, 0xf9, 0x08, 0x05, 0x1b, 0xfe, 0x18, 0x13,
12345 0x21, 0x22, 0xa3, 0xb7,
12346 0x13, 0xa3, 0x09, 0x46, 0x01, 0x0e, 0xb7, 0x78, 0x01, 0xfe, 0xb4, 0x16,
12347 0x12, 0xd1, 0x1c, 0xd9,
12348 0xfe, 0x01, 0xf0, 0xd9, 0xfe, 0x82, 0xf0, 0xfe, 0x96, 0x03, 0xfa, 0x12,
12349 0xfe, 0xe4, 0x00, 0x27,
12350 0xfe, 0xa8, 0x03, 0x1c, 0x34, 0x1d, 0xfe, 0xb8, 0x03, 0x01, 0x4b, 0xfe,
12351 0x06, 0xf0, 0xfe, 0xc8,
12352 0x03, 0x95, 0x86, 0xfe, 0x0a, 0xf0, 0xfe, 0x8a, 0x06, 0x02, 0x24, 0x03,
12353 0x70, 0x28, 0x17, 0xfe,
12354 0xfa, 0x04, 0x15, 0x6d, 0x01, 0x36, 0x7b, 0xfe, 0x6a, 0x02, 0x02, 0xd8,
12355 0xf9, 0x2c, 0x99, 0x19,
12356 0xfe, 0x67, 0x1b, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x48, 0x1c,
12357 0x74, 0x01, 0xaf, 0x8c,
12358 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x17, 0xda, 0x09, 0xd1, 0x01, 0x0e,
12359 0x8d, 0x51, 0x64, 0x79,
12360 0x2a, 0x03, 0x70, 0x28, 0xfe, 0x10, 0x12, 0x15, 0x6d, 0x01, 0x36, 0x7b,
12361 0xfe, 0x6a, 0x02, 0x02,
12362 0xd8, 0xc7, 0x81, 0xc8, 0x83, 0x1c, 0x24, 0x27, 0xfe, 0x40, 0x04, 0x1d,
12363 0xfe, 0x3c, 0x04, 0x3b,
12364 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x4e, 0x12, 0x2d, 0xff, 0x02,
12365 0x00, 0x10, 0x01, 0x0b,
12366 0x1d, 0xfe, 0xe4, 0x04, 0x2d, 0x01, 0x0b, 0x1d, 0x24, 0x33, 0x31, 0xde,
12367 0xfe, 0x4c, 0x44, 0xfe,
12368 0x4c, 0x12, 0x51, 0xfe, 0x44, 0x48, 0x0f, 0x6f, 0xfe, 0x4c, 0x54, 0x6b,
12369 0xda, 0x4f, 0x79, 0x2a,
12370 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x62, 0x13, 0x08, 0x05, 0x1b,
12371 0xfe, 0x2a, 0x13, 0x32,
12372 0x07, 0x82, 0xfe, 0x52, 0x13, 0xfe, 0x20, 0x10, 0x0f, 0x6f, 0xfe, 0x4c,
12373 0x54, 0x6b, 0xda, 0xfe,
12374 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x40, 0x13, 0x08, 0x05, 0x1b, 0xfe,
12375 0x08, 0x13, 0x32, 0x07,
12376 0x82, 0xfe, 0x30, 0x13, 0x08, 0x05, 0x1b, 0xfe, 0x1c, 0x12, 0x15, 0x9d,
12377 0x08, 0x05, 0x06, 0x4d,
12378 0x15, 0xfe, 0x0d, 0x00, 0x01, 0x36, 0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24,
12379 0x2d, 0x12, 0xfe, 0xe6,
12380 0x00, 0xfe, 0x1c, 0x90, 0xfe, 0x40, 0x5c, 0x04, 0x15, 0x9d, 0x01, 0x36,
12381 0x02, 0x2b, 0xfe, 0x42,
12382 0x5b, 0x99, 0x19, 0xfe, 0x46, 0x59, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57,
12383 0xfe, 0x87, 0x80, 0xfe,
12384 0x31, 0xe4, 0x5b, 0x08, 0x05, 0x0a, 0xfe, 0x84, 0x13, 0xfe, 0x20, 0x80,
12385 0x07, 0x19, 0xfe, 0x7c,
12386 0x12, 0x53, 0x05, 0x06, 0xfe, 0x6c, 0x13, 0x03, 0xfe, 0xa2, 0x00, 0x28,
12387 0x17, 0xfe, 0x90, 0x05,
12388 0xfe, 0x31, 0xe4, 0x5a, 0x53, 0x05, 0x0a, 0xfe, 0x56, 0x13, 0x03, 0xfe,
12389 0xa0, 0x00, 0x28, 0xfe,
12390 0x4e, 0x12, 0x67, 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x48, 0x05, 0x1c,
12391 0x34, 0xfe, 0x89, 0x48,
12392 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x56, 0x05, 0x26, 0xfe, 0xa8, 0x05,
12393 0x12, 0xfe, 0xe3, 0x00,
12394 0x21, 0x53, 0xfe, 0x4a, 0xf0, 0xfe, 0x76, 0x05, 0xfe, 0x49, 0xf0, 0xfe,
12395 0x70, 0x05, 0x88, 0x25,
12396 0xfe, 0x21, 0x00, 0xab, 0x25, 0xfe, 0x22, 0x00, 0xaa, 0x25, 0x58, 0xfe,
12397 0x09, 0x48, 0xff, 0x02,
12398 0x00, 0x10, 0x27, 0xfe, 0x86, 0x05, 0x26, 0xfe, 0xa8, 0x05, 0xfe, 0xe2,
12399 0x08, 0x53, 0x05, 0xcb,
12400 0x4d, 0x01, 0xb0, 0x25, 0x06, 0x13, 0xd3, 0x39, 0xfe, 0x27, 0x01, 0x08,
12401 0x05, 0x1b, 0xfe, 0x22,
12402 0x12, 0x41, 0x01, 0xb2, 0x15, 0x9d, 0x08, 0x05, 0x06, 0x4d, 0x15, 0xfe,
12403 0x0d, 0x00, 0x01, 0x36,
12404 0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24, 0x03, 0xfe, 0x9c, 0x00, 0x28, 0xeb,
12405 0x03, 0x5c, 0x28, 0xfe,
12406 0x36, 0x13, 0x41, 0x01, 0xb2, 0x26, 0xfe, 0x18, 0x06, 0x09, 0x06, 0x53,
12407 0x05, 0x1f, 0xfe, 0x02,
12408 0x12, 0x50, 0x01, 0xfe, 0x9e, 0x15, 0x1d, 0xfe, 0x0e, 0x06, 0x12, 0xa5,
12409 0x01, 0x4b, 0x12, 0xfe,
12410 0xe5, 0x00, 0x03, 0x5c, 0xc1, 0x0c, 0x5c, 0x03, 0xcd, 0x28, 0xfe, 0x62,
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12842 0x17, 0x15, 0x06, 0x39,
12843 0xa0, 0xb4, 0x02, 0x2b, 0xfe, 0x39, 0xf0, 0xfe, 0xfc, 0x17, 0x21, 0x04,
12844 0xfe, 0x7e, 0x18, 0x1e,
12845 0x19, 0x66, 0x0f, 0x0d, 0x04, 0x75, 0x03, 0xd2, 0x1e, 0x06, 0xfe, 0xef,
12846 0x12, 0xfe, 0xe1, 0x10,
12847 0x7c, 0x6f, 0x4f, 0x32, 0x07, 0x2f, 0xfe, 0x3c, 0x13, 0xf1, 0xfe, 0x42,
12848 0x13, 0x42, 0x92, 0x09,
12849 0x48, 0x01, 0x0e, 0xbb, 0xeb, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01,
12850 0xf0, 0xfe, 0x00, 0xcc,
12851 0xbb, 0xfe, 0xf3, 0x13, 0x43, 0x78, 0x07, 0x11, 0xac, 0x09, 0x84, 0x01,
12852 0x0e, 0xfe, 0x80, 0x4c,
12853 0x01, 0x73, 0xfe, 0x16, 0x10, 0x07, 0x82, 0x8b, 0xfe, 0x40, 0x14, 0xfe,
12854 0x24, 0x12, 0xfe, 0x14,
12855 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x1c, 0x18, 0x18, 0x0a, 0x04, 0xfe, 0x9c,
12856 0xe7, 0x0a, 0x10, 0xfe,
12857 0x15, 0x00, 0x64, 0x79, 0x2a, 0x01, 0xe3, 0x18, 0x06, 0x04, 0x42, 0x92,
12858 0x08, 0x54, 0x1b, 0x37,
12859 0x12, 0x2f, 0x01, 0x73, 0x18, 0x06, 0x04, 0xfe, 0x38, 0x90, 0xfe, 0xba,
12860 0x90, 0x3a, 0xce, 0x3b,
12861 0xcf, 0xfe, 0x48, 0x55, 0x35, 0xfe, 0xc9, 0x55, 0x04, 0x22, 0xa3, 0x77,
12862 0x13, 0xa3, 0x04, 0x09,
12863 0xa4, 0x01, 0x0e, 0xfe, 0x41, 0x48, 0x09, 0x46, 0x01, 0x0e, 0xfe, 0x49,
12864 0x44, 0x17, 0xfe, 0xe8,
12865 0x18, 0x77, 0x78, 0x04, 0x09, 0x48, 0x01, 0x0e, 0x07, 0x11, 0x4e, 0x09,
12866 0x5d, 0x01, 0xa8, 0x09,
12867 0x46, 0x01, 0x0e, 0x77, 0x78, 0x04, 0xfe, 0x4e, 0xe4, 0x19, 0x6b, 0xfe,
12868 0x1c, 0x19, 0x03, 0xfe,
12869 0x90, 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10, 0xfe, 0x4e, 0xe4, 0xc9,
12870 0x6b, 0xfe, 0x2e, 0x19,
12871 0x03, 0xfe, 0x92, 0x00, 0xfe, 0x02, 0xe6, 0x1a, 0xe5, 0xfe, 0x4e, 0xe4,
12872 0xfe, 0x0b, 0x00, 0x6b,
12873 0xfe, 0x40, 0x19, 0x03, 0xfe, 0x94, 0x00, 0xfe, 0x02, 0xe6, 0x1f, 0xfe,
12874 0x08, 0x10, 0x03, 0xfe,
12875 0x96, 0x00, 0xfe, 0x02, 0xe6, 0x6d, 0xfe, 0x4e, 0x45, 0xea, 0xba, 0xff,
12876 0x04, 0x68, 0x54, 0xe7,
12877 0x1e, 0x6e, 0xfe, 0x08, 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c, 0xfe,
12878 0x1a, 0xf4, 0xfe, 0x00,
12879 0x04, 0xea, 0xfe, 0x48, 0xf4, 0x19, 0x7a, 0xfe, 0x74, 0x19, 0x0f, 0x19,
12880 0x04, 0x07, 0x7e, 0xfe,
12881 0x5a, 0xf0, 0xfe, 0x84, 0x19, 0x25, 0xfe, 0x09, 0x00, 0xfe, 0x34, 0x10,
12882 0x07, 0x1a, 0xfe, 0x5a,
12883 0xf0, 0xfe, 0x92, 0x19, 0x25, 0xca, 0xfe, 0x26, 0x10, 0x07, 0x19, 0x66,
12884 0x25, 0x6d, 0xe5, 0x07,
12885 0x0a, 0x66, 0x25, 0x9e, 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x66, 0x25, 0x59,
12886 0xa9, 0xb8, 0x04, 0x15,
12887 0xfe, 0x09, 0x00, 0x01, 0x36, 0xfe, 0x04, 0xfe, 0x81, 0x03, 0x83, 0xfe,
12888 0x40, 0x5c, 0x04, 0x1c,
12889 0xf7, 0xfe, 0x14, 0xf0, 0x0b, 0x27, 0xfe, 0xd6, 0x19, 0x1c, 0xf7, 0x7b,
12890 0xf7, 0xfe, 0x82, 0xf0,
12891 0xfe, 0xda, 0x19, 0x04, 0xff, 0xcc, 0x00, 0x00,
12894 static unsigned short _adv_asc38C0800_size
= sizeof(_adv_asc38C0800_buf
); /* 0x14E1 */
12895 static ADV_DCNT _adv_asc38C0800_chksum
= 0x050D3FD8UL
; /* Expanded little-endian checksum. */
12897 /* Microcode buffer is kept after initialization for error recovery. */
12898 static unsigned char _adv_asc38C1600_buf
[] = {
12899 0x00, 0x00, 0x00, 0xf2, 0x00, 0x16, 0x00, 0xfc, 0x00, 0x10, 0x00, 0xf0,
12900 0x18, 0xe4, 0x01, 0x00,
12901 0x04, 0x1e, 0x48, 0xe4, 0x03, 0xf6, 0xf7, 0x13, 0x2e, 0x1e, 0x02, 0x00,
12902 0x07, 0x17, 0xc0, 0x5f,
12903 0x00, 0xfa, 0xff, 0xff, 0x04, 0x00, 0x00, 0xf6, 0x09, 0xe7, 0x82, 0xe7,
12904 0x85, 0xf0, 0x86, 0xf0,
12905 0x4e, 0x10, 0x9e, 0xe7, 0xff, 0x00, 0x55, 0xf0, 0x01, 0xf6, 0x03, 0x00,
12906 0x98, 0x57, 0x01, 0xe6,
12907 0x00, 0xea, 0x00, 0xec, 0x01, 0xfa, 0x18, 0xf4, 0x08, 0x00, 0xf0, 0x1d,
12908 0x38, 0x54, 0x32, 0xf0,
12909 0x10, 0x00, 0xc2, 0x0e, 0x1e, 0xf0, 0xd5, 0xf0, 0xbc, 0x00, 0x4b, 0xe4,
12910 0x00, 0xe6, 0xb1, 0xf0,
12911 0xb4, 0x00, 0x02, 0x13, 0x3e, 0x1c, 0xc8, 0x47, 0x3e, 0x00, 0xd8, 0x01,
12912 0x06, 0x13, 0x0c, 0x1c,
12913 0x5e, 0x1e, 0x00, 0x57, 0xc8, 0x57, 0x01, 0xfc, 0xbc, 0x0e, 0xa2, 0x12,
12914 0xb9, 0x54, 0x00, 0x80,
12915 0x62, 0x0a, 0x5a, 0x12, 0xc8, 0x15, 0x3e, 0x1e, 0x18, 0x40, 0xbd, 0x56,
12916 0x03, 0xe6, 0x01, 0xea,
12917 0x5c, 0xf0, 0x0f, 0x00, 0x20, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12,
12918 0x04, 0x13, 0xbb, 0x55,
12919 0x3c, 0x56, 0x3e, 0x57, 0x03, 0x58, 0x4a, 0xe4, 0x40, 0x00, 0xb6, 0x00,
12920 0xbb, 0x00, 0xc0, 0x00,
12921 0x00, 0x01, 0x01, 0x01, 0x3e, 0x01, 0x58, 0x0a, 0x44, 0x10, 0x0a, 0x12,
12922 0x4c, 0x1c, 0x4e, 0x1c,
12923 0x02, 0x4a, 0x30, 0xe4, 0x05, 0xe6, 0x0c, 0x00, 0x3c, 0x00, 0x80, 0x00,
12924 0x24, 0x01, 0x3c, 0x01,
12925 0x68, 0x01, 0x6a, 0x01, 0x70, 0x01, 0x72, 0x01, 0x74, 0x01, 0x76, 0x01,
12926 0x78, 0x01, 0x7c, 0x01,
12927 0xc6, 0x0e, 0x0c, 0x10, 0xac, 0x12, 0xae, 0x12, 0x16, 0x1a, 0x32, 0x1c,
12928 0x6e, 0x1e, 0x02, 0x48,
12929 0x3a, 0x55, 0xc9, 0x57, 0x02, 0xee, 0x5b, 0xf0, 0x03, 0xf7, 0x06, 0xf7,
12930 0x03, 0xfc, 0x06, 0x00,
12931 0x1e, 0x00, 0xbe, 0x00, 0xe1, 0x00, 0x0c, 0x12, 0x18, 0x1a, 0x70, 0x1a,
12932 0x30, 0x1c, 0x38, 0x1c,
12933 0x10, 0x44, 0x00, 0x4c, 0xb0, 0x57, 0x40, 0x5c, 0x4d, 0xe4, 0x04, 0xea,
12934 0x5d, 0xf0, 0xa7, 0xf0,
12935 0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x09, 0x00, 0x19, 0x00, 0x32, 0x00,
12936 0x33, 0x00, 0x34, 0x00,
12937 0x36, 0x00, 0x98, 0x00, 0x9e, 0x00, 0xcc, 0x00, 0x20, 0x01, 0x4e, 0x01,
12938 0x79, 0x01, 0x3c, 0x09,
12939 0x68, 0x0d, 0x02, 0x10, 0x04, 0x10, 0x3a, 0x10, 0x08, 0x12, 0x0a, 0x13,
12940 0x40, 0x16, 0x50, 0x16,
12941 0x00, 0x17, 0x4a, 0x19, 0x00, 0x4e, 0x00, 0x54, 0x01, 0x58, 0x00, 0xdc,
12942 0x05, 0xf0, 0x09, 0xf0,
12943 0x59, 0xf0, 0xb8, 0xf0, 0x48, 0xf4, 0x0e, 0xf7, 0x0a, 0x00, 0x9b, 0x00,
12944 0x9c, 0x00, 0xa4, 0x00,
12945 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe7, 0x00, 0xf0, 0x03, 0x69, 0x08,
12946 0xe9, 0x09, 0x5c, 0x0c,
12947 0xb6, 0x12, 0xbc, 0x19, 0xd8, 0x1b, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c,
12948 0x42, 0x1d, 0x08, 0x44,
12949 0x38, 0x44, 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46, 0x89, 0x48, 0x68, 0x54,
12950 0x83, 0x55, 0x83, 0x59,
12951 0x31, 0xe4, 0x02, 0xe6, 0x07, 0xf0, 0x08, 0xf0, 0x0b, 0xf0, 0x0c, 0xf0,
12952 0x4b, 0xf4, 0x04, 0xf8,
12953 0x05, 0xf8, 0x02, 0xfa, 0x03, 0xfa, 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00,
12954 0xa8, 0x00, 0xaa, 0x00,
12955 0xb9, 0x00, 0xe0, 0x00, 0xe5, 0x00, 0x22, 0x01, 0x26, 0x01, 0x60, 0x01,
12956 0x7a, 0x01, 0x82, 0x01,
12957 0xc8, 0x01, 0xca, 0x01, 0x86, 0x02, 0x6a, 0x03, 0x18, 0x05, 0xb2, 0x07,
12958 0x68, 0x08, 0x10, 0x0d,
12959 0x06, 0x10, 0x0a, 0x10, 0x0e, 0x10, 0x12, 0x10, 0x60, 0x10, 0xed, 0x10,
12960 0xf3, 0x10, 0x06, 0x12,
12961 0x10, 0x12, 0x1e, 0x12, 0x0c, 0x13, 0x0e, 0x13, 0x10, 0x13, 0xfe, 0x9c,
12962 0xf0, 0x35, 0x05, 0xfe,
12963 0xec, 0x0e, 0xff, 0x10, 0x00, 0x00, 0xe9, 0xfe, 0x34, 0x1f, 0x00, 0xe8,
12964 0xfe, 0x88, 0x01, 0xff,
12965 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00,
12966 0x00, 0xfe, 0x57, 0x24,
12967 0x00, 0xfe, 0x4c, 0x00, 0x65, 0xff, 0x04, 0x00, 0x00, 0x1a, 0xff, 0x09,
12968 0x00, 0x00, 0xff, 0x08,
12969 0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10,
12970 0xff, 0xff, 0xff, 0x13,
12971 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00,
12972 0xfe, 0x04, 0xf7, 0xe8,
12973 0x37, 0x7d, 0x0d, 0x01, 0xfe, 0x4a, 0x11, 0xfe, 0x04, 0xf7, 0xe8, 0x7d,
12974 0x0d, 0x51, 0x37, 0xfe,
12975 0x3d, 0xf0, 0xfe, 0x0c, 0x02, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x91, 0xf0,
12976 0xfe, 0xf8, 0x01, 0xfe,
12977 0x90, 0xf0, 0xfe, 0xf8, 0x01, 0xfe, 0x8f, 0xf0, 0xbc, 0x03, 0x67, 0x4d,
12978 0x05, 0xfe, 0x08, 0x0f,
12979 0x01, 0xfe, 0x78, 0x0f, 0xfe, 0xdd, 0x12, 0x05, 0xfe, 0x0e, 0x03, 0xfe,
12980 0x28, 0x1c, 0x03, 0xfe,
12981 0xa6, 0x00, 0xfe, 0xd1, 0x12, 0x3e, 0x22, 0xfe, 0xa6, 0x00, 0xac, 0xfe,
12982 0x48, 0xf0, 0xfe, 0x90,
12983 0x02, 0xfe, 0x49, 0xf0, 0xfe, 0xaa, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc8,
12984 0x02, 0xfe, 0x46, 0xf0,
12985 0xfe, 0x5a, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x60, 0x02, 0xfe, 0x43, 0xf0,
12986 0xfe, 0x4e, 0x02, 0xfe,
12987 0x44, 0xf0, 0xfe, 0x52, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x56, 0x02, 0x1c,
12988 0x0d, 0xa2, 0x1c, 0x07,
12989 0x22, 0xb7, 0x05, 0x35, 0xfe, 0x00, 0x1c, 0xfe, 0xf1, 0x10, 0xfe, 0x02,
12990 0x1c, 0xf5, 0xfe, 0x1e,
12991 0x1c, 0xfe, 0xe9, 0x10, 0x01, 0x5f, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc,
12992 0xde, 0x0a, 0x81, 0x01,
12993 0xa3, 0x05, 0x35, 0x1f, 0x95, 0x47, 0xb8, 0x01, 0xfe, 0xe4, 0x11, 0x0a,
12994 0x81, 0x01, 0x5c, 0xfe,
12995 0xbd, 0x10, 0x0a, 0x81, 0x01, 0x5c, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c,
12996 0xfe, 0x58, 0x1c, 0x1c,
12997 0x07, 0x22, 0xb7, 0x37, 0x2a, 0x35, 0xfe, 0x3d, 0xf0, 0xfe, 0x0c, 0x02,
12998 0x2b, 0xfe, 0x9e, 0x02,
12999 0xfe, 0x5a, 0x1c, 0xfe, 0x12, 0x1c, 0xfe, 0x14, 0x1c, 0x1f, 0xfe, 0x30,
13000 0x00, 0x47, 0xb8, 0x01,
13001 0xfe, 0xd4, 0x11, 0x1c, 0x07, 0x22, 0xb7, 0x05, 0xe9, 0x21, 0x2c, 0x09,
13002 0x1a, 0x31, 0xfe, 0x69,
13003 0x10, 0x1c, 0x07, 0x22, 0xb7, 0xfe, 0x04, 0xec, 0x2c, 0x60, 0x01, 0xfe,
13004 0x1e, 0x1e, 0x20, 0x2c,
13005 0xfe, 0x05, 0xf6, 0xde, 0x01, 0xfe, 0x62, 0x1b, 0x01, 0x0c, 0x61, 0x4a,
13006 0x44, 0x15, 0x56, 0x51,
13007 0x01, 0xfe, 0x9e, 0x1e, 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x0a, 0x57,
13008 0x01, 0x18, 0x09, 0x00,
13009 0x36, 0x01, 0x85, 0xfe, 0x18, 0x10, 0xfe, 0x41, 0x58, 0x0a, 0xba, 0x01,
13010 0x18, 0xfe, 0xc8, 0x54,
13011 0x7b, 0xfe, 0x1c, 0x03, 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x37, 0x60,
13012 0xfe, 0x02, 0xe8, 0x30,
13013 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43, 0xfe, 0x77, 0x57, 0xfe, 0x27, 0xf0,
13014 0xfe, 0xe4, 0x01, 0xfe,
13015 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x40, 0x1c, 0x2a, 0xeb, 0xfe,
13016 0x26, 0xf0, 0xfe, 0x66,
13017 0x03, 0xfe, 0xa0, 0xf0, 0xfe, 0x54, 0x03, 0xfe, 0x11, 0xf0, 0xbc, 0xfe,
13018 0xef, 0x10, 0xfe, 0x9f,
13019 0xf0, 0xfe, 0x74, 0x03, 0xfe, 0x46, 0x1c, 0x19, 0xfe, 0x11, 0x00, 0x05,
13020 0x70, 0x37, 0xfe, 0x48,
13021 0x1c, 0xfe, 0x46, 0x1c, 0x01, 0x0c, 0x06, 0x28, 0xfe, 0x18, 0x13, 0x26,
13022 0x21, 0xb9, 0xc7, 0x20,
13023 0xb9, 0x0a, 0x57, 0x01, 0x18, 0xc7, 0x89, 0x01, 0xfe, 0xc8, 0x1a, 0x15,
13024 0xe1, 0x2a, 0xeb, 0xfe,
13025 0x01, 0xf0, 0xeb, 0xfe, 0x82, 0xf0, 0xfe, 0xa4, 0x03, 0xfe, 0x9c, 0x32,
13026 0x15, 0xfe, 0xe4, 0x00,
13027 0x2f, 0xfe, 0xb6, 0x03, 0x2a, 0x3c, 0x16, 0xfe, 0xc6, 0x03, 0x01, 0x41,
13028 0xfe, 0x06, 0xf0, 0xfe,
13029 0xd6, 0x03, 0xaf, 0xa0, 0xfe, 0x0a, 0xf0, 0xfe, 0xa2, 0x07, 0x05, 0x29,
13030 0x03, 0x81, 0x1e, 0x1b,
13031 0xfe, 0x24, 0x05, 0x1f, 0x63, 0x01, 0x42, 0x8f, 0xfe, 0x70, 0x02, 0x05,
13032 0xea, 0xfe, 0x46, 0x1c,
13033 0x37, 0x7d, 0x1d, 0xfe, 0x67, 0x1b, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57,
13034 0xfe, 0x48, 0x1c, 0x75,
13035 0x01, 0xa6, 0x86, 0x0a, 0x57, 0x01, 0x18, 0x09, 0x00, 0x1b, 0xec, 0x0a,
13036 0xe1, 0x01, 0x18, 0x77,
13037 0x50, 0x40, 0x8d, 0x30, 0x03, 0x81, 0x1e, 0xf8, 0x1f, 0x63, 0x01, 0x42,
13038 0x8f, 0xfe, 0x70, 0x02,
13039 0x05, 0xea, 0xd7, 0x99, 0xd8, 0x9c, 0x2a, 0x29, 0x2f, 0xfe, 0x4e, 0x04,
13040 0x16, 0xfe, 0x4a, 0x04,
13041 0x7e, 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x54, 0x12, 0x32, 0xff,
13042 0x02, 0x00, 0x10, 0x01,
13043 0x08, 0x16, 0xfe, 0x02, 0x05, 0x32, 0x01, 0x08, 0x16, 0x29, 0x27, 0x25,
13044 0xee, 0xfe, 0x4c, 0x44,
13045 0xfe, 0x58, 0x12, 0x50, 0xfe, 0x44, 0x48, 0x13, 0x34, 0xfe, 0x4c, 0x54,
13046 0x7b, 0xec, 0x60, 0x8d,
13047 0x30, 0x01, 0xfe, 0x4e, 0x1e, 0xfe, 0x48, 0x47, 0xfe, 0x7c, 0x13, 0x01,
13048 0x0c, 0x06, 0x28, 0xfe,
13049 0x32, 0x13, 0x01, 0x43, 0x09, 0x9b, 0xfe, 0x68, 0x13, 0xfe, 0x26, 0x10,
13050 0x13, 0x34, 0xfe, 0x4c,
13051 0x54, 0x7b, 0xec, 0x01, 0xfe, 0x4e, 0x1e, 0xfe, 0x48, 0x47, 0xfe, 0x54,
13052 0x13, 0x01, 0x0c, 0x06,
13053 0x28, 0xa5, 0x01, 0x43, 0x09, 0x9b, 0xfe, 0x40, 0x13, 0x01, 0x0c, 0x06,
13054 0x28, 0xf9, 0x1f, 0x7f,
13055 0x01, 0x0c, 0x06, 0x07, 0x4d, 0x1f, 0xfe, 0x0d, 0x00, 0x01, 0x42, 0x8f,
13056 0xfe, 0xa4, 0x0e, 0x05,
13057 0x29, 0x32, 0x15, 0xfe, 0xe6, 0x00, 0x0f, 0xfe, 0x1c, 0x90, 0x04, 0xfe,
13058 0x9c, 0x93, 0x3a, 0x0b,
13059 0x0e, 0x8b, 0x02, 0x1f, 0x7f, 0x01, 0x42, 0x05, 0x35, 0xfe, 0x42, 0x5b,
13060 0x7d, 0x1d, 0xfe, 0x46,
13061 0x59, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0x0f, 0xfe, 0x87, 0x80, 0x04,
13062 0xfe, 0x87, 0x83, 0xfe,
13063 0xc9, 0x47, 0x0b, 0x0e, 0xd0, 0x65, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x98,
13064 0x13, 0x0f, 0xfe, 0x20,
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13493 0x53, 0x1d, 0xfe, 0x12, 0x13, 0xd6, 0xfe, 0x30, 0x00, 0xb0, 0xfe, 0x80,
13494 0x17, 0x1c, 0x63, 0x13,
13495 0x07, 0xfe, 0x56, 0x10, 0x53, 0x0d, 0xfe, 0x16, 0x13, 0xd6, 0xfe, 0x64,
13496 0x00, 0xb0, 0xfe, 0x80,
13497 0x17, 0x0a, 0xfe, 0x64, 0x00, 0x1c, 0x94, 0x13, 0x07, 0xfe, 0x28, 0x10,
13498 0x53, 0x07, 0xfe, 0x60,
13499 0x13, 0xd6, 0xfe, 0xc8, 0x00, 0xb0, 0xfe, 0x80, 0x17, 0x0a, 0xfe, 0xc8,
13500 0x00, 0x1c, 0x95, 0x13,
13501 0x07, 0x71, 0xd6, 0xfe, 0x90, 0x01, 0x48, 0xfe, 0x8c, 0x17, 0x45, 0xf3,
13502 0xfe, 0x43, 0xf4, 0x96,
13503 0xfe, 0x56, 0xf0, 0xfe, 0x9e, 0x17, 0xfe, 0x04, 0xf4, 0x58, 0xfe, 0x43,
13504 0xf4, 0x94, 0xf6, 0x8b,
13505 0x01, 0xfe, 0x24, 0x16, 0x23, 0x3f, 0xfc, 0xa8, 0x8c, 0x49, 0x48, 0xfe,
13506 0xda, 0x17, 0x62, 0x49,
13507 0xfe, 0x1c, 0x10, 0xa8, 0x8c, 0x80, 0x48, 0xfe, 0xda, 0x17, 0x62, 0x80,
13508 0x71, 0x50, 0x26, 0xfe,
13509 0x4d, 0xf4, 0x00, 0xf7, 0x45, 0x13, 0x07, 0xfe, 0xb4, 0x56, 0xfe, 0xc3,
13510 0x58, 0x02, 0x50, 0x13,
13511 0x0d, 0x02, 0x50, 0x3e, 0x78, 0x4f, 0x45, 0x01, 0x08, 0x16, 0xa9, 0x27,
13512 0x25, 0xbe, 0xfe, 0x03,
13513 0xea, 0xfe, 0x7e, 0x01, 0x01, 0x08, 0x16, 0xa9, 0x27, 0x25, 0xfe, 0xe9,
13514 0x0a, 0x01, 0x08, 0x16,
13515 0xa9, 0x27, 0x25, 0xfe, 0xe9, 0x0a, 0xfe, 0x05, 0xea, 0xfe, 0x7f, 0x01,
13516 0x01, 0x08, 0x16, 0xa9,
13517 0x27, 0x25, 0xfe, 0x69, 0x09, 0xfe, 0x02, 0xea, 0xfe, 0x80, 0x01, 0x01,
13518 0x08, 0x16, 0xa9, 0x27,
13519 0x25, 0xfe, 0xe8, 0x08, 0x47, 0xfe, 0x81, 0x01, 0x03, 0xb6, 0x1e, 0x83,
13520 0x01, 0x38, 0x06, 0x24,
13521 0x31, 0xa2, 0x78, 0xf2, 0x53, 0x07, 0x36, 0xfe, 0x34, 0xf4, 0x3f, 0xa1,
13522 0x78, 0x03, 0x9a, 0x1e,
13523 0x83, 0x01, 0x38, 0x06, 0x12, 0x31, 0xf0, 0x4f, 0x45, 0xfe, 0x90, 0x10,
13524 0xfe, 0x40, 0x5a, 0x23,
13525 0x3f, 0xfb, 0x8c, 0x49, 0x48, 0xfe, 0xaa, 0x18, 0x62, 0x49, 0x71, 0x8c,
13526 0x80, 0x48, 0xfe, 0xaa,
13527 0x18, 0x62, 0x80, 0xfe, 0xb4, 0x56, 0xfe, 0x40, 0x5d, 0x01, 0xc6, 0x01,
13528 0xfe, 0xac, 0x1d, 0xfe,
13529 0x02, 0x17, 0xfe, 0xc8, 0x45, 0xfe, 0x5a, 0xf0, 0xfe, 0xc0, 0x18, 0xfe,
13530 0x43, 0x48, 0x2d, 0x93,
13531 0x36, 0xfe, 0x34, 0xf4, 0xfe, 0x00, 0x11, 0xfe, 0x40, 0x10, 0x2d, 0xb4,
13532 0x36, 0xfe, 0x34, 0xf4,
13533 0x04, 0xfe, 0x34, 0x10, 0x2d, 0xfe, 0x0b, 0x00, 0x36, 0x46, 0x63, 0xfe,
13534 0x28, 0x10, 0xfe, 0xc0,
13535 0x49, 0xff, 0x02, 0x00, 0x54, 0xb2, 0xfe, 0x90, 0x01, 0x48, 0xfe, 0xfa,
13536 0x18, 0x45, 0xfe, 0x1c,
13537 0xf4, 0x3f, 0xf3, 0xfe, 0x40, 0xf4, 0x96, 0xfe, 0x56, 0xf0, 0xfe, 0x0c,
13538 0x19, 0xfe, 0x04, 0xf4,
13539 0x58, 0xfe, 0x40, 0xf4, 0x94, 0xf6, 0x3e, 0x2d, 0x93, 0x4e, 0xd0, 0x0d,
13540 0x21, 0xfe, 0x7f, 0x01,
13541 0xfe, 0xc8, 0x46, 0xfe, 0x24, 0x13, 0x8c, 0x00, 0x5d, 0x26, 0x21, 0xfe,
13542 0x7e, 0x01, 0xfe, 0xc8,
13543 0x45, 0xfe, 0x14, 0x13, 0x21, 0xfe, 0x80, 0x01, 0xfe, 0x48, 0x45, 0xfa,
13544 0x21, 0xfe, 0x81, 0x01,
13545 0xfe, 0xc8, 0x44, 0x4e, 0x26, 0x02, 0x13, 0x07, 0x02, 0x78, 0x45, 0x50,
13546 0x13, 0x0d, 0x02, 0x14,
13547 0x07, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x14, 0x0d, 0x01, 0x08, 0x17,
13548 0xfe, 0x82, 0x19, 0x14,
13549 0x1d, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x5f, 0xfe, 0x89, 0x49, 0x01,
13550 0x08, 0x02, 0x14, 0x07,
13551 0x01, 0x08, 0x17, 0xc1, 0x14, 0x1d, 0x01, 0x08, 0x17, 0xc1, 0x14, 0x07,
13552 0x01, 0x08, 0x17, 0xc1,
13553 0xfe, 0x89, 0x49, 0x01, 0x08, 0x17, 0xc1, 0x5f, 0xfe, 0x89, 0x4a, 0x01,
13554 0x08, 0x02, 0x50, 0x02,
13555 0x14, 0x07, 0x01, 0x08, 0x17, 0x74, 0x14, 0x7f, 0x01, 0x08, 0x17, 0x74,
13556 0x14, 0x12, 0x01, 0x08,
13557 0x17, 0x74, 0xfe, 0x89, 0x49, 0x01, 0x08, 0x17, 0x74, 0x14, 0x00, 0x01,
13558 0x08, 0x17, 0x74, 0xfe,
13559 0x89, 0x4a, 0x01, 0x08, 0x17, 0x74, 0xfe, 0x09, 0x49, 0x01, 0x08, 0x17,
13560 0x74, 0x5f, 0xcc, 0x01,
13561 0x08, 0x02, 0x21, 0xe4, 0x09, 0x07, 0xfe, 0x4c, 0x13, 0xc8, 0x20, 0xe4,
13562 0xfe, 0x49, 0xf4, 0x00,
13563 0x4d, 0x5f, 0xa1, 0x5e, 0xfe, 0x01, 0xec, 0xfe, 0x27, 0x01, 0xcc, 0xff,
13564 0x02, 0x00, 0x10, 0x2f,
13565 0xfe, 0x3e, 0x1a, 0x01, 0x43, 0x09, 0xfe, 0xe3, 0x00, 0xfe, 0x22, 0x13,
13566 0x16, 0xfe, 0x64, 0x1a,
13567 0x26, 0x20, 0x9e, 0x01, 0x41, 0x21, 0x9e, 0x09, 0x07, 0x5d, 0x01, 0x0c,
13568 0x61, 0x07, 0x44, 0x02,
13569 0x0a, 0x5a, 0x01, 0x18, 0xfe, 0x00, 0x40, 0xaa, 0x09, 0x1a, 0xfe, 0x12,
13570 0x13, 0x0a, 0x9d, 0x01,
13571 0x18, 0xaa, 0x0a, 0x67, 0x01, 0xa3, 0x02, 0x0a, 0x9d, 0x01, 0x18, 0xaa,
13572 0xfe, 0x80, 0xe7, 0x1a,
13573 0x09, 0x1a, 0x5d, 0xfe, 0x45, 0x58, 0x01, 0xfe, 0xb2, 0x16, 0xaa, 0x02,
13574 0x0a, 0x5a, 0x01, 0x18,
13575 0xaa, 0x0a, 0x67, 0x01, 0xa3, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x01, 0xfe,
13576 0x7e, 0x1e, 0xfe, 0x80,
13577 0x4c, 0xfe, 0x49, 0xe4, 0x1a, 0xfe, 0x12, 0x13, 0x0a, 0x9d, 0x01, 0x18,
13578 0xfe, 0x80, 0x4c, 0x0a,
13579 0x67, 0x01, 0x5c, 0x02, 0x1c, 0x1a, 0x87, 0x7c, 0xe5, 0xfe, 0x18, 0xdf,
13580 0xfe, 0x19, 0xde, 0xfe,
13581 0x24, 0x1c, 0xfe, 0x1d, 0xf7, 0x28, 0xb1, 0xfe, 0x04, 0x1b, 0x01, 0xfe,
13582 0x2a, 0x1c, 0xfa, 0xb3,
13583 0x28, 0x7c, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x02, 0xc9, 0x2b, 0xfe,
13584 0xf4, 0x1a, 0xfe, 0xfa,
13585 0x10, 0x1c, 0x1a, 0x87, 0x03, 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x24,
13586 0xfe, 0x18, 0x58, 0x03,
13587 0xfe, 0x66, 0x01, 0xfe, 0x19, 0x58, 0xb3, 0x24, 0x01, 0xfe, 0x0e, 0x1f,
13588 0xfe, 0x30, 0xf4, 0x07,
13589 0xfe, 0x3c, 0x50, 0x7c, 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, 0xfe, 0x1c,
13590 0xf7, 0x24, 0xb1, 0xfe,
13591 0x50, 0x1b, 0xfe, 0xd4, 0x14, 0x31, 0x02, 0xc9, 0x2b, 0xfe, 0x26, 0x1b,
13592 0xfe, 0xba, 0x10, 0x1c,
13593 0x1a, 0x87, 0xfe, 0x83, 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe,
13594 0x1d, 0xf7, 0x54, 0xb1,
13595 0xfe, 0x72, 0x1b, 0xfe, 0xb2, 0x14, 0xfc, 0xb3, 0x54, 0x7c, 0x12, 0xfe,
13596 0xaf, 0x19, 0xfe, 0x98,
13597 0xe7, 0x00, 0x02, 0xc9, 0x2b, 0xfe, 0x66, 0x1b, 0xfe, 0x8a, 0x10, 0x1c,
13598 0x1a, 0x87, 0x8b, 0x0f,
13599 0xfe, 0x30, 0x90, 0x04, 0xfe, 0xb0, 0x93, 0x3a, 0x0b, 0xfe, 0x18, 0x58,
13600 0xfe, 0x32, 0x90, 0x04,
13601 0xfe, 0xb2, 0x93, 0x3a, 0x0b, 0xfe, 0x19, 0x58, 0x0e, 0xa8, 0xb3, 0x4a,
13602 0x7c, 0x12, 0xfe, 0x0f,
13603 0x79, 0xfe, 0x1c, 0xf7, 0x4a, 0xb1, 0xfe, 0xc6, 0x1b, 0xfe, 0x5e, 0x14,
13604 0x31, 0x02, 0xc9, 0x2b,
13605 0xfe, 0x96, 0x1b, 0x5c, 0xfe, 0x02, 0xf6, 0x1a, 0x87, 0xfe, 0x18, 0xfe,
13606 0x6a, 0xfe, 0x19, 0xfe,
13607 0x6b, 0x01, 0xfe, 0x1e, 0x1f, 0xfe, 0x1d, 0xf7, 0x65, 0xb1, 0xfe, 0xee,
13608 0x1b, 0xfe, 0x36, 0x14,
13609 0xfe, 0x1c, 0x13, 0xb3, 0x65, 0x3e, 0xfe, 0x83, 0x58, 0xfe, 0xaf, 0x19,
13610 0xfe, 0x80, 0xe7, 0x1a,
13611 0xfe, 0x81, 0xe7, 0x1a, 0x15, 0xfe, 0xdd, 0x00, 0x7a, 0x30, 0x02, 0x7a,
13612 0x30, 0xfe, 0x12, 0x45,
13613 0x2b, 0xfe, 0xdc, 0x1b, 0x1f, 0x07, 0x47, 0xb5, 0xc3, 0x05, 0x35, 0xfe,
13614 0x39, 0xf0, 0x75, 0x26,
13615 0x02, 0xfe, 0x7e, 0x18, 0x23, 0x1d, 0x36, 0x13, 0x11, 0x02, 0x87, 0x03,
13616 0xe3, 0x23, 0x07, 0xfe,
13617 0xef, 0x12, 0xfe, 0xe1, 0x10, 0x90, 0x34, 0x60, 0xfe, 0x02, 0x80, 0x09,
13618 0x56, 0xfe, 0x3c, 0x13,
13619 0xfe, 0x82, 0x14, 0xfe, 0x42, 0x13, 0x51, 0xfe, 0x06, 0x83, 0x0a, 0x5a,
13620 0x01, 0x18, 0xcb, 0xfe,
13621 0x3e, 0x12, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01, 0xfe, 0xb2, 0x16,
13622 0xfe, 0x00, 0xcc, 0xcb,
13623 0xfe, 0xf3, 0x13, 0x3f, 0x89, 0x09, 0x1a, 0xa5, 0x0a, 0x9d, 0x01, 0x18,
13624 0xfe, 0x80, 0x4c, 0x01,
13625 0x85, 0xfe, 0x16, 0x10, 0x09, 0x9b, 0x4e, 0xfe, 0x40, 0x14, 0xfe, 0x24,
13626 0x12, 0xfe, 0x14, 0x56,
13627 0xfe, 0xd6, 0xf0, 0xfe, 0x52, 0x1c, 0x1c, 0x0d, 0x02, 0xfe, 0x9c, 0xe7,
13628 0x0d, 0x19, 0xfe, 0x15,
13629 0x00, 0x40, 0x8d, 0x30, 0x01, 0xf4, 0x1c, 0x07, 0x02, 0x51, 0xfe, 0x06,
13630 0x83, 0xfe, 0x18, 0x80,
13631 0x61, 0x28, 0x44, 0x15, 0x56, 0x01, 0x85, 0x1c, 0x07, 0x02, 0xfe, 0x38,
13632 0x90, 0xfe, 0xba, 0x90,
13633 0x91, 0xde, 0x7e, 0xdf, 0xfe, 0x48, 0x55, 0x31, 0xfe, 0xc9, 0x55, 0x02,
13634 0x21, 0xb9, 0x88, 0x20,
13635 0xb9, 0x02, 0x0a, 0xba, 0x01, 0x18, 0xfe, 0x41, 0x48, 0x0a, 0x57, 0x01,
13636 0x18, 0xfe, 0x49, 0x44,
13637 0x1b, 0xfe, 0x1e, 0x1d, 0x88, 0x89, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x09,
13638 0x1a, 0xa4, 0x0a, 0x67,
13639 0x01, 0xa3, 0x0a, 0x57, 0x01, 0x18, 0x88, 0x89, 0x02, 0xfe, 0x4e, 0xe4,
13640 0x1d, 0x7b, 0xfe, 0x52,
13641 0x1d, 0x03, 0xfe, 0x90, 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10, 0xfe,
13642 0x4e, 0xe4, 0xdd, 0x7b,
13643 0xfe, 0x64, 0x1d, 0x03, 0xfe, 0x92, 0x00, 0xd1, 0x12, 0xfe, 0x1a, 0x10,
13644 0xfe, 0x4e, 0xe4, 0xfe,
13645 0x0b, 0x00, 0x7b, 0xfe, 0x76, 0x1d, 0x03, 0xfe, 0x94, 0x00, 0xd1, 0x24,
13646 0xfe, 0x08, 0x10, 0x03,
13647 0xfe, 0x96, 0x00, 0xd1, 0x63, 0xfe, 0x4e, 0x45, 0x83, 0xca, 0xff, 0x04,
13648 0x68, 0x54, 0xfe, 0xf1,
13649 0x10, 0x23, 0x49, 0xfe, 0x08, 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c,
13650 0xfe, 0x1a, 0xf4, 0xfe,
13651 0x00, 0x04, 0x83, 0xb2, 0x1d, 0x48, 0xfe, 0xaa, 0x1d, 0x13, 0x1d, 0x02,
13652 0x09, 0x92, 0xfe, 0x5a,
13653 0xf0, 0xfe, 0xba, 0x1d, 0x2e, 0x93, 0xfe, 0x34, 0x10, 0x09, 0x12, 0xfe,
13654 0x5a, 0xf0, 0xfe, 0xc8,
13655 0x1d, 0x2e, 0xb4, 0xfe, 0x26, 0x10, 0x09, 0x1d, 0x36, 0x2e, 0x63, 0xfe,
13656 0x1a, 0x10, 0x09, 0x0d,
13657 0x36, 0x2e, 0x94, 0xf2, 0x09, 0x07, 0x36, 0x2e, 0x95, 0xa1, 0xc8, 0x02,
13658 0x1f, 0x93, 0x01, 0x42,
13659 0xfe, 0x04, 0xfe, 0x99, 0x03, 0x9c, 0x8b, 0x02, 0x2a, 0xfe, 0x1c, 0x1e,
13660 0xfe, 0x14, 0xf0, 0x08,
13661 0x2f, 0xfe, 0x0c, 0x1e, 0x2a, 0xfe, 0x1c, 0x1e, 0x8f, 0xfe, 0x1c, 0x1e,
13662 0xfe, 0x82, 0xf0, 0xfe,
13663 0x10, 0x1e, 0x02, 0x0f, 0x3f, 0x04, 0xfe, 0x80, 0x83, 0x33, 0x0b, 0x0e,
13664 0x02, 0x0f, 0xfe, 0x18,
13665 0x80, 0x04, 0xfe, 0x98, 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x02,
13666 0x80, 0x04, 0xfe, 0x82,
13667 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06, 0x80, 0x04, 0xfe, 0x86,
13668 0x83, 0x33, 0x0b, 0x0e,
13669 0x02, 0x0f, 0xfe, 0x1b, 0x80, 0x04, 0xfe, 0x9b, 0x83, 0x33, 0x0b, 0x0e,
13670 0x02, 0x0f, 0xfe, 0x04,
13671 0x80, 0x04, 0xfe, 0x84, 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x80,
13672 0x80, 0x04, 0xfe, 0x80,
13673 0x83, 0xfe, 0xc9, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x19, 0x81, 0x04,
13674 0xfe, 0x99, 0x83, 0xfe,
13675 0xca, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06, 0x83, 0x04, 0xfe, 0x86,
13676 0x83, 0xfe, 0xce, 0x47,
13677 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x2c, 0x90, 0x04, 0xfe, 0xac, 0x93, 0x3a,
13678 0x0b, 0x0e, 0x02, 0x0f,
13679 0xfe, 0xae, 0x90, 0x04, 0xfe, 0xae, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f,
13680 0xfe, 0x08, 0x90, 0x04,
13681 0xfe, 0x88, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x8a, 0x90, 0x04,
13682 0xfe, 0x8a, 0x93, 0x79,
13683 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x0c, 0x90, 0x04, 0xfe, 0x8c, 0x93, 0x3a,
13684 0x0b, 0x0e, 0x02, 0x0f,
13685 0xfe, 0x8e, 0x90, 0x04, 0xfe, 0x8e, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f,
13686 0xfe, 0x3c, 0x90, 0x04,
13687 0xfe, 0xbc, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x8b, 0x0f, 0xfe, 0x03, 0x80,
13688 0x04, 0xfe, 0x83, 0x83,
13689 0x33, 0x0b, 0x77, 0x0e, 0xa8, 0x02, 0xff, 0x66, 0x00, 0x00,
13692 static unsigned short _adv_asc38C1600_size
= sizeof(_adv_asc38C1600_buf
); /* 0x1673 */
13693 static ADV_DCNT _adv_asc38C1600_chksum
= 0x0604EF77UL
; /* Expanded little-endian checksum. */
13697 * EEPROM Configuration.
13699 * All drivers should use this structure to set the default EEPROM
13700 * configuration. The BIOS now uses this structure when it is built.
13701 * Additional structure information can be found in a_condor.h where
13702 * the structure is defined.
13704 * The *_Field_IsChar structs are needed to correct for endianness.
13705 * These values are read from the board 16 bits at a time directly
13706 * into the structs. Because some fields are char, the values will be
13707 * in the wrong order. The *_Field_IsChar tells when to flip the
13708 * bytes. Data read and written to PCI memory is automatically swapped
13709 * on big-endian platforms so char fields read as words are actually being
13710 * unswapped on big-endian platforms.
13712 static ADVEEP_3550_CONFIG Default_3550_EEPROM_Config __devinitdata
= {
13713 ADV_EEPROM_BIOS_ENABLE
, /* cfg_lsw */
13714 0x0000, /* cfg_msw */
13715 0xFFFF, /* disc_enable */
13716 0xFFFF, /* wdtr_able */
13717 0xFFFF, /* sdtr_able */
13718 0xFFFF, /* start_motor */
13719 0xFFFF, /* tagqng_able */
13720 0xFFFF, /* bios_scan */
13721 0, /* scam_tolerant */
13722 7, /* adapter_scsi_id */
13723 0, /* bios_boot_delay */
13724 3, /* scsi_reset_delay */
13725 0, /* bios_id_lun */
13726 0, /* termination */
13728 0xFFE7, /* bios_ctrl */
13729 0xFFFF, /* ultra_able */
13731 ASC_DEF_MAX_HOST_QNG
, /* max_host_qng */
13732 ASC_DEF_MAX_DVC_QNG
, /* max_dvc_qng */
13735 0, /* serial_number_word1 */
13736 0, /* serial_number_word2 */
13737 0, /* serial_number_word3 */
13739 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
13740 , /* oem_name[16] */
13741 0, /* dvc_err_code */
13742 0, /* adv_err_code */
13743 0, /* adv_err_addr */
13744 0, /* saved_dvc_err_code */
13745 0, /* saved_adv_err_code */
13746 0, /* saved_adv_err_addr */
13750 static ADVEEP_3550_CONFIG ADVEEP_3550_Config_Field_IsChar __devinitdata
= {
13753 0, /* -disc_enable */
13756 0, /* start_motor */
13757 0, /* tagqng_able */
13759 0, /* scam_tolerant */
13760 1, /* adapter_scsi_id */
13761 1, /* bios_boot_delay */
13762 1, /* scsi_reset_delay */
13763 1, /* bios_id_lun */
13764 1, /* termination */
13767 0, /* ultra_able */
13769 1, /* max_host_qng */
13770 1, /* max_dvc_qng */
13773 0, /* serial_number_word1 */
13774 0, /* serial_number_word2 */
13775 0, /* serial_number_word3 */
13777 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
13778 , /* oem_name[16] */
13779 0, /* dvc_err_code */
13780 0, /* adv_err_code */
13781 0, /* adv_err_addr */
13782 0, /* saved_dvc_err_code */
13783 0, /* saved_adv_err_code */
13784 0, /* saved_adv_err_addr */
13788 static ADVEEP_38C0800_CONFIG Default_38C0800_EEPROM_Config __devinitdata
= {
13789 ADV_EEPROM_BIOS_ENABLE
, /* 00 cfg_lsw */
13790 0x0000, /* 01 cfg_msw */
13791 0xFFFF, /* 02 disc_enable */
13792 0xFFFF, /* 03 wdtr_able */
13793 0x4444, /* 04 sdtr_speed1 */
13794 0xFFFF, /* 05 start_motor */
13795 0xFFFF, /* 06 tagqng_able */
13796 0xFFFF, /* 07 bios_scan */
13797 0, /* 08 scam_tolerant */
13798 7, /* 09 adapter_scsi_id */
13799 0, /* bios_boot_delay */
13800 3, /* 10 scsi_reset_delay */
13801 0, /* bios_id_lun */
13802 0, /* 11 termination_se */
13803 0, /* termination_lvd */
13804 0xFFE7, /* 12 bios_ctrl */
13805 0x4444, /* 13 sdtr_speed2 */
13806 0x4444, /* 14 sdtr_speed3 */
13807 ASC_DEF_MAX_HOST_QNG
, /* 15 max_host_qng */
13808 ASC_DEF_MAX_DVC_QNG
, /* max_dvc_qng */
13809 0, /* 16 dvc_cntl */
13810 0x4444, /* 17 sdtr_speed4 */
13811 0, /* 18 serial_number_word1 */
13812 0, /* 19 serial_number_word2 */
13813 0, /* 20 serial_number_word3 */
13814 0, /* 21 check_sum */
13815 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
13816 , /* 22-29 oem_name[16] */
13817 0, /* 30 dvc_err_code */
13818 0, /* 31 adv_err_code */
13819 0, /* 32 adv_err_addr */
13820 0, /* 33 saved_dvc_err_code */
13821 0, /* 34 saved_adv_err_code */
13822 0, /* 35 saved_adv_err_addr */
13823 0, /* 36 reserved */
13824 0, /* 37 reserved */
13825 0, /* 38 reserved */
13826 0, /* 39 reserved */
13827 0, /* 40 reserved */
13828 0, /* 41 reserved */
13829 0, /* 42 reserved */
13830 0, /* 43 reserved */
13831 0, /* 44 reserved */
13832 0, /* 45 reserved */
13833 0, /* 46 reserved */
13834 0, /* 47 reserved */
13835 0, /* 48 reserved */
13836 0, /* 49 reserved */
13837 0, /* 50 reserved */
13838 0, /* 51 reserved */
13839 0, /* 52 reserved */
13840 0, /* 53 reserved */
13841 0, /* 54 reserved */
13842 0, /* 55 reserved */
13843 0, /* 56 cisptr_lsw */
13844 0, /* 57 cisprt_msw */
13845 PCI_VENDOR_ID_ASP
, /* 58 subsysvid */
13846 PCI_DEVICE_ID_38C0800_REV1
, /* 59 subsysid */
13847 0, /* 60 reserved */
13848 0, /* 61 reserved */
13849 0, /* 62 reserved */
13850 0 /* 63 reserved */
13853 static ADVEEP_38C0800_CONFIG ADVEEP_38C0800_Config_Field_IsChar __devinitdata
= {
13854 0, /* 00 cfg_lsw */
13855 0, /* 01 cfg_msw */
13856 0, /* 02 disc_enable */
13857 0, /* 03 wdtr_able */
13858 0, /* 04 sdtr_speed1 */
13859 0, /* 05 start_motor */
13860 0, /* 06 tagqng_able */
13861 0, /* 07 bios_scan */
13862 0, /* 08 scam_tolerant */
13863 1, /* 09 adapter_scsi_id */
13864 1, /* bios_boot_delay */
13865 1, /* 10 scsi_reset_delay */
13866 1, /* bios_id_lun */
13867 1, /* 11 termination_se */
13868 1, /* termination_lvd */
13869 0, /* 12 bios_ctrl */
13870 0, /* 13 sdtr_speed2 */
13871 0, /* 14 sdtr_speed3 */
13872 1, /* 15 max_host_qng */
13873 1, /* max_dvc_qng */
13874 0, /* 16 dvc_cntl */
13875 0, /* 17 sdtr_speed4 */
13876 0, /* 18 serial_number_word1 */
13877 0, /* 19 serial_number_word2 */
13878 0, /* 20 serial_number_word3 */
13879 0, /* 21 check_sum */
13880 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
13881 , /* 22-29 oem_name[16] */
13882 0, /* 30 dvc_err_code */
13883 0, /* 31 adv_err_code */
13884 0, /* 32 adv_err_addr */
13885 0, /* 33 saved_dvc_err_code */
13886 0, /* 34 saved_adv_err_code */
13887 0, /* 35 saved_adv_err_addr */
13888 0, /* 36 reserved */
13889 0, /* 37 reserved */
13890 0, /* 38 reserved */
13891 0, /* 39 reserved */
13892 0, /* 40 reserved */
13893 0, /* 41 reserved */
13894 0, /* 42 reserved */
13895 0, /* 43 reserved */
13896 0, /* 44 reserved */
13897 0, /* 45 reserved */
13898 0, /* 46 reserved */
13899 0, /* 47 reserved */
13900 0, /* 48 reserved */
13901 0, /* 49 reserved */
13902 0, /* 50 reserved */
13903 0, /* 51 reserved */
13904 0, /* 52 reserved */
13905 0, /* 53 reserved */
13906 0, /* 54 reserved */
13907 0, /* 55 reserved */
13908 0, /* 56 cisptr_lsw */
13909 0, /* 57 cisprt_msw */
13910 0, /* 58 subsysvid */
13911 0, /* 59 subsysid */
13912 0, /* 60 reserved */
13913 0, /* 61 reserved */
13914 0, /* 62 reserved */
13915 0 /* 63 reserved */
13918 static ADVEEP_38C1600_CONFIG Default_38C1600_EEPROM_Config __devinitdata
= {
13919 ADV_EEPROM_BIOS_ENABLE
, /* 00 cfg_lsw */
13920 0x0000, /* 01 cfg_msw */
13921 0xFFFF, /* 02 disc_enable */
13922 0xFFFF, /* 03 wdtr_able */
13923 0x5555, /* 04 sdtr_speed1 */
13924 0xFFFF, /* 05 start_motor */
13925 0xFFFF, /* 06 tagqng_able */
13926 0xFFFF, /* 07 bios_scan */
13927 0, /* 08 scam_tolerant */
13928 7, /* 09 adapter_scsi_id */
13929 0, /* bios_boot_delay */
13930 3, /* 10 scsi_reset_delay */
13931 0, /* bios_id_lun */
13932 0, /* 11 termination_se */
13933 0, /* termination_lvd */
13934 0xFFE7, /* 12 bios_ctrl */
13935 0x5555, /* 13 sdtr_speed2 */
13936 0x5555, /* 14 sdtr_speed3 */
13937 ASC_DEF_MAX_HOST_QNG
, /* 15 max_host_qng */
13938 ASC_DEF_MAX_DVC_QNG
, /* max_dvc_qng */
13939 0, /* 16 dvc_cntl */
13940 0x5555, /* 17 sdtr_speed4 */
13941 0, /* 18 serial_number_word1 */
13942 0, /* 19 serial_number_word2 */
13943 0, /* 20 serial_number_word3 */
13944 0, /* 21 check_sum */
13945 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
13946 , /* 22-29 oem_name[16] */
13947 0, /* 30 dvc_err_code */
13948 0, /* 31 adv_err_code */
13949 0, /* 32 adv_err_addr */
13950 0, /* 33 saved_dvc_err_code */
13951 0, /* 34 saved_adv_err_code */
13952 0, /* 35 saved_adv_err_addr */
13953 0, /* 36 reserved */
13954 0, /* 37 reserved */
13955 0, /* 38 reserved */
13956 0, /* 39 reserved */
13957 0, /* 40 reserved */
13958 0, /* 41 reserved */
13959 0, /* 42 reserved */
13960 0, /* 43 reserved */
13961 0, /* 44 reserved */
13962 0, /* 45 reserved */
13963 0, /* 46 reserved */
13964 0, /* 47 reserved */
13965 0, /* 48 reserved */
13966 0, /* 49 reserved */
13967 0, /* 50 reserved */
13968 0, /* 51 reserved */
13969 0, /* 52 reserved */
13970 0, /* 53 reserved */
13971 0, /* 54 reserved */
13972 0, /* 55 reserved */
13973 0, /* 56 cisptr_lsw */
13974 0, /* 57 cisprt_msw */
13975 PCI_VENDOR_ID_ASP
, /* 58 subsysvid */
13976 PCI_DEVICE_ID_38C1600_REV1
, /* 59 subsysid */
13977 0, /* 60 reserved */
13978 0, /* 61 reserved */
13979 0, /* 62 reserved */
13980 0 /* 63 reserved */
13983 static ADVEEP_38C1600_CONFIG ADVEEP_38C1600_Config_Field_IsChar __devinitdata
= {
13984 0, /* 00 cfg_lsw */
13985 0, /* 01 cfg_msw */
13986 0, /* 02 disc_enable */
13987 0, /* 03 wdtr_able */
13988 0, /* 04 sdtr_speed1 */
13989 0, /* 05 start_motor */
13990 0, /* 06 tagqng_able */
13991 0, /* 07 bios_scan */
13992 0, /* 08 scam_tolerant */
13993 1, /* 09 adapter_scsi_id */
13994 1, /* bios_boot_delay */
13995 1, /* 10 scsi_reset_delay */
13996 1, /* bios_id_lun */
13997 1, /* 11 termination_se */
13998 1, /* termination_lvd */
13999 0, /* 12 bios_ctrl */
14000 0, /* 13 sdtr_speed2 */
14001 0, /* 14 sdtr_speed3 */
14002 1, /* 15 max_host_qng */
14003 1, /* max_dvc_qng */
14004 0, /* 16 dvc_cntl */
14005 0, /* 17 sdtr_speed4 */
14006 0, /* 18 serial_number_word1 */
14007 0, /* 19 serial_number_word2 */
14008 0, /* 20 serial_number_word3 */
14009 0, /* 21 check_sum */
14010 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
14011 , /* 22-29 oem_name[16] */
14012 0, /* 30 dvc_err_code */
14013 0, /* 31 adv_err_code */
14014 0, /* 32 adv_err_addr */
14015 0, /* 33 saved_dvc_err_code */
14016 0, /* 34 saved_adv_err_code */
14017 0, /* 35 saved_adv_err_addr */
14018 0, /* 36 reserved */
14019 0, /* 37 reserved */
14020 0, /* 38 reserved */
14021 0, /* 39 reserved */
14022 0, /* 40 reserved */
14023 0, /* 41 reserved */
14024 0, /* 42 reserved */
14025 0, /* 43 reserved */
14026 0, /* 44 reserved */
14027 0, /* 45 reserved */
14028 0, /* 46 reserved */
14029 0, /* 47 reserved */
14030 0, /* 48 reserved */
14031 0, /* 49 reserved */
14032 0, /* 50 reserved */
14033 0, /* 51 reserved */
14034 0, /* 52 reserved */
14035 0, /* 53 reserved */
14036 0, /* 54 reserved */
14037 0, /* 55 reserved */
14038 0, /* 56 cisptr_lsw */
14039 0, /* 57 cisprt_msw */
14040 0, /* 58 subsysvid */
14041 0, /* 59 subsysid */
14042 0, /* 60 reserved */
14043 0, /* 61 reserved */
14044 0, /* 62 reserved */
14045 0 /* 63 reserved */
14049 * Initialize the ADV_DVC_VAR structure.
14051 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
14053 * For a non-fatal error return a warning code. If there are no warnings
14054 * then 0 is returned.
14056 static int __devinit
AdvInitGetConfig(ADV_DVC_VAR
*asc_dvc
)
14059 AdvPortAddr iop_base
;
14064 asc_dvc
->err_code
= 0;
14065 iop_base
= asc_dvc
->iop_base
;
14068 * PCI Command Register
14070 * Note: AscPCICmdRegBits_BusMastering definition (0x0007) includes
14071 * I/O Space Control, Memory Space Control and Bus Master Control bits.
14074 if (((pci_cmd_reg
= DvcAdvReadPCIConfigByte(asc_dvc
,
14075 AscPCIConfigCommandRegister
))
14076 & AscPCICmdRegBits_BusMastering
)
14077 != AscPCICmdRegBits_BusMastering
) {
14078 pci_cmd_reg
|= AscPCICmdRegBits_BusMastering
;
14080 DvcAdvWritePCIConfigByte(asc_dvc
,
14081 AscPCIConfigCommandRegister
,
14084 if (((DvcAdvReadPCIConfigByte
14085 (asc_dvc
, AscPCIConfigCommandRegister
))
14086 & AscPCICmdRegBits_BusMastering
)
14087 != AscPCICmdRegBits_BusMastering
) {
14088 warn_code
|= ASC_WARN_SET_PCI_CONFIG_SPACE
;
14093 * PCI Latency Timer
14095 * If the "latency timer" register is 0x20 or above, then we don't need
14096 * to change it. Otherwise, set it to 0x20 (i.e. set it to 0x20 if it
14097 * comes up less than 0x20).
14099 if (DvcAdvReadPCIConfigByte(asc_dvc
, AscPCIConfigLatencyTimer
) < 0x20) {
14100 DvcAdvWritePCIConfigByte(asc_dvc
, AscPCIConfigLatencyTimer
,
14102 if (DvcAdvReadPCIConfigByte(asc_dvc
, AscPCIConfigLatencyTimer
) <
14104 warn_code
|= ASC_WARN_SET_PCI_CONFIG_SPACE
;
14109 * Save the state of the PCI Configuration Command Register
14110 * "Parity Error Response Control" Bit. If the bit is clear (0),
14111 * in AdvInitAsc3550/38C0800Driver() tell the microcode to ignore
14112 * DMA parity errors.
14114 asc_dvc
->cfg
->control_flag
= 0;
14115 if (((DvcAdvReadPCIConfigByte(asc_dvc
, AscPCIConfigCommandRegister
)
14116 & AscPCICmdRegBits_ParErrRespCtrl
)) == 0) {
14117 asc_dvc
->cfg
->control_flag
|= CONTROL_FLAG_IGNORE_PERR
;
14120 asc_dvc
->cfg
->lib_version
= (ADV_LIB_VERSION_MAJOR
<< 8) |
14121 ADV_LIB_VERSION_MINOR
;
14122 asc_dvc
->cfg
->chip_version
=
14123 AdvGetChipVersion(iop_base
, asc_dvc
->bus_type
);
14125 ASC_DBG2(1, "AdvInitGetConfig: iopb_chip_id_1: 0x%x 0x%x\n",
14126 (ushort
)AdvReadByteRegister(iop_base
, IOPB_CHIP_ID_1
),
14127 (ushort
)ADV_CHIP_ID_BYTE
);
14129 ASC_DBG2(1, "AdvInitGetConfig: iopw_chip_id_0: 0x%x 0x%x\n",
14130 (ushort
)AdvReadWordRegister(iop_base
, IOPW_CHIP_ID_0
),
14131 (ushort
)ADV_CHIP_ID_WORD
);
14134 * Reset the chip to start and allow register writes.
14136 if (AdvFindSignature(iop_base
) == 0) {
14137 asc_dvc
->err_code
= ASC_IERR_BAD_SIGNATURE
;
14141 * The caller must set 'chip_type' to a valid setting.
14143 if (asc_dvc
->chip_type
!= ADV_CHIP_ASC3550
&&
14144 asc_dvc
->chip_type
!= ADV_CHIP_ASC38C0800
&&
14145 asc_dvc
->chip_type
!= ADV_CHIP_ASC38C1600
) {
14146 asc_dvc
->err_code
|= ASC_IERR_BAD_CHIPTYPE
;
14153 AdvWriteWordRegister(iop_base
, IOPW_CTRL_REG
,
14154 ADV_CTRL_REG_CMD_RESET
);
14155 DvcSleepMilliSecond(100);
14156 AdvWriteWordRegister(iop_base
, IOPW_CTRL_REG
,
14157 ADV_CTRL_REG_CMD_WR_IO_REG
);
14159 if (asc_dvc
->chip_type
== ADV_CHIP_ASC38C1600
) {
14161 AdvInitFrom38C1600EEP(asc_dvc
)) == ADV_ERROR
) {
14164 } else if (asc_dvc
->chip_type
== ADV_CHIP_ASC38C0800
) {
14166 AdvInitFrom38C0800EEP(asc_dvc
)) == ADV_ERROR
) {
14170 if ((status
= AdvInitFrom3550EEP(asc_dvc
)) == ADV_ERROR
) {
14174 warn_code
|= status
;
14181 * Initialize the ASC-3550.
14183 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
14185 * For a non-fatal error return a warning code. If there are no warnings
14186 * then 0 is returned.
14188 * Needed after initialization for error recovery.
14190 static int AdvInitAsc3550Driver(ADV_DVC_VAR
*asc_dvc
)
14192 AdvPortAddr iop_base
;
14200 int adv_asc3550_expanded_size
;
14202 ADV_DCNT contig_len
;
14203 ADV_SDCNT buf_size
;
14204 ADV_PADDR carr_paddr
;
14208 ushort bios_mem
[ASC_MC_BIOSLEN
/ 2]; /* BIOS RISC Memory 0x40-0x8F. */
14209 ushort wdtr_able
= 0, sdtr_able
, tagqng_able
;
14210 uchar max_cmd
[ADV_MAX_TID
+ 1];
14212 /* If there is already an error, don't continue. */
14213 if (asc_dvc
->err_code
!= 0) {
14218 * The caller must set 'chip_type' to ADV_CHIP_ASC3550.
14220 if (asc_dvc
->chip_type
!= ADV_CHIP_ASC3550
) {
14221 asc_dvc
->err_code
|= ASC_IERR_BAD_CHIPTYPE
;
14226 iop_base
= asc_dvc
->iop_base
;
14229 * Save the RISC memory BIOS region before writing the microcode.
14230 * The BIOS may already be loaded and using its RISC LRAM region
14231 * so its region must be saved and restored.
14233 * Note: This code makes the assumption, which is currently true,
14234 * that a chip reset does not clear RISC LRAM.
14236 for (i
= 0; i
< ASC_MC_BIOSLEN
/ 2; i
++) {
14237 AdvReadWordLram(iop_base
, ASC_MC_BIOSMEM
+ (2 * i
),
14242 * Save current per TID negotiated values.
14244 if (bios_mem
[(ASC_MC_BIOS_SIGNATURE
- ASC_MC_BIOSMEM
) / 2] == 0x55AA) {
14245 ushort bios_version
, major
, minor
;
14248 bios_mem
[(ASC_MC_BIOS_VERSION
- ASC_MC_BIOSMEM
) / 2];
14249 major
= (bios_version
>> 12) & 0xF;
14250 minor
= (bios_version
>> 8) & 0xF;
14251 if (major
< 3 || (major
== 3 && minor
== 1)) {
14252 /* BIOS 3.1 and earlier location of 'wdtr_able' variable. */
14253 AdvReadWordLram(iop_base
, 0x120, wdtr_able
);
14255 AdvReadWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
14258 AdvReadWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
14259 AdvReadWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
, tagqng_able
);
14260 for (tid
= 0; tid
<= ADV_MAX_TID
; tid
++) {
14261 AdvReadByteLram(iop_base
, ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
14266 * Load the Microcode
14268 * Write the microcode image to RISC memory starting at address 0.
14270 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, 0);
14271 /* Assume the following compressed format of the microcode buffer:
14273 * 254 word (508 byte) table indexed by byte code followed
14274 * by the following byte codes:
14277 * 00: Emit word 0 in table.
14278 * 01: Emit word 1 in table.
14280 * FD: Emit word 253 in table.
14283 * FE WW WW: (3 byte code) Word to emit is the next word WW WW.
14284 * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW.
14287 for (i
= 253 * 2; i
< _adv_asc3550_size
; i
++) {
14288 if (_adv_asc3550_buf
[i
] == 0xff) {
14289 for (j
= 0; j
< _adv_asc3550_buf
[i
+ 1]; j
++) {
14290 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
14299 } else if (_adv_asc3550_buf
[i
] == 0xfe) {
14300 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
14301 _adv_asc3550_buf
[i
+
14304 _adv_asc3550_buf
[i
+
14309 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
14310 _adv_asc3550_buf
[(_adv_asc3550_buf
[i
] * 2) + 1] << 8) | _adv_asc3550_buf
[_adv_asc3550_buf
[i
] * 2]));
14316 * Set 'word' for later use to clear the rest of memory and save
14317 * the expanded mcode size.
14320 adv_asc3550_expanded_size
= word
;
14323 * Clear the rest of ASC-3550 Internal RAM (8KB).
14325 for (; word
< ADV_3550_MEMSIZE
; word
+= 2) {
14326 AdvWriteWordAutoIncLram(iop_base
, 0);
14330 * Verify the microcode checksum.
14333 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, 0);
14335 for (word
= 0; word
< adv_asc3550_expanded_size
; word
+= 2) {
14336 sum
+= AdvReadWordAutoIncLram(iop_base
);
14339 if (sum
!= _adv_asc3550_chksum
) {
14340 asc_dvc
->err_code
|= ASC_IERR_MCODE_CHKSUM
;
14345 * Restore the RISC memory BIOS region.
14347 for (i
= 0; i
< ASC_MC_BIOSLEN
/ 2; i
++) {
14348 AdvWriteWordLram(iop_base
, ASC_MC_BIOSMEM
+ (2 * i
),
14353 * Calculate and write the microcode code checksum to the microcode
14354 * code checksum location ASC_MC_CODE_CHK_SUM (0x2C).
14356 AdvReadWordLram(iop_base
, ASC_MC_CODE_BEGIN_ADDR
, begin_addr
);
14357 AdvReadWordLram(iop_base
, ASC_MC_CODE_END_ADDR
, end_addr
);
14359 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, begin_addr
);
14360 for (word
= begin_addr
; word
< end_addr
; word
+= 2) {
14361 code_sum
+= AdvReadWordAutoIncLram(iop_base
);
14363 AdvWriteWordLram(iop_base
, ASC_MC_CODE_CHK_SUM
, code_sum
);
14366 * Read and save microcode version and date.
14368 AdvReadWordLram(iop_base
, ASC_MC_VERSION_DATE
,
14369 asc_dvc
->cfg
->mcode_date
);
14370 AdvReadWordLram(iop_base
, ASC_MC_VERSION_NUM
,
14371 asc_dvc
->cfg
->mcode_version
);
14374 * Set the chip type to indicate the ASC3550.
14376 AdvWriteWordLram(iop_base
, ASC_MC_CHIP_TYPE
, ADV_CHIP_ASC3550
);
14379 * If the PCI Configuration Command Register "Parity Error Response
14380 * Control" Bit was clear (0), then set the microcode variable
14381 * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
14382 * to ignore DMA parity errors.
14384 if (asc_dvc
->cfg
->control_flag
& CONTROL_FLAG_IGNORE_PERR
) {
14385 AdvReadWordLram(iop_base
, ASC_MC_CONTROL_FLAG
, word
);
14386 word
|= CONTROL_FLAG_IGNORE_PERR
;
14387 AdvWriteWordLram(iop_base
, ASC_MC_CONTROL_FLAG
, word
);
14391 * For ASC-3550, setting the START_CTL_EMFU [3:2] bits sets a FIFO
14392 * threshold of 128 bytes. This register is only accessible to the host.
14394 AdvWriteByteRegister(iop_base
, IOPB_DMA_CFG0
,
14395 START_CTL_EMFU
| READ_CMD_MRM
);
14398 * Microcode operating variables for WDTR, SDTR, and command tag
14399 * queuing will be set in AdvInquiryHandling() based on what a
14400 * device reports it is capable of in Inquiry byte 7.
14402 * If SCSI Bus Resets have been disabled, then directly set
14403 * SDTR and WDTR from the EEPROM configuration. This will allow
14404 * the BIOS and warm boot to work without a SCSI bus hang on
14405 * the Inquiry caused by host and target mismatched DTR values.
14406 * Without the SCSI Bus Reset, before an Inquiry a device can't
14407 * be assumed to be in Asynchronous, Narrow mode.
14409 if ((asc_dvc
->bios_ctrl
& BIOS_CTRL_RESET_SCSI_BUS
) == 0) {
14410 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_ABLE
,
14411 asc_dvc
->wdtr_able
);
14412 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_ABLE
,
14413 asc_dvc
->sdtr_able
);
14417 * Set microcode operating variables for SDTR_SPEED1, SDTR_SPEED2,
14418 * SDTR_SPEED3, and SDTR_SPEED4 based on the ULTRA EEPROM per TID
14419 * bitmask. These values determine the maximum SDTR speed negotiated
14422 * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2,
14423 * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them
14424 * without determining here whether the device supports SDTR.
14426 * 4-bit speed SDTR speed name
14427 * =========== ===============
14428 * 0000b (0x0) SDTR disabled
14429 * 0001b (0x1) 5 Mhz
14430 * 0010b (0x2) 10 Mhz
14431 * 0011b (0x3) 20 Mhz (Ultra)
14432 * 0100b (0x4) 40 Mhz (LVD/Ultra2)
14433 * 0101b (0x5) 80 Mhz (LVD2/Ultra3)
14434 * 0110b (0x6) Undefined
14436 * 1111b (0xF) Undefined
14439 for (tid
= 0; tid
<= ADV_MAX_TID
; tid
++) {
14440 if (ADV_TID_TO_TIDMASK(tid
) & asc_dvc
->ultra_able
) {
14441 /* Set Ultra speed for TID 'tid'. */
14442 word
|= (0x3 << (4 * (tid
% 4)));
14444 /* Set Fast speed for TID 'tid'. */
14445 word
|= (0x2 << (4 * (tid
% 4)));
14447 if (tid
== 3) { /* Check if done with sdtr_speed1. */
14448 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED1
, word
);
14450 } else if (tid
== 7) { /* Check if done with sdtr_speed2. */
14451 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED2
, word
);
14453 } else if (tid
== 11) { /* Check if done with sdtr_speed3. */
14454 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED3
, word
);
14456 } else if (tid
== 15) { /* Check if done with sdtr_speed4. */
14457 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED4
, word
);
14463 * Set microcode operating variable for the disconnect per TID bitmask.
14465 AdvWriteWordLram(iop_base
, ASC_MC_DISC_ENABLE
,
14466 asc_dvc
->cfg
->disc_enable
);
14469 * Set SCSI_CFG0 Microcode Default Value.
14471 * The microcode will set the SCSI_CFG0 register using this value
14472 * after it is started below.
14474 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SCSI_CFG0
,
14475 PARITY_EN
| QUEUE_128
| SEL_TMO_LONG
| OUR_ID_EN
|
14476 asc_dvc
->chip_scsi_id
);
14479 * Determine SCSI_CFG1 Microcode Default Value.
14481 * The microcode will set the SCSI_CFG1 register using this value
14482 * after it is started below.
14485 /* Read current SCSI_CFG1 Register value. */
14486 scsi_cfg1
= AdvReadWordRegister(iop_base
, IOPW_SCSI_CFG1
);
14489 * If all three connectors are in use, return an error.
14491 if ((scsi_cfg1
& CABLE_ILLEGAL_A
) == 0 ||
14492 (scsi_cfg1
& CABLE_ILLEGAL_B
) == 0) {
14493 asc_dvc
->err_code
|= ASC_IERR_ILLEGAL_CONNECTION
;
14498 * If the internal narrow cable is reversed all of the SCSI_CTRL
14499 * register signals will be set. Check for and return an error if
14500 * this condition is found.
14502 if ((AdvReadWordRegister(iop_base
, IOPW_SCSI_CTRL
) & 0x3F07) == 0x3F07) {
14503 asc_dvc
->err_code
|= ASC_IERR_REVERSED_CABLE
;
14508 * If this is a differential board and a single-ended device
14509 * is attached to one of the connectors, return an error.
14511 if ((scsi_cfg1
& DIFF_MODE
) && (scsi_cfg1
& DIFF_SENSE
) == 0) {
14512 asc_dvc
->err_code
|= ASC_IERR_SINGLE_END_DEVICE
;
14517 * If automatic termination control is enabled, then set the
14518 * termination value based on a table listed in a_condor.h.
14520 * If manual termination was specified with an EEPROM setting
14521 * then 'termination' was set-up in AdvInitFrom3550EEPROM() and
14522 * is ready to be 'ored' into SCSI_CFG1.
14524 if (asc_dvc
->cfg
->termination
== 0) {
14526 * The software always controls termination by setting TERM_CTL_SEL.
14527 * If TERM_CTL_SEL were set to 0, the hardware would set termination.
14529 asc_dvc
->cfg
->termination
|= TERM_CTL_SEL
;
14531 switch (scsi_cfg1
& CABLE_DETECT
) {
14532 /* TERM_CTL_H: on, TERM_CTL_L: on */
14539 asc_dvc
->cfg
->termination
|= (TERM_CTL_H
| TERM_CTL_L
);
14542 /* TERM_CTL_H: on, TERM_CTL_L: off */
14548 asc_dvc
->cfg
->termination
|= TERM_CTL_H
;
14551 /* TERM_CTL_H: off, TERM_CTL_L: off */
14559 * Clear any set TERM_CTL_H and TERM_CTL_L bits.
14561 scsi_cfg1
&= ~TERM_CTL
;
14564 * Invert the TERM_CTL_H and TERM_CTL_L bits and then
14565 * set 'scsi_cfg1'. The TERM_POL bit does not need to be
14566 * referenced, because the hardware internally inverts
14567 * the Termination High and Low bits if TERM_POL is set.
14569 scsi_cfg1
|= (TERM_CTL_SEL
| (~asc_dvc
->cfg
->termination
& TERM_CTL
));
14572 * Set SCSI_CFG1 Microcode Default Value
14574 * Set filter value and possibly modified termination control
14575 * bits in the Microcode SCSI_CFG1 Register Value.
14577 * The microcode will set the SCSI_CFG1 register using this value
14578 * after it is started below.
14580 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SCSI_CFG1
,
14581 FLTR_DISABLE
| scsi_cfg1
);
14584 * Set MEM_CFG Microcode Default Value
14586 * The microcode will set the MEM_CFG register using this value
14587 * after it is started below.
14589 * MEM_CFG may be accessed as a word or byte, but only bits 0-7
14592 * ASC-3550 has 8KB internal memory.
14594 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_MEM_CFG
,
14595 BIOS_EN
| RAM_SZ_8KB
);
14598 * Set SEL_MASK Microcode Default Value
14600 * The microcode will set the SEL_MASK register using this value
14601 * after it is started below.
14603 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SEL_MASK
,
14604 ADV_TID_TO_TIDMASK(asc_dvc
->chip_scsi_id
));
14607 * Build carrier freelist.
14609 * Driver must have already allocated memory and set 'carrier_buf'.
14611 ASC_ASSERT(asc_dvc
->carrier_buf
!= NULL
);
14613 carrp
= (ADV_CARR_T
*) ADV_16BALIGN(asc_dvc
->carrier_buf
);
14614 asc_dvc
->carr_freelist
= NULL
;
14615 if (carrp
== (ADV_CARR_T
*) asc_dvc
->carrier_buf
) {
14616 buf_size
= ADV_CARRIER_BUFSIZE
;
14618 buf_size
= ADV_CARRIER_BUFSIZE
- sizeof(ADV_CARR_T
);
14623 * Get physical address of the carrier 'carrp'.
14625 contig_len
= sizeof(ADV_CARR_T
);
14627 cpu_to_le32(DvcGetPhyAddr
14628 (asc_dvc
, NULL
, (uchar
*)carrp
,
14629 (ADV_SDCNT
*)&contig_len
,
14630 ADV_IS_CARRIER_FLAG
));
14632 buf_size
-= sizeof(ADV_CARR_T
);
14635 * If the current carrier is not physically contiguous, then
14636 * maybe there was a page crossing. Try the next carrier aligned
14639 if (contig_len
< sizeof(ADV_CARR_T
)) {
14644 carrp
->carr_pa
= carr_paddr
;
14645 carrp
->carr_va
= cpu_to_le32(ADV_VADDR_TO_U32(carrp
));
14648 * Insert the carrier at the beginning of the freelist.
14651 cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc
->carr_freelist
));
14652 asc_dvc
->carr_freelist
= carrp
;
14656 while (buf_size
> 0);
14659 * Set-up the Host->RISC Initiator Command Queue (ICQ).
14662 if ((asc_dvc
->icq_sp
= asc_dvc
->carr_freelist
) == NULL
) {
14663 asc_dvc
->err_code
|= ASC_IERR_NO_CARRIER
;
14666 asc_dvc
->carr_freelist
= (ADV_CARR_T
*)
14667 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc
->icq_sp
->next_vpa
));
14670 * The first command issued will be placed in the stopper carrier.
14672 asc_dvc
->icq_sp
->next_vpa
= cpu_to_le32(ASC_CQ_STOPPER
);
14675 * Set RISC ICQ physical address start value.
14677 AdvWriteDWordLramNoSwap(iop_base
, ASC_MC_ICQ
, asc_dvc
->icq_sp
->carr_pa
);
14680 * Set-up the RISC->Host Initiator Response Queue (IRQ).
14682 if ((asc_dvc
->irq_sp
= asc_dvc
->carr_freelist
) == NULL
) {
14683 asc_dvc
->err_code
|= ASC_IERR_NO_CARRIER
;
14686 asc_dvc
->carr_freelist
= (ADV_CARR_T
*)
14687 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc
->irq_sp
->next_vpa
));
14690 * The first command completed by the RISC will be placed in
14693 * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is
14694 * completed the RISC will set the ASC_RQ_STOPPER bit.
14696 asc_dvc
->irq_sp
->next_vpa
= cpu_to_le32(ASC_CQ_STOPPER
);
14699 * Set RISC IRQ physical address start value.
14701 AdvWriteDWordLramNoSwap(iop_base
, ASC_MC_IRQ
, asc_dvc
->irq_sp
->carr_pa
);
14702 asc_dvc
->carr_pending_cnt
= 0;
14704 AdvWriteByteRegister(iop_base
, IOPB_INTR_ENABLES
,
14705 (ADV_INTR_ENABLE_HOST_INTR
|
14706 ADV_INTR_ENABLE_GLOBAL_INTR
));
14708 AdvReadWordLram(iop_base
, ASC_MC_CODE_BEGIN_ADDR
, word
);
14709 AdvWriteWordRegister(iop_base
, IOPW_PC
, word
);
14711 /* finally, finally, gentlemen, start your engine */
14712 AdvWriteWordRegister(iop_base
, IOPW_RISC_CSR
, ADV_RISC_CSR_RUN
);
14715 * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus
14716 * Resets should be performed. The RISC has to be running
14717 * to issue a SCSI Bus Reset.
14719 if (asc_dvc
->bios_ctrl
& BIOS_CTRL_RESET_SCSI_BUS
) {
14721 * If the BIOS Signature is present in memory, restore the
14722 * BIOS Handshake Configuration Table and do not perform
14723 * a SCSI Bus Reset.
14725 if (bios_mem
[(ASC_MC_BIOS_SIGNATURE
- ASC_MC_BIOSMEM
) / 2] ==
14728 * Restore per TID negotiated values.
14730 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
14731 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
14732 AdvWriteWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
,
14734 for (tid
= 0; tid
<= ADV_MAX_TID
; tid
++) {
14735 AdvWriteByteLram(iop_base
,
14736 ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
14740 if (AdvResetSB(asc_dvc
) != ADV_TRUE
) {
14741 warn_code
= ASC_WARN_BUSRESET_ERROR
;
14750 * Initialize the ASC-38C0800.
14752 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
14754 * For a non-fatal error return a warning code. If there are no warnings
14755 * then 0 is returned.
14757 * Needed after initialization for error recovery.
14759 static int AdvInitAsc38C0800Driver(ADV_DVC_VAR
*asc_dvc
)
14761 AdvPortAddr iop_base
;
14769 int adv_asc38C0800_expanded_size
;
14771 ADV_DCNT contig_len
;
14772 ADV_SDCNT buf_size
;
14773 ADV_PADDR carr_paddr
;
14778 ushort bios_mem
[ASC_MC_BIOSLEN
/ 2]; /* BIOS RISC Memory 0x40-0x8F. */
14779 ushort wdtr_able
, sdtr_able
, tagqng_able
;
14780 uchar max_cmd
[ADV_MAX_TID
+ 1];
14782 /* If there is already an error, don't continue. */
14783 if (asc_dvc
->err_code
!= 0) {
14788 * The caller must set 'chip_type' to ADV_CHIP_ASC38C0800.
14790 if (asc_dvc
->chip_type
!= ADV_CHIP_ASC38C0800
) {
14791 asc_dvc
->err_code
= ASC_IERR_BAD_CHIPTYPE
;
14796 iop_base
= asc_dvc
->iop_base
;
14799 * Save the RISC memory BIOS region before writing the microcode.
14800 * The BIOS may already be loaded and using its RISC LRAM region
14801 * so its region must be saved and restored.
14803 * Note: This code makes the assumption, which is currently true,
14804 * that a chip reset does not clear RISC LRAM.
14806 for (i
= 0; i
< ASC_MC_BIOSLEN
/ 2; i
++) {
14807 AdvReadWordLram(iop_base
, ASC_MC_BIOSMEM
+ (2 * i
),
14812 * Save current per TID negotiated values.
14814 AdvReadWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
14815 AdvReadWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
14816 AdvReadWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
, tagqng_able
);
14817 for (tid
= 0; tid
<= ADV_MAX_TID
; tid
++) {
14818 AdvReadByteLram(iop_base
, ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
14823 * RAM BIST (RAM Built-In Self Test)
14825 * Address : I/O base + offset 0x38h register (byte).
14826 * Function: Bit 7-6(RW) : RAM mode
14827 * Normal Mode : 0x00
14828 * Pre-test Mode : 0x40
14829 * RAM Test Mode : 0x80
14831 * Bit 4(RO) : Done bit
14832 * Bit 3-0(RO) : Status
14833 * Host Error : 0x08
14834 * Int_RAM Error : 0x04
14835 * RISC Error : 0x02
14836 * SCSI Error : 0x01
14839 * Note: RAM BIST code should be put right here, before loading the
14840 * microcode and after saving the RISC memory BIOS region.
14846 * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds.
14847 * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return
14848 * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset
14849 * to NORMAL_MODE, return an error too.
14851 for (i
= 0; i
< 2; i
++) {
14852 AdvWriteByteRegister(iop_base
, IOPB_RAM_BIST
, PRE_TEST_MODE
);
14853 DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */
14854 byte
= AdvReadByteRegister(iop_base
, IOPB_RAM_BIST
);
14855 if ((byte
& RAM_TEST_DONE
) == 0
14856 || (byte
& 0x0F) != PRE_TEST_VALUE
) {
14857 asc_dvc
->err_code
|= ASC_IERR_BIST_PRE_TEST
;
14861 AdvWriteByteRegister(iop_base
, IOPB_RAM_BIST
, NORMAL_MODE
);
14862 DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */
14863 if (AdvReadByteRegister(iop_base
, IOPB_RAM_BIST
)
14865 asc_dvc
->err_code
|= ASC_IERR_BIST_PRE_TEST
;
14871 * LRAM Test - It takes about 1.5 ms to run through the test.
14873 * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds.
14874 * If Done bit not set or Status not 0, save register byte, set the
14875 * err_code, and return an error.
14877 AdvWriteByteRegister(iop_base
, IOPB_RAM_BIST
, RAM_TEST_MODE
);
14878 DvcSleepMilliSecond(10); /* Wait for 10ms before checking status. */
14880 byte
= AdvReadByteRegister(iop_base
, IOPB_RAM_BIST
);
14881 if ((byte
& RAM_TEST_DONE
) == 0 || (byte
& RAM_TEST_STATUS
) != 0) {
14882 /* Get here if Done bit not set or Status not 0. */
14883 asc_dvc
->bist_err_code
= byte
; /* for BIOS display message */
14884 asc_dvc
->err_code
|= ASC_IERR_BIST_RAM_TEST
;
14888 /* We need to reset back to normal mode after LRAM test passes. */
14889 AdvWriteByteRegister(iop_base
, IOPB_RAM_BIST
, NORMAL_MODE
);
14892 * Load the Microcode
14894 * Write the microcode image to RISC memory starting at address 0.
14897 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, 0);
14899 /* Assume the following compressed format of the microcode buffer:
14901 * 254 word (508 byte) table indexed by byte code followed
14902 * by the following byte codes:
14905 * 00: Emit word 0 in table.
14906 * 01: Emit word 1 in table.
14908 * FD: Emit word 253 in table.
14911 * FE WW WW: (3 byte code) Word to emit is the next word WW WW.
14912 * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW.
14915 for (i
= 253 * 2; i
< _adv_asc38C0800_size
; i
++) {
14916 if (_adv_asc38C0800_buf
[i
] == 0xff) {
14917 for (j
= 0; j
< _adv_asc38C0800_buf
[i
+ 1]; j
++) {
14918 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
14919 _adv_asc38C0800_buf
14922 _adv_asc38C0800_buf
14927 } else if (_adv_asc38C0800_buf
[i
] == 0xfe) {
14928 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
14929 _adv_asc38C0800_buf
14932 _adv_asc38C0800_buf
[i
14938 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
14939 _adv_asc38C0800_buf
[(_adv_asc38C0800_buf
[i
] * 2) + 1] << 8) | _adv_asc38C0800_buf
[_adv_asc38C0800_buf
[i
] * 2]));
14945 * Set 'word' for later use to clear the rest of memory and save
14946 * the expanded mcode size.
14949 adv_asc38C0800_expanded_size
= word
;
14952 * Clear the rest of ASC-38C0800 Internal RAM (16KB).
14954 for (; word
< ADV_38C0800_MEMSIZE
; word
+= 2) {
14955 AdvWriteWordAutoIncLram(iop_base
, 0);
14959 * Verify the microcode checksum.
14962 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, 0);
14964 for (word
= 0; word
< adv_asc38C0800_expanded_size
; word
+= 2) {
14965 sum
+= AdvReadWordAutoIncLram(iop_base
);
14967 ASC_DBG2(1, "AdvInitAsc38C0800Driver: word %d, i %d\n", word
, i
);
14970 "AdvInitAsc38C0800Driver: sum 0x%lx, _adv_asc38C0800_chksum 0x%lx\n",
14971 (ulong
)sum
, (ulong
)_adv_asc38C0800_chksum
);
14973 if (sum
!= _adv_asc38C0800_chksum
) {
14974 asc_dvc
->err_code
|= ASC_IERR_MCODE_CHKSUM
;
14979 * Restore the RISC memory BIOS region.
14981 for (i
= 0; i
< ASC_MC_BIOSLEN
/ 2; i
++) {
14982 AdvWriteWordLram(iop_base
, ASC_MC_BIOSMEM
+ (2 * i
),
14987 * Calculate and write the microcode code checksum to the microcode
14988 * code checksum location ASC_MC_CODE_CHK_SUM (0x2C).
14990 AdvReadWordLram(iop_base
, ASC_MC_CODE_BEGIN_ADDR
, begin_addr
);
14991 AdvReadWordLram(iop_base
, ASC_MC_CODE_END_ADDR
, end_addr
);
14993 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, begin_addr
);
14994 for (word
= begin_addr
; word
< end_addr
; word
+= 2) {
14995 code_sum
+= AdvReadWordAutoIncLram(iop_base
);
14997 AdvWriteWordLram(iop_base
, ASC_MC_CODE_CHK_SUM
, code_sum
);
15000 * Read microcode version and date.
15002 AdvReadWordLram(iop_base
, ASC_MC_VERSION_DATE
,
15003 asc_dvc
->cfg
->mcode_date
);
15004 AdvReadWordLram(iop_base
, ASC_MC_VERSION_NUM
,
15005 asc_dvc
->cfg
->mcode_version
);
15008 * Set the chip type to indicate the ASC38C0800.
15010 AdvWriteWordLram(iop_base
, ASC_MC_CHIP_TYPE
, ADV_CHIP_ASC38C0800
);
15013 * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register.
15014 * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current
15015 * cable detection and then we are able to read C_DET[3:0].
15017 * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1
15018 * Microcode Default Value' section below.
15020 scsi_cfg1
= AdvReadWordRegister(iop_base
, IOPW_SCSI_CFG1
);
15021 AdvWriteWordRegister(iop_base
, IOPW_SCSI_CFG1
,
15022 scsi_cfg1
| DIS_TERM_DRV
);
15025 * If the PCI Configuration Command Register "Parity Error Response
15026 * Control" Bit was clear (0), then set the microcode variable
15027 * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
15028 * to ignore DMA parity errors.
15030 if (asc_dvc
->cfg
->control_flag
& CONTROL_FLAG_IGNORE_PERR
) {
15031 AdvReadWordLram(iop_base
, ASC_MC_CONTROL_FLAG
, word
);
15032 word
|= CONTROL_FLAG_IGNORE_PERR
;
15033 AdvWriteWordLram(iop_base
, ASC_MC_CONTROL_FLAG
, word
);
15037 * For ASC-38C0800, set FIFO_THRESH_80B [6:4] bits and START_CTL_TH [3:2]
15038 * bits for the default FIFO threshold.
15040 * Note: ASC-38C0800 FIFO threshold has been changed to 256 bytes.
15042 * For DMA Errata #4 set the BC_THRESH_ENB bit.
15044 AdvWriteByteRegister(iop_base
, IOPB_DMA_CFG0
,
15045 BC_THRESH_ENB
| FIFO_THRESH_80B
| START_CTL_TH
|
15049 * Microcode operating variables for WDTR, SDTR, and command tag
15050 * queuing will be set in AdvInquiryHandling() based on what a
15051 * device reports it is capable of in Inquiry byte 7.
15053 * If SCSI Bus Resets have been disabled, then directly set
15054 * SDTR and WDTR from the EEPROM configuration. This will allow
15055 * the BIOS and warm boot to work without a SCSI bus hang on
15056 * the Inquiry caused by host and target mismatched DTR values.
15057 * Without the SCSI Bus Reset, before an Inquiry a device can't
15058 * be assumed to be in Asynchronous, Narrow mode.
15060 if ((asc_dvc
->bios_ctrl
& BIOS_CTRL_RESET_SCSI_BUS
) == 0) {
15061 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_ABLE
,
15062 asc_dvc
->wdtr_able
);
15063 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_ABLE
,
15064 asc_dvc
->sdtr_able
);
15068 * Set microcode operating variables for DISC and SDTR_SPEED1,
15069 * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM
15070 * configuration values.
15072 * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2,
15073 * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them
15074 * without determining here whether the device supports SDTR.
15076 AdvWriteWordLram(iop_base
, ASC_MC_DISC_ENABLE
,
15077 asc_dvc
->cfg
->disc_enable
);
15078 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED1
, asc_dvc
->sdtr_speed1
);
15079 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED2
, asc_dvc
->sdtr_speed2
);
15080 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED3
, asc_dvc
->sdtr_speed3
);
15081 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED4
, asc_dvc
->sdtr_speed4
);
15084 * Set SCSI_CFG0 Microcode Default Value.
15086 * The microcode will set the SCSI_CFG0 register using this value
15087 * after it is started below.
15089 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SCSI_CFG0
,
15090 PARITY_EN
| QUEUE_128
| SEL_TMO_LONG
| OUR_ID_EN
|
15091 asc_dvc
->chip_scsi_id
);
15094 * Determine SCSI_CFG1 Microcode Default Value.
15096 * The microcode will set the SCSI_CFG1 register using this value
15097 * after it is started below.
15100 /* Read current SCSI_CFG1 Register value. */
15101 scsi_cfg1
= AdvReadWordRegister(iop_base
, IOPW_SCSI_CFG1
);
15104 * If the internal narrow cable is reversed all of the SCSI_CTRL
15105 * register signals will be set. Check for and return an error if
15106 * this condition is found.
15108 if ((AdvReadWordRegister(iop_base
, IOPW_SCSI_CTRL
) & 0x3F07) == 0x3F07) {
15109 asc_dvc
->err_code
|= ASC_IERR_REVERSED_CABLE
;
15114 * All kind of combinations of devices attached to one of four connectors
15115 * are acceptable except HVD device attached. For example, LVD device can
15116 * be attached to SE connector while SE device attached to LVD connector.
15117 * If LVD device attached to SE connector, it only runs up to Ultra speed.
15119 * If an HVD device is attached to one of LVD connectors, return an error.
15120 * However, there is no way to detect HVD device attached to SE connectors.
15122 if (scsi_cfg1
& HVD
) {
15123 asc_dvc
->err_code
|= ASC_IERR_HVD_DEVICE
;
15128 * If either SE or LVD automatic termination control is enabled, then
15129 * set the termination value based on a table listed in a_condor.h.
15131 * If manual termination was specified with an EEPROM setting then
15132 * 'termination' was set-up in AdvInitFrom38C0800EEPROM() and is ready to
15133 * be 'ored' into SCSI_CFG1.
15135 if ((asc_dvc
->cfg
->termination
& TERM_SE
) == 0) {
15136 /* SE automatic termination control is enabled. */
15137 switch (scsi_cfg1
& C_DET_SE
) {
15138 /* TERM_SE_HI: on, TERM_SE_LO: on */
15142 asc_dvc
->cfg
->termination
|= TERM_SE
;
15145 /* TERM_SE_HI: on, TERM_SE_LO: off */
15147 asc_dvc
->cfg
->termination
|= TERM_SE_HI
;
15152 if ((asc_dvc
->cfg
->termination
& TERM_LVD
) == 0) {
15153 /* LVD automatic termination control is enabled. */
15154 switch (scsi_cfg1
& C_DET_LVD
) {
15155 /* TERM_LVD_HI: on, TERM_LVD_LO: on */
15159 asc_dvc
->cfg
->termination
|= TERM_LVD
;
15162 /* TERM_LVD_HI: off, TERM_LVD_LO: off */
15169 * Clear any set TERM_SE and TERM_LVD bits.
15171 scsi_cfg1
&= (~TERM_SE
& ~TERM_LVD
);
15174 * Invert the TERM_SE and TERM_LVD bits and then set 'scsi_cfg1'.
15176 scsi_cfg1
|= (~asc_dvc
->cfg
->termination
& 0xF0);
15179 * Clear BIG_ENDIAN, DIS_TERM_DRV, Terminator Polarity and HVD/LVD/SE bits
15180 * and set possibly modified termination control bits in the Microcode
15181 * SCSI_CFG1 Register Value.
15183 scsi_cfg1
&= (~BIG_ENDIAN
& ~DIS_TERM_DRV
& ~TERM_POL
& ~HVD_LVD_SE
);
15186 * Set SCSI_CFG1 Microcode Default Value
15188 * Set possibly modified termination control and reset DIS_TERM_DRV
15189 * bits in the Microcode SCSI_CFG1 Register Value.
15191 * The microcode will set the SCSI_CFG1 register using this value
15192 * after it is started below.
15194 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SCSI_CFG1
, scsi_cfg1
);
15197 * Set MEM_CFG Microcode Default Value
15199 * The microcode will set the MEM_CFG register using this value
15200 * after it is started below.
15202 * MEM_CFG may be accessed as a word or byte, but only bits 0-7
15205 * ASC-38C0800 has 16KB internal memory.
15207 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_MEM_CFG
,
15208 BIOS_EN
| RAM_SZ_16KB
);
15211 * Set SEL_MASK Microcode Default Value
15213 * The microcode will set the SEL_MASK register using this value
15214 * after it is started below.
15216 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SEL_MASK
,
15217 ADV_TID_TO_TIDMASK(asc_dvc
->chip_scsi_id
));
15220 * Build the carrier freelist.
15222 * Driver must have already allocated memory and set 'carrier_buf'.
15224 ASC_ASSERT(asc_dvc
->carrier_buf
!= NULL
);
15226 carrp
= (ADV_CARR_T
*) ADV_16BALIGN(asc_dvc
->carrier_buf
);
15227 asc_dvc
->carr_freelist
= NULL
;
15228 if (carrp
== (ADV_CARR_T
*) asc_dvc
->carrier_buf
) {
15229 buf_size
= ADV_CARRIER_BUFSIZE
;
15231 buf_size
= ADV_CARRIER_BUFSIZE
- sizeof(ADV_CARR_T
);
15236 * Get physical address for the carrier 'carrp'.
15238 contig_len
= sizeof(ADV_CARR_T
);
15240 cpu_to_le32(DvcGetPhyAddr
15241 (asc_dvc
, NULL
, (uchar
*)carrp
,
15242 (ADV_SDCNT
*)&contig_len
,
15243 ADV_IS_CARRIER_FLAG
));
15245 buf_size
-= sizeof(ADV_CARR_T
);
15248 * If the current carrier is not physically contiguous, then
15249 * maybe there was a page crossing. Try the next carrier aligned
15252 if (contig_len
< sizeof(ADV_CARR_T
)) {
15257 carrp
->carr_pa
= carr_paddr
;
15258 carrp
->carr_va
= cpu_to_le32(ADV_VADDR_TO_U32(carrp
));
15261 * Insert the carrier at the beginning of the freelist.
15264 cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc
->carr_freelist
));
15265 asc_dvc
->carr_freelist
= carrp
;
15269 while (buf_size
> 0);
15272 * Set-up the Host->RISC Initiator Command Queue (ICQ).
15275 if ((asc_dvc
->icq_sp
= asc_dvc
->carr_freelist
) == NULL
) {
15276 asc_dvc
->err_code
|= ASC_IERR_NO_CARRIER
;
15279 asc_dvc
->carr_freelist
= (ADV_CARR_T
*)
15280 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc
->icq_sp
->next_vpa
));
15283 * The first command issued will be placed in the stopper carrier.
15285 asc_dvc
->icq_sp
->next_vpa
= cpu_to_le32(ASC_CQ_STOPPER
);
15288 * Set RISC ICQ physical address start value.
15289 * carr_pa is LE, must be native before write
15291 AdvWriteDWordLramNoSwap(iop_base
, ASC_MC_ICQ
, asc_dvc
->icq_sp
->carr_pa
);
15294 * Set-up the RISC->Host Initiator Response Queue (IRQ).
15296 if ((asc_dvc
->irq_sp
= asc_dvc
->carr_freelist
) == NULL
) {
15297 asc_dvc
->err_code
|= ASC_IERR_NO_CARRIER
;
15300 asc_dvc
->carr_freelist
= (ADV_CARR_T
*)
15301 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc
->irq_sp
->next_vpa
));
15304 * The first command completed by the RISC will be placed in
15307 * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is
15308 * completed the RISC will set the ASC_RQ_STOPPER bit.
15310 asc_dvc
->irq_sp
->next_vpa
= cpu_to_le32(ASC_CQ_STOPPER
);
15313 * Set RISC IRQ physical address start value.
15315 * carr_pa is LE, must be native before write *
15317 AdvWriteDWordLramNoSwap(iop_base
, ASC_MC_IRQ
, asc_dvc
->irq_sp
->carr_pa
);
15318 asc_dvc
->carr_pending_cnt
= 0;
15320 AdvWriteByteRegister(iop_base
, IOPB_INTR_ENABLES
,
15321 (ADV_INTR_ENABLE_HOST_INTR
|
15322 ADV_INTR_ENABLE_GLOBAL_INTR
));
15324 AdvReadWordLram(iop_base
, ASC_MC_CODE_BEGIN_ADDR
, word
);
15325 AdvWriteWordRegister(iop_base
, IOPW_PC
, word
);
15327 /* finally, finally, gentlemen, start your engine */
15328 AdvWriteWordRegister(iop_base
, IOPW_RISC_CSR
, ADV_RISC_CSR_RUN
);
15331 * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus
15332 * Resets should be performed. The RISC has to be running
15333 * to issue a SCSI Bus Reset.
15335 if (asc_dvc
->bios_ctrl
& BIOS_CTRL_RESET_SCSI_BUS
) {
15337 * If the BIOS Signature is present in memory, restore the
15338 * BIOS Handshake Configuration Table and do not perform
15339 * a SCSI Bus Reset.
15341 if (bios_mem
[(ASC_MC_BIOS_SIGNATURE
- ASC_MC_BIOSMEM
) / 2] ==
15344 * Restore per TID negotiated values.
15346 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
15347 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
15348 AdvWriteWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
,
15350 for (tid
= 0; tid
<= ADV_MAX_TID
; tid
++) {
15351 AdvWriteByteLram(iop_base
,
15352 ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
15356 if (AdvResetSB(asc_dvc
) != ADV_TRUE
) {
15357 warn_code
= ASC_WARN_BUSRESET_ERROR
;
15366 * Initialize the ASC-38C1600.
15368 * On failure set the ASC_DVC_VAR field 'err_code' and return ADV_ERROR.
15370 * For a non-fatal error return a warning code. If there are no warnings
15371 * then 0 is returned.
15373 * Needed after initialization for error recovery.
15375 static int AdvInitAsc38C1600Driver(ADV_DVC_VAR
*asc_dvc
)
15377 AdvPortAddr iop_base
;
15385 int adv_asc38C1600_expanded_size
;
15387 ADV_DCNT contig_len
;
15388 ADV_SDCNT buf_size
;
15389 ADV_PADDR carr_paddr
;
15394 ushort bios_mem
[ASC_MC_BIOSLEN
/ 2]; /* BIOS RISC Memory 0x40-0x8F. */
15395 ushort wdtr_able
, sdtr_able
, ppr_able
, tagqng_able
;
15396 uchar max_cmd
[ASC_MAX_TID
+ 1];
15398 /* If there is already an error, don't continue. */
15399 if (asc_dvc
->err_code
!= 0) {
15404 * The caller must set 'chip_type' to ADV_CHIP_ASC38C1600.
15406 if (asc_dvc
->chip_type
!= ADV_CHIP_ASC38C1600
) {
15407 asc_dvc
->err_code
= ASC_IERR_BAD_CHIPTYPE
;
15412 iop_base
= asc_dvc
->iop_base
;
15415 * Save the RISC memory BIOS region before writing the microcode.
15416 * The BIOS may already be loaded and using its RISC LRAM region
15417 * so its region must be saved and restored.
15419 * Note: This code makes the assumption, which is currently true,
15420 * that a chip reset does not clear RISC LRAM.
15422 for (i
= 0; i
< ASC_MC_BIOSLEN
/ 2; i
++) {
15423 AdvReadWordLram(iop_base
, ASC_MC_BIOSMEM
+ (2 * i
),
15428 * Save current per TID negotiated values.
15430 AdvReadWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
15431 AdvReadWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
15432 AdvReadWordLram(iop_base
, ASC_MC_PPR_ABLE
, ppr_able
);
15433 AdvReadWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
, tagqng_able
);
15434 for (tid
= 0; tid
<= ASC_MAX_TID
; tid
++) {
15435 AdvReadByteLram(iop_base
, ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
15440 * RAM BIST (Built-In Self Test)
15442 * Address : I/O base + offset 0x38h register (byte).
15443 * Function: Bit 7-6(RW) : RAM mode
15444 * Normal Mode : 0x00
15445 * Pre-test Mode : 0x40
15446 * RAM Test Mode : 0x80
15448 * Bit 4(RO) : Done bit
15449 * Bit 3-0(RO) : Status
15450 * Host Error : 0x08
15451 * Int_RAM Error : 0x04
15452 * RISC Error : 0x02
15453 * SCSI Error : 0x01
15456 * Note: RAM BIST code should be put right here, before loading the
15457 * microcode and after saving the RISC memory BIOS region.
15463 * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds.
15464 * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return
15465 * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset
15466 * to NORMAL_MODE, return an error too.
15468 for (i
= 0; i
< 2; i
++) {
15469 AdvWriteByteRegister(iop_base
, IOPB_RAM_BIST
, PRE_TEST_MODE
);
15470 DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */
15471 byte
= AdvReadByteRegister(iop_base
, IOPB_RAM_BIST
);
15472 if ((byte
& RAM_TEST_DONE
) == 0
15473 || (byte
& 0x0F) != PRE_TEST_VALUE
) {
15474 asc_dvc
->err_code
|= ASC_IERR_BIST_PRE_TEST
;
15478 AdvWriteByteRegister(iop_base
, IOPB_RAM_BIST
, NORMAL_MODE
);
15479 DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */
15480 if (AdvReadByteRegister(iop_base
, IOPB_RAM_BIST
)
15482 asc_dvc
->err_code
|= ASC_IERR_BIST_PRE_TEST
;
15488 * LRAM Test - It takes about 1.5 ms to run through the test.
15490 * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds.
15491 * If Done bit not set or Status not 0, save register byte, set the
15492 * err_code, and return an error.
15494 AdvWriteByteRegister(iop_base
, IOPB_RAM_BIST
, RAM_TEST_MODE
);
15495 DvcSleepMilliSecond(10); /* Wait for 10ms before checking status. */
15497 byte
= AdvReadByteRegister(iop_base
, IOPB_RAM_BIST
);
15498 if ((byte
& RAM_TEST_DONE
) == 0 || (byte
& RAM_TEST_STATUS
) != 0) {
15499 /* Get here if Done bit not set or Status not 0. */
15500 asc_dvc
->bist_err_code
= byte
; /* for BIOS display message */
15501 asc_dvc
->err_code
|= ASC_IERR_BIST_RAM_TEST
;
15505 /* We need to reset back to normal mode after LRAM test passes. */
15506 AdvWriteByteRegister(iop_base
, IOPB_RAM_BIST
, NORMAL_MODE
);
15509 * Load the Microcode
15511 * Write the microcode image to RISC memory starting at address 0.
15514 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, 0);
15517 * Assume the following compressed format of the microcode buffer:
15519 * 254 word (508 byte) table indexed by byte code followed
15520 * by the following byte codes:
15523 * 00: Emit word 0 in table.
15524 * 01: Emit word 1 in table.
15526 * FD: Emit word 253 in table.
15529 * FE WW WW: (3 byte code) Word to emit is the next word WW WW.
15530 * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW.
15533 for (i
= 253 * 2; i
< _adv_asc38C1600_size
; i
++) {
15534 if (_adv_asc38C1600_buf
[i
] == 0xff) {
15535 for (j
= 0; j
< _adv_asc38C1600_buf
[i
+ 1]; j
++) {
15536 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
15537 _adv_asc38C1600_buf
15540 _adv_asc38C1600_buf
15545 } else if (_adv_asc38C1600_buf
[i
] == 0xfe) {
15546 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
15547 _adv_asc38C1600_buf
15550 _adv_asc38C1600_buf
[i
15556 AdvWriteWordAutoIncLram(iop_base
, (((ushort
)
15557 _adv_asc38C1600_buf
[(_adv_asc38C1600_buf
[i
] * 2) + 1] << 8) | _adv_asc38C1600_buf
[_adv_asc38C1600_buf
[i
] * 2]));
15563 * Set 'word' for later use to clear the rest of memory and save
15564 * the expanded mcode size.
15567 adv_asc38C1600_expanded_size
= word
;
15570 * Clear the rest of ASC-38C1600 Internal RAM (32KB).
15572 for (; word
< ADV_38C1600_MEMSIZE
; word
+= 2) {
15573 AdvWriteWordAutoIncLram(iop_base
, 0);
15577 * Verify the microcode checksum.
15580 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, 0);
15582 for (word
= 0; word
< adv_asc38C1600_expanded_size
; word
+= 2) {
15583 sum
+= AdvReadWordAutoIncLram(iop_base
);
15586 if (sum
!= _adv_asc38C1600_chksum
) {
15587 asc_dvc
->err_code
|= ASC_IERR_MCODE_CHKSUM
;
15592 * Restore the RISC memory BIOS region.
15594 for (i
= 0; i
< ASC_MC_BIOSLEN
/ 2; i
++) {
15595 AdvWriteWordLram(iop_base
, ASC_MC_BIOSMEM
+ (2 * i
),
15600 * Calculate and write the microcode code checksum to the microcode
15601 * code checksum location ASC_MC_CODE_CHK_SUM (0x2C).
15603 AdvReadWordLram(iop_base
, ASC_MC_CODE_BEGIN_ADDR
, begin_addr
);
15604 AdvReadWordLram(iop_base
, ASC_MC_CODE_END_ADDR
, end_addr
);
15606 AdvWriteWordRegister(iop_base
, IOPW_RAM_ADDR
, begin_addr
);
15607 for (word
= begin_addr
; word
< end_addr
; word
+= 2) {
15608 code_sum
+= AdvReadWordAutoIncLram(iop_base
);
15610 AdvWriteWordLram(iop_base
, ASC_MC_CODE_CHK_SUM
, code_sum
);
15613 * Read microcode version and date.
15615 AdvReadWordLram(iop_base
, ASC_MC_VERSION_DATE
,
15616 asc_dvc
->cfg
->mcode_date
);
15617 AdvReadWordLram(iop_base
, ASC_MC_VERSION_NUM
,
15618 asc_dvc
->cfg
->mcode_version
);
15621 * Set the chip type to indicate the ASC38C1600.
15623 AdvWriteWordLram(iop_base
, ASC_MC_CHIP_TYPE
, ADV_CHIP_ASC38C1600
);
15626 * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register.
15627 * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current
15628 * cable detection and then we are able to read C_DET[3:0].
15630 * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1
15631 * Microcode Default Value' section below.
15633 scsi_cfg1
= AdvReadWordRegister(iop_base
, IOPW_SCSI_CFG1
);
15634 AdvWriteWordRegister(iop_base
, IOPW_SCSI_CFG1
,
15635 scsi_cfg1
| DIS_TERM_DRV
);
15638 * If the PCI Configuration Command Register "Parity Error Response
15639 * Control" Bit was clear (0), then set the microcode variable
15640 * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
15641 * to ignore DMA parity errors.
15643 if (asc_dvc
->cfg
->control_flag
& CONTROL_FLAG_IGNORE_PERR
) {
15644 AdvReadWordLram(iop_base
, ASC_MC_CONTROL_FLAG
, word
);
15645 word
|= CONTROL_FLAG_IGNORE_PERR
;
15646 AdvWriteWordLram(iop_base
, ASC_MC_CONTROL_FLAG
, word
);
15650 * If the BIOS control flag AIPP (Asynchronous Information
15651 * Phase Protection) disable bit is not set, then set the firmware
15652 * 'control_flag' CONTROL_FLAG_ENABLE_AIPP bit to enable
15653 * AIPP checking and encoding.
15655 if ((asc_dvc
->bios_ctrl
& BIOS_CTRL_AIPP_DIS
) == 0) {
15656 AdvReadWordLram(iop_base
, ASC_MC_CONTROL_FLAG
, word
);
15657 word
|= CONTROL_FLAG_ENABLE_AIPP
;
15658 AdvWriteWordLram(iop_base
, ASC_MC_CONTROL_FLAG
, word
);
15662 * For ASC-38C1600 use DMA_CFG0 default values: FIFO_THRESH_80B [6:4],
15663 * and START_CTL_TH [3:2].
15665 AdvWriteByteRegister(iop_base
, IOPB_DMA_CFG0
,
15666 FIFO_THRESH_80B
| START_CTL_TH
| READ_CMD_MRM
);
15669 * Microcode operating variables for WDTR, SDTR, and command tag
15670 * queuing will be set in AdvInquiryHandling() based on what a
15671 * device reports it is capable of in Inquiry byte 7.
15673 * If SCSI Bus Resets have been disabled, then directly set
15674 * SDTR and WDTR from the EEPROM configuration. This will allow
15675 * the BIOS and warm boot to work without a SCSI bus hang on
15676 * the Inquiry caused by host and target mismatched DTR values.
15677 * Without the SCSI Bus Reset, before an Inquiry a device can't
15678 * be assumed to be in Asynchronous, Narrow mode.
15680 if ((asc_dvc
->bios_ctrl
& BIOS_CTRL_RESET_SCSI_BUS
) == 0) {
15681 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_ABLE
,
15682 asc_dvc
->wdtr_able
);
15683 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_ABLE
,
15684 asc_dvc
->sdtr_able
);
15688 * Set microcode operating variables for DISC and SDTR_SPEED1,
15689 * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM
15690 * configuration values.
15692 * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2,
15693 * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them
15694 * without determining here whether the device supports SDTR.
15696 AdvWriteWordLram(iop_base
, ASC_MC_DISC_ENABLE
,
15697 asc_dvc
->cfg
->disc_enable
);
15698 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED1
, asc_dvc
->sdtr_speed1
);
15699 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED2
, asc_dvc
->sdtr_speed2
);
15700 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED3
, asc_dvc
->sdtr_speed3
);
15701 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_SPEED4
, asc_dvc
->sdtr_speed4
);
15704 * Set SCSI_CFG0 Microcode Default Value.
15706 * The microcode will set the SCSI_CFG0 register using this value
15707 * after it is started below.
15709 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SCSI_CFG0
,
15710 PARITY_EN
| QUEUE_128
| SEL_TMO_LONG
| OUR_ID_EN
|
15711 asc_dvc
->chip_scsi_id
);
15714 * Calculate SCSI_CFG1 Microcode Default Value.
15716 * The microcode will set the SCSI_CFG1 register using this value
15717 * after it is started below.
15719 * Each ASC-38C1600 function has only two cable detect bits.
15720 * The bus mode override bits are in IOPB_SOFT_OVER_WR.
15722 scsi_cfg1
= AdvReadWordRegister(iop_base
, IOPW_SCSI_CFG1
);
15725 * If the cable is reversed all of the SCSI_CTRL register signals
15726 * will be set. Check for and return an error if this condition is
15729 if ((AdvReadWordRegister(iop_base
, IOPW_SCSI_CTRL
) & 0x3F07) == 0x3F07) {
15730 asc_dvc
->err_code
|= ASC_IERR_REVERSED_CABLE
;
15735 * Each ASC-38C1600 function has two connectors. Only an HVD device
15736 * can not be connected to either connector. An LVD device or SE device
15737 * may be connected to either connecor. If an SE device is connected,
15738 * then at most Ultra speed (20 Mhz) can be used on both connectors.
15740 * If an HVD device is attached, return an error.
15742 if (scsi_cfg1
& HVD
) {
15743 asc_dvc
->err_code
|= ASC_IERR_HVD_DEVICE
;
15748 * Each function in the ASC-38C1600 uses only the SE cable detect and
15749 * termination because there are two connectors for each function. Each
15750 * function may use either LVD or SE mode. Corresponding the SE automatic
15751 * termination control EEPROM bits are used for each function. Each
15752 * function has its own EEPROM. If SE automatic control is enabled for
15753 * the function, then set the termination value based on a table listed
15756 * If manual termination is specified in the EEPROM for the function,
15757 * then 'termination' was set-up in AscInitFrom38C1600EEPROM() and is
15758 * ready to be 'ored' into SCSI_CFG1.
15760 if ((asc_dvc
->cfg
->termination
& TERM_SE
) == 0) {
15761 /* SE automatic termination control is enabled. */
15762 switch (scsi_cfg1
& C_DET_SE
) {
15763 /* TERM_SE_HI: on, TERM_SE_LO: on */
15767 asc_dvc
->cfg
->termination
|= TERM_SE
;
15771 if (ASC_PCI_ID2FUNC(asc_dvc
->cfg
->pci_slot_info
) == 0) {
15772 /* Function 0 - TERM_SE_HI: off, TERM_SE_LO: off */
15774 /* Function 1 - TERM_SE_HI: on, TERM_SE_LO: off */
15775 asc_dvc
->cfg
->termination
|= TERM_SE_HI
;
15782 * Clear any set TERM_SE bits.
15784 scsi_cfg1
&= ~TERM_SE
;
15787 * Invert the TERM_SE bits and then set 'scsi_cfg1'.
15789 scsi_cfg1
|= (~asc_dvc
->cfg
->termination
& TERM_SE
);
15792 * Clear Big Endian and Terminator Polarity bits and set possibly
15793 * modified termination control bits in the Microcode SCSI_CFG1
15796 * Big Endian bit is not used even on big endian machines.
15798 scsi_cfg1
&= (~BIG_ENDIAN
& ~DIS_TERM_DRV
& ~TERM_POL
);
15801 * Set SCSI_CFG1 Microcode Default Value
15803 * Set possibly modified termination control bits in the Microcode
15804 * SCSI_CFG1 Register Value.
15806 * The microcode will set the SCSI_CFG1 register using this value
15807 * after it is started below.
15809 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SCSI_CFG1
, scsi_cfg1
);
15812 * Set MEM_CFG Microcode Default Value
15814 * The microcode will set the MEM_CFG register using this value
15815 * after it is started below.
15817 * MEM_CFG may be accessed as a word or byte, but only bits 0-7
15820 * ASC-38C1600 has 32KB internal memory.
15822 * XXX - Since ASC38C1600 Rev.3 has a Local RAM failure issue, we come
15823 * out a special 16K Adv Library and Microcode version. After the issue
15824 * resolved, we should turn back to the 32K support. Both a_condor.h and
15825 * mcode.sas files also need to be updated.
15827 * AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG,
15828 * BIOS_EN | RAM_SZ_32KB);
15830 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_MEM_CFG
,
15831 BIOS_EN
| RAM_SZ_16KB
);
15834 * Set SEL_MASK Microcode Default Value
15836 * The microcode will set the SEL_MASK register using this value
15837 * after it is started below.
15839 AdvWriteWordLram(iop_base
, ASC_MC_DEFAULT_SEL_MASK
,
15840 ADV_TID_TO_TIDMASK(asc_dvc
->chip_scsi_id
));
15843 * Build the carrier freelist.
15845 * Driver must have already allocated memory and set 'carrier_buf'.
15848 ASC_ASSERT(asc_dvc
->carrier_buf
!= NULL
);
15850 carrp
= (ADV_CARR_T
*) ADV_16BALIGN(asc_dvc
->carrier_buf
);
15851 asc_dvc
->carr_freelist
= NULL
;
15852 if (carrp
== (ADV_CARR_T
*) asc_dvc
->carrier_buf
) {
15853 buf_size
= ADV_CARRIER_BUFSIZE
;
15855 buf_size
= ADV_CARRIER_BUFSIZE
- sizeof(ADV_CARR_T
);
15860 * Get physical address for the carrier 'carrp'.
15862 contig_len
= sizeof(ADV_CARR_T
);
15864 cpu_to_le32(DvcGetPhyAddr
15865 (asc_dvc
, NULL
, (uchar
*)carrp
,
15866 (ADV_SDCNT
*)&contig_len
,
15867 ADV_IS_CARRIER_FLAG
));
15869 buf_size
-= sizeof(ADV_CARR_T
);
15872 * If the current carrier is not physically contiguous, then
15873 * maybe there was a page crossing. Try the next carrier aligned
15876 if (contig_len
< sizeof(ADV_CARR_T
)) {
15881 carrp
->carr_pa
= carr_paddr
;
15882 carrp
->carr_va
= cpu_to_le32(ADV_VADDR_TO_U32(carrp
));
15885 * Insert the carrier at the beginning of the freelist.
15888 cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc
->carr_freelist
));
15889 asc_dvc
->carr_freelist
= carrp
;
15893 while (buf_size
> 0);
15896 * Set-up the Host->RISC Initiator Command Queue (ICQ).
15898 if ((asc_dvc
->icq_sp
= asc_dvc
->carr_freelist
) == NULL
) {
15899 asc_dvc
->err_code
|= ASC_IERR_NO_CARRIER
;
15902 asc_dvc
->carr_freelist
= (ADV_CARR_T
*)
15903 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc
->icq_sp
->next_vpa
));
15906 * The first command issued will be placed in the stopper carrier.
15908 asc_dvc
->icq_sp
->next_vpa
= cpu_to_le32(ASC_CQ_STOPPER
);
15911 * Set RISC ICQ physical address start value. Initialize the
15912 * COMMA register to the same value otherwise the RISC will
15913 * prematurely detect a command is available.
15915 AdvWriteDWordLramNoSwap(iop_base
, ASC_MC_ICQ
, asc_dvc
->icq_sp
->carr_pa
);
15916 AdvWriteDWordRegister(iop_base
, IOPDW_COMMA
,
15917 le32_to_cpu(asc_dvc
->icq_sp
->carr_pa
));
15920 * Set-up the RISC->Host Initiator Response Queue (IRQ).
15922 if ((asc_dvc
->irq_sp
= asc_dvc
->carr_freelist
) == NULL
) {
15923 asc_dvc
->err_code
|= ASC_IERR_NO_CARRIER
;
15926 asc_dvc
->carr_freelist
= (ADV_CARR_T
*)
15927 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc
->irq_sp
->next_vpa
));
15930 * The first command completed by the RISC will be placed in
15933 * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is
15934 * completed the RISC will set the ASC_RQ_STOPPER bit.
15936 asc_dvc
->irq_sp
->next_vpa
= cpu_to_le32(ASC_CQ_STOPPER
);
15939 * Set RISC IRQ physical address start value.
15941 AdvWriteDWordLramNoSwap(iop_base
, ASC_MC_IRQ
, asc_dvc
->irq_sp
->carr_pa
);
15942 asc_dvc
->carr_pending_cnt
= 0;
15944 AdvWriteByteRegister(iop_base
, IOPB_INTR_ENABLES
,
15945 (ADV_INTR_ENABLE_HOST_INTR
|
15946 ADV_INTR_ENABLE_GLOBAL_INTR
));
15947 AdvReadWordLram(iop_base
, ASC_MC_CODE_BEGIN_ADDR
, word
);
15948 AdvWriteWordRegister(iop_base
, IOPW_PC
, word
);
15950 /* finally, finally, gentlemen, start your engine */
15951 AdvWriteWordRegister(iop_base
, IOPW_RISC_CSR
, ADV_RISC_CSR_RUN
);
15954 * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus
15955 * Resets should be performed. The RISC has to be running
15956 * to issue a SCSI Bus Reset.
15958 if (asc_dvc
->bios_ctrl
& BIOS_CTRL_RESET_SCSI_BUS
) {
15960 * If the BIOS Signature is present in memory, restore the
15961 * per TID microcode operating variables.
15963 if (bios_mem
[(ASC_MC_BIOS_SIGNATURE
- ASC_MC_BIOSMEM
) / 2] ==
15966 * Restore per TID negotiated values.
15968 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
15969 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
15970 AdvWriteWordLram(iop_base
, ASC_MC_PPR_ABLE
, ppr_able
);
15971 AdvWriteWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
,
15973 for (tid
= 0; tid
<= ASC_MAX_TID
; tid
++) {
15974 AdvWriteByteLram(iop_base
,
15975 ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
15979 if (AdvResetSB(asc_dvc
) != ADV_TRUE
) {
15980 warn_code
= ASC_WARN_BUSRESET_ERROR
;
15989 * Read the board's EEPROM configuration. Set fields in ADV_DVC_VAR and
15990 * ADV_DVC_CFG based on the EEPROM settings. The chip is stopped while
15991 * all of this is done.
15993 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
15995 * For a non-fatal error return a warning code. If there are no warnings
15996 * then 0 is returned.
15998 * Note: Chip is stopped on entry.
16000 static int __devinit
AdvInitFrom3550EEP(ADV_DVC_VAR
*asc_dvc
)
16002 AdvPortAddr iop_base
;
16004 ADVEEP_3550_CONFIG eep_config
;
16007 iop_base
= asc_dvc
->iop_base
;
16012 * Read the board's EEPROM configuration.
16014 * Set default values if a bad checksum is found.
16016 if (AdvGet3550EEPConfig(iop_base
, &eep_config
) != eep_config
.check_sum
) {
16017 warn_code
|= ASC_WARN_EEPROM_CHKSUM
;
16020 * Set EEPROM default values.
16022 for (i
= 0; i
< sizeof(ADVEEP_3550_CONFIG
); i
++) {
16023 *((uchar
*)&eep_config
+ i
) =
16024 *((uchar
*)&Default_3550_EEPROM_Config
+ i
);
16028 * Assume the 6 byte board serial number that was read
16029 * from EEPROM is correct even if the EEPROM checksum
16032 eep_config
.serial_number_word3
=
16033 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 1);
16035 eep_config
.serial_number_word2
=
16036 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 2);
16038 eep_config
.serial_number_word1
=
16039 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 3);
16041 AdvSet3550EEPConfig(iop_base
, &eep_config
);
16044 * Set ASC_DVC_VAR and ASC_DVC_CFG variables from the
16045 * EEPROM configuration that was read.
16047 * This is the mapping of EEPROM fields to Adv Library fields.
16049 asc_dvc
->wdtr_able
= eep_config
.wdtr_able
;
16050 asc_dvc
->sdtr_able
= eep_config
.sdtr_able
;
16051 asc_dvc
->ultra_able
= eep_config
.ultra_able
;
16052 asc_dvc
->tagqng_able
= eep_config
.tagqng_able
;
16053 asc_dvc
->cfg
->disc_enable
= eep_config
.disc_enable
;
16054 asc_dvc
->max_host_qng
= eep_config
.max_host_qng
;
16055 asc_dvc
->max_dvc_qng
= eep_config
.max_dvc_qng
;
16056 asc_dvc
->chip_scsi_id
= (eep_config
.adapter_scsi_id
& ADV_MAX_TID
);
16057 asc_dvc
->start_motor
= eep_config
.start_motor
;
16058 asc_dvc
->scsi_reset_wait
= eep_config
.scsi_reset_delay
;
16059 asc_dvc
->bios_ctrl
= eep_config
.bios_ctrl
;
16060 asc_dvc
->no_scam
= eep_config
.scam_tolerant
;
16061 asc_dvc
->cfg
->serial1
= eep_config
.serial_number_word1
;
16062 asc_dvc
->cfg
->serial2
= eep_config
.serial_number_word2
;
16063 asc_dvc
->cfg
->serial3
= eep_config
.serial_number_word3
;
16066 * Set the host maximum queuing (max. 253, min. 16) and the per device
16067 * maximum queuing (max. 63, min. 4).
16069 if (eep_config
.max_host_qng
> ASC_DEF_MAX_HOST_QNG
) {
16070 eep_config
.max_host_qng
= ASC_DEF_MAX_HOST_QNG
;
16071 } else if (eep_config
.max_host_qng
< ASC_DEF_MIN_HOST_QNG
) {
16072 /* If the value is zero, assume it is uninitialized. */
16073 if (eep_config
.max_host_qng
== 0) {
16074 eep_config
.max_host_qng
= ASC_DEF_MAX_HOST_QNG
;
16076 eep_config
.max_host_qng
= ASC_DEF_MIN_HOST_QNG
;
16080 if (eep_config
.max_dvc_qng
> ASC_DEF_MAX_DVC_QNG
) {
16081 eep_config
.max_dvc_qng
= ASC_DEF_MAX_DVC_QNG
;
16082 } else if (eep_config
.max_dvc_qng
< ASC_DEF_MIN_DVC_QNG
) {
16083 /* If the value is zero, assume it is uninitialized. */
16084 if (eep_config
.max_dvc_qng
== 0) {
16085 eep_config
.max_dvc_qng
= ASC_DEF_MAX_DVC_QNG
;
16087 eep_config
.max_dvc_qng
= ASC_DEF_MIN_DVC_QNG
;
16092 * If 'max_dvc_qng' is greater than 'max_host_qng', then
16093 * set 'max_dvc_qng' to 'max_host_qng'.
16095 if (eep_config
.max_dvc_qng
> eep_config
.max_host_qng
) {
16096 eep_config
.max_dvc_qng
= eep_config
.max_host_qng
;
16100 * Set ADV_DVC_VAR 'max_host_qng' and ADV_DVC_VAR 'max_dvc_qng'
16101 * values based on possibly adjusted EEPROM values.
16103 asc_dvc
->max_host_qng
= eep_config
.max_host_qng
;
16104 asc_dvc
->max_dvc_qng
= eep_config
.max_dvc_qng
;
16107 * If the EEPROM 'termination' field is set to automatic (0), then set
16108 * the ADV_DVC_CFG 'termination' field to automatic also.
16110 * If the termination is specified with a non-zero 'termination'
16111 * value check that a legal value is set and set the ADV_DVC_CFG
16112 * 'termination' field appropriately.
16114 if (eep_config
.termination
== 0) {
16115 asc_dvc
->cfg
->termination
= 0; /* auto termination */
16117 /* Enable manual control with low off / high off. */
16118 if (eep_config
.termination
== 1) {
16119 asc_dvc
->cfg
->termination
= TERM_CTL_SEL
;
16121 /* Enable manual control with low off / high on. */
16122 } else if (eep_config
.termination
== 2) {
16123 asc_dvc
->cfg
->termination
= TERM_CTL_SEL
| TERM_CTL_H
;
16125 /* Enable manual control with low on / high on. */
16126 } else if (eep_config
.termination
== 3) {
16127 asc_dvc
->cfg
->termination
=
16128 TERM_CTL_SEL
| TERM_CTL_H
| TERM_CTL_L
;
16131 * The EEPROM 'termination' field contains a bad value. Use
16132 * automatic termination instead.
16134 asc_dvc
->cfg
->termination
= 0;
16135 warn_code
|= ASC_WARN_EEPROM_TERMINATION
;
16143 * Read the board's EEPROM configuration. Set fields in ADV_DVC_VAR and
16144 * ADV_DVC_CFG based on the EEPROM settings. The chip is stopped while
16145 * all of this is done.
16147 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
16149 * For a non-fatal error return a warning code. If there are no warnings
16150 * then 0 is returned.
16152 * Note: Chip is stopped on entry.
16154 static int __devinit
AdvInitFrom38C0800EEP(ADV_DVC_VAR
*asc_dvc
)
16156 AdvPortAddr iop_base
;
16158 ADVEEP_38C0800_CONFIG eep_config
;
16160 uchar tid
, termination
;
16161 ushort sdtr_speed
= 0;
16163 iop_base
= asc_dvc
->iop_base
;
16168 * Read the board's EEPROM configuration.
16170 * Set default values if a bad checksum is found.
16172 if (AdvGet38C0800EEPConfig(iop_base
, &eep_config
) !=
16173 eep_config
.check_sum
) {
16174 warn_code
|= ASC_WARN_EEPROM_CHKSUM
;
16177 * Set EEPROM default values.
16179 for (i
= 0; i
< sizeof(ADVEEP_38C0800_CONFIG
); i
++) {
16180 *((uchar
*)&eep_config
+ i
) =
16181 *((uchar
*)&Default_38C0800_EEPROM_Config
+ i
);
16185 * Assume the 6 byte board serial number that was read
16186 * from EEPROM is correct even if the EEPROM checksum
16189 eep_config
.serial_number_word3
=
16190 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 1);
16192 eep_config
.serial_number_word2
=
16193 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 2);
16195 eep_config
.serial_number_word1
=
16196 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 3);
16198 AdvSet38C0800EEPConfig(iop_base
, &eep_config
);
16201 * Set ADV_DVC_VAR and ADV_DVC_CFG variables from the
16202 * EEPROM configuration that was read.
16204 * This is the mapping of EEPROM fields to Adv Library fields.
16206 asc_dvc
->wdtr_able
= eep_config
.wdtr_able
;
16207 asc_dvc
->sdtr_speed1
= eep_config
.sdtr_speed1
;
16208 asc_dvc
->sdtr_speed2
= eep_config
.sdtr_speed2
;
16209 asc_dvc
->sdtr_speed3
= eep_config
.sdtr_speed3
;
16210 asc_dvc
->sdtr_speed4
= eep_config
.sdtr_speed4
;
16211 asc_dvc
->tagqng_able
= eep_config
.tagqng_able
;
16212 asc_dvc
->cfg
->disc_enable
= eep_config
.disc_enable
;
16213 asc_dvc
->max_host_qng
= eep_config
.max_host_qng
;
16214 asc_dvc
->max_dvc_qng
= eep_config
.max_dvc_qng
;
16215 asc_dvc
->chip_scsi_id
= (eep_config
.adapter_scsi_id
& ADV_MAX_TID
);
16216 asc_dvc
->start_motor
= eep_config
.start_motor
;
16217 asc_dvc
->scsi_reset_wait
= eep_config
.scsi_reset_delay
;
16218 asc_dvc
->bios_ctrl
= eep_config
.bios_ctrl
;
16219 asc_dvc
->no_scam
= eep_config
.scam_tolerant
;
16220 asc_dvc
->cfg
->serial1
= eep_config
.serial_number_word1
;
16221 asc_dvc
->cfg
->serial2
= eep_config
.serial_number_word2
;
16222 asc_dvc
->cfg
->serial3
= eep_config
.serial_number_word3
;
16225 * For every Target ID if any of its 'sdtr_speed[1234]' bits
16226 * are set, then set an 'sdtr_able' bit for it.
16228 asc_dvc
->sdtr_able
= 0;
16229 for (tid
= 0; tid
<= ADV_MAX_TID
; tid
++) {
16231 sdtr_speed
= asc_dvc
->sdtr_speed1
;
16232 } else if (tid
== 4) {
16233 sdtr_speed
= asc_dvc
->sdtr_speed2
;
16234 } else if (tid
== 8) {
16235 sdtr_speed
= asc_dvc
->sdtr_speed3
;
16236 } else if (tid
== 12) {
16237 sdtr_speed
= asc_dvc
->sdtr_speed4
;
16239 if (sdtr_speed
& ADV_MAX_TID
) {
16240 asc_dvc
->sdtr_able
|= (1 << tid
);
16246 * Set the host maximum queuing (max. 253, min. 16) and the per device
16247 * maximum queuing (max. 63, min. 4).
16249 if (eep_config
.max_host_qng
> ASC_DEF_MAX_HOST_QNG
) {
16250 eep_config
.max_host_qng
= ASC_DEF_MAX_HOST_QNG
;
16251 } else if (eep_config
.max_host_qng
< ASC_DEF_MIN_HOST_QNG
) {
16252 /* If the value is zero, assume it is uninitialized. */
16253 if (eep_config
.max_host_qng
== 0) {
16254 eep_config
.max_host_qng
= ASC_DEF_MAX_HOST_QNG
;
16256 eep_config
.max_host_qng
= ASC_DEF_MIN_HOST_QNG
;
16260 if (eep_config
.max_dvc_qng
> ASC_DEF_MAX_DVC_QNG
) {
16261 eep_config
.max_dvc_qng
= ASC_DEF_MAX_DVC_QNG
;
16262 } else if (eep_config
.max_dvc_qng
< ASC_DEF_MIN_DVC_QNG
) {
16263 /* If the value is zero, assume it is uninitialized. */
16264 if (eep_config
.max_dvc_qng
== 0) {
16265 eep_config
.max_dvc_qng
= ASC_DEF_MAX_DVC_QNG
;
16267 eep_config
.max_dvc_qng
= ASC_DEF_MIN_DVC_QNG
;
16272 * If 'max_dvc_qng' is greater than 'max_host_qng', then
16273 * set 'max_dvc_qng' to 'max_host_qng'.
16275 if (eep_config
.max_dvc_qng
> eep_config
.max_host_qng
) {
16276 eep_config
.max_dvc_qng
= eep_config
.max_host_qng
;
16280 * Set ADV_DVC_VAR 'max_host_qng' and ADV_DVC_VAR 'max_dvc_qng'
16281 * values based on possibly adjusted EEPROM values.
16283 asc_dvc
->max_host_qng
= eep_config
.max_host_qng
;
16284 asc_dvc
->max_dvc_qng
= eep_config
.max_dvc_qng
;
16287 * If the EEPROM 'termination' field is set to automatic (0), then set
16288 * the ADV_DVC_CFG 'termination' field to automatic also.
16290 * If the termination is specified with a non-zero 'termination'
16291 * value check that a legal value is set and set the ADV_DVC_CFG
16292 * 'termination' field appropriately.
16294 if (eep_config
.termination_se
== 0) {
16295 termination
= 0; /* auto termination for SE */
16297 /* Enable manual control with low off / high off. */
16298 if (eep_config
.termination_se
== 1) {
16301 /* Enable manual control with low off / high on. */
16302 } else if (eep_config
.termination_se
== 2) {
16303 termination
= TERM_SE_HI
;
16305 /* Enable manual control with low on / high on. */
16306 } else if (eep_config
.termination_se
== 3) {
16307 termination
= TERM_SE
;
16310 * The EEPROM 'termination_se' field contains a bad value.
16311 * Use automatic termination instead.
16314 warn_code
|= ASC_WARN_EEPROM_TERMINATION
;
16318 if (eep_config
.termination_lvd
== 0) {
16319 asc_dvc
->cfg
->termination
= termination
; /* auto termination for LVD */
16321 /* Enable manual control with low off / high off. */
16322 if (eep_config
.termination_lvd
== 1) {
16323 asc_dvc
->cfg
->termination
= termination
;
16325 /* Enable manual control with low off / high on. */
16326 } else if (eep_config
.termination_lvd
== 2) {
16327 asc_dvc
->cfg
->termination
= termination
| TERM_LVD_HI
;
16329 /* Enable manual control with low on / high on. */
16330 } else if (eep_config
.termination_lvd
== 3) {
16331 asc_dvc
->cfg
->termination
= termination
| TERM_LVD
;
16334 * The EEPROM 'termination_lvd' field contains a bad value.
16335 * Use automatic termination instead.
16337 asc_dvc
->cfg
->termination
= termination
;
16338 warn_code
|= ASC_WARN_EEPROM_TERMINATION
;
16346 * Read the board's EEPROM configuration. Set fields in ASC_DVC_VAR and
16347 * ASC_DVC_CFG based on the EEPROM settings. The chip is stopped while
16348 * all of this is done.
16350 * On failure set the ASC_DVC_VAR field 'err_code' and return ADV_ERROR.
16352 * For a non-fatal error return a warning code. If there are no warnings
16353 * then 0 is returned.
16355 * Note: Chip is stopped on entry.
16357 static int __devinit
AdvInitFrom38C1600EEP(ADV_DVC_VAR
*asc_dvc
)
16359 AdvPortAddr iop_base
;
16361 ADVEEP_38C1600_CONFIG eep_config
;
16363 uchar tid
, termination
;
16364 ushort sdtr_speed
= 0;
16366 iop_base
= asc_dvc
->iop_base
;
16371 * Read the board's EEPROM configuration.
16373 * Set default values if a bad checksum is found.
16375 if (AdvGet38C1600EEPConfig(iop_base
, &eep_config
) !=
16376 eep_config
.check_sum
) {
16377 warn_code
|= ASC_WARN_EEPROM_CHKSUM
;
16380 * Set EEPROM default values.
16382 for (i
= 0; i
< sizeof(ADVEEP_38C1600_CONFIG
); i
++) {
16384 && ASC_PCI_ID2FUNC(asc_dvc
->cfg
->pci_slot_info
) !=
16387 * Set Function 1 EEPROM Word 0 MSB
16389 * Clear the BIOS_ENABLE (bit 14) and INTAB (bit 11)
16392 * Disable Bit 14 (BIOS_ENABLE) to fix SPARC Ultra 60 and
16393 * old Mac system booting problem. The Expansion ROM must
16394 * be disabled in Function 1 for these systems.
16397 *((uchar
*)&eep_config
+ i
) =
16399 ((uchar
*)&Default_38C1600_EEPROM_Config
16403 (((ADV_EEPROM_BIOS_ENABLE
|
16404 ADV_EEPROM_INTAB
) >> 8) & 0xFF)));
16407 * Set the INTAB (bit 11) if the GPIO 0 input indicates
16408 * the Function 1 interrupt line is wired to INTA.
16410 * Set/Clear Bit 11 (INTAB) from the GPIO bit 0 input:
16411 * 1 - Function 1 interrupt line wired to INT A.
16412 * 0 - Function 1 interrupt line wired to INT B.
16414 * Note: Adapter boards always have Function 0 wired to INTA.
16415 * Put all 5 GPIO bits in input mode and then read
16416 * their input values.
16418 AdvWriteByteRegister(iop_base
, IOPB_GPIO_CNTL
,
16420 if (AdvReadByteRegister
16421 (iop_base
, IOPB_GPIO_DATA
) & 0x01) {
16422 /* Function 1 interrupt wired to INTA; Set EEPROM bit. */
16423 *((uchar
*)&eep_config
+ i
) |=
16424 ((ADV_EEPROM_INTAB
>> 8) & 0xFF);
16427 *((uchar
*)&eep_config
+ i
) =
16428 *((uchar
*)&Default_38C1600_EEPROM_Config
16434 * Assume the 6 byte board serial number that was read
16435 * from EEPROM is correct even if the EEPROM checksum
16438 eep_config
.serial_number_word3
=
16439 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 1);
16441 eep_config
.serial_number_word2
=
16442 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 2);
16444 eep_config
.serial_number_word1
=
16445 AdvReadEEPWord(iop_base
, ADV_EEP_DVC_CFG_END
- 3);
16447 AdvSet38C1600EEPConfig(iop_base
, &eep_config
);
16451 * Set ASC_DVC_VAR and ASC_DVC_CFG variables from the
16452 * EEPROM configuration that was read.
16454 * This is the mapping of EEPROM fields to Adv Library fields.
16456 asc_dvc
->wdtr_able
= eep_config
.wdtr_able
;
16457 asc_dvc
->sdtr_speed1
= eep_config
.sdtr_speed1
;
16458 asc_dvc
->sdtr_speed2
= eep_config
.sdtr_speed2
;
16459 asc_dvc
->sdtr_speed3
= eep_config
.sdtr_speed3
;
16460 asc_dvc
->sdtr_speed4
= eep_config
.sdtr_speed4
;
16461 asc_dvc
->ppr_able
= 0;
16462 asc_dvc
->tagqng_able
= eep_config
.tagqng_able
;
16463 asc_dvc
->cfg
->disc_enable
= eep_config
.disc_enable
;
16464 asc_dvc
->max_host_qng
= eep_config
.max_host_qng
;
16465 asc_dvc
->max_dvc_qng
= eep_config
.max_dvc_qng
;
16466 asc_dvc
->chip_scsi_id
= (eep_config
.adapter_scsi_id
& ASC_MAX_TID
);
16467 asc_dvc
->start_motor
= eep_config
.start_motor
;
16468 asc_dvc
->scsi_reset_wait
= eep_config
.scsi_reset_delay
;
16469 asc_dvc
->bios_ctrl
= eep_config
.bios_ctrl
;
16470 asc_dvc
->no_scam
= eep_config
.scam_tolerant
;
16473 * For every Target ID if any of its 'sdtr_speed[1234]' bits
16474 * are set, then set an 'sdtr_able' bit for it.
16476 asc_dvc
->sdtr_able
= 0;
16477 for (tid
= 0; tid
<= ASC_MAX_TID
; tid
++) {
16479 sdtr_speed
= asc_dvc
->sdtr_speed1
;
16480 } else if (tid
== 4) {
16481 sdtr_speed
= asc_dvc
->sdtr_speed2
;
16482 } else if (tid
== 8) {
16483 sdtr_speed
= asc_dvc
->sdtr_speed3
;
16484 } else if (tid
== 12) {
16485 sdtr_speed
= asc_dvc
->sdtr_speed4
;
16487 if (sdtr_speed
& ASC_MAX_TID
) {
16488 asc_dvc
->sdtr_able
|= (1 << tid
);
16494 * Set the host maximum queuing (max. 253, min. 16) and the per device
16495 * maximum queuing (max. 63, min. 4).
16497 if (eep_config
.max_host_qng
> ASC_DEF_MAX_HOST_QNG
) {
16498 eep_config
.max_host_qng
= ASC_DEF_MAX_HOST_QNG
;
16499 } else if (eep_config
.max_host_qng
< ASC_DEF_MIN_HOST_QNG
) {
16500 /* If the value is zero, assume it is uninitialized. */
16501 if (eep_config
.max_host_qng
== 0) {
16502 eep_config
.max_host_qng
= ASC_DEF_MAX_HOST_QNG
;
16504 eep_config
.max_host_qng
= ASC_DEF_MIN_HOST_QNG
;
16508 if (eep_config
.max_dvc_qng
> ASC_DEF_MAX_DVC_QNG
) {
16509 eep_config
.max_dvc_qng
= ASC_DEF_MAX_DVC_QNG
;
16510 } else if (eep_config
.max_dvc_qng
< ASC_DEF_MIN_DVC_QNG
) {
16511 /* If the value is zero, assume it is uninitialized. */
16512 if (eep_config
.max_dvc_qng
== 0) {
16513 eep_config
.max_dvc_qng
= ASC_DEF_MAX_DVC_QNG
;
16515 eep_config
.max_dvc_qng
= ASC_DEF_MIN_DVC_QNG
;
16520 * If 'max_dvc_qng' is greater than 'max_host_qng', then
16521 * set 'max_dvc_qng' to 'max_host_qng'.
16523 if (eep_config
.max_dvc_qng
> eep_config
.max_host_qng
) {
16524 eep_config
.max_dvc_qng
= eep_config
.max_host_qng
;
16528 * Set ASC_DVC_VAR 'max_host_qng' and ASC_DVC_VAR 'max_dvc_qng'
16529 * values based on possibly adjusted EEPROM values.
16531 asc_dvc
->max_host_qng
= eep_config
.max_host_qng
;
16532 asc_dvc
->max_dvc_qng
= eep_config
.max_dvc_qng
;
16535 * If the EEPROM 'termination' field is set to automatic (0), then set
16536 * the ASC_DVC_CFG 'termination' field to automatic also.
16538 * If the termination is specified with a non-zero 'termination'
16539 * value check that a legal value is set and set the ASC_DVC_CFG
16540 * 'termination' field appropriately.
16542 if (eep_config
.termination_se
== 0) {
16543 termination
= 0; /* auto termination for SE */
16545 /* Enable manual control with low off / high off. */
16546 if (eep_config
.termination_se
== 1) {
16549 /* Enable manual control with low off / high on. */
16550 } else if (eep_config
.termination_se
== 2) {
16551 termination
= TERM_SE_HI
;
16553 /* Enable manual control with low on / high on. */
16554 } else if (eep_config
.termination_se
== 3) {
16555 termination
= TERM_SE
;
16558 * The EEPROM 'termination_se' field contains a bad value.
16559 * Use automatic termination instead.
16562 warn_code
|= ASC_WARN_EEPROM_TERMINATION
;
16566 if (eep_config
.termination_lvd
== 0) {
16567 asc_dvc
->cfg
->termination
= termination
; /* auto termination for LVD */
16569 /* Enable manual control with low off / high off. */
16570 if (eep_config
.termination_lvd
== 1) {
16571 asc_dvc
->cfg
->termination
= termination
;
16573 /* Enable manual control with low off / high on. */
16574 } else if (eep_config
.termination_lvd
== 2) {
16575 asc_dvc
->cfg
->termination
= termination
| TERM_LVD_HI
;
16577 /* Enable manual control with low on / high on. */
16578 } else if (eep_config
.termination_lvd
== 3) {
16579 asc_dvc
->cfg
->termination
= termination
| TERM_LVD
;
16582 * The EEPROM 'termination_lvd' field contains a bad value.
16583 * Use automatic termination instead.
16585 asc_dvc
->cfg
->termination
= termination
;
16586 warn_code
|= ASC_WARN_EEPROM_TERMINATION
;
16594 * Read EEPROM configuration into the specified buffer.
16596 * Return a checksum based on the EEPROM configuration read.
16598 static ushort __devinit
16599 AdvGet3550EEPConfig(AdvPortAddr iop_base
, ADVEEP_3550_CONFIG
*cfg_buf
)
16601 ushort wval
, chksum
;
16604 ushort
*charfields
;
16606 charfields
= (ushort
*)&ADVEEP_3550_Config_Field_IsChar
;
16607 wbuf
= (ushort
*)cfg_buf
;
16610 for (eep_addr
= ADV_EEP_DVC_CFG_BEGIN
;
16611 eep_addr
< ADV_EEP_DVC_CFG_END
; eep_addr
++, wbuf
++) {
16612 wval
= AdvReadEEPWord(iop_base
, eep_addr
);
16613 chksum
+= wval
; /* Checksum is calculated from word values. */
16614 if (*charfields
++) {
16615 *wbuf
= le16_to_cpu(wval
);
16620 /* Read checksum word. */
16621 *wbuf
= AdvReadEEPWord(iop_base
, eep_addr
);
16625 /* Read rest of EEPROM not covered by the checksum. */
16626 for (eep_addr
= ADV_EEP_DVC_CTL_BEGIN
;
16627 eep_addr
< ADV_EEP_MAX_WORD_ADDR
; eep_addr
++, wbuf
++) {
16628 *wbuf
= AdvReadEEPWord(iop_base
, eep_addr
);
16629 if (*charfields
++) {
16630 *wbuf
= le16_to_cpu(*wbuf
);
16637 * Read EEPROM configuration into the specified buffer.
16639 * Return a checksum based on the EEPROM configuration read.
16641 static ushort __devinit
16642 AdvGet38C0800EEPConfig(AdvPortAddr iop_base
, ADVEEP_38C0800_CONFIG
*cfg_buf
)
16644 ushort wval
, chksum
;
16647 ushort
*charfields
;
16649 charfields
= (ushort
*)&ADVEEP_38C0800_Config_Field_IsChar
;
16650 wbuf
= (ushort
*)cfg_buf
;
16653 for (eep_addr
= ADV_EEP_DVC_CFG_BEGIN
;
16654 eep_addr
< ADV_EEP_DVC_CFG_END
; eep_addr
++, wbuf
++) {
16655 wval
= AdvReadEEPWord(iop_base
, eep_addr
);
16656 chksum
+= wval
; /* Checksum is calculated from word values. */
16657 if (*charfields
++) {
16658 *wbuf
= le16_to_cpu(wval
);
16663 /* Read checksum word. */
16664 *wbuf
= AdvReadEEPWord(iop_base
, eep_addr
);
16668 /* Read rest of EEPROM not covered by the checksum. */
16669 for (eep_addr
= ADV_EEP_DVC_CTL_BEGIN
;
16670 eep_addr
< ADV_EEP_MAX_WORD_ADDR
; eep_addr
++, wbuf
++) {
16671 *wbuf
= AdvReadEEPWord(iop_base
, eep_addr
);
16672 if (*charfields
++) {
16673 *wbuf
= le16_to_cpu(*wbuf
);
16680 * Read EEPROM configuration into the specified buffer.
16682 * Return a checksum based on the EEPROM configuration read.
16684 static ushort __devinit
16685 AdvGet38C1600EEPConfig(AdvPortAddr iop_base
, ADVEEP_38C1600_CONFIG
*cfg_buf
)
16687 ushort wval
, chksum
;
16690 ushort
*charfields
;
16692 charfields
= (ushort
*)&ADVEEP_38C1600_Config_Field_IsChar
;
16693 wbuf
= (ushort
*)cfg_buf
;
16696 for (eep_addr
= ADV_EEP_DVC_CFG_BEGIN
;
16697 eep_addr
< ADV_EEP_DVC_CFG_END
; eep_addr
++, wbuf
++) {
16698 wval
= AdvReadEEPWord(iop_base
, eep_addr
);
16699 chksum
+= wval
; /* Checksum is calculated from word values. */
16700 if (*charfields
++) {
16701 *wbuf
= le16_to_cpu(wval
);
16706 /* Read checksum word. */
16707 *wbuf
= AdvReadEEPWord(iop_base
, eep_addr
);
16711 /* Read rest of EEPROM not covered by the checksum. */
16712 for (eep_addr
= ADV_EEP_DVC_CTL_BEGIN
;
16713 eep_addr
< ADV_EEP_MAX_WORD_ADDR
; eep_addr
++, wbuf
++) {
16714 *wbuf
= AdvReadEEPWord(iop_base
, eep_addr
);
16715 if (*charfields
++) {
16716 *wbuf
= le16_to_cpu(*wbuf
);
16723 * Read the EEPROM from specified location
16725 static ushort __devinit
AdvReadEEPWord(AdvPortAddr iop_base
, int eep_word_addr
)
16727 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
,
16728 ASC_EEP_CMD_READ
| eep_word_addr
);
16729 AdvWaitEEPCmd(iop_base
);
16730 return AdvReadWordRegister(iop_base
, IOPW_EE_DATA
);
16734 * Wait for EEPROM command to complete
16736 static void __devinit
AdvWaitEEPCmd(AdvPortAddr iop_base
)
16740 for (eep_delay_ms
= 0; eep_delay_ms
< ADV_EEP_DELAY_MS
; eep_delay_ms
++) {
16741 if (AdvReadWordRegister(iop_base
, IOPW_EE_CMD
) &
16742 ASC_EEP_CMD_DONE
) {
16745 DvcSleepMilliSecond(1);
16747 if ((AdvReadWordRegister(iop_base
, IOPW_EE_CMD
) & ASC_EEP_CMD_DONE
) ==
16755 * Write the EEPROM from 'cfg_buf'.
16758 AdvSet3550EEPConfig(AdvPortAddr iop_base
, ADVEEP_3550_CONFIG
*cfg_buf
)
16761 ushort addr
, chksum
;
16762 ushort
*charfields
;
16764 wbuf
= (ushort
*)cfg_buf
;
16765 charfields
= (ushort
*)&ADVEEP_3550_Config_Field_IsChar
;
16768 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE_ABLE
);
16769 AdvWaitEEPCmd(iop_base
);
16772 * Write EEPROM from word 0 to word 20.
16774 for (addr
= ADV_EEP_DVC_CFG_BEGIN
;
16775 addr
< ADV_EEP_DVC_CFG_END
; addr
++, wbuf
++) {
16778 if (*charfields
++) {
16779 word
= cpu_to_le16(*wbuf
);
16783 chksum
+= *wbuf
; /* Checksum is calculated from word values. */
16784 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, word
);
16785 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
,
16786 ASC_EEP_CMD_WRITE
| addr
);
16787 AdvWaitEEPCmd(iop_base
);
16788 DvcSleepMilliSecond(ADV_EEP_DELAY_MS
);
16792 * Write EEPROM checksum at word 21.
16794 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, chksum
);
16795 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE
| addr
);
16796 AdvWaitEEPCmd(iop_base
);
16801 * Write EEPROM OEM name at words 22 to 29.
16803 for (addr
= ADV_EEP_DVC_CTL_BEGIN
;
16804 addr
< ADV_EEP_MAX_WORD_ADDR
; addr
++, wbuf
++) {
16807 if (*charfields
++) {
16808 word
= cpu_to_le16(*wbuf
);
16812 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, word
);
16813 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
,
16814 ASC_EEP_CMD_WRITE
| addr
);
16815 AdvWaitEEPCmd(iop_base
);
16817 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE_DISABLE
);
16818 AdvWaitEEPCmd(iop_base
);
16823 * Write the EEPROM from 'cfg_buf'.
16826 AdvSet38C0800EEPConfig(AdvPortAddr iop_base
, ADVEEP_38C0800_CONFIG
*cfg_buf
)
16829 ushort
*charfields
;
16830 ushort addr
, chksum
;
16832 wbuf
= (ushort
*)cfg_buf
;
16833 charfields
= (ushort
*)&ADVEEP_38C0800_Config_Field_IsChar
;
16836 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE_ABLE
);
16837 AdvWaitEEPCmd(iop_base
);
16840 * Write EEPROM from word 0 to word 20.
16842 for (addr
= ADV_EEP_DVC_CFG_BEGIN
;
16843 addr
< ADV_EEP_DVC_CFG_END
; addr
++, wbuf
++) {
16846 if (*charfields
++) {
16847 word
= cpu_to_le16(*wbuf
);
16851 chksum
+= *wbuf
; /* Checksum is calculated from word values. */
16852 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, word
);
16853 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
,
16854 ASC_EEP_CMD_WRITE
| addr
);
16855 AdvWaitEEPCmd(iop_base
);
16856 DvcSleepMilliSecond(ADV_EEP_DELAY_MS
);
16860 * Write EEPROM checksum at word 21.
16862 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, chksum
);
16863 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE
| addr
);
16864 AdvWaitEEPCmd(iop_base
);
16869 * Write EEPROM OEM name at words 22 to 29.
16871 for (addr
= ADV_EEP_DVC_CTL_BEGIN
;
16872 addr
< ADV_EEP_MAX_WORD_ADDR
; addr
++, wbuf
++) {
16875 if (*charfields
++) {
16876 word
= cpu_to_le16(*wbuf
);
16880 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, word
);
16881 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
,
16882 ASC_EEP_CMD_WRITE
| addr
);
16883 AdvWaitEEPCmd(iop_base
);
16885 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE_DISABLE
);
16886 AdvWaitEEPCmd(iop_base
);
16891 * Write the EEPROM from 'cfg_buf'.
16894 AdvSet38C1600EEPConfig(AdvPortAddr iop_base
, ADVEEP_38C1600_CONFIG
*cfg_buf
)
16897 ushort
*charfields
;
16898 ushort addr
, chksum
;
16900 wbuf
= (ushort
*)cfg_buf
;
16901 charfields
= (ushort
*)&ADVEEP_38C1600_Config_Field_IsChar
;
16904 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE_ABLE
);
16905 AdvWaitEEPCmd(iop_base
);
16908 * Write EEPROM from word 0 to word 20.
16910 for (addr
= ADV_EEP_DVC_CFG_BEGIN
;
16911 addr
< ADV_EEP_DVC_CFG_END
; addr
++, wbuf
++) {
16914 if (*charfields
++) {
16915 word
= cpu_to_le16(*wbuf
);
16919 chksum
+= *wbuf
; /* Checksum is calculated from word values. */
16920 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, word
);
16921 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
,
16922 ASC_EEP_CMD_WRITE
| addr
);
16923 AdvWaitEEPCmd(iop_base
);
16924 DvcSleepMilliSecond(ADV_EEP_DELAY_MS
);
16928 * Write EEPROM checksum at word 21.
16930 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, chksum
);
16931 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE
| addr
);
16932 AdvWaitEEPCmd(iop_base
);
16937 * Write EEPROM OEM name at words 22 to 29.
16939 for (addr
= ADV_EEP_DVC_CTL_BEGIN
;
16940 addr
< ADV_EEP_MAX_WORD_ADDR
; addr
++, wbuf
++) {
16943 if (*charfields
++) {
16944 word
= cpu_to_le16(*wbuf
);
16948 AdvWriteWordRegister(iop_base
, IOPW_EE_DATA
, word
);
16949 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
,
16950 ASC_EEP_CMD_WRITE
| addr
);
16951 AdvWaitEEPCmd(iop_base
);
16953 AdvWriteWordRegister(iop_base
, IOPW_EE_CMD
, ASC_EEP_CMD_WRITE_DISABLE
);
16954 AdvWaitEEPCmd(iop_base
);
16960 * AdvExeScsiQueue() - Send a request to the RISC microcode program.
16962 * Allocate a carrier structure, point the carrier to the ADV_SCSI_REQ_Q,
16963 * add the carrier to the ICQ (Initiator Command Queue), and tickle the
16964 * RISC to notify it a new command is ready to be executed.
16966 * If 'done_status' is not set to QD_DO_RETRY, then 'error_retry' will be
16967 * set to SCSI_MAX_RETRY.
16969 * Multi-byte fields in the ASC_SCSI_REQ_Q that are used by the microcode
16970 * for DMA addresses or math operations are byte swapped to little-endian
16974 * ADV_SUCCESS(1) - The request was successfully queued.
16975 * ADV_BUSY(0) - Resource unavailable; Retry again after pending
16976 * request completes.
16977 * ADV_ERROR(-1) - Invalid ADV_SCSI_REQ_Q request structure
16980 static int AdvExeScsiQueue(ADV_DVC_VAR
*asc_dvc
, ADV_SCSI_REQ_Q
*scsiq
)
16982 ulong last_int_level
;
16983 AdvPortAddr iop_base
;
16985 ADV_PADDR req_paddr
;
16986 ADV_CARR_T
*new_carrp
;
16988 ASC_ASSERT(scsiq
!= NULL
); /* 'scsiq' should never be NULL. */
16991 * The ADV_SCSI_REQ_Q 'target_id' field should never exceed ADV_MAX_TID.
16993 if (scsiq
->target_id
> ADV_MAX_TID
) {
16994 scsiq
->host_status
= QHSTA_M_INVALID_DEVICE
;
16995 scsiq
->done_status
= QD_WITH_ERROR
;
16999 iop_base
= asc_dvc
->iop_base
;
17001 last_int_level
= DvcEnterCritical();
17004 * Allocate a carrier ensuring at least one carrier always
17005 * remains on the freelist and initialize fields.
17007 if ((new_carrp
= asc_dvc
->carr_freelist
) == NULL
) {
17008 DvcLeaveCritical(last_int_level
);
17011 asc_dvc
->carr_freelist
= (ADV_CARR_T
*)
17012 ADV_U32_TO_VADDR(le32_to_cpu(new_carrp
->next_vpa
));
17013 asc_dvc
->carr_pending_cnt
++;
17016 * Set the carrier to be a stopper by setting 'next_vpa'
17017 * to the stopper value. The current stopper will be changed
17018 * below to point to the new stopper.
17020 new_carrp
->next_vpa
= cpu_to_le32(ASC_CQ_STOPPER
);
17023 * Clear the ADV_SCSI_REQ_Q done flag.
17025 scsiq
->a_flag
&= ~ADV_SCSIQ_DONE
;
17027 req_size
= sizeof(ADV_SCSI_REQ_Q
);
17028 req_paddr
= DvcGetPhyAddr(asc_dvc
, scsiq
, (uchar
*)scsiq
,
17029 (ADV_SDCNT
*)&req_size
, ADV_IS_SCSIQ_FLAG
);
17031 ASC_ASSERT(ADV_32BALIGN(req_paddr
) == req_paddr
);
17032 ASC_ASSERT(req_size
>= sizeof(ADV_SCSI_REQ_Q
));
17034 /* Wait for assertion before making little-endian */
17035 req_paddr
= cpu_to_le32(req_paddr
);
17037 /* Save virtual and physical address of ADV_SCSI_REQ_Q and carrier. */
17038 scsiq
->scsiq_ptr
= cpu_to_le32(ADV_VADDR_TO_U32(scsiq
));
17039 scsiq
->scsiq_rptr
= req_paddr
;
17041 scsiq
->carr_va
= cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc
->icq_sp
));
17043 * Every ADV_CARR_T.carr_pa is byte swapped to little-endian
17044 * order during initialization.
17046 scsiq
->carr_pa
= asc_dvc
->icq_sp
->carr_pa
;
17049 * Use the current stopper to send the ADV_SCSI_REQ_Q command to
17050 * the microcode. The newly allocated stopper will become the new
17053 asc_dvc
->icq_sp
->areq_vpa
= req_paddr
;
17056 * Set the 'next_vpa' pointer for the old stopper to be the
17057 * physical address of the new stopper. The RISC can only
17058 * follow physical addresses.
17060 asc_dvc
->icq_sp
->next_vpa
= new_carrp
->carr_pa
;
17063 * Set the host adapter stopper pointer to point to the new carrier.
17065 asc_dvc
->icq_sp
= new_carrp
;
17067 if (asc_dvc
->chip_type
== ADV_CHIP_ASC3550
||
17068 asc_dvc
->chip_type
== ADV_CHIP_ASC38C0800
) {
17070 * Tickle the RISC to tell it to read its Command Queue Head pointer.
17072 AdvWriteByteRegister(iop_base
, IOPB_TICKLE
, ADV_TICKLE_A
);
17073 if (asc_dvc
->chip_type
== ADV_CHIP_ASC3550
) {
17075 * Clear the tickle value. In the ASC-3550 the RISC flag
17076 * command 'clr_tickle_a' does not work unless the host
17077 * value is cleared.
17079 AdvWriteByteRegister(iop_base
, IOPB_TICKLE
,
17082 } else if (asc_dvc
->chip_type
== ADV_CHIP_ASC38C1600
) {
17084 * Notify the RISC a carrier is ready by writing the physical
17085 * address of the new carrier stopper to the COMMA register.
17087 AdvWriteDWordRegister(iop_base
, IOPDW_COMMA
,
17088 le32_to_cpu(new_carrp
->carr_pa
));
17091 DvcLeaveCritical(last_int_level
);
17093 return ADV_SUCCESS
;
17097 * Reset SCSI Bus and purge all outstanding requests.
17100 * ADV_TRUE(1) - All requests are purged and SCSI Bus is reset.
17101 * ADV_FALSE(0) - Microcode command failed.
17102 * ADV_ERROR(-1) - Microcode command timed-out. Microcode or IC
17103 * may be hung which requires driver recovery.
17105 static int AdvResetSB(ADV_DVC_VAR
*asc_dvc
)
17110 * Send the SCSI Bus Reset idle start idle command which asserts
17111 * the SCSI Bus Reset signal.
17113 status
= AdvSendIdleCmd(asc_dvc
, (ushort
)IDLE_CMD_SCSI_RESET_START
, 0L);
17114 if (status
!= ADV_TRUE
) {
17119 * Delay for the specified SCSI Bus Reset hold time.
17121 * The hold time delay is done on the host because the RISC has no
17122 * microsecond accurate timer.
17124 DvcDelayMicroSecond(asc_dvc
, (ushort
)ASC_SCSI_RESET_HOLD_TIME_US
);
17127 * Send the SCSI Bus Reset end idle command which de-asserts
17128 * the SCSI Bus Reset signal and purges any pending requests.
17130 status
= AdvSendIdleCmd(asc_dvc
, (ushort
)IDLE_CMD_SCSI_RESET_END
, 0L);
17131 if (status
!= ADV_TRUE
) {
17135 DvcSleepMilliSecond((ADV_DCNT
)asc_dvc
->scsi_reset_wait
* 1000);
17141 * Reset chip and SCSI Bus.
17144 * ADV_TRUE(1) - Chip re-initialization and SCSI Bus Reset successful.
17145 * ADV_FALSE(0) - Chip re-initialization and SCSI Bus Reset failure.
17147 static int AdvResetChipAndSB(ADV_DVC_VAR
*asc_dvc
)
17150 ushort wdtr_able
, sdtr_able
, tagqng_able
;
17151 ushort ppr_able
= 0;
17152 uchar tid
, max_cmd
[ADV_MAX_TID
+ 1];
17153 AdvPortAddr iop_base
;
17156 iop_base
= asc_dvc
->iop_base
;
17159 * Save current per TID negotiated values.
17161 AdvReadWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
17162 AdvReadWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
17163 if (asc_dvc
->chip_type
== ADV_CHIP_ASC38C1600
) {
17164 AdvReadWordLram(iop_base
, ASC_MC_PPR_ABLE
, ppr_able
);
17166 AdvReadWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
, tagqng_able
);
17167 for (tid
= 0; tid
<= ADV_MAX_TID
; tid
++) {
17168 AdvReadByteLram(iop_base
, ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
17173 * Force the AdvInitAsc3550/38C0800Driver() function to
17174 * perform a SCSI Bus Reset by clearing the BIOS signature word.
17175 * The initialization functions assumes a SCSI Bus Reset is not
17176 * needed if the BIOS signature word is present.
17178 AdvReadWordLram(iop_base
, ASC_MC_BIOS_SIGNATURE
, bios_sig
);
17179 AdvWriteWordLram(iop_base
, ASC_MC_BIOS_SIGNATURE
, 0);
17182 * Stop chip and reset it.
17184 AdvWriteWordRegister(iop_base
, IOPW_RISC_CSR
, ADV_RISC_CSR_STOP
);
17185 AdvWriteWordRegister(iop_base
, IOPW_CTRL_REG
, ADV_CTRL_REG_CMD_RESET
);
17186 DvcSleepMilliSecond(100);
17187 AdvWriteWordRegister(iop_base
, IOPW_CTRL_REG
,
17188 ADV_CTRL_REG_CMD_WR_IO_REG
);
17191 * Reset Adv Library error code, if any, and try
17192 * re-initializing the chip.
17194 asc_dvc
->err_code
= 0;
17195 if (asc_dvc
->chip_type
== ADV_CHIP_ASC38C1600
) {
17196 status
= AdvInitAsc38C1600Driver(asc_dvc
);
17197 } else if (asc_dvc
->chip_type
== ADV_CHIP_ASC38C0800
) {
17198 status
= AdvInitAsc38C0800Driver(asc_dvc
);
17200 status
= AdvInitAsc3550Driver(asc_dvc
);
17203 /* Translate initialization return value to status value. */
17207 status
= ADV_FALSE
;
17211 * Restore the BIOS signature word.
17213 AdvWriteWordLram(iop_base
, ASC_MC_BIOS_SIGNATURE
, bios_sig
);
17216 * Restore per TID negotiated values.
17218 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_ABLE
, wdtr_able
);
17219 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_ABLE
, sdtr_able
);
17220 if (asc_dvc
->chip_type
== ADV_CHIP_ASC38C1600
) {
17221 AdvWriteWordLram(iop_base
, ASC_MC_PPR_ABLE
, ppr_able
);
17223 AdvWriteWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
, tagqng_able
);
17224 for (tid
= 0; tid
<= ADV_MAX_TID
; tid
++) {
17225 AdvWriteByteLram(iop_base
, ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
17233 * Adv Library Interrupt Service Routine
17235 * This function is called by a driver's interrupt service routine.
17236 * The function disables and re-enables interrupts.
17238 * When a microcode idle command is completed, the ADV_DVC_VAR
17239 * 'idle_cmd_done' field is set to ADV_TRUE.
17241 * Note: AdvISR() can be called when interrupts are disabled or even
17242 * when there is no hardware interrupt condition present. It will
17243 * always check for completed idle commands and microcode requests.
17244 * This is an important feature that shouldn't be changed because it
17245 * allows commands to be completed from polling mode loops.
17248 * ADV_TRUE(1) - interrupt was pending
17249 * ADV_FALSE(0) - no interrupt was pending
17251 static int AdvISR(ADV_DVC_VAR
*asc_dvc
)
17253 AdvPortAddr iop_base
;
17256 ADV_CARR_T
*free_carrp
;
17257 ADV_VADDR irq_next_vpa
;
17259 ADV_SCSI_REQ_Q
*scsiq
;
17261 flags
= DvcEnterCritical();
17263 iop_base
= asc_dvc
->iop_base
;
17265 /* Reading the register clears the interrupt. */
17266 int_stat
= AdvReadByteRegister(iop_base
, IOPB_INTR_STATUS_REG
);
17268 if ((int_stat
& (ADV_INTR_STATUS_INTRA
| ADV_INTR_STATUS_INTRB
|
17269 ADV_INTR_STATUS_INTRC
)) == 0) {
17270 DvcLeaveCritical(flags
);
17275 * Notify the driver of an asynchronous microcode condition by
17276 * calling the ADV_DVC_VAR.async_callback function. The function
17277 * is passed the microcode ASC_MC_INTRB_CODE byte value.
17279 if (int_stat
& ADV_INTR_STATUS_INTRB
) {
17282 AdvReadByteLram(iop_base
, ASC_MC_INTRB_CODE
, intrb_code
);
17284 if (asc_dvc
->chip_type
== ADV_CHIP_ASC3550
||
17285 asc_dvc
->chip_type
== ADV_CHIP_ASC38C0800
) {
17286 if (intrb_code
== ADV_ASYNC_CARRIER_READY_FAILURE
&&
17287 asc_dvc
->carr_pending_cnt
!= 0) {
17288 AdvWriteByteRegister(iop_base
, IOPB_TICKLE
,
17290 if (asc_dvc
->chip_type
== ADV_CHIP_ASC3550
) {
17291 AdvWriteByteRegister(iop_base
,
17298 if (asc_dvc
->async_callback
!= 0) {
17299 (*asc_dvc
->async_callback
) (asc_dvc
, intrb_code
);
17304 * Check if the IRQ stopper carrier contains a completed request.
17306 while (((irq_next_vpa
=
17307 le32_to_cpu(asc_dvc
->irq_sp
->next_vpa
)) & ASC_RQ_DONE
) != 0) {
17309 * Get a pointer to the newly completed ADV_SCSI_REQ_Q structure.
17310 * The RISC will have set 'areq_vpa' to a virtual address.
17312 * The firmware will have copied the ASC_SCSI_REQ_Q.scsiq_ptr
17313 * field to the carrier ADV_CARR_T.areq_vpa field. The conversion
17314 * below complements the conversion of ASC_SCSI_REQ_Q.scsiq_ptr'
17315 * in AdvExeScsiQueue().
17317 scsiq
= (ADV_SCSI_REQ_Q
*)
17318 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc
->irq_sp
->areq_vpa
));
17321 * Request finished with good status and the queue was not
17322 * DMAed to host memory by the firmware. Set all status fields
17323 * to indicate good status.
17325 if ((irq_next_vpa
& ASC_RQ_GOOD
) != 0) {
17326 scsiq
->done_status
= QD_NO_ERROR
;
17327 scsiq
->host_status
= scsiq
->scsi_status
= 0;
17328 scsiq
->data_cnt
= 0L;
17332 * Advance the stopper pointer to the next carrier
17333 * ignoring the lower four bits. Free the previous
17336 free_carrp
= asc_dvc
->irq_sp
;
17337 asc_dvc
->irq_sp
= (ADV_CARR_T
*)
17338 ADV_U32_TO_VADDR(ASC_GET_CARRP(irq_next_vpa
));
17340 free_carrp
->next_vpa
=
17341 cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc
->carr_freelist
));
17342 asc_dvc
->carr_freelist
= free_carrp
;
17343 asc_dvc
->carr_pending_cnt
--;
17345 ASC_ASSERT(scsiq
!= NULL
);
17346 target_bit
= ADV_TID_TO_TIDMASK(scsiq
->target_id
);
17349 * Clear request microcode control flag.
17354 * If the command that completed was a SCSI INQUIRY and
17355 * LUN 0 was sent the command, then process the INQUIRY
17356 * command information for the device.
17358 * Note: If data returned were either VPD or CmdDt data,
17359 * don't process the INQUIRY command information for
17360 * the device, otherwise may erroneously set *_able bits.
17362 if (scsiq
->done_status
== QD_NO_ERROR
&&
17363 scsiq
->cdb
[0] == INQUIRY
&&
17364 scsiq
->target_lun
== 0 &&
17365 (scsiq
->cdb
[1] & ADV_INQ_RTN_VPD_AND_CMDDT
)
17366 == ADV_INQ_RTN_STD_INQUIRY_DATA
) {
17367 AdvInquiryHandling(asc_dvc
, scsiq
);
17371 * Notify the driver of the completed request by passing
17372 * the ADV_SCSI_REQ_Q pointer to its callback function.
17374 scsiq
->a_flag
|= ADV_SCSIQ_DONE
;
17375 (*asc_dvc
->isr_callback
) (asc_dvc
, scsiq
);
17377 * Note: After the driver callback function is called, 'scsiq'
17378 * can no longer be referenced.
17380 * Fall through and continue processing other completed
17385 * Disable interrupts again in case the driver inadvertently
17386 * enabled interrupts in its callback function.
17388 * The DvcEnterCritical() return value is ignored, because
17389 * the 'flags' saved when AdvISR() was first entered will be
17390 * used to restore the interrupt flag on exit.
17392 (void)DvcEnterCritical();
17394 DvcLeaveCritical(flags
);
17399 * Send an idle command to the chip and wait for completion.
17401 * Command completion is polled for once per microsecond.
17403 * The function can be called from anywhere including an interrupt handler.
17404 * But the function is not re-entrant, so it uses the DvcEnter/LeaveCritical()
17405 * functions to prevent reentrancy.
17408 * ADV_TRUE - command completed successfully
17409 * ADV_FALSE - command failed
17410 * ADV_ERROR - command timed out
17413 AdvSendIdleCmd(ADV_DVC_VAR
*asc_dvc
,
17414 ushort idle_cmd
, ADV_DCNT idle_cmd_parameter
)
17416 ulong last_int_level
;
17419 AdvPortAddr iop_base
;
17421 last_int_level
= DvcEnterCritical();
17423 iop_base
= asc_dvc
->iop_base
;
17426 * Clear the idle command status which is set by the microcode
17427 * to a non-zero value to indicate when the command is completed.
17428 * The non-zero result is one of the IDLE_CMD_STATUS_* values
17429 * defined in a_advlib.h.
17431 AdvWriteWordLram(iop_base
, ASC_MC_IDLE_CMD_STATUS
, (ushort
)0);
17434 * Write the idle command value after the idle command parameter
17435 * has been written to avoid a race condition. If the order is not
17436 * followed, the microcode may process the idle command before the
17437 * parameters have been written to LRAM.
17439 AdvWriteDWordLramNoSwap(iop_base
, ASC_MC_IDLE_CMD_PARAMETER
,
17440 cpu_to_le32(idle_cmd_parameter
));
17441 AdvWriteWordLram(iop_base
, ASC_MC_IDLE_CMD
, idle_cmd
);
17444 * Tickle the RISC to tell it to process the idle command.
17446 AdvWriteByteRegister(iop_base
, IOPB_TICKLE
, ADV_TICKLE_B
);
17447 if (asc_dvc
->chip_type
== ADV_CHIP_ASC3550
) {
17449 * Clear the tickle value. In the ASC-3550 the RISC flag
17450 * command 'clr_tickle_b' does not work unless the host
17451 * value is cleared.
17453 AdvWriteByteRegister(iop_base
, IOPB_TICKLE
, ADV_TICKLE_NOP
);
17456 /* Wait for up to 100 millisecond for the idle command to timeout. */
17457 for (i
= 0; i
< SCSI_WAIT_100_MSEC
; i
++) {
17458 /* Poll once each microsecond for command completion. */
17459 for (j
= 0; j
< SCSI_US_PER_MSEC
; j
++) {
17460 AdvReadWordLram(iop_base
, ASC_MC_IDLE_CMD_STATUS
,
17463 DvcLeaveCritical(last_int_level
);
17466 DvcDelayMicroSecond(asc_dvc
, (ushort
)1);
17470 ASC_ASSERT(0); /* The idle command should never timeout. */
17471 DvcLeaveCritical(last_int_level
);
17476 * Inquiry Information Byte 7 Handling
17478 * Handle SCSI Inquiry Command information for a device by setting
17479 * microcode operating variables that affect WDTR, SDTR, and Tag
17482 static void AdvInquiryHandling(ADV_DVC_VAR
*asc_dvc
, ADV_SCSI_REQ_Q
*scsiq
)
17484 AdvPortAddr iop_base
;
17486 ADV_SCSI_INQUIRY
*inq
;
17491 * AdvInquiryHandling() requires up to INQUIRY information Byte 7
17494 * If less than 8 bytes of INQUIRY information were requested or less
17495 * than 8 bytes were transferred, then return. cdb[4] is the request
17496 * length and the ADV_SCSI_REQ_Q 'data_cnt' field is set by the
17497 * microcode to the transfer residual count.
17500 if (scsiq
->cdb
[4] < 8 ||
17501 (scsiq
->cdb
[4] - le32_to_cpu(scsiq
->data_cnt
)) < 8) {
17505 iop_base
= asc_dvc
->iop_base
;
17506 tid
= scsiq
->target_id
;
17508 inq
= (ADV_SCSI_INQUIRY
*) scsiq
->vdata_addr
;
17511 * WDTR, SDTR, and Tag Queuing cannot be enabled for old devices.
17513 if (ADV_INQ_RESPONSE_FMT(inq
) < 2 && ADV_INQ_ANSI_VER(inq
) < 2) {
17517 * INQUIRY Byte 7 Handling
17519 * Use a device's INQUIRY byte 7 to determine whether it
17520 * supports WDTR, SDTR, and Tag Queuing. If the feature
17521 * is enabled in the EEPROM and the device supports the
17522 * feature, then enable it in the microcode.
17525 tidmask
= ADV_TID_TO_TIDMASK(tid
);
17530 * If the EEPROM enabled WDTR for the device and the device
17531 * supports wide bus (16 bit) transfers, then turn on the
17532 * device's 'wdtr_able' bit and write the new value to the
17535 if ((asc_dvc
->wdtr_able
& tidmask
) && ADV_INQ_WIDE16(inq
)) {
17536 AdvReadWordLram(iop_base
, ASC_MC_WDTR_ABLE
, cfg_word
);
17537 if ((cfg_word
& tidmask
) == 0) {
17538 cfg_word
|= tidmask
;
17539 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_ABLE
,
17543 * Clear the microcode "SDTR negotiation" and "WDTR
17544 * negotiation" done indicators for the target to cause
17545 * it to negotiate with the new setting set above.
17546 * WDTR when accepted causes the target to enter
17547 * asynchronous mode, so SDTR must be negotiated.
17549 AdvReadWordLram(iop_base
, ASC_MC_SDTR_DONE
,
17551 cfg_word
&= ~tidmask
;
17552 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_DONE
,
17554 AdvReadWordLram(iop_base
, ASC_MC_WDTR_DONE
,
17556 cfg_word
&= ~tidmask
;
17557 AdvWriteWordLram(iop_base
, ASC_MC_WDTR_DONE
,
17563 * Synchronous Transfers
17565 * If the EEPROM enabled SDTR for the device and the device
17566 * supports synchronous transfers, then turn on the device's
17567 * 'sdtr_able' bit. Write the new value to the microcode.
17569 if ((asc_dvc
->sdtr_able
& tidmask
) && ADV_INQ_SYNC(inq
)) {
17570 AdvReadWordLram(iop_base
, ASC_MC_SDTR_ABLE
, cfg_word
);
17571 if ((cfg_word
& tidmask
) == 0) {
17572 cfg_word
|= tidmask
;
17573 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_ABLE
,
17577 * Clear the microcode "SDTR negotiation" done indicator
17578 * for the target to cause it to negotiate with the new
17579 * setting set above.
17581 AdvReadWordLram(iop_base
, ASC_MC_SDTR_DONE
,
17583 cfg_word
&= ~tidmask
;
17584 AdvWriteWordLram(iop_base
, ASC_MC_SDTR_DONE
,
17589 * If the Inquiry data included enough space for the SPI-3
17590 * Clocking field, then check if DT mode is supported.
17592 if (asc_dvc
->chip_type
== ADV_CHIP_ASC38C1600
&&
17593 (scsiq
->cdb
[4] >= 57 ||
17594 (scsiq
->cdb
[4] - le32_to_cpu(scsiq
->data_cnt
)) >= 57)) {
17596 * PPR (Parallel Protocol Request) Capable
17598 * If the device supports DT mode, then it must be PPR capable.
17599 * The PPR message will be used in place of the SDTR and WDTR
17600 * messages to negotiate synchronous speed and offset, transfer
17601 * width, and protocol options.
17603 if (ADV_INQ_CLOCKING(inq
) & ADV_INQ_CLOCKING_DT_ONLY
) {
17604 AdvReadWordLram(iop_base
, ASC_MC_PPR_ABLE
,
17605 asc_dvc
->ppr_able
);
17606 asc_dvc
->ppr_able
|= tidmask
;
17607 AdvWriteWordLram(iop_base
, ASC_MC_PPR_ABLE
,
17608 asc_dvc
->ppr_able
);
17613 * If the EEPROM enabled Tag Queuing for the device and the
17614 * device supports Tag Queueing, then turn on the device's
17615 * 'tagqng_enable' bit in the microcode and set the microcode
17616 * maximum command count to the ADV_DVC_VAR 'max_dvc_qng'
17619 * Tag Queuing is disabled for the BIOS which runs in polled
17620 * mode and would see no benefit from Tag Queuing. Also by
17621 * disabling Tag Queuing in the BIOS devices with Tag Queuing
17622 * bugs will at least work with the BIOS.
17624 if ((asc_dvc
->tagqng_able
& tidmask
) && ADV_INQ_CMD_QUEUE(inq
)) {
17625 AdvReadWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
, cfg_word
);
17626 cfg_word
|= tidmask
;
17627 AdvWriteWordLram(iop_base
, ASC_MC_TAGQNG_ABLE
,
17630 AdvWriteByteLram(iop_base
,
17631 ASC_MC_NUMBER_OF_MAX_CMD
+ tid
,
17632 asc_dvc
->max_dvc_qng
);
17637 static int __devinit
17638 advansys_wide_init_chip(asc_board_t
*boardp
, ADV_DVC_VAR
*adv_dvc_varp
)
17641 adv_req_t
*reqp
= NULL
;
17644 int warn_code
, err_code
;
17647 * Allocate buffer carrier structures. The total size
17648 * is about 4 KB, so allocate all at once.
17650 boardp
->carrp
= kmalloc(ADV_CARRIER_BUFSIZE
, GFP_KERNEL
);
17651 ASC_DBG1(1, "advansys_wide_init_chip: carrp 0x%p\n", boardp
->carrp
);
17653 if (!boardp
->carrp
)
17654 goto kmalloc_failed
;
17657 * Allocate up to 'max_host_qng' request structures for the Wide
17658 * board. The total size is about 16 KB, so allocate all at once.
17659 * If the allocation fails decrement and try again.
17661 for (req_cnt
= adv_dvc_varp
->max_host_qng
; req_cnt
> 0; req_cnt
--) {
17662 reqp
= kmalloc(sizeof(adv_req_t
) * req_cnt
, GFP_KERNEL
);
17664 ASC_DBG3(1, "advansys_wide_init_chip: reqp 0x%p, req_cnt %d, "
17665 "bytes %lu\n", reqp
, req_cnt
,
17666 (ulong
)sizeof(adv_req_t
) * req_cnt
);
17673 goto kmalloc_failed
;
17675 boardp
->orig_reqp
= reqp
;
17678 * Allocate up to ADV_TOT_SG_BLOCK request structures for
17679 * the Wide board. Each structure is about 136 bytes.
17681 boardp
->adv_sgblkp
= NULL
;
17682 for (sg_cnt
= 0; sg_cnt
< ADV_TOT_SG_BLOCK
; sg_cnt
++) {
17683 sgp
= kmalloc(sizeof(adv_sgblk_t
), GFP_KERNEL
);
17688 sgp
->next_sgblkp
= boardp
->adv_sgblkp
;
17689 boardp
->adv_sgblkp
= sgp
;
17693 ASC_DBG3(1, "advansys_wide_init_chip: sg_cnt %d * %u = %u bytes\n",
17694 sg_cnt
, sizeof(adv_sgblk_t
),
17695 (unsigned)(sizeof(adv_sgblk_t
) * sg_cnt
));
17697 if (!boardp
->adv_sgblkp
)
17698 goto kmalloc_failed
;
17700 adv_dvc_varp
->carrier_buf
= boardp
->carrp
;
17703 * Point 'adv_reqp' to the request structures and
17704 * link them together.
17707 reqp
[req_cnt
].next_reqp
= NULL
;
17708 for (; req_cnt
> 0; req_cnt
--) {
17709 reqp
[req_cnt
- 1].next_reqp
= &reqp
[req_cnt
];
17711 boardp
->adv_reqp
= &reqp
[0];
17713 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
17714 ASC_DBG(2, "advansys_wide_init_chip: AdvInitAsc3550Driver()\n");
17715 warn_code
= AdvInitAsc3550Driver(adv_dvc_varp
);
17716 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
17717 ASC_DBG(2, "advansys_wide_init_chip: AdvInitAsc38C0800Driver()"
17719 warn_code
= AdvInitAsc38C0800Driver(adv_dvc_varp
);
17721 ASC_DBG(2, "advansys_wide_init_chip: AdvInitAsc38C1600Driver()"
17723 warn_code
= AdvInitAsc38C1600Driver(adv_dvc_varp
);
17725 err_code
= adv_dvc_varp
->err_code
;
17727 if (warn_code
|| err_code
) {
17728 ASC_PRINT3("advansys_wide_init_chip: board %d error: warn 0x%x,"
17729 " error 0x%x\n", boardp
->id
, warn_code
, err_code
);
17735 ASC_PRINT1("advansys_wide_init_chip: board %d error: kmalloc() "
17736 "failed\n", boardp
->id
);
17737 err_code
= ADV_ERROR
;
17742 static void advansys_wide_free_mem(asc_board_t
*boardp
)
17744 kfree(boardp
->carrp
);
17745 boardp
->carrp
= NULL
;
17746 kfree(boardp
->orig_reqp
);
17747 boardp
->orig_reqp
= boardp
->adv_reqp
= NULL
;
17748 while (boardp
->adv_sgblkp
) {
17749 adv_sgblk_t
*sgp
= boardp
->adv_sgblkp
;
17750 boardp
->adv_sgblkp
= sgp
->next_sgblkp
;
17755 static struct Scsi_Host
*__devinit
17756 advansys_board_found(int iop
, struct device
*dev
, int bus_type
)
17758 struct Scsi_Host
*shost
;
17759 struct pci_dev
*pdev
= bus_type
== ASC_IS_PCI
? to_pci_dev(dev
) : NULL
;
17760 asc_board_t
*boardp
;
17761 ASC_DVC_VAR
*asc_dvc_varp
= NULL
;
17762 ADV_DVC_VAR
*adv_dvc_varp
= NULL
;
17765 ADV_PADDR pci_memory_address
;
17766 int warn_code
, err_code
;
17772 * Register the adapter, get its configuration, and
17775 ASC_DBG(2, "advansys_board_found: scsi_host_alloc()\n");
17776 shost
= scsi_host_alloc(&advansys_template
, sizeof(asc_board_t
));
17781 /* Initialize private per board data */
17782 boardp
= ASC_BOARDP(shost
);
17783 memset(boardp
, 0, sizeof(asc_board_t
));
17784 boardp
->id
= asc_board_count
++;
17786 /* Initialize spinlock. */
17787 spin_lock_init(&boardp
->lock
);
17790 * Handle both narrow and wide boards.
17792 * If a Wide board was detected, set the board structure
17793 * wide board flag. Set-up the board structure based on
17797 if (bus_type
== ASC_IS_PCI
&&
17798 (pdev
->device
== PCI_DEVICE_ID_ASP_ABP940UW
||
17799 pdev
->device
== PCI_DEVICE_ID_38C0800_REV1
||
17800 pdev
->device
== PCI_DEVICE_ID_38C1600_REV1
)) {
17801 boardp
->flags
|= ASC_IS_WIDE_BOARD
;
17803 #endif /* CONFIG_PCI */
17805 if (ASC_NARROW_BOARD(boardp
)) {
17806 ASC_DBG(1, "advansys_board_found: narrow board\n");
17807 asc_dvc_varp
= &boardp
->dvc_var
.asc_dvc_var
;
17808 asc_dvc_varp
->bus_type
= bus_type
;
17809 asc_dvc_varp
->drv_ptr
= boardp
;
17810 asc_dvc_varp
->cfg
= &boardp
->dvc_cfg
.asc_dvc_cfg
;
17811 asc_dvc_varp
->cfg
->overrun_buf
= &overrun_buf
[0];
17812 asc_dvc_varp
->iop_base
= iop
;
17813 asc_dvc_varp
->isr_callback
= asc_isr_callback
;
17815 ASC_DBG(1, "advansys_board_found: wide board\n");
17816 adv_dvc_varp
= &boardp
->dvc_var
.adv_dvc_var
;
17817 adv_dvc_varp
->drv_ptr
= boardp
;
17818 adv_dvc_varp
->cfg
= &boardp
->dvc_cfg
.adv_dvc_cfg
;
17819 adv_dvc_varp
->isr_callback
= adv_isr_callback
;
17820 adv_dvc_varp
->async_callback
= adv_async_callback
;
17822 if (pdev
->device
== PCI_DEVICE_ID_ASP_ABP940UW
) {
17823 ASC_DBG(1, "advansys_board_found: ASC-3550\n");
17824 adv_dvc_varp
->chip_type
= ADV_CHIP_ASC3550
;
17825 } else if (pdev
->device
== PCI_DEVICE_ID_38C0800_REV1
) {
17826 ASC_DBG(1, "advansys_board_found: ASC-38C0800\n");
17827 adv_dvc_varp
->chip_type
= ADV_CHIP_ASC38C0800
;
17829 ASC_DBG(1, "advansys_board_found: ASC-38C1600\n");
17830 adv_dvc_varp
->chip_type
= ADV_CHIP_ASC38C1600
;
17832 #endif /* CONFIG_PCI */
17835 * Map the board's registers into virtual memory for
17836 * PCI slave access. Only memory accesses are used to
17837 * access the board's registers.
17839 * Note: The PCI register base address is not always
17840 * page aligned, but the address passed to ioremap()
17841 * must be page aligned. It is guaranteed that the
17842 * PCI register base address will not cross a page
17845 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
17846 iolen
= ADV_3550_IOLEN
;
17847 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
17848 iolen
= ADV_38C0800_IOLEN
;
17850 iolen
= ADV_38C1600_IOLEN
;
17853 pci_memory_address
= pci_resource_start(pdev
, 1);
17855 "advansys_board_found: pci_memory_address: 0x%lx\n",
17856 (ulong
)pci_memory_address
);
17857 if ((boardp
->ioremap_addr
=
17858 ioremap(pci_memory_address
& PAGE_MASK
, PAGE_SIZE
)) == 0) {
17860 ("advansys_board_found: board %d: ioremap(%x, %d) returned NULL\n",
17861 boardp
->id
, pci_memory_address
, iolen
);
17865 "advansys_board_found: ioremap_addr: 0x%lx\n",
17866 (ulong
)boardp
->ioremap_addr
);
17867 adv_dvc_varp
->iop_base
= (AdvPortAddr
)
17868 (boardp
->ioremap_addr
+
17869 (pci_memory_address
- (pci_memory_address
& PAGE_MASK
)));
17871 "advansys_board_found: iop_base: 0x%lx\n",
17872 adv_dvc_varp
->iop_base
);
17873 #endif /* CONFIG_PCI */
17876 * Even though it isn't used to access wide boards, other
17877 * than for the debug line below, save I/O Port address so
17878 * that it can be reported.
17880 boardp
->ioport
= iop
;
17883 "advansys_board_found: iopb_chip_id_1 0x%x, iopw_chip_id_0 0x%x\n",
17884 (ushort
)inp(iop
+ 1), (ushort
)inpw(iop
));
17887 #ifdef CONFIG_PROC_FS
17889 * Allocate buffer for printing information from
17890 * /proc/scsi/advansys/[0...].
17892 boardp
->prtbuf
= kmalloc(ASC_PRTBUF_SIZE
, GFP_KERNEL
);
17893 if (!boardp
->prtbuf
) {
17894 ASC_PRINT2("advansys_board_found: board %d: kmalloc(%d) "
17895 "returned NULL\n", boardp
->id
, ASC_PRTBUF_SIZE
);
17898 #endif /* CONFIG_PROC_FS */
17900 if (ASC_NARROW_BOARD(boardp
)) {
17901 asc_dvc_varp
->cfg
->dev
= dev
;
17903 * Set the board bus type and PCI IRQ before
17904 * calling AscInitGetConfig().
17906 switch (asc_dvc_varp
->bus_type
) {
17909 shost
->unchecked_isa_dma
= TRUE
;
17913 shost
->unchecked_isa_dma
= FALSE
;
17917 shost
->unchecked_isa_dma
= FALSE
;
17918 share_irq
= IRQF_SHARED
;
17920 #endif /* CONFIG_ISA */
17923 shost
->irq
= asc_dvc_varp
->irq_no
= pdev
->irq
;
17924 asc_dvc_varp
->cfg
->pci_slot_info
=
17925 ASC_PCI_MKID(pdev
->bus
->number
,
17926 PCI_SLOT(pdev
->devfn
),
17927 PCI_FUNC(pdev
->devfn
));
17928 shost
->unchecked_isa_dma
= FALSE
;
17929 share_irq
= IRQF_SHARED
;
17931 #endif /* CONFIG_PCI */
17934 ("advansys_board_found: board %d: unknown adapter type: %d\n",
17935 boardp
->id
, asc_dvc_varp
->bus_type
);
17936 shost
->unchecked_isa_dma
= TRUE
;
17941 adv_dvc_varp
->cfg
->dev
= dev
;
17943 * For Wide boards set PCI information before calling
17944 * AdvInitGetConfig().
17947 shost
->irq
= adv_dvc_varp
->irq_no
= pdev
->irq
;
17948 adv_dvc_varp
->cfg
->pci_slot_info
=
17949 ASC_PCI_MKID(pdev
->bus
->number
,
17950 PCI_SLOT(pdev
->devfn
),
17951 PCI_FUNC(pdev
->devfn
));
17952 shost
->unchecked_isa_dma
= FALSE
;
17953 share_irq
= IRQF_SHARED
;
17954 #endif /* CONFIG_PCI */
17958 * Read the board configuration.
17960 if (ASC_NARROW_BOARD(boardp
)) {
17962 * NOTE: AscInitGetConfig() may change the board's
17963 * bus_type value. The bus_type value should no
17964 * longer be used. If the bus_type field must be
17965 * referenced only use the bit-wise AND operator "&".
17967 ASC_DBG(2, "advansys_board_found: AscInitGetConfig()\n");
17968 switch (ret
= AscInitGetConfig(asc_dvc_varp
)) {
17969 case 0: /* No error */
17971 case ASC_WARN_IO_PORT_ROTATE
:
17973 ("AscInitGetConfig: board %d: I/O port address modified\n",
17976 case ASC_WARN_AUTO_CONFIG
:
17978 ("AscInitGetConfig: board %d: I/O port increment switch enabled\n",
17981 case ASC_WARN_EEPROM_CHKSUM
:
17983 ("AscInitGetConfig: board %d: EEPROM checksum error\n",
17986 case ASC_WARN_IRQ_MODIFIED
:
17988 ("AscInitGetConfig: board %d: IRQ modified\n",
17991 case ASC_WARN_CMD_QNG_CONFLICT
:
17993 ("AscInitGetConfig: board %d: tag queuing enabled w/o disconnects\n",
17998 ("AscInitGetConfig: board %d: unknown warning: 0x%x\n",
18002 if ((err_code
= asc_dvc_varp
->err_code
) != 0) {
18004 ("AscInitGetConfig: board %d error: init_state 0x%x, err_code 0x%x\n",
18006 asc_dvc_varp
->init_state
, asc_dvc_varp
->err_code
);
18009 ASC_DBG(2, "advansys_board_found: AdvInitGetConfig()\n");
18010 if ((ret
= AdvInitGetConfig(adv_dvc_varp
)) != 0) {
18012 ("AdvInitGetConfig: board %d: warning: 0x%x\n",
18015 if ((err_code
= adv_dvc_varp
->err_code
) != 0) {
18017 ("AdvInitGetConfig: board %d error: err_code 0x%x\n",
18018 boardp
->id
, adv_dvc_varp
->err_code
);
18023 goto err_free_proc
;
18026 * Save the EEPROM configuration so that it can be displayed
18027 * from /proc/scsi/advansys/[0...].
18029 if (ASC_NARROW_BOARD(boardp
)) {
18034 * Set the adapter's target id bit in the 'init_tidmask' field.
18036 boardp
->init_tidmask
|=
18037 ADV_TID_TO_TIDMASK(asc_dvc_varp
->cfg
->chip_scsi_id
);
18040 * Save EEPROM settings for the board.
18042 ep
= &boardp
->eep_config
.asc_eep
;
18044 ep
->init_sdtr
= asc_dvc_varp
->cfg
->sdtr_enable
;
18045 ep
->disc_enable
= asc_dvc_varp
->cfg
->disc_enable
;
18046 ep
->use_cmd_qng
= asc_dvc_varp
->cfg
->cmd_qng_enabled
;
18047 ASC_EEP_SET_DMA_SPD(ep
, asc_dvc_varp
->cfg
->isa_dma_speed
);
18048 ep
->start_motor
= asc_dvc_varp
->start_motor
;
18049 ep
->cntl
= asc_dvc_varp
->dvc_cntl
;
18050 ep
->no_scam
= asc_dvc_varp
->no_scam
;
18051 ep
->max_total_qng
= asc_dvc_varp
->max_total_qng
;
18052 ASC_EEP_SET_CHIP_ID(ep
, asc_dvc_varp
->cfg
->chip_scsi_id
);
18053 /* 'max_tag_qng' is set to the same value for every device. */
18054 ep
->max_tag_qng
= asc_dvc_varp
->cfg
->max_tag_qng
[0];
18055 ep
->adapter_info
[0] = asc_dvc_varp
->cfg
->adapter_info
[0];
18056 ep
->adapter_info
[1] = asc_dvc_varp
->cfg
->adapter_info
[1];
18057 ep
->adapter_info
[2] = asc_dvc_varp
->cfg
->adapter_info
[2];
18058 ep
->adapter_info
[3] = asc_dvc_varp
->cfg
->adapter_info
[3];
18059 ep
->adapter_info
[4] = asc_dvc_varp
->cfg
->adapter_info
[4];
18060 ep
->adapter_info
[5] = asc_dvc_varp
->cfg
->adapter_info
[5];
18063 * Modify board configuration.
18065 ASC_DBG(2, "advansys_board_found: AscInitSetConfig()\n");
18066 switch (ret
= AscInitSetConfig(asc_dvc_varp
)) {
18067 case 0: /* No error. */
18069 case ASC_WARN_IO_PORT_ROTATE
:
18071 ("AscInitSetConfig: board %d: I/O port address modified\n",
18074 case ASC_WARN_AUTO_CONFIG
:
18076 ("AscInitSetConfig: board %d: I/O port increment switch enabled\n",
18079 case ASC_WARN_EEPROM_CHKSUM
:
18081 ("AscInitSetConfig: board %d: EEPROM checksum error\n",
18084 case ASC_WARN_IRQ_MODIFIED
:
18086 ("AscInitSetConfig: board %d: IRQ modified\n",
18089 case ASC_WARN_CMD_QNG_CONFLICT
:
18091 ("AscInitSetConfig: board %d: tag queuing w/o disconnects\n",
18096 ("AscInitSetConfig: board %d: unknown warning: 0x%x\n",
18100 if (asc_dvc_varp
->err_code
!= 0) {
18102 ("AscInitSetConfig: board %d error: init_state 0x%x, err_code 0x%x\n",
18104 asc_dvc_varp
->init_state
, asc_dvc_varp
->err_code
);
18105 goto err_free_proc
;
18109 * Finish initializing the 'Scsi_Host' structure.
18111 /* AscInitSetConfig() will set the IRQ for non-PCI boards. */
18112 if ((asc_dvc_varp
->bus_type
& ASC_IS_PCI
) == 0) {
18113 shost
->irq
= asc_dvc_varp
->irq_no
;
18116 ADVEEP_3550_CONFIG
*ep_3550
;
18117 ADVEEP_38C0800_CONFIG
*ep_38C0800
;
18118 ADVEEP_38C1600_CONFIG
*ep_38C1600
;
18121 * Save Wide EEP Configuration Information.
18123 if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC3550
) {
18124 ep_3550
= &boardp
->eep_config
.adv_3550_eep
;
18126 ep_3550
->adapter_scsi_id
= adv_dvc_varp
->chip_scsi_id
;
18127 ep_3550
->max_host_qng
= adv_dvc_varp
->max_host_qng
;
18128 ep_3550
->max_dvc_qng
= adv_dvc_varp
->max_dvc_qng
;
18129 ep_3550
->termination
= adv_dvc_varp
->cfg
->termination
;
18130 ep_3550
->disc_enable
= adv_dvc_varp
->cfg
->disc_enable
;
18131 ep_3550
->bios_ctrl
= adv_dvc_varp
->bios_ctrl
;
18132 ep_3550
->wdtr_able
= adv_dvc_varp
->wdtr_able
;
18133 ep_3550
->sdtr_able
= adv_dvc_varp
->sdtr_able
;
18134 ep_3550
->ultra_able
= adv_dvc_varp
->ultra_able
;
18135 ep_3550
->tagqng_able
= adv_dvc_varp
->tagqng_able
;
18136 ep_3550
->start_motor
= adv_dvc_varp
->start_motor
;
18137 ep_3550
->scsi_reset_delay
=
18138 adv_dvc_varp
->scsi_reset_wait
;
18139 ep_3550
->serial_number_word1
=
18140 adv_dvc_varp
->cfg
->serial1
;
18141 ep_3550
->serial_number_word2
=
18142 adv_dvc_varp
->cfg
->serial2
;
18143 ep_3550
->serial_number_word3
=
18144 adv_dvc_varp
->cfg
->serial3
;
18145 } else if (adv_dvc_varp
->chip_type
== ADV_CHIP_ASC38C0800
) {
18146 ep_38C0800
= &boardp
->eep_config
.adv_38C0800_eep
;
18148 ep_38C0800
->adapter_scsi_id
=
18149 adv_dvc_varp
->chip_scsi_id
;
18150 ep_38C0800
->max_host_qng
= adv_dvc_varp
->max_host_qng
;
18151 ep_38C0800
->max_dvc_qng
= adv_dvc_varp
->max_dvc_qng
;
18152 ep_38C0800
->termination_lvd
=
18153 adv_dvc_varp
->cfg
->termination
;
18154 ep_38C0800
->disc_enable
=
18155 adv_dvc_varp
->cfg
->disc_enable
;
18156 ep_38C0800
->bios_ctrl
= adv_dvc_varp
->bios_ctrl
;
18157 ep_38C0800
->wdtr_able
= adv_dvc_varp
->wdtr_able
;
18158 ep_38C0800
->tagqng_able
= adv_dvc_varp
->tagqng_able
;
18159 ep_38C0800
->sdtr_speed1
= adv_dvc_varp
->sdtr_speed1
;
18160 ep_38C0800
->sdtr_speed2
= adv_dvc_varp
->sdtr_speed2
;
18161 ep_38C0800
->sdtr_speed3
= adv_dvc_varp
->sdtr_speed3
;
18162 ep_38C0800
->sdtr_speed4
= adv_dvc_varp
->sdtr_speed4
;
18163 ep_38C0800
->tagqng_able
= adv_dvc_varp
->tagqng_able
;
18164 ep_38C0800
->start_motor
= adv_dvc_varp
->start_motor
;
18165 ep_38C0800
->scsi_reset_delay
=
18166 adv_dvc_varp
->scsi_reset_wait
;
18167 ep_38C0800
->serial_number_word1
=
18168 adv_dvc_varp
->cfg
->serial1
;
18169 ep_38C0800
->serial_number_word2
=
18170 adv_dvc_varp
->cfg
->serial2
;
18171 ep_38C0800
->serial_number_word3
=
18172 adv_dvc_varp
->cfg
->serial3
;
18174 ep_38C1600
= &boardp
->eep_config
.adv_38C1600_eep
;
18176 ep_38C1600
->adapter_scsi_id
=
18177 adv_dvc_varp
->chip_scsi_id
;
18178 ep_38C1600
->max_host_qng
= adv_dvc_varp
->max_host_qng
;
18179 ep_38C1600
->max_dvc_qng
= adv_dvc_varp
->max_dvc_qng
;
18180 ep_38C1600
->termination_lvd
=
18181 adv_dvc_varp
->cfg
->termination
;
18182 ep_38C1600
->disc_enable
=
18183 adv_dvc_varp
->cfg
->disc_enable
;
18184 ep_38C1600
->bios_ctrl
= adv_dvc_varp
->bios_ctrl
;
18185 ep_38C1600
->wdtr_able
= adv_dvc_varp
->wdtr_able
;
18186 ep_38C1600
->tagqng_able
= adv_dvc_varp
->tagqng_able
;
18187 ep_38C1600
->sdtr_speed1
= adv_dvc_varp
->sdtr_speed1
;
18188 ep_38C1600
->sdtr_speed2
= adv_dvc_varp
->sdtr_speed2
;
18189 ep_38C1600
->sdtr_speed3
= adv_dvc_varp
->sdtr_speed3
;
18190 ep_38C1600
->sdtr_speed4
= adv_dvc_varp
->sdtr_speed4
;
18191 ep_38C1600
->tagqng_able
= adv_dvc_varp
->tagqng_able
;
18192 ep_38C1600
->start_motor
= adv_dvc_varp
->start_motor
;
18193 ep_38C1600
->scsi_reset_delay
=
18194 adv_dvc_varp
->scsi_reset_wait
;
18195 ep_38C1600
->serial_number_word1
=
18196 adv_dvc_varp
->cfg
->serial1
;
18197 ep_38C1600
->serial_number_word2
=
18198 adv_dvc_varp
->cfg
->serial2
;
18199 ep_38C1600
->serial_number_word3
=
18200 adv_dvc_varp
->cfg
->serial3
;
18204 * Set the adapter's target id bit in the 'init_tidmask' field.
18206 boardp
->init_tidmask
|=
18207 ADV_TID_TO_TIDMASK(adv_dvc_varp
->chip_scsi_id
);
18210 * Finish initializing the 'Scsi_Host' structure.
18212 shost
->irq
= adv_dvc_varp
->irq_no
;
18216 * Channels are numbered beginning with 0. For AdvanSys one host
18217 * structure supports one channel. Multi-channel boards have a
18218 * separate host structure for each channel.
18220 shost
->max_channel
= 0;
18221 if (ASC_NARROW_BOARD(boardp
)) {
18222 shost
->max_id
= ASC_MAX_TID
+ 1;
18223 shost
->max_lun
= ASC_MAX_LUN
+ 1;
18225 shost
->io_port
= asc_dvc_varp
->iop_base
;
18226 boardp
->asc_n_io_port
= ASC_IOADR_GAP
;
18227 shost
->this_id
= asc_dvc_varp
->cfg
->chip_scsi_id
;
18229 /* Set maximum number of queues the adapter can handle. */
18230 shost
->can_queue
= asc_dvc_varp
->max_total_qng
;
18232 shost
->max_id
= ADV_MAX_TID
+ 1;
18233 shost
->max_lun
= ADV_MAX_LUN
+ 1;
18236 * Save the I/O Port address and length even though
18237 * I/O ports are not used to access Wide boards.
18238 * Instead the Wide boards are accessed with
18239 * PCI Memory Mapped I/O.
18241 shost
->io_port
= iop
;
18242 boardp
->asc_n_io_port
= iolen
;
18244 shost
->this_id
= adv_dvc_varp
->chip_scsi_id
;
18246 /* Set maximum number of queues the adapter can handle. */
18247 shost
->can_queue
= adv_dvc_varp
->max_host_qng
;
18251 * 'n_io_port' currently is one byte.
18253 * Set a value to 'n_io_port', but never referenced it because
18254 * it may be truncated.
18256 shost
->n_io_port
= boardp
->asc_n_io_port
<= 255 ?
18257 boardp
->asc_n_io_port
: 255;
18260 * Following v1.3.89, 'cmd_per_lun' is no longer needed
18261 * and should be set to zero.
18263 * But because of a bug introduced in v1.3.89 if the driver is
18264 * compiled as a module and 'cmd_per_lun' is zero, the Mid-Level
18265 * SCSI function 'allocate_device' will panic. To allow the driver
18266 * to work as a module in these kernels set 'cmd_per_lun' to 1.
18268 * Note: This is wrong. cmd_per_lun should be set to the depth
18269 * you want on untagged devices always.
18272 shost
->cmd_per_lun
= 1;
18274 shost->cmd_per_lun = 0;
18278 * Set the maximum number of scatter-gather elements the
18279 * adapter can handle.
18281 if (ASC_NARROW_BOARD(boardp
)) {
18283 * Allow two commands with 'sg_tablesize' scatter-gather
18284 * elements to be executed simultaneously. This value is
18285 * the theoretical hardware limit. It may be decreased
18288 shost
->sg_tablesize
=
18289 (((asc_dvc_varp
->max_total_qng
- 2) / 2) *
18290 ASC_SG_LIST_PER_Q
) + 1;
18292 shost
->sg_tablesize
= ADV_MAX_SG_LIST
;
18296 * The value of 'sg_tablesize' can not exceed the SCSI
18297 * mid-level driver definition of SG_ALL. SG_ALL also
18298 * must not be exceeded, because it is used to define the
18299 * size of the scatter-gather table in 'struct asc_sg_head'.
18301 if (shost
->sg_tablesize
> SG_ALL
) {
18302 shost
->sg_tablesize
= SG_ALL
;
18305 ASC_DBG1(1, "advansys_board_found: sg_tablesize: %d\n", shost
->sg_tablesize
);
18307 /* BIOS start address. */
18308 if (ASC_NARROW_BOARD(boardp
)) {
18309 shost
->base
= AscGetChipBiosAddress(asc_dvc_varp
->iop_base
,
18310 asc_dvc_varp
->bus_type
);
18313 * Fill-in BIOS board variables. The Wide BIOS saves
18314 * information in LRAM that is used by the driver.
18316 AdvReadWordLram(adv_dvc_varp
->iop_base
,
18317 BIOS_SIGNATURE
, boardp
->bios_signature
);
18318 AdvReadWordLram(adv_dvc_varp
->iop_base
,
18319 BIOS_VERSION
, boardp
->bios_version
);
18320 AdvReadWordLram(adv_dvc_varp
->iop_base
,
18321 BIOS_CODESEG
, boardp
->bios_codeseg
);
18322 AdvReadWordLram(adv_dvc_varp
->iop_base
,
18323 BIOS_CODELEN
, boardp
->bios_codelen
);
18326 "advansys_board_found: bios_signature 0x%x, bios_version 0x%x\n",
18327 boardp
->bios_signature
, boardp
->bios_version
);
18330 "advansys_board_found: bios_codeseg 0x%x, bios_codelen 0x%x\n",
18331 boardp
->bios_codeseg
, boardp
->bios_codelen
);
18334 * If the BIOS saved a valid signature, then fill in
18335 * the BIOS code segment base address.
18337 if (boardp
->bios_signature
== 0x55AA) {
18339 * Convert x86 realmode code segment to a linear
18340 * address by shifting left 4.
18342 shost
->base
= ((ulong
)boardp
->bios_codeseg
<< 4);
18349 * Register Board Resources - I/O Port, DMA, IRQ
18353 * Register I/O port range.
18355 * For Wide boards the I/O ports are not used to access
18356 * the board, but request the region anyway.
18358 * 'shost->n_io_port' is not referenced, because it may be truncated.
18361 "advansys_board_found: request_region port 0x%lx, len 0x%x\n",
18362 (ulong
)shost
->io_port
, boardp
->asc_n_io_port
);
18363 if (request_region(shost
->io_port
, boardp
->asc_n_io_port
,
18364 "advansys") == NULL
) {
18366 ("advansys_board_found: board %d: request_region() failed, port 0x%lx, len 0x%x\n",
18367 boardp
->id
, (ulong
)shost
->io_port
, boardp
->asc_n_io_port
);
18368 goto err_free_proc
;
18371 /* Register DMA Channel for Narrow boards. */
18372 shost
->dma_channel
= NO_ISA_DMA
; /* Default to no ISA DMA. */
18374 if (ASC_NARROW_BOARD(boardp
)) {
18375 /* Register DMA channel for ISA bus. */
18376 if (asc_dvc_varp
->bus_type
& ASC_IS_ISA
) {
18377 shost
->dma_channel
= asc_dvc_varp
->cfg
->isa_dma_channel
;
18378 ret
= request_dma(shost
->dma_channel
, "advansys");
18381 ("advansys_board_found: board %d: request_dma() %d failed %d\n",
18382 boardp
->id
, shost
->dma_channel
, ret
);
18383 goto err_free_region
;
18385 AscEnableIsaDma(shost
->dma_channel
);
18388 #endif /* CONFIG_ISA */
18390 /* Register IRQ Number. */
18391 ASC_DBG1(2, "advansys_board_found: request_irq() %d\n", shost
->irq
);
18393 ret
= request_irq(shost
->irq
, advansys_interrupt
, share_irq
,
18394 "advansys", shost
);
18397 if (ret
== -EBUSY
) {
18399 ("advansys_board_found: board %d: request_irq(): IRQ 0x%x already in use.\n",
18400 boardp
->id
, shost
->irq
);
18401 } else if (ret
== -EINVAL
) {
18403 ("advansys_board_found: board %d: request_irq(): IRQ 0x%x not valid.\n",
18404 boardp
->id
, shost
->irq
);
18407 ("advansys_board_found: board %d: request_irq(): IRQ 0x%x failed with %d\n",
18408 boardp
->id
, shost
->irq
, ret
);
18414 * Initialize board RISC chip and enable interrupts.
18416 if (ASC_NARROW_BOARD(boardp
)) {
18417 ASC_DBG(2, "advansys_board_found: AscInitAsc1000Driver()\n");
18418 warn_code
= AscInitAsc1000Driver(asc_dvc_varp
);
18419 err_code
= asc_dvc_varp
->err_code
;
18421 if (warn_code
|| err_code
) {
18423 ("advansys_board_found: board %d error: init_state 0x%x, warn 0x%x, error 0x%x\n",
18425 asc_dvc_varp
->init_state
, warn_code
, err_code
);
18428 err_code
= advansys_wide_init_chip(boardp
, adv_dvc_varp
);
18432 goto err_free_wide_mem
;
18434 ASC_DBG_PRT_SCSI_HOST(2, shost
);
18436 ret
= scsi_add_host(shost
, dev
);
18438 goto err_free_wide_mem
;
18440 scsi_scan_host(shost
);
18444 advansys_wide_free_mem(boardp
);
18445 free_irq(shost
->irq
, shost
);
18447 if (shost
->dma_channel
!= NO_ISA_DMA
)
18448 free_dma(shost
->dma_channel
);
18450 release_region(shost
->io_port
, boardp
->asc_n_io_port
);
18452 kfree(boardp
->prtbuf
);
18454 if (boardp
->ioremap_addr
)
18455 iounmap(boardp
->ioremap_addr
);
18457 scsi_host_put(shost
);
18462 * advansys_detect()
18464 * Detect function for AdvanSys adapters.
18466 * Argument is a pointer to the host driver's scsi_hosts entry.
18468 * Return number of adapters found.
18470 * Note: Because this function is called during system initialization
18471 * it must not call SCSI mid-level functions including scsi_malloc()
18474 static int __init
advansys_detect(void)
18479 struct Scsi_Host
*shost
;
18481 ASC_DBG(1, "advansys_detect: begin\n");
18483 asc_legacy_count
= 0;
18486 * If I/O port probing has been modified, then verify and
18487 * clean-up the 'asc_ioport' list.
18489 if (asc_iopflag
== ASC_TRUE
) {
18490 for (ioport
= 0; ioport
< ASC_NUM_IOPORT_PROBE
; ioport
++) {
18491 ASC_DBG2(1, "advansys_detect: asc_ioport[%d] 0x%x\n",
18492 ioport
, asc_ioport
[ioport
]);
18493 if (asc_ioport
[ioport
] != 0) {
18494 for (iop
= 0; iop
< ASC_IOADR_TABLE_MAX_IX
;
18496 if (_asc_def_iop_base
[iop
] ==
18497 asc_ioport
[ioport
]) {
18501 if (iop
== ASC_IOADR_TABLE_MAX_IX
) {
18503 ("AdvanSys SCSI: specified I/O Port 0x%X is invalid\n",
18504 asc_ioport
[ioport
]);
18505 asc_ioport
[ioport
] = 0;
18512 for (bus
= 0; bus
< ASC_NUM_BUS
; bus
++) {
18514 ASC_DBG2(1, "advansys_detect: bus search type %d (%s)\n",
18515 bus
, asc_bus_name
[bus
]);
18518 while (asc_legacy_count
< ASC_NUM_BOARD_SUPPORTED
) {
18520 ASC_DBG1(2, "advansys_detect: asc_legacy_count %d\n",
18523 switch (asc_bus
[bus
]) {
18527 if (asc_iopflag
== ASC_FALSE
) {
18529 AscSearchIOPortAddr(iop
,
18533 * ISA and VL I/O port scanning has either been
18534 * eliminated or limited to selected ports on
18535 * the LILO command line, /etc/lilo.conf, or
18536 * by setting variables when the module was loaded.
18539 "advansys_detect: I/O port scanning modified\n");
18542 for (; ioport
< ASC_NUM_IOPORT_PROBE
;
18545 asc_ioport
[ioport
]) != 0) {
18551 "advansys_detect: probing I/O port 0x%x...\n",
18553 if (!request_region
18554 (iop
, ASC_IOADR_GAP
,
18557 ("AdvanSys SCSI: specified I/O Port 0x%X is busy\n",
18559 /* Don't try this I/O port twice. */
18560 asc_ioport
[ioport
] = 0;
18561 goto ioport_try_again
;
18562 } else if (AscFindSignature(iop
)
18565 ("AdvanSys SCSI: specified I/O Port 0x%X has no adapter\n",
18567 /* Don't try this I/O port twice. */
18568 release_region(iop
,
18570 asc_ioport
[ioport
] = 0;
18571 goto ioport_try_again
;
18574 * If this isn't an ISA board, then it must be
18575 * a VL board. If currently looking an ISA
18576 * board is being looked for then try for
18577 * another ISA board in 'asc_ioport'.
18579 if (asc_bus
[bus
] ==
18585 ASC_CHIP_VER_ISA_BIT
)
18588 * Don't clear 'asc_ioport[ioport]'. Try
18589 * this board again for VL. Increment
18590 * 'ioport' past this board.
18596 goto ioport_try_again
;
18600 * This board appears good, don't try the I/O port
18601 * again by clearing its value. Increment 'ioport'
18602 * for the next iteration.
18604 asc_ioport
[ioport
++] = 0;
18607 #endif /* CONFIG_ISA */
18612 iop
= AscSearchIOPortAddr(iop
, asc_bus
[bus
]);
18613 #endif /* CONFIG_ISA */
18618 ("advansys_detect: unknown bus type: %d\n",
18622 ASC_DBG1(1, "advansys_detect: iop 0x%x\n", iop
);
18625 * Adapter not found, try next bus type.
18630 shost
= advansys_board_found(iop
, NULL
, asc_bus
[bus
]);
18632 asc_host
[asc_legacy_count
++] = shost
;
18637 ASC_DBG1(1, "advansys_detect: done: asc_legacy_count %d\n",
18639 return asc_legacy_count
;
18643 * advansys_release()
18645 * Release resources allocated for a single AdvanSys adapter.
18647 static int advansys_release(struct Scsi_Host
*shost
)
18649 asc_board_t
*boardp
;
18651 ASC_DBG(1, "advansys_release: begin\n");
18652 scsi_remove_host(shost
);
18653 boardp
= ASC_BOARDP(shost
);
18654 free_irq(shost
->irq
, shost
);
18655 if (shost
->dma_channel
!= NO_ISA_DMA
) {
18656 ASC_DBG(1, "advansys_release: free_dma()\n");
18657 free_dma(shost
->dma_channel
);
18659 release_region(shost
->io_port
, boardp
->asc_n_io_port
);
18660 if (ASC_WIDE_BOARD(boardp
)) {
18661 iounmap(boardp
->ioremap_addr
);
18662 advansys_wide_free_mem(boardp
);
18664 kfree(boardp
->prtbuf
);
18665 scsi_host_put(shost
);
18666 ASC_DBG(1, "advansys_release: end\n");
18670 /* PCI Devices supported by this driver */
18671 static struct pci_device_id advansys_pci_tbl
[] __devinitdata
= {
18672 {PCI_VENDOR_ID_ASP
, PCI_DEVICE_ID_ASP_1200A
,
18673 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
18674 {PCI_VENDOR_ID_ASP
, PCI_DEVICE_ID_ASP_ABP940
,
18675 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
18676 {PCI_VENDOR_ID_ASP
, PCI_DEVICE_ID_ASP_ABP940U
,
18677 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
18678 {PCI_VENDOR_ID_ASP
, PCI_DEVICE_ID_ASP_ABP940UW
,
18679 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
18680 {PCI_VENDOR_ID_ASP
, PCI_DEVICE_ID_38C0800_REV1
,
18681 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
18682 {PCI_VENDOR_ID_ASP
, PCI_DEVICE_ID_38C1600_REV1
,
18683 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
18687 MODULE_DEVICE_TABLE(pci
, advansys_pci_tbl
);
18689 static int __devinit
18690 advansys_pci_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
18693 struct Scsi_Host
*shost
;
18695 err
= pci_enable_device(pdev
);
18699 if (pci_resource_len(pdev
, 0) == 0)
18702 ioport
= pci_resource_start(pdev
, 0);
18703 shost
= advansys_board_found(ioport
, &pdev
->dev
, ASC_IS_PCI
);
18708 pci_set_drvdata(pdev
, shost
);
18713 pci_disable_device(pdev
);
18718 static void __devexit
advansys_pci_remove(struct pci_dev
*pdev
)
18720 advansys_release(pci_get_drvdata(pdev
));
18721 pci_disable_device(pdev
);
18724 static struct pci_driver advansys_pci_driver
= {
18725 .name
= "advansys",
18726 .id_table
= advansys_pci_tbl
,
18727 .probe
= advansys_pci_probe
,
18728 .remove
= __devexit_p(advansys_pci_remove
),
18731 static int __init
advansys_init(void)
18735 error
= pci_register_driver(&advansys_pci_driver
);
18742 for (i
= 0; i
< asc_legacy_count
; i
++)
18743 advansys_release(asc_host
[i
]);
18748 static void __exit
advansys_exit(void)
18752 pci_unregister_driver(&advansys_pci_driver
);
18754 for (i
= 0; i
< asc_legacy_count
; i
++)
18755 advansys_release(asc_host
[i
]);
18758 module_init(advansys_init
);
18759 module_exit(advansys_exit
);
18761 MODULE_LICENSE("GPL");