drivers/scsi/aic7xxx/aic79xx_inline.h

   1 /*
   2  * Inline routines shareable across OS platforms.
   3  *
   4  * Copyright (c) 1994-2001 Justin T. Gibbs.
   5  * Copyright (c) 2000-2003 Adaptec Inc.
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions, and the following disclaimer,
  13  *    without modification.
  14  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  15  *    substantially similar to the "NO WARRANTY" disclaimer below
  16  *    ("Disclaimer") and any redistribution must be conditioned upon
  17  *    including a substantially similar Disclaimer requirement for further
  18  *    binary redistribution.
  19  * 3. Neither the names of the above-listed copyright holders nor the names
  20  *    of any contributors may be used to endorse or promote products derived
  21  *    from this software without specific prior written permission.
  22  *
  23  * Alternatively, this software may be distributed under the terms of the
  24  * GNU General Public License ("GPL") version 2 as published by the Free
  25  * Software Foundation.
  26  *
  27  * NO WARRANTY
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  36  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  37  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38  * POSSIBILITY OF SUCH DAMAGES.
  39  *
  40  * $Id: //depot/aic7xxx/aic7xxx/aic79xx_inline.h#51 $
  41  *
  42  * $FreeBSD$
  43  */
  44
  45 #ifndef _AIC79XX_INLINE_H_
  46 #define _AIC79XX_INLINE_H_
  47
  48 /******************************** Debugging ***********************************/
  49 static __inline char *ahd_name(struct ahd_softc *ahd);
  50
  51 static __inline char *
  52 ahd_name(struct ahd_softc *ahd)
  53 {
  54         return (ahd->name);
  55 }
  56
  57 /************************ Sequencer Execution Control *************************/
  58 static __inline void ahd_known_modes(struct ahd_softc *ahd,
  59                                      ahd_mode src, ahd_mode dst);
  60 static __inline ahd_mode_state ahd_build_mode_state(struct ahd_softc *ahd,
  61                                                     ahd_mode src,
  62                                                     ahd_mode dst);
  63 static __inline void ahd_extract_mode_state(struct ahd_softc *ahd,
  64                                             ahd_mode_state state,
  65                                             ahd_mode *src, ahd_mode *dst);
  66 static __inline void ahd_set_modes(struct ahd_softc *ahd, ahd_mode src,
  67                                    ahd_mode dst);
  68 static __inline void ahd_update_modes(struct ahd_softc *ahd);
  69 static __inline void ahd_assert_modes(struct ahd_softc *ahd, ahd_mode srcmode,
  70                                       ahd_mode dstmode, const char *file,
  71                                       int line);
  72 static __inline ahd_mode_state ahd_save_modes(struct ahd_softc *ahd);
  73 static __inline void ahd_restore_modes(struct ahd_softc *ahd,
  74                                        ahd_mode_state state);
  75 static __inline int  ahd_is_paused(struct ahd_softc *ahd);
  76 static __inline void ahd_pause(struct ahd_softc *ahd);
  77 static __inline void ahd_unpause(struct ahd_softc *ahd);
  78
  79 static __inline void
  80 ahd_known_modes(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst)
  81 {
  82         ahd->src_mode = src;
  83         ahd->dst_mode = dst;
  84         ahd->saved_src_mode = src;
  85         ahd->saved_dst_mode = dst;
  86 }
  87
  88 static __inline ahd_mode_state
  89 ahd_build_mode_state(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst)
  90 {
  91         return ((src << SRC_MODE_SHIFT) | (dst << DST_MODE_SHIFT));
  92 }
  93
  94 static __inline void
  95 ahd_extract_mode_state(struct ahd_softc *ahd, ahd_mode_state state,
  96                        ahd_mode *src, ahd_mode *dst)
  97 {
  98         *src = (state & SRC_MODE) >> SRC_MODE_SHIFT;
  99         *dst = (state & DST_MODE) >> DST_MODE_SHIFT;
 100 }
 101
 102 static __inline void
 103 ahd_set_modes(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst)
 104 {
 105         if (ahd->src_mode == src && ahd->dst_mode == dst)
 106                 return;
 107 #ifdef AHD_DEBUG
 108         if (ahd->src_mode == AHD_MODE_UNKNOWN
 109          || ahd->dst_mode == AHD_MODE_UNKNOWN)
 110                 panic("Setting mode prior to saving it.\n");
 111         if ((ahd_debug & AHD_SHOW_MODEPTR) != 0)
 112                 printf("%s: Setting mode 0x%x\n", ahd_name(ahd),
 113                        ahd_build_mode_state(ahd, src, dst));
 114 #endif
 115         ahd_outb(ahd, MODE_PTR, ahd_build_mode_state(ahd, src, dst));
 116         ahd->src_mode = src;
 117         ahd->dst_mode = dst;
 118 }
 119
 120 static __inline void
 121 ahd_update_modes(struct ahd_softc *ahd)
 122 {
 123         ahd_mode_state mode_ptr;
 124         ahd_mode src;
 125         ahd_mode dst;
 126
 127         mode_ptr = ahd_inb(ahd, MODE_PTR);
 128 #ifdef AHD_DEBUG
 129         if ((ahd_debug & AHD_SHOW_MODEPTR) != 0)
 130                 printf("Reading mode 0x%x\n", mode_ptr);
 131 #endif
 132         ahd_extract_mode_state(ahd, mode_ptr, &src, &dst);
 133         ahd_known_modes(ahd, src, dst);
 134 }
 135
 136 static __inline void
 137 ahd_assert_modes(struct ahd_softc *ahd, ahd_mode srcmode,
 138                  ahd_mode dstmode, const char *file, int line)
 139 {
 140 #ifdef AHD_DEBUG
 141         if ((srcmode & AHD_MK_MSK(ahd->src_mode)) == 0
 142          || (dstmode & AHD_MK_MSK(ahd->dst_mode)) == 0) {
 143                 panic("%s:%s:%d: Mode assertion failed.\n",
 144                        ahd_name(ahd), file, line);
 145         }
 146 #endif
 147 }
 148
 149 static __inline ahd_mode_state
 150 ahd_save_modes(struct ahd_softc *ahd)
 151 {
 152         if (ahd->src_mode == AHD_MODE_UNKNOWN
 153          || ahd->dst_mode == AHD_MODE_UNKNOWN)
 154                 ahd_update_modes(ahd);
 155
 156         return (ahd_build_mode_state(ahd, ahd->src_mode, ahd->dst_mode));
 157 }
 158
 159 static __inline void
 160 ahd_restore_modes(struct ahd_softc *ahd, ahd_mode_state state)
 161 {
 162         ahd_mode src;
 163         ahd_mode dst;
 164
 165         ahd_extract_mode_state(ahd, state, &src, &dst);
 166         ahd_set_modes(ahd, src, dst);
 167 }
 168
 169 #define AHD_ASSERT_MODES(ahd, source, dest) \
 170         ahd_assert_modes(ahd, source, dest, __FILE__, __LINE__);
 171
 172 /*
 173  * Determine whether the sequencer has halted code execution.
 174  * Returns non-zero status if the sequencer is stopped.
 175  */
 176 static __inline int
 177 ahd_is_paused(struct ahd_softc *ahd)
 178 {
 179         return ((ahd_inb(ahd, HCNTRL) & PAUSE) != 0);
 180 }
 181
 182 /*
 183  * Request that the sequencer stop and wait, indefinitely, for it
 184  * to stop.  The sequencer will only acknowledge that it is paused
 185  * once it has reached an instruction boundary and PAUSEDIS is
 186  * cleared in the SEQCTL register.  The sequencer may use PAUSEDIS
 187  * for critical sections.
 188  */
 189 static __inline void
 190 ahd_pause(struct ahd_softc *ahd)
 191 {
 192         ahd_outb(ahd, HCNTRL, ahd->pause);
 193
 194         /*
 195          * Since the sequencer can disable pausing in a critical section, we
 196          * must loop until it actually stops.
 197          */
 198         while (ahd_is_paused(ahd) == 0)
 199                 ;
 200 }
 201
 202 /*
 203  * Allow the sequencer to continue program execution.
 204  * We check here to ensure that no additional interrupt
 205  * sources that would cause the sequencer to halt have been
 206  * asserted.  If, for example, a SCSI bus reset is detected
 207  * while we are fielding a different, pausing, interrupt type,
 208  * we don't want to release the sequencer before going back
 209  * into our interrupt handler and dealing with this new
 210  * condition.
 211  */
 212 static __inline void
 213 ahd_unpause(struct ahd_softc *ahd)
 214 {
 215         /*
 216          * Automatically restore our modes to those saved
 217          * prior to the first change of the mode.
 218          */
 219         if (ahd->saved_src_mode != AHD_MODE_UNKNOWN
 220          && ahd->saved_dst_mode != AHD_MODE_UNKNOWN) {
 221                 if ((ahd->flags & AHD_UPDATE_PEND_CMDS) != 0)
 222                         ahd_reset_cmds_pending(ahd);
 223                 ahd_set_modes(ahd, ahd->saved_src_mode, ahd->saved_dst_mode);
 224         }
 225
 226         if ((ahd_inb(ahd, INTSTAT) & ~CMDCMPLT) == 0)
 227                 ahd_outb(ahd, HCNTRL, ahd->unpause);
 228
 229         ahd_known_modes(ahd, AHD_MODE_UNKNOWN, AHD_MODE_UNKNOWN);
 230 }
 231
 232 /*********************** Scatter Gather List Handling *************************/
 233 static __inline void    *ahd_sg_setup(struct ahd_softc *ahd, struct scb *scb,
 234                                       void *sgptr, dma_addr_t addr,
 235                                       bus_size_t len, int last);
 236 static __inline void     ahd_setup_scb_common(struct ahd_softc *ahd,
 237                                               struct scb *scb);
 238 static __inline void     ahd_setup_data_scb(struct ahd_softc *ahd,
 239                                             struct scb *scb);
 240 static __inline void     ahd_setup_noxfer_scb(struct ahd_softc *ahd,
 241                                               struct scb *scb);
 242
 243 static __inline void *
 244 ahd_sg_setup(struct ahd_softc *ahd, struct scb *scb,
 245              void *sgptr, dma_addr_t addr, bus_size_t len, int last)
 246 {
 247         scb->sg_count++;
 248         if (sizeof(dma_addr_t) > 4
 249          && (ahd->flags & AHD_64BIT_ADDRESSING) != 0) {
 250                 struct ahd_dma64_seg *sg;
 251
 252                 sg = (struct ahd_dma64_seg *)sgptr;
 253                 sg->addr = ahd_htole64(addr);
 254                 sg->len = ahd_htole32(len | (last ? AHD_DMA_LAST_SEG : 0));
 255                 return (sg + 1);
 256         } else {
 257                 struct ahd_dma_seg *sg;
 258
 259                 sg = (struct ahd_dma_seg *)sgptr;
 260                 sg->addr = ahd_htole32(addr & 0xFFFFFFFF);
 261                 sg->len = ahd_htole32(len | ((addr >> 8) & 0x7F000000)
 262                                     | (last ? AHD_DMA_LAST_SEG : 0));
 263                 return (sg + 1);
 264         }
 265 }
 266
 267 static __inline void
 268 ahd_setup_scb_common(struct ahd_softc *ahd, struct scb *scb)
 269 {
 270         /* XXX Handle target mode SCBs. */
 271         scb->crc_retry_count = 0;
 272         if ((scb->flags & SCB_PACKETIZED) != 0) {
 273                 /* XXX what about ACA??  It is type 4, but TAG_TYPE == 0x3. */
 274                 scb->hscb->task_attribute = scb->hscb->control & SCB_TAG_TYPE;
 275         } else {
 276                 if (ahd_get_transfer_length(scb) & 0x01)
 277                         scb->hscb->task_attribute = SCB_XFERLEN_ODD;
 278                 else
 279                         scb->hscb->task_attribute = 0;
 280         }
 281
 282         if (scb->hscb->cdb_len <= MAX_CDB_LEN_WITH_SENSE_ADDR
 283          || (scb->hscb->cdb_len & SCB_CDB_LEN_PTR) != 0)
 284                 scb->hscb->shared_data.idata.cdb_plus_saddr.sense_addr =
 285                     ahd_htole32(scb->sense_busaddr);
 286 }
 287
 288 static __inline void
 289 ahd_setup_data_scb(struct ahd_softc *ahd, struct scb *scb)
 290 {
 291         /*
 292          * Copy the first SG into the "current" data ponter area.
 293          */
 294         if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0) {
 295                 struct ahd_dma64_seg *sg;
 296
 297                 sg = (struct ahd_dma64_seg *)scb->sg_list;
 298                 scb->hscb->dataptr = sg->addr;
 299                 scb->hscb->datacnt = sg->len;
 300         } else {
 301                 struct ahd_dma_seg *sg;
 302                 uint32_t *dataptr_words;
 303
 304                 sg = (struct ahd_dma_seg *)scb->sg_list;
 305                 dataptr_words = (uint32_t*)&scb->hscb->dataptr;
 306                 dataptr_words[0] = sg->addr;
 307                 dataptr_words[1] = 0;
 308                 if ((ahd->flags & AHD_39BIT_ADDRESSING) != 0) {
 309                         uint64_t high_addr;
 310
 311                         high_addr = ahd_le32toh(sg->len) & 0x7F000000;
 312                         scb->hscb->dataptr |= ahd_htole64(high_addr << 8);
 313                 }
 314                 scb->hscb->datacnt = sg->len;
 315         }
 316         /*
 317          * Note where to find the SG entries in bus space.
 318          * We also set the full residual flag which the
 319          * sequencer will clear as soon as a data transfer
 320          * occurs.
 321          */
 322         scb->hscb->sgptr = ahd_htole32(scb->sg_list_busaddr|SG_FULL_RESID);
 323 }
 324
 325 static __inline void
 326 ahd_setup_noxfer_scb(struct ahd_softc *ahd, struct scb *scb)
 327 {
 328         scb->hscb->sgptr = ahd_htole32(SG_LIST_NULL);
 329         scb->hscb->dataptr = 0;
 330         scb->hscb->datacnt = 0;
 331 }
 332
 333 /************************** Memory mapping routines ***************************/
 334 static __inline size_t  ahd_sg_size(struct ahd_softc *ahd);
 335 static __inline void *
 336                         ahd_sg_bus_to_virt(struct ahd_softc *ahd,
 337                                            struct scb *scb,
 338                                            uint32_t sg_busaddr);
 339 static __inline uint32_t
 340                         ahd_sg_virt_to_bus(struct ahd_softc *ahd,
 341                                            struct scb *scb,
 342                                            void *sg);
 343 static __inline void    ahd_sync_scb(struct ahd_softc *ahd,
 344                                      struct scb *scb, int op);
 345 static __inline void    ahd_sync_sglist(struct ahd_softc *ahd,
 346                                         struct scb *scb, int op);
 347 static __inline void    ahd_sync_sense(struct ahd_softc *ahd,
 348                                        struct scb *scb, int op);
 349 static __inline uint32_t
 350                         ahd_targetcmd_offset(struct ahd_softc *ahd,
 351                                              u_int index);
 352
 353 static __inline size_t
 354 ahd_sg_size(struct ahd_softc *ahd)
 355 {
 356         if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0)
 357                 return (sizeof(struct ahd_dma64_seg));
 358         return (sizeof(struct ahd_dma_seg));
 359 }
 360
 361 static __inline void *
 362 ahd_sg_bus_to_virt(struct ahd_softc *ahd, struct scb *scb, uint32_t sg_busaddr)
 363 {
 364         dma_addr_t sg_offset;
 365
 366         /* sg_list_phys points to entry 1, not 0 */
 367         sg_offset = sg_busaddr - (scb->sg_list_busaddr - ahd_sg_size(ahd));
 368         return ((uint8_t *)scb->sg_list + sg_offset);
 369 }
 370
 371 static __inline uint32_t
 372 ahd_sg_virt_to_bus(struct ahd_softc *ahd, struct scb *scb, void *sg)
 373 {
 374         dma_addr_t sg_offset;
 375
 376         /* sg_list_phys points to entry 1, not 0 */
 377         sg_offset = ((uint8_t *)sg - (uint8_t *)scb->sg_list)
 378                   - ahd_sg_size(ahd);
 379
 380         return (scb->sg_list_busaddr + sg_offset);
 381 }
 382
 383 static __inline void
 384 ahd_sync_scb(struct ahd_softc *ahd, struct scb *scb, int op)
 385 {
 386         ahd_dmamap_sync(ahd, ahd->scb_data.hscb_dmat,
 387                         scb->hscb_map->dmamap,
 388                         /*offset*/(uint8_t*)scb->hscb - scb->hscb_map->vaddr,
 389                         /*len*/sizeof(*scb->hscb), op);
 390 }
 391
 392 static __inline void
 393 ahd_sync_sglist(struct ahd_softc *ahd, struct scb *scb, int op)
 394 {
 395         if (scb->sg_count == 0)
 396                 return;
 397
 398         ahd_dmamap_sync(ahd, ahd->scb_data.sg_dmat,
 399                         scb->sg_map->dmamap,
 400                         /*offset*/scb->sg_list_busaddr - ahd_sg_size(ahd),
 401                         /*len*/ahd_sg_size(ahd) * scb->sg_count, op);
 402 }
 403
 404 static __inline void
 405 ahd_sync_sense(struct ahd_softc *ahd, struct scb *scb, int op)
 406 {
 407         ahd_dmamap_sync(ahd, ahd->scb_data.sense_dmat,
 408                         scb->sense_map->dmamap,
 409                         /*offset*/scb->sense_busaddr,
 410                         /*len*/AHD_SENSE_BUFSIZE, op);
 411 }
 412
 413 static __inline uint32_t
 414 ahd_targetcmd_offset(struct ahd_softc *ahd, u_int index)
 415 {
 416         return (((uint8_t *)&ahd->targetcmds[index])
 417                - (uint8_t *)ahd->qoutfifo);
 418 }
 419
 420 /*********************** Miscelaneous Support Functions ***********************/
 421 static __inline void    ahd_complete_scb(struct ahd_softc *ahd,
 422                                          struct scb *scb);
 423 static __inline void    ahd_update_residual(struct ahd_softc *ahd,
 424                                             struct scb *scb);
 425 static __inline struct ahd_initiator_tinfo *
 426                         ahd_fetch_transinfo(struct ahd_softc *ahd,
 427                                             char channel, u_int our_id,
 428                                             u_int remote_id,
 429                                             struct ahd_tmode_tstate **tstate);
 430 static __inline uint16_t
 431                         ahd_inw(struct ahd_softc *ahd, u_int port);
 432 static __inline void    ahd_outw(struct ahd_softc *ahd, u_int port,
 433                                  u_int value);
 434 static __inline uint32_t
 435                         ahd_inl(struct ahd_softc *ahd, u_int port);
 436 static __inline void    ahd_outl(struct ahd_softc *ahd, u_int port,
 437                                  uint32_t value);
 438 static __inline uint64_t
 439                         ahd_inq(struct ahd_softc *ahd, u_int port);
 440 static __inline void    ahd_outq(struct ahd_softc *ahd, u_int port,
 441                                  uint64_t value);
 442 static __inline u_int   ahd_get_scbptr(struct ahd_softc *ahd);
 443 static __inline void    ahd_set_scbptr(struct ahd_softc *ahd, u_int scbptr);
 444 static __inline u_int   ahd_get_hnscb_qoff(struct ahd_softc *ahd);
 445 static __inline void    ahd_set_hnscb_qoff(struct ahd_softc *ahd, u_int value);
 446 static __inline u_int   ahd_get_hescb_qoff(struct ahd_softc *ahd);
 447 static __inline void    ahd_set_hescb_qoff(struct ahd_softc *ahd, u_int value);
 448 static __inline u_int   ahd_get_snscb_qoff(struct ahd_softc *ahd);
 449 static __inline void    ahd_set_snscb_qoff(struct ahd_softc *ahd, u_int value);
 450 static __inline u_int   ahd_get_sescb_qoff(struct ahd_softc *ahd);
 451 static __inline void    ahd_set_sescb_qoff(struct ahd_softc *ahd, u_int value);
 452 static __inline u_int   ahd_get_sdscb_qoff(struct ahd_softc *ahd);
 453 static __inline void    ahd_set_sdscb_qoff(struct ahd_softc *ahd, u_int value);
 454 static __inline u_int   ahd_inb_scbram(struct ahd_softc *ahd, u_int offset);
 455 static __inline u_int   ahd_inw_scbram(struct ahd_softc *ahd, u_int offset);
 456 static __inline uint32_t
 457                         ahd_inl_scbram(struct ahd_softc *ahd, u_int offset);
 458 static __inline uint64_t
 459                         ahd_inq_scbram(struct ahd_softc *ahd, u_int offset);
 460 static __inline void    ahd_swap_with_next_hscb(struct ahd_softc *ahd,
 461                                                 struct scb *scb);
 462 static __inline void    ahd_queue_scb(struct ahd_softc *ahd, struct scb *scb);
 463 static __inline uint8_t *
 464                         ahd_get_sense_buf(struct ahd_softc *ahd,
 465                                           struct scb *scb);
 466 static __inline uint32_t
 467                         ahd_get_sense_bufaddr(struct ahd_softc *ahd,
 468                                               struct scb *scb);
 469
 470 static __inline void
 471 ahd_complete_scb(struct ahd_softc *ahd, struct scb *scb)
 472 {
 473         uint32_t sgptr;
 474
 475         sgptr = ahd_le32toh(scb->hscb->sgptr);
 476         if ((sgptr & SG_STATUS_VALID) != 0)
 477                 ahd_handle_scb_status(ahd, scb);
 478         else
 479                 ahd_done(ahd, scb);
 480 }
 481
 482 /*
 483  * Determine whether the sequencer reported a residual
 484  * for this SCB/transaction.
 485  */
 486 static __inline void
 487 ahd_update_residual(struct ahd_softc *ahd, struct scb *scb)
 488 {
 489         uint32_t sgptr;
 490
 491         sgptr = ahd_le32toh(scb->hscb->sgptr);
 492         if ((sgptr & SG_STATUS_VALID) != 0)
 493                 ahd_calc_residual(ahd, scb);
 494 }
 495
 496 /*
 497  * Return pointers to the transfer negotiation information
 498  * for the specified our_id/remote_id pair.
 499  */
 500 static __inline struct ahd_initiator_tinfo *
 501 ahd_fetch_transinfo(struct ahd_softc *ahd, char channel, u_int our_id,
 502                     u_int remote_id, struct ahd_tmode_tstate **tstate)
 503 {
 504         /*
 505          * Transfer data structures are stored from the perspective
 506          * of the target role.  Since the parameters for a connection
 507          * in the initiator role to a given target are the same as
 508          * when the roles are reversed, we pretend we are the target.
 509          */
 510         if (channel == 'B')
 511                 our_id += 8;
 512         *tstate = ahd->enabled_targets[our_id];
 513         return (&(*tstate)->transinfo[remote_id]);
 514 }
 515
 516 #define AHD_COPY_COL_IDX(dst, src)                              \
 517 do {                                                            \
 518         dst->hscb->scsiid = src->hscb->scsiid;                  \
 519         dst->hscb->lun = src->hscb->lun;                        \
 520 } while (0)
 521
 522 static __inline uint16_t
 523 ahd_inw(struct ahd_softc *ahd, u_int port)
 524 {
 525         return ((ahd_inb(ahd, port+1) << 8) | ahd_inb(ahd, port));
 526 }
 527
 528 static __inline void
 529 ahd_outw(struct ahd_softc *ahd, u_int port, u_int value)
 530 {
 531         ahd_outb(ahd, port, value & 0xFF);
 532         ahd_outb(ahd, port+1, (value >> 8) & 0xFF);
 533 }
 534
 535 static __inline uint32_t
 536 ahd_inl(struct ahd_softc *ahd, u_int port)
 537 {
 538         return ((ahd_inb(ahd, port))
 539               | (ahd_inb(ahd, port+1) << 8)
 540               | (ahd_inb(ahd, port+2) << 16)
 541               | (ahd_inb(ahd, port+3) << 24));
 542 }
 543
 544 static __inline void
 545 ahd_outl(struct ahd_softc *ahd, u_int port, uint32_t value)
 546 {
 547         ahd_outb(ahd, port, (value) & 0xFF);
 548         ahd_outb(ahd, port+1, ((value) >> 8) & 0xFF);
 549         ahd_outb(ahd, port+2, ((value) >> 16) & 0xFF);
 550         ahd_outb(ahd, port+3, ((value) >> 24) & 0xFF);
 551 }
 552
 553 static __inline uint64_t
 554 ahd_inq(struct ahd_softc *ahd, u_int port)
 555 {
 556         return ((ahd_inb(ahd, port))
 557               | (ahd_inb(ahd, port+1) << 8)
 558               | (ahd_inb(ahd, port+2) << 16)
 559               | (ahd_inb(ahd, port+3) << 24)
 560               | (((uint64_t)ahd_inb(ahd, port+4)) << 32)
 561               | (((uint64_t)ahd_inb(ahd, port+5)) << 40)
 562               | (((uint64_t)ahd_inb(ahd, port+6)) << 48)
 563               | (((uint64_t)ahd_inb(ahd, port+7)) << 56));
 564 }
 565
 566 static __inline void
 567 ahd_outq(struct ahd_softc *ahd, u_int port, uint64_t value)
 568 {
 569         ahd_outb(ahd, port, value & 0xFF);
 570         ahd_outb(ahd, port+1, (value >> 8) & 0xFF);
 571         ahd_outb(ahd, port+2, (value >> 16) & 0xFF);
 572         ahd_outb(ahd, port+3, (value >> 24) & 0xFF);
 573         ahd_outb(ahd, port+4, (value >> 32) & 0xFF);
 574         ahd_outb(ahd, port+5, (value >> 40) & 0xFF);
 575         ahd_outb(ahd, port+6, (value >> 48) & 0xFF);
 576         ahd_outb(ahd, port+7, (value >> 56) & 0xFF);
 577 }
 578
 579 static __inline u_int
 580 ahd_get_scbptr(struct ahd_softc *ahd)
 581 {
 582         AHD_ASSERT_MODES(ahd, ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK),
 583                          ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK));
 584         return (ahd_inb(ahd, SCBPTR) | (ahd_inb(ahd, SCBPTR + 1) << 8));
 585 }
 586
 587 static __inline void
 588 ahd_set_scbptr(struct ahd_softc *ahd, u_int scbptr)
 589 {
 590         AHD_ASSERT_MODES(ahd, ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK),
 591                          ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK));
 592         ahd_outb(ahd, SCBPTR, scbptr & 0xFF);
 593         ahd_outb(ahd, SCBPTR+1, (scbptr >> 8) & 0xFF);
 594 }
 595
 596 static __inline u_int
 597 ahd_get_hnscb_qoff(struct ahd_softc *ahd)
 598 {
 599         return (ahd_inw_atomic(ahd, HNSCB_QOFF));
 600 }
 601
 602 static __inline void
 603 ahd_set_hnscb_qoff(struct ahd_softc *ahd, u_int value)
 604 {
 605         ahd_outw_atomic(ahd, HNSCB_QOFF, value);
 606 }
 607
 608 static __inline u_int
 609 ahd_get_hescb_qoff(struct ahd_softc *ahd)
 610 {
 611         return (ahd_inb(ahd, HESCB_QOFF));
 612 }
 613
 614 static __inline void
 615 ahd_set_hescb_qoff(struct ahd_softc *ahd, u_int value)
 616 {
 617         ahd_outb(ahd, HESCB_QOFF, value);
 618 }
 619
 620 static __inline u_int
 621 ahd_get_snscb_qoff(struct ahd_softc *ahd)
 622 {
 623         u_int oldvalue;
 624
 625         AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
 626         oldvalue = ahd_inw(ahd, SNSCB_QOFF);
 627         ahd_outw(ahd, SNSCB_QOFF, oldvalue);
 628         return (oldvalue);
 629 }
 630
 631 static __inline void
 632 ahd_set_snscb_qoff(struct ahd_softc *ahd, u_int value)
 633 {
 634         AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
 635         ahd_outw(ahd, SNSCB_QOFF, value);
 636 }
 637
 638 static __inline u_int
 639 ahd_get_sescb_qoff(struct ahd_softc *ahd)
 640 {
 641         AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
 642         return (ahd_inb(ahd, SESCB_QOFF));
 643 }
 644
 645 static __inline void
 646 ahd_set_sescb_qoff(struct ahd_softc *ahd, u_int value)
 647 {
 648         AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
 649         ahd_outb(ahd, SESCB_QOFF, value);
 650 }
 651
 652 static __inline u_int
 653 ahd_get_sdscb_qoff(struct ahd_softc *ahd)
 654 {
 655         AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
 656         return (ahd_inb(ahd, SDSCB_QOFF) | (ahd_inb(ahd, SDSCB_QOFF + 1) << 8));
 657 }
 658
 659 static __inline void
 660 ahd_set_sdscb_qoff(struct ahd_softc *ahd, u_int value)
 661 {
 662         AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
 663         ahd_outb(ahd, SDSCB_QOFF, value & 0xFF);
 664         ahd_outb(ahd, SDSCB_QOFF+1, (value >> 8) & 0xFF);
 665 }
 666
 667 static __inline u_int
 668 ahd_inb_scbram(struct ahd_softc *ahd, u_int offset)
 669 {
 670         u_int value;
 671
 672         /*
 673          * Workaround PCI-X Rev A. hardware bug.
 674          * After a host read of SCB memory, the chip
 675          * may become confused into thinking prefetch
 676          * was required.  This starts the discard timer
 677          * running and can cause an unexpected discard
 678          * timer interrupt.  The work around is to read
 679          * a normal register prior to the exhaustion of
 680          * the discard timer.  The mode pointer register
 681          * has no side effects and so serves well for
 682          * this purpose.
 683          *
 684          * Razor #528
 685          */
 686         value = ahd_inb(ahd, offset);
 687         if ((ahd->flags & AHD_PCIX_SCBRAM_RD_BUG) != 0)
 688                 ahd_inb(ahd, MODE_PTR);
 689         return (value);
 690 }
 691
 692 static __inline u_int
 693 ahd_inw_scbram(struct ahd_softc *ahd, u_int offset)
 694 {
 695         return (ahd_inb_scbram(ahd, offset)
 696               | (ahd_inb_scbram(ahd, offset+1) << 8));
 697 }
 698
 699 static __inline uint32_t
 700 ahd_inl_scbram(struct ahd_softc *ahd, u_int offset)
 701 {
 702         return (ahd_inw_scbram(ahd, offset)
 703               | (ahd_inw_scbram(ahd, offset+2) << 16));
 704 }
 705
 706 static __inline uint64_t
 707 ahd_inq_scbram(struct ahd_softc *ahd, u_int offset)
 708 {
 709         return (ahd_inl_scbram(ahd, offset)
 710               | ((uint64_t)ahd_inl_scbram(ahd, offset+4)) << 32);
 711 }
 712
 713 static __inline struct scb *
 714 ahd_lookup_scb(struct ahd_softc *ahd, u_int tag)
 715 {
 716         struct scb* scb;
 717
 718         if (tag >= AHD_SCB_MAX)
 719                 return (NULL);
 720         scb = ahd->scb_data.scbindex[tag];
 721         if (scb != NULL)
 722                 ahd_sync_scb(ahd, scb,
 723                              BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
 724         return (scb);
 725 }
 726
 727 static __inline void
 728 ahd_swap_with_next_hscb(struct ahd_softc *ahd, struct scb *scb)
 729 {
 730         struct hardware_scb *q_hscb;
 731         uint32_t saved_hscb_busaddr;
 732
 733         /*
 734          * Our queuing method is a bit tricky.  The card
 735          * knows in advance which HSCB (by address) to download,
 736          * and we can't disappoint it.  To achieve this, the next
 737          * HSCB to download is saved off in ahd->next_queued_hscb.
 738          * When we are called to queue "an arbitrary scb",
 739          * we copy the contents of the incoming HSCB to the one
 740          * the sequencer knows about, swap HSCB pointers and
 741          * finally assign the SCB to the tag indexed location
 742          * in the scb_array.  This makes sure that we can still
 743          * locate the correct SCB by SCB_TAG.
 744          */
 745         q_hscb = ahd->next_queued_hscb;
 746         saved_hscb_busaddr = q_hscb->hscb_busaddr;
 747         memcpy(q_hscb, scb->hscb, sizeof(*scb->hscb));
 748         q_hscb->hscb_busaddr = saved_hscb_busaddr;
 749         q_hscb->next_hscb_busaddr = scb->hscb->hscb_busaddr;
 750
 751         /* Now swap HSCB pointers. */
 752         ahd->next_queued_hscb = scb->hscb;
 753         scb->hscb = q_hscb;
 754
 755         /* Now define the mapping from tag to SCB in the scbindex */
 756         ahd->scb_data.scbindex[SCB_GET_TAG(scb)] = scb;
 757 }
 758
 759 /*
 760  * Tell the sequencer about a new transaction to execute.
 761  */
 762 static __inline void
 763 ahd_queue_scb(struct ahd_softc *ahd, struct scb *scb)
 764 {
 765         ahd_swap_with_next_hscb(ahd, scb);
 766
 767         if (SCBID_IS_NULL(SCB_GET_TAG(scb)))
 768                 panic("Attempt to queue invalid SCB tag %x\n",
 769                       SCB_GET_TAG(scb));
 770
 771         /*
 772          * Keep a history of SCBs we've downloaded in the qinfifo.
 773          */
 774         ahd->qinfifo[AHD_QIN_WRAP(ahd->qinfifonext)] = SCB_GET_TAG(scb);
 775         ahd->qinfifonext++;
 776
 777         if (scb->sg_count != 0)
 778                 ahd_setup_data_scb(ahd, scb);
 779         else
 780                 ahd_setup_noxfer_scb(ahd, scb);
 781         ahd_setup_scb_common(ahd, scb);
 782
 783         /*
 784          * Make sure our data is consistent from the
 785          * perspective of the adapter.
 786          */
 787         ahd_sync_scb(ahd, scb, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
 788
 789 #ifdef AHD_DEBUG
 790         if ((ahd_debug & AHD_SHOW_QUEUE) != 0) {
 791                 uint64_t host_dataptr;
 792
 793                 host_dataptr = ahd_le64toh(scb->hscb->dataptr);
 794                 printf("%s: Queueing SCB 0x%x bus addr 0x%x - 0x%x%x/0x%x\n",
 795                        ahd_name(ahd),
 796                        SCB_GET_TAG(scb), ahd_le32toh(scb->hscb->hscb_busaddr),
 797                        (u_int)((host_dataptr >> 32) & 0xFFFFFFFF),
 798                        (u_int)(host_dataptr & 0xFFFFFFFF),
 799                        ahd_le32toh(scb->hscb->datacnt));
 800         }
 801 #endif
 802         /* Tell the adapter about the newly queued SCB */
 803         ahd_set_hnscb_qoff(ahd, ahd->qinfifonext);
 804 }
 805
 806 static __inline uint8_t *
 807 ahd_get_sense_buf(struct ahd_softc *ahd, struct scb *scb)
 808 {
 809         return (scb->sense_data);
 810 }
 811
 812 static __inline uint32_t
 813 ahd_get_sense_bufaddr(struct ahd_softc *ahd, struct scb *scb)
 814 {
 815         return (scb->sense_busaddr);
 816 }
 817
 818 /************************** Interrupt Processing ******************************/
 819 static __inline void    ahd_sync_qoutfifo(struct ahd_softc *ahd, int op);
 820 static __inline void    ahd_sync_tqinfifo(struct ahd_softc *ahd, int op);
 821 static __inline u_int   ahd_check_cmdcmpltqueues(struct ahd_softc *ahd);
 822 static __inline int     ahd_intr(struct ahd_softc *ahd);
 823
 824 static __inline void
 825 ahd_sync_qoutfifo(struct ahd_softc *ahd, int op)
 826 {
 827         ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_dmamap,
 828                         /*offset*/0, /*len*/AHC_SCB_MAX * sizeof(uint16_t), op);
 829 }
 830
 831 static __inline void
 832 ahd_sync_tqinfifo(struct ahd_softc *ahd, int op)
 833 {
 834 #ifdef AHD_TARGET_MODE
 835         if ((ahd->flags & AHD_TARGETROLE) != 0) {
 836                 ahd_dmamap_sync(ahd, ahd->shared_data_dmat,
 837                                 ahd->shared_data_dmamap,
 838                                 ahd_targetcmd_offset(ahd, 0),
 839                                 sizeof(struct target_cmd) * AHD_TMODE_CMDS,
 840                                 op);
 841         }
 842 #endif
 843 }
 844
 845 /*
 846  * See if the firmware has posted any completed commands
 847  * into our in-core command complete fifos.
 848  */
 849 #define AHD_RUN_QOUTFIFO 0x1
 850 #define AHD_RUN_TQINFIFO 0x2
 851 static __inline u_int
 852 ahd_check_cmdcmpltqueues(struct ahd_softc *ahd)
 853 {
 854         u_int retval;
 855
 856         retval = 0;
 857         ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_dmamap,
 858                         /*offset*/ahd->qoutfifonext, /*len*/2,
 859                         BUS_DMASYNC_POSTREAD);
 860         if ((ahd->qoutfifo[ahd->qoutfifonext]
 861              & QOUTFIFO_ENTRY_VALID_LE) == ahd->qoutfifonext_valid_tag)
 862                 retval |= AHD_RUN_QOUTFIFO;
 863 #ifdef AHD_TARGET_MODE
 864         if ((ahd->flags & AHD_TARGETROLE) != 0
 865          && (ahd->flags & AHD_TQINFIFO_BLOCKED) == 0) {
 866                 ahd_dmamap_sync(ahd, ahd->shared_data_dmat,
 867                                 ahd->shared_data_dmamap,
 868                                 ahd_targetcmd_offset(ahd, ahd->tqinfifofnext),
 869                                 /*len*/sizeof(struct target_cmd),
 870                                 BUS_DMASYNC_POSTREAD);
 871                 if (ahd->targetcmds[ahd->tqinfifonext].cmd_valid != 0)
 872                         retval |= AHD_RUN_TQINFIFO;
 873         }
 874 #endif
 875         return (retval);
 876 }
 877
 878 /*
 879  * Catch an interrupt from the adapter
 880  */
 881 static __inline int
 882 ahd_intr(struct ahd_softc *ahd)
 883 {
 884         u_int   intstat;
 885
 886         if ((ahd->pause & INTEN) == 0) {
 887                 /*
 888                  * Our interrupt is not enabled on the chip
 889                  * and may be disabled for re-entrancy reasons,
 890                  * so just return.  This is likely just a shared
 891                  * interrupt.
 892                  */
 893                 return (0);
 894         }
 895
 896         /*
 897          * Instead of directly reading the interrupt status register,
 898          * infer the cause of the interrupt by checking our in-core
 899          * completion queues.  This avoids a costly PCI bus read in
 900          * most cases.
 901          */
 902         if ((ahd->flags & AHD_ALL_INTERRUPTS) == 0
 903          && (ahd_check_cmdcmpltqueues(ahd) != 0))
 904                 intstat = CMDCMPLT;
 905         else
 906                 intstat = ahd_inb(ahd, INTSTAT);
 907
 908         if ((intstat & INT_PEND) == 0)
 909                 return (0);
 910
 911         if (intstat & CMDCMPLT) {
 912                 ahd_outb(ahd, CLRINT, CLRCMDINT);
 913
 914                 /*
 915                  * Ensure that the chip sees that we've cleared
 916                  * this interrupt before we walk the output fifo.
 917                  * Otherwise, we may, due to posted bus writes,
 918                  * clear the interrupt after we finish the scan,
 919                  * and after the sequencer has added new entries
 920                  * and asserted the interrupt again.
 921                  */
 922                 if ((ahd->bugs & AHD_INTCOLLISION_BUG) != 0) {
 923                         if (ahd_is_paused(ahd)) {
 924                                 /*
 925                                  * Potentially lost SEQINT.
 926                                  * If SEQINTCODE is non-zero,
 927                                  * simulate the SEQINT.
 928                                  */
 929                                 if (ahd_inb(ahd, SEQINTCODE) != NO_SEQINT)
 930                                         intstat |= SEQINT;
 931                         }
 932                 } else {
 933                         ahd_flush_device_writes(ahd);
 934                 }
 935                 ahd_run_qoutfifo(ahd);
 936                 ahd->cmdcmplt_counts[ahd->cmdcmplt_bucket]++;
 937                 ahd->cmdcmplt_total++;
 938 #ifdef AHD_TARGET_MODE
 939                 if ((ahd->flags & AHD_TARGETROLE) != 0)
 940                         ahd_run_tqinfifo(ahd, /*paused*/FALSE);
 941 #endif
 942         }
 943
 944         /*
 945          * Handle statuses that may invalidate our cached
 946          * copy of INTSTAT separately.
 947          */
 948         if (intstat == 0xFF && (ahd->features & AHD_REMOVABLE) != 0) {
 949                 /* Hot eject.  Do nothing */
 950         } else if (intstat & HWERRINT) {
 951                 ahd_handle_hwerrint(ahd);
 952         } else if ((intstat & (PCIINT|SPLTINT)) != 0) {
 953                 ahd->bus_intr(ahd);
 954         } else {
 955
 956                 if ((intstat & SEQINT) != 0)
 957                         ahd_handle_seqint(ahd, intstat);
 958
 959                 if ((intstat & SCSIINT) != 0)
 960                         ahd_handle_scsiint(ahd, intstat);
 961         }
 962         return (1);
 963 }
 964
 965 #endif  /* _AIC79XX_INLINE_H_ */