drivers/scsi/aic7xxx/aic7xxx_reg_print.c_shipped

   1 /*
   2  * DO NOT EDIT - This file is automatically generated
   3  *               from the following source files:
   4  *
   5  * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $
   6  * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $
   7  */
   8
   9 #include "aic7xxx_osm.h"
  10
  11 static const ahc_reg_parse_entry_t SCSISEQ_parse_table[] = {
  12         { "SCSIRSTO",           0x01, 0x01 },
  13         { "ENAUTOATNP",         0x02, 0x02 },
  14         { "ENAUTOATNI",         0x04, 0x04 },
  15         { "ENAUTOATNO",         0x08, 0x08 },
  16         { "ENRSELI",            0x10, 0x10 },
  17         { "ENSELI",             0x20, 0x20 },
  18         { "ENSELO",             0x40, 0x40 },
  19         { "TEMODE",             0x80, 0x80 }
  20 };
  21
  22 int
  23 ahc_scsiseq_print(u_int regvalue, u_int *cur_col, u_int wrap)
  24 {
  25         return (ahc_print_register(SCSISEQ_parse_table, 8, "SCSISEQ",
  26             0x00, regvalue, cur_col, wrap));
  27 }
  28
  29 static const ahc_reg_parse_entry_t SXFRCTL0_parse_table[] = {
  30         { "CLRCHN",             0x02, 0x02 },
  31         { "SCAMEN",             0x04, 0x04 },
  32         { "SPIOEN",             0x08, 0x08 },
  33         { "CLRSTCNT",           0x10, 0x10 },
  34         { "FAST20",             0x20, 0x20 },
  35         { "DFPEXP",             0x40, 0x40 },
  36         { "DFON",               0x80, 0x80 }
  37 };
  38
  39 int
  40 ahc_sxfrctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  41 {
  42         return (ahc_print_register(SXFRCTL0_parse_table, 7, "SXFRCTL0",
  43             0x01, regvalue, cur_col, wrap));
  44 }
  45
  46 static const ahc_reg_parse_entry_t SCSISIGI_parse_table[] = {
  47         { "ACKI",               0x01, 0x01 },
  48         { "REQI",               0x02, 0x02 },
  49         { "BSYI",               0x04, 0x04 },
  50         { "SELI",               0x08, 0x08 },
  51         { "ATNI",               0x10, 0x10 },
  52         { "MSGI",               0x20, 0x20 },
  53         { "IOI",                0x40, 0x40 },
  54         { "CDI",                0x80, 0x80 },
  55         { "P_DATAOUT",          0x00, 0x00 },
  56         { "P_DATAOUT_DT",       0x20, 0x20 },
  57         { "P_DATAIN",           0x40, 0x40 },
  58         { "P_DATAIN_DT",        0x60, 0x60 },
  59         { "P_COMMAND",          0x80, 0x80 },
  60         { "P_MESGOUT",          0xa0, 0xa0 },
  61         { "P_STATUS",           0xc0, 0xc0 },
  62         { "PHASE_MASK",         0xe0, 0xe0 },
  63         { "P_MESGIN",           0xe0, 0xe0 }
  64 };
  65
  66 int
  67 ahc_scsisigi_print(u_int regvalue, u_int *cur_col, u_int wrap)
  68 {
  69         return (ahc_print_register(SCSISIGI_parse_table, 17, "SCSISIGI",
  70             0x03, regvalue, cur_col, wrap));
  71 }
  72
  73 static const ahc_reg_parse_entry_t SCSIRATE_parse_table[] = {
  74         { "SINGLE_EDGE",        0x10, 0x10 },
  75         { "ENABLE_CRC",         0x40, 0x40 },
  76         { "WIDEXFER",           0x80, 0x80 },
  77         { "SXFR_ULTRA2",        0x0f, 0x0f },
  78         { "SOFS",               0x0f, 0x0f },
  79         { "SXFR",               0x70, 0x70 }
  80 };
  81
  82 int
  83 ahc_scsirate_print(u_int regvalue, u_int *cur_col, u_int wrap)
  84 {
  85         return (ahc_print_register(SCSIRATE_parse_table, 6, "SCSIRATE",
  86             0x04, regvalue, cur_col, wrap));
  87 }
  88
  89 static const ahc_reg_parse_entry_t SSTAT0_parse_table[] = {
  90         { "DMADONE",            0x01, 0x01 },
  91         { "SPIORDY",            0x02, 0x02 },
  92         { "SDONE",              0x04, 0x04 },
  93         { "SWRAP",              0x08, 0x08 },
  94         { "IOERR",              0x08, 0x08 },
  95         { "SELINGO",            0x10, 0x10 },
  96         { "SELDI",              0x20, 0x20 },
  97         { "SELDO",              0x40, 0x40 },
  98         { "TARGET",             0x80, 0x80 }
  99 };
 100
 101 int
 102 ahc_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
 103 {
 104         return (ahc_print_register(SSTAT0_parse_table, 9, "SSTAT0",
 105             0x0b, regvalue, cur_col, wrap));
 106 }
 107
 108 static const ahc_reg_parse_entry_t SSTAT1_parse_table[] = {
 109         { "REQINIT",            0x01, 0x01 },
 110         { "PHASECHG",           0x02, 0x02 },
 111         { "SCSIPERR",           0x04, 0x04 },
 112         { "BUSFREE",            0x08, 0x08 },
 113         { "PHASEMIS",           0x10, 0x10 },
 114         { "SCSIRSTI",           0x20, 0x20 },
 115         { "ATNTARG",            0x40, 0x40 },
 116         { "SELTO",              0x80, 0x80 }
 117 };
 118
 119 int
 120 ahc_sstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
 121 {
 122         return (ahc_print_register(SSTAT1_parse_table, 8, "SSTAT1",
 123             0x0c, regvalue, cur_col, wrap));
 124 }
 125
 126 static const ahc_reg_parse_entry_t SSTAT2_parse_table[] = {
 127         { "DUAL_EDGE_ERR",      0x01, 0x01 },
 128         { "CRCREQERR",          0x02, 0x02 },
 129         { "CRCENDERR",          0x04, 0x04 },
 130         { "CRCVALERR",          0x08, 0x08 },
 131         { "EXP_ACTIVE",         0x10, 0x10 },
 132         { "SHVALID",            0x40, 0x40 },
 133         { "OVERRUN",            0x80, 0x80 },
 134         { "SFCNT",              0x1f, 0x1f }
 135 };
 136
 137 int
 138 ahc_sstat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
 139 {
 140         return (ahc_print_register(SSTAT2_parse_table, 8, "SSTAT2",
 141             0x0d, regvalue, cur_col, wrap));
 142 }
 143
 144 static const ahc_reg_parse_entry_t SSTAT3_parse_table[] = {
 145         { "OFFCNT",             0x0f, 0x0f },
 146         { "U2OFFCNT",           0x7f, 0x7f },
 147         { "SCSICNT",            0xf0, 0xf0 }
 148 };
 149
 150 int
 151 ahc_sstat3_print(u_int regvalue, u_int *cur_col, u_int wrap)
 152 {
 153         return (ahc_print_register(SSTAT3_parse_table, 3, "SSTAT3",
 154             0x0e, regvalue, cur_col, wrap));
 155 }
 156
 157 static const ahc_reg_parse_entry_t SIMODE0_parse_table[] = {
 158         { "ENDMADONE",          0x01, 0x01 },
 159         { "ENSPIORDY",          0x02, 0x02 },
 160         { "ENSDONE",            0x04, 0x04 },
 161         { "ENSWRAP",            0x08, 0x08 },
 162         { "ENIOERR",            0x08, 0x08 },
 163         { "ENSELINGO",          0x10, 0x10 },
 164         { "ENSELDI",            0x20, 0x20 },
 165         { "ENSELDO",            0x40, 0x40 }
 166 };
 167
 168 int
 169 ahc_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
 170 {
 171         return (ahc_print_register(SIMODE0_parse_table, 8, "SIMODE0",
 172             0x10, regvalue, cur_col, wrap));
 173 }
 174
 175 static const ahc_reg_parse_entry_t SIMODE1_parse_table[] = {
 176         { "ENREQINIT",          0x01, 0x01 },
 177         { "ENPHASECHG",         0x02, 0x02 },
 178         { "ENSCSIPERR",         0x04, 0x04 },
 179         { "ENBUSFREE",          0x08, 0x08 },
 180         { "ENPHASEMIS",         0x10, 0x10 },
 181         { "ENSCSIRST",          0x20, 0x20 },
 182         { "ENATNTARG",          0x40, 0x40 },
 183         { "ENSELTIMO",          0x80, 0x80 }
 184 };
 185
 186 int
 187 ahc_simode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
 188 {
 189         return (ahc_print_register(SIMODE1_parse_table, 8, "SIMODE1",
 190             0x11, regvalue, cur_col, wrap));
 191 }
 192
 193 int
 194 ahc_scsibusl_print(u_int regvalue, u_int *cur_col, u_int wrap)
 195 {
 196         return (ahc_print_register(NULL, 0, "SCSIBUSL",
 197             0x12, regvalue, cur_col, wrap));
 198 }
 199
 200 static const ahc_reg_parse_entry_t SBLKCTL_parse_table[] = {
 201         { "XCVR",               0x01, 0x01 },
 202         { "SELWIDE",            0x02, 0x02 },
 203         { "ENAB20",             0x04, 0x04 },
 204         { "SELBUSB",            0x08, 0x08 },
 205         { "ENAB40",             0x08, 0x08 },
 206         { "AUTOFLUSHDIS",       0x20, 0x20 },
 207         { "DIAGLEDON",          0x40, 0x40 },
 208         { "DIAGLEDEN",          0x80, 0x80 }
 209 };
 210
 211 int
 212 ahc_sblkctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
 213 {
 214         return (ahc_print_register(SBLKCTL_parse_table, 8, "SBLKCTL",
 215             0x1f, regvalue, cur_col, wrap));
 216 }
 217
 218 static const ahc_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
 219         { "NO_DISCONNECT",      0x01, 0x01 },
 220         { "SPHASE_PENDING",     0x02, 0x02 },
 221         { "DPHASE_PENDING",     0x04, 0x04 },
 222         { "CMDPHASE_PENDING",   0x08, 0x08 },
 223         { "TARG_CMD_PENDING",   0x10, 0x10 },
 224         { "DPHASE",             0x20, 0x20 },
 225         { "NO_CDB_SENT",        0x40, 0x40 },
 226         { "TARGET_CMD_IS_TAGGED",0x40, 0x40 },
 227         { "NOT_IDENTIFIED",     0x80, 0x80 }
 228 };
 229
 230 int
 231 ahc_seq_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
 232 {
 233         return (ahc_print_register(SEQ_FLAGS_parse_table, 9, "SEQ_FLAGS",
 234             0x3c, regvalue, cur_col, wrap));
 235 }
 236
 237 static const ahc_reg_parse_entry_t LASTPHASE_parse_table[] = {
 238         { "MSGI",               0x20, 0x20 },
 239         { "IOI",                0x40, 0x40 },
 240         { "CDI",                0x80, 0x80 },
 241         { "P_DATAOUT",          0x00, 0x00 },
 242         { "P_BUSFREE",          0x01, 0x01 },
 243         { "P_DATAIN",           0x40, 0x40 },
 244         { "P_COMMAND",          0x80, 0x80 },
 245         { "P_MESGOUT",          0xa0, 0xa0 },
 246         { "P_STATUS",           0xc0, 0xc0 },
 247         { "PHASE_MASK",         0xe0, 0xe0 },
 248         { "P_MESGIN",           0xe0, 0xe0 }
 249 };
 250
 251 int
 252 ahc_lastphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
 253 {
 254         return (ahc_print_register(LASTPHASE_parse_table, 11, "LASTPHASE",
 255             0x3f, regvalue, cur_col, wrap));
 256 }
 257
 258 static const ahc_reg_parse_entry_t SEQCTL_parse_table[] = {
 259         { "LOADRAM",            0x01, 0x01 },
 260         { "SEQRESET",           0x02, 0x02 },
 261         { "STEP",               0x04, 0x04 },
 262         { "BRKADRINTEN",        0x08, 0x08 },
 263         { "FASTMODE",           0x10, 0x10 },
 264         { "FAILDIS",            0x20, 0x20 },
 265         { "PAUSEDIS",           0x40, 0x40 },
 266         { "PERRORDIS",          0x80, 0x80 }
 267 };
 268
 269 int
 270 ahc_seqctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
 271 {
 272         return (ahc_print_register(SEQCTL_parse_table, 8, "SEQCTL",
 273             0x60, regvalue, cur_col, wrap));
 274 }
 275
 276 int
 277 ahc_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
 278 {
 279         return (ahc_print_register(NULL, 0, "SRAM_BASE",
 280             0x70, regvalue, cur_col, wrap));
 281 }
 282
 283 static const ahc_reg_parse_entry_t ERROR_parse_table[] = {
 284         { "ILLHADDR",           0x01, 0x01 },
 285         { "ILLSADDR",           0x02, 0x02 },
 286         { "ILLOPCODE",          0x04, 0x04 },
 287         { "SQPARERR",           0x08, 0x08 },
 288         { "DPARERR",            0x10, 0x10 },
 289         { "MPARERR",            0x20, 0x20 },
 290         { "PCIERRSTAT",         0x40, 0x40 },
 291         { "CIOPARERR",          0x80, 0x80 }
 292 };
 293
 294 int
 295 ahc_error_print(u_int regvalue, u_int *cur_col, u_int wrap)
 296 {
 297         return (ahc_print_register(ERROR_parse_table, 8, "ERROR",
 298             0x92, regvalue, cur_col, wrap));
 299 }
 300
 301 static const ahc_reg_parse_entry_t DFCNTRL_parse_table[] = {
 302         { "FIFORESET",          0x01, 0x01 },
 303         { "FIFOFLUSH",          0x02, 0x02 },
 304         { "DIRECTION",          0x04, 0x04 },
 305         { "HDMAEN",             0x08, 0x08 },
 306         { "HDMAENACK",          0x08, 0x08 },
 307         { "SDMAEN",             0x10, 0x10 },
 308         { "SDMAENACK",          0x10, 0x10 },
 309         { "SCSIEN",             0x20, 0x20 },
 310         { "WIDEODD",            0x40, 0x40 },
 311         { "PRELOADEN",          0x80, 0x80 }
 312 };
 313
 314 int
 315 ahc_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
 316 {
 317         return (ahc_print_register(DFCNTRL_parse_table, 10, "DFCNTRL",
 318             0x93, regvalue, cur_col, wrap));
 319 }
 320
 321 static const ahc_reg_parse_entry_t DFSTATUS_parse_table[] = {
 322         { "FIFOEMP",            0x01, 0x01 },
 323         { "FIFOFULL",           0x02, 0x02 },
 324         { "DFTHRESH",           0x04, 0x04 },
 325         { "HDONE",              0x08, 0x08 },
 326         { "MREQPEND",           0x10, 0x10 },
 327         { "FIFOQWDEMP",         0x20, 0x20 },
 328         { "DFCACHETH",          0x40, 0x40 },
 329         { "PRELOAD_AVAIL",      0x80, 0x80 }
 330 };
 331
 332 int
 333 ahc_dfstatus_print(u_int regvalue, u_int *cur_col, u_int wrap)
 334 {
 335         return (ahc_print_register(DFSTATUS_parse_table, 8, "DFSTATUS",
 336             0x94, regvalue, cur_col, wrap));
 337 }
 338
 339 static const ahc_reg_parse_entry_t SCSIPHASE_parse_table[] = {
 340         { "DATA_OUT_PHASE",     0x01, 0x01 },
 341         { "DATA_IN_PHASE",      0x02, 0x02 },
 342         { "MSG_OUT_PHASE",      0x04, 0x04 },
 343         { "MSG_IN_PHASE",       0x08, 0x08 },
 344         { "COMMAND_PHASE",      0x10, 0x10 },
 345         { "STATUS_PHASE",       0x20, 0x20 },
 346         { "DATA_PHASE_MASK",    0x03, 0x03 }
 347 };
 348
 349 int
 350 ahc_scsiphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
 351 {
 352         return (ahc_print_register(SCSIPHASE_parse_table, 7, "SCSIPHASE",
 353             0x9e, regvalue, cur_col, wrap));
 354 }
 355
 356 int
 357 ahc_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
 358 {
 359         return (ahc_print_register(NULL, 0, "SCB_BASE",
 360             0xa0, regvalue, cur_col, wrap));
 361 }
 362
 363 static const ahc_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
 364         { "DISCONNECTED",       0x04, 0x04 },
 365         { "ULTRAENB",           0x08, 0x08 },
 366         { "MK_MESSAGE",         0x10, 0x10 },
 367         { "TAG_ENB",            0x20, 0x20 },
 368         { "DISCENB",            0x40, 0x40 },
 369         { "TARGET_SCB",         0x80, 0x80 },
 370         { "STATUS_RCVD",        0x80, 0x80 },
 371         { "SCB_TAG_TYPE",       0x03, 0x03 }
 372 };
 373
 374 int
 375 ahc_scb_control_print(u_int regvalue, u_int *cur_col, u_int wrap)
 376 {
 377         return (ahc_print_register(SCB_CONTROL_parse_table, 8, "SCB_CONTROL",
 378             0xb8, regvalue, cur_col, wrap));
 379 }
 380
 381 static const ahc_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
 382         { "TWIN_CHNLB",         0x80, 0x80 },
 383         { "OID",                0x0f, 0x0f },
 384         { "TWIN_TID",           0x70, 0x70 },
 385         { "TID",                0xf0, 0xf0 }
 386 };
 387
 388 int
 389 ahc_scb_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
 390 {
 391         return (ahc_print_register(SCB_SCSIID_parse_table, 4, "SCB_SCSIID",
 392             0xb9, regvalue, cur_col, wrap));
 393 }
 394
 395 static const ahc_reg_parse_entry_t SCB_LUN_parse_table[] = {
 396         { "SCB_XFERLEN_ODD",    0x80, 0x80 },
 397         { "LID",                0x3f, 0x3f }
 398 };
 399
 400 int
 401 ahc_scb_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
 402 {
 403         return (ahc_print_register(SCB_LUN_parse_table, 2, "SCB_LUN",
 404             0xba, regvalue, cur_col, wrap));
 405 }
 406
 407 int
 408 ahc_scb_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
 409 {
 410         return (ahc_print_register(NULL, 0, "SCB_TAG",
 411             0xbb, regvalue, cur_col, wrap));
 412 }
 413