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[SCSI] bfa: IOC and PLL init changes for Brocade-1860 Fabric Adapter.
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1 /*
2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
3 * All rights reserved
4 * www.brocade.com
5 *
6 * Linux driver for Brocade Fibre Channel Host Bus Adapter.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License (GPL) Version 2 as
10 * published by the Free Software Foundation
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 */
17
18 #ifndef __BFI_H__
19 #define __BFI_H__
20
21 #include "bfa_defs.h"
22 #include "bfa_defs_svc.h"
23
24 #pragma pack(1)
25
26 /*
27 * BFI FW image type
28 */
29 #define BFI_FLASH_CHUNK_SZ 256 /* Flash chunk size */
30 #define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32))
31
32 /*
33 * Msg header common to all msgs
34 */
35 struct bfi_mhdr_s {
36 u8 msg_class; /* @ref bfi_mclass_t */
37 u8 msg_id; /* msg opcode with in the class */
38 union {
39 struct {
40 u8 qid;
41 u8 lpu_id; /* msg destination */
42 } h2i;
43 u16 i2htok; /* token in msgs to host */
44 } mtag;
45 };
46
47 #define bfi_mhdr_2_qid(_mh) ((_mh)->mtag.h2i.qid)
48
49 #define bfi_h2i_set(_mh, _mc, _op, _lpuid) do { \
50 (_mh).msg_class = (_mc); \
51 (_mh).msg_id = (_op); \
52 (_mh).mtag.h2i.lpu_id = (_lpuid); \
53 } while (0)
54
55 #define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \
56 (_mh).msg_class = (_mc); \
57 (_mh).msg_id = (_op); \
58 (_mh).mtag.i2htok = (_i2htok); \
59 } while (0)
60
61 /*
62 * Message opcodes: 0-127 to firmware, 128-255 to host
63 */
64 #define BFI_I2H_OPCODE_BASE 128
65 #define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE)
66
67 /*
68 ****************************************************************************
69 *
70 * Scatter Gather Element and Page definition
71 *
72 ****************************************************************************
73 */
74
75 #define BFI_SGE_INLINE 1
76 #define BFI_SGE_INLINE_MAX (BFI_SGE_INLINE + 1)
77
78 /*
79 * SG Flags
80 */
81 enum {
82 BFI_SGE_DATA = 0, /* data address, not last */
83 BFI_SGE_DATA_CPL = 1, /* data addr, last in current page */
84 BFI_SGE_DATA_LAST = 3, /* data address, last */
85 BFI_SGE_LINK = 2, /* link address */
86 BFI_SGE_PGDLEN = 2, /* cumulative data length for page */
87 };
88
89 /*
90 * DMA addresses
91 */
92 union bfi_addr_u {
93 struct {
94 __be32 addr_lo;
95 __be32 addr_hi;
96 } a32;
97 };
98
99 /*
100 * Scatter Gather Element used for fast-path IO requests
101 */
102 struct bfi_sge_s {
103 #ifdef __BIG_ENDIAN
104 u32 flags:2,
105 rsvd:2,
106 sg_len:28;
107 #else
108 u32 sg_len:28,
109 rsvd:2,
110 flags:2;
111 #endif
112 union bfi_addr_u sga;
113 };
114
115 /**
116 * Generic DMA addr-len pair.
117 */
118 struct bfi_alen_s {
119 union bfi_addr_u al_addr; /* DMA addr of buffer */
120 u32 al_len; /* length of buffer */
121 };
122
123 /*
124 * Scatter Gather Page
125 */
126 #define BFI_SGPG_DATA_SGES 7
127 #define BFI_SGPG_SGES_MAX (BFI_SGPG_DATA_SGES + 1)
128 #define BFI_SGPG_RSVD_WD_LEN 8
129 struct bfi_sgpg_s {
130 struct bfi_sge_s sges[BFI_SGPG_SGES_MAX];
131 u32 rsvd[BFI_SGPG_RSVD_WD_LEN];
132 };
133
134 /*
135 * Large Message structure - 128 Bytes size Msgs
136 */
137 #define BFI_LMSG_SZ 128
138 #define BFI_LMSG_PL_WSZ \
139 ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr_s)) / 4)
140
141 struct bfi_msg_s {
142 struct bfi_mhdr_s mhdr;
143 u32 pl[BFI_LMSG_PL_WSZ];
144 };
145
146 /*
147 * Mailbox message structure
148 */
149 #define BFI_MBMSG_SZ 7
150 struct bfi_mbmsg_s {
151 struct bfi_mhdr_s mh;
152 u32 pl[BFI_MBMSG_SZ];
153 };
154
155 /*
156 * Supported PCI function class codes (personality)
157 */
158 enum bfi_pcifn_class {
159 BFI_PCIFN_CLASS_FC = 0x0c04,
160 BFI_PCIFN_CLASS_ETH = 0x0200,
161 };
162
163 /*
164 * Message Classes
165 */
166 enum bfi_mclass {
167 BFI_MC_IOC = 1, /* IO Controller (IOC) */
168 BFI_MC_FCPORT = 5, /* FC port */
169 BFI_MC_IOCFC = 6, /* FC - IO Controller (IOC) */
170 BFI_MC_LL = 7, /* Link Layer */
171 BFI_MC_UF = 8, /* Unsolicited frame receive */
172 BFI_MC_FCXP = 9, /* FC Transport */
173 BFI_MC_LPS = 10, /* lport fc login services */
174 BFI_MC_RPORT = 11, /* Remote port */
175 BFI_MC_ITN = 12, /* I-T nexus (Initiator mode) */
176 BFI_MC_IOIM_READ = 13, /* read IO (Initiator mode) */
177 BFI_MC_IOIM_WRITE = 14, /* write IO (Initiator mode) */
178 BFI_MC_IOIM_IO = 15, /* IO (Initiator mode) */
179 BFI_MC_IOIM = 16, /* IO (Initiator mode) */
180 BFI_MC_IOIM_IOCOM = 17, /* good IO completion */
181 BFI_MC_TSKIM = 18, /* Initiator Task management */
182 BFI_MC_PORT = 21, /* Physical port */
183 BFI_MC_MAX = 32
184 };
185
186 #define BFI_IOC_MAX_CQS 4
187 #define BFI_IOC_MAX_CQS_ASIC 8
188 #define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */
189
190 /*
191 *----------------------------------------------------------------------
192 * IOC
193 *----------------------------------------------------------------------
194 */
195
196 /*
197 * Different asic generations
198 */
199 enum bfi_asic_gen {
200 BFI_ASIC_GEN_CB = 1, /* crossbow 8G FC */
201 BFI_ASIC_GEN_CT = 2, /* catapult 8G FC or 10G CNA */
202 BFI_ASIC_GEN_CT2 = 3, /* catapult-2 16G FC or 10G CNA */
203 };
204
205 enum bfi_asic_mode {
206 BFI_ASIC_MODE_FC = 1, /* FC upto 8G speed */
207 BFI_ASIC_MODE_FC16 = 2, /* FC upto 16G speed */
208 BFI_ASIC_MODE_ETH = 3, /* Ethernet ports */
209 BFI_ASIC_MODE_COMBO = 4, /* FC 16G and Ethernet 10G port */
210 };
211
212 enum bfi_ioc_h2i_msgs {
213 BFI_IOC_H2I_ENABLE_REQ = 1,
214 BFI_IOC_H2I_DISABLE_REQ = 2,
215 BFI_IOC_H2I_GETATTR_REQ = 3,
216 BFI_IOC_H2I_DBG_SYNC = 4,
217 BFI_IOC_H2I_DBG_DUMP = 5,
218 };
219
220 enum bfi_ioc_i2h_msgs {
221 BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1),
222 BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2),
223 BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3),
224 BFI_IOC_I2H_HBEAT = BFA_I2HM(4),
225 };
226
227 /*
228 * BFI_IOC_H2I_GETATTR_REQ message
229 */
230 struct bfi_ioc_getattr_req_s {
231 struct bfi_mhdr_s mh;
232 union bfi_addr_u attr_addr;
233 };
234
235 struct bfi_ioc_attr_s {
236 wwn_t mfg_pwwn; /* Mfg port wwn */
237 wwn_t mfg_nwwn; /* Mfg node wwn */
238 mac_t mfg_mac; /* Mfg mac */
239 u16 rsvd_a;
240 wwn_t pwwn;
241 wwn_t nwwn;
242 mac_t mac; /* PBC or Mfg mac */
243 u16 rsvd_b;
244 mac_t fcoe_mac;
245 u16 rsvd_c;
246 char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
247 u8 pcie_gen;
248 u8 pcie_lanes_orig;
249 u8 pcie_lanes;
250 u8 rx_bbcredit; /* receive buffer credits */
251 u32 adapter_prop; /* adapter properties */
252 u16 maxfrsize; /* max receive frame size */
253 char asic_rev;
254 u8 rsvd_d;
255 char fw_version[BFA_VERSION_LEN];
256 char optrom_version[BFA_VERSION_LEN];
257 struct bfa_mfg_vpd_s vpd;
258 u32 card_type; /* card type */
259 };
260
261 /*
262 * BFI_IOC_I2H_GETATTR_REPLY message
263 */
264 struct bfi_ioc_getattr_reply_s {
265 struct bfi_mhdr_s mh; /* Common msg header */
266 u8 status; /* cfg reply status */
267 u8 rsvd[3];
268 };
269
270 /*
271 * Firmware memory page offsets
272 */
273 #define BFI_IOC_SMEM_PG0_CB (0x40)
274 #define BFI_IOC_SMEM_PG0_CT (0x180)
275
276 /*
277 * Firmware statistic offset
278 */
279 #define BFI_IOC_FWSTATS_OFF (0x6B40)
280 #define BFI_IOC_FWSTATS_SZ (4096)
281
282 /*
283 * Firmware trace offset
284 */
285 #define BFI_IOC_TRC_OFF (0x4b00)
286 #define BFI_IOC_TRC_ENTS 256
287
288 #define BFI_IOC_FW_SIGNATURE (0xbfadbfad)
289 #define BFI_IOC_MD5SUM_SZ 4
290 struct bfi_ioc_image_hdr_s {
291 u32 signature; /* constant signature */
292 u8 asic_gen; /* asic generation */
293 u8 asic_mode;
294 u8 port0_mode; /* device mode for port 0 */
295 u8 port1_mode; /* device mode for port 1 */
296 u32 exec; /* exec vector */
297 u32 bootenv; /* fimware boot env */
298 u32 rsvd_b[4];
299 u32 md5sum[BFI_IOC_MD5SUM_SZ];
300 };
301
302 #define BFI_FWBOOT_DEVMODE_OFF 4
303 #define BFI_FWBOOT_TYPE_OFF 8
304 #define BFI_FWBOOT_ENV_OFF 12
305 #define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
306 (((u32)(__asic_gen)) << 24 | \
307 ((u32)(__asic_mode)) << 16 | \
308 ((u32)(__p0_mode)) << 8 | \
309 ((u32)(__p1_mode)))
310
311 #define BFI_FWBOOT_TYPE_NORMAL 0
312 #define BFI_FWBOOT_TYPE_MEMTEST 1
313 #define BFI_FWBOOT_ENV_OS 0
314
315 enum bfi_port_mode {
316 BFI_PORT_MODE_FC = 1,
317 BFI_PORT_MODE_ETH = 2,
318 };
319
320 struct bfi_ioc_hbeat_s {
321 struct bfi_mhdr_s mh; /* common msg header */
322 u32 hb_count; /* current heart beat count */
323 };
324
325 /*
326 * IOC hardware/firmware state
327 */
328 enum bfi_ioc_state {
329 BFI_IOC_UNINIT = 0, /* not initialized */
330 BFI_IOC_INITING = 1, /* h/w is being initialized */
331 BFI_IOC_HWINIT = 2, /* h/w is initialized */
332 BFI_IOC_CFG = 3, /* IOC configuration in progress */
333 BFI_IOC_OP = 4, /* IOC is operational */
334 BFI_IOC_DISABLING = 5, /* IOC is being disabled */
335 BFI_IOC_DISABLED = 6, /* IOC is disabled */
336 BFI_IOC_CFG_DISABLED = 7, /* IOC is being disabled;transient */
337 BFI_IOC_FAIL = 8, /* IOC heart-beat failure */
338 BFI_IOC_MEMTEST = 9, /* IOC is doing memtest */
339 };
340
341 #define BFI_IOC_ENDIAN_SIG 0x12345678
342
343 enum {
344 BFI_ADAPTER_TYPE_FC = 0x01, /* FC adapters */
345 BFI_ADAPTER_TYPE_MK = 0x0f0000, /* adapter type mask */
346 BFI_ADAPTER_TYPE_SH = 16, /* adapter type shift */
347 BFI_ADAPTER_NPORTS_MK = 0xff00, /* number of ports mask */
348 BFI_ADAPTER_NPORTS_SH = 8, /* number of ports shift */
349 BFI_ADAPTER_SPEED_MK = 0xff, /* adapter speed mask */
350 BFI_ADAPTER_SPEED_SH = 0, /* adapter speed shift */
351 BFI_ADAPTER_PROTO = 0x100000, /* prototype adapaters */
352 BFI_ADAPTER_TTV = 0x200000, /* TTV debug capable */
353 BFI_ADAPTER_UNSUPP = 0x400000, /* unknown adapter type */
354 };
355
356 #define BFI_ADAPTER_GETP(__prop, __adap_prop) \
357 (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \
358 BFI_ADAPTER_ ## __prop ## _SH)
359 #define BFI_ADAPTER_SETP(__prop, __val) \
360 ((__val) << BFI_ADAPTER_ ## __prop ## _SH)
361 #define BFI_ADAPTER_IS_PROTO(__adap_type) \
362 ((__adap_type) & BFI_ADAPTER_PROTO)
363 #define BFI_ADAPTER_IS_TTV(__adap_type) \
364 ((__adap_type) & BFI_ADAPTER_TTV)
365 #define BFI_ADAPTER_IS_UNSUPP(__adap_type) \
366 ((__adap_type) & BFI_ADAPTER_UNSUPP)
367 #define BFI_ADAPTER_IS_SPECIAL(__adap_type) \
368 ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
369 BFI_ADAPTER_UNSUPP))
370
371 /*
372 * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
373 */
374 struct bfi_ioc_ctrl_req_s {
375 struct bfi_mhdr_s mh;
376 u16 clscode;
377 u16 rsvd;
378 u32 tv_sec;
379 };
380 #define bfi_ioc_enable_req_t struct bfi_ioc_ctrl_req_s;
381 #define bfi_ioc_disable_req_t struct bfi_ioc_ctrl_req_s;
382
383 /*
384 * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
385 */
386 struct bfi_ioc_ctrl_reply_s {
387 struct bfi_mhdr_s mh; /* Common msg header */
388 u8 status; /* enable/disable status */
389 u8 rsvd[3];
390 };
391 #define bfi_ioc_enable_reply_t struct bfi_ioc_ctrl_reply_s;
392 #define bfi_ioc_disable_reply_t struct bfi_ioc_ctrl_reply_s;
393
394 #define BFI_IOC_MSGSZ 8
395 /*
396 * H2I Messages
397 */
398 union bfi_ioc_h2i_msg_u {
399 struct bfi_mhdr_s mh;
400 struct bfi_ioc_ctrl_req_s enable_req;
401 struct bfi_ioc_ctrl_req_s disable_req;
402 struct bfi_ioc_getattr_req_s getattr_req;
403 u32 mboxmsg[BFI_IOC_MSGSZ];
404 };
405
406 /*
407 * I2H Messages
408 */
409 union bfi_ioc_i2h_msg_u {
410 struct bfi_mhdr_s mh;
411 struct bfi_ioc_ctrl_reply_s rdy_event;
412 u32 mboxmsg[BFI_IOC_MSGSZ];
413 };
414
415
416 /*
417 *----------------------------------------------------------------------
418 * PBC
419 *----------------------------------------------------------------------
420 */
421
422 #define BFI_PBC_MAX_BLUNS 8
423 #define BFI_PBC_MAX_VPORTS 16
424 #define BFI_PBC_PORT_DISABLED 2
425
426 /*
427 * PBC boot lun configuration
428 */
429 struct bfi_pbc_blun_s {
430 wwn_t tgt_pwwn;
431 struct scsi_lun tgt_lun;
432 };
433
434 /*
435 * PBC virtual port configuration
436 */
437 struct bfi_pbc_vport_s {
438 wwn_t vp_pwwn;
439 wwn_t vp_nwwn;
440 };
441
442 /*
443 * BFI pre-boot configuration information
444 */
445 struct bfi_pbc_s {
446 u8 port_enabled;
447 u8 boot_enabled;
448 u8 nbluns;
449 u8 nvports;
450 u8 port_speed;
451 u8 rsvd_a;
452 u16 hss;
453 wwn_t pbc_pwwn;
454 wwn_t pbc_nwwn;
455 struct bfi_pbc_blun_s blun[BFI_PBC_MAX_BLUNS];
456 struct bfi_pbc_vport_s vport[BFI_PBC_MAX_VPORTS];
457 };
458
459 /*
460 *----------------------------------------------------------------------
461 * MSGQ
462 *----------------------------------------------------------------------
463 */
464 #define BFI_MSGQ_FULL(_q) (((_q->pi + 1) % _q->q_depth) == _q->ci)
465 #define BFI_MSGQ_EMPTY(_q) (_q->pi == _q->ci)
466 #define BFI_MSGQ_UPDATE_CI(_q) (_q->ci = (_q->ci + 1) % _q->q_depth)
467 #define BFI_MSGQ_UPDATE_PI(_q) (_q->pi = (_q->pi + 1) % _q->q_depth)
468
469 /* q_depth must be power of 2 */
470 #define BFI_MSGQ_FREE_CNT(_q) ((_q->ci - _q->pi - 1) & (_q->q_depth - 1))
471
472 enum bfi_msgq_h2i_msgs_e {
473 BFI_MSGQ_H2I_INIT_REQ = 1,
474 BFI_MSGQ_H2I_DOORBELL = 2,
475 BFI_MSGQ_H2I_SHUTDOWN = 3,
476 };
477
478 enum bfi_msgq_i2h_msgs_e {
479 BFI_MSGQ_I2H_INIT_RSP = 1,
480 BFI_MSGQ_I2H_DOORBELL = 2,
481 };
482
483
484 /* Messages(commands/responsed/AENS will have the following header */
485 struct bfi_msgq_mhdr_s {
486 u8 msg_class;
487 u8 msg_id;
488 u16 msg_token;
489 u16 num_entries;
490 u8 enet_id;
491 u8 rsvd[1];
492 };
493
494 #define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do { \
495 (_mh).msg_class = (_mc); \
496 (_mh).msg_id = (_mid); \
497 (_mh).msg_token = (_tok); \
498 (_mh).enet_id = (_enet_id); \
499 } while (0)
500
501 /*
502 * Mailbox for messaging interface
503 *
504 */
505 #define BFI_MSGQ_CMD_ENTRY_SIZE (64) /* TBD */
506 #define BFI_MSGQ_RSP_ENTRY_SIZE (64) /* TBD */
507 #define BFI_MSGQ_MSG_SIZE_MAX (2048) /* TBD */
508
509 struct bfi_msgq_s {
510 union bfi_addr_u addr;
511 u16 q_depth; /* Total num of entries in the queue */
512 u8 rsvd[2];
513 };
514
515 /* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
516 struct bfi_msgq_cfg_req_s {
517 struct bfi_mhdr_s mh;
518 struct bfi_msgq_s cmdq;
519 struct bfi_msgq_s rspq;
520 };
521
522 /* BFI_ENET_MSGQ_CFG_RSP */
523 struct bfi_msgq_cfg_rsp_s {
524 struct bfi_mhdr_s mh;
525 u8 cmd_status;
526 u8 rsvd[3];
527 };
528
529
530 /* BFI_MSGQ_H2I_DOORBELL */
531 struct bfi_msgq_h2i_db_s {
532 struct bfi_mhdr_s mh;
533 u16 cmdq_pi;
534 u16 rspq_ci;
535 };
536
537 /* BFI_MSGQ_I2H_DOORBELL */
538 struct bfi_msgq_i2h_db_s {
539 struct bfi_mhdr_s mh;
540 u16 rspq_pi;
541 u16 cmdq_ci;
542 };
543
544 #pragma pack()
545
546 /* BFI port specific */
547 #pragma pack(1)
548
549 enum bfi_port_h2i {
550 BFI_PORT_H2I_ENABLE_REQ = (1),
551 BFI_PORT_H2I_DISABLE_REQ = (2),
552 BFI_PORT_H2I_GET_STATS_REQ = (3),
553 BFI_PORT_H2I_CLEAR_STATS_REQ = (4),
554 };
555
556 enum bfi_port_i2h {
557 BFI_PORT_I2H_ENABLE_RSP = BFA_I2HM(1),
558 BFI_PORT_I2H_DISABLE_RSP = BFA_I2HM(2),
559 BFI_PORT_I2H_GET_STATS_RSP = BFA_I2HM(3),
560 BFI_PORT_I2H_CLEAR_STATS_RSP = BFA_I2HM(4),
561 };
562
563 /*
564 * Generic REQ type
565 */
566 struct bfi_port_generic_req_s {
567 struct bfi_mhdr_s mh; /* msg header */
568 u32 msgtag; /* msgtag for reply */
569 u32 rsvd;
570 };
571
572 /*
573 * Generic RSP type
574 */
575 struct bfi_port_generic_rsp_s {
576 struct bfi_mhdr_s mh; /* common msg header */
577 u8 status; /* port enable status */
578 u8 rsvd[3];
579 u32 msgtag; /* msgtag for reply */
580 };
581
582 /*
583 * BFI_PORT_H2I_GET_STATS_REQ
584 */
585 struct bfi_port_get_stats_req_s {
586 struct bfi_mhdr_s mh; /* common msg header */
587 union bfi_addr_u dma_addr;
588 };
589
590 union bfi_port_h2i_msg_u {
591 struct bfi_mhdr_s mh;
592 struct bfi_port_generic_req_s enable_req;
593 struct bfi_port_generic_req_s disable_req;
594 struct bfi_port_get_stats_req_s getstats_req;
595 struct bfi_port_generic_req_s clearstats_req;
596 };
597
598 union bfi_port_i2h_msg_u {
599 struct bfi_mhdr_s mh;
600 struct bfi_port_generic_rsp_s enable_rsp;
601 struct bfi_port_generic_rsp_s disable_rsp;
602 struct bfi_port_generic_rsp_s getstats_rsp;
603 struct bfi_port_generic_rsp_s clearstats_rsp;
604 };
605
606 #pragma pack()
607
608 #endif /* __BFI_H__ */