drivers/scsi/bnx2i/bnx2i.h

   1 /* bnx2i.h: Broadcom NetXtreme II iSCSI driver.
   2  *
   3  * Copyright (c) 2006 - 2009 Broadcom Corporation
   4  * Copyright (c) 2007, 2008 Red Hat, Inc.  All rights reserved.
   5  * Copyright (c) 2007, 2008 Mike Christie
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation.
  10  *
  11  * Written by: Anil Veerabhadrappa (anilgv@broadcom.com)
  12  */
  13
  14 #ifndef _BNX2I_H_
  15 #define _BNX2I_H_
  16
  17 #include <linux/module.h>
  18 #include <linux/moduleparam.h>
  19
  20 #include <linux/errno.h>
  21 #include <linux/pci.h>
  22 #include <linux/spinlock.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/sched.h>
  25 #include <linux/in.h>
  26 #include <linux/kfifo.h>
  27 #include <linux/netdevice.h>
  28 #include <linux/completion.h>
  29
  30 #include <scsi/scsi_cmnd.h>
  31 #include <scsi/scsi_device.h>
  32 #include <scsi/scsi_eh.h>
  33 #include <scsi/scsi_host.h>
  34 #include <scsi/scsi.h>
  35 #include <scsi/iscsi_proto.h>
  36 #include <scsi/libiscsi.h>
  37 #include <scsi/scsi_transport_iscsi.h>
  38
  39 #include "../../net/cnic_if.h"
  40 #include "57xx_iscsi_hsi.h"
  41 #include "57xx_iscsi_constants.h"
  42
  43 #define BNX2_ISCSI_DRIVER_NAME          "bnx2i"
  44
  45 #define BNX2I_MAX_ADAPTERS              8
  46
  47 #define ISCSI_MAX_CONNS_PER_HBA         128
  48 #define ISCSI_MAX_SESS_PER_HBA          ISCSI_MAX_CONNS_PER_HBA
  49 #define ISCSI_MAX_CMDS_PER_SESS         128
  50
  51 /* Total active commands across all connections supported by devices */
  52 #define ISCSI_MAX_CMDS_PER_HBA_5708     (28 * (ISCSI_MAX_CMDS_PER_SESS - 1))
  53 #define ISCSI_MAX_CMDS_PER_HBA_5709     (128 * (ISCSI_MAX_CMDS_PER_SESS - 1))
  54 #define ISCSI_MAX_CMDS_PER_HBA_57710    (256 * (ISCSI_MAX_CMDS_PER_SESS - 1))
  55
  56 #define ISCSI_MAX_BDS_PER_CMD           32
  57
  58 #define MAX_PAGES_PER_CTRL_STRUCT_POOL  8
  59 #define BNX2I_RESERVED_SLOW_PATH_CMD_SLOTS      4
  60
  61 /* 5706/08 hardware has limit on maximum buffer size per BD it can handle */
  62 #define MAX_BD_LENGTH                   65535
  63 #define BD_SPLIT_SIZE                   32768
  64
  65 /* min, max & default values for SQ/RQ/CQ size, configurable via' modparam */
  66 #define BNX2I_SQ_WQES_MIN               16
  67 #define BNX2I_570X_SQ_WQES_MAX          128
  68 #define BNX2I_5770X_SQ_WQES_MAX         512
  69 #define BNX2I_570X_SQ_WQES_DEFAULT      128
  70 #define BNX2I_5770X_SQ_WQES_DEFAULT     256
  71
  72 #define BNX2I_570X_CQ_WQES_MAX          128
  73 #define BNX2I_5770X_CQ_WQES_MAX         512
  74
  75 #define BNX2I_RQ_WQES_MIN               16
  76 #define BNX2I_RQ_WQES_MAX               32
  77 #define BNX2I_RQ_WQES_DEFAULT           16
  78
  79 /* CCELLs per conn */
  80 #define BNX2I_CCELLS_MIN                16
  81 #define BNX2I_CCELLS_MAX                96
  82 #define BNX2I_CCELLS_DEFAULT            64
  83
  84 #define ITT_INVALID_SIGNATURE           0xFFFF
  85
  86 #define ISCSI_CMD_CLEANUP_TIMEOUT       100
  87
  88 #define BNX2I_CONN_CTX_BUF_SIZE         16384
  89
  90 #define BNX2I_SQ_WQE_SIZE               64
  91 #define BNX2I_RQ_WQE_SIZE               256
  92 #define BNX2I_CQE_SIZE                  64
  93
  94 #define MB_KERNEL_CTX_SHIFT             8
  95 #define MB_KERNEL_CTX_SIZE              (1 << MB_KERNEL_CTX_SHIFT)
  96
  97 #define CTX_SHIFT                       7
  98 #define GET_CID_NUM(cid_addr)           ((cid_addr) >> CTX_SHIFT)
  99
 100 #define CTX_OFFSET                      0x10000
 101 #define MAX_CID_CNT                     0x4000
 102
 103 #define BNX2I_570X_PAGE_SIZE_DEFAULT    4096
 104
 105 /* 5709 context registers */
 106 #define BNX2_MQ_CONFIG2                 0x00003d00
 107 #define BNX2_MQ_CONFIG2_CONT_SZ         (0x7L<<4)
 108 #define BNX2_MQ_CONFIG2_FIRST_L4L5      (0x1fL<<8)
 109
 110 /* 57710's BAR2 is mapped to doorbell registers */
 111 #define BNX2X_DOORBELL_PCI_BAR          2
 112 #define BNX2X_MAX_CQS                   8
 113
 114 #define CNIC_ARM_CQE                    1
 115 #define CNIC_DISARM_CQE                 0
 116
 117 #define REG_RD(__hba, offset)                           \
 118                 readl(__hba->regview + offset)
 119 #define REG_WR(__hba, offset, val)                      \
 120                 writel(val, __hba->regview + offset)
 121
 122
 123 /**
 124  * struct generic_pdu_resc - login pdu resource structure
 125  *
 126  * @req_buf:            driver buffer used to stage payload associated with
 127  *                      the login request
 128  * @req_dma_addr:       dma address for iscsi login request payload buffer
 129  * @req_buf_size:       actual login request payload length
 130  * @req_wr_ptr:         pointer into login request buffer when next data is
 131  *                      to be written
 132  * @resp_hdr:           iscsi header where iscsi login response header is to
 133  *                      be recreated
 134  * @resp_buf:           buffer to stage login response payload
 135  * @resp_dma_addr:      login response payload buffer dma address
 136  * @resp_buf_size:      login response paylod length
 137  * @resp_wr_ptr:        pointer into login response buffer when next data is
 138  *                      to be written
 139  * @req_bd_tbl:         iscsi login request payload BD table
 140  * @req_bd_dma:         login request BD table dma address
 141  * @resp_bd_tbl:        iscsi login response payload BD table
 142  * @resp_bd_dma:        login request BD table dma address
 143  *
 144  * following structure defines buffer info for generic pdus such as iSCSI Login,
 145  *      Logout and NOP
 146  */
 147 struct generic_pdu_resc {
 148         char *req_buf;
 149         dma_addr_t req_dma_addr;
 150         u32 req_buf_size;
 151         char *req_wr_ptr;
 152         struct iscsi_hdr resp_hdr;
 153         char *resp_buf;
 154         dma_addr_t resp_dma_addr;
 155         u32 resp_buf_size;
 156         char *resp_wr_ptr;
 157         char *req_bd_tbl;
 158         dma_addr_t req_bd_dma;
 159         char *resp_bd_tbl;
 160         dma_addr_t resp_bd_dma;
 161 };
 162
 163
 164 /**
 165  * struct bd_resc_page - tracks DMA'able memory allocated for BD tables
 166  *
 167  * @link:               list head to link elements
 168  * @max_ptrs:           maximun pointers that can be stored in this page
 169  * @num_valid:          number of pointer valid in this page
 170  * @page:               base addess for page pointer array
 171  *
 172  * structure to track DMA'able memory allocated for command BD tables
 173  */
 174 struct bd_resc_page {
 175         struct list_head link;
 176         u32 max_ptrs;
 177         u32 num_valid;
 178         void *page[1];
 179 };
 180
 181
 182 /**
 183  * struct io_bdt - I/O buffer destricptor table
 184  *
 185  * @bd_tbl:             BD table's virtual address
 186  * @bd_tbl_dma:         BD table's dma address
 187  * @bd_valid:           num valid BD entries
 188  *
 189  * IO BD table
 190  */
 191 struct io_bdt {
 192         struct iscsi_bd *bd_tbl;
 193         dma_addr_t bd_tbl_dma;
 194         u16 bd_valid;
 195 };
 196
 197
 198 /**
 199  * bnx2i_cmd - iscsi command structure
 200  *
 201  * @scsi_cmd:           SCSI-ML task pointer corresponding to this iscsi cmd
 202  * @sg:                 SG list
 203  * @io_tbl:             buffer descriptor (BD) table
 204  * @bd_tbl_dma:         buffer descriptor (BD) table's dma address
 205  */
 206 struct bnx2i_cmd {
 207         struct iscsi_hdr hdr;
 208         struct bnx2i_conn *conn;
 209         struct scsi_cmnd *scsi_cmd;
 210         struct scatterlist *sg;
 211         struct io_bdt io_tbl;
 212         dma_addr_t bd_tbl_dma;
 213         struct bnx2i_cmd_request req;
 214 };
 215
 216
 217 /**
 218  * struct bnx2i_conn - iscsi connection structure
 219  *
 220  * @cls_conn:              pointer to iscsi cls conn
 221  * @hba:                   adapter structure pointer
 222  * @iscsi_conn_cid:        iscsi conn id
 223  * @fw_cid:                firmware iscsi context id
 224  * @ep:                    endpoint structure pointer
 225  * @gen_pdu:               login/nopout/logout pdu resources
 226  * @violation_notified:    bit mask used to track iscsi error/warning messages
 227  *                         already printed out
 228  *
 229  * iSCSI connection structure
 230  */
 231 struct bnx2i_conn {
 232         struct iscsi_cls_conn *cls_conn;
 233         struct bnx2i_hba *hba;
 234         struct completion cmd_cleanup_cmpl;
 235         int is_bound;
 236
 237         u32 iscsi_conn_cid;
 238 #define BNX2I_CID_RESERVED      0x5AFF
 239         u32 fw_cid;
 240
 241         struct timer_list poll_timer;
 242         /*
 243          * Queue Pair (QP) related structure elements.
 244          */
 245         struct bnx2i_endpoint *ep;
 246
 247         /*
 248          * Buffer for login negotiation process
 249          */
 250         struct generic_pdu_resc gen_pdu;
 251         u64 violation_notified;
 252 };
 253
 254
 255
 256 /**
 257  * struct iscsi_cid_queue - Per adapter iscsi cid queue
 258  *
 259  * @cid_que_base:           queue base memory
 260  * @cid_que:                queue memory pointer
 261  * @cid_q_prod_idx:         produce index
 262  * @cid_q_cons_idx:         consumer index
 263  * @cid_q_max_idx:          max index. used to detect wrap around condition
 264  * @cid_free_cnt:           queue size
 265  * @conn_cid_tbl:           iscsi cid to conn structure mapping table
 266  *
 267  * Per adapter iSCSI CID Queue
 268  */
 269 struct iscsi_cid_queue {
 270         void *cid_que_base;
 271         u32 *cid_que;
 272         u32 cid_q_prod_idx;
 273         u32 cid_q_cons_idx;
 274         u32 cid_q_max_idx;
 275         u32 cid_free_cnt;
 276         struct bnx2i_conn **conn_cid_tbl;
 277 };
 278
 279 /**
 280  * struct bnx2i_hba - bnx2i adapter structure
 281  *
 282  * @link:                  list head to link elements
 283  * @cnic:                  pointer to cnic device
 284  * @pcidev:                pointer to pci dev
 285  * @netdev:                pointer to netdev structure
 286  * @regview:               mapped PCI register space
 287  * @age:                   age, incremented by every recovery
 288  * @cnic_dev_type:         cnic device type, 5706/5708/5709/57710
 289  * @mail_queue_access:     mailbox queue access mode, applicable to 5709 only
 290  * @reg_with_cnic:         indicates whether the device is register with CNIC
 291  * @adapter_state:         adapter state, UP, GOING_DOWN, LINK_DOWN
 292  * @mtu_supported:         Ethernet MTU supported
 293  * @shost:                 scsi host pointer
 294  * @max_sqes:              SQ size
 295  * @max_rqes:              RQ size
 296  * @max_cqes:              CQ size
 297  * @num_ccell:             number of command cells per connection
 298  * @ofld_conns_active:     active connection list
 299  * @max_active_conns:      max offload connections supported by this device
 300  * @cid_que:               iscsi cid queue
 301  * @ep_rdwr_lock:          read / write lock to synchronize various ep lists
 302  * @ep_ofld_list:          connection list for pending offload completion
 303  * @ep_destroy_list:       connection list for pending offload completion
 304  * @mp_bd_tbl:             BD table to be used with middle path requests
 305  * @mp_bd_dma:             DMA address of 'mp_bd_tbl' memory buffer
 306  * @dummy_buffer:          Dummy buffer to be used with zero length scsicmd reqs
 307  * @dummy_buf_dma:         DMA address of 'dummy_buffer' memory buffer
 308  * @lock:                  lock to synchonize access to hba structure
 309  * @pci_did:               PCI device ID
 310  * @pci_vid:               PCI vendor ID
 311  * @pci_sdid:              PCI subsystem device ID
 312  * @pci_svid:              PCI subsystem vendor ID
 313  * @pci_func:              PCI function number in system pci tree
 314  * @pci_devno:             PCI device number in system pci tree
 315  * @num_wqe_sent:          statistic counter, total wqe's sent
 316  * @num_cqe_rcvd:          statistic counter, total cqe's received
 317  * @num_intr_claimed:      statistic counter, total interrupts claimed
 318  * @link_changed_count:    statistic counter, num of link change notifications
 319  *                         received
 320  * @ipaddr_changed_count:  statistic counter, num times IP address changed while
 321  *                         at least one connection is offloaded
 322  * @num_sess_opened:       statistic counter, total num sessions opened
 323  * @num_conn_opened:       statistic counter, total num conns opened on this hba
 324  * @ctx_ccell_tasks:       captures number of ccells and tasks supported by
 325  *                         currently offloaded connection, used to decode
 326  *                         context memory
 327  *
 328  * Adapter Data Structure
 329  */
 330 struct bnx2i_hba {
 331         struct list_head link;
 332         struct cnic_dev *cnic;
 333         struct pci_dev *pcidev;
 334         struct net_device *netdev;
 335         void __iomem *regview;
 336
 337         u32 age;
 338         unsigned long cnic_dev_type;
 339                 #define BNX2I_NX2_DEV_5706              0x0
 340                 #define BNX2I_NX2_DEV_5708              0x1
 341                 #define BNX2I_NX2_DEV_5709              0x2
 342                 #define BNX2I_NX2_DEV_57710             0x3
 343         u32 mail_queue_access;
 344                 #define BNX2I_MQ_KERNEL_MODE            0x0
 345                 #define BNX2I_MQ_KERNEL_BYPASS_MODE     0x1
 346                 #define BNX2I_MQ_BIN_MODE               0x2
 347         unsigned long  reg_with_cnic;
 348                 #define BNX2I_CNIC_REGISTERED           1
 349
 350         unsigned long  adapter_state;
 351                 #define ADAPTER_STATE_UP                0
 352                 #define ADAPTER_STATE_GOING_DOWN        1
 353                 #define ADAPTER_STATE_LINK_DOWN         2
 354                 #define ADAPTER_STATE_INIT_FAILED       31
 355         unsigned int mtu_supported;
 356                 #define BNX2I_MAX_MTU_SUPPORTED         1500
 357
 358         struct Scsi_Host *shost;
 359
 360         u32 max_sqes;
 361         u32 max_rqes;
 362         u32 max_cqes;
 363         u32 num_ccell;
 364
 365         int ofld_conns_active;
 366
 367         int max_active_conns;
 368         struct iscsi_cid_queue cid_que;
 369
 370         rwlock_t ep_rdwr_lock;
 371         struct list_head ep_ofld_list;
 372         struct list_head ep_destroy_list;
 373
 374         /*
 375          * BD table to be used with MP (Middle Path requests.
 376          */
 377         char *mp_bd_tbl;
 378         dma_addr_t mp_bd_dma;
 379         char *dummy_buffer;
 380         dma_addr_t dummy_buf_dma;
 381
 382         spinlock_t lock;        /* protects hba structure access */
 383         struct mutex net_dev_lock;/* sync net device access */
 384
 385         /*
 386          * PCI related info.
 387          */
 388         u16 pci_did;
 389         u16 pci_vid;
 390         u16 pci_sdid;
 391         u16 pci_svid;
 392         u16 pci_func;
 393         u16 pci_devno;
 394
 395         /*
 396          * Following are a bunch of statistics useful during development
 397          * and later stage for score boarding.
 398          */
 399         u32 num_wqe_sent;
 400         u32 num_cqe_rcvd;
 401         u32 num_intr_claimed;
 402         u32 link_changed_count;
 403         u32 ipaddr_changed_count;
 404         u32 num_sess_opened;
 405         u32 num_conn_opened;
 406         unsigned int ctx_ccell_tasks;
 407 };
 408
 409
 410 /*******************************************************************************
 411  *      QP [ SQ / RQ / CQ ] info.
 412  ******************************************************************************/
 413
 414 /*
 415  * SQ/RQ/CQ generic structure definition
 416  */
 417 struct  sqe {
 418         u8 sqe_byte[BNX2I_SQ_WQE_SIZE];
 419 };
 420
 421 struct  rqe {
 422         u8 rqe_byte[BNX2I_RQ_WQE_SIZE];
 423 };
 424
 425 struct  cqe {
 426         u8 cqe_byte[BNX2I_CQE_SIZE];
 427 };
 428
 429
 430 enum {
 431 #if defined(__LITTLE_ENDIAN)
 432         CNIC_EVENT_COAL_INDEX   = 0x0,
 433         CNIC_SEND_DOORBELL      = 0x4,
 434         CNIC_EVENT_CQ_ARM       = 0x7,
 435         CNIC_RECV_DOORBELL      = 0x8
 436 #elif defined(__BIG_ENDIAN)
 437         CNIC_EVENT_COAL_INDEX   = 0x2,
 438         CNIC_SEND_DOORBELL      = 0x6,
 439         CNIC_EVENT_CQ_ARM       = 0x4,
 440         CNIC_RECV_DOORBELL      = 0xa
 441 #endif
 442 };
 443
 444
 445 /*
 446  * CQ DB
 447  */
 448 struct bnx2x_iscsi_cq_pend_cmpl {
 449         /* CQ producer, updated by Ustorm */
 450         u16 ustrom_prod;
 451         /* CQ pending completion counter */
 452         u16 pend_cntr;
 453 };
 454
 455
 456 struct bnx2i_5771x_cq_db {
 457         struct bnx2x_iscsi_cq_pend_cmpl qp_pend_cmpl[BNX2X_MAX_CQS];
 458         /* CQ pending completion ITT array */
 459         u16 itt[BNX2X_MAX_CQS];
 460         /* Cstorm CQ sequence to notify array, updated by driver */;
 461         u16 sqn[BNX2X_MAX_CQS];
 462         u32 reserved[4] /* 16 byte allignment */;
 463 };
 464
 465
 466 struct bnx2i_5771x_sq_rq_db {
 467         u16 prod_idx;
 468         u8 reserved0[14]; /* Pad structure size to 16 bytes */
 469 };
 470
 471
 472 struct bnx2i_5771x_dbell_hdr {
 473         u8 header;
 474         /* 1 for rx doorbell, 0 for tx doorbell */
 475 #define B577XX_DOORBELL_HDR_RX                          (0x1<<0)
 476 #define B577XX_DOORBELL_HDR_RX_SHIFT                    0
 477         /* 0 for normal doorbell, 1 for advertise wnd doorbell */
 478 #define B577XX_DOORBELL_HDR_DB_TYPE                     (0x1<<1)
 479 #define B577XX_DOORBELL_HDR_DB_TYPE_SHIFT               1
 480         /* rdma tx only: DPM transaction size specifier (64/128/256/512B) */
 481 #define B577XX_DOORBELL_HDR_DPM_SIZE                    (0x3<<2)
 482 #define B577XX_DOORBELL_HDR_DPM_SIZE_SHIFT              2
 483         /* connection type */
 484 #define B577XX_DOORBELL_HDR_CONN_TYPE                   (0xF<<4)
 485 #define B577XX_DOORBELL_HDR_CONN_TYPE_SHIFT             4
 486 };
 487
 488 struct bnx2i_5771x_dbell {
 489         struct bnx2i_5771x_dbell_hdr dbell;
 490         u8 pad[3];
 491
 492 };
 493
 494 /**
 495  * struct qp_info - QP (share queue region) atrributes structure
 496  *
 497  * @ctx_base:           ioremapped pci register base to access doorbell register
 498  *                      pertaining to this offloaded connection
 499  * @sq_virt:            virtual address of send queue (SQ) region
 500  * @sq_phys:            DMA address of SQ memory region
 501  * @sq_mem_size:        SQ size
 502  * @sq_prod_qe:         SQ producer entry pointer
 503  * @sq_cons_qe:         SQ consumer entry pointer
 504  * @sq_first_qe:        virtaul address of first entry in SQ
 505  * @sq_last_qe:         virtaul address of last entry in SQ
 506  * @sq_prod_idx:        SQ producer index
 507  * @sq_cons_idx:        SQ consumer index
 508  * @sqe_left:           number sq entry left
 509  * @sq_pgtbl_virt:      page table describing buffer consituting SQ region
 510  * @sq_pgtbl_phys:      dma address of 'sq_pgtbl_virt'
 511  * @sq_pgtbl_size:      SQ page table size
 512  * @cq_virt:            virtual address of completion queue (CQ) region
 513  * @cq_phys:            DMA address of RQ memory region
 514  * @cq_mem_size:        CQ size
 515  * @cq_prod_qe:         CQ producer entry pointer
 516  * @cq_cons_qe:         CQ consumer entry pointer
 517  * @cq_first_qe:        virtaul address of first entry in CQ
 518  * @cq_last_qe:         virtaul address of last entry in CQ
 519  * @cq_prod_idx:        CQ producer index
 520  * @cq_cons_idx:        CQ consumer index
 521  * @cqe_left:           number cq entry left
 522  * @cqe_size:           size of each CQ entry
 523  * @cqe_exp_seq_sn:     next expected CQE sequence number
 524  * @cq_pgtbl_virt:      page table describing buffer consituting CQ region
 525  * @cq_pgtbl_phys:      dma address of 'cq_pgtbl_virt'
 526  * @cq_pgtbl_size:      CQ page table size
 527  * @rq_virt:            virtual address of receive queue (RQ) region
 528  * @rq_phys:            DMA address of RQ memory region
 529  * @rq_mem_size:        RQ size
 530  * @rq_prod_qe:         RQ producer entry pointer
 531  * @rq_cons_qe:         RQ consumer entry pointer
 532  * @rq_first_qe:        virtaul address of first entry in RQ
 533  * @rq_last_qe:         virtaul address of last entry in RQ
 534  * @rq_prod_idx:        RQ producer index
 535  * @rq_cons_idx:        RQ consumer index
 536  * @rqe_left:           number rq entry left
 537  * @rq_pgtbl_virt:      page table describing buffer consituting RQ region
 538  * @rq_pgtbl_phys:      dma address of 'rq_pgtbl_virt'
 539  * @rq_pgtbl_size:      RQ page table size
 540  *
 541  * queue pair (QP) is a per connection shared data structure which is used
 542  *      to send work requests (SQ), receive completion notifications (CQ)
 543  *      and receive asynchoronous / scsi sense info (RQ). 'qp_info' structure
 544  *      below holds queue memory, consumer/producer indexes and page table
 545  *      information
 546  */
 547 struct qp_info {
 548         void __iomem *ctx_base;
 549 #define DPM_TRIGER_TYPE                 0x40
 550
 551 #define BNX2I_570x_QUE_DB_SIZE          0
 552 #define BNX2I_5771x_QUE_DB_SIZE         16
 553         struct sqe *sq_virt;
 554         dma_addr_t sq_phys;
 555         u32 sq_mem_size;
 556
 557         struct sqe *sq_prod_qe;
 558         struct sqe *sq_cons_qe;
 559         struct sqe *sq_first_qe;
 560         struct sqe *sq_last_qe;
 561         u16 sq_prod_idx;
 562         u16 sq_cons_idx;
 563         u32 sqe_left;
 564
 565         void *sq_pgtbl_virt;
 566         dma_addr_t sq_pgtbl_phys;
 567         u32 sq_pgtbl_size;      /* set to PAGE_SIZE for 5708 & 5709 */
 568
 569         struct cqe *cq_virt;
 570         dma_addr_t cq_phys;
 571         u32 cq_mem_size;
 572
 573         struct cqe *cq_prod_qe;
 574         struct cqe *cq_cons_qe;
 575         struct cqe *cq_first_qe;
 576         struct cqe *cq_last_qe;
 577         u16 cq_prod_idx;
 578         u16 cq_cons_idx;
 579         u32 cqe_left;
 580         u32 cqe_size;
 581         u32 cqe_exp_seq_sn;
 582
 583         void *cq_pgtbl_virt;
 584         dma_addr_t cq_pgtbl_phys;
 585         u32 cq_pgtbl_size;      /* set to PAGE_SIZE for 5708 & 5709 */
 586
 587         struct rqe *rq_virt;
 588         dma_addr_t rq_phys;
 589         u32 rq_mem_size;
 590
 591         struct rqe *rq_prod_qe;
 592         struct rqe *rq_cons_qe;
 593         struct rqe *rq_first_qe;
 594         struct rqe *rq_last_qe;
 595         u16 rq_prod_idx;
 596         u16 rq_cons_idx;
 597         u32 rqe_left;
 598
 599         void *rq_pgtbl_virt;
 600         dma_addr_t rq_pgtbl_phys;
 601         u32 rq_pgtbl_size;      /* set to PAGE_SIZE for 5708 & 5709 */
 602 };
 603
 604
 605
 606 /*
 607  * CID handles
 608  */
 609 struct ep_handles {
 610         u32 fw_cid;
 611         u32 drv_iscsi_cid;
 612         u16 pg_cid;
 613         u16 rsvd;
 614 };
 615
 616
 617 enum {
 618         EP_STATE_IDLE                   = 0x0,
 619         EP_STATE_PG_OFLD_START          = 0x1,
 620         EP_STATE_PG_OFLD_COMPL          = 0x2,
 621         EP_STATE_OFLD_START             = 0x4,
 622         EP_STATE_OFLD_COMPL             = 0x8,
 623         EP_STATE_CONNECT_START          = 0x10,
 624         EP_STATE_CONNECT_COMPL          = 0x20,
 625         EP_STATE_ULP_UPDATE_START       = 0x40,
 626         EP_STATE_ULP_UPDATE_COMPL       = 0x80,
 627         EP_STATE_DISCONN_START          = 0x100,
 628         EP_STATE_DISCONN_COMPL          = 0x200,
 629         EP_STATE_CLEANUP_START          = 0x400,
 630         EP_STATE_CLEANUP_CMPL           = 0x800,
 631         EP_STATE_TCP_FIN_RCVD           = 0x1000,
 632         EP_STATE_TCP_RST_RCVD           = 0x2000,
 633         EP_STATE_PG_OFLD_FAILED         = 0x1000000,
 634         EP_STATE_ULP_UPDATE_FAILED      = 0x2000000,
 635         EP_STATE_CLEANUP_FAILED         = 0x4000000,
 636         EP_STATE_OFLD_FAILED            = 0x8000000,
 637         EP_STATE_CONNECT_FAILED         = 0x10000000,
 638         EP_STATE_DISCONN_TIMEDOUT       = 0x20000000,
 639 };
 640
 641 /**
 642  * struct bnx2i_endpoint - representation of tcp connection in NX2 world
 643  *
 644  * @link:               list head to link elements
 645  * @hba:                adapter to which this connection belongs
 646  * @conn:               iscsi connection this EP is linked to
 647  * @sess:               iscsi session this EP is linked to
 648  * @cm_sk:              cnic sock struct
 649  * @hba_age:            age to detect if 'iscsid' issues ep_disconnect()
 650  *                      after HBA reset is completed by bnx2i/cnic/bnx2
 651  *                      modules
 652  * @state:              tracks offload connection state machine
 653  * @teardown_mode:      indicates if conn teardown is abortive or orderly
 654  * @qp:                 QP information
 655  * @ids:                contains chip allocated *context id* & driver assigned
 656  *                      *iscsi cid*
 657  * @ofld_timer:         offload timer to detect timeout
 658  * @ofld_wait:          wait queue
 659  *
 660  * Endpoint Structure - equivalent of tcp socket structure
 661  */
 662 struct bnx2i_endpoint {
 663         struct list_head link;
 664         struct bnx2i_hba *hba;
 665         struct bnx2i_conn *conn;
 666         struct cnic_sock *cm_sk;
 667         u32 hba_age;
 668         u32 state;
 669         unsigned long timestamp;
 670         int num_active_cmds;
 671
 672         struct qp_info qp;
 673         struct ep_handles ids;
 674                 #define ep_iscsi_cid    ids.drv_iscsi_cid
 675                 #define ep_cid          ids.fw_cid
 676                 #define ep_pg_cid       ids.pg_cid
 677         struct timer_list ofld_timer;
 678         wait_queue_head_t ofld_wait;
 679 };
 680
 681
 682
 683 /* Global variables */
 684 extern unsigned int error_mask1, error_mask2;
 685 extern u64 iscsi_error_mask;
 686 extern unsigned int en_tcp_dack;
 687 extern unsigned int event_coal_div;
 688
 689 extern struct scsi_transport_template *bnx2i_scsi_xport_template;
 690 extern struct iscsi_transport bnx2i_iscsi_transport;
 691 extern struct cnic_ulp_ops bnx2i_cnic_cb;
 692
 693 extern unsigned int sq_size;
 694 extern unsigned int rq_size;
 695
 696 extern struct device_attribute *bnx2i_dev_attributes[];
 697
 698
 699
 700 /*
 701  * Function Prototypes
 702  */
 703 extern void bnx2i_identify_device(struct bnx2i_hba *hba);
 704 extern void bnx2i_register_device(struct bnx2i_hba *hba);
 705
 706 extern void bnx2i_ulp_init(struct cnic_dev *dev);
 707 extern void bnx2i_ulp_exit(struct cnic_dev *dev);
 708 extern void bnx2i_start(void *handle);
 709 extern void bnx2i_stop(void *handle);
 710 extern void bnx2i_reg_dev_all(void);
 711 extern void bnx2i_unreg_dev_all(void);
 712 extern struct bnx2i_hba *get_adapter_list_head(void);
 713
 714 struct bnx2i_conn *bnx2i_get_conn_from_id(struct bnx2i_hba *hba,
 715                                           u16 iscsi_cid);
 716
 717 int bnx2i_alloc_ep_pool(void);
 718 void bnx2i_release_ep_pool(void);
 719 struct bnx2i_endpoint *bnx2i_ep_ofld_list_next(struct bnx2i_hba *hba);
 720 struct bnx2i_endpoint *bnx2i_ep_destroy_list_next(struct bnx2i_hba *hba);
 721
 722 struct bnx2i_hba *bnx2i_find_hba_for_cnic(struct cnic_dev *cnic);
 723
 724 struct bnx2i_hba *bnx2i_alloc_hba(struct cnic_dev *cnic);
 725 void bnx2i_free_hba(struct bnx2i_hba *hba);
 726
 727 void bnx2i_get_rq_buf(struct bnx2i_conn *conn, char *ptr, int len);
 728 void bnx2i_put_rq_buf(struct bnx2i_conn *conn, int count);
 729
 730 void bnx2i_iscsi_unmap_sg_list(struct bnx2i_cmd *cmd);
 731
 732 void bnx2i_drop_session(struct iscsi_cls_session *session);
 733
 734 extern int bnx2i_send_fw_iscsi_init_msg(struct bnx2i_hba *hba);
 735 extern int bnx2i_send_iscsi_login(struct bnx2i_conn *conn,
 736                                   struct iscsi_task *mtask);
 737 extern int bnx2i_send_iscsi_tmf(struct bnx2i_conn *conn,
 738                                   struct iscsi_task *mtask);
 739 extern int bnx2i_send_iscsi_scsicmd(struct bnx2i_conn *conn,
 740                                     struct bnx2i_cmd *cmnd);
 741 extern int bnx2i_send_iscsi_nopout(struct bnx2i_conn *conn,
 742                                    struct iscsi_task *mtask, u32 ttt,
 743                                    char *datap, int data_len, int unsol);
 744 extern int bnx2i_send_iscsi_logout(struct bnx2i_conn *conn,
 745                                    struct iscsi_task *mtask);
 746 extern void bnx2i_send_cmd_cleanup_req(struct bnx2i_hba *hba,
 747                                        struct bnx2i_cmd *cmd);
 748 extern void bnx2i_send_conn_ofld_req(struct bnx2i_hba *hba,
 749                                      struct bnx2i_endpoint *ep);
 750 extern void bnx2i_update_iscsi_conn(struct iscsi_conn *conn);
 751 extern void bnx2i_send_conn_destroy(struct bnx2i_hba *hba,
 752                                     struct bnx2i_endpoint *ep);
 753
 754 extern int bnx2i_alloc_qp_resc(struct bnx2i_hba *hba,
 755                                struct bnx2i_endpoint *ep);
 756 extern void bnx2i_free_qp_resc(struct bnx2i_hba *hba,
 757                                struct bnx2i_endpoint *ep);
 758 extern void bnx2i_ep_ofld_timer(unsigned long data);
 759 extern struct bnx2i_endpoint *bnx2i_find_ep_in_ofld_list(
 760                 struct bnx2i_hba *hba, u32 iscsi_cid);
 761 extern struct bnx2i_endpoint *bnx2i_find_ep_in_destroy_list(
 762                 struct bnx2i_hba *hba, u32 iscsi_cid);
 763
 764 extern int bnx2i_map_ep_dbell_regs(struct bnx2i_endpoint *ep);
 765 extern void bnx2i_arm_cq_event_coalescing(struct bnx2i_endpoint *ep, u8 action);
 766
 767 /* Debug related function prototypes */
 768 extern void bnx2i_print_pend_cmd_queue(struct bnx2i_conn *conn);
 769 extern void bnx2i_print_active_cmd_queue(struct bnx2i_conn *conn);
 770 extern void bnx2i_print_xmit_pdu_queue(struct bnx2i_conn *conn);
 771 extern void bnx2i_print_recv_state(struct bnx2i_conn *conn);
 772
 773 #endif