drivers/scsi/cxlflash/common.h

   1 /*
   2  * CXL Flash Device Driver
   3  *
   4  * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
   5  *             Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
   6  *
   7  * Copyright (C) 2015 IBM Corporation
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version
  12  * 2 of the License, or (at your option) any later version.
  13  */
  14
  15 #ifndef _CXLFLASH_COMMON_H
  16 #define _CXLFLASH_COMMON_H
  17
  18 #include <linux/irq_poll.h>
  19 #include <linux/list.h>
  20 #include <linux/rwsem.h>
  21 #include <linux/types.h>
  22 #include <scsi/scsi.h>
  23 #include <scsi/scsi_cmnd.h>
  24 #include <scsi/scsi_device.h>
  25
  26 extern const struct file_operations cxlflash_cxl_fops;
  27
  28 #define MAX_CONTEXT     CXLFLASH_MAX_CONTEXT    /* num contexts per afu */
  29 #define MAX_FC_PORTS    CXLFLASH_MAX_FC_PORTS   /* max ports per AFU */
  30 #define LEGACY_FC_PORTS 2                       /* legacy ports per AFU */
  31
  32 #define CHAN2PORTBANK(_x)       ((_x) >> ilog2(CXLFLASH_NUM_FC_PORTS_PER_BANK))
  33 #define CHAN2BANKPORT(_x)       ((_x) & (CXLFLASH_NUM_FC_PORTS_PER_BANK - 1))
  34
  35 #define CHAN2PORTMASK(_x)       (1 << (_x))     /* channel to port mask */
  36 #define PORTMASK2CHAN(_x)       (ilog2((_x)))   /* port mask to channel */
  37 #define PORTNUM2CHAN(_x)        ((_x) - 1)      /* port number to channel */
  38
  39 #define CXLFLASH_BLOCK_SIZE     4096            /* 4K blocks */
  40 #define CXLFLASH_MAX_XFER_SIZE  16777216        /* 16MB transfer */
  41 #define CXLFLASH_MAX_SECTORS    (CXLFLASH_MAX_XFER_SIZE/512)    /* SCSI wants
  42                                                                  * max_sectors
  43                                                                  * in units of
  44                                                                  * 512 byte
  45                                                                  * sectors
  46                                                                  */
  47
  48 #define MAX_RHT_PER_CONTEXT (PAGE_SIZE / sizeof(struct sisl_rht_entry))
  49
  50 /* AFU command retry limit */
  51 #define MC_RETRY_CNT    5       /* Sufficient for SCSI and certain AFU errors */
  52
  53 /* Command management definitions */
  54 #define CXLFLASH_MAX_CMDS               256
  55 #define CXLFLASH_MAX_CMDS_PER_LUN       CXLFLASH_MAX_CMDS
  56
  57 /* RRQ for master issued cmds */
  58 #define NUM_RRQ_ENTRY                   CXLFLASH_MAX_CMDS
  59
  60 /* SQ for master issued cmds */
  61 #define NUM_SQ_ENTRY                    CXLFLASH_MAX_CMDS
  62
  63
  64 static inline void check_sizes(void)
  65 {
  66         BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_NUM_FC_PORTS_PER_BANK);
  67         BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_MAX_CMDS);
  68 }
  69
  70 /* AFU defines a fixed size of 4K for command buffers (borrow 4K page define) */
  71 #define CMD_BUFSIZE     SIZE_4K
  72
  73 enum cxlflash_lr_state {
  74         LINK_RESET_INVALID,
  75         LINK_RESET_REQUIRED,
  76         LINK_RESET_COMPLETE
  77 };
  78
  79 enum cxlflash_init_state {
  80         INIT_STATE_NONE,
  81         INIT_STATE_PCI,
  82         INIT_STATE_AFU,
  83         INIT_STATE_SCSI
  84 };
  85
  86 enum cxlflash_state {
  87         STATE_PROBING,  /* Initial state during probe */
  88         STATE_PROBED,   /* Temporary state, probe completed but EEH occurred */
  89         STATE_NORMAL,   /* Normal running state, everything good */
  90         STATE_RESET,    /* Reset state, trying to reset/recover */
  91         STATE_FAILTERM  /* Failed/terminating state, error out users/threads */
  92 };
  93
  94 /*
  95  * Each context has its own set of resource handles that is visible
  96  * only from that context.
  97  */
  98
  99 struct cxlflash_cfg {
 100         struct afu *afu;
 101         struct cxl_context *mcctx;
 102
 103         struct pci_dev *dev;
 104         struct pci_device_id *dev_id;
 105         struct Scsi_Host *host;
 106         int num_fc_ports;
 107
 108         ulong cxlflash_regs_pci;
 109
 110         struct work_struct work_q;
 111         enum cxlflash_init_state init_state;
 112         enum cxlflash_lr_state lr_state;
 113         int lr_port;
 114         atomic_t scan_host_needed;
 115
 116         struct cxl_afu *cxl_afu;
 117
 118         atomic_t recovery_threads;
 119         struct mutex ctx_recovery_mutex;
 120         struct mutex ctx_tbl_list_mutex;
 121         struct rw_semaphore ioctl_rwsem;
 122         struct ctx_info *ctx_tbl[MAX_CONTEXT];
 123         struct list_head ctx_err_recovery; /* contexts w/ recovery pending */
 124         struct file_operations cxl_fops;
 125
 126         /* Parameters that are LUN table related */
 127         int last_lun_index[MAX_FC_PORTS];
 128         int promote_lun_index;
 129         struct list_head lluns; /* list of llun_info structs */
 130
 131         wait_queue_head_t tmf_waitq;
 132         spinlock_t tmf_slock;
 133         bool tmf_active;
 134         wait_queue_head_t reset_waitq;
 135         enum cxlflash_state state;
 136 };
 137
 138 struct afu_cmd {
 139         struct sisl_ioarcb rcb; /* IOARCB (cache line aligned) */
 140         struct sisl_ioasa sa;   /* IOASA must follow IOARCB */
 141         struct afu *parent;
 142         struct scsi_cmnd *scp;
 143         struct completion cevent;
 144         struct list_head queue;
 145
 146         u8 cmd_tmf:1;
 147
 148         /* As per the SISLITE spec the IOARCB EA has to be 16-byte aligned.
 149          * However for performance reasons the IOARCB/IOASA should be
 150          * cache line aligned.
 151          */
 152 } __aligned(cache_line_size());
 153
 154 static inline struct afu_cmd *sc_to_afuc(struct scsi_cmnd *sc)
 155 {
 156         return PTR_ALIGN(scsi_cmd_priv(sc), __alignof__(struct afu_cmd));
 157 }
 158
 159 static inline struct afu_cmd *sc_to_afucz(struct scsi_cmnd *sc)
 160 {
 161         struct afu_cmd *afuc = sc_to_afuc(sc);
 162
 163         memset(afuc, 0, sizeof(*afuc));
 164         return afuc;
 165 }
 166
 167 struct afu {
 168         /* Stuff requiring alignment go first. */
 169         struct sisl_ioarcb sq[NUM_SQ_ENTRY];            /* 16K SQ */
 170         u64 rrq_entry[NUM_RRQ_ENTRY];                   /* 2K RRQ */
 171
 172         /* Beware of alignment till here. Preferably introduce new
 173          * fields after this point
 174          */
 175
 176         int (*send_cmd)(struct afu *, struct afu_cmd *);
 177         void (*context_reset)(struct afu_cmd *);
 178
 179         /* AFU HW */
 180         struct cxl_ioctl_start_work work;
 181         struct cxlflash_afu_map __iomem *afu_map;       /* entire MMIO map */
 182         struct sisl_host_map __iomem *host_map;         /* MC host map */
 183         struct sisl_ctrl_map __iomem *ctrl_map;         /* MC control map */
 184
 185         ctx_hndl_t ctx_hndl;    /* master's context handle */
 186
 187         atomic_t hsq_credits;
 188         spinlock_t hsq_slock;
 189         struct sisl_ioarcb *hsq_start;
 190         struct sisl_ioarcb *hsq_end;
 191         struct sisl_ioarcb *hsq_curr;
 192         spinlock_t hrrq_slock;
 193         u64 *hrrq_start;
 194         u64 *hrrq_end;
 195         u64 *hrrq_curr;
 196         bool toggle;
 197         atomic_t cmds_active;   /* Number of currently active AFU commands */
 198         s64 room;
 199         spinlock_t rrin_slock; /* Lock to rrin queuing and cmd_room updates */
 200         u64 hb;
 201         u32 internal_lun;       /* User-desired LUN mode for this AFU */
 202
 203         char version[16];
 204         u64 interface_version;
 205
 206         u32 irqpoll_weight;
 207         struct irq_poll irqpoll;
 208         struct cxlflash_cfg *parent; /* Pointer back to parent cxlflash_cfg */
 209
 210 };
 211
 212 static inline bool afu_is_irqpoll_enabled(struct afu *afu)
 213 {
 214         return !!afu->irqpoll_weight;
 215 }
 216
 217 static inline bool afu_is_cmd_mode(struct afu *afu, u64 cmd_mode)
 218 {
 219         u64 afu_cap = afu->interface_version >> SISL_INTVER_CAP_SHIFT;
 220
 221         return afu_cap & cmd_mode;
 222 }
 223
 224 static inline bool afu_is_sq_cmd_mode(struct afu *afu)
 225 {
 226         return afu_is_cmd_mode(afu, SISL_INTVER_CAP_SQ_CMD_MODE);
 227 }
 228
 229 static inline bool afu_is_ioarrin_cmd_mode(struct afu *afu)
 230 {
 231         return afu_is_cmd_mode(afu, SISL_INTVER_CAP_IOARRIN_CMD_MODE);
 232 }
 233
 234 static inline u64 lun_to_lunid(u64 lun)
 235 {
 236         __be64 lun_id;
 237
 238         int_to_scsilun(lun, (struct scsi_lun *)&lun_id);
 239         return be64_to_cpu(lun_id);
 240 }
 241
 242 static inline struct fc_port_bank __iomem *get_fc_port_bank(
 243                                             struct cxlflash_cfg *cfg, int i)
 244 {
 245         struct afu *afu = cfg->afu;
 246
 247         return &afu->afu_map->global.bank[CHAN2PORTBANK(i)];
 248 }
 249
 250 static inline __be64 __iomem *get_fc_port_regs(struct cxlflash_cfg *cfg, int i)
 251 {
 252         struct fc_port_bank __iomem *fcpb = get_fc_port_bank(cfg, i);
 253
 254         return &fcpb->fc_port_regs[CHAN2BANKPORT(i)][0];
 255 }
 256
 257 static inline __be64 __iomem *get_fc_port_luns(struct cxlflash_cfg *cfg, int i)
 258 {
 259         struct fc_port_bank __iomem *fcpb = get_fc_port_bank(cfg, i);
 260
 261         return &fcpb->fc_port_luns[CHAN2BANKPORT(i)][0];
 262 }
 263
 264 int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t c, res_hndl_t r, u8 mode);
 265 void cxlflash_list_init(void);
 266 void cxlflash_term_global_luns(void);
 267 void cxlflash_free_errpage(void);
 268 int cxlflash_ioctl(struct scsi_device *sdev, int cmd, void __user *arg);
 269 void cxlflash_stop_term_user_contexts(struct cxlflash_cfg *cfg);
 270 int cxlflash_mark_contexts_error(struct cxlflash_cfg *cfg);
 271 void cxlflash_term_local_luns(struct cxlflash_cfg *cfg);
 272 void cxlflash_restore_luntable(struct cxlflash_cfg *cfg);
 273
 274 #endif /* ifndef _CXLFLASH_COMMON_H */