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scsi: cxlflash: Reset hardware queue context via specified register
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1 /*
2 * CXL Flash Device Driver
3 *
4 * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
5 * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
6 *
7 * Copyright (C) 2015 IBM Corporation
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15 #include <linux/delay.h>
16 #include <linux/list.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19
20 #include <asm/unaligned.h>
21
22 #include <misc/cxl.h>
23
24 #include <scsi/scsi_cmnd.h>
25 #include <scsi/scsi_host.h>
26 #include <uapi/scsi/cxlflash_ioctl.h>
27
28 #include "main.h"
29 #include "sislite.h"
30 #include "common.h"
31
32 MODULE_DESCRIPTION(CXLFLASH_ADAPTER_NAME);
33 MODULE_AUTHOR("Manoj N. Kumar <manoj@linux.vnet.ibm.com>");
34 MODULE_AUTHOR("Matthew R. Ochs <mrochs@linux.vnet.ibm.com>");
35 MODULE_LICENSE("GPL");
36
37 /**
38 * process_cmd_err() - command error handler
39 * @cmd: AFU command that experienced the error.
40 * @scp: SCSI command associated with the AFU command in error.
41 *
42 * Translates error bits from AFU command to SCSI command results.
43 */
44 static void process_cmd_err(struct afu_cmd *cmd, struct scsi_cmnd *scp)
45 {
46 struct afu *afu = cmd->parent;
47 struct cxlflash_cfg *cfg = afu->parent;
48 struct device *dev = &cfg->dev->dev;
49 struct sisl_ioarcb *ioarcb;
50 struct sisl_ioasa *ioasa;
51 u32 resid;
52
53 if (unlikely(!cmd))
54 return;
55
56 ioarcb = &(cmd->rcb);
57 ioasa = &(cmd->sa);
58
59 if (ioasa->rc.flags & SISL_RC_FLAGS_UNDERRUN) {
60 resid = ioasa->resid;
61 scsi_set_resid(scp, resid);
62 dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p, resid = %d\n",
63 __func__, cmd, scp, resid);
64 }
65
66 if (ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN) {
67 dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p\n",
68 __func__, cmd, scp);
69 scp->result = (DID_ERROR << 16);
70 }
71
72 dev_dbg(dev, "%s: cmd failed afu_rc=%02x scsi_rc=%02x fc_rc=%02x "
73 "afu_extra=%02x scsi_extra=%02x fc_extra=%02x\n", __func__,
74 ioasa->rc.afu_rc, ioasa->rc.scsi_rc, ioasa->rc.fc_rc,
75 ioasa->afu_extra, ioasa->scsi_extra, ioasa->fc_extra);
76
77 if (ioasa->rc.scsi_rc) {
78 /* We have a SCSI status */
79 if (ioasa->rc.flags & SISL_RC_FLAGS_SENSE_VALID) {
80 memcpy(scp->sense_buffer, ioasa->sense_data,
81 SISL_SENSE_DATA_LEN);
82 scp->result = ioasa->rc.scsi_rc;
83 } else
84 scp->result = ioasa->rc.scsi_rc | (DID_ERROR << 16);
85 }
86
87 /*
88 * We encountered an error. Set scp->result based on nature
89 * of error.
90 */
91 if (ioasa->rc.fc_rc) {
92 /* We have an FC status */
93 switch (ioasa->rc.fc_rc) {
94 case SISL_FC_RC_LINKDOWN:
95 scp->result = (DID_REQUEUE << 16);
96 break;
97 case SISL_FC_RC_RESID:
98 /* This indicates an FCP resid underrun */
99 if (!(ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN)) {
100 /* If the SISL_RC_FLAGS_OVERRUN flag was set,
101 * then we will handle this error else where.
102 * If not then we must handle it here.
103 * This is probably an AFU bug.
104 */
105 scp->result = (DID_ERROR << 16);
106 }
107 break;
108 case SISL_FC_RC_RESIDERR:
109 /* Resid mismatch between adapter and device */
110 case SISL_FC_RC_TGTABORT:
111 case SISL_FC_RC_ABORTOK:
112 case SISL_FC_RC_ABORTFAIL:
113 case SISL_FC_RC_NOLOGI:
114 case SISL_FC_RC_ABORTPEND:
115 case SISL_FC_RC_WRABORTPEND:
116 case SISL_FC_RC_NOEXP:
117 case SISL_FC_RC_INUSE:
118 scp->result = (DID_ERROR << 16);
119 break;
120 }
121 }
122
123 if (ioasa->rc.afu_rc) {
124 /* We have an AFU error */
125 switch (ioasa->rc.afu_rc) {
126 case SISL_AFU_RC_NO_CHANNELS:
127 scp->result = (DID_NO_CONNECT << 16);
128 break;
129 case SISL_AFU_RC_DATA_DMA_ERR:
130 switch (ioasa->afu_extra) {
131 case SISL_AFU_DMA_ERR_PAGE_IN:
132 /* Retry */
133 scp->result = (DID_IMM_RETRY << 16);
134 break;
135 case SISL_AFU_DMA_ERR_INVALID_EA:
136 default:
137 scp->result = (DID_ERROR << 16);
138 }
139 break;
140 case SISL_AFU_RC_OUT_OF_DATA_BUFS:
141 /* Retry */
142 scp->result = (DID_ALLOC_FAILURE << 16);
143 break;
144 default:
145 scp->result = (DID_ERROR << 16);
146 }
147 }
148 }
149
150 /**
151 * cmd_complete() - command completion handler
152 * @cmd: AFU command that has completed.
153 *
154 * Prepares and submits command that has either completed or timed out to
155 * the SCSI stack. Checks AFU command back into command pool for non-internal
156 * (cmd->scp populated) commands.
157 */
158 static void cmd_complete(struct afu_cmd *cmd)
159 {
160 struct scsi_cmnd *scp;
161 ulong lock_flags;
162 struct afu *afu = cmd->parent;
163 struct cxlflash_cfg *cfg = afu->parent;
164 struct device *dev = &cfg->dev->dev;
165 bool cmd_is_tmf;
166
167 if (cmd->scp) {
168 scp = cmd->scp;
169 if (unlikely(cmd->sa.ioasc))
170 process_cmd_err(cmd, scp);
171 else
172 scp->result = (DID_OK << 16);
173
174 cmd_is_tmf = cmd->cmd_tmf;
175
176 dev_dbg_ratelimited(dev, "%s:scp=%p result=%08x ioasc=%08x\n",
177 __func__, scp, scp->result, cmd->sa.ioasc);
178
179 scp->scsi_done(scp);
180
181 if (cmd_is_tmf) {
182 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
183 cfg->tmf_active = false;
184 wake_up_all_locked(&cfg->tmf_waitq);
185 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
186 }
187 } else
188 complete(&cmd->cevent);
189 }
190
191 /**
192 * context_reset() - reset context via specified register
193 * @hwq: Hardware queue owning the context to be reset.
194 * @reset_reg: MMIO register to perform reset.
195 *
196 * Return: 0 on success, -errno on failure
197 */
198 static int context_reset(struct hwq *hwq, __be64 __iomem *reset_reg)
199 {
200 struct cxlflash_cfg *cfg = hwq->afu->parent;
201 struct device *dev = &cfg->dev->dev;
202 int rc = -ETIMEDOUT;
203 int nretry = 0;
204 u64 val = 0x1;
205
206 dev_dbg(dev, "%s: hwq=%p\n", __func__, hwq);
207
208 writeq_be(val, reset_reg);
209 do {
210 val = readq_be(reset_reg);
211 if ((val & 0x1) == 0x0) {
212 rc = 0;
213 break;
214 }
215
216 /* Double delay each time */
217 udelay(1 << nretry);
218 } while (nretry++ < MC_ROOM_RETRY_CNT);
219
220 dev_dbg(dev, "%s: returning rc=%d, val=%016llx nretry=%d\n",
221 __func__, rc, val, nretry);
222 return rc;
223 }
224
225 /**
226 * context_reset_ioarrin() - reset context via IOARRIN register
227 * @hwq: Hardware queue owning the context to be reset.
228 *
229 * Return: 0 on success, -errno on failure
230 */
231 static int context_reset_ioarrin(struct hwq *hwq)
232 {
233 return context_reset(hwq, &hwq->host_map->ioarrin);
234 }
235
236 /**
237 * context_reset_sq() - reset context via SQ_CONTEXT_RESET register
238 * @hwq: Hardware queue owning the context to be reset.
239 *
240 * Return: 0 on success, -errno on failure
241 */
242 static int context_reset_sq(struct hwq *hwq)
243 {
244 return context_reset(hwq, &hwq->host_map->sq_ctx_reset);
245 }
246
247 /**
248 * send_cmd_ioarrin() - sends an AFU command via IOARRIN register
249 * @afu: AFU associated with the host.
250 * @cmd: AFU command to send.
251 *
252 * Return:
253 * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
254 */
255 static int send_cmd_ioarrin(struct afu *afu, struct afu_cmd *cmd)
256 {
257 struct cxlflash_cfg *cfg = afu->parent;
258 struct device *dev = &cfg->dev->dev;
259 struct hwq *hwq = get_hwq(afu, cmd->hwq_index);
260 int rc = 0;
261 s64 room;
262 ulong lock_flags;
263
264 /*
265 * To avoid the performance penalty of MMIO, spread the update of
266 * 'room' over multiple commands.
267 */
268 spin_lock_irqsave(&hwq->hsq_slock, lock_flags);
269 if (--hwq->room < 0) {
270 room = readq_be(&hwq->host_map->cmd_room);
271 if (room <= 0) {
272 dev_dbg_ratelimited(dev, "%s: no cmd_room to send "
273 "0x%02X, room=0x%016llX\n",
274 __func__, cmd->rcb.cdb[0], room);
275 hwq->room = 0;
276 rc = SCSI_MLQUEUE_HOST_BUSY;
277 goto out;
278 }
279 hwq->room = room - 1;
280 }
281
282 writeq_be((u64)&cmd->rcb, &hwq->host_map->ioarrin);
283 out:
284 spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags);
285 dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx rc=%d\n", __func__,
286 cmd, cmd->rcb.data_len, cmd->rcb.data_ea, rc);
287 return rc;
288 }
289
290 /**
291 * send_cmd_sq() - sends an AFU command via SQ ring
292 * @afu: AFU associated with the host.
293 * @cmd: AFU command to send.
294 *
295 * Return:
296 * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
297 */
298 static int send_cmd_sq(struct afu *afu, struct afu_cmd *cmd)
299 {
300 struct cxlflash_cfg *cfg = afu->parent;
301 struct device *dev = &cfg->dev->dev;
302 struct hwq *hwq = get_hwq(afu, cmd->hwq_index);
303 int rc = 0;
304 int newval;
305 ulong lock_flags;
306
307 newval = atomic_dec_if_positive(&hwq->hsq_credits);
308 if (newval <= 0) {
309 rc = SCSI_MLQUEUE_HOST_BUSY;
310 goto out;
311 }
312
313 cmd->rcb.ioasa = &cmd->sa;
314
315 spin_lock_irqsave(&hwq->hsq_slock, lock_flags);
316
317 *hwq->hsq_curr = cmd->rcb;
318 if (hwq->hsq_curr < hwq->hsq_end)
319 hwq->hsq_curr++;
320 else
321 hwq->hsq_curr = hwq->hsq_start;
322 writeq_be((u64)hwq->hsq_curr, &hwq->host_map->sq_tail);
323
324 spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags);
325 out:
326 dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx ioasa=%p rc=%d curr=%p "
327 "head=%016llx tail=%016llx\n", __func__, cmd, cmd->rcb.data_len,
328 cmd->rcb.data_ea, cmd->rcb.ioasa, rc, hwq->hsq_curr,
329 readq_be(&hwq->host_map->sq_head),
330 readq_be(&hwq->host_map->sq_tail));
331 return rc;
332 }
333
334 /**
335 * wait_resp() - polls for a response or timeout to a sent AFU command
336 * @afu: AFU associated with the host.
337 * @cmd: AFU command that was sent.
338 *
339 * Return: 0 on success, -errno on failure
340 */
341 static int wait_resp(struct afu *afu, struct afu_cmd *cmd)
342 {
343 struct cxlflash_cfg *cfg = afu->parent;
344 struct device *dev = &cfg->dev->dev;
345 int rc = 0;
346 ulong timeout = msecs_to_jiffies(cmd->rcb.timeout * 2 * 1000);
347
348 timeout = wait_for_completion_timeout(&cmd->cevent, timeout);
349 if (!timeout)
350 rc = -ETIMEDOUT;
351
352 if (unlikely(cmd->sa.ioasc != 0)) {
353 dev_err(dev, "%s: cmd %02x failed, ioasc=%08x\n",
354 __func__, cmd->rcb.cdb[0], cmd->sa.ioasc);
355 rc = -EIO;
356 }
357
358 return rc;
359 }
360
361 /**
362 * cmd_to_target_hwq() - selects a target hardware queue for a SCSI command
363 * @host: SCSI host associated with device.
364 * @scp: SCSI command to send.
365 * @afu: SCSI command to send.
366 *
367 * Hashes a command based upon the hardware queue mode.
368 *
369 * Return: Trusted index of target hardware queue
370 */
371 static u32 cmd_to_target_hwq(struct Scsi_Host *host, struct scsi_cmnd *scp,
372 struct afu *afu)
373 {
374 u32 tag;
375 u32 hwq = 0;
376
377 if (afu->num_hwqs == 1)
378 return 0;
379
380 switch (afu->hwq_mode) {
381 case HWQ_MODE_RR:
382 hwq = afu->hwq_rr_count++ % afu->num_hwqs;
383 break;
384 case HWQ_MODE_TAG:
385 tag = blk_mq_unique_tag(scp->request);
386 hwq = blk_mq_unique_tag_to_hwq(tag);
387 break;
388 case HWQ_MODE_CPU:
389 hwq = smp_processor_id() % afu->num_hwqs;
390 break;
391 default:
392 WARN_ON_ONCE(1);
393 }
394
395 return hwq;
396 }
397
398 /**
399 * send_tmf() - sends a Task Management Function (TMF)
400 * @afu: AFU to checkout from.
401 * @scp: SCSI command from stack.
402 * @tmfcmd: TMF command to send.
403 *
404 * Return:
405 * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
406 */
407 static int send_tmf(struct afu *afu, struct scsi_cmnd *scp, u64 tmfcmd)
408 {
409 struct Scsi_Host *host = scp->device->host;
410 struct cxlflash_cfg *cfg = shost_priv(host);
411 struct afu_cmd *cmd = sc_to_afucz(scp);
412 struct device *dev = &cfg->dev->dev;
413 int hwq_index = cmd_to_target_hwq(host, scp, afu);
414 struct hwq *hwq = get_hwq(afu, hwq_index);
415 ulong lock_flags;
416 int rc = 0;
417 ulong to;
418
419 /* When Task Management Function is active do not send another */
420 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
421 if (cfg->tmf_active)
422 wait_event_interruptible_lock_irq(cfg->tmf_waitq,
423 !cfg->tmf_active,
424 cfg->tmf_slock);
425 cfg->tmf_active = true;
426 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
427
428 cmd->scp = scp;
429 cmd->parent = afu;
430 cmd->cmd_tmf = true;
431 cmd->hwq_index = hwq_index;
432
433 cmd->rcb.ctx_id = hwq->ctx_hndl;
434 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
435 cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel);
436 cmd->rcb.lun_id = lun_to_lunid(scp->device->lun);
437 cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID |
438 SISL_REQ_FLAGS_SUP_UNDERRUN |
439 SISL_REQ_FLAGS_TMF_CMD);
440 memcpy(cmd->rcb.cdb, &tmfcmd, sizeof(tmfcmd));
441
442 rc = afu->send_cmd(afu, cmd);
443 if (unlikely(rc)) {
444 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
445 cfg->tmf_active = false;
446 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
447 goto out;
448 }
449
450 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
451 to = msecs_to_jiffies(5000);
452 to = wait_event_interruptible_lock_irq_timeout(cfg->tmf_waitq,
453 !cfg->tmf_active,
454 cfg->tmf_slock,
455 to);
456 if (!to) {
457 cfg->tmf_active = false;
458 dev_err(dev, "%s: TMF timed out\n", __func__);
459 rc = -1;
460 }
461 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
462 out:
463 return rc;
464 }
465
466 /**
467 * cxlflash_driver_info() - information handler for this host driver
468 * @host: SCSI host associated with device.
469 *
470 * Return: A string describing the device.
471 */
472 static const char *cxlflash_driver_info(struct Scsi_Host *host)
473 {
474 return CXLFLASH_ADAPTER_NAME;
475 }
476
477 /**
478 * cxlflash_queuecommand() - sends a mid-layer request
479 * @host: SCSI host associated with device.
480 * @scp: SCSI command to send.
481 *
482 * Return: 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
483 */
484 static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp)
485 {
486 struct cxlflash_cfg *cfg = shost_priv(host);
487 struct afu *afu = cfg->afu;
488 struct device *dev = &cfg->dev->dev;
489 struct afu_cmd *cmd = sc_to_afucz(scp);
490 struct scatterlist *sg = scsi_sglist(scp);
491 int hwq_index = cmd_to_target_hwq(host, scp, afu);
492 struct hwq *hwq = get_hwq(afu, hwq_index);
493 u16 req_flags = SISL_REQ_FLAGS_SUP_UNDERRUN;
494 ulong lock_flags;
495 int rc = 0;
496
497 dev_dbg_ratelimited(dev, "%s: (scp=%p) %d/%d/%d/%llu "
498 "cdb=(%08x-%08x-%08x-%08x)\n",
499 __func__, scp, host->host_no, scp->device->channel,
500 scp->device->id, scp->device->lun,
501 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
502 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
503 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
504 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
505
506 /*
507 * If a Task Management Function is active, wait for it to complete
508 * before continuing with regular commands.
509 */
510 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
511 if (cfg->tmf_active) {
512 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
513 rc = SCSI_MLQUEUE_HOST_BUSY;
514 goto out;
515 }
516 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
517
518 switch (cfg->state) {
519 case STATE_PROBING:
520 case STATE_PROBED:
521 case STATE_RESET:
522 dev_dbg_ratelimited(dev, "%s: device is in reset\n", __func__);
523 rc = SCSI_MLQUEUE_HOST_BUSY;
524 goto out;
525 case STATE_FAILTERM:
526 dev_dbg_ratelimited(dev, "%s: device has failed\n", __func__);
527 scp->result = (DID_NO_CONNECT << 16);
528 scp->scsi_done(scp);
529 rc = 0;
530 goto out;
531 default:
532 break;
533 }
534
535 if (likely(sg)) {
536 cmd->rcb.data_len = sg->length;
537 cmd->rcb.data_ea = (uintptr_t)sg_virt(sg);
538 }
539
540 cmd->scp = scp;
541 cmd->parent = afu;
542 cmd->hwq_index = hwq_index;
543
544 cmd->rcb.ctx_id = hwq->ctx_hndl;
545 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
546 cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel);
547 cmd->rcb.lun_id = lun_to_lunid(scp->device->lun);
548
549 if (scp->sc_data_direction == DMA_TO_DEVICE)
550 req_flags |= SISL_REQ_FLAGS_HOST_WRITE;
551
552 cmd->rcb.req_flags = req_flags;
553 memcpy(cmd->rcb.cdb, scp->cmnd, sizeof(cmd->rcb.cdb));
554
555 rc = afu->send_cmd(afu, cmd);
556 out:
557 return rc;
558 }
559
560 /**
561 * cxlflash_wait_for_pci_err_recovery() - wait for error recovery during probe
562 * @cfg: Internal structure associated with the host.
563 */
564 static void cxlflash_wait_for_pci_err_recovery(struct cxlflash_cfg *cfg)
565 {
566 struct pci_dev *pdev = cfg->dev;
567
568 if (pci_channel_offline(pdev))
569 wait_event_timeout(cfg->reset_waitq,
570 !pci_channel_offline(pdev),
571 CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT);
572 }
573
574 /**
575 * free_mem() - free memory associated with the AFU
576 * @cfg: Internal structure associated with the host.
577 */
578 static void free_mem(struct cxlflash_cfg *cfg)
579 {
580 struct afu *afu = cfg->afu;
581
582 if (cfg->afu) {
583 free_pages((ulong)afu, get_order(sizeof(struct afu)));
584 cfg->afu = NULL;
585 }
586 }
587
588 /**
589 * stop_afu() - stops the AFU command timers and unmaps the MMIO space
590 * @cfg: Internal structure associated with the host.
591 *
592 * Safe to call with AFU in a partially allocated/initialized state.
593 *
594 * Cancels scheduled worker threads, waits for any active internal AFU
595 * commands to timeout, disables IRQ polling and then unmaps the MMIO space.
596 */
597 static void stop_afu(struct cxlflash_cfg *cfg)
598 {
599 struct afu *afu = cfg->afu;
600 struct hwq *hwq;
601 int i;
602
603 cancel_work_sync(&cfg->work_q);
604
605 if (likely(afu)) {
606 while (atomic_read(&afu->cmds_active))
607 ssleep(1);
608
609 if (afu_is_irqpoll_enabled(afu)) {
610 for (i = 0; i < afu->num_hwqs; i++) {
611 hwq = get_hwq(afu, i);
612
613 irq_poll_disable(&hwq->irqpoll);
614 }
615 }
616
617 if (likely(afu->afu_map)) {
618 cxl_psa_unmap((void __iomem *)afu->afu_map);
619 afu->afu_map = NULL;
620 }
621 }
622 }
623
624 /**
625 * term_intr() - disables all AFU interrupts
626 * @cfg: Internal structure associated with the host.
627 * @level: Depth of allocation, where to begin waterfall tear down.
628 * @index: Index of the hardware queue.
629 *
630 * Safe to call with AFU/MC in partially allocated/initialized state.
631 */
632 static void term_intr(struct cxlflash_cfg *cfg, enum undo_level level,
633 u32 index)
634 {
635 struct afu *afu = cfg->afu;
636 struct device *dev = &cfg->dev->dev;
637 struct hwq *hwq;
638
639 if (!afu) {
640 dev_err(dev, "%s: returning with NULL afu\n", __func__);
641 return;
642 }
643
644 hwq = get_hwq(afu, index);
645
646 if (!hwq->ctx) {
647 dev_err(dev, "%s: returning with NULL MC\n", __func__);
648 return;
649 }
650
651 switch (level) {
652 case UNMAP_THREE:
653 /* SISL_MSI_ASYNC_ERROR is setup only for the primary HWQ */
654 if (index == PRIMARY_HWQ)
655 cxl_unmap_afu_irq(hwq->ctx, 3, hwq);
656 case UNMAP_TWO:
657 cxl_unmap_afu_irq(hwq->ctx, 2, hwq);
658 case UNMAP_ONE:
659 cxl_unmap_afu_irq(hwq->ctx, 1, hwq);
660 case FREE_IRQ:
661 cxl_free_afu_irqs(hwq->ctx);
662 /* fall through */
663 case UNDO_NOOP:
664 /* No action required */
665 break;
666 }
667 }
668
669 /**
670 * term_mc() - terminates the master context
671 * @cfg: Internal structure associated with the host.
672 * @index: Index of the hardware queue.
673 *
674 * Safe to call with AFU/MC in partially allocated/initialized state.
675 */
676 static void term_mc(struct cxlflash_cfg *cfg, u32 index)
677 {
678 struct afu *afu = cfg->afu;
679 struct device *dev = &cfg->dev->dev;
680 struct hwq *hwq;
681
682 if (!afu) {
683 dev_err(dev, "%s: returning with NULL afu\n", __func__);
684 return;
685 }
686
687 hwq = get_hwq(afu, index);
688
689 if (!hwq->ctx) {
690 dev_err(dev, "%s: returning with NULL MC\n", __func__);
691 return;
692 }
693
694 WARN_ON(cxl_stop_context(hwq->ctx));
695 if (index != PRIMARY_HWQ)
696 WARN_ON(cxl_release_context(hwq->ctx));
697 hwq->ctx = NULL;
698 }
699
700 /**
701 * term_afu() - terminates the AFU
702 * @cfg: Internal structure associated with the host.
703 *
704 * Safe to call with AFU/MC in partially allocated/initialized state.
705 */
706 static void term_afu(struct cxlflash_cfg *cfg)
707 {
708 struct device *dev = &cfg->dev->dev;
709 int k;
710
711 /*
712 * Tear down is carefully orchestrated to ensure
713 * no interrupts can come in when the problem state
714 * area is unmapped.
715 *
716 * 1) Disable all AFU interrupts for each master
717 * 2) Unmap the problem state area
718 * 3) Stop each master context
719 */
720 for (k = cfg->afu->num_hwqs - 1; k >= 0; k--)
721 term_intr(cfg, UNMAP_THREE, k);
722
723 if (cfg->afu)
724 stop_afu(cfg);
725
726 for (k = cfg->afu->num_hwqs - 1; k >= 0; k--)
727 term_mc(cfg, k);
728
729 dev_dbg(dev, "%s: returning\n", __func__);
730 }
731
732 /**
733 * notify_shutdown() - notifies device of pending shutdown
734 * @cfg: Internal structure associated with the host.
735 * @wait: Whether to wait for shutdown processing to complete.
736 *
737 * This function will notify the AFU that the adapter is being shutdown
738 * and will wait for shutdown processing to complete if wait is true.
739 * This notification should flush pending I/Os to the device and halt
740 * further I/Os until the next AFU reset is issued and device restarted.
741 */
742 static void notify_shutdown(struct cxlflash_cfg *cfg, bool wait)
743 {
744 struct afu *afu = cfg->afu;
745 struct device *dev = &cfg->dev->dev;
746 struct dev_dependent_vals *ddv;
747 __be64 __iomem *fc_port_regs;
748 u64 reg, status;
749 int i, retry_cnt = 0;
750
751 ddv = (struct dev_dependent_vals *)cfg->dev_id->driver_data;
752 if (!(ddv->flags & CXLFLASH_NOTIFY_SHUTDOWN))
753 return;
754
755 if (!afu || !afu->afu_map) {
756 dev_dbg(dev, "%s: Problem state area not mapped\n", __func__);
757 return;
758 }
759
760 /* Notify AFU */
761 for (i = 0; i < cfg->num_fc_ports; i++) {
762 fc_port_regs = get_fc_port_regs(cfg, i);
763
764 reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]);
765 reg |= SISL_FC_SHUTDOWN_NORMAL;
766 writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]);
767 }
768
769 if (!wait)
770 return;
771
772 /* Wait up to 1.5 seconds for shutdown processing to complete */
773 for (i = 0; i < cfg->num_fc_ports; i++) {
774 fc_port_regs = get_fc_port_regs(cfg, i);
775 retry_cnt = 0;
776
777 while (true) {
778 status = readq_be(&fc_port_regs[FC_STATUS / 8]);
779 if (status & SISL_STATUS_SHUTDOWN_COMPLETE)
780 break;
781 if (++retry_cnt >= MC_RETRY_CNT) {
782 dev_dbg(dev, "%s: port %d shutdown processing "
783 "not yet completed\n", __func__, i);
784 break;
785 }
786 msleep(100 * retry_cnt);
787 }
788 }
789 }
790
791 /**
792 * cxlflash_remove() - PCI entry point to tear down host
793 * @pdev: PCI device associated with the host.
794 *
795 * Safe to use as a cleanup in partially allocated/initialized state. Note that
796 * the reset_waitq is flushed as part of the stop/termination of user contexts.
797 */
798 static void cxlflash_remove(struct pci_dev *pdev)
799 {
800 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
801 struct device *dev = &pdev->dev;
802 ulong lock_flags;
803
804 if (!pci_is_enabled(pdev)) {
805 dev_dbg(dev, "%s: Device is disabled\n", __func__);
806 return;
807 }
808
809 /* If a Task Management Function is active, wait for it to complete
810 * before continuing with remove.
811 */
812 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
813 if (cfg->tmf_active)
814 wait_event_interruptible_lock_irq(cfg->tmf_waitq,
815 !cfg->tmf_active,
816 cfg->tmf_slock);
817 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
818
819 /* Notify AFU and wait for shutdown processing to complete */
820 notify_shutdown(cfg, true);
821
822 cfg->state = STATE_FAILTERM;
823 cxlflash_stop_term_user_contexts(cfg);
824
825 switch (cfg->init_state) {
826 case INIT_STATE_SCSI:
827 cxlflash_term_local_luns(cfg);
828 scsi_remove_host(cfg->host);
829 case INIT_STATE_AFU:
830 term_afu(cfg);
831 case INIT_STATE_PCI:
832 pci_disable_device(pdev);
833 case INIT_STATE_NONE:
834 free_mem(cfg);
835 scsi_host_put(cfg->host);
836 break;
837 }
838
839 dev_dbg(dev, "%s: returning\n", __func__);
840 }
841
842 /**
843 * alloc_mem() - allocates the AFU and its command pool
844 * @cfg: Internal structure associated with the host.
845 *
846 * A partially allocated state remains on failure.
847 *
848 * Return:
849 * 0 on success
850 * -ENOMEM on failure to allocate memory
851 */
852 static int alloc_mem(struct cxlflash_cfg *cfg)
853 {
854 int rc = 0;
855 struct device *dev = &cfg->dev->dev;
856
857 /* AFU is ~28k, i.e. only one 64k page or up to seven 4k pages */
858 cfg->afu = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
859 get_order(sizeof(struct afu)));
860 if (unlikely(!cfg->afu)) {
861 dev_err(dev, "%s: cannot get %d free pages\n",
862 __func__, get_order(sizeof(struct afu)));
863 rc = -ENOMEM;
864 goto out;
865 }
866 cfg->afu->parent = cfg;
867 cfg->afu->desired_hwqs = CXLFLASH_DEF_HWQS;
868 cfg->afu->afu_map = NULL;
869 out:
870 return rc;
871 }
872
873 /**
874 * init_pci() - initializes the host as a PCI device
875 * @cfg: Internal structure associated with the host.
876 *
877 * Return: 0 on success, -errno on failure
878 */
879 static int init_pci(struct cxlflash_cfg *cfg)
880 {
881 struct pci_dev *pdev = cfg->dev;
882 struct device *dev = &cfg->dev->dev;
883 int rc = 0;
884
885 rc = pci_enable_device(pdev);
886 if (rc || pci_channel_offline(pdev)) {
887 if (pci_channel_offline(pdev)) {
888 cxlflash_wait_for_pci_err_recovery(cfg);
889 rc = pci_enable_device(pdev);
890 }
891
892 if (rc) {
893 dev_err(dev, "%s: Cannot enable adapter\n", __func__);
894 cxlflash_wait_for_pci_err_recovery(cfg);
895 goto out;
896 }
897 }
898
899 out:
900 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
901 return rc;
902 }
903
904 /**
905 * init_scsi() - adds the host to the SCSI stack and kicks off host scan
906 * @cfg: Internal structure associated with the host.
907 *
908 * Return: 0 on success, -errno on failure
909 */
910 static int init_scsi(struct cxlflash_cfg *cfg)
911 {
912 struct pci_dev *pdev = cfg->dev;
913 struct device *dev = &cfg->dev->dev;
914 int rc = 0;
915
916 rc = scsi_add_host(cfg->host, &pdev->dev);
917 if (rc) {
918 dev_err(dev, "%s: scsi_add_host failed rc=%d\n", __func__, rc);
919 goto out;
920 }
921
922 scsi_scan_host(cfg->host);
923
924 out:
925 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
926 return rc;
927 }
928
929 /**
930 * set_port_online() - transitions the specified host FC port to online state
931 * @fc_regs: Top of MMIO region defined for specified port.
932 *
933 * The provided MMIO region must be mapped prior to call. Online state means
934 * that the FC link layer has synced, completed the handshaking process, and
935 * is ready for login to start.
936 */
937 static void set_port_online(__be64 __iomem *fc_regs)
938 {
939 u64 cmdcfg;
940
941 cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]);
942 cmdcfg &= (~FC_MTIP_CMDCONFIG_OFFLINE); /* clear OFF_LINE */
943 cmdcfg |= (FC_MTIP_CMDCONFIG_ONLINE); /* set ON_LINE */
944 writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]);
945 }
946
947 /**
948 * set_port_offline() - transitions the specified host FC port to offline state
949 * @fc_regs: Top of MMIO region defined for specified port.
950 *
951 * The provided MMIO region must be mapped prior to call.
952 */
953 static void set_port_offline(__be64 __iomem *fc_regs)
954 {
955 u64 cmdcfg;
956
957 cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]);
958 cmdcfg &= (~FC_MTIP_CMDCONFIG_ONLINE); /* clear ON_LINE */
959 cmdcfg |= (FC_MTIP_CMDCONFIG_OFFLINE); /* set OFF_LINE */
960 writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]);
961 }
962
963 /**
964 * wait_port_online() - waits for the specified host FC port come online
965 * @fc_regs: Top of MMIO region defined for specified port.
966 * @delay_us: Number of microseconds to delay between reading port status.
967 * @nretry: Number of cycles to retry reading port status.
968 *
969 * The provided MMIO region must be mapped prior to call. This will timeout
970 * when the cable is not plugged in.
971 *
972 * Return:
973 * TRUE (1) when the specified port is online
974 * FALSE (0) when the specified port fails to come online after timeout
975 */
976 static bool wait_port_online(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry)
977 {
978 u64 status;
979
980 WARN_ON(delay_us < 1000);
981
982 do {
983 msleep(delay_us / 1000);
984 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
985 if (status == U64_MAX)
986 nretry /= 2;
987 } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_ONLINE &&
988 nretry--);
989
990 return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_ONLINE);
991 }
992
993 /**
994 * wait_port_offline() - waits for the specified host FC port go offline
995 * @fc_regs: Top of MMIO region defined for specified port.
996 * @delay_us: Number of microseconds to delay between reading port status.
997 * @nretry: Number of cycles to retry reading port status.
998 *
999 * The provided MMIO region must be mapped prior to call.
1000 *
1001 * Return:
1002 * TRUE (1) when the specified port is offline
1003 * FALSE (0) when the specified port fails to go offline after timeout
1004 */
1005 static bool wait_port_offline(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry)
1006 {
1007 u64 status;
1008
1009 WARN_ON(delay_us < 1000);
1010
1011 do {
1012 msleep(delay_us / 1000);
1013 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
1014 if (status == U64_MAX)
1015 nretry /= 2;
1016 } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_OFFLINE &&
1017 nretry--);
1018
1019 return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_OFFLINE);
1020 }
1021
1022 /**
1023 * afu_set_wwpn() - configures the WWPN for the specified host FC port
1024 * @afu: AFU associated with the host that owns the specified FC port.
1025 * @port: Port number being configured.
1026 * @fc_regs: Top of MMIO region defined for specified port.
1027 * @wwpn: The world-wide-port-number previously discovered for port.
1028 *
1029 * The provided MMIO region must be mapped prior to call. As part of the
1030 * sequence to configure the WWPN, the port is toggled offline and then back
1031 * online. This toggling action can cause this routine to delay up to a few
1032 * seconds. When configured to use the internal LUN feature of the AFU, a
1033 * failure to come online is overridden.
1034 */
1035 static void afu_set_wwpn(struct afu *afu, int port, __be64 __iomem *fc_regs,
1036 u64 wwpn)
1037 {
1038 struct cxlflash_cfg *cfg = afu->parent;
1039 struct device *dev = &cfg->dev->dev;
1040
1041 set_port_offline(fc_regs);
1042 if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1043 FC_PORT_STATUS_RETRY_CNT)) {
1044 dev_dbg(dev, "%s: wait on port %d to go offline timed out\n",
1045 __func__, port);
1046 }
1047
1048 writeq_be(wwpn, &fc_regs[FC_PNAME / 8]);
1049
1050 set_port_online(fc_regs);
1051 if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1052 FC_PORT_STATUS_RETRY_CNT)) {
1053 dev_dbg(dev, "%s: wait on port %d to go online timed out\n",
1054 __func__, port);
1055 }
1056 }
1057
1058 /**
1059 * afu_link_reset() - resets the specified host FC port
1060 * @afu: AFU associated with the host that owns the specified FC port.
1061 * @port: Port number being configured.
1062 * @fc_regs: Top of MMIO region defined for specified port.
1063 *
1064 * The provided MMIO region must be mapped prior to call. The sequence to
1065 * reset the port involves toggling it offline and then back online. This
1066 * action can cause this routine to delay up to a few seconds. An effort
1067 * is made to maintain link with the device by switching to host to use
1068 * the alternate port exclusively while the reset takes place.
1069 * failure to come online is overridden.
1070 */
1071 static void afu_link_reset(struct afu *afu, int port, __be64 __iomem *fc_regs)
1072 {
1073 struct cxlflash_cfg *cfg = afu->parent;
1074 struct device *dev = &cfg->dev->dev;
1075 u64 port_sel;
1076
1077 /* first switch the AFU to the other links, if any */
1078 port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel);
1079 port_sel &= ~(1ULL << port);
1080 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
1081 cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
1082
1083 set_port_offline(fc_regs);
1084 if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1085 FC_PORT_STATUS_RETRY_CNT))
1086 dev_err(dev, "%s: wait on port %d to go offline timed out\n",
1087 __func__, port);
1088
1089 set_port_online(fc_regs);
1090 if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1091 FC_PORT_STATUS_RETRY_CNT))
1092 dev_err(dev, "%s: wait on port %d to go online timed out\n",
1093 __func__, port);
1094
1095 /* switch back to include this port */
1096 port_sel |= (1ULL << port);
1097 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
1098 cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
1099
1100 dev_dbg(dev, "%s: returning port_sel=%016llx\n", __func__, port_sel);
1101 }
1102
1103 /**
1104 * afu_err_intr_init() - clears and initializes the AFU for error interrupts
1105 * @afu: AFU associated with the host.
1106 */
1107 static void afu_err_intr_init(struct afu *afu)
1108 {
1109 struct cxlflash_cfg *cfg = afu->parent;
1110 __be64 __iomem *fc_port_regs;
1111 int i;
1112 struct hwq *hwq = get_hwq(afu, PRIMARY_HWQ);
1113 u64 reg;
1114
1115 /* global async interrupts: AFU clears afu_ctrl on context exit
1116 * if async interrupts were sent to that context. This prevents
1117 * the AFU form sending further async interrupts when
1118 * there is
1119 * nobody to receive them.
1120 */
1121
1122 /* mask all */
1123 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_mask);
1124 /* set LISN# to send and point to primary master context */
1125 reg = ((u64) (((hwq->ctx_hndl << 8) | SISL_MSI_ASYNC_ERROR)) << 40);
1126
1127 if (afu->internal_lun)
1128 reg |= 1; /* Bit 63 indicates local lun */
1129 writeq_be(reg, &afu->afu_map->global.regs.afu_ctrl);
1130 /* clear all */
1131 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear);
1132 /* unmask bits that are of interest */
1133 /* note: afu can send an interrupt after this step */
1134 writeq_be(SISL_ASTATUS_MASK, &afu->afu_map->global.regs.aintr_mask);
1135 /* clear again in case a bit came on after previous clear but before */
1136 /* unmask */
1137 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear);
1138
1139 /* Clear/Set internal lun bits */
1140 fc_port_regs = get_fc_port_regs(cfg, 0);
1141 reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]);
1142 reg &= SISL_FC_INTERNAL_MASK;
1143 if (afu->internal_lun)
1144 reg |= ((u64)(afu->internal_lun - 1) << SISL_FC_INTERNAL_SHIFT);
1145 writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]);
1146
1147 /* now clear FC errors */
1148 for (i = 0; i < cfg->num_fc_ports; i++) {
1149 fc_port_regs = get_fc_port_regs(cfg, i);
1150
1151 writeq_be(0xFFFFFFFFU, &fc_port_regs[FC_ERROR / 8]);
1152 writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]);
1153 }
1154
1155 /* sync interrupts for master's IOARRIN write */
1156 /* note that unlike asyncs, there can be no pending sync interrupts */
1157 /* at this time (this is a fresh context and master has not written */
1158 /* IOARRIN yet), so there is nothing to clear. */
1159
1160 /* set LISN#, it is always sent to the context that wrote IOARRIN */
1161 for (i = 0; i < afu->num_hwqs; i++) {
1162 hwq = get_hwq(afu, i);
1163
1164 writeq_be(SISL_MSI_SYNC_ERROR, &hwq->host_map->ctx_ctrl);
1165 writeq_be(SISL_ISTATUS_MASK, &hwq->host_map->intr_mask);
1166 }
1167 }
1168
1169 /**
1170 * cxlflash_sync_err_irq() - interrupt handler for synchronous errors
1171 * @irq: Interrupt number.
1172 * @data: Private data provided at interrupt registration, the AFU.
1173 *
1174 * Return: Always return IRQ_HANDLED.
1175 */
1176 static irqreturn_t cxlflash_sync_err_irq(int irq, void *data)
1177 {
1178 struct hwq *hwq = (struct hwq *)data;
1179 struct cxlflash_cfg *cfg = hwq->afu->parent;
1180 struct device *dev = &cfg->dev->dev;
1181 u64 reg;
1182 u64 reg_unmasked;
1183
1184 reg = readq_be(&hwq->host_map->intr_status);
1185 reg_unmasked = (reg & SISL_ISTATUS_UNMASK);
1186
1187 if (reg_unmasked == 0UL) {
1188 dev_err(dev, "%s: spurious interrupt, intr_status=%016llx\n",
1189 __func__, reg);
1190 goto cxlflash_sync_err_irq_exit;
1191 }
1192
1193 dev_err(dev, "%s: unexpected interrupt, intr_status=%016llx\n",
1194 __func__, reg);
1195
1196 writeq_be(reg_unmasked, &hwq->host_map->intr_clear);
1197
1198 cxlflash_sync_err_irq_exit:
1199 return IRQ_HANDLED;
1200 }
1201
1202 /**
1203 * process_hrrq() - process the read-response queue
1204 * @afu: AFU associated with the host.
1205 * @doneq: Queue of commands harvested from the RRQ.
1206 * @budget: Threshold of RRQ entries to process.
1207 *
1208 * This routine must be called holding the disabled RRQ spin lock.
1209 *
1210 * Return: The number of entries processed.
1211 */
1212 static int process_hrrq(struct hwq *hwq, struct list_head *doneq, int budget)
1213 {
1214 struct afu *afu = hwq->afu;
1215 struct afu_cmd *cmd;
1216 struct sisl_ioasa *ioasa;
1217 struct sisl_ioarcb *ioarcb;
1218 bool toggle = hwq->toggle;
1219 int num_hrrq = 0;
1220 u64 entry,
1221 *hrrq_start = hwq->hrrq_start,
1222 *hrrq_end = hwq->hrrq_end,
1223 *hrrq_curr = hwq->hrrq_curr;
1224
1225 /* Process ready RRQ entries up to the specified budget (if any) */
1226 while (true) {
1227 entry = *hrrq_curr;
1228
1229 if ((entry & SISL_RESP_HANDLE_T_BIT) != toggle)
1230 break;
1231
1232 entry &= ~SISL_RESP_HANDLE_T_BIT;
1233
1234 if (afu_is_sq_cmd_mode(afu)) {
1235 ioasa = (struct sisl_ioasa *)entry;
1236 cmd = container_of(ioasa, struct afu_cmd, sa);
1237 } else {
1238 ioarcb = (struct sisl_ioarcb *)entry;
1239 cmd = container_of(ioarcb, struct afu_cmd, rcb);
1240 }
1241
1242 list_add_tail(&cmd->queue, doneq);
1243
1244 /* Advance to next entry or wrap and flip the toggle bit */
1245 if (hrrq_curr < hrrq_end)
1246 hrrq_curr++;
1247 else {
1248 hrrq_curr = hrrq_start;
1249 toggle ^= SISL_RESP_HANDLE_T_BIT;
1250 }
1251
1252 atomic_inc(&hwq->hsq_credits);
1253 num_hrrq++;
1254
1255 if (budget > 0 && num_hrrq >= budget)
1256 break;
1257 }
1258
1259 hwq->hrrq_curr = hrrq_curr;
1260 hwq->toggle = toggle;
1261
1262 return num_hrrq;
1263 }
1264
1265 /**
1266 * process_cmd_doneq() - process a queue of harvested RRQ commands
1267 * @doneq: Queue of completed commands.
1268 *
1269 * Note that upon return the queue can no longer be trusted.
1270 */
1271 static void process_cmd_doneq(struct list_head *doneq)
1272 {
1273 struct afu_cmd *cmd, *tmp;
1274
1275 WARN_ON(list_empty(doneq));
1276
1277 list_for_each_entry_safe(cmd, tmp, doneq, queue)
1278 cmd_complete(cmd);
1279 }
1280
1281 /**
1282 * cxlflash_irqpoll() - process a queue of harvested RRQ commands
1283 * @irqpoll: IRQ poll structure associated with queue to poll.
1284 * @budget: Threshold of RRQ entries to process per poll.
1285 *
1286 * Return: The number of entries processed.
1287 */
1288 static int cxlflash_irqpoll(struct irq_poll *irqpoll, int budget)
1289 {
1290 struct hwq *hwq = container_of(irqpoll, struct hwq, irqpoll);
1291 unsigned long hrrq_flags;
1292 LIST_HEAD(doneq);
1293 int num_entries = 0;
1294
1295 spin_lock_irqsave(&hwq->hrrq_slock, hrrq_flags);
1296
1297 num_entries = process_hrrq(hwq, &doneq, budget);
1298 if (num_entries < budget)
1299 irq_poll_complete(irqpoll);
1300
1301 spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags);
1302
1303 process_cmd_doneq(&doneq);
1304 return num_entries;
1305 }
1306
1307 /**
1308 * cxlflash_rrq_irq() - interrupt handler for read-response queue (normal path)
1309 * @irq: Interrupt number.
1310 * @data: Private data provided at interrupt registration, the AFU.
1311 *
1312 * Return: IRQ_HANDLED or IRQ_NONE when no ready entries found.
1313 */
1314 static irqreturn_t cxlflash_rrq_irq(int irq, void *data)
1315 {
1316 struct hwq *hwq = (struct hwq *)data;
1317 struct afu *afu = hwq->afu;
1318 unsigned long hrrq_flags;
1319 LIST_HEAD(doneq);
1320 int num_entries = 0;
1321
1322 spin_lock_irqsave(&hwq->hrrq_slock, hrrq_flags);
1323
1324 if (afu_is_irqpoll_enabled(afu)) {
1325 irq_poll_sched(&hwq->irqpoll);
1326 spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags);
1327 return IRQ_HANDLED;
1328 }
1329
1330 num_entries = process_hrrq(hwq, &doneq, -1);
1331 spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags);
1332
1333 if (num_entries == 0)
1334 return IRQ_NONE;
1335
1336 process_cmd_doneq(&doneq);
1337 return IRQ_HANDLED;
1338 }
1339
1340 /*
1341 * Asynchronous interrupt information table
1342 *
1343 * NOTE:
1344 * - Order matters here as this array is indexed by bit position.
1345 *
1346 * - The checkpatch script considers the BUILD_SISL_ASTATUS_FC_PORT macro
1347 * as complex and complains due to a lack of parentheses/braces.
1348 */
1349 #define ASTATUS_FC(_a, _b, _c, _d) \
1350 { SISL_ASTATUS_FC##_a##_##_b, _c, _a, (_d) }
1351
1352 #define BUILD_SISL_ASTATUS_FC_PORT(_a) \
1353 ASTATUS_FC(_a, LINK_UP, "link up", 0), \
1354 ASTATUS_FC(_a, LINK_DN, "link down", 0), \
1355 ASTATUS_FC(_a, LOGI_S, "login succeeded", SCAN_HOST), \
1356 ASTATUS_FC(_a, LOGI_F, "login failed", CLR_FC_ERROR), \
1357 ASTATUS_FC(_a, LOGI_R, "login timed out, retrying", LINK_RESET), \
1358 ASTATUS_FC(_a, CRC_T, "CRC threshold exceeded", LINK_RESET), \
1359 ASTATUS_FC(_a, LOGO, "target initiated LOGO", 0), \
1360 ASTATUS_FC(_a, OTHER, "other error", CLR_FC_ERROR | LINK_RESET)
1361
1362 static const struct asyc_intr_info ainfo[] = {
1363 BUILD_SISL_ASTATUS_FC_PORT(1),
1364 BUILD_SISL_ASTATUS_FC_PORT(0),
1365 BUILD_SISL_ASTATUS_FC_PORT(3),
1366 BUILD_SISL_ASTATUS_FC_PORT(2)
1367 };
1368
1369 /**
1370 * cxlflash_async_err_irq() - interrupt handler for asynchronous errors
1371 * @irq: Interrupt number.
1372 * @data: Private data provided at interrupt registration, the AFU.
1373 *
1374 * Return: Always return IRQ_HANDLED.
1375 */
1376 static irqreturn_t cxlflash_async_err_irq(int irq, void *data)
1377 {
1378 struct hwq *hwq = (struct hwq *)data;
1379 struct afu *afu = hwq->afu;
1380 struct cxlflash_cfg *cfg = afu->parent;
1381 struct device *dev = &cfg->dev->dev;
1382 const struct asyc_intr_info *info;
1383 struct sisl_global_map __iomem *global = &afu->afu_map->global;
1384 __be64 __iomem *fc_port_regs;
1385 u64 reg_unmasked;
1386 u64 reg;
1387 u64 bit;
1388 u8 port;
1389
1390 reg = readq_be(&global->regs.aintr_status);
1391 reg_unmasked = (reg & SISL_ASTATUS_UNMASK);
1392
1393 if (unlikely(reg_unmasked == 0)) {
1394 dev_err(dev, "%s: spurious interrupt, aintr_status=%016llx\n",
1395 __func__, reg);
1396 goto out;
1397 }
1398
1399 /* FYI, it is 'okay' to clear AFU status before FC_ERROR */
1400 writeq_be(reg_unmasked, &global->regs.aintr_clear);
1401
1402 /* Check each bit that is on */
1403 for_each_set_bit(bit, (ulong *)&reg_unmasked, BITS_PER_LONG) {
1404 if (unlikely(bit >= ARRAY_SIZE(ainfo))) {
1405 WARN_ON_ONCE(1);
1406 continue;
1407 }
1408
1409 info = &ainfo[bit];
1410 if (unlikely(info->status != 1ULL << bit)) {
1411 WARN_ON_ONCE(1);
1412 continue;
1413 }
1414
1415 port = info->port;
1416 fc_port_regs = get_fc_port_regs(cfg, port);
1417
1418 dev_err(dev, "%s: FC Port %d -> %s, fc_status=%016llx\n",
1419 __func__, port, info->desc,
1420 readq_be(&fc_port_regs[FC_STATUS / 8]));
1421
1422 /*
1423 * Do link reset first, some OTHER errors will set FC_ERROR
1424 * again if cleared before or w/o a reset
1425 */
1426 if (info->action & LINK_RESET) {
1427 dev_err(dev, "%s: FC Port %d: resetting link\n",
1428 __func__, port);
1429 cfg->lr_state = LINK_RESET_REQUIRED;
1430 cfg->lr_port = port;
1431 schedule_work(&cfg->work_q);
1432 }
1433
1434 if (info->action & CLR_FC_ERROR) {
1435 reg = readq_be(&fc_port_regs[FC_ERROR / 8]);
1436
1437 /*
1438 * Since all errors are unmasked, FC_ERROR and FC_ERRCAP
1439 * should be the same and tracing one is sufficient.
1440 */
1441
1442 dev_err(dev, "%s: fc %d: clearing fc_error=%016llx\n",
1443 __func__, port, reg);
1444
1445 writeq_be(reg, &fc_port_regs[FC_ERROR / 8]);
1446 writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]);
1447 }
1448
1449 if (info->action & SCAN_HOST) {
1450 atomic_inc(&cfg->scan_host_needed);
1451 schedule_work(&cfg->work_q);
1452 }
1453 }
1454
1455 out:
1456 return IRQ_HANDLED;
1457 }
1458
1459 /**
1460 * start_context() - starts the master context
1461 * @cfg: Internal structure associated with the host.
1462 * @index: Index of the hardware queue.
1463 *
1464 * Return: A success or failure value from CXL services.
1465 */
1466 static int start_context(struct cxlflash_cfg *cfg, u32 index)
1467 {
1468 struct device *dev = &cfg->dev->dev;
1469 struct hwq *hwq = get_hwq(cfg->afu, index);
1470 int rc = 0;
1471
1472 rc = cxl_start_context(hwq->ctx,
1473 hwq->work.work_element_descriptor,
1474 NULL);
1475
1476 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1477 return rc;
1478 }
1479
1480 /**
1481 * read_vpd() - obtains the WWPNs from VPD
1482 * @cfg: Internal structure associated with the host.
1483 * @wwpn: Array of size MAX_FC_PORTS to pass back WWPNs
1484 *
1485 * Return: 0 on success, -errno on failure
1486 */
1487 static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[])
1488 {
1489 struct device *dev = &cfg->dev->dev;
1490 struct pci_dev *pdev = cfg->dev;
1491 int rc = 0;
1492 int ro_start, ro_size, i, j, k;
1493 ssize_t vpd_size;
1494 char vpd_data[CXLFLASH_VPD_LEN];
1495 char tmp_buf[WWPN_BUF_LEN] = { 0 };
1496 char *wwpn_vpd_tags[MAX_FC_PORTS] = { "V5", "V6", "V7", "V8" };
1497
1498 /* Get the VPD data from the device */
1499 vpd_size = cxl_read_adapter_vpd(pdev, vpd_data, sizeof(vpd_data));
1500 if (unlikely(vpd_size <= 0)) {
1501 dev_err(dev, "%s: Unable to read VPD (size = %ld)\n",
1502 __func__, vpd_size);
1503 rc = -ENODEV;
1504 goto out;
1505 }
1506
1507 /* Get the read only section offset */
1508 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size,
1509 PCI_VPD_LRDT_RO_DATA);
1510 if (unlikely(ro_start < 0)) {
1511 dev_err(dev, "%s: VPD Read-only data not found\n", __func__);
1512 rc = -ENODEV;
1513 goto out;
1514 }
1515
1516 /* Get the read only section size, cap when extends beyond read VPD */
1517 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
1518 j = ro_size;
1519 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
1520 if (unlikely((i + j) > vpd_size)) {
1521 dev_dbg(dev, "%s: Might need to read more VPD (%d > %ld)\n",
1522 __func__, (i + j), vpd_size);
1523 ro_size = vpd_size - i;
1524 }
1525
1526 /*
1527 * Find the offset of the WWPN tag within the read only
1528 * VPD data and validate the found field (partials are
1529 * no good to us). Convert the ASCII data to an integer
1530 * value. Note that we must copy to a temporary buffer
1531 * because the conversion service requires that the ASCII
1532 * string be terminated.
1533 */
1534 for (k = 0; k < cfg->num_fc_ports; k++) {
1535 j = ro_size;
1536 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
1537
1538 i = pci_vpd_find_info_keyword(vpd_data, i, j, wwpn_vpd_tags[k]);
1539 if (unlikely(i < 0)) {
1540 dev_err(dev, "%s: Port %d WWPN not found in VPD\n",
1541 __func__, k);
1542 rc = -ENODEV;
1543 goto out;
1544 }
1545
1546 j = pci_vpd_info_field_size(&vpd_data[i]);
1547 i += PCI_VPD_INFO_FLD_HDR_SIZE;
1548 if (unlikely((i + j > vpd_size) || (j != WWPN_LEN))) {
1549 dev_err(dev, "%s: Port %d WWPN incomplete or bad VPD\n",
1550 __func__, k);
1551 rc = -ENODEV;
1552 goto out;
1553 }
1554
1555 memcpy(tmp_buf, &vpd_data[i], WWPN_LEN);
1556 rc = kstrtoul(tmp_buf, WWPN_LEN, (ulong *)&wwpn[k]);
1557 if (unlikely(rc)) {
1558 dev_err(dev, "%s: WWPN conversion failed for port %d\n",
1559 __func__, k);
1560 rc = -ENODEV;
1561 goto out;
1562 }
1563
1564 dev_dbg(dev, "%s: wwpn%d=%016llx\n", __func__, k, wwpn[k]);
1565 }
1566
1567 out:
1568 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1569 return rc;
1570 }
1571
1572 /**
1573 * init_pcr() - initialize the provisioning and control registers
1574 * @cfg: Internal structure associated with the host.
1575 *
1576 * Also sets up fast access to the mapped registers and initializes AFU
1577 * command fields that never change.
1578 */
1579 static void init_pcr(struct cxlflash_cfg *cfg)
1580 {
1581 struct afu *afu = cfg->afu;
1582 struct sisl_ctrl_map __iomem *ctrl_map;
1583 struct hwq *hwq;
1584 int i;
1585
1586 for (i = 0; i < MAX_CONTEXT; i++) {
1587 ctrl_map = &afu->afu_map->ctrls[i].ctrl;
1588 /* Disrupt any clients that could be running */
1589 /* e.g. clients that survived a master restart */
1590 writeq_be(0, &ctrl_map->rht_start);
1591 writeq_be(0, &ctrl_map->rht_cnt_id);
1592 writeq_be(0, &ctrl_map->ctx_cap);
1593 }
1594
1595 /* Copy frequently used fields into hwq */
1596 for (i = 0; i < afu->num_hwqs; i++) {
1597 hwq = get_hwq(afu, i);
1598
1599 hwq->ctx_hndl = (u16) cxl_process_element(hwq->ctx);
1600 hwq->host_map = &afu->afu_map->hosts[hwq->ctx_hndl].host;
1601 hwq->ctrl_map = &afu->afu_map->ctrls[hwq->ctx_hndl].ctrl;
1602
1603 /* Program the Endian Control for the master context */
1604 writeq_be(SISL_ENDIAN_CTRL, &hwq->host_map->endian_ctrl);
1605 }
1606 }
1607
1608 /**
1609 * init_global() - initialize AFU global registers
1610 * @cfg: Internal structure associated with the host.
1611 */
1612 static int init_global(struct cxlflash_cfg *cfg)
1613 {
1614 struct afu *afu = cfg->afu;
1615 struct device *dev = &cfg->dev->dev;
1616 struct hwq *hwq;
1617 struct sisl_host_map __iomem *hmap;
1618 __be64 __iomem *fc_port_regs;
1619 u64 wwpn[MAX_FC_PORTS]; /* wwpn of AFU ports */
1620 int i = 0, num_ports = 0;
1621 int rc = 0;
1622 u64 reg;
1623
1624 rc = read_vpd(cfg, &wwpn[0]);
1625 if (rc) {
1626 dev_err(dev, "%s: could not read vpd rc=%d\n", __func__, rc);
1627 goto out;
1628 }
1629
1630 /* Set up RRQ and SQ in HWQ for master issued cmds */
1631 for (i = 0; i < afu->num_hwqs; i++) {
1632 hwq = get_hwq(afu, i);
1633 hmap = hwq->host_map;
1634
1635 writeq_be((u64) hwq->hrrq_start, &hmap->rrq_start);
1636 writeq_be((u64) hwq->hrrq_end, &hmap->rrq_end);
1637
1638 if (afu_is_sq_cmd_mode(afu)) {
1639 writeq_be((u64)hwq->hsq_start, &hmap->sq_start);
1640 writeq_be((u64)hwq->hsq_end, &hmap->sq_end);
1641 }
1642 }
1643
1644 /* AFU configuration */
1645 reg = readq_be(&afu->afu_map->global.regs.afu_config);
1646 reg |= SISL_AFUCONF_AR_ALL|SISL_AFUCONF_ENDIAN;
1647 /* enable all auto retry options and control endianness */
1648 /* leave others at default: */
1649 /* CTX_CAP write protected, mbox_r does not clear on read and */
1650 /* checker on if dual afu */
1651 writeq_be(reg, &afu->afu_map->global.regs.afu_config);
1652
1653 /* Global port select: select either port */
1654 if (afu->internal_lun) {
1655 /* Only use port 0 */
1656 writeq_be(PORT0, &afu->afu_map->global.regs.afu_port_sel);
1657 num_ports = 0;
1658 } else {
1659 writeq_be(PORT_MASK(cfg->num_fc_ports),
1660 &afu->afu_map->global.regs.afu_port_sel);
1661 num_ports = cfg->num_fc_ports;
1662 }
1663
1664 for (i = 0; i < num_ports; i++) {
1665 fc_port_regs = get_fc_port_regs(cfg, i);
1666
1667 /* Unmask all errors (but they are still masked at AFU) */
1668 writeq_be(0, &fc_port_regs[FC_ERRMSK / 8]);
1669 /* Clear CRC error cnt & set a threshold */
1670 (void)readq_be(&fc_port_regs[FC_CNT_CRCERR / 8]);
1671 writeq_be(MC_CRC_THRESH, &fc_port_regs[FC_CRC_THRESH / 8]);
1672
1673 /* Set WWPNs. If already programmed, wwpn[i] is 0 */
1674 if (wwpn[i] != 0)
1675 afu_set_wwpn(afu, i, &fc_port_regs[0], wwpn[i]);
1676 /* Programming WWPN back to back causes additional
1677 * offline/online transitions and a PLOGI
1678 */
1679 msleep(100);
1680 }
1681
1682 /* Set up master's own CTX_CAP to allow real mode, host translation */
1683 /* tables, afu cmds and read/write GSCSI cmds. */
1684 /* First, unlock ctx_cap write by reading mbox */
1685 for (i = 0; i < afu->num_hwqs; i++) {
1686 hwq = get_hwq(afu, i);
1687
1688 (void)readq_be(&hwq->ctrl_map->mbox_r); /* unlock ctx_cap */
1689 writeq_be((SISL_CTX_CAP_REAL_MODE | SISL_CTX_CAP_HOST_XLATE |
1690 SISL_CTX_CAP_READ_CMD | SISL_CTX_CAP_WRITE_CMD |
1691 SISL_CTX_CAP_AFU_CMD | SISL_CTX_CAP_GSCSI_CMD),
1692 &hwq->ctrl_map->ctx_cap);
1693 }
1694 /* Initialize heartbeat */
1695 afu->hb = readq_be(&afu->afu_map->global.regs.afu_hb);
1696 out:
1697 return rc;
1698 }
1699
1700 /**
1701 * start_afu() - initializes and starts the AFU
1702 * @cfg: Internal structure associated with the host.
1703 */
1704 static int start_afu(struct cxlflash_cfg *cfg)
1705 {
1706 struct afu *afu = cfg->afu;
1707 struct device *dev = &cfg->dev->dev;
1708 struct hwq *hwq;
1709 int rc = 0;
1710 int i;
1711
1712 init_pcr(cfg);
1713
1714 /* Initialize each HWQ */
1715 for (i = 0; i < afu->num_hwqs; i++) {
1716 hwq = get_hwq(afu, i);
1717
1718 /* After an AFU reset, RRQ entries are stale, clear them */
1719 memset(&hwq->rrq_entry, 0, sizeof(hwq->rrq_entry));
1720
1721 /* Initialize RRQ pointers */
1722 hwq->hrrq_start = &hwq->rrq_entry[0];
1723 hwq->hrrq_end = &hwq->rrq_entry[NUM_RRQ_ENTRY - 1];
1724 hwq->hrrq_curr = hwq->hrrq_start;
1725 hwq->toggle = 1;
1726
1727 /* Initialize spin locks */
1728 spin_lock_init(&hwq->hrrq_slock);
1729 spin_lock_init(&hwq->hsq_slock);
1730
1731 /* Initialize SQ */
1732 if (afu_is_sq_cmd_mode(afu)) {
1733 memset(&hwq->sq, 0, sizeof(hwq->sq));
1734 hwq->hsq_start = &hwq->sq[0];
1735 hwq->hsq_end = &hwq->sq[NUM_SQ_ENTRY - 1];
1736 hwq->hsq_curr = hwq->hsq_start;
1737
1738 atomic_set(&hwq->hsq_credits, NUM_SQ_ENTRY - 1);
1739 }
1740
1741 /* Initialize IRQ poll */
1742 if (afu_is_irqpoll_enabled(afu))
1743 irq_poll_init(&hwq->irqpoll, afu->irqpoll_weight,
1744 cxlflash_irqpoll);
1745
1746 }
1747
1748 rc = init_global(cfg);
1749
1750 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1751 return rc;
1752 }
1753
1754 /**
1755 * init_intr() - setup interrupt handlers for the master context
1756 * @cfg: Internal structure associated with the host.
1757 * @hwq: Hardware queue to initialize.
1758 *
1759 * Return: 0 on success, -errno on failure
1760 */
1761 static enum undo_level init_intr(struct cxlflash_cfg *cfg,
1762 struct hwq *hwq)
1763 {
1764 struct device *dev = &cfg->dev->dev;
1765 struct cxl_context *ctx = hwq->ctx;
1766 int rc = 0;
1767 enum undo_level level = UNDO_NOOP;
1768 bool is_primary_hwq = (hwq->index == PRIMARY_HWQ);
1769 int num_irqs = is_primary_hwq ? 3 : 2;
1770
1771 rc = cxl_allocate_afu_irqs(ctx, num_irqs);
1772 if (unlikely(rc)) {
1773 dev_err(dev, "%s: allocate_afu_irqs failed rc=%d\n",
1774 __func__, rc);
1775 level = UNDO_NOOP;
1776 goto out;
1777 }
1778
1779 rc = cxl_map_afu_irq(ctx, 1, cxlflash_sync_err_irq, hwq,
1780 "SISL_MSI_SYNC_ERROR");
1781 if (unlikely(rc <= 0)) {
1782 dev_err(dev, "%s: SISL_MSI_SYNC_ERROR map failed\n", __func__);
1783 level = FREE_IRQ;
1784 goto out;
1785 }
1786
1787 rc = cxl_map_afu_irq(ctx, 2, cxlflash_rrq_irq, hwq,
1788 "SISL_MSI_RRQ_UPDATED");
1789 if (unlikely(rc <= 0)) {
1790 dev_err(dev, "%s: SISL_MSI_RRQ_UPDATED map failed\n", __func__);
1791 level = UNMAP_ONE;
1792 goto out;
1793 }
1794
1795 /* SISL_MSI_ASYNC_ERROR is setup only for the primary HWQ */
1796 if (!is_primary_hwq)
1797 goto out;
1798
1799 rc = cxl_map_afu_irq(ctx, 3, cxlflash_async_err_irq, hwq,
1800 "SISL_MSI_ASYNC_ERROR");
1801 if (unlikely(rc <= 0)) {
1802 dev_err(dev, "%s: SISL_MSI_ASYNC_ERROR map failed\n", __func__);
1803 level = UNMAP_TWO;
1804 goto out;
1805 }
1806 out:
1807 return level;
1808 }
1809
1810 /**
1811 * init_mc() - create and register as the master context
1812 * @cfg: Internal structure associated with the host.
1813 * index: HWQ Index of the master context.
1814 *
1815 * Return: 0 on success, -errno on failure
1816 */
1817 static int init_mc(struct cxlflash_cfg *cfg, u32 index)
1818 {
1819 struct cxl_context *ctx;
1820 struct device *dev = &cfg->dev->dev;
1821 struct hwq *hwq = get_hwq(cfg->afu, index);
1822 int rc = 0;
1823 enum undo_level level;
1824
1825 hwq->afu = cfg->afu;
1826 hwq->index = index;
1827
1828 if (index == PRIMARY_HWQ)
1829 ctx = cxl_get_context(cfg->dev);
1830 else
1831 ctx = cxl_dev_context_init(cfg->dev);
1832 if (unlikely(!ctx)) {
1833 rc = -ENOMEM;
1834 goto err1;
1835 }
1836
1837 WARN_ON(hwq->ctx);
1838 hwq->ctx = ctx;
1839
1840 /* Set it up as a master with the CXL */
1841 cxl_set_master(ctx);
1842
1843 /* Reset AFU when initializing primary context */
1844 if (index == PRIMARY_HWQ) {
1845 rc = cxl_afu_reset(ctx);
1846 if (unlikely(rc)) {
1847 dev_err(dev, "%s: AFU reset failed rc=%d\n",
1848 __func__, rc);
1849 goto err1;
1850 }
1851 }
1852
1853 level = init_intr(cfg, hwq);
1854 if (unlikely(level)) {
1855 dev_err(dev, "%s: interrupt init failed rc=%d\n", __func__, rc);
1856 goto err2;
1857 }
1858
1859 /* This performs the equivalent of the CXL_IOCTL_START_WORK.
1860 * The CXL_IOCTL_GET_PROCESS_ELEMENT is implicit in the process
1861 * element (pe) that is embedded in the context (ctx)
1862 */
1863 rc = start_context(cfg, index);
1864 if (unlikely(rc)) {
1865 dev_err(dev, "%s: start context failed rc=%d\n", __func__, rc);
1866 level = UNMAP_THREE;
1867 goto err2;
1868 }
1869
1870 out:
1871 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1872 return rc;
1873 err2:
1874 term_intr(cfg, level, index);
1875 if (index != PRIMARY_HWQ)
1876 cxl_release_context(ctx);
1877 err1:
1878 hwq->ctx = NULL;
1879 goto out;
1880 }
1881
1882 /**
1883 * get_num_afu_ports() - determines and configures the number of AFU ports
1884 * @cfg: Internal structure associated with the host.
1885 *
1886 * This routine determines the number of AFU ports by converting the global
1887 * port selection mask. The converted value is only valid following an AFU
1888 * reset (explicit or power-on). This routine must be invoked shortly after
1889 * mapping as other routines are dependent on the number of ports during the
1890 * initialization sequence.
1891 *
1892 * To support legacy AFUs that might not have reflected an initial global
1893 * port mask (value read is 0), default to the number of ports originally
1894 * supported by the cxlflash driver (2) before hardware with other port
1895 * offerings was introduced.
1896 */
1897 static void get_num_afu_ports(struct cxlflash_cfg *cfg)
1898 {
1899 struct afu *afu = cfg->afu;
1900 struct device *dev = &cfg->dev->dev;
1901 u64 port_mask;
1902 int num_fc_ports = LEGACY_FC_PORTS;
1903
1904 port_mask = readq_be(&afu->afu_map->global.regs.afu_port_sel);
1905 if (port_mask != 0ULL)
1906 num_fc_ports = min(ilog2(port_mask) + 1, MAX_FC_PORTS);
1907
1908 dev_dbg(dev, "%s: port_mask=%016llx num_fc_ports=%d\n",
1909 __func__, port_mask, num_fc_ports);
1910
1911 cfg->num_fc_ports = num_fc_ports;
1912 cfg->host->max_channel = PORTNUM2CHAN(num_fc_ports);
1913 }
1914
1915 /**
1916 * init_afu() - setup as master context and start AFU
1917 * @cfg: Internal structure associated with the host.
1918 *
1919 * This routine is a higher level of control for configuring the
1920 * AFU on probe and reset paths.
1921 *
1922 * Return: 0 on success, -errno on failure
1923 */
1924 static int init_afu(struct cxlflash_cfg *cfg)
1925 {
1926 u64 reg;
1927 int rc = 0;
1928 struct afu *afu = cfg->afu;
1929 struct device *dev = &cfg->dev->dev;
1930 struct hwq *hwq;
1931 int i;
1932
1933 cxl_perst_reloads_same_image(cfg->cxl_afu, true);
1934
1935 afu->num_hwqs = afu->desired_hwqs;
1936 for (i = 0; i < afu->num_hwqs; i++) {
1937 rc = init_mc(cfg, i);
1938 if (rc) {
1939 dev_err(dev, "%s: init_mc failed rc=%d index=%d\n",
1940 __func__, rc, i);
1941 goto err1;
1942 }
1943 }
1944
1945 /* Map the entire MMIO space of the AFU using the first context */
1946 hwq = get_hwq(afu, PRIMARY_HWQ);
1947 afu->afu_map = cxl_psa_map(hwq->ctx);
1948 if (!afu->afu_map) {
1949 dev_err(dev, "%s: cxl_psa_map failed\n", __func__);
1950 rc = -ENOMEM;
1951 goto err1;
1952 }
1953
1954 /* No byte reverse on reading afu_version or string will be backwards */
1955 reg = readq(&afu->afu_map->global.regs.afu_version);
1956 memcpy(afu->version, &reg, sizeof(reg));
1957 afu->interface_version =
1958 readq_be(&afu->afu_map->global.regs.interface_version);
1959 if ((afu->interface_version + 1) == 0) {
1960 dev_err(dev, "Back level AFU, please upgrade. AFU version %s "
1961 "interface version %016llx\n", afu->version,
1962 afu->interface_version);
1963 rc = -EINVAL;
1964 goto err1;
1965 }
1966
1967 if (afu_is_sq_cmd_mode(afu)) {
1968 afu->send_cmd = send_cmd_sq;
1969 afu->context_reset = context_reset_sq;
1970 } else {
1971 afu->send_cmd = send_cmd_ioarrin;
1972 afu->context_reset = context_reset_ioarrin;
1973 }
1974
1975 dev_dbg(dev, "%s: afu_ver=%s interface_ver=%016llx\n", __func__,
1976 afu->version, afu->interface_version);
1977
1978 get_num_afu_ports(cfg);
1979
1980 rc = start_afu(cfg);
1981 if (rc) {
1982 dev_err(dev, "%s: start_afu failed, rc=%d\n", __func__, rc);
1983 goto err1;
1984 }
1985
1986 afu_err_intr_init(cfg->afu);
1987 for (i = 0; i < afu->num_hwqs; i++) {
1988 hwq = get_hwq(afu, i);
1989
1990 hwq->room = readq_be(&hwq->host_map->cmd_room);
1991 }
1992
1993 /* Restore the LUN mappings */
1994 cxlflash_restore_luntable(cfg);
1995 out:
1996 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1997 return rc;
1998
1999 err1:
2000 for (i = afu->num_hwqs - 1; i >= 0; i--) {
2001 term_intr(cfg, UNMAP_THREE, i);
2002 term_mc(cfg, i);
2003 }
2004 goto out;
2005 }
2006
2007 /**
2008 * cxlflash_afu_sync() - builds and sends an AFU sync command
2009 * @afu: AFU associated with the host.
2010 * @ctx_hndl_u: Identifies context requesting sync.
2011 * @res_hndl_u: Identifies resource requesting sync.
2012 * @mode: Type of sync to issue (lightweight, heavyweight, global).
2013 *
2014 * The AFU can only take 1 sync command at a time. This routine enforces this
2015 * limitation by using a mutex to provide exclusive access to the AFU during
2016 * the sync. This design point requires calling threads to not be on interrupt
2017 * context due to the possibility of sleeping during concurrent sync operations.
2018 *
2019 * AFU sync operations are only necessary and allowed when the device is
2020 * operating normally. When not operating normally, sync requests can occur as
2021 * part of cleaning up resources associated with an adapter prior to removal.
2022 * In this scenario, these requests are simply ignored (safe due to the AFU
2023 * going away).
2024 *
2025 * Return:
2026 * 0 on success, -errno on failure
2027 */
2028 int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t ctx_hndl_u,
2029 res_hndl_t res_hndl_u, u8 mode)
2030 {
2031 struct cxlflash_cfg *cfg = afu->parent;
2032 struct device *dev = &cfg->dev->dev;
2033 struct afu_cmd *cmd = NULL;
2034 struct hwq *hwq = get_hwq(afu, PRIMARY_HWQ);
2035 char *buf = NULL;
2036 int rc = 0;
2037 int nretry = 0;
2038 static DEFINE_MUTEX(sync_active);
2039
2040 if (cfg->state != STATE_NORMAL) {
2041 dev_dbg(dev, "%s: Sync not required state=%u\n",
2042 __func__, cfg->state);
2043 return 0;
2044 }
2045
2046 mutex_lock(&sync_active);
2047 atomic_inc(&afu->cmds_active);
2048 buf = kzalloc(sizeof(*cmd) + __alignof__(*cmd) - 1, GFP_KERNEL);
2049 if (unlikely(!buf)) {
2050 dev_err(dev, "%s: no memory for command\n", __func__);
2051 rc = -ENOMEM;
2052 goto out;
2053 }
2054
2055 cmd = (struct afu_cmd *)PTR_ALIGN(buf, __alignof__(*cmd));
2056
2057 retry:
2058 init_completion(&cmd->cevent);
2059 cmd->parent = afu;
2060 cmd->hwq_index = hwq->index;
2061
2062 dev_dbg(dev, "%s: afu=%p cmd=%p ctx=%d nretry=%d\n",
2063 __func__, afu, cmd, ctx_hndl_u, nretry);
2064
2065 cmd->rcb.req_flags = SISL_REQ_FLAGS_AFU_CMD;
2066 cmd->rcb.ctx_id = hwq->ctx_hndl;
2067 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
2068 cmd->rcb.timeout = MC_AFU_SYNC_TIMEOUT;
2069
2070 cmd->rcb.cdb[0] = 0xC0; /* AFU Sync */
2071 cmd->rcb.cdb[1] = mode;
2072
2073 /* The cdb is aligned, no unaligned accessors required */
2074 *((__be16 *)&cmd->rcb.cdb[2]) = cpu_to_be16(ctx_hndl_u);
2075 *((__be32 *)&cmd->rcb.cdb[4]) = cpu_to_be32(res_hndl_u);
2076
2077 rc = afu->send_cmd(afu, cmd);
2078 if (unlikely(rc)) {
2079 rc = -ENOBUFS;
2080 goto out;
2081 }
2082
2083 rc = wait_resp(afu, cmd);
2084 if (rc == -ETIMEDOUT) {
2085 rc = afu->context_reset(hwq);
2086 if (!rc && ++nretry < 2)
2087 goto retry;
2088 }
2089
2090 out:
2091 atomic_dec(&afu->cmds_active);
2092 mutex_unlock(&sync_active);
2093 kfree(buf);
2094 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
2095 return rc;
2096 }
2097
2098 /**
2099 * afu_reset() - resets the AFU
2100 * @cfg: Internal structure associated with the host.
2101 *
2102 * Return: 0 on success, -errno on failure
2103 */
2104 static int afu_reset(struct cxlflash_cfg *cfg)
2105 {
2106 struct device *dev = &cfg->dev->dev;
2107 int rc = 0;
2108
2109 /* Stop the context before the reset. Since the context is
2110 * no longer available restart it after the reset is complete
2111 */
2112 term_afu(cfg);
2113
2114 rc = init_afu(cfg);
2115
2116 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
2117 return rc;
2118 }
2119
2120 /**
2121 * drain_ioctls() - wait until all currently executing ioctls have completed
2122 * @cfg: Internal structure associated with the host.
2123 *
2124 * Obtain write access to read/write semaphore that wraps ioctl
2125 * handling to 'drain' ioctls currently executing.
2126 */
2127 static void drain_ioctls(struct cxlflash_cfg *cfg)
2128 {
2129 down_write(&cfg->ioctl_rwsem);
2130 up_write(&cfg->ioctl_rwsem);
2131 }
2132
2133 /**
2134 * cxlflash_eh_device_reset_handler() - reset a single LUN
2135 * @scp: SCSI command to send.
2136 *
2137 * Return:
2138 * SUCCESS as defined in scsi/scsi.h
2139 * FAILED as defined in scsi/scsi.h
2140 */
2141 static int cxlflash_eh_device_reset_handler(struct scsi_cmnd *scp)
2142 {
2143 int rc = SUCCESS;
2144 struct Scsi_Host *host = scp->device->host;
2145 struct cxlflash_cfg *cfg = shost_priv(host);
2146 struct device *dev = &cfg->dev->dev;
2147 struct afu *afu = cfg->afu;
2148 int rcr = 0;
2149
2150 dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu "
2151 "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no,
2152 scp->device->channel, scp->device->id, scp->device->lun,
2153 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
2154 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
2155 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
2156 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
2157
2158 retry:
2159 switch (cfg->state) {
2160 case STATE_NORMAL:
2161 rcr = send_tmf(afu, scp, TMF_LUN_RESET);
2162 if (unlikely(rcr))
2163 rc = FAILED;
2164 break;
2165 case STATE_RESET:
2166 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
2167 goto retry;
2168 default:
2169 rc = FAILED;
2170 break;
2171 }
2172
2173 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
2174 return rc;
2175 }
2176
2177 /**
2178 * cxlflash_eh_host_reset_handler() - reset the host adapter
2179 * @scp: SCSI command from stack identifying host.
2180 *
2181 * Following a reset, the state is evaluated again in case an EEH occurred
2182 * during the reset. In such a scenario, the host reset will either yield
2183 * until the EEH recovery is complete or return success or failure based
2184 * upon the current device state.
2185 *
2186 * Return:
2187 * SUCCESS as defined in scsi/scsi.h
2188 * FAILED as defined in scsi/scsi.h
2189 */
2190 static int cxlflash_eh_host_reset_handler(struct scsi_cmnd *scp)
2191 {
2192 int rc = SUCCESS;
2193 int rcr = 0;
2194 struct Scsi_Host *host = scp->device->host;
2195 struct cxlflash_cfg *cfg = shost_priv(host);
2196 struct device *dev = &cfg->dev->dev;
2197
2198 dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu "
2199 "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no,
2200 scp->device->channel, scp->device->id, scp->device->lun,
2201 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
2202 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
2203 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
2204 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
2205
2206 switch (cfg->state) {
2207 case STATE_NORMAL:
2208 cfg->state = STATE_RESET;
2209 drain_ioctls(cfg);
2210 cxlflash_mark_contexts_error(cfg);
2211 rcr = afu_reset(cfg);
2212 if (rcr) {
2213 rc = FAILED;
2214 cfg->state = STATE_FAILTERM;
2215 } else
2216 cfg->state = STATE_NORMAL;
2217 wake_up_all(&cfg->reset_waitq);
2218 ssleep(1);
2219 /* fall through */
2220 case STATE_RESET:
2221 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
2222 if (cfg->state == STATE_NORMAL)
2223 break;
2224 /* fall through */
2225 default:
2226 rc = FAILED;
2227 break;
2228 }
2229
2230 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
2231 return rc;
2232 }
2233
2234 /**
2235 * cxlflash_change_queue_depth() - change the queue depth for the device
2236 * @sdev: SCSI device destined for queue depth change.
2237 * @qdepth: Requested queue depth value to set.
2238 *
2239 * The requested queue depth is capped to the maximum supported value.
2240 *
2241 * Return: The actual queue depth set.
2242 */
2243 static int cxlflash_change_queue_depth(struct scsi_device *sdev, int qdepth)
2244 {
2245
2246 if (qdepth > CXLFLASH_MAX_CMDS_PER_LUN)
2247 qdepth = CXLFLASH_MAX_CMDS_PER_LUN;
2248
2249 scsi_change_queue_depth(sdev, qdepth);
2250 return sdev->queue_depth;
2251 }
2252
2253 /**
2254 * cxlflash_show_port_status() - queries and presents the current port status
2255 * @port: Desired port for status reporting.
2256 * @cfg: Internal structure associated with the host.
2257 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2258 *
2259 * Return: The size of the ASCII string returned in @buf or -EINVAL.
2260 */
2261 static ssize_t cxlflash_show_port_status(u32 port,
2262 struct cxlflash_cfg *cfg,
2263 char *buf)
2264 {
2265 struct device *dev = &cfg->dev->dev;
2266 char *disp_status;
2267 u64 status;
2268 __be64 __iomem *fc_port_regs;
2269
2270 WARN_ON(port >= MAX_FC_PORTS);
2271
2272 if (port >= cfg->num_fc_ports) {
2273 dev_info(dev, "%s: Port %d not supported on this card.\n",
2274 __func__, port);
2275 return -EINVAL;
2276 }
2277
2278 fc_port_regs = get_fc_port_regs(cfg, port);
2279 status = readq_be(&fc_port_regs[FC_MTIP_STATUS / 8]);
2280 status &= FC_MTIP_STATUS_MASK;
2281
2282 if (status == FC_MTIP_STATUS_ONLINE)
2283 disp_status = "online";
2284 else if (status == FC_MTIP_STATUS_OFFLINE)
2285 disp_status = "offline";
2286 else
2287 disp_status = "unknown";
2288
2289 return scnprintf(buf, PAGE_SIZE, "%s\n", disp_status);
2290 }
2291
2292 /**
2293 * port0_show() - queries and presents the current status of port 0
2294 * @dev: Generic device associated with the host owning the port.
2295 * @attr: Device attribute representing the port.
2296 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2297 *
2298 * Return: The size of the ASCII string returned in @buf.
2299 */
2300 static ssize_t port0_show(struct device *dev,
2301 struct device_attribute *attr,
2302 char *buf)
2303 {
2304 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2305
2306 return cxlflash_show_port_status(0, cfg, buf);
2307 }
2308
2309 /**
2310 * port1_show() - queries and presents the current status of port 1
2311 * @dev: Generic device associated with the host owning the port.
2312 * @attr: Device attribute representing the port.
2313 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2314 *
2315 * Return: The size of the ASCII string returned in @buf.
2316 */
2317 static ssize_t port1_show(struct device *dev,
2318 struct device_attribute *attr,
2319 char *buf)
2320 {
2321 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2322
2323 return cxlflash_show_port_status(1, cfg, buf);
2324 }
2325
2326 /**
2327 * port2_show() - queries and presents the current status of port 2
2328 * @dev: Generic device associated with the host owning the port.
2329 * @attr: Device attribute representing the port.
2330 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2331 *
2332 * Return: The size of the ASCII string returned in @buf.
2333 */
2334 static ssize_t port2_show(struct device *dev,
2335 struct device_attribute *attr,
2336 char *buf)
2337 {
2338 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2339
2340 return cxlflash_show_port_status(2, cfg, buf);
2341 }
2342
2343 /**
2344 * port3_show() - queries and presents the current status of port 3
2345 * @dev: Generic device associated with the host owning the port.
2346 * @attr: Device attribute representing the port.
2347 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2348 *
2349 * Return: The size of the ASCII string returned in @buf.
2350 */
2351 static ssize_t port3_show(struct device *dev,
2352 struct device_attribute *attr,
2353 char *buf)
2354 {
2355 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2356
2357 return cxlflash_show_port_status(3, cfg, buf);
2358 }
2359
2360 /**
2361 * lun_mode_show() - presents the current LUN mode of the host
2362 * @dev: Generic device associated with the host.
2363 * @attr: Device attribute representing the LUN mode.
2364 * @buf: Buffer of length PAGE_SIZE to report back the LUN mode in ASCII.
2365 *
2366 * Return: The size of the ASCII string returned in @buf.
2367 */
2368 static ssize_t lun_mode_show(struct device *dev,
2369 struct device_attribute *attr, char *buf)
2370 {
2371 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2372 struct afu *afu = cfg->afu;
2373
2374 return scnprintf(buf, PAGE_SIZE, "%u\n", afu->internal_lun);
2375 }
2376
2377 /**
2378 * lun_mode_store() - sets the LUN mode of the host
2379 * @dev: Generic device associated with the host.
2380 * @attr: Device attribute representing the LUN mode.
2381 * @buf: Buffer of length PAGE_SIZE containing the LUN mode in ASCII.
2382 * @count: Length of data resizing in @buf.
2383 *
2384 * The CXL Flash AFU supports a dummy LUN mode where the external
2385 * links and storage are not required. Space on the FPGA is used
2386 * to create 1 or 2 small LUNs which are presented to the system
2387 * as if they were a normal storage device. This feature is useful
2388 * during development and also provides manufacturing with a way
2389 * to test the AFU without an actual device.
2390 *
2391 * 0 = external LUN[s] (default)
2392 * 1 = internal LUN (1 x 64K, 512B blocks, id 0)
2393 * 2 = internal LUN (1 x 64K, 4K blocks, id 0)
2394 * 3 = internal LUN (2 x 32K, 512B blocks, ids 0,1)
2395 * 4 = internal LUN (2 x 32K, 4K blocks, ids 0,1)
2396 *
2397 * Return: The size of the ASCII string returned in @buf.
2398 */
2399 static ssize_t lun_mode_store(struct device *dev,
2400 struct device_attribute *attr,
2401 const char *buf, size_t count)
2402 {
2403 struct Scsi_Host *shost = class_to_shost(dev);
2404 struct cxlflash_cfg *cfg = shost_priv(shost);
2405 struct afu *afu = cfg->afu;
2406 int rc;
2407 u32 lun_mode;
2408
2409 rc = kstrtouint(buf, 10, &lun_mode);
2410 if (!rc && (lun_mode < 5) && (lun_mode != afu->internal_lun)) {
2411 afu->internal_lun = lun_mode;
2412
2413 /*
2414 * When configured for internal LUN, there is only one channel,
2415 * channel number 0, else there will be one less than the number
2416 * of fc ports for this card.
2417 */
2418 if (afu->internal_lun)
2419 shost->max_channel = 0;
2420 else
2421 shost->max_channel = PORTNUM2CHAN(cfg->num_fc_ports);
2422
2423 afu_reset(cfg);
2424 scsi_scan_host(cfg->host);
2425 }
2426
2427 return count;
2428 }
2429
2430 /**
2431 * ioctl_version_show() - presents the current ioctl version of the host
2432 * @dev: Generic device associated with the host.
2433 * @attr: Device attribute representing the ioctl version.
2434 * @buf: Buffer of length PAGE_SIZE to report back the ioctl version.
2435 *
2436 * Return: The size of the ASCII string returned in @buf.
2437 */
2438 static ssize_t ioctl_version_show(struct device *dev,
2439 struct device_attribute *attr, char *buf)
2440 {
2441 return scnprintf(buf, PAGE_SIZE, "%u\n", DK_CXLFLASH_VERSION_0);
2442 }
2443
2444 /**
2445 * cxlflash_show_port_lun_table() - queries and presents the port LUN table
2446 * @port: Desired port for status reporting.
2447 * @cfg: Internal structure associated with the host.
2448 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2449 *
2450 * Return: The size of the ASCII string returned in @buf or -EINVAL.
2451 */
2452 static ssize_t cxlflash_show_port_lun_table(u32 port,
2453 struct cxlflash_cfg *cfg,
2454 char *buf)
2455 {
2456 struct device *dev = &cfg->dev->dev;
2457 __be64 __iomem *fc_port_luns;
2458 int i;
2459 ssize_t bytes = 0;
2460
2461 WARN_ON(port >= MAX_FC_PORTS);
2462
2463 if (port >= cfg->num_fc_ports) {
2464 dev_info(dev, "%s: Port %d not supported on this card.\n",
2465 __func__, port);
2466 return -EINVAL;
2467 }
2468
2469 fc_port_luns = get_fc_port_luns(cfg, port);
2470
2471 for (i = 0; i < CXLFLASH_NUM_VLUNS; i++)
2472 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
2473 "%03d: %016llx\n",
2474 i, readq_be(&fc_port_luns[i]));
2475 return bytes;
2476 }
2477
2478 /**
2479 * port0_lun_table_show() - presents the current LUN table of port 0
2480 * @dev: Generic device associated with the host owning the port.
2481 * @attr: Device attribute representing the port.
2482 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2483 *
2484 * Return: The size of the ASCII string returned in @buf.
2485 */
2486 static ssize_t port0_lun_table_show(struct device *dev,
2487 struct device_attribute *attr,
2488 char *buf)
2489 {
2490 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2491
2492 return cxlflash_show_port_lun_table(0, cfg, buf);
2493 }
2494
2495 /**
2496 * port1_lun_table_show() - presents the current LUN table of port 1
2497 * @dev: Generic device associated with the host owning the port.
2498 * @attr: Device attribute representing the port.
2499 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2500 *
2501 * Return: The size of the ASCII string returned in @buf.
2502 */
2503 static ssize_t port1_lun_table_show(struct device *dev,
2504 struct device_attribute *attr,
2505 char *buf)
2506 {
2507 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2508
2509 return cxlflash_show_port_lun_table(1, cfg, buf);
2510 }
2511
2512 /**
2513 * port2_lun_table_show() - presents the current LUN table of port 2
2514 * @dev: Generic device associated with the host owning the port.
2515 * @attr: Device attribute representing the port.
2516 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2517 *
2518 * Return: The size of the ASCII string returned in @buf.
2519 */
2520 static ssize_t port2_lun_table_show(struct device *dev,
2521 struct device_attribute *attr,
2522 char *buf)
2523 {
2524 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2525
2526 return cxlflash_show_port_lun_table(2, cfg, buf);
2527 }
2528
2529 /**
2530 * port3_lun_table_show() - presents the current LUN table of port 3
2531 * @dev: Generic device associated with the host owning the port.
2532 * @attr: Device attribute representing the port.
2533 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2534 *
2535 * Return: The size of the ASCII string returned in @buf.
2536 */
2537 static ssize_t port3_lun_table_show(struct device *dev,
2538 struct device_attribute *attr,
2539 char *buf)
2540 {
2541 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2542
2543 return cxlflash_show_port_lun_table(3, cfg, buf);
2544 }
2545
2546 /**
2547 * irqpoll_weight_show() - presents the current IRQ poll weight for the host
2548 * @dev: Generic device associated with the host.
2549 * @attr: Device attribute representing the IRQ poll weight.
2550 * @buf: Buffer of length PAGE_SIZE to report back the current IRQ poll
2551 * weight in ASCII.
2552 *
2553 * An IRQ poll weight of 0 indicates polling is disabled.
2554 *
2555 * Return: The size of the ASCII string returned in @buf.
2556 */
2557 static ssize_t irqpoll_weight_show(struct device *dev,
2558 struct device_attribute *attr, char *buf)
2559 {
2560 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2561 struct afu *afu = cfg->afu;
2562
2563 return scnprintf(buf, PAGE_SIZE, "%u\n", afu->irqpoll_weight);
2564 }
2565
2566 /**
2567 * irqpoll_weight_store() - sets the current IRQ poll weight for the host
2568 * @dev: Generic device associated with the host.
2569 * @attr: Device attribute representing the IRQ poll weight.
2570 * @buf: Buffer of length PAGE_SIZE containing the desired IRQ poll
2571 * weight in ASCII.
2572 * @count: Length of data resizing in @buf.
2573 *
2574 * An IRQ poll weight of 0 indicates polling is disabled.
2575 *
2576 * Return: The size of the ASCII string returned in @buf.
2577 */
2578 static ssize_t irqpoll_weight_store(struct device *dev,
2579 struct device_attribute *attr,
2580 const char *buf, size_t count)
2581 {
2582 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2583 struct device *cfgdev = &cfg->dev->dev;
2584 struct afu *afu = cfg->afu;
2585 struct hwq *hwq;
2586 u32 weight;
2587 int rc, i;
2588
2589 rc = kstrtouint(buf, 10, &weight);
2590 if (rc)
2591 return -EINVAL;
2592
2593 if (weight > 256) {
2594 dev_info(cfgdev,
2595 "Invalid IRQ poll weight. It must be 256 or less.\n");
2596 return -EINVAL;
2597 }
2598
2599 if (weight == afu->irqpoll_weight) {
2600 dev_info(cfgdev,
2601 "Current IRQ poll weight has the same weight.\n");
2602 return -EINVAL;
2603 }
2604
2605 if (afu_is_irqpoll_enabled(afu)) {
2606 for (i = 0; i < afu->num_hwqs; i++) {
2607 hwq = get_hwq(afu, i);
2608
2609 irq_poll_disable(&hwq->irqpoll);
2610 }
2611 }
2612
2613 afu->irqpoll_weight = weight;
2614
2615 if (weight > 0) {
2616 for (i = 0; i < afu->num_hwqs; i++) {
2617 hwq = get_hwq(afu, i);
2618
2619 irq_poll_init(&hwq->irqpoll, weight, cxlflash_irqpoll);
2620 }
2621 }
2622
2623 return count;
2624 }
2625
2626 /**
2627 * num_hwqs_show() - presents the number of hardware queues for the host
2628 * @dev: Generic device associated with the host.
2629 * @attr: Device attribute representing the number of hardware queues.
2630 * @buf: Buffer of length PAGE_SIZE to report back the number of hardware
2631 * queues in ASCII.
2632 *
2633 * Return: The size of the ASCII string returned in @buf.
2634 */
2635 static ssize_t num_hwqs_show(struct device *dev,
2636 struct device_attribute *attr, char *buf)
2637 {
2638 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2639 struct afu *afu = cfg->afu;
2640
2641 return scnprintf(buf, PAGE_SIZE, "%u\n", afu->num_hwqs);
2642 }
2643
2644 /**
2645 * num_hwqs_store() - sets the number of hardware queues for the host
2646 * @dev: Generic device associated with the host.
2647 * @attr: Device attribute representing the number of hardware queues.
2648 * @buf: Buffer of length PAGE_SIZE containing the number of hardware
2649 * queues in ASCII.
2650 * @count: Length of data resizing in @buf.
2651 *
2652 * n > 0: num_hwqs = n
2653 * n = 0: num_hwqs = num_online_cpus()
2654 * n < 0: num_online_cpus() / abs(n)
2655 *
2656 * Return: The size of the ASCII string returned in @buf.
2657 */
2658 static ssize_t num_hwqs_store(struct device *dev,
2659 struct device_attribute *attr,
2660 const char *buf, size_t count)
2661 {
2662 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2663 struct afu *afu = cfg->afu;
2664 int rc;
2665 int nhwqs, num_hwqs;
2666
2667 rc = kstrtoint(buf, 10, &nhwqs);
2668 if (rc)
2669 return -EINVAL;
2670
2671 if (nhwqs >= 1)
2672 num_hwqs = nhwqs;
2673 else if (nhwqs == 0)
2674 num_hwqs = num_online_cpus();
2675 else
2676 num_hwqs = num_online_cpus() / abs(nhwqs);
2677
2678 afu->desired_hwqs = min(num_hwqs, CXLFLASH_MAX_HWQS);
2679 WARN_ON_ONCE(afu->desired_hwqs == 0);
2680
2681 retry:
2682 switch (cfg->state) {
2683 case STATE_NORMAL:
2684 cfg->state = STATE_RESET;
2685 drain_ioctls(cfg);
2686 cxlflash_mark_contexts_error(cfg);
2687 rc = afu_reset(cfg);
2688 if (rc)
2689 cfg->state = STATE_FAILTERM;
2690 else
2691 cfg->state = STATE_NORMAL;
2692 wake_up_all(&cfg->reset_waitq);
2693 break;
2694 case STATE_RESET:
2695 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
2696 if (cfg->state == STATE_NORMAL)
2697 goto retry;
2698 default:
2699 /* Ideally should not happen */
2700 dev_err(dev, "%s: Device is not ready, state=%d\n",
2701 __func__, cfg->state);
2702 break;
2703 }
2704
2705 return count;
2706 }
2707
2708 static const char *hwq_mode_name[MAX_HWQ_MODE] = { "rr", "tag", "cpu" };
2709
2710 /**
2711 * hwq_mode_show() - presents the HWQ steering mode for the host
2712 * @dev: Generic device associated with the host.
2713 * @attr: Device attribute representing the HWQ steering mode.
2714 * @buf: Buffer of length PAGE_SIZE to report back the HWQ steering mode
2715 * as a character string.
2716 *
2717 * Return: The size of the ASCII string returned in @buf.
2718 */
2719 static ssize_t hwq_mode_show(struct device *dev,
2720 struct device_attribute *attr, char *buf)
2721 {
2722 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2723 struct afu *afu = cfg->afu;
2724
2725 return scnprintf(buf, PAGE_SIZE, "%s\n", hwq_mode_name[afu->hwq_mode]);
2726 }
2727
2728 /**
2729 * hwq_mode_store() - sets the HWQ steering mode for the host
2730 * @dev: Generic device associated with the host.
2731 * @attr: Device attribute representing the HWQ steering mode.
2732 * @buf: Buffer of length PAGE_SIZE containing the HWQ steering mode
2733 * as a character string.
2734 * @count: Length of data resizing in @buf.
2735 *
2736 * rr = Round-Robin
2737 * tag = Block MQ Tagging
2738 * cpu = CPU Affinity
2739 *
2740 * Return: The size of the ASCII string returned in @buf.
2741 */
2742 static ssize_t hwq_mode_store(struct device *dev,
2743 struct device_attribute *attr,
2744 const char *buf, size_t count)
2745 {
2746 struct Scsi_Host *shost = class_to_shost(dev);
2747 struct cxlflash_cfg *cfg = shost_priv(shost);
2748 struct device *cfgdev = &cfg->dev->dev;
2749 struct afu *afu = cfg->afu;
2750 int i;
2751 u32 mode = MAX_HWQ_MODE;
2752
2753 for (i = 0; i < MAX_HWQ_MODE; i++) {
2754 if (!strncmp(hwq_mode_name[i], buf, strlen(hwq_mode_name[i]))) {
2755 mode = i;
2756 break;
2757 }
2758 }
2759
2760 if (mode >= MAX_HWQ_MODE) {
2761 dev_info(cfgdev, "Invalid HWQ steering mode.\n");
2762 return -EINVAL;
2763 }
2764
2765 if ((mode == HWQ_MODE_TAG) && !shost_use_blk_mq(shost)) {
2766 dev_info(cfgdev, "SCSI-MQ is not enabled, use a different "
2767 "HWQ steering mode.\n");
2768 return -EINVAL;
2769 }
2770
2771 afu->hwq_mode = mode;
2772
2773 return count;
2774 }
2775
2776 /**
2777 * mode_show() - presents the current mode of the device
2778 * @dev: Generic device associated with the device.
2779 * @attr: Device attribute representing the device mode.
2780 * @buf: Buffer of length PAGE_SIZE to report back the dev mode in ASCII.
2781 *
2782 * Return: The size of the ASCII string returned in @buf.
2783 */
2784 static ssize_t mode_show(struct device *dev,
2785 struct device_attribute *attr, char *buf)
2786 {
2787 struct scsi_device *sdev = to_scsi_device(dev);
2788
2789 return scnprintf(buf, PAGE_SIZE, "%s\n",
2790 sdev->hostdata ? "superpipe" : "legacy");
2791 }
2792
2793 /*
2794 * Host attributes
2795 */
2796 static DEVICE_ATTR_RO(port0);
2797 static DEVICE_ATTR_RO(port1);
2798 static DEVICE_ATTR_RO(port2);
2799 static DEVICE_ATTR_RO(port3);
2800 static DEVICE_ATTR_RW(lun_mode);
2801 static DEVICE_ATTR_RO(ioctl_version);
2802 static DEVICE_ATTR_RO(port0_lun_table);
2803 static DEVICE_ATTR_RO(port1_lun_table);
2804 static DEVICE_ATTR_RO(port2_lun_table);
2805 static DEVICE_ATTR_RO(port3_lun_table);
2806 static DEVICE_ATTR_RW(irqpoll_weight);
2807 static DEVICE_ATTR_RW(num_hwqs);
2808 static DEVICE_ATTR_RW(hwq_mode);
2809
2810 static struct device_attribute *cxlflash_host_attrs[] = {
2811 &dev_attr_port0,
2812 &dev_attr_port1,
2813 &dev_attr_port2,
2814 &dev_attr_port3,
2815 &dev_attr_lun_mode,
2816 &dev_attr_ioctl_version,
2817 &dev_attr_port0_lun_table,
2818 &dev_attr_port1_lun_table,
2819 &dev_attr_port2_lun_table,
2820 &dev_attr_port3_lun_table,
2821 &dev_attr_irqpoll_weight,
2822 &dev_attr_num_hwqs,
2823 &dev_attr_hwq_mode,
2824 NULL
2825 };
2826
2827 /*
2828 * Device attributes
2829 */
2830 static DEVICE_ATTR_RO(mode);
2831
2832 static struct device_attribute *cxlflash_dev_attrs[] = {
2833 &dev_attr_mode,
2834 NULL
2835 };
2836
2837 /*
2838 * Host template
2839 */
2840 static struct scsi_host_template driver_template = {
2841 .module = THIS_MODULE,
2842 .name = CXLFLASH_ADAPTER_NAME,
2843 .info = cxlflash_driver_info,
2844 .ioctl = cxlflash_ioctl,
2845 .proc_name = CXLFLASH_NAME,
2846 .queuecommand = cxlflash_queuecommand,
2847 .eh_device_reset_handler = cxlflash_eh_device_reset_handler,
2848 .eh_host_reset_handler = cxlflash_eh_host_reset_handler,
2849 .change_queue_depth = cxlflash_change_queue_depth,
2850 .cmd_per_lun = CXLFLASH_MAX_CMDS_PER_LUN,
2851 .can_queue = CXLFLASH_MAX_CMDS,
2852 .cmd_size = sizeof(struct afu_cmd) + __alignof__(struct afu_cmd) - 1,
2853 .this_id = -1,
2854 .sg_tablesize = 1, /* No scatter gather support */
2855 .max_sectors = CXLFLASH_MAX_SECTORS,
2856 .use_clustering = ENABLE_CLUSTERING,
2857 .shost_attrs = cxlflash_host_attrs,
2858 .sdev_attrs = cxlflash_dev_attrs,
2859 };
2860
2861 /*
2862 * Device dependent values
2863 */
2864 static struct dev_dependent_vals dev_corsa_vals = { CXLFLASH_MAX_SECTORS,
2865 0ULL };
2866 static struct dev_dependent_vals dev_flash_gt_vals = { CXLFLASH_MAX_SECTORS,
2867 CXLFLASH_NOTIFY_SHUTDOWN };
2868 static struct dev_dependent_vals dev_briard_vals = { CXLFLASH_MAX_SECTORS,
2869 CXLFLASH_NOTIFY_SHUTDOWN };
2870
2871 /*
2872 * PCI device binding table
2873 */
2874 static struct pci_device_id cxlflash_pci_table[] = {
2875 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CORSA,
2876 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_corsa_vals},
2877 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_FLASH_GT,
2878 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_flash_gt_vals},
2879 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_BRIARD,
2880 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_briard_vals},
2881 {}
2882 };
2883
2884 MODULE_DEVICE_TABLE(pci, cxlflash_pci_table);
2885
2886 /**
2887 * cxlflash_worker_thread() - work thread handler for the AFU
2888 * @work: Work structure contained within cxlflash associated with host.
2889 *
2890 * Handles the following events:
2891 * - Link reset which cannot be performed on interrupt context due to
2892 * blocking up to a few seconds
2893 * - Rescan the host
2894 */
2895 static void cxlflash_worker_thread(struct work_struct *work)
2896 {
2897 struct cxlflash_cfg *cfg = container_of(work, struct cxlflash_cfg,
2898 work_q);
2899 struct afu *afu = cfg->afu;
2900 struct device *dev = &cfg->dev->dev;
2901 __be64 __iomem *fc_port_regs;
2902 int port;
2903 ulong lock_flags;
2904
2905 /* Avoid MMIO if the device has failed */
2906
2907 if (cfg->state != STATE_NORMAL)
2908 return;
2909
2910 spin_lock_irqsave(cfg->host->host_lock, lock_flags);
2911
2912 if (cfg->lr_state == LINK_RESET_REQUIRED) {
2913 port = cfg->lr_port;
2914 if (port < 0)
2915 dev_err(dev, "%s: invalid port index %d\n",
2916 __func__, port);
2917 else {
2918 spin_unlock_irqrestore(cfg->host->host_lock,
2919 lock_flags);
2920
2921 /* The reset can block... */
2922 fc_port_regs = get_fc_port_regs(cfg, port);
2923 afu_link_reset(afu, port, fc_port_regs);
2924 spin_lock_irqsave(cfg->host->host_lock, lock_flags);
2925 }
2926
2927 cfg->lr_state = LINK_RESET_COMPLETE;
2928 }
2929
2930 spin_unlock_irqrestore(cfg->host->host_lock, lock_flags);
2931
2932 if (atomic_dec_if_positive(&cfg->scan_host_needed) >= 0)
2933 scsi_scan_host(cfg->host);
2934 }
2935
2936 /**
2937 * cxlflash_probe() - PCI entry point to add host
2938 * @pdev: PCI device associated with the host.
2939 * @dev_id: PCI device id associated with device.
2940 *
2941 * The device will initially start out in a 'probing' state and
2942 * transition to the 'normal' state at the end of a successful
2943 * probe. Should an EEH event occur during probe, the notification
2944 * thread (error_detected()) will wait until the probe handler
2945 * is nearly complete. At that time, the device will be moved to
2946 * a 'probed' state and the EEH thread woken up to drive the slot
2947 * reset and recovery (device moves to 'normal' state). Meanwhile,
2948 * the probe will be allowed to exit successfully.
2949 *
2950 * Return: 0 on success, -errno on failure
2951 */
2952 static int cxlflash_probe(struct pci_dev *pdev,
2953 const struct pci_device_id *dev_id)
2954 {
2955 struct Scsi_Host *host;
2956 struct cxlflash_cfg *cfg = NULL;
2957 struct device *dev = &pdev->dev;
2958 struct dev_dependent_vals *ddv;
2959 int rc = 0;
2960 int k;
2961
2962 dev_dbg(&pdev->dev, "%s: Found CXLFLASH with IRQ: %d\n",
2963 __func__, pdev->irq);
2964
2965 ddv = (struct dev_dependent_vals *)dev_id->driver_data;
2966 driver_template.max_sectors = ddv->max_sectors;
2967
2968 host = scsi_host_alloc(&driver_template, sizeof(struct cxlflash_cfg));
2969 if (!host) {
2970 dev_err(dev, "%s: scsi_host_alloc failed\n", __func__);
2971 rc = -ENOMEM;
2972 goto out;
2973 }
2974
2975 host->max_id = CXLFLASH_MAX_NUM_TARGETS_PER_BUS;
2976 host->max_lun = CXLFLASH_MAX_NUM_LUNS_PER_TARGET;
2977 host->unique_id = host->host_no;
2978 host->max_cmd_len = CXLFLASH_MAX_CDB_LEN;
2979
2980 cfg = shost_priv(host);
2981 cfg->host = host;
2982 rc = alloc_mem(cfg);
2983 if (rc) {
2984 dev_err(dev, "%s: alloc_mem failed\n", __func__);
2985 rc = -ENOMEM;
2986 scsi_host_put(cfg->host);
2987 goto out;
2988 }
2989
2990 cfg->init_state = INIT_STATE_NONE;
2991 cfg->dev = pdev;
2992 cfg->cxl_fops = cxlflash_cxl_fops;
2993
2994 /*
2995 * Promoted LUNs move to the top of the LUN table. The rest stay on
2996 * the bottom half. The bottom half grows from the end (index = 255),
2997 * whereas the top half grows from the beginning (index = 0).
2998 *
2999 * Initialize the last LUN index for all possible ports.
3000 */
3001 cfg->promote_lun_index = 0;
3002
3003 for (k = 0; k < MAX_FC_PORTS; k++)
3004 cfg->last_lun_index[k] = CXLFLASH_NUM_VLUNS/2 - 1;
3005
3006 cfg->dev_id = (struct pci_device_id *)dev_id;
3007
3008 init_waitqueue_head(&cfg->tmf_waitq);
3009 init_waitqueue_head(&cfg->reset_waitq);
3010
3011 INIT_WORK(&cfg->work_q, cxlflash_worker_thread);
3012 cfg->lr_state = LINK_RESET_INVALID;
3013 cfg->lr_port = -1;
3014 spin_lock_init(&cfg->tmf_slock);
3015 mutex_init(&cfg->ctx_tbl_list_mutex);
3016 mutex_init(&cfg->ctx_recovery_mutex);
3017 init_rwsem(&cfg->ioctl_rwsem);
3018 INIT_LIST_HEAD(&cfg->ctx_err_recovery);
3019 INIT_LIST_HEAD(&cfg->lluns);
3020
3021 pci_set_drvdata(pdev, cfg);
3022
3023 cfg->cxl_afu = cxl_pci_to_afu(pdev);
3024
3025 rc = init_pci(cfg);
3026 if (rc) {
3027 dev_err(dev, "%s: init_pci failed rc=%d\n", __func__, rc);
3028 goto out_remove;
3029 }
3030 cfg->init_state = INIT_STATE_PCI;
3031
3032 rc = init_afu(cfg);
3033 if (rc && !wq_has_sleeper(&cfg->reset_waitq)) {
3034 dev_err(dev, "%s: init_afu failed rc=%d\n", __func__, rc);
3035 goto out_remove;
3036 }
3037 cfg->init_state = INIT_STATE_AFU;
3038
3039 rc = init_scsi(cfg);
3040 if (rc) {
3041 dev_err(dev, "%s: init_scsi failed rc=%d\n", __func__, rc);
3042 goto out_remove;
3043 }
3044 cfg->init_state = INIT_STATE_SCSI;
3045
3046 if (wq_has_sleeper(&cfg->reset_waitq)) {
3047 cfg->state = STATE_PROBED;
3048 wake_up_all(&cfg->reset_waitq);
3049 } else
3050 cfg->state = STATE_NORMAL;
3051 out:
3052 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
3053 return rc;
3054
3055 out_remove:
3056 cxlflash_remove(pdev);
3057 goto out;
3058 }
3059
3060 /**
3061 * cxlflash_pci_error_detected() - called when a PCI error is detected
3062 * @pdev: PCI device struct.
3063 * @state: PCI channel state.
3064 *
3065 * When an EEH occurs during an active reset, wait until the reset is
3066 * complete and then take action based upon the device state.
3067 *
3068 * Return: PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT
3069 */
3070 static pci_ers_result_t cxlflash_pci_error_detected(struct pci_dev *pdev,
3071 pci_channel_state_t state)
3072 {
3073 int rc = 0;
3074 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
3075 struct device *dev = &cfg->dev->dev;
3076
3077 dev_dbg(dev, "%s: pdev=%p state=%u\n", __func__, pdev, state);
3078
3079 switch (state) {
3080 case pci_channel_io_frozen:
3081 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET &&
3082 cfg->state != STATE_PROBING);
3083 if (cfg->state == STATE_FAILTERM)
3084 return PCI_ERS_RESULT_DISCONNECT;
3085
3086 cfg->state = STATE_RESET;
3087 scsi_block_requests(cfg->host);
3088 drain_ioctls(cfg);
3089 rc = cxlflash_mark_contexts_error(cfg);
3090 if (unlikely(rc))
3091 dev_err(dev, "%s: Failed to mark user contexts rc=%d\n",
3092 __func__, rc);
3093 term_afu(cfg);
3094 return PCI_ERS_RESULT_NEED_RESET;
3095 case pci_channel_io_perm_failure:
3096 cfg->state = STATE_FAILTERM;
3097 wake_up_all(&cfg->reset_waitq);
3098 scsi_unblock_requests(cfg->host);
3099 return PCI_ERS_RESULT_DISCONNECT;
3100 default:
3101 break;
3102 }
3103 return PCI_ERS_RESULT_NEED_RESET;
3104 }
3105
3106 /**
3107 * cxlflash_pci_slot_reset() - called when PCI slot has been reset
3108 * @pdev: PCI device struct.
3109 *
3110 * This routine is called by the pci error recovery code after the PCI
3111 * slot has been reset, just before we should resume normal operations.
3112 *
3113 * Return: PCI_ERS_RESULT_RECOVERED or PCI_ERS_RESULT_DISCONNECT
3114 */
3115 static pci_ers_result_t cxlflash_pci_slot_reset(struct pci_dev *pdev)
3116 {
3117 int rc = 0;
3118 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
3119 struct device *dev = &cfg->dev->dev;
3120
3121 dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev);
3122
3123 rc = init_afu(cfg);
3124 if (unlikely(rc)) {
3125 dev_err(dev, "%s: EEH recovery failed rc=%d\n", __func__, rc);
3126 return PCI_ERS_RESULT_DISCONNECT;
3127 }
3128
3129 return PCI_ERS_RESULT_RECOVERED;
3130 }
3131
3132 /**
3133 * cxlflash_pci_resume() - called when normal operation can resume
3134 * @pdev: PCI device struct
3135 */
3136 static void cxlflash_pci_resume(struct pci_dev *pdev)
3137 {
3138 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
3139 struct device *dev = &cfg->dev->dev;
3140
3141 dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev);
3142
3143 cfg->state = STATE_NORMAL;
3144 wake_up_all(&cfg->reset_waitq);
3145 scsi_unblock_requests(cfg->host);
3146 }
3147
3148 static const struct pci_error_handlers cxlflash_err_handler = {
3149 .error_detected = cxlflash_pci_error_detected,
3150 .slot_reset = cxlflash_pci_slot_reset,
3151 .resume = cxlflash_pci_resume,
3152 };
3153
3154 /*
3155 * PCI device structure
3156 */
3157 static struct pci_driver cxlflash_driver = {
3158 .name = CXLFLASH_NAME,
3159 .id_table = cxlflash_pci_table,
3160 .probe = cxlflash_probe,
3161 .remove = cxlflash_remove,
3162 .shutdown = cxlflash_remove,
3163 .err_handler = &cxlflash_err_handler,
3164 };
3165
3166 /**
3167 * init_cxlflash() - module entry point
3168 *
3169 * Return: 0 on success, -errno on failure
3170 */
3171 static int __init init_cxlflash(void)
3172 {
3173 check_sizes();
3174 cxlflash_list_init();
3175
3176 return pci_register_driver(&cxlflash_driver);
3177 }
3178
3179 /**
3180 * exit_cxlflash() - module exit point
3181 */
3182 static void __exit exit_cxlflash(void)
3183 {
3184 cxlflash_term_global_luns();
3185 cxlflash_free_errpage();
3186
3187 pci_unregister_driver(&cxlflash_driver);
3188 }
3189
3190 module_init(init_cxlflash);
3191 module_exit(exit_cxlflash);