2 * CXL Flash Device Driver
4 * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
5 * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
7 * Copyright (C) 2015 IBM Corporation
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
18 #include <linux/types.h>
20 typedef u16 ctx_hndl_t
;
21 typedef u32 res_hndl_t
;
24 #define SIZE_64K 65536
27 * IOARCB: 64 bytes, min 16 byte alignment required, host native endianness
28 * except for SCSI CDB which remains big endian per SCSI standards.
31 u16 ctx_id
; /* ctx_hndl_t */
33 #define SISL_REQ_FLAGS_RES_HNDL 0x8000U /* bit 0 (MSB) */
34 #define SISL_REQ_FLAGS_PORT_LUN_ID 0x0000U
36 #define SISL_REQ_FLAGS_SUP_UNDERRUN 0x4000U /* bit 1 */
38 #define SISL_REQ_FLAGS_TIMEOUT_SECS 0x0000U /* bits 8,9 */
39 #define SISL_REQ_FLAGS_TIMEOUT_MSECS 0x0040U
40 #define SISL_REQ_FLAGS_TIMEOUT_USECS 0x0080U
41 #define SISL_REQ_FLAGS_TIMEOUT_CYCLES 0x00C0U
43 #define SISL_REQ_FLAGS_TMF_CMD 0x0004u /* bit 13 */
45 #define SISL_REQ_FLAGS_AFU_CMD 0x0002U /* bit 14 */
47 #define SISL_REQ_FLAGS_HOST_WRITE 0x0001U /* bit 15 (LSB) */
48 #define SISL_REQ_FLAGS_HOST_READ 0x0000U
51 u32 res_hndl
; /* res_hndl_t */
52 u32 port_sel
; /* this is a selection mask:
53 * 0x1 -> port#0 can be selected,
54 * 0x2 -> port#1 can be selected.
55 * Can be bitwise ORed.
59 u32 data_len
; /* 4K for read/write */
62 u64 data_ea
; /* min 16 byte aligned */
65 u8 msi
; /* LISN to send on RRQ write */
66 #define SISL_MSI_CXL_PFAULT 0 /* reserved for CXL page faults */
67 #define SISL_MSI_SYNC_ERROR 1 /* recommended for AFU sync error */
68 #define SISL_MSI_RRQ_UPDATED 2 /* recommended for IO completion */
69 #define SISL_MSI_ASYNC_ERROR 3 /* master only - for AFU async error */
71 u8 rrq
; /* 0 for a single RRQ */
72 u16 timeout
; /* in units specified by req_flags */
74 u8 cdb
[16]; /* must be in big endian */
75 #define SISL_AFU_CMD_SYNC 0xC0 /* AFU sync command */
76 #define SISL_AFU_CMD_LUN_PROVISION 0xD0 /* AFU LUN provision command */
77 #define SISL_AFU_CMD_DEBUG 0xE0 /* AFU debug command */
79 #define SISL_AFU_LUN_PROVISION_CREATE 0x00 /* LUN provision create type */
80 #define SISL_AFU_LUN_PROVISION_DELETE 0x01 /* LUN provision delete type */
83 u64 reserved
; /* Reserved for IOARRIN mode */
84 struct sisl_ioasa
*ioasa
; /* IOASA EA for SQ Mode */
90 #define SISL_RC_FLAGS_SENSE_VALID 0x80U
91 #define SISL_RC_FLAGS_FCP_RSP_CODE_VALID 0x40U
92 #define SISL_RC_FLAGS_OVERRUN 0x20U
93 #define SISL_RC_FLAGS_UNDERRUN 0x10U
96 #define SISL_AFU_RC_RHT_INVALID 0x01U /* user error */
97 #define SISL_AFU_RC_RHT_UNALIGNED 0x02U /* should never happen */
98 #define SISL_AFU_RC_RHT_OUT_OF_BOUNDS 0x03u /* user error */
99 #define SISL_AFU_RC_RHT_DMA_ERR 0x04u /* see afu_extra
100 * may retry if afu_retry is off
101 * possible on master exit
103 #define SISL_AFU_RC_RHT_RW_PERM 0x05u /* no RW perms, user error */
104 #define SISL_AFU_RC_LXT_UNALIGNED 0x12U /* should never happen */
105 #define SISL_AFU_RC_LXT_OUT_OF_BOUNDS 0x13u /* user error */
106 #define SISL_AFU_RC_LXT_DMA_ERR 0x14u /* see afu_extra
107 * may retry if afu_retry is off
108 * possible on master exit
110 #define SISL_AFU_RC_LXT_RW_PERM 0x15u /* no RW perms, user error */
112 #define SISL_AFU_RC_NOT_XLATE_HOST 0x1au /* possible if master exited */
114 /* NO_CHANNELS means the FC ports selected by dest_port in
115 * IOARCB or in the LXT entry are down when the AFU tried to select
116 * a FC port. If the port went down on an active IO, it will set
117 * fc_rc to =0x54(NOLOGI) or 0x57(LINKDOWN) instead.
119 #define SISL_AFU_RC_NO_CHANNELS 0x20U /* see afu_extra, may retry */
120 #define SISL_AFU_RC_CAP_VIOLATION 0x21U /* either user error or
121 * afu reset/master restart
123 #define SISL_AFU_RC_OUT_OF_DATA_BUFS 0x30U /* always retry */
124 #define SISL_AFU_RC_DATA_DMA_ERR 0x31U /* see afu_extra
125 * may retry if afu_retry is off
128 u8 scsi_rc
; /* SCSI status byte, retry as appropriate */
129 #define SISL_SCSI_RC_CHECK 0x02U
130 #define SISL_SCSI_RC_BUSY 0x08u
132 u8 fc_rc
; /* retry */
134 * We should only see fc_rc=0x57 (LINKDOWN) or 0x54(NOLOGI) for
135 * commands that are in flight when a link goes down or is logged out.
136 * If the link is down or logged out before AFU selects the port, either
137 * it will choose the other port or we will get afu_rc=0x20 (no_channel)
138 * if there is no valid port to use.
140 * ABORTPEND/ABORTOK/ABORTFAIL/TGTABORT can be retried, typically these
141 * would happen if a frame is dropped and something times out.
142 * NOLOGI or LINKDOWN can be retried if the other port is up.
143 * RESIDERR can be retried as well.
145 * ABORTFAIL might indicate that lots of frames are getting CRC errors.
146 * So it maybe retried once and reset the link if it happens again.
147 * The link can also be reset on the CRC error threshold interrupt.
149 #define SISL_FC_RC_ABORTPEND 0x52 /* exchange timeout or abort request */
150 #define SISL_FC_RC_WRABORTPEND 0x53 /* due to write XFER_RDY invalid */
151 #define SISL_FC_RC_NOLOGI 0x54 /* port not logged in, in-flight cmds */
152 #define SISL_FC_RC_NOEXP 0x55 /* FC protocol error or HW bug */
153 #define SISL_FC_RC_INUSE 0x56 /* tag already in use, HW bug */
154 #define SISL_FC_RC_LINKDOWN 0x57 /* link down, in-flight cmds */
155 #define SISL_FC_RC_ABORTOK 0x58 /* pending abort completed w/success */
156 #define SISL_FC_RC_ABORTFAIL 0x59 /* pending abort completed w/fail */
157 #define SISL_FC_RC_RESID 0x5A /* ioasa underrun/overrun flags set */
158 #define SISL_FC_RC_RESIDERR 0x5B /* actual data len does not match SCSI
159 * reported len, possibly due to dropped
162 #define SISL_FC_RC_TGTABORT 0x5C /* command aborted by target */
165 #define SISL_SENSE_DATA_LEN 20 /* Sense data length */
166 #define SISL_WWID_DATA_LEN 16 /* WWID data length */
169 * IOASA: 64 bytes & must follow IOARCB, min 16 byte alignment required,
170 * host native endianness
176 #define SISL_IOASC_GOOD_COMPLETION 0x00000000U
186 /* when afu_rc=0x04, 0x14, 0x31 (_xxx_DMA_ERR):
187 * afu_exta contains PSL response code. Useful codes are:
189 #define SISL_AFU_DMA_ERR_PAGE_IN 0x0A /* AFU_retry_on_pagein Action
193 #define SISL_AFU_DMA_ERR_INVALID_EA 0x0B /* this is a hard error
195 * 0x04, 0x14 master exit.
198 /* when afu rc=0x20 (no channels):
199 * afu_extra bits [4:5]: available portmask, [6:7]: requested portmask.
201 #define SISL_AFU_NO_CLANNELS_AMASK(afu_extra) (((afu_extra) & 0x0C) >> 2)
202 #define SISL_AFU_NO_CLANNELS_RMASK(afu_extra) ((afu_extra) & 0x03)
208 u8 sense_data
[SISL_SENSE_DATA_LEN
];
211 u8 wwid
[SISL_WWID_DATA_LEN
];
215 /* These fields are defined by the SISlite architecture for the
216 * host to use as they see fit for their implementation.
224 #define SISL_RESP_HANDLE_T_BIT 0x1ULL /* Toggle bit */
226 /* MMIO space is required to support only 64-bit access */
229 * This AFU has two mechanisms to deal with endian-ness.
230 * One is a global configuration (in the afu_config) register
231 * below that specifies the endian-ness of the host.
232 * The other is a per context (i.e. application) specification
233 * controlled by the endian_ctrl field here. Since the master
234 * context is one such application the master context's
235 * endian-ness is set to be the same as the host.
237 * As per the SISlite spec, the MMIO registers are always
240 #define SISL_ENDIAN_CTRL_BE 0x8000000000000080ULL
241 #define SISL_ENDIAN_CTRL_LE 0x0000000000000000ULL
244 #define SISL_ENDIAN_CTRL SISL_ENDIAN_CTRL_BE
246 #define SISL_ENDIAN_CTRL SISL_ENDIAN_CTRL_LE
249 /* per context host transport MMIO */
250 struct sisl_host_map
{
251 __be64 endian_ctrl
; /* Per context Endian Control. The AFU will
252 * operate on whatever the context is of the
256 __be64 intr_status
; /* this sends LISN# programmed in ctx_ctrl.
257 * Only recovery in a PERM_ERR is a context
258 * exit since there is no way to tell which
259 * command caused the error.
261 #define SISL_ISTATUS_PERM_ERR_CMDROOM 0x0010ULL /* b59, user error */
262 #define SISL_ISTATUS_PERM_ERR_RCB_READ 0x0008ULL /* b60, user error */
263 #define SISL_ISTATUS_PERM_ERR_SA_WRITE 0x0004ULL /* b61, user error */
264 #define SISL_ISTATUS_PERM_ERR_RRQ_WRITE 0x0002ULL /* b62, user error */
265 /* Page in wait accessing RCB/IOASA/RRQ is reported in b63.
266 * Same error in data/LXT/RHT access is reported via IOASA.
268 #define SISL_ISTATUS_TEMP_ERR_PAGEIN 0x0001ULL /* b63, can be generated
271 * If user can determine
273 * caused the error, it
276 #define SISL_ISTATUS_UNMASK (0x001FULL) /* 1 means unmasked */
277 #define SISL_ISTATUS_MASK ~(SISL_ISTATUS_UNMASK) /* 1 means masked */
281 __be64 ioarrin
; /* only write what cmd_room permits */
282 __be64 rrq_start
; /* start & end are both inclusive */
283 __be64 rrq_end
; /* write sequence: start followed by end */
285 __be64 ctx_ctrl
; /* least significant byte or b56:63 is LISN# */
286 #define SISL_CTX_CTRL_UNMAP_SECTOR 0x8000000000000000ULL /* b0 */
287 __be64 mbox_w
; /* restricted use */
288 __be64 sq_start
; /* Submission Queue (R/W): write sequence and */
289 __be64 sq_end
; /* inclusion semantics are the same as RRQ */
290 __be64 sq_head
; /* Submission Queue Head (R): for debugging */
291 __be64 sq_tail
; /* Submission Queue TAIL (R/W): next IOARCB */
292 __be64 sq_ctx_reset
; /* Submission Queue Context Reset (R/W) */
295 /* per context provisioning & control MMIO */
296 struct sisl_ctrl_map
{
299 /* both cnt & ctx_id args must be ULL */
300 #define SISL_RHT_CNT_ID(cnt, ctx_id) (((cnt) << 48) | ((ctx_id) << 32))
302 __be64 ctx_cap
; /* afu_rc below is when the capability is violated */
303 #define SISL_CTX_CAP_PROXY_ISSUE 0x8000000000000000ULL /* afu_rc 0x21 */
304 #define SISL_CTX_CAP_REAL_MODE 0x4000000000000000ULL /* afu_rc 0x21 */
305 #define SISL_CTX_CAP_HOST_XLATE 0x2000000000000000ULL /* afu_rc 0x1a */
306 #define SISL_CTX_CAP_PROXY_TARGET 0x1000000000000000ULL /* afu_rc 0x21 */
307 #define SISL_CTX_CAP_AFU_CMD 0x0000000000000008ULL /* afu_rc 0x21 */
308 #define SISL_CTX_CAP_GSCSI_CMD 0x0000000000000004ULL /* afu_rc 0x21 */
309 #define SISL_CTX_CAP_WRITE_CMD 0x0000000000000002ULL /* afu_rc 0x21 */
310 #define SISL_CTX_CAP_READ_CMD 0x0000000000000001ULL /* afu_rc 0x21 */
314 /* single copy global regs */
315 struct sisl_global_regs
{
318 * In cxlflash, FC port/link are arranged in port pairs, each
319 * gets a byte of status:
321 * *_OTHER: other err, FC_ERRCAP[31:20]
322 * *_LOGO: target sent FLOGI/PLOGI/LOGO while logged in
323 * *_CRC_T: CRC threshold exceeded
324 * *_LOGI_R: login state machine timed out and retrying
325 * *_LOGI_F: login failed, FC_ERROR[19:0]
326 * *_LOGI_S: login succeeded
327 * *_LINK_DN: link online to offline
328 * *_LINK_UP: link offline to online
330 #define SISL_ASTATUS_FC2_OTHER 0x80000000ULL /* b32 */
331 #define SISL_ASTATUS_FC2_LOGO 0x40000000ULL /* b33 */
332 #define SISL_ASTATUS_FC2_CRC_T 0x20000000ULL /* b34 */
333 #define SISL_ASTATUS_FC2_LOGI_R 0x10000000ULL /* b35 */
334 #define SISL_ASTATUS_FC2_LOGI_F 0x08000000ULL /* b36 */
335 #define SISL_ASTATUS_FC2_LOGI_S 0x04000000ULL /* b37 */
336 #define SISL_ASTATUS_FC2_LINK_DN 0x02000000ULL /* b38 */
337 #define SISL_ASTATUS_FC2_LINK_UP 0x01000000ULL /* b39 */
339 #define SISL_ASTATUS_FC3_OTHER 0x00800000ULL /* b40 */
340 #define SISL_ASTATUS_FC3_LOGO 0x00400000ULL /* b41 */
341 #define SISL_ASTATUS_FC3_CRC_T 0x00200000ULL /* b42 */
342 #define SISL_ASTATUS_FC3_LOGI_R 0x00100000ULL /* b43 */
343 #define SISL_ASTATUS_FC3_LOGI_F 0x00080000ULL /* b44 */
344 #define SISL_ASTATUS_FC3_LOGI_S 0x00040000ULL /* b45 */
345 #define SISL_ASTATUS_FC3_LINK_DN 0x00020000ULL /* b46 */
346 #define SISL_ASTATUS_FC3_LINK_UP 0x00010000ULL /* b47 */
348 #define SISL_ASTATUS_FC0_OTHER 0x00008000ULL /* b48 */
349 #define SISL_ASTATUS_FC0_LOGO 0x00004000ULL /* b49 */
350 #define SISL_ASTATUS_FC0_CRC_T 0x00002000ULL /* b50 */
351 #define SISL_ASTATUS_FC0_LOGI_R 0x00001000ULL /* b51 */
352 #define SISL_ASTATUS_FC0_LOGI_F 0x00000800ULL /* b52 */
353 #define SISL_ASTATUS_FC0_LOGI_S 0x00000400ULL /* b53 */
354 #define SISL_ASTATUS_FC0_LINK_DN 0x00000200ULL /* b54 */
355 #define SISL_ASTATUS_FC0_LINK_UP 0x00000100ULL /* b55 */
357 #define SISL_ASTATUS_FC1_OTHER 0x00000080ULL /* b56 */
358 #define SISL_ASTATUS_FC1_LOGO 0x00000040ULL /* b57 */
359 #define SISL_ASTATUS_FC1_CRC_T 0x00000020ULL /* b58 */
360 #define SISL_ASTATUS_FC1_LOGI_R 0x00000010ULL /* b59 */
361 #define SISL_ASTATUS_FC1_LOGI_F 0x00000008ULL /* b60 */
362 #define SISL_ASTATUS_FC1_LOGI_S 0x00000004ULL /* b61 */
363 #define SISL_ASTATUS_FC1_LINK_DN 0x00000002ULL /* b62 */
364 #define SISL_ASTATUS_FC1_LINK_UP 0x00000001ULL /* b63 */
366 #define SISL_FC_INTERNAL_UNMASK 0x0000000300000000ULL /* 1 means unmasked */
367 #define SISL_FC_INTERNAL_MASK ~(SISL_FC_INTERNAL_UNMASK)
368 #define SISL_FC_INTERNAL_SHIFT 32
370 #define SISL_FC_SHUTDOWN_NORMAL 0x0000000000000010ULL
371 #define SISL_FC_SHUTDOWN_ABRUPT 0x0000000000000020ULL
373 #define SISL_STATUS_SHUTDOWN_ACTIVE 0x0000000000000010ULL
374 #define SISL_STATUS_SHUTDOWN_COMPLETE 0x0000000000000020ULL
376 #define SISL_ASTATUS_UNMASK 0xFFFFFFFFULL /* 1 means unmasked */
377 #define SISL_ASTATUS_MASK ~(SISL_ASTATUS_UNMASK) /* 1 means masked */
383 __be64 afu_scratch_pad
;
385 #define SISL_AFUCONF_AR_IOARCB 0x4000ULL
386 #define SISL_AFUCONF_AR_LXT 0x2000ULL
387 #define SISL_AFUCONF_AR_RHT 0x1000ULL
388 #define SISL_AFUCONF_AR_DATA 0x0800ULL
389 #define SISL_AFUCONF_AR_RSRC 0x0400ULL
390 #define SISL_AFUCONF_AR_IOASA 0x0200ULL
391 #define SISL_AFUCONF_AR_RRQ 0x0100ULL
392 /* Aggregate all Auto Retry Bits */
393 #define SISL_AFUCONF_AR_ALL (SISL_AFUCONF_AR_IOARCB|SISL_AFUCONF_AR_LXT| \
394 SISL_AFUCONF_AR_RHT|SISL_AFUCONF_AR_DATA| \
395 SISL_AFUCONF_AR_RSRC|SISL_AFUCONF_AR_IOASA| \
398 #define SISL_AFUCONF_ENDIAN 0x0000ULL
400 #define SISL_AFUCONF_ENDIAN 0x0020ULL
402 #define SISL_AFUCONF_MBOX_CLR_READ 0x0010ULL
406 __be64 interface_version
;
407 #define SISL_INTVER_CAP_SHIFT 16
408 #define SISL_INTVER_MAJ_SHIFT 8
409 #define SISL_INTVER_CAP_MASK 0xFFFFFFFF00000000ULL
410 #define SISL_INTVER_MAJ_MASK 0x00000000FFFF0000ULL
411 #define SISL_INTVER_MIN_MASK 0x000000000000FFFFULL
412 #define SISL_INTVER_CAP_IOARRIN_CMD_MODE 0x800000000000ULL
413 #define SISL_INTVER_CAP_SQ_CMD_MODE 0x400000000000ULL
414 #define SISL_INTVER_CAP_RESERVED_CMD_MODE_A 0x200000000000ULL
415 #define SISL_INTVER_CAP_RESERVED_CMD_MODE_B 0x100000000000ULL
416 #define SISL_INTVER_CAP_LUN_PROVISION 0x080000000000ULL
417 #define SISL_INTVER_CAP_AFU_DEBUG 0x040000000000ULL
420 #define CXLFLASH_NUM_FC_PORTS_PER_BANK 2 /* fixed # of ports per bank */
421 #define CXLFLASH_MAX_FC_BANKS 2 /* max # of banks supported */
422 #define CXLFLASH_MAX_FC_PORTS (CXLFLASH_NUM_FC_PORTS_PER_BANK * \
423 CXLFLASH_MAX_FC_BANKS)
424 #define CXLFLASH_MAX_CONTEXT 512 /* number of contexts per AFU */
425 #define CXLFLASH_NUM_VLUNS 512 /* number of vluns per AFU/port */
426 #define CXLFLASH_NUM_REGS 512 /* number of registers per port */
428 struct fc_port_bank
{
429 __be64 fc_port_regs
[CXLFLASH_NUM_FC_PORTS_PER_BANK
][CXLFLASH_NUM_REGS
];
430 __be64 fc_port_luns
[CXLFLASH_NUM_FC_PORTS_PER_BANK
][CXLFLASH_NUM_VLUNS
];
433 struct sisl_global_map
{
435 struct sisl_global_regs regs
;
436 char page0
[SIZE_4K
]; /* page 0 */
439 char page1
[SIZE_4K
]; /* page 1 */
441 struct fc_port_bank bank
[CXLFLASH_MAX_FC_BANKS
]; /* pages 2 - 9 */
443 /* pages 10 - 15 are reserved */
448 * CXL Flash Memory Map
450 * +-------------------------------+
451 * | 512 * 64 KB User MMIO |
453 * | User Accessible |
454 * +-------------------------------+
455 * | 512 * 128 B per context |
456 * | Provisioning and Control |
457 * | Trusted Process accessible |
458 * +-------------------------------+
460 * | Trusted Process accessible |
461 * +-------------------------------+
463 struct cxlflash_afu_map
{
465 struct sisl_host_map host
;
466 char harea
[SIZE_64K
]; /* 64KB each */
467 } hosts
[CXLFLASH_MAX_CONTEXT
];
470 struct sisl_ctrl_map ctrl
;
471 char carea
[cache_line_size()]; /* 128B each */
472 } ctrls
[CXLFLASH_MAX_CONTEXT
];
475 struct sisl_global_map global
;
476 char garea
[SIZE_64K
]; /* 64KB single block */
481 * LXT - LBA Translation Table
484 struct sisl_lxt_entry
{
485 u64 rlba_base
; /* bits 0:47 is base
486 * b48:55 is lun index
487 * b58:59 is write & read perms
488 * (if no perm, afu_rc=0x15)
489 * b60:63 is port_sel mask
494 * RHT - Resource Handle Table
495 * Per the SISlite spec, RHT entries are to be 16-byte aligned
497 struct sisl_rht_entry
{
498 struct sisl_lxt_entry
*lxt_start
;
501 u8 fp
; /* format & perm nibbles.
502 * (if no perm, afu_rc=0x05)
505 } __packed
__aligned(16);
507 struct sisl_rht_entry_f1
{
519 } __packed
__aligned(16);
521 /* make the fp byte */
522 #define SISL_RHT_FP(fmt, perm) (((fmt) << 4) | (perm))
524 /* make the fp byte for a clone from a source fp and clone flags
525 * flags must be only 2 LSB bits.
527 #define SISL_RHT_FP_CLONE(src_fp, cln_flags) ((src_fp) & (0xFC | (cln_flags)))
529 #define RHT_PERM_READ 0x01U
530 #define RHT_PERM_WRITE 0x02U
531 #define RHT_PERM_RW (RHT_PERM_READ | RHT_PERM_WRITE)
533 /* extract the perm bits from a fp */
534 #define SISL_RHT_PERM(fp) ((fp) & RHT_PERM_RW)
540 #define PORT_MASK(_n) ((1 << (_n)) - 1)
542 /* AFU Sync Mode byte */
543 #define AFU_LW_SYNC 0x0U
544 #define AFU_HW_SYNC 0x1U
545 #define AFU_GSYNC 0x2U
547 /* Special Task Management Function CDB */
548 #define TMF_LUN_RESET 0x1U
549 #define TMF_CLEAR_ACA 0x2U
552 #define SISLITE_MAX_WS_BLOCKS 512
554 #endif /* _SISLITE_H */