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Merge v4.13 intel_pstate fixes.
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1 /*
2 * Copyright (c) 2015 Linaro Ltd.
3 * Copyright (c) 2015 Hisilicon Limited.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 */
11
12 #ifndef _HISI_SAS_H_
13 #define _HISI_SAS_H_
14
15 #include <linux/acpi.h>
16 #include <linux/clk.h>
17 #include <linux/dmapool.h>
18 #include <linux/mfd/syscon.h>
19 #include <linux/module.h>
20 #include <linux/of_address.h>
21 #include <linux/pci.h>
22 #include <linux/platform_device.h>
23 #include <linux/property.h>
24 #include <linux/regmap.h>
25 #include <scsi/sas_ata.h>
26 #include <scsi/libsas.h>
27
28 #define DRV_VERSION "v1.6"
29
30 #define HISI_SAS_MAX_PHYS 9
31 #define HISI_SAS_MAX_QUEUES 32
32 #define HISI_SAS_QUEUE_SLOTS 512
33 #define HISI_SAS_MAX_ITCT_ENTRIES 2048
34 #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
35 #define HISI_SAS_RESET_BIT 0
36
37 #define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer))
38 #define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table))
39
40 #define hisi_sas_status_buf_addr(buf) \
41 (buf + offsetof(struct hisi_sas_slot_buf_table, status_buffer))
42 #define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr(slot->buf)
43 #define hisi_sas_status_buf_addr_dma(slot) \
44 hisi_sas_status_buf_addr(slot->buf_dma)
45
46 #define hisi_sas_cmd_hdr_addr(buf) \
47 (buf + offsetof(struct hisi_sas_slot_buf_table, command_header))
48 #define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr(slot->buf)
49 #define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr(slot->buf_dma)
50
51 #define hisi_sas_sge_addr(buf) \
52 (buf + offsetof(struct hisi_sas_slot_buf_table, sge_page))
53 #define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr(slot->buf)
54 #define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr(slot->buf_dma)
55
56 #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
57 #define HISI_SAS_MAX_SMP_RESP_SZ 1028
58 #define HISI_SAS_MAX_STP_RESP_SZ 28
59
60 #define DEV_IS_EXPANDER(type) \
61 ((type == SAS_EDGE_EXPANDER_DEVICE) || \
62 (type == SAS_FANOUT_EXPANDER_DEVICE))
63
64 #define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1
65 #define HISI_SAS_SATA_PROTOCOL_PIO 0x2
66 #define HISI_SAS_SATA_PROTOCOL_DMA 0x4
67 #define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8
68 #define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10
69
70 struct hisi_hba;
71
72 enum {
73 PORT_TYPE_SAS = (1U << 1),
74 PORT_TYPE_SATA = (1U << 0),
75 };
76
77 enum dev_status {
78 HISI_SAS_DEV_NORMAL,
79 HISI_SAS_DEV_EH,
80 };
81
82 enum {
83 HISI_SAS_INT_ABT_CMD = 0,
84 HISI_SAS_INT_ABT_DEV = 1,
85 };
86
87 enum hisi_sas_dev_type {
88 HISI_SAS_DEV_TYPE_STP = 0,
89 HISI_SAS_DEV_TYPE_SSP,
90 HISI_SAS_DEV_TYPE_SATA,
91 };
92
93 struct hisi_sas_phy {
94 struct hisi_hba *hisi_hba;
95 struct hisi_sas_port *port;
96 struct asd_sas_phy sas_phy;
97 struct sas_identify identify;
98 struct timer_list timer;
99 struct work_struct phyup_ws;
100 u64 port_id; /* from hw */
101 u64 dev_sas_addr;
102 u64 frame_rcvd_size;
103 u8 frame_rcvd[32];
104 u8 phy_attached;
105 u8 reserved[3];
106 u32 phy_type;
107 enum sas_linkrate minimum_linkrate;
108 enum sas_linkrate maximum_linkrate;
109 };
110
111 struct hisi_sas_port {
112 struct asd_sas_port sas_port;
113 u8 port_attached;
114 u8 id; /* from hw */
115 };
116
117 struct hisi_sas_cq {
118 struct hisi_hba *hisi_hba;
119 struct tasklet_struct tasklet;
120 int rd_point;
121 int id;
122 };
123
124 struct hisi_sas_dq {
125 struct hisi_hba *hisi_hba;
126 struct hisi_sas_slot *slot_prep;
127 spinlock_t lock;
128 int wr_point;
129 int id;
130 };
131
132 struct hisi_sas_device {
133 struct hisi_hba *hisi_hba;
134 struct domain_device *sas_device;
135 struct hisi_sas_dq *dq;
136 struct list_head list;
137 u64 attached_phy;
138 atomic64_t running_req;
139 enum sas_device_type dev_type;
140 int device_id;
141 int sata_idx;
142 u8 dev_status;
143 };
144
145 struct hisi_sas_slot {
146 struct list_head entry;
147 struct sas_task *task;
148 struct hisi_sas_port *port;
149 u64 n_elem;
150 int dlvry_queue;
151 int dlvry_queue_slot;
152 int cmplt_queue;
153 int cmplt_queue_slot;
154 int idx;
155 int abort;
156 void *buf;
157 dma_addr_t buf_dma;
158 void *cmd_hdr;
159 dma_addr_t cmd_hdr_dma;
160 struct work_struct abort_slot;
161 struct timer_list internal_abort_timer;
162 };
163
164 struct hisi_sas_tmf_task {
165 u8 tmf;
166 u16 tag_of_task_to_be_managed;
167 };
168
169 struct hisi_sas_hw {
170 int (*hw_init)(struct hisi_hba *hisi_hba);
171 void (*setup_itct)(struct hisi_hba *hisi_hba,
172 struct hisi_sas_device *device);
173 int (*slot_index_alloc)(struct hisi_hba *hisi_hba, int *slot_idx,
174 struct domain_device *device);
175 struct hisi_sas_device *(*alloc_dev)(struct domain_device *device);
176 void (*sl_notify)(struct hisi_hba *hisi_hba, int phy_no);
177 int (*get_free_slot)(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq);
178 void (*start_delivery)(struct hisi_sas_dq *dq);
179 int (*prep_ssp)(struct hisi_hba *hisi_hba,
180 struct hisi_sas_slot *slot, int is_tmf,
181 struct hisi_sas_tmf_task *tmf);
182 int (*prep_smp)(struct hisi_hba *hisi_hba,
183 struct hisi_sas_slot *slot);
184 int (*prep_stp)(struct hisi_hba *hisi_hba,
185 struct hisi_sas_slot *slot);
186 int (*prep_abort)(struct hisi_hba *hisi_hba,
187 struct hisi_sas_slot *slot,
188 int device_id, int abort_flag, int tag_to_abort);
189 int (*slot_complete)(struct hisi_hba *hisi_hba,
190 struct hisi_sas_slot *slot);
191 void (*phys_init)(struct hisi_hba *hisi_hba);
192 void (*phy_enable)(struct hisi_hba *hisi_hba, int phy_no);
193 void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no);
194 void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no);
195 void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no,
196 struct sas_phy_linkrates *linkrates);
197 enum sas_linkrate (*phy_get_max_linkrate)(void);
198 void (*free_device)(struct hisi_hba *hisi_hba,
199 struct hisi_sas_device *dev);
200 int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id);
201 void (*dereg_device)(struct hisi_hba *hisi_hba,
202 struct domain_device *device);
203 int (*soft_reset)(struct hisi_hba *hisi_hba);
204 int max_command_entries;
205 int complete_hdr_size;
206 };
207
208 struct hisi_hba {
209 /* This must be the first element, used by SHOST_TO_SAS_HA */
210 struct sas_ha_struct *p;
211
212 struct platform_device *platform_dev;
213 struct pci_dev *pci_dev;
214 struct device *dev;
215
216 void __iomem *regs;
217 struct regmap *ctrl;
218 u32 ctrl_reset_reg;
219 u32 ctrl_reset_sts_reg;
220 u32 ctrl_clock_ena_reg;
221 u32 refclk_frequency_mhz;
222 u8 sas_addr[SAS_ADDR_SIZE];
223
224 int n_phy;
225 spinlock_t lock;
226
227 struct timer_list timer;
228 struct workqueue_struct *wq;
229
230 int slot_index_count;
231 unsigned long *slot_index_tags;
232 unsigned long reject_stp_links_msk;
233
234 /* SCSI/SAS glue */
235 struct sas_ha_struct sha;
236 struct Scsi_Host *shost;
237
238 struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
239 struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES];
240 struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
241 struct hisi_sas_port port[HISI_SAS_MAX_PHYS];
242
243 int queue_count;
244
245 struct dma_pool *buffer_pool;
246 struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES];
247 struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES];
248 dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
249 void *complete_hdr[HISI_SAS_MAX_QUEUES];
250 dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
251 struct hisi_sas_initial_fis *initial_fis;
252 dma_addr_t initial_fis_dma;
253 struct hisi_sas_itct *itct;
254 dma_addr_t itct_dma;
255 struct hisi_sas_iost *iost;
256 dma_addr_t iost_dma;
257 struct hisi_sas_breakpoint *breakpoint;
258 dma_addr_t breakpoint_dma;
259 struct hisi_sas_breakpoint *sata_breakpoint;
260 dma_addr_t sata_breakpoint_dma;
261 struct hisi_sas_slot *slot_info;
262 unsigned long flags;
263 const struct hisi_sas_hw *hw; /* Low level hw interface */
264 unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)];
265 struct work_struct rst_work;
266 };
267
268 /* Generic HW DMA host memory structures */
269 /* Delivery queue header */
270 struct hisi_sas_cmd_hdr {
271 /* dw0 */
272 __le32 dw0;
273
274 /* dw1 */
275 __le32 dw1;
276
277 /* dw2 */
278 __le32 dw2;
279
280 /* dw3 */
281 __le32 transfer_tags;
282
283 /* dw4 */
284 __le32 data_transfer_len;
285
286 /* dw5 */
287 __le32 first_burst_num;
288
289 /* dw6 */
290 __le32 sg_len;
291
292 /* dw7 */
293 __le32 dw7;
294
295 /* dw8-9 */
296 __le64 cmd_table_addr;
297
298 /* dw10-11 */
299 __le64 sts_buffer_addr;
300
301 /* dw12-13 */
302 __le64 prd_table_addr;
303
304 /* dw14-15 */
305 __le64 dif_prd_table_addr;
306 };
307
308 struct hisi_sas_itct {
309 __le64 qw0;
310 __le64 sas_addr;
311 __le64 qw2;
312 __le64 qw3;
313 __le64 qw4_15[12];
314 };
315
316 struct hisi_sas_iost {
317 __le64 qw0;
318 __le64 qw1;
319 __le64 qw2;
320 __le64 qw3;
321 };
322
323 struct hisi_sas_err_record {
324 u32 data[4];
325 };
326
327 struct hisi_sas_initial_fis {
328 struct hisi_sas_err_record err_record;
329 struct dev_to_host_fis fis;
330 u32 rsvd[3];
331 };
332
333 struct hisi_sas_breakpoint {
334 u8 data[128]; /*io128 byte*/
335 };
336
337 struct hisi_sas_sge {
338 __le64 addr;
339 __le32 page_ctrl_0;
340 __le32 page_ctrl_1;
341 __le32 data_len;
342 __le32 data_off;
343 };
344
345 struct hisi_sas_command_table_smp {
346 u8 bytes[44];
347 };
348
349 struct hisi_sas_command_table_stp {
350 struct host_to_dev_fis command_fis;
351 u8 dummy[12];
352 u8 atapi_cdb[ATAPI_CDB_LEN];
353 };
354
355 #define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE
356 struct hisi_sas_sge_page {
357 struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
358 } __aligned(16);
359
360 struct hisi_sas_command_table_ssp {
361 struct ssp_frame_hdr hdr;
362 union {
363 struct {
364 struct ssp_command_iu task;
365 u32 prot[6];
366 };
367 struct ssp_tmf_iu ssp_task;
368 struct xfer_rdy_iu xfer_rdy;
369 struct ssp_response_iu ssp_res;
370 } u;
371 };
372
373 union hisi_sas_command_table {
374 struct hisi_sas_command_table_ssp ssp;
375 struct hisi_sas_command_table_smp smp;
376 struct hisi_sas_command_table_stp stp;
377 } __aligned(16);
378
379 struct hisi_sas_status_buffer {
380 struct hisi_sas_err_record err;
381 u8 iu[1024];
382 } __aligned(16);
383
384 struct hisi_sas_slot_buf_table {
385 struct hisi_sas_status_buffer status_buffer;
386 union hisi_sas_command_table command_header;
387 struct hisi_sas_sge_page sge_page;
388 };
389
390 extern struct scsi_transport_template *hisi_sas_stt;
391 extern struct scsi_host_template *hisi_sas_sht;
392
393 extern void hisi_sas_init_add(struct hisi_hba *hisi_hba);
394 extern int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost);
395 extern void hisi_sas_free(struct hisi_hba *hisi_hba);
396 extern u8 hisi_sas_get_ata_protocol(u8 cmd, int direction);
397 extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port);
398 extern void hisi_sas_sata_done(struct sas_task *task,
399 struct hisi_sas_slot *slot);
400 extern int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag);
401 extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba);
402 extern int hisi_sas_probe(struct platform_device *pdev,
403 const struct hisi_sas_hw *ops);
404 extern int hisi_sas_remove(struct platform_device *pdev);
405
406 extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy);
407 extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
408 struct sas_task *task,
409 struct hisi_sas_slot *slot);
410 extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba);
411 extern void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 old_state,
412 u32 state);
413 #endif