drivers/scsi/hisi_sas/hisi_sas.h

   1 /*
   2  * Copyright (c) 2015 Linaro Ltd.
   3  * Copyright (c) 2015 Hisilicon Limited.
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  */
  11
  12 #ifndef _HISI_SAS_H_
  13 #define _HISI_SAS_H_
  14
  15 #include <linux/acpi.h>
  16 #include <linux/clk.h>
  17 #include <linux/dmapool.h>
  18 #include <linux/mfd/syscon.h>
  19 #include <linux/module.h>
  20 #include <linux/of_address.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/property.h>
  23 #include <linux/regmap.h>
  24 #include <scsi/sas_ata.h>
  25 #include <scsi/libsas.h>
  26
  27 #define DRV_VERSION "v1.6"
  28
  29 #define HISI_SAS_MAX_PHYS       9
  30 #define HISI_SAS_MAX_QUEUES     32
  31 #define HISI_SAS_QUEUE_SLOTS 512
  32 #define HISI_SAS_MAX_ITCT_ENTRIES 2048
  33 #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
  34
  35 #define HISI_SAS_STATUS_BUF_SZ \
  36                 (sizeof(struct hisi_sas_err_record) + 1024)
  37 #define HISI_SAS_COMMAND_TABLE_SZ \
  38                 (((sizeof(union hisi_sas_command_table)+3)/4)*4)
  39
  40 #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
  41 #define HISI_SAS_MAX_SMP_RESP_SZ 1028
  42 #define HISI_SAS_MAX_STP_RESP_SZ 28
  43
  44 #define DEV_IS_EXPANDER(type) \
  45         ((type == SAS_EDGE_EXPANDER_DEVICE) || \
  46         (type == SAS_FANOUT_EXPANDER_DEVICE))
  47
  48 struct hisi_hba;
  49
  50 enum {
  51         PORT_TYPE_SAS = (1U << 1),
  52         PORT_TYPE_SATA = (1U << 0),
  53 };
  54
  55 enum dev_status {
  56         HISI_SAS_DEV_NORMAL,
  57         HISI_SAS_DEV_EH,
  58 };
  59
  60 enum {
  61         HISI_SAS_INT_ABT_CMD = 0,
  62         HISI_SAS_INT_ABT_DEV = 1,
  63 };
  64
  65 enum hisi_sas_dev_type {
  66         HISI_SAS_DEV_TYPE_STP = 0,
  67         HISI_SAS_DEV_TYPE_SSP,
  68         HISI_SAS_DEV_TYPE_SATA,
  69 };
  70
  71 struct hisi_sas_phy {
  72         struct hisi_hba *hisi_hba;
  73         struct hisi_sas_port    *port;
  74         struct asd_sas_phy      sas_phy;
  75         struct sas_identify     identify;
  76         struct timer_list       timer;
  77         struct work_struct      phyup_ws;
  78         u64             port_id; /* from hw */
  79         u64             dev_sas_addr;
  80         u64             phy_type;
  81         u64             frame_rcvd_size;
  82         u8              frame_rcvd[32];
  83         u8              phy_attached;
  84         u8              reserved[3];
  85         enum sas_linkrate       minimum_linkrate;
  86         enum sas_linkrate       maximum_linkrate;
  87 };
  88
  89 struct hisi_sas_port {
  90         struct asd_sas_port     sas_port;
  91         u8      port_attached;
  92         u8      id; /* from hw */
  93         struct list_head        list;
  94 };
  95
  96 struct hisi_sas_cq {
  97         struct hisi_hba *hisi_hba;
  98         int     rd_point;
  99         int     id;
 100 };
 101
 102 struct hisi_sas_dq {
 103         struct hisi_hba *hisi_hba;
 104         int     wr_point;
 105         int     id;
 106 };
 107
 108 struct hisi_sas_device {
 109         enum sas_device_type    dev_type;
 110         struct hisi_hba         *hisi_hba;
 111         struct domain_device    *sas_device;
 112         u64 attached_phy;
 113         u64 device_id;
 114         atomic64_t running_req;
 115         u8 dev_status;
 116 };
 117
 118 struct hisi_sas_slot {
 119         struct list_head entry;
 120         struct sas_task *task;
 121         struct hisi_sas_port    *port;
 122         u64     n_elem;
 123         int     dlvry_queue;
 124         int     dlvry_queue_slot;
 125         int     cmplt_queue;
 126         int     cmplt_queue_slot;
 127         int     idx;
 128         int     abort;
 129         void    *cmd_hdr;
 130         dma_addr_t cmd_hdr_dma;
 131         void    *status_buffer;
 132         dma_addr_t status_buffer_dma;
 133         void *command_table;
 134         dma_addr_t command_table_dma;
 135         struct hisi_sas_sge_page *sge_page;
 136         dma_addr_t sge_page_dma;
 137         struct work_struct abort_slot;
 138 };
 139
 140 struct hisi_sas_tmf_task {
 141         u8 tmf;
 142         u16 tag_of_task_to_be_managed;
 143 };
 144
 145 struct hisi_sas_hw {
 146         int (*hw_init)(struct hisi_hba *hisi_hba);
 147         void (*setup_itct)(struct hisi_hba *hisi_hba,
 148                            struct hisi_sas_device *device);
 149         int (*slot_index_alloc)(struct hisi_hba *hisi_hba, int *slot_idx,
 150                                 struct domain_device *device);
 151         struct hisi_sas_device *(*alloc_dev)(struct domain_device *device);
 152         void (*sl_notify)(struct hisi_hba *hisi_hba, int phy_no);
 153         int (*get_free_slot)(struct hisi_hba *hisi_hba, u32 dev_id,
 154                         int *q, int *s);
 155         void (*start_delivery)(struct hisi_hba *hisi_hba);
 156         int (*prep_ssp)(struct hisi_hba *hisi_hba,
 157                         struct hisi_sas_slot *slot, int is_tmf,
 158                         struct hisi_sas_tmf_task *tmf);
 159         int (*prep_smp)(struct hisi_hba *hisi_hba,
 160                         struct hisi_sas_slot *slot);
 161         int (*prep_stp)(struct hisi_hba *hisi_hba,
 162                         struct hisi_sas_slot *slot);
 163         int (*prep_abort)(struct hisi_hba *hisi_hba,
 164                           struct hisi_sas_slot *slot,
 165                           int device_id, int abort_flag, int tag_to_abort);
 166         int (*slot_complete)(struct hisi_hba *hisi_hba,
 167                              struct hisi_sas_slot *slot, int abort);
 168         void (*phy_enable)(struct hisi_hba *hisi_hba, int phy_no);
 169         void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no);
 170         void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no);
 171         void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no,
 172                         struct sas_phy_linkrates *linkrates);
 173         enum sas_linkrate (*phy_get_max_linkrate)(void);
 174         void (*free_device)(struct hisi_hba *hisi_hba,
 175                             struct hisi_sas_device *dev);
 176         int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id);
 177         int max_command_entries;
 178         int complete_hdr_size;
 179 };
 180
 181 struct hisi_hba {
 182         /* This must be the first element, used by SHOST_TO_SAS_HA */
 183         struct sas_ha_struct *p;
 184
 185         struct platform_device *pdev;
 186         void __iomem *regs;
 187         struct regmap *ctrl;
 188         u32 ctrl_reset_reg;
 189         u32 ctrl_reset_sts_reg;
 190         u32 ctrl_clock_ena_reg;
 191         u32 refclk_frequency_mhz;
 192         u8 sas_addr[SAS_ADDR_SIZE];
 193
 194         int n_phy;
 195         int scan_finished;
 196         spinlock_t lock;
 197
 198         struct timer_list timer;
 199         struct workqueue_struct *wq;
 200
 201         int slot_index_count;
 202         unsigned long *slot_index_tags;
 203
 204         /* SCSI/SAS glue */
 205         struct sas_ha_struct sha;
 206         struct Scsi_Host *shost;
 207
 208         struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
 209         struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES];
 210         struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
 211         struct hisi_sas_port port[HISI_SAS_MAX_PHYS];
 212
 213         int     queue_count;
 214         struct hisi_sas_slot    *slot_prep;
 215
 216         struct dma_pool *sge_page_pool;
 217         struct hisi_sas_device  devices[HISI_SAS_MAX_DEVICES];
 218         struct dma_pool *command_table_pool;
 219         struct dma_pool *status_buffer_pool;
 220         struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES];
 221         dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
 222         void *complete_hdr[HISI_SAS_MAX_QUEUES];
 223         dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
 224         struct hisi_sas_initial_fis *initial_fis;
 225         dma_addr_t initial_fis_dma;
 226         struct hisi_sas_itct *itct;
 227         dma_addr_t itct_dma;
 228         struct hisi_sas_iost *iost;
 229         dma_addr_t iost_dma;
 230         struct hisi_sas_breakpoint *breakpoint;
 231         dma_addr_t breakpoint_dma;
 232         struct hisi_sas_breakpoint *sata_breakpoint;
 233         dma_addr_t sata_breakpoint_dma;
 234         struct hisi_sas_slot    *slot_info;
 235         const struct hisi_sas_hw *hw;   /* Low level hw interface */
 236 };
 237
 238 /* Generic HW DMA host memory structures */
 239 /* Delivery queue header */
 240 struct hisi_sas_cmd_hdr {
 241         /* dw0 */
 242         __le32 dw0;
 243
 244         /* dw1 */
 245         __le32 dw1;
 246
 247         /* dw2 */
 248         __le32 dw2;
 249
 250         /* dw3 */
 251         __le32 transfer_tags;
 252
 253         /* dw4 */
 254         __le32 data_transfer_len;
 255
 256         /* dw5 */
 257         __le32 first_burst_num;
 258
 259         /* dw6 */
 260         __le32 sg_len;
 261
 262         /* dw7 */
 263         __le32 dw7;
 264
 265         /* dw8-9 */
 266         __le64 cmd_table_addr;
 267
 268         /* dw10-11 */
 269         __le64 sts_buffer_addr;
 270
 271         /* dw12-13 */
 272         __le64 prd_table_addr;
 273
 274         /* dw14-15 */
 275         __le64 dif_prd_table_addr;
 276 };
 277
 278 struct hisi_sas_itct {
 279         __le64 qw0;
 280         __le64 sas_addr;
 281         __le64 qw2;
 282         __le64 qw3;
 283         __le64 qw4_15[12];
 284 };
 285
 286 struct hisi_sas_iost {
 287         __le64 qw0;
 288         __le64 qw1;
 289         __le64 qw2;
 290         __le64 qw3;
 291 };
 292
 293 struct hisi_sas_err_record {
 294         u32     data[4];
 295 };
 296
 297 struct hisi_sas_initial_fis {
 298         struct hisi_sas_err_record err_record;
 299         struct dev_to_host_fis fis;
 300         u32 rsvd[3];
 301 };
 302
 303 struct hisi_sas_breakpoint {
 304         u8      data[128];      /*io128 byte*/
 305 };
 306
 307 struct hisi_sas_sge {
 308         __le64 addr;
 309         __le32 page_ctrl_0;
 310         __le32 page_ctrl_1;
 311         __le32 data_len;
 312         __le32 data_off;
 313 };
 314
 315 struct hisi_sas_command_table_smp {
 316         u8 bytes[44];
 317 };
 318
 319 struct hisi_sas_command_table_stp {
 320         struct  host_to_dev_fis command_fis;
 321         u8      dummy[12];
 322         u8      atapi_cdb[ATAPI_CDB_LEN];
 323 };
 324
 325 #define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE
 326 struct hisi_sas_sge_page {
 327         struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
 328 };
 329
 330 struct hisi_sas_command_table_ssp {
 331         struct ssp_frame_hdr hdr;
 332         union {
 333                 struct {
 334                         struct ssp_command_iu task;
 335                         u32 prot[6];
 336                 };
 337                 struct ssp_tmf_iu ssp_task;
 338                 struct xfer_rdy_iu xfer_rdy;
 339                 struct ssp_response_iu ssp_res;
 340         } u;
 341 };
 342
 343 union hisi_sas_command_table {
 344         struct hisi_sas_command_table_ssp ssp;
 345         struct hisi_sas_command_table_smp smp;
 346         struct hisi_sas_command_table_stp stp;
 347 };
 348 extern int hisi_sas_probe(struct platform_device *pdev,
 349                           const struct hisi_sas_hw *ops);
 350 extern int hisi_sas_remove(struct platform_device *pdev);
 351
 352 extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy);
 353 extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
 354                                     struct sas_task *task,
 355                                     struct hisi_sas_slot *slot);
 356 #endif