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scsi: qla2xxx: Terminate Plogi/PRLI if WWN is 0
[mirror_ubuntu-bionic-kernel.git] / drivers / scsi / hpsa.c
1 /*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2016 Microsemi Corporation
4 * Copyright 2014-2015 PMC-Sierra, Inc.
5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14 * NON INFRINGEMENT. See the GNU General Public License for more details.
15 *
16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
17 *
18 */
19
20 #include <linux/module.h>
21 #include <linux/interrupt.h>
22 #include <linux/types.h>
23 #include <linux/pci.h>
24 #include <linux/pci-aspm.h>
25 #include <linux/kernel.h>
26 #include <linux/slab.h>
27 #include <linux/delay.h>
28 #include <linux/fs.h>
29 #include <linux/timer.h>
30 #include <linux/init.h>
31 #include <linux/spinlock.h>
32 #include <linux/compat.h>
33 #include <linux/blktrace_api.h>
34 #include <linux/uaccess.h>
35 #include <linux/io.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/completion.h>
38 #include <linux/moduleparam.h>
39 #include <scsi/scsi.h>
40 #include <scsi/scsi_cmnd.h>
41 #include <scsi/scsi_device.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_tcq.h>
44 #include <scsi/scsi_eh.h>
45 #include <scsi/scsi_transport_sas.h>
46 #include <scsi/scsi_dbg.h>
47 #include <linux/cciss_ioctl.h>
48 #include <linux/string.h>
49 #include <linux/bitmap.h>
50 #include <linux/atomic.h>
51 #include <linux/jiffies.h>
52 #include <linux/percpu-defs.h>
53 #include <linux/percpu.h>
54 #include <asm/unaligned.h>
55 #include <asm/div64.h>
56 #include "hpsa_cmd.h"
57 #include "hpsa.h"
58
59 /*
60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
61 * with an optional trailing '-' followed by a byte value (0-255).
62 */
63 #define HPSA_DRIVER_VERSION "3.4.20-125"
64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
65 #define HPSA "hpsa"
66
67 /* How long to wait for CISS doorbell communication */
68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */
69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */
70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */
71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */
72 #define MAX_IOCTL_CONFIG_WAIT 1000
73
74 /*define how many times we will try a command because of bus resets */
75 #define MAX_CMD_RETRIES 3
76
77 /* Embedded module documentation macros - see modules.h */
78 MODULE_AUTHOR("Hewlett-Packard Company");
79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
80 HPSA_DRIVER_VERSION);
81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
82 MODULE_VERSION(HPSA_DRIVER_VERSION);
83 MODULE_LICENSE("GPL");
84 MODULE_ALIAS("cciss");
85
86 static int hpsa_simple_mode;
87 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
88 MODULE_PARM_DESC(hpsa_simple_mode,
89 "Use 'simple mode' rather than 'performant mode'");
90
91 /* define the PCI info for the cards we can control */
92 static const struct pci_device_id hpsa_pci_device_id[] = {
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6},
127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA},
131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB},
132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC},
133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD},
134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE},
135 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
141 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
145 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
146 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
147 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
148 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
149 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
150 {0,}
151 };
152
153 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
154
155 /* board_id = Subsystem Device ID & Vendor ID
156 * product = Marketing Name for the board
157 * access = Address of the struct of function pointers
158 */
159 static struct board_type products[] = {
160 {0x40700E11, "Smart Array 5300", &SA5A_access},
161 {0x40800E11, "Smart Array 5i", &SA5B_access},
162 {0x40820E11, "Smart Array 532", &SA5B_access},
163 {0x40830E11, "Smart Array 5312", &SA5B_access},
164 {0x409A0E11, "Smart Array 641", &SA5A_access},
165 {0x409B0E11, "Smart Array 642", &SA5A_access},
166 {0x409C0E11, "Smart Array 6400", &SA5A_access},
167 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access},
168 {0x40910E11, "Smart Array 6i", &SA5A_access},
169 {0x3225103C, "Smart Array P600", &SA5A_access},
170 {0x3223103C, "Smart Array P800", &SA5A_access},
171 {0x3234103C, "Smart Array P400", &SA5A_access},
172 {0x3235103C, "Smart Array P400i", &SA5A_access},
173 {0x3211103C, "Smart Array E200i", &SA5A_access},
174 {0x3212103C, "Smart Array E200", &SA5A_access},
175 {0x3213103C, "Smart Array E200i", &SA5A_access},
176 {0x3214103C, "Smart Array E200i", &SA5A_access},
177 {0x3215103C, "Smart Array E200i", &SA5A_access},
178 {0x3237103C, "Smart Array E500", &SA5A_access},
179 {0x323D103C, "Smart Array P700m", &SA5A_access},
180 {0x3241103C, "Smart Array P212", &SA5_access},
181 {0x3243103C, "Smart Array P410", &SA5_access},
182 {0x3245103C, "Smart Array P410i", &SA5_access},
183 {0x3247103C, "Smart Array P411", &SA5_access},
184 {0x3249103C, "Smart Array P812", &SA5_access},
185 {0x324A103C, "Smart Array P712m", &SA5_access},
186 {0x324B103C, "Smart Array P711m", &SA5_access},
187 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
188 {0x3350103C, "Smart Array P222", &SA5_access},
189 {0x3351103C, "Smart Array P420", &SA5_access},
190 {0x3352103C, "Smart Array P421", &SA5_access},
191 {0x3353103C, "Smart Array P822", &SA5_access},
192 {0x3354103C, "Smart Array P420i", &SA5_access},
193 {0x3355103C, "Smart Array P220i", &SA5_access},
194 {0x3356103C, "Smart Array P721m", &SA5_access},
195 {0x1920103C, "Smart Array P430i", &SA5_access},
196 {0x1921103C, "Smart Array P830i", &SA5_access},
197 {0x1922103C, "Smart Array P430", &SA5_access},
198 {0x1923103C, "Smart Array P431", &SA5_access},
199 {0x1924103C, "Smart Array P830", &SA5_access},
200 {0x1925103C, "Smart Array P831", &SA5_access},
201 {0x1926103C, "Smart Array P731m", &SA5_access},
202 {0x1928103C, "Smart Array P230i", &SA5_access},
203 {0x1929103C, "Smart Array P530", &SA5_access},
204 {0x21BD103C, "Smart Array P244br", &SA5_access},
205 {0x21BE103C, "Smart Array P741m", &SA5_access},
206 {0x21BF103C, "Smart HBA H240ar", &SA5_access},
207 {0x21C0103C, "Smart Array P440ar", &SA5_access},
208 {0x21C1103C, "Smart Array P840ar", &SA5_access},
209 {0x21C2103C, "Smart Array P440", &SA5_access},
210 {0x21C3103C, "Smart Array P441", &SA5_access},
211 {0x21C4103C, "Smart Array", &SA5_access},
212 {0x21C5103C, "Smart Array P841", &SA5_access},
213 {0x21C6103C, "Smart HBA H244br", &SA5_access},
214 {0x21C7103C, "Smart HBA H240", &SA5_access},
215 {0x21C8103C, "Smart HBA H241", &SA5_access},
216 {0x21C9103C, "Smart Array", &SA5_access},
217 {0x21CA103C, "Smart Array P246br", &SA5_access},
218 {0x21CB103C, "Smart Array P840", &SA5_access},
219 {0x21CC103C, "Smart Array", &SA5_access},
220 {0x21CD103C, "Smart Array", &SA5_access},
221 {0x21CE103C, "Smart HBA", &SA5_access},
222 {0x05809005, "SmartHBA-SA", &SA5_access},
223 {0x05819005, "SmartHBA-SA 8i", &SA5_access},
224 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
225 {0x05839005, "SmartHBA-SA 8e", &SA5_access},
226 {0x05849005, "SmartHBA-SA 16i", &SA5_access},
227 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
228 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
229 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
230 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
231 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
232 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
233 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
234 };
235
236 static struct scsi_transport_template *hpsa_sas_transport_template;
237 static int hpsa_add_sas_host(struct ctlr_info *h);
238 static void hpsa_delete_sas_host(struct ctlr_info *h);
239 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
240 struct hpsa_scsi_dev_t *device);
241 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
242 static struct hpsa_scsi_dev_t
243 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
244 struct sas_rphy *rphy);
245
246 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
247 static const struct scsi_cmnd hpsa_cmd_busy;
248 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
249 static const struct scsi_cmnd hpsa_cmd_idle;
250 static int number_of_controllers;
251
252 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
253 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
254 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
255
256 #ifdef CONFIG_COMPAT
257 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
258 void __user *arg);
259 #endif
260
261 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
262 static struct CommandList *cmd_alloc(struct ctlr_info *h);
263 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
264 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
265 struct scsi_cmnd *scmd);
266 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
267 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
268 int cmd_type);
269 static void hpsa_free_cmd_pool(struct ctlr_info *h);
270 #define VPD_PAGE (1 << 8)
271 #define HPSA_SIMPLE_ERROR_BITS 0x03
272
273 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
274 static void hpsa_scan_start(struct Scsi_Host *);
275 static int hpsa_scan_finished(struct Scsi_Host *sh,
276 unsigned long elapsed_time);
277 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
278
279 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
280 static int hpsa_slave_alloc(struct scsi_device *sdev);
281 static int hpsa_slave_configure(struct scsi_device *sdev);
282 static void hpsa_slave_destroy(struct scsi_device *sdev);
283
284 static void hpsa_update_scsi_devices(struct ctlr_info *h);
285 static int check_for_unit_attention(struct ctlr_info *h,
286 struct CommandList *c);
287 static void check_ioctl_unit_attention(struct ctlr_info *h,
288 struct CommandList *c);
289 /* performant mode helper functions */
290 static void calc_bucket_map(int *bucket, int num_buckets,
291 int nsgs, int min_blocks, u32 *bucket_map);
292 static void hpsa_free_performant_mode(struct ctlr_info *h);
293 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
294 static inline u32 next_command(struct ctlr_info *h, u8 q);
295 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
296 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
297 u64 *cfg_offset);
298 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
299 unsigned long *memory_bar);
300 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
301 bool *legacy_board);
302 static int wait_for_device_to_become_ready(struct ctlr_info *h,
303 unsigned char lunaddr[],
304 int reply_queue);
305 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
306 int wait_for_ready);
307 static inline void finish_cmd(struct CommandList *c);
308 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
309 #define BOARD_NOT_READY 0
310 #define BOARD_READY 1
311 static void hpsa_drain_accel_commands(struct ctlr_info *h);
312 static void hpsa_flush_cache(struct ctlr_info *h);
313 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
314 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
315 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
316 static void hpsa_command_resubmit_worker(struct work_struct *work);
317 static u32 lockup_detected(struct ctlr_info *h);
318 static int detect_controller_lockup(struct ctlr_info *h);
319 static void hpsa_disable_rld_caching(struct ctlr_info *h);
320 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
321 struct ReportExtendedLUNdata *buf, int bufsize);
322 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
323 unsigned char scsi3addr[], u8 page);
324 static int hpsa_luns_changed(struct ctlr_info *h);
325 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
326 struct hpsa_scsi_dev_t *dev,
327 unsigned char *scsi3addr);
328
329 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
330 {
331 unsigned long *priv = shost_priv(sdev->host);
332 return (struct ctlr_info *) *priv;
333 }
334
335 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
336 {
337 unsigned long *priv = shost_priv(sh);
338 return (struct ctlr_info *) *priv;
339 }
340
341 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
342 {
343 return c->scsi_cmd == SCSI_CMD_IDLE;
344 }
345
346 static inline bool hpsa_is_pending_event(struct CommandList *c)
347 {
348 return c->reset_pending;
349 }
350
351 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */
352 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
353 u8 *sense_key, u8 *asc, u8 *ascq)
354 {
355 struct scsi_sense_hdr sshdr;
356 bool rc;
357
358 *sense_key = -1;
359 *asc = -1;
360 *ascq = -1;
361
362 if (sense_data_len < 1)
363 return;
364
365 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
366 if (rc) {
367 *sense_key = sshdr.sense_key;
368 *asc = sshdr.asc;
369 *ascq = sshdr.ascq;
370 }
371 }
372
373 static int check_for_unit_attention(struct ctlr_info *h,
374 struct CommandList *c)
375 {
376 u8 sense_key, asc, ascq;
377 int sense_len;
378
379 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
380 sense_len = sizeof(c->err_info->SenseInfo);
381 else
382 sense_len = c->err_info->SenseLen;
383
384 decode_sense_data(c->err_info->SenseInfo, sense_len,
385 &sense_key, &asc, &ascq);
386 if (sense_key != UNIT_ATTENTION || asc == 0xff)
387 return 0;
388
389 switch (asc) {
390 case STATE_CHANGED:
391 dev_warn(&h->pdev->dev,
392 "%s: a state change detected, command retried\n",
393 h->devname);
394 break;
395 case LUN_FAILED:
396 dev_warn(&h->pdev->dev,
397 "%s: LUN failure detected\n", h->devname);
398 break;
399 case REPORT_LUNS_CHANGED:
400 dev_warn(&h->pdev->dev,
401 "%s: report LUN data changed\n", h->devname);
402 /*
403 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
404 * target (array) devices.
405 */
406 break;
407 case POWER_OR_RESET:
408 dev_warn(&h->pdev->dev,
409 "%s: a power on or device reset detected\n",
410 h->devname);
411 break;
412 case UNIT_ATTENTION_CLEARED:
413 dev_warn(&h->pdev->dev,
414 "%s: unit attention cleared by another initiator\n",
415 h->devname);
416 break;
417 default:
418 dev_warn(&h->pdev->dev,
419 "%s: unknown unit attention detected\n",
420 h->devname);
421 break;
422 }
423 return 1;
424 }
425
426 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
427 {
428 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
429 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
430 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
431 return 0;
432 dev_warn(&h->pdev->dev, HPSA "device busy");
433 return 1;
434 }
435
436 static u32 lockup_detected(struct ctlr_info *h);
437 static ssize_t host_show_lockup_detected(struct device *dev,
438 struct device_attribute *attr, char *buf)
439 {
440 int ld;
441 struct ctlr_info *h;
442 struct Scsi_Host *shost = class_to_shost(dev);
443
444 h = shost_to_hba(shost);
445 ld = lockup_detected(h);
446
447 return sprintf(buf, "ld=%d\n", ld);
448 }
449
450 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
451 struct device_attribute *attr,
452 const char *buf, size_t count)
453 {
454 int status, len;
455 struct ctlr_info *h;
456 struct Scsi_Host *shost = class_to_shost(dev);
457 char tmpbuf[10];
458
459 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
460 return -EACCES;
461 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
462 strncpy(tmpbuf, buf, len);
463 tmpbuf[len] = '\0';
464 if (sscanf(tmpbuf, "%d", &status) != 1)
465 return -EINVAL;
466 h = shost_to_hba(shost);
467 h->acciopath_status = !!status;
468 dev_warn(&h->pdev->dev,
469 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
470 h->acciopath_status ? "enabled" : "disabled");
471 return count;
472 }
473
474 static ssize_t host_store_raid_offload_debug(struct device *dev,
475 struct device_attribute *attr,
476 const char *buf, size_t count)
477 {
478 int debug_level, len;
479 struct ctlr_info *h;
480 struct Scsi_Host *shost = class_to_shost(dev);
481 char tmpbuf[10];
482
483 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
484 return -EACCES;
485 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
486 strncpy(tmpbuf, buf, len);
487 tmpbuf[len] = '\0';
488 if (sscanf(tmpbuf, "%d", &debug_level) != 1)
489 return -EINVAL;
490 if (debug_level < 0)
491 debug_level = 0;
492 h = shost_to_hba(shost);
493 h->raid_offload_debug = debug_level;
494 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
495 h->raid_offload_debug);
496 return count;
497 }
498
499 static ssize_t host_store_rescan(struct device *dev,
500 struct device_attribute *attr,
501 const char *buf, size_t count)
502 {
503 struct ctlr_info *h;
504 struct Scsi_Host *shost = class_to_shost(dev);
505 h = shost_to_hba(shost);
506 hpsa_scan_start(h->scsi_host);
507 return count;
508 }
509
510 static ssize_t host_show_firmware_revision(struct device *dev,
511 struct device_attribute *attr, char *buf)
512 {
513 struct ctlr_info *h;
514 struct Scsi_Host *shost = class_to_shost(dev);
515 unsigned char *fwrev;
516
517 h = shost_to_hba(shost);
518 if (!h->hba_inquiry_data)
519 return 0;
520 fwrev = &h->hba_inquiry_data[32];
521 return snprintf(buf, 20, "%c%c%c%c\n",
522 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
523 }
524
525 static ssize_t host_show_commands_outstanding(struct device *dev,
526 struct device_attribute *attr, char *buf)
527 {
528 struct Scsi_Host *shost = class_to_shost(dev);
529 struct ctlr_info *h = shost_to_hba(shost);
530
531 return snprintf(buf, 20, "%d\n",
532 atomic_read(&h->commands_outstanding));
533 }
534
535 static ssize_t host_show_transport_mode(struct device *dev,
536 struct device_attribute *attr, char *buf)
537 {
538 struct ctlr_info *h;
539 struct Scsi_Host *shost = class_to_shost(dev);
540
541 h = shost_to_hba(shost);
542 return snprintf(buf, 20, "%s\n",
543 h->transMethod & CFGTBL_Trans_Performant ?
544 "performant" : "simple");
545 }
546
547 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
548 struct device_attribute *attr, char *buf)
549 {
550 struct ctlr_info *h;
551 struct Scsi_Host *shost = class_to_shost(dev);
552
553 h = shost_to_hba(shost);
554 return snprintf(buf, 30, "HP SSD Smart Path %s\n",
555 (h->acciopath_status == 1) ? "enabled" : "disabled");
556 }
557
558 /* List of controllers which cannot be hard reset on kexec with reset_devices */
559 static u32 unresettable_controller[] = {
560 0x324a103C, /* Smart Array P712m */
561 0x324b103C, /* Smart Array P711m */
562 0x3223103C, /* Smart Array P800 */
563 0x3234103C, /* Smart Array P400 */
564 0x3235103C, /* Smart Array P400i */
565 0x3211103C, /* Smart Array E200i */
566 0x3212103C, /* Smart Array E200 */
567 0x3213103C, /* Smart Array E200i */
568 0x3214103C, /* Smart Array E200i */
569 0x3215103C, /* Smart Array E200i */
570 0x3237103C, /* Smart Array E500 */
571 0x323D103C, /* Smart Array P700m */
572 0x40800E11, /* Smart Array 5i */
573 0x409C0E11, /* Smart Array 6400 */
574 0x409D0E11, /* Smart Array 6400 EM */
575 0x40700E11, /* Smart Array 5300 */
576 0x40820E11, /* Smart Array 532 */
577 0x40830E11, /* Smart Array 5312 */
578 0x409A0E11, /* Smart Array 641 */
579 0x409B0E11, /* Smart Array 642 */
580 0x40910E11, /* Smart Array 6i */
581 };
582
583 /* List of controllers which cannot even be soft reset */
584 static u32 soft_unresettable_controller[] = {
585 0x40800E11, /* Smart Array 5i */
586 0x40700E11, /* Smart Array 5300 */
587 0x40820E11, /* Smart Array 532 */
588 0x40830E11, /* Smart Array 5312 */
589 0x409A0E11, /* Smart Array 641 */
590 0x409B0E11, /* Smart Array 642 */
591 0x40910E11, /* Smart Array 6i */
592 /* Exclude 640x boards. These are two pci devices in one slot
593 * which share a battery backed cache module. One controls the
594 * cache, the other accesses the cache through the one that controls
595 * it. If we reset the one controlling the cache, the other will
596 * likely not be happy. Just forbid resetting this conjoined mess.
597 * The 640x isn't really supported by hpsa anyway.
598 */
599 0x409C0E11, /* Smart Array 6400 */
600 0x409D0E11, /* Smart Array 6400 EM */
601 };
602
603 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
604 {
605 int i;
606
607 for (i = 0; i < nelems; i++)
608 if (a[i] == board_id)
609 return 1;
610 return 0;
611 }
612
613 static int ctlr_is_hard_resettable(u32 board_id)
614 {
615 return !board_id_in_array(unresettable_controller,
616 ARRAY_SIZE(unresettable_controller), board_id);
617 }
618
619 static int ctlr_is_soft_resettable(u32 board_id)
620 {
621 return !board_id_in_array(soft_unresettable_controller,
622 ARRAY_SIZE(soft_unresettable_controller), board_id);
623 }
624
625 static int ctlr_is_resettable(u32 board_id)
626 {
627 return ctlr_is_hard_resettable(board_id) ||
628 ctlr_is_soft_resettable(board_id);
629 }
630
631 static ssize_t host_show_resettable(struct device *dev,
632 struct device_attribute *attr, char *buf)
633 {
634 struct ctlr_info *h;
635 struct Scsi_Host *shost = class_to_shost(dev);
636
637 h = shost_to_hba(shost);
638 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
639 }
640
641 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
642 {
643 return (scsi3addr[3] & 0xC0) == 0x40;
644 }
645
646 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
647 "1(+0)ADM", "UNKNOWN", "PHYS DRV"
648 };
649 #define HPSA_RAID_0 0
650 #define HPSA_RAID_4 1
651 #define HPSA_RAID_1 2 /* also used for RAID 10 */
652 #define HPSA_RAID_5 3 /* also used for RAID 50 */
653 #define HPSA_RAID_51 4
654 #define HPSA_RAID_6 5 /* also used for RAID 60 */
655 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
656 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
657 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
658
659 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
660 {
661 return !device->physical_device;
662 }
663
664 static ssize_t raid_level_show(struct device *dev,
665 struct device_attribute *attr, char *buf)
666 {
667 ssize_t l = 0;
668 unsigned char rlevel;
669 struct ctlr_info *h;
670 struct scsi_device *sdev;
671 struct hpsa_scsi_dev_t *hdev;
672 unsigned long flags;
673
674 sdev = to_scsi_device(dev);
675 h = sdev_to_hba(sdev);
676 spin_lock_irqsave(&h->lock, flags);
677 hdev = sdev->hostdata;
678 if (!hdev) {
679 spin_unlock_irqrestore(&h->lock, flags);
680 return -ENODEV;
681 }
682
683 /* Is this even a logical drive? */
684 if (!is_logical_device(hdev)) {
685 spin_unlock_irqrestore(&h->lock, flags);
686 l = snprintf(buf, PAGE_SIZE, "N/A\n");
687 return l;
688 }
689
690 rlevel = hdev->raid_level;
691 spin_unlock_irqrestore(&h->lock, flags);
692 if (rlevel > RAID_UNKNOWN)
693 rlevel = RAID_UNKNOWN;
694 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
695 return l;
696 }
697
698 static ssize_t lunid_show(struct device *dev,
699 struct device_attribute *attr, char *buf)
700 {
701 struct ctlr_info *h;
702 struct scsi_device *sdev;
703 struct hpsa_scsi_dev_t *hdev;
704 unsigned long flags;
705 unsigned char lunid[8];
706
707 sdev = to_scsi_device(dev);
708 h = sdev_to_hba(sdev);
709 spin_lock_irqsave(&h->lock, flags);
710 hdev = sdev->hostdata;
711 if (!hdev) {
712 spin_unlock_irqrestore(&h->lock, flags);
713 return -ENODEV;
714 }
715 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
716 spin_unlock_irqrestore(&h->lock, flags);
717 return snprintf(buf, 20, "0x%8phN\n", lunid);
718 }
719
720 static ssize_t unique_id_show(struct device *dev,
721 struct device_attribute *attr, char *buf)
722 {
723 struct ctlr_info *h;
724 struct scsi_device *sdev;
725 struct hpsa_scsi_dev_t *hdev;
726 unsigned long flags;
727 unsigned char sn[16];
728
729 sdev = to_scsi_device(dev);
730 h = sdev_to_hba(sdev);
731 spin_lock_irqsave(&h->lock, flags);
732 hdev = sdev->hostdata;
733 if (!hdev) {
734 spin_unlock_irqrestore(&h->lock, flags);
735 return -ENODEV;
736 }
737 memcpy(sn, hdev->device_id, sizeof(sn));
738 spin_unlock_irqrestore(&h->lock, flags);
739 return snprintf(buf, 16 * 2 + 2,
740 "%02X%02X%02X%02X%02X%02X%02X%02X"
741 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
742 sn[0], sn[1], sn[2], sn[3],
743 sn[4], sn[5], sn[6], sn[7],
744 sn[8], sn[9], sn[10], sn[11],
745 sn[12], sn[13], sn[14], sn[15]);
746 }
747
748 static ssize_t sas_address_show(struct device *dev,
749 struct device_attribute *attr, char *buf)
750 {
751 struct ctlr_info *h;
752 struct scsi_device *sdev;
753 struct hpsa_scsi_dev_t *hdev;
754 unsigned long flags;
755 u64 sas_address;
756
757 sdev = to_scsi_device(dev);
758 h = sdev_to_hba(sdev);
759 spin_lock_irqsave(&h->lock, flags);
760 hdev = sdev->hostdata;
761 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
762 spin_unlock_irqrestore(&h->lock, flags);
763 return -ENODEV;
764 }
765 sas_address = hdev->sas_address;
766 spin_unlock_irqrestore(&h->lock, flags);
767
768 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
769 }
770
771 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
772 struct device_attribute *attr, char *buf)
773 {
774 struct ctlr_info *h;
775 struct scsi_device *sdev;
776 struct hpsa_scsi_dev_t *hdev;
777 unsigned long flags;
778 int offload_enabled;
779
780 sdev = to_scsi_device(dev);
781 h = sdev_to_hba(sdev);
782 spin_lock_irqsave(&h->lock, flags);
783 hdev = sdev->hostdata;
784 if (!hdev) {
785 spin_unlock_irqrestore(&h->lock, flags);
786 return -ENODEV;
787 }
788 offload_enabled = hdev->offload_enabled;
789 spin_unlock_irqrestore(&h->lock, flags);
790
791 if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC)
792 return snprintf(buf, 20, "%d\n", offload_enabled);
793 else
794 return snprintf(buf, 40, "%s\n",
795 "Not applicable for a controller");
796 }
797
798 #define MAX_PATHS 8
799 static ssize_t path_info_show(struct device *dev,
800 struct device_attribute *attr, char *buf)
801 {
802 struct ctlr_info *h;
803 struct scsi_device *sdev;
804 struct hpsa_scsi_dev_t *hdev;
805 unsigned long flags;
806 int i;
807 int output_len = 0;
808 u8 box;
809 u8 bay;
810 u8 path_map_index = 0;
811 char *active;
812 unsigned char phys_connector[2];
813
814 sdev = to_scsi_device(dev);
815 h = sdev_to_hba(sdev);
816 spin_lock_irqsave(&h->devlock, flags);
817 hdev = sdev->hostdata;
818 if (!hdev) {
819 spin_unlock_irqrestore(&h->devlock, flags);
820 return -ENODEV;
821 }
822
823 bay = hdev->bay;
824 for (i = 0; i < MAX_PATHS; i++) {
825 path_map_index = 1<<i;
826 if (i == hdev->active_path_index)
827 active = "Active";
828 else if (hdev->path_map & path_map_index)
829 active = "Inactive";
830 else
831 continue;
832
833 output_len += scnprintf(buf + output_len,
834 PAGE_SIZE - output_len,
835 "[%d:%d:%d:%d] %20.20s ",
836 h->scsi_host->host_no,
837 hdev->bus, hdev->target, hdev->lun,
838 scsi_device_type(hdev->devtype));
839
840 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
841 output_len += scnprintf(buf + output_len,
842 PAGE_SIZE - output_len,
843 "%s\n", active);
844 continue;
845 }
846
847 box = hdev->box[i];
848 memcpy(&phys_connector, &hdev->phys_connector[i],
849 sizeof(phys_connector));
850 if (phys_connector[0] < '0')
851 phys_connector[0] = '0';
852 if (phys_connector[1] < '0')
853 phys_connector[1] = '0';
854 output_len += scnprintf(buf + output_len,
855 PAGE_SIZE - output_len,
856 "PORT: %.2s ",
857 phys_connector);
858 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
859 hdev->expose_device) {
860 if (box == 0 || box == 0xFF) {
861 output_len += scnprintf(buf + output_len,
862 PAGE_SIZE - output_len,
863 "BAY: %hhu %s\n",
864 bay, active);
865 } else {
866 output_len += scnprintf(buf + output_len,
867 PAGE_SIZE - output_len,
868 "BOX: %hhu BAY: %hhu %s\n",
869 box, bay, active);
870 }
871 } else if (box != 0 && box != 0xFF) {
872 output_len += scnprintf(buf + output_len,
873 PAGE_SIZE - output_len, "BOX: %hhu %s\n",
874 box, active);
875 } else
876 output_len += scnprintf(buf + output_len,
877 PAGE_SIZE - output_len, "%s\n", active);
878 }
879
880 spin_unlock_irqrestore(&h->devlock, flags);
881 return output_len;
882 }
883
884 static ssize_t host_show_ctlr_num(struct device *dev,
885 struct device_attribute *attr, char *buf)
886 {
887 struct ctlr_info *h;
888 struct Scsi_Host *shost = class_to_shost(dev);
889
890 h = shost_to_hba(shost);
891 return snprintf(buf, 20, "%d\n", h->ctlr);
892 }
893
894 static ssize_t host_show_legacy_board(struct device *dev,
895 struct device_attribute *attr, char *buf)
896 {
897 struct ctlr_info *h;
898 struct Scsi_Host *shost = class_to_shost(dev);
899
900 h = shost_to_hba(shost);
901 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0);
902 }
903
904 static DEVICE_ATTR_RO(raid_level);
905 static DEVICE_ATTR_RO(lunid);
906 static DEVICE_ATTR_RO(unique_id);
907 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
908 static DEVICE_ATTR_RO(sas_address);
909 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
910 host_show_hp_ssd_smart_path_enabled, NULL);
911 static DEVICE_ATTR_RO(path_info);
912 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
913 host_show_hp_ssd_smart_path_status,
914 host_store_hp_ssd_smart_path_status);
915 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
916 host_store_raid_offload_debug);
917 static DEVICE_ATTR(firmware_revision, S_IRUGO,
918 host_show_firmware_revision, NULL);
919 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
920 host_show_commands_outstanding, NULL);
921 static DEVICE_ATTR(transport_mode, S_IRUGO,
922 host_show_transport_mode, NULL);
923 static DEVICE_ATTR(resettable, S_IRUGO,
924 host_show_resettable, NULL);
925 static DEVICE_ATTR(lockup_detected, S_IRUGO,
926 host_show_lockup_detected, NULL);
927 static DEVICE_ATTR(ctlr_num, S_IRUGO,
928 host_show_ctlr_num, NULL);
929 static DEVICE_ATTR(legacy_board, S_IRUGO,
930 host_show_legacy_board, NULL);
931
932 static struct device_attribute *hpsa_sdev_attrs[] = {
933 &dev_attr_raid_level,
934 &dev_attr_lunid,
935 &dev_attr_unique_id,
936 &dev_attr_hp_ssd_smart_path_enabled,
937 &dev_attr_path_info,
938 &dev_attr_sas_address,
939 NULL,
940 };
941
942 static struct device_attribute *hpsa_shost_attrs[] = {
943 &dev_attr_rescan,
944 &dev_attr_firmware_revision,
945 &dev_attr_commands_outstanding,
946 &dev_attr_transport_mode,
947 &dev_attr_resettable,
948 &dev_attr_hp_ssd_smart_path_status,
949 &dev_attr_raid_offload_debug,
950 &dev_attr_lockup_detected,
951 &dev_attr_ctlr_num,
952 &dev_attr_legacy_board,
953 NULL,
954 };
955
956 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\
957 HPSA_MAX_CONCURRENT_PASSTHRUS)
958
959 static struct scsi_host_template hpsa_driver_template = {
960 .module = THIS_MODULE,
961 .name = HPSA,
962 .proc_name = HPSA,
963 .queuecommand = hpsa_scsi_queue_command,
964 .scan_start = hpsa_scan_start,
965 .scan_finished = hpsa_scan_finished,
966 .change_queue_depth = hpsa_change_queue_depth,
967 .this_id = -1,
968 .use_clustering = ENABLE_CLUSTERING,
969 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
970 .ioctl = hpsa_ioctl,
971 .slave_alloc = hpsa_slave_alloc,
972 .slave_configure = hpsa_slave_configure,
973 .slave_destroy = hpsa_slave_destroy,
974 #ifdef CONFIG_COMPAT
975 .compat_ioctl = hpsa_compat_ioctl,
976 #endif
977 .sdev_attrs = hpsa_sdev_attrs,
978 .shost_attrs = hpsa_shost_attrs,
979 .max_sectors = 1024,
980 .no_write_same = 1,
981 };
982
983 static inline u32 next_command(struct ctlr_info *h, u8 q)
984 {
985 u32 a;
986 struct reply_queue_buffer *rq = &h->reply_queue[q];
987
988 if (h->transMethod & CFGTBL_Trans_io_accel1)
989 return h->access.command_completed(h, q);
990
991 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
992 return h->access.command_completed(h, q);
993
994 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
995 a = rq->head[rq->current_entry];
996 rq->current_entry++;
997 atomic_dec(&h->commands_outstanding);
998 } else {
999 a = FIFO_EMPTY;
1000 }
1001 /* Check for wraparound */
1002 if (rq->current_entry == h->max_commands) {
1003 rq->current_entry = 0;
1004 rq->wraparound ^= 1;
1005 }
1006 return a;
1007 }
1008
1009 /*
1010 * There are some special bits in the bus address of the
1011 * command that we have to set for the controller to know
1012 * how to process the command:
1013 *
1014 * Normal performant mode:
1015 * bit 0: 1 means performant mode, 0 means simple mode.
1016 * bits 1-3 = block fetch table entry
1017 * bits 4-6 = command type (== 0)
1018 *
1019 * ioaccel1 mode:
1020 * bit 0 = "performant mode" bit.
1021 * bits 1-3 = block fetch table entry
1022 * bits 4-6 = command type (== 110)
1023 * (command type is needed because ioaccel1 mode
1024 * commands are submitted through the same register as normal
1025 * mode commands, so this is how the controller knows whether
1026 * the command is normal mode or ioaccel1 mode.)
1027 *
1028 * ioaccel2 mode:
1029 * bit 0 = "performant mode" bit.
1030 * bits 1-4 = block fetch table entry (note extra bit)
1031 * bits 4-6 = not needed, because ioaccel2 mode has
1032 * a separate special register for submitting commands.
1033 */
1034
1035 /*
1036 * set_performant_mode: Modify the tag for cciss performant
1037 * set bit 0 for pull model, bits 3-1 for block fetch
1038 * register number
1039 */
1040 #define DEFAULT_REPLY_QUEUE (-1)
1041 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
1042 int reply_queue)
1043 {
1044 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
1045 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1046 if (unlikely(!h->msix_vectors))
1047 return;
1048 c->Header.ReplyQueue = reply_queue;
1049 }
1050 }
1051
1052 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
1053 struct CommandList *c,
1054 int reply_queue)
1055 {
1056 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1057
1058 /*
1059 * Tell the controller to post the reply to the queue for this
1060 * processor. This seems to give the best I/O throughput.
1061 */
1062 cp->ReplyQueue = reply_queue;
1063 /*
1064 * Set the bits in the address sent down to include:
1065 * - performant mode bit (bit 0)
1066 * - pull count (bits 1-3)
1067 * - command type (bits 4-6)
1068 */
1069 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1070 IOACCEL1_BUSADDR_CMDTYPE;
1071 }
1072
1073 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1074 struct CommandList *c,
1075 int reply_queue)
1076 {
1077 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1078 &h->ioaccel2_cmd_pool[c->cmdindex];
1079
1080 /* Tell the controller to post the reply to the queue for this
1081 * processor. This seems to give the best I/O throughput.
1082 */
1083 cp->reply_queue = reply_queue;
1084 /* Set the bits in the address sent down to include:
1085 * - performant mode bit not used in ioaccel mode 2
1086 * - pull count (bits 0-3)
1087 * - command type isn't needed for ioaccel2
1088 */
1089 c->busaddr |= h->ioaccel2_blockFetchTable[0];
1090 }
1091
1092 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1093 struct CommandList *c,
1094 int reply_queue)
1095 {
1096 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1097
1098 /*
1099 * Tell the controller to post the reply to the queue for this
1100 * processor. This seems to give the best I/O throughput.
1101 */
1102 cp->reply_queue = reply_queue;
1103 /*
1104 * Set the bits in the address sent down to include:
1105 * - performant mode bit not used in ioaccel mode 2
1106 * - pull count (bits 0-3)
1107 * - command type isn't needed for ioaccel2
1108 */
1109 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1110 }
1111
1112 static int is_firmware_flash_cmd(u8 *cdb)
1113 {
1114 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1115 }
1116
1117 /*
1118 * During firmware flash, the heartbeat register may not update as frequently
1119 * as it should. So we dial down lockup detection during firmware flash. and
1120 * dial it back up when firmware flash completes.
1121 */
1122 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1123 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1124 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ)
1125 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1126 struct CommandList *c)
1127 {
1128 if (!is_firmware_flash_cmd(c->Request.CDB))
1129 return;
1130 atomic_inc(&h->firmware_flash_in_progress);
1131 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1132 }
1133
1134 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1135 struct CommandList *c)
1136 {
1137 if (is_firmware_flash_cmd(c->Request.CDB) &&
1138 atomic_dec_and_test(&h->firmware_flash_in_progress))
1139 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1140 }
1141
1142 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1143 struct CommandList *c, int reply_queue)
1144 {
1145 dial_down_lockup_detection_during_fw_flash(h, c);
1146 atomic_inc(&h->commands_outstanding);
1147
1148 reply_queue = h->reply_map[raw_smp_processor_id()];
1149 switch (c->cmd_type) {
1150 case CMD_IOACCEL1:
1151 set_ioaccel1_performant_mode(h, c, reply_queue);
1152 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1153 break;
1154 case CMD_IOACCEL2:
1155 set_ioaccel2_performant_mode(h, c, reply_queue);
1156 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1157 break;
1158 case IOACCEL2_TMF:
1159 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1160 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1161 break;
1162 default:
1163 set_performant_mode(h, c, reply_queue);
1164 h->access.submit_command(h, c);
1165 }
1166 }
1167
1168 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1169 {
1170 if (unlikely(hpsa_is_pending_event(c)))
1171 return finish_cmd(c);
1172
1173 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1174 }
1175
1176 static inline int is_hba_lunid(unsigned char scsi3addr[])
1177 {
1178 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1179 }
1180
1181 static inline int is_scsi_rev_5(struct ctlr_info *h)
1182 {
1183 if (!h->hba_inquiry_data)
1184 return 0;
1185 if ((h->hba_inquiry_data[2] & 0x07) == 5)
1186 return 1;
1187 return 0;
1188 }
1189
1190 static int hpsa_find_target_lun(struct ctlr_info *h,
1191 unsigned char scsi3addr[], int bus, int *target, int *lun)
1192 {
1193 /* finds an unused bus, target, lun for a new physical device
1194 * assumes h->devlock is held
1195 */
1196 int i, found = 0;
1197 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1198
1199 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1200
1201 for (i = 0; i < h->ndevices; i++) {
1202 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1203 __set_bit(h->dev[i]->target, lun_taken);
1204 }
1205
1206 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1207 if (i < HPSA_MAX_DEVICES) {
1208 /* *bus = 1; */
1209 *target = i;
1210 *lun = 0;
1211 found = 1;
1212 }
1213 return !found;
1214 }
1215
1216 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1217 struct hpsa_scsi_dev_t *dev, char *description)
1218 {
1219 #define LABEL_SIZE 25
1220 char label[LABEL_SIZE];
1221
1222 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1223 return;
1224
1225 switch (dev->devtype) {
1226 case TYPE_RAID:
1227 snprintf(label, LABEL_SIZE, "controller");
1228 break;
1229 case TYPE_ENCLOSURE:
1230 snprintf(label, LABEL_SIZE, "enclosure");
1231 break;
1232 case TYPE_DISK:
1233 case TYPE_ZBC:
1234 if (dev->external)
1235 snprintf(label, LABEL_SIZE, "external");
1236 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1237 snprintf(label, LABEL_SIZE, "%s",
1238 raid_label[PHYSICAL_DRIVE]);
1239 else
1240 snprintf(label, LABEL_SIZE, "RAID-%s",
1241 dev->raid_level > RAID_UNKNOWN ? "?" :
1242 raid_label[dev->raid_level]);
1243 break;
1244 case TYPE_ROM:
1245 snprintf(label, LABEL_SIZE, "rom");
1246 break;
1247 case TYPE_TAPE:
1248 snprintf(label, LABEL_SIZE, "tape");
1249 break;
1250 case TYPE_MEDIUM_CHANGER:
1251 snprintf(label, LABEL_SIZE, "changer");
1252 break;
1253 default:
1254 snprintf(label, LABEL_SIZE, "UNKNOWN");
1255 break;
1256 }
1257
1258 dev_printk(level, &h->pdev->dev,
1259 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1260 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1261 description,
1262 scsi_device_type(dev->devtype),
1263 dev->vendor,
1264 dev->model,
1265 label,
1266 dev->offload_config ? '+' : '-',
1267 dev->offload_to_be_enabled ? '+' : '-',
1268 dev->expose_device);
1269 }
1270
1271 /* Add an entry into h->dev[] array. */
1272 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1273 struct hpsa_scsi_dev_t *device,
1274 struct hpsa_scsi_dev_t *added[], int *nadded)
1275 {
1276 /* assumes h->devlock is held */
1277 int n = h->ndevices;
1278 int i;
1279 unsigned char addr1[8], addr2[8];
1280 struct hpsa_scsi_dev_t *sd;
1281
1282 if (n >= HPSA_MAX_DEVICES) {
1283 dev_err(&h->pdev->dev, "too many devices, some will be "
1284 "inaccessible.\n");
1285 return -1;
1286 }
1287
1288 /* physical devices do not have lun or target assigned until now. */
1289 if (device->lun != -1)
1290 /* Logical device, lun is already assigned. */
1291 goto lun_assigned;
1292
1293 /* If this device a non-zero lun of a multi-lun device
1294 * byte 4 of the 8-byte LUN addr will contain the logical
1295 * unit no, zero otherwise.
1296 */
1297 if (device->scsi3addr[4] == 0) {
1298 /* This is not a non-zero lun of a multi-lun device */
1299 if (hpsa_find_target_lun(h, device->scsi3addr,
1300 device->bus, &device->target, &device->lun) != 0)
1301 return -1;
1302 goto lun_assigned;
1303 }
1304
1305 /* This is a non-zero lun of a multi-lun device.
1306 * Search through our list and find the device which
1307 * has the same 8 byte LUN address, excepting byte 4 and 5.
1308 * Assign the same bus and target for this new LUN.
1309 * Use the logical unit number from the firmware.
1310 */
1311 memcpy(addr1, device->scsi3addr, 8);
1312 addr1[4] = 0;
1313 addr1[5] = 0;
1314 for (i = 0; i < n; i++) {
1315 sd = h->dev[i];
1316 memcpy(addr2, sd->scsi3addr, 8);
1317 addr2[4] = 0;
1318 addr2[5] = 0;
1319 /* differ only in byte 4 and 5? */
1320 if (memcmp(addr1, addr2, 8) == 0) {
1321 device->bus = sd->bus;
1322 device->target = sd->target;
1323 device->lun = device->scsi3addr[4];
1324 break;
1325 }
1326 }
1327 if (device->lun == -1) {
1328 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1329 " suspect firmware bug or unsupported hardware "
1330 "configuration.\n");
1331 return -1;
1332 }
1333
1334 lun_assigned:
1335
1336 h->dev[n] = device;
1337 h->ndevices++;
1338 added[*nadded] = device;
1339 (*nadded)++;
1340 hpsa_show_dev_msg(KERN_INFO, h, device,
1341 device->expose_device ? "added" : "masked");
1342 return 0;
1343 }
1344
1345 /*
1346 * Called during a scan operation.
1347 *
1348 * Update an entry in h->dev[] array.
1349 */
1350 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1351 int entry, struct hpsa_scsi_dev_t *new_entry)
1352 {
1353 /* assumes h->devlock is held */
1354 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1355
1356 /* Raid level changed. */
1357 h->dev[entry]->raid_level = new_entry->raid_level;
1358
1359 /*
1360 * ioacccel_handle may have changed for a dual domain disk
1361 */
1362 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1363
1364 /* Raid offload parameters changed. Careful about the ordering. */
1365 if (new_entry->offload_config && new_entry->offload_to_be_enabled) {
1366 /*
1367 * if drive is newly offload_enabled, we want to copy the
1368 * raid map data first. If previously offload_enabled and
1369 * offload_config were set, raid map data had better be
1370 * the same as it was before. If raid map data has changed
1371 * then it had better be the case that
1372 * h->dev[entry]->offload_enabled is currently 0.
1373 */
1374 h->dev[entry]->raid_map = new_entry->raid_map;
1375 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1376 }
1377 if (new_entry->offload_to_be_enabled) {
1378 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1379 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1380 }
1381 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1382 h->dev[entry]->offload_config = new_entry->offload_config;
1383 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1384 h->dev[entry]->queue_depth = new_entry->queue_depth;
1385
1386 /*
1387 * We can turn off ioaccel offload now, but need to delay turning
1388 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we
1389 * can't do that until all the devices are updated.
1390 */
1391 h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled;
1392
1393 /*
1394 * turn ioaccel off immediately if told to do so.
1395 */
1396 if (!new_entry->offload_to_be_enabled)
1397 h->dev[entry]->offload_enabled = 0;
1398
1399 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1400 }
1401
1402 /* Replace an entry from h->dev[] array. */
1403 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1404 int entry, struct hpsa_scsi_dev_t *new_entry,
1405 struct hpsa_scsi_dev_t *added[], int *nadded,
1406 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1407 {
1408 /* assumes h->devlock is held */
1409 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1410 removed[*nremoved] = h->dev[entry];
1411 (*nremoved)++;
1412
1413 /*
1414 * New physical devices won't have target/lun assigned yet
1415 * so we need to preserve the values in the slot we are replacing.
1416 */
1417 if (new_entry->target == -1) {
1418 new_entry->target = h->dev[entry]->target;
1419 new_entry->lun = h->dev[entry]->lun;
1420 }
1421
1422 h->dev[entry] = new_entry;
1423 added[*nadded] = new_entry;
1424 (*nadded)++;
1425
1426 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1427 }
1428
1429 /* Remove an entry from h->dev[] array. */
1430 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1431 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1432 {
1433 /* assumes h->devlock is held */
1434 int i;
1435 struct hpsa_scsi_dev_t *sd;
1436
1437 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1438
1439 sd = h->dev[entry];
1440 removed[*nremoved] = h->dev[entry];
1441 (*nremoved)++;
1442
1443 for (i = entry; i < h->ndevices-1; i++)
1444 h->dev[i] = h->dev[i+1];
1445 h->ndevices--;
1446 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1447 }
1448
1449 #define SCSI3ADDR_EQ(a, b) ( \
1450 (a)[7] == (b)[7] && \
1451 (a)[6] == (b)[6] && \
1452 (a)[5] == (b)[5] && \
1453 (a)[4] == (b)[4] && \
1454 (a)[3] == (b)[3] && \
1455 (a)[2] == (b)[2] && \
1456 (a)[1] == (b)[1] && \
1457 (a)[0] == (b)[0])
1458
1459 static void fixup_botched_add(struct ctlr_info *h,
1460 struct hpsa_scsi_dev_t *added)
1461 {
1462 /* called when scsi_add_device fails in order to re-adjust
1463 * h->dev[] to match the mid layer's view.
1464 */
1465 unsigned long flags;
1466 int i, j;
1467
1468 spin_lock_irqsave(&h->lock, flags);
1469 for (i = 0; i < h->ndevices; i++) {
1470 if (h->dev[i] == added) {
1471 for (j = i; j < h->ndevices-1; j++)
1472 h->dev[j] = h->dev[j+1];
1473 h->ndevices--;
1474 break;
1475 }
1476 }
1477 spin_unlock_irqrestore(&h->lock, flags);
1478 kfree(added);
1479 }
1480
1481 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1482 struct hpsa_scsi_dev_t *dev2)
1483 {
1484 /* we compare everything except lun and target as these
1485 * are not yet assigned. Compare parts likely
1486 * to differ first
1487 */
1488 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1489 sizeof(dev1->scsi3addr)) != 0)
1490 return 0;
1491 if (memcmp(dev1->device_id, dev2->device_id,
1492 sizeof(dev1->device_id)) != 0)
1493 return 0;
1494 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1495 return 0;
1496 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1497 return 0;
1498 if (dev1->devtype != dev2->devtype)
1499 return 0;
1500 if (dev1->bus != dev2->bus)
1501 return 0;
1502 return 1;
1503 }
1504
1505 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1506 struct hpsa_scsi_dev_t *dev2)
1507 {
1508 /* Device attributes that can change, but don't mean
1509 * that the device is a different device, nor that the OS
1510 * needs to be told anything about the change.
1511 */
1512 if (dev1->raid_level != dev2->raid_level)
1513 return 1;
1514 if (dev1->offload_config != dev2->offload_config)
1515 return 1;
1516 if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled)
1517 return 1;
1518 if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1519 if (dev1->queue_depth != dev2->queue_depth)
1520 return 1;
1521 /*
1522 * This can happen for dual domain devices. An active
1523 * path change causes the ioaccel handle to change
1524 *
1525 * for example note the handle differences between p0 and p1
1526 * Device WWN ,WWN hash,Handle
1527 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003
1528 * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004
1529 */
1530 if (dev1->ioaccel_handle != dev2->ioaccel_handle)
1531 return 1;
1532 return 0;
1533 }
1534
1535 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
1536 * and return needle location in *index. If scsi3addr matches, but not
1537 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1538 * location in *index.
1539 * In the case of a minor device attribute change, such as RAID level, just
1540 * return DEVICE_UPDATED, along with the updated device's location in index.
1541 * If needle not found, return DEVICE_NOT_FOUND.
1542 */
1543 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1544 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1545 int *index)
1546 {
1547 int i;
1548 #define DEVICE_NOT_FOUND 0
1549 #define DEVICE_CHANGED 1
1550 #define DEVICE_SAME 2
1551 #define DEVICE_UPDATED 3
1552 if (needle == NULL)
1553 return DEVICE_NOT_FOUND;
1554
1555 for (i = 0; i < haystack_size; i++) {
1556 if (haystack[i] == NULL) /* previously removed. */
1557 continue;
1558 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1559 *index = i;
1560 if (device_is_the_same(needle, haystack[i])) {
1561 if (device_updated(needle, haystack[i]))
1562 return DEVICE_UPDATED;
1563 return DEVICE_SAME;
1564 } else {
1565 /* Keep offline devices offline */
1566 if (needle->volume_offline)
1567 return DEVICE_NOT_FOUND;
1568 return DEVICE_CHANGED;
1569 }
1570 }
1571 }
1572 *index = -1;
1573 return DEVICE_NOT_FOUND;
1574 }
1575
1576 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1577 unsigned char scsi3addr[])
1578 {
1579 struct offline_device_entry *device;
1580 unsigned long flags;
1581
1582 /* Check to see if device is already on the list */
1583 spin_lock_irqsave(&h->offline_device_lock, flags);
1584 list_for_each_entry(device, &h->offline_device_list, offline_list) {
1585 if (memcmp(device->scsi3addr, scsi3addr,
1586 sizeof(device->scsi3addr)) == 0) {
1587 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1588 return;
1589 }
1590 }
1591 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1592
1593 /* Device is not on the list, add it. */
1594 device = kmalloc(sizeof(*device), GFP_KERNEL);
1595 if (!device)
1596 return;
1597
1598 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1599 spin_lock_irqsave(&h->offline_device_lock, flags);
1600 list_add_tail(&device->offline_list, &h->offline_device_list);
1601 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1602 }
1603
1604 /* Print a message explaining various offline volume states */
1605 static void hpsa_show_volume_status(struct ctlr_info *h,
1606 struct hpsa_scsi_dev_t *sd)
1607 {
1608 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1609 dev_info(&h->pdev->dev,
1610 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1611 h->scsi_host->host_no,
1612 sd->bus, sd->target, sd->lun);
1613 switch (sd->volume_offline) {
1614 case HPSA_LV_OK:
1615 break;
1616 case HPSA_LV_UNDERGOING_ERASE:
1617 dev_info(&h->pdev->dev,
1618 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1619 h->scsi_host->host_no,
1620 sd->bus, sd->target, sd->lun);
1621 break;
1622 case HPSA_LV_NOT_AVAILABLE:
1623 dev_info(&h->pdev->dev,
1624 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1625 h->scsi_host->host_no,
1626 sd->bus, sd->target, sd->lun);
1627 break;
1628 case HPSA_LV_UNDERGOING_RPI:
1629 dev_info(&h->pdev->dev,
1630 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1631 h->scsi_host->host_no,
1632 sd->bus, sd->target, sd->lun);
1633 break;
1634 case HPSA_LV_PENDING_RPI:
1635 dev_info(&h->pdev->dev,
1636 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1637 h->scsi_host->host_no,
1638 sd->bus, sd->target, sd->lun);
1639 break;
1640 case HPSA_LV_ENCRYPTED_NO_KEY:
1641 dev_info(&h->pdev->dev,
1642 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1643 h->scsi_host->host_no,
1644 sd->bus, sd->target, sd->lun);
1645 break;
1646 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1647 dev_info(&h->pdev->dev,
1648 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1649 h->scsi_host->host_no,
1650 sd->bus, sd->target, sd->lun);
1651 break;
1652 case HPSA_LV_UNDERGOING_ENCRYPTION:
1653 dev_info(&h->pdev->dev,
1654 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1655 h->scsi_host->host_no,
1656 sd->bus, sd->target, sd->lun);
1657 break;
1658 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1659 dev_info(&h->pdev->dev,
1660 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1661 h->scsi_host->host_no,
1662 sd->bus, sd->target, sd->lun);
1663 break;
1664 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1665 dev_info(&h->pdev->dev,
1666 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1667 h->scsi_host->host_no,
1668 sd->bus, sd->target, sd->lun);
1669 break;
1670 case HPSA_LV_PENDING_ENCRYPTION:
1671 dev_info(&h->pdev->dev,
1672 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1673 h->scsi_host->host_no,
1674 sd->bus, sd->target, sd->lun);
1675 break;
1676 case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1677 dev_info(&h->pdev->dev,
1678 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1679 h->scsi_host->host_no,
1680 sd->bus, sd->target, sd->lun);
1681 break;
1682 }
1683 }
1684
1685 /*
1686 * Figure the list of physical drive pointers for a logical drive with
1687 * raid offload configured.
1688 */
1689 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1690 struct hpsa_scsi_dev_t *dev[], int ndevices,
1691 struct hpsa_scsi_dev_t *logical_drive)
1692 {
1693 struct raid_map_data *map = &logical_drive->raid_map;
1694 struct raid_map_disk_data *dd = &map->data[0];
1695 int i, j;
1696 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1697 le16_to_cpu(map->metadata_disks_per_row);
1698 int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1699 le16_to_cpu(map->layout_map_count) *
1700 total_disks_per_row;
1701 int nphys_disk = le16_to_cpu(map->layout_map_count) *
1702 total_disks_per_row;
1703 int qdepth;
1704
1705 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1706 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1707
1708 logical_drive->nphysical_disks = nraid_map_entries;
1709
1710 qdepth = 0;
1711 for (i = 0; i < nraid_map_entries; i++) {
1712 logical_drive->phys_disk[i] = NULL;
1713 if (!logical_drive->offload_config)
1714 continue;
1715 for (j = 0; j < ndevices; j++) {
1716 if (dev[j] == NULL)
1717 continue;
1718 if (dev[j]->devtype != TYPE_DISK &&
1719 dev[j]->devtype != TYPE_ZBC)
1720 continue;
1721 if (is_logical_device(dev[j]))
1722 continue;
1723 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1724 continue;
1725
1726 logical_drive->phys_disk[i] = dev[j];
1727 if (i < nphys_disk)
1728 qdepth = min(h->nr_cmds, qdepth +
1729 logical_drive->phys_disk[i]->queue_depth);
1730 break;
1731 }
1732
1733 /*
1734 * This can happen if a physical drive is removed and
1735 * the logical drive is degraded. In that case, the RAID
1736 * map data will refer to a physical disk which isn't actually
1737 * present. And in that case offload_enabled should already
1738 * be 0, but we'll turn it off here just in case
1739 */
1740 if (!logical_drive->phys_disk[i]) {
1741 dev_warn(&h->pdev->dev,
1742 "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n",
1743 __func__,
1744 h->scsi_host->host_no, logical_drive->bus,
1745 logical_drive->target, logical_drive->lun);
1746 logical_drive->offload_enabled = 0;
1747 logical_drive->offload_to_be_enabled = 0;
1748 logical_drive->queue_depth = 8;
1749 }
1750 }
1751 if (nraid_map_entries)
1752 /*
1753 * This is correct for reads, too high for full stripe writes,
1754 * way too high for partial stripe writes
1755 */
1756 logical_drive->queue_depth = qdepth;
1757 else {
1758 if (logical_drive->external)
1759 logical_drive->queue_depth = EXTERNAL_QD;
1760 else
1761 logical_drive->queue_depth = h->nr_cmds;
1762 }
1763 }
1764
1765 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1766 struct hpsa_scsi_dev_t *dev[], int ndevices)
1767 {
1768 int i;
1769
1770 for (i = 0; i < ndevices; i++) {
1771 if (dev[i] == NULL)
1772 continue;
1773 if (dev[i]->devtype != TYPE_DISK &&
1774 dev[i]->devtype != TYPE_ZBC)
1775 continue;
1776 if (!is_logical_device(dev[i]))
1777 continue;
1778
1779 /*
1780 * If offload is currently enabled, the RAID map and
1781 * phys_disk[] assignment *better* not be changing
1782 * because we would be changing ioaccel phsy_disk[] pointers
1783 * on a ioaccel volume processing I/O requests.
1784 *
1785 * If an ioaccel volume status changed, initially because it was
1786 * re-configured and thus underwent a transformation, or
1787 * a drive failed, we would have received a state change
1788 * request and ioaccel should have been turned off. When the
1789 * transformation completes, we get another state change
1790 * request to turn ioaccel back on. In this case, we need
1791 * to update the ioaccel information.
1792 *
1793 * Thus: If it is not currently enabled, but will be after
1794 * the scan completes, make sure the ioaccel pointers
1795 * are up to date.
1796 */
1797
1798 if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled)
1799 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1800 }
1801 }
1802
1803 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1804 {
1805 int rc = 0;
1806
1807 if (!h->scsi_host)
1808 return 1;
1809
1810 if (is_logical_device(device)) /* RAID */
1811 rc = scsi_add_device(h->scsi_host, device->bus,
1812 device->target, device->lun);
1813 else /* HBA */
1814 rc = hpsa_add_sas_device(h->sas_host, device);
1815
1816 return rc;
1817 }
1818
1819 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1820 struct hpsa_scsi_dev_t *dev)
1821 {
1822 int i;
1823 int count = 0;
1824
1825 for (i = 0; i < h->nr_cmds; i++) {
1826 struct CommandList *c = h->cmd_pool + i;
1827 int refcount = atomic_inc_return(&c->refcount);
1828
1829 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1830 dev->scsi3addr)) {
1831 unsigned long flags;
1832
1833 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
1834 if (!hpsa_is_cmd_idle(c))
1835 ++count;
1836 spin_unlock_irqrestore(&h->lock, flags);
1837 }
1838
1839 cmd_free(h, c);
1840 }
1841
1842 return count;
1843 }
1844
1845 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1846 struct hpsa_scsi_dev_t *device)
1847 {
1848 int cmds = 0;
1849 int waits = 0;
1850
1851 while (1) {
1852 cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1853 if (cmds == 0)
1854 break;
1855 if (++waits > 20)
1856 break;
1857 msleep(1000);
1858 }
1859
1860 if (waits > 20)
1861 dev_warn(&h->pdev->dev,
1862 "%s: removing device with %d outstanding commands!\n",
1863 __func__, cmds);
1864 }
1865
1866 static void hpsa_remove_device(struct ctlr_info *h,
1867 struct hpsa_scsi_dev_t *device)
1868 {
1869 struct scsi_device *sdev = NULL;
1870
1871 if (!h->scsi_host)
1872 return;
1873
1874 /*
1875 * Allow for commands to drain
1876 */
1877 device->removed = 1;
1878 hpsa_wait_for_outstanding_commands_for_dev(h, device);
1879
1880 if (is_logical_device(device)) { /* RAID */
1881 sdev = scsi_device_lookup(h->scsi_host, device->bus,
1882 device->target, device->lun);
1883 if (sdev) {
1884 scsi_remove_device(sdev);
1885 scsi_device_put(sdev);
1886 } else {
1887 /*
1888 * We don't expect to get here. Future commands
1889 * to this device will get a selection timeout as
1890 * if the device were gone.
1891 */
1892 hpsa_show_dev_msg(KERN_WARNING, h, device,
1893 "didn't find device for removal.");
1894 }
1895 } else { /* HBA */
1896
1897 hpsa_remove_sas_device(device);
1898 }
1899 }
1900
1901 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1902 struct hpsa_scsi_dev_t *sd[], int nsds)
1903 {
1904 /* sd contains scsi3 addresses and devtypes, and inquiry
1905 * data. This function takes what's in sd to be the current
1906 * reality and updates h->dev[] to reflect that reality.
1907 */
1908 int i, entry, device_change, changes = 0;
1909 struct hpsa_scsi_dev_t *csd;
1910 unsigned long flags;
1911 struct hpsa_scsi_dev_t **added, **removed;
1912 int nadded, nremoved;
1913
1914 /*
1915 * A reset can cause a device status to change
1916 * re-schedule the scan to see what happened.
1917 */
1918 spin_lock_irqsave(&h->reset_lock, flags);
1919 if (h->reset_in_progress) {
1920 h->drv_req_rescan = 1;
1921 spin_unlock_irqrestore(&h->reset_lock, flags);
1922 return;
1923 }
1924 spin_unlock_irqrestore(&h->reset_lock, flags);
1925
1926 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1927 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1928
1929 if (!added || !removed) {
1930 dev_warn(&h->pdev->dev, "out of memory in "
1931 "adjust_hpsa_scsi_table\n");
1932 goto free_and_out;
1933 }
1934
1935 spin_lock_irqsave(&h->devlock, flags);
1936
1937 /* find any devices in h->dev[] that are not in
1938 * sd[] and remove them from h->dev[], and for any
1939 * devices which have changed, remove the old device
1940 * info and add the new device info.
1941 * If minor device attributes change, just update
1942 * the existing device structure.
1943 */
1944 i = 0;
1945 nremoved = 0;
1946 nadded = 0;
1947 while (i < h->ndevices) {
1948 csd = h->dev[i];
1949 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1950 if (device_change == DEVICE_NOT_FOUND) {
1951 changes++;
1952 hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1953 continue; /* remove ^^^, hence i not incremented */
1954 } else if (device_change == DEVICE_CHANGED) {
1955 changes++;
1956 hpsa_scsi_replace_entry(h, i, sd[entry],
1957 added, &nadded, removed, &nremoved);
1958 /* Set it to NULL to prevent it from being freed
1959 * at the bottom of hpsa_update_scsi_devices()
1960 */
1961 sd[entry] = NULL;
1962 } else if (device_change == DEVICE_UPDATED) {
1963 hpsa_scsi_update_entry(h, i, sd[entry]);
1964 }
1965 i++;
1966 }
1967
1968 /* Now, make sure every device listed in sd[] is also
1969 * listed in h->dev[], adding them if they aren't found
1970 */
1971
1972 for (i = 0; i < nsds; i++) {
1973 if (!sd[i]) /* if already added above. */
1974 continue;
1975
1976 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1977 * as the SCSI mid-layer does not handle such devices well.
1978 * It relentlessly loops sending TUR at 3Hz, then READ(10)
1979 * at 160Hz, and prevents the system from coming up.
1980 */
1981 if (sd[i]->volume_offline) {
1982 hpsa_show_volume_status(h, sd[i]);
1983 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1984 continue;
1985 }
1986
1987 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1988 h->ndevices, &entry);
1989 if (device_change == DEVICE_NOT_FOUND) {
1990 changes++;
1991 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1992 break;
1993 sd[i] = NULL; /* prevent from being freed later. */
1994 } else if (device_change == DEVICE_CHANGED) {
1995 /* should never happen... */
1996 changes++;
1997 dev_warn(&h->pdev->dev,
1998 "device unexpectedly changed.\n");
1999 /* but if it does happen, we just ignore that device */
2000 }
2001 }
2002 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
2003
2004 /*
2005 * Now that h->dev[]->phys_disk[] is coherent, we can enable
2006 * any logical drives that need it enabled.
2007 *
2008 * The raid map should be current by now.
2009 *
2010 * We are updating the device list used for I/O requests.
2011 */
2012 for (i = 0; i < h->ndevices; i++) {
2013 if (h->dev[i] == NULL)
2014 continue;
2015 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
2016 }
2017
2018 spin_unlock_irqrestore(&h->devlock, flags);
2019
2020 /* Monitor devices which are in one of several NOT READY states to be
2021 * brought online later. This must be done without holding h->devlock,
2022 * so don't touch h->dev[]
2023 */
2024 for (i = 0; i < nsds; i++) {
2025 if (!sd[i]) /* if already added above. */
2026 continue;
2027 if (sd[i]->volume_offline)
2028 hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
2029 }
2030
2031 /* Don't notify scsi mid layer of any changes the first time through
2032 * (or if there are no changes) scsi_scan_host will do it later the
2033 * first time through.
2034 */
2035 if (!changes)
2036 goto free_and_out;
2037
2038 /* Notify scsi mid layer of any removed devices */
2039 for (i = 0; i < nremoved; i++) {
2040 if (removed[i] == NULL)
2041 continue;
2042 if (removed[i]->expose_device)
2043 hpsa_remove_device(h, removed[i]);
2044 kfree(removed[i]);
2045 removed[i] = NULL;
2046 }
2047
2048 /* Notify scsi mid layer of any added devices */
2049 for (i = 0; i < nadded; i++) {
2050 int rc = 0;
2051
2052 if (added[i] == NULL)
2053 continue;
2054 if (!(added[i]->expose_device))
2055 continue;
2056 rc = hpsa_add_device(h, added[i]);
2057 if (!rc)
2058 continue;
2059 dev_warn(&h->pdev->dev,
2060 "addition failed %d, device not added.", rc);
2061 /* now we have to remove it from h->dev,
2062 * since it didn't get added to scsi mid layer
2063 */
2064 fixup_botched_add(h, added[i]);
2065 h->drv_req_rescan = 1;
2066 }
2067
2068 free_and_out:
2069 kfree(added);
2070 kfree(removed);
2071 }
2072
2073 /*
2074 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
2075 * Assume's h->devlock is held.
2076 */
2077 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2078 int bus, int target, int lun)
2079 {
2080 int i;
2081 struct hpsa_scsi_dev_t *sd;
2082
2083 for (i = 0; i < h->ndevices; i++) {
2084 sd = h->dev[i];
2085 if (sd->bus == bus && sd->target == target && sd->lun == lun)
2086 return sd;
2087 }
2088 return NULL;
2089 }
2090
2091 static int hpsa_slave_alloc(struct scsi_device *sdev)
2092 {
2093 struct hpsa_scsi_dev_t *sd = NULL;
2094 unsigned long flags;
2095 struct ctlr_info *h;
2096
2097 h = sdev_to_hba(sdev);
2098 spin_lock_irqsave(&h->devlock, flags);
2099 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2100 struct scsi_target *starget;
2101 struct sas_rphy *rphy;
2102
2103 starget = scsi_target(sdev);
2104 rphy = target_to_rphy(starget);
2105 sd = hpsa_find_device_by_sas_rphy(h, rphy);
2106 if (sd) {
2107 sd->target = sdev_id(sdev);
2108 sd->lun = sdev->lun;
2109 }
2110 }
2111 if (!sd)
2112 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2113 sdev_id(sdev), sdev->lun);
2114
2115 if (sd && sd->expose_device) {
2116 atomic_set(&sd->ioaccel_cmds_out, 0);
2117 sdev->hostdata = sd;
2118 } else
2119 sdev->hostdata = NULL;
2120 spin_unlock_irqrestore(&h->devlock, flags);
2121 return 0;
2122 }
2123
2124 /* configure scsi device based on internal per-device structure */
2125 static int hpsa_slave_configure(struct scsi_device *sdev)
2126 {
2127 struct hpsa_scsi_dev_t *sd;
2128 int queue_depth;
2129
2130 sd = sdev->hostdata;
2131 sdev->no_uld_attach = !sd || !sd->expose_device;
2132
2133 if (sd) {
2134 if (sd->external)
2135 queue_depth = EXTERNAL_QD;
2136 else
2137 queue_depth = sd->queue_depth != 0 ?
2138 sd->queue_depth : sdev->host->can_queue;
2139 } else
2140 queue_depth = sdev->host->can_queue;
2141
2142 scsi_change_queue_depth(sdev, queue_depth);
2143
2144 return 0;
2145 }
2146
2147 static void hpsa_slave_destroy(struct scsi_device *sdev)
2148 {
2149 /* nothing to do. */
2150 }
2151
2152 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2153 {
2154 int i;
2155
2156 if (!h->ioaccel2_cmd_sg_list)
2157 return;
2158 for (i = 0; i < h->nr_cmds; i++) {
2159 kfree(h->ioaccel2_cmd_sg_list[i]);
2160 h->ioaccel2_cmd_sg_list[i] = NULL;
2161 }
2162 kfree(h->ioaccel2_cmd_sg_list);
2163 h->ioaccel2_cmd_sg_list = NULL;
2164 }
2165
2166 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2167 {
2168 int i;
2169
2170 if (h->chainsize <= 0)
2171 return 0;
2172
2173 h->ioaccel2_cmd_sg_list =
2174 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
2175 GFP_KERNEL);
2176 if (!h->ioaccel2_cmd_sg_list)
2177 return -ENOMEM;
2178 for (i = 0; i < h->nr_cmds; i++) {
2179 h->ioaccel2_cmd_sg_list[i] =
2180 kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
2181 h->maxsgentries, GFP_KERNEL);
2182 if (!h->ioaccel2_cmd_sg_list[i])
2183 goto clean;
2184 }
2185 return 0;
2186
2187 clean:
2188 hpsa_free_ioaccel2_sg_chain_blocks(h);
2189 return -ENOMEM;
2190 }
2191
2192 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2193 {
2194 int i;
2195
2196 if (!h->cmd_sg_list)
2197 return;
2198 for (i = 0; i < h->nr_cmds; i++) {
2199 kfree(h->cmd_sg_list[i]);
2200 h->cmd_sg_list[i] = NULL;
2201 }
2202 kfree(h->cmd_sg_list);
2203 h->cmd_sg_list = NULL;
2204 }
2205
2206 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2207 {
2208 int i;
2209
2210 if (h->chainsize <= 0)
2211 return 0;
2212
2213 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
2214 GFP_KERNEL);
2215 if (!h->cmd_sg_list)
2216 return -ENOMEM;
2217
2218 for (i = 0; i < h->nr_cmds; i++) {
2219 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
2220 h->chainsize, GFP_KERNEL);
2221 if (!h->cmd_sg_list[i])
2222 goto clean;
2223
2224 }
2225 return 0;
2226
2227 clean:
2228 hpsa_free_sg_chain_blocks(h);
2229 return -ENOMEM;
2230 }
2231
2232 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2233 struct io_accel2_cmd *cp, struct CommandList *c)
2234 {
2235 struct ioaccel2_sg_element *chain_block;
2236 u64 temp64;
2237 u32 chain_size;
2238
2239 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2240 chain_size = le32_to_cpu(cp->sg[0].length);
2241 temp64 = pci_map_single(h->pdev, chain_block, chain_size,
2242 PCI_DMA_TODEVICE);
2243 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2244 /* prevent subsequent unmapping */
2245 cp->sg->address = 0;
2246 return -1;
2247 }
2248 cp->sg->address = cpu_to_le64(temp64);
2249 return 0;
2250 }
2251
2252 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2253 struct io_accel2_cmd *cp)
2254 {
2255 struct ioaccel2_sg_element *chain_sg;
2256 u64 temp64;
2257 u32 chain_size;
2258
2259 chain_sg = cp->sg;
2260 temp64 = le64_to_cpu(chain_sg->address);
2261 chain_size = le32_to_cpu(cp->sg[0].length);
2262 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
2263 }
2264
2265 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2266 struct CommandList *c)
2267 {
2268 struct SGDescriptor *chain_sg, *chain_block;
2269 u64 temp64;
2270 u32 chain_len;
2271
2272 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2273 chain_block = h->cmd_sg_list[c->cmdindex];
2274 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2275 chain_len = sizeof(*chain_sg) *
2276 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2277 chain_sg->Len = cpu_to_le32(chain_len);
2278 temp64 = pci_map_single(h->pdev, chain_block, chain_len,
2279 PCI_DMA_TODEVICE);
2280 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2281 /* prevent subsequent unmapping */
2282 chain_sg->Addr = cpu_to_le64(0);
2283 return -1;
2284 }
2285 chain_sg->Addr = cpu_to_le64(temp64);
2286 return 0;
2287 }
2288
2289 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2290 struct CommandList *c)
2291 {
2292 struct SGDescriptor *chain_sg;
2293
2294 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2295 return;
2296
2297 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2298 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
2299 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
2300 }
2301
2302
2303 /* Decode the various types of errors on ioaccel2 path.
2304 * Return 1 for any error that should generate a RAID path retry.
2305 * Return 0 for errors that don't require a RAID path retry.
2306 */
2307 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2308 struct CommandList *c,
2309 struct scsi_cmnd *cmd,
2310 struct io_accel2_cmd *c2,
2311 struct hpsa_scsi_dev_t *dev)
2312 {
2313 int data_len;
2314 int retry = 0;
2315 u32 ioaccel2_resid = 0;
2316
2317 switch (c2->error_data.serv_response) {
2318 case IOACCEL2_SERV_RESPONSE_COMPLETE:
2319 switch (c2->error_data.status) {
2320 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2321 if (cmd)
2322 cmd->result = 0;
2323 break;
2324 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2325 cmd->result |= SAM_STAT_CHECK_CONDITION;
2326 if (c2->error_data.data_present !=
2327 IOACCEL2_SENSE_DATA_PRESENT) {
2328 memset(cmd->sense_buffer, 0,
2329 SCSI_SENSE_BUFFERSIZE);
2330 break;
2331 }
2332 /* copy the sense data */
2333 data_len = c2->error_data.sense_data_len;
2334 if (data_len > SCSI_SENSE_BUFFERSIZE)
2335 data_len = SCSI_SENSE_BUFFERSIZE;
2336 if (data_len > sizeof(c2->error_data.sense_data_buff))
2337 data_len =
2338 sizeof(c2->error_data.sense_data_buff);
2339 memcpy(cmd->sense_buffer,
2340 c2->error_data.sense_data_buff, data_len);
2341 retry = 1;
2342 break;
2343 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2344 retry = 1;
2345 break;
2346 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2347 retry = 1;
2348 break;
2349 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2350 retry = 1;
2351 break;
2352 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2353 retry = 1;
2354 break;
2355 default:
2356 retry = 1;
2357 break;
2358 }
2359 break;
2360 case IOACCEL2_SERV_RESPONSE_FAILURE:
2361 switch (c2->error_data.status) {
2362 case IOACCEL2_STATUS_SR_IO_ERROR:
2363 case IOACCEL2_STATUS_SR_IO_ABORTED:
2364 case IOACCEL2_STATUS_SR_OVERRUN:
2365 retry = 1;
2366 break;
2367 case IOACCEL2_STATUS_SR_UNDERRUN:
2368 cmd->result = (DID_OK << 16); /* host byte */
2369 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2370 ioaccel2_resid = get_unaligned_le32(
2371 &c2->error_data.resid_cnt[0]);
2372 scsi_set_resid(cmd, ioaccel2_resid);
2373 break;
2374 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2375 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2376 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2377 /*
2378 * Did an HBA disk disappear? We will eventually
2379 * get a state change event from the controller but
2380 * in the meantime, we need to tell the OS that the
2381 * HBA disk is no longer there and stop I/O
2382 * from going down. This allows the potential re-insert
2383 * of the disk to get the same device node.
2384 */
2385 if (dev->physical_device && dev->expose_device) {
2386 cmd->result = DID_NO_CONNECT << 16;
2387 dev->removed = 1;
2388 h->drv_req_rescan = 1;
2389 dev_warn(&h->pdev->dev,
2390 "%s: device is gone!\n", __func__);
2391 } else
2392 /*
2393 * Retry by sending down the RAID path.
2394 * We will get an event from ctlr to
2395 * trigger rescan regardless.
2396 */
2397 retry = 1;
2398 break;
2399 default:
2400 retry = 1;
2401 }
2402 break;
2403 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2404 break;
2405 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2406 break;
2407 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2408 retry = 1;
2409 break;
2410 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2411 break;
2412 default:
2413 retry = 1;
2414 break;
2415 }
2416
2417 return retry; /* retry on raid path? */
2418 }
2419
2420 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2421 struct CommandList *c)
2422 {
2423 bool do_wake = false;
2424
2425 /*
2426 * Reset c->scsi_cmd here so that the reset handler will know
2427 * this command has completed. Then, check to see if the handler is
2428 * waiting for this command, and, if so, wake it.
2429 */
2430 c->scsi_cmd = SCSI_CMD_IDLE;
2431 mb(); /* Declare command idle before checking for pending events. */
2432 if (c->reset_pending) {
2433 unsigned long flags;
2434 struct hpsa_scsi_dev_t *dev;
2435
2436 /*
2437 * There appears to be a reset pending; lock the lock and
2438 * reconfirm. If so, then decrement the count of outstanding
2439 * commands and wake the reset command if this is the last one.
2440 */
2441 spin_lock_irqsave(&h->lock, flags);
2442 dev = c->reset_pending; /* Re-fetch under the lock. */
2443 if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2444 do_wake = true;
2445 c->reset_pending = NULL;
2446 spin_unlock_irqrestore(&h->lock, flags);
2447 }
2448
2449 if (do_wake)
2450 wake_up_all(&h->event_sync_wait_queue);
2451 }
2452
2453 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2454 struct CommandList *c)
2455 {
2456 hpsa_cmd_resolve_events(h, c);
2457 cmd_tagged_free(h, c);
2458 }
2459
2460 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2461 struct CommandList *c, struct scsi_cmnd *cmd)
2462 {
2463 hpsa_cmd_resolve_and_free(h, c);
2464 if (cmd && cmd->scsi_done)
2465 cmd->scsi_done(cmd);
2466 }
2467
2468 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2469 {
2470 INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2471 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2472 }
2473
2474 static void process_ioaccel2_completion(struct ctlr_info *h,
2475 struct CommandList *c, struct scsi_cmnd *cmd,
2476 struct hpsa_scsi_dev_t *dev)
2477 {
2478 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2479
2480 /* check for good status */
2481 if (likely(c2->error_data.serv_response == 0 &&
2482 c2->error_data.status == 0)) {
2483 cmd->result = 0;
2484 return hpsa_cmd_free_and_done(h, c, cmd);
2485 }
2486
2487 /*
2488 * Any RAID offload error results in retry which will use
2489 * the normal I/O path so the controller can handle whatever is
2490 * wrong.
2491 */
2492 if (is_logical_device(dev) &&
2493 c2->error_data.serv_response ==
2494 IOACCEL2_SERV_RESPONSE_FAILURE) {
2495 if (c2->error_data.status ==
2496 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2497 dev->offload_enabled = 0;
2498 dev->offload_to_be_enabled = 0;
2499 }
2500
2501 return hpsa_retry_cmd(h, c);
2502 }
2503
2504 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
2505 return hpsa_retry_cmd(h, c);
2506
2507 return hpsa_cmd_free_and_done(h, c, cmd);
2508 }
2509
2510 /* Returns 0 on success, < 0 otherwise. */
2511 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2512 struct CommandList *cp)
2513 {
2514 u8 tmf_status = cp->err_info->ScsiStatus;
2515
2516 switch (tmf_status) {
2517 case CISS_TMF_COMPLETE:
2518 /*
2519 * CISS_TMF_COMPLETE never happens, instead,
2520 * ei->CommandStatus == 0 for this case.
2521 */
2522 case CISS_TMF_SUCCESS:
2523 return 0;
2524 case CISS_TMF_INVALID_FRAME:
2525 case CISS_TMF_NOT_SUPPORTED:
2526 case CISS_TMF_FAILED:
2527 case CISS_TMF_WRONG_LUN:
2528 case CISS_TMF_OVERLAPPED_TAG:
2529 break;
2530 default:
2531 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2532 tmf_status);
2533 break;
2534 }
2535 return -tmf_status;
2536 }
2537
2538 static void complete_scsi_command(struct CommandList *cp)
2539 {
2540 struct scsi_cmnd *cmd;
2541 struct ctlr_info *h;
2542 struct ErrorInfo *ei;
2543 struct hpsa_scsi_dev_t *dev;
2544 struct io_accel2_cmd *c2;
2545
2546 u8 sense_key;
2547 u8 asc; /* additional sense code */
2548 u8 ascq; /* additional sense code qualifier */
2549 unsigned long sense_data_size;
2550
2551 ei = cp->err_info;
2552 cmd = cp->scsi_cmd;
2553 h = cp->h;
2554
2555 if (!cmd->device) {
2556 cmd->result = DID_NO_CONNECT << 16;
2557 return hpsa_cmd_free_and_done(h, cp, cmd);
2558 }
2559
2560 dev = cmd->device->hostdata;
2561 if (!dev) {
2562 cmd->result = DID_NO_CONNECT << 16;
2563 return hpsa_cmd_free_and_done(h, cp, cmd);
2564 }
2565 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2566
2567 scsi_dma_unmap(cmd); /* undo the DMA mappings */
2568 if ((cp->cmd_type == CMD_SCSI) &&
2569 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2570 hpsa_unmap_sg_chain_block(h, cp);
2571
2572 if ((cp->cmd_type == CMD_IOACCEL2) &&
2573 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2574 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2575
2576 cmd->result = (DID_OK << 16); /* host byte */
2577 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2578
2579 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2580 if (dev->physical_device && dev->expose_device &&
2581 dev->removed) {
2582 cmd->result = DID_NO_CONNECT << 16;
2583 return hpsa_cmd_free_and_done(h, cp, cmd);
2584 }
2585 if (likely(cp->phys_disk != NULL))
2586 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2587 }
2588
2589 /*
2590 * We check for lockup status here as it may be set for
2591 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2592 * fail_all_oustanding_cmds()
2593 */
2594 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2595 /* DID_NO_CONNECT will prevent a retry */
2596 cmd->result = DID_NO_CONNECT << 16;
2597 return hpsa_cmd_free_and_done(h, cp, cmd);
2598 }
2599
2600 if ((unlikely(hpsa_is_pending_event(cp))))
2601 if (cp->reset_pending)
2602 return hpsa_cmd_free_and_done(h, cp, cmd);
2603
2604 if (cp->cmd_type == CMD_IOACCEL2)
2605 return process_ioaccel2_completion(h, cp, cmd, dev);
2606
2607 scsi_set_resid(cmd, ei->ResidualCnt);
2608 if (ei->CommandStatus == 0)
2609 return hpsa_cmd_free_and_done(h, cp, cmd);
2610
2611 /* For I/O accelerator commands, copy over some fields to the normal
2612 * CISS header used below for error handling.
2613 */
2614 if (cp->cmd_type == CMD_IOACCEL1) {
2615 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2616 cp->Header.SGList = scsi_sg_count(cmd);
2617 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2618 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2619 IOACCEL1_IOFLAGS_CDBLEN_MASK;
2620 cp->Header.tag = c->tag;
2621 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2622 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2623
2624 /* Any RAID offload error results in retry which will use
2625 * the normal I/O path so the controller can handle whatever's
2626 * wrong.
2627 */
2628 if (is_logical_device(dev)) {
2629 if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2630 dev->offload_enabled = 0;
2631 return hpsa_retry_cmd(h, cp);
2632 }
2633 }
2634
2635 /* an error has occurred */
2636 switch (ei->CommandStatus) {
2637
2638 case CMD_TARGET_STATUS:
2639 cmd->result |= ei->ScsiStatus;
2640 /* copy the sense data */
2641 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2642 sense_data_size = SCSI_SENSE_BUFFERSIZE;
2643 else
2644 sense_data_size = sizeof(ei->SenseInfo);
2645 if (ei->SenseLen < sense_data_size)
2646 sense_data_size = ei->SenseLen;
2647 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2648 if (ei->ScsiStatus)
2649 decode_sense_data(ei->SenseInfo, sense_data_size,
2650 &sense_key, &asc, &ascq);
2651 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2652 if (sense_key == ABORTED_COMMAND) {
2653 cmd->result |= DID_SOFT_ERROR << 16;
2654 break;
2655 }
2656 break;
2657 }
2658 /* Problem was not a check condition
2659 * Pass it up to the upper layers...
2660 */
2661 if (ei->ScsiStatus) {
2662 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2663 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2664 "Returning result: 0x%x\n",
2665 cp, ei->ScsiStatus,
2666 sense_key, asc, ascq,
2667 cmd->result);
2668 } else { /* scsi status is zero??? How??? */
2669 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2670 "Returning no connection.\n", cp),
2671
2672 /* Ordinarily, this case should never happen,
2673 * but there is a bug in some released firmware
2674 * revisions that allows it to happen if, for
2675 * example, a 4100 backplane loses power and
2676 * the tape drive is in it. We assume that
2677 * it's a fatal error of some kind because we
2678 * can't show that it wasn't. We will make it
2679 * look like selection timeout since that is
2680 * the most common reason for this to occur,
2681 * and it's severe enough.
2682 */
2683
2684 cmd->result = DID_NO_CONNECT << 16;
2685 }
2686 break;
2687
2688 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2689 break;
2690 case CMD_DATA_OVERRUN:
2691 dev_warn(&h->pdev->dev,
2692 "CDB %16phN data overrun\n", cp->Request.CDB);
2693 break;
2694 case CMD_INVALID: {
2695 /* print_bytes(cp, sizeof(*cp), 1, 0);
2696 print_cmd(cp); */
2697 /* We get CMD_INVALID if you address a non-existent device
2698 * instead of a selection timeout (no response). You will
2699 * see this if you yank out a drive, then try to access it.
2700 * This is kind of a shame because it means that any other
2701 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2702 * missing target. */
2703 cmd->result = DID_NO_CONNECT << 16;
2704 }
2705 break;
2706 case CMD_PROTOCOL_ERR:
2707 cmd->result = DID_ERROR << 16;
2708 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2709 cp->Request.CDB);
2710 break;
2711 case CMD_HARDWARE_ERR:
2712 cmd->result = DID_ERROR << 16;
2713 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2714 cp->Request.CDB);
2715 break;
2716 case CMD_CONNECTION_LOST:
2717 cmd->result = DID_ERROR << 16;
2718 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2719 cp->Request.CDB);
2720 break;
2721 case CMD_ABORTED:
2722 cmd->result = DID_ABORT << 16;
2723 break;
2724 case CMD_ABORT_FAILED:
2725 cmd->result = DID_ERROR << 16;
2726 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2727 cp->Request.CDB);
2728 break;
2729 case CMD_UNSOLICITED_ABORT:
2730 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2731 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2732 cp->Request.CDB);
2733 break;
2734 case CMD_TIMEOUT:
2735 cmd->result = DID_TIME_OUT << 16;
2736 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2737 cp->Request.CDB);
2738 break;
2739 case CMD_UNABORTABLE:
2740 cmd->result = DID_ERROR << 16;
2741 dev_warn(&h->pdev->dev, "Command unabortable\n");
2742 break;
2743 case CMD_TMF_STATUS:
2744 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2745 cmd->result = DID_ERROR << 16;
2746 break;
2747 case CMD_IOACCEL_DISABLED:
2748 /* This only handles the direct pass-through case since RAID
2749 * offload is handled above. Just attempt a retry.
2750 */
2751 cmd->result = DID_SOFT_ERROR << 16;
2752 dev_warn(&h->pdev->dev,
2753 "cp %p had HP SSD Smart Path error\n", cp);
2754 break;
2755 default:
2756 cmd->result = DID_ERROR << 16;
2757 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2758 cp, ei->CommandStatus);
2759 }
2760
2761 return hpsa_cmd_free_and_done(h, cp, cmd);
2762 }
2763
2764 static void hpsa_pci_unmap(struct pci_dev *pdev,
2765 struct CommandList *c, int sg_used, int data_direction)
2766 {
2767 int i;
2768
2769 for (i = 0; i < sg_used; i++)
2770 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2771 le32_to_cpu(c->SG[i].Len),
2772 data_direction);
2773 }
2774
2775 static int hpsa_map_one(struct pci_dev *pdev,
2776 struct CommandList *cp,
2777 unsigned char *buf,
2778 size_t buflen,
2779 int data_direction)
2780 {
2781 u64 addr64;
2782
2783 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2784 cp->Header.SGList = 0;
2785 cp->Header.SGTotal = cpu_to_le16(0);
2786 return 0;
2787 }
2788
2789 addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2790 if (dma_mapping_error(&pdev->dev, addr64)) {
2791 /* Prevent subsequent unmap of something never mapped */
2792 cp->Header.SGList = 0;
2793 cp->Header.SGTotal = cpu_to_le16(0);
2794 return -1;
2795 }
2796 cp->SG[0].Addr = cpu_to_le64(addr64);
2797 cp->SG[0].Len = cpu_to_le32(buflen);
2798 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2799 cp->Header.SGList = 1; /* no. SGs contig in this cmd */
2800 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2801 return 0;
2802 }
2803
2804 #define NO_TIMEOUT ((unsigned long) -1)
2805 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2806 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2807 struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2808 {
2809 DECLARE_COMPLETION_ONSTACK(wait);
2810
2811 c->waiting = &wait;
2812 __enqueue_cmd_and_start_io(h, c, reply_queue);
2813 if (timeout_msecs == NO_TIMEOUT) {
2814 /* TODO: get rid of this no-timeout thing */
2815 wait_for_completion_io(&wait);
2816 return IO_OK;
2817 }
2818 if (!wait_for_completion_io_timeout(&wait,
2819 msecs_to_jiffies(timeout_msecs))) {
2820 dev_warn(&h->pdev->dev, "Command timed out.\n");
2821 return -ETIMEDOUT;
2822 }
2823 return IO_OK;
2824 }
2825
2826 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2827 int reply_queue, unsigned long timeout_msecs)
2828 {
2829 if (unlikely(lockup_detected(h))) {
2830 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2831 return IO_OK;
2832 }
2833 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2834 }
2835
2836 static u32 lockup_detected(struct ctlr_info *h)
2837 {
2838 int cpu;
2839 u32 rc, *lockup_detected;
2840
2841 cpu = get_cpu();
2842 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2843 rc = *lockup_detected;
2844 put_cpu();
2845 return rc;
2846 }
2847
2848 #define MAX_DRIVER_CMD_RETRIES 25
2849 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2850 struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2851 {
2852 int backoff_time = 10, retry_count = 0;
2853 int rc;
2854
2855 do {
2856 memset(c->err_info, 0, sizeof(*c->err_info));
2857 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2858 timeout_msecs);
2859 if (rc)
2860 break;
2861 retry_count++;
2862 if (retry_count > 3) {
2863 msleep(backoff_time);
2864 if (backoff_time < 1000)
2865 backoff_time *= 2;
2866 }
2867 } while ((check_for_unit_attention(h, c) ||
2868 check_for_busy(h, c)) &&
2869 retry_count <= MAX_DRIVER_CMD_RETRIES);
2870 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2871 if (retry_count > MAX_DRIVER_CMD_RETRIES)
2872 rc = -EIO;
2873 return rc;
2874 }
2875
2876 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2877 struct CommandList *c)
2878 {
2879 const u8 *cdb = c->Request.CDB;
2880 const u8 *lun = c->Header.LUN.LunAddrBytes;
2881
2882 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n",
2883 txt, lun, cdb);
2884 }
2885
2886 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2887 struct CommandList *cp)
2888 {
2889 const struct ErrorInfo *ei = cp->err_info;
2890 struct device *d = &cp->h->pdev->dev;
2891 u8 sense_key, asc, ascq;
2892 int sense_len;
2893
2894 switch (ei->CommandStatus) {
2895 case CMD_TARGET_STATUS:
2896 if (ei->SenseLen > sizeof(ei->SenseInfo))
2897 sense_len = sizeof(ei->SenseInfo);
2898 else
2899 sense_len = ei->SenseLen;
2900 decode_sense_data(ei->SenseInfo, sense_len,
2901 &sense_key, &asc, &ascq);
2902 hpsa_print_cmd(h, "SCSI status", cp);
2903 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2904 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2905 sense_key, asc, ascq);
2906 else
2907 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2908 if (ei->ScsiStatus == 0)
2909 dev_warn(d, "SCSI status is abnormally zero. "
2910 "(probably indicates selection timeout "
2911 "reported incorrectly due to a known "
2912 "firmware bug, circa July, 2001.)\n");
2913 break;
2914 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2915 break;
2916 case CMD_DATA_OVERRUN:
2917 hpsa_print_cmd(h, "overrun condition", cp);
2918 break;
2919 case CMD_INVALID: {
2920 /* controller unfortunately reports SCSI passthru's
2921 * to non-existent targets as invalid commands.
2922 */
2923 hpsa_print_cmd(h, "invalid command", cp);
2924 dev_warn(d, "probably means device no longer present\n");
2925 }
2926 break;
2927 case CMD_PROTOCOL_ERR:
2928 hpsa_print_cmd(h, "protocol error", cp);
2929 break;
2930 case CMD_HARDWARE_ERR:
2931 hpsa_print_cmd(h, "hardware error", cp);
2932 break;
2933 case CMD_CONNECTION_LOST:
2934 hpsa_print_cmd(h, "connection lost", cp);
2935 break;
2936 case CMD_ABORTED:
2937 hpsa_print_cmd(h, "aborted", cp);
2938 break;
2939 case CMD_ABORT_FAILED:
2940 hpsa_print_cmd(h, "abort failed", cp);
2941 break;
2942 case CMD_UNSOLICITED_ABORT:
2943 hpsa_print_cmd(h, "unsolicited abort", cp);
2944 break;
2945 case CMD_TIMEOUT:
2946 hpsa_print_cmd(h, "timed out", cp);
2947 break;
2948 case CMD_UNABORTABLE:
2949 hpsa_print_cmd(h, "unabortable", cp);
2950 break;
2951 case CMD_CTLR_LOCKUP:
2952 hpsa_print_cmd(h, "controller lockup detected", cp);
2953 break;
2954 default:
2955 hpsa_print_cmd(h, "unknown status", cp);
2956 dev_warn(d, "Unknown command status %x\n",
2957 ei->CommandStatus);
2958 }
2959 }
2960
2961 static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr,
2962 u8 page, u8 *buf, size_t bufsize)
2963 {
2964 int rc = IO_OK;
2965 struct CommandList *c;
2966 struct ErrorInfo *ei;
2967
2968 c = cmd_alloc(h);
2969 if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize,
2970 page, scsi3addr, TYPE_CMD)) {
2971 rc = -1;
2972 goto out;
2973 }
2974 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2975 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2976 if (rc)
2977 goto out;
2978 ei = c->err_info;
2979 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2980 hpsa_scsi_interpret_error(h, c);
2981 rc = -1;
2982 }
2983 out:
2984 cmd_free(h, c);
2985 return rc;
2986 }
2987
2988 static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h,
2989 u8 *scsi3addr)
2990 {
2991 u8 *buf;
2992 u64 sa = 0;
2993 int rc = 0;
2994
2995 buf = kzalloc(1024, GFP_KERNEL);
2996 if (!buf)
2997 return 0;
2998
2999 rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC,
3000 buf, 1024);
3001
3002 if (rc)
3003 goto out;
3004
3005 sa = get_unaligned_be64(buf+12);
3006
3007 out:
3008 kfree(buf);
3009 return sa;
3010 }
3011
3012 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
3013 u16 page, unsigned char *buf,
3014 unsigned char bufsize)
3015 {
3016 int rc = IO_OK;
3017 struct CommandList *c;
3018 struct ErrorInfo *ei;
3019
3020 c = cmd_alloc(h);
3021
3022 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
3023 page, scsi3addr, TYPE_CMD)) {
3024 rc = -1;
3025 goto out;
3026 }
3027 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3028 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3029 if (rc)
3030 goto out;
3031 ei = c->err_info;
3032 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3033 hpsa_scsi_interpret_error(h, c);
3034 rc = -1;
3035 }
3036 out:
3037 cmd_free(h, c);
3038 return rc;
3039 }
3040
3041 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
3042 u8 reset_type, int reply_queue)
3043 {
3044 int rc = IO_OK;
3045 struct CommandList *c;
3046 struct ErrorInfo *ei;
3047
3048 c = cmd_alloc(h);
3049
3050
3051 /* fill_cmd can't fail here, no data buffer to map. */
3052 (void) fill_cmd(c, reset_type, h, NULL, 0, 0,
3053 scsi3addr, TYPE_MSG);
3054 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
3055 if (rc) {
3056 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
3057 goto out;
3058 }
3059 /* no unmap needed here because no data xfer. */
3060
3061 ei = c->err_info;
3062 if (ei->CommandStatus != 0) {
3063 hpsa_scsi_interpret_error(h, c);
3064 rc = -1;
3065 }
3066 out:
3067 cmd_free(h, c);
3068 return rc;
3069 }
3070
3071 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
3072 struct hpsa_scsi_dev_t *dev,
3073 unsigned char *scsi3addr)
3074 {
3075 int i;
3076 bool match = false;
3077 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
3078 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
3079
3080 if (hpsa_is_cmd_idle(c))
3081 return false;
3082
3083 switch (c->cmd_type) {
3084 case CMD_SCSI:
3085 case CMD_IOCTL_PEND:
3086 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
3087 sizeof(c->Header.LUN.LunAddrBytes));
3088 break;
3089
3090 case CMD_IOACCEL1:
3091 case CMD_IOACCEL2:
3092 if (c->phys_disk == dev) {
3093 /* HBA mode match */
3094 match = true;
3095 } else {
3096 /* Possible RAID mode -- check each phys dev. */
3097 /* FIXME: Do we need to take out a lock here? If
3098 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
3099 * instead. */
3100 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3101 /* FIXME: an alternate test might be
3102 *
3103 * match = dev->phys_disk[i]->ioaccel_handle
3104 * == c2->scsi_nexus; */
3105 match = dev->phys_disk[i] == c->phys_disk;
3106 }
3107 }
3108 break;
3109
3110 case IOACCEL2_TMF:
3111 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3112 match = dev->phys_disk[i]->ioaccel_handle ==
3113 le32_to_cpu(ac->it_nexus);
3114 }
3115 break;
3116
3117 case 0: /* The command is in the middle of being initialized. */
3118 match = false;
3119 break;
3120
3121 default:
3122 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3123 c->cmd_type);
3124 BUG();
3125 }
3126
3127 return match;
3128 }
3129
3130 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3131 unsigned char *scsi3addr, u8 reset_type, int reply_queue)
3132 {
3133 int i;
3134 int rc = 0;
3135
3136 /* We can really only handle one reset at a time */
3137 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3138 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3139 return -EINTR;
3140 }
3141
3142 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
3143
3144 for (i = 0; i < h->nr_cmds; i++) {
3145 struct CommandList *c = h->cmd_pool + i;
3146 int refcount = atomic_inc_return(&c->refcount);
3147
3148 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
3149 unsigned long flags;
3150
3151 /*
3152 * Mark the target command as having a reset pending,
3153 * then lock a lock so that the command cannot complete
3154 * while we're considering it. If the command is not
3155 * idle then count it; otherwise revoke the event.
3156 */
3157 c->reset_pending = dev;
3158 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
3159 if (!hpsa_is_cmd_idle(c))
3160 atomic_inc(&dev->reset_cmds_out);
3161 else
3162 c->reset_pending = NULL;
3163 spin_unlock_irqrestore(&h->lock, flags);
3164 }
3165
3166 cmd_free(h, c);
3167 }
3168
3169 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
3170 if (!rc)
3171 wait_event(h->event_sync_wait_queue,
3172 atomic_read(&dev->reset_cmds_out) == 0 ||
3173 lockup_detected(h));
3174
3175 if (unlikely(lockup_detected(h))) {
3176 dev_warn(&h->pdev->dev,
3177 "Controller lockup detected during reset wait\n");
3178 rc = -ENODEV;
3179 }
3180
3181 if (unlikely(rc))
3182 atomic_set(&dev->reset_cmds_out, 0);
3183 else
3184 rc = wait_for_device_to_become_ready(h, scsi3addr, 0);
3185
3186 mutex_unlock(&h->reset_mutex);
3187 return rc;
3188 }
3189
3190 static void hpsa_get_raid_level(struct ctlr_info *h,
3191 unsigned char *scsi3addr, unsigned char *raid_level)
3192 {
3193 int rc;
3194 unsigned char *buf;
3195
3196 *raid_level = RAID_UNKNOWN;
3197 buf = kzalloc(64, GFP_KERNEL);
3198 if (!buf)
3199 return;
3200
3201 if (!hpsa_vpd_page_supported(h, scsi3addr,
3202 HPSA_VPD_LV_DEVICE_GEOMETRY))
3203 goto exit;
3204
3205 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3206 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
3207
3208 if (rc == 0)
3209 *raid_level = buf[8];
3210 if (*raid_level > RAID_UNKNOWN)
3211 *raid_level = RAID_UNKNOWN;
3212 exit:
3213 kfree(buf);
3214 return;
3215 }
3216
3217 #define HPSA_MAP_DEBUG
3218 #ifdef HPSA_MAP_DEBUG
3219 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3220 struct raid_map_data *map_buff)
3221 {
3222 struct raid_map_disk_data *dd = &map_buff->data[0];
3223 int map, row, col;
3224 u16 map_cnt, row_cnt, disks_per_row;
3225
3226 if (rc != 0)
3227 return;
3228
3229 /* Show details only if debugging has been activated. */
3230 if (h->raid_offload_debug < 2)
3231 return;
3232
3233 dev_info(&h->pdev->dev, "structure_size = %u\n",
3234 le32_to_cpu(map_buff->structure_size));
3235 dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3236 le32_to_cpu(map_buff->volume_blk_size));
3237 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3238 le64_to_cpu(map_buff->volume_blk_cnt));
3239 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3240 map_buff->phys_blk_shift);
3241 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3242 map_buff->parity_rotation_shift);
3243 dev_info(&h->pdev->dev, "strip_size = %u\n",
3244 le16_to_cpu(map_buff->strip_size));
3245 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3246 le64_to_cpu(map_buff->disk_starting_blk));
3247 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3248 le64_to_cpu(map_buff->disk_blk_cnt));
3249 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3250 le16_to_cpu(map_buff->data_disks_per_row));
3251 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3252 le16_to_cpu(map_buff->metadata_disks_per_row));
3253 dev_info(&h->pdev->dev, "row_cnt = %u\n",
3254 le16_to_cpu(map_buff->row_cnt));
3255 dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3256 le16_to_cpu(map_buff->layout_map_count));
3257 dev_info(&h->pdev->dev, "flags = 0x%x\n",
3258 le16_to_cpu(map_buff->flags));
3259 dev_info(&h->pdev->dev, "encryption = %s\n",
3260 le16_to_cpu(map_buff->flags) &
3261 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF");
3262 dev_info(&h->pdev->dev, "dekindex = %u\n",
3263 le16_to_cpu(map_buff->dekindex));
3264 map_cnt = le16_to_cpu(map_buff->layout_map_count);
3265 for (map = 0; map < map_cnt; map++) {
3266 dev_info(&h->pdev->dev, "Map%u:\n", map);
3267 row_cnt = le16_to_cpu(map_buff->row_cnt);
3268 for (row = 0; row < row_cnt; row++) {
3269 dev_info(&h->pdev->dev, " Row%u:\n", row);
3270 disks_per_row =
3271 le16_to_cpu(map_buff->data_disks_per_row);
3272 for (col = 0; col < disks_per_row; col++, dd++)
3273 dev_info(&h->pdev->dev,
3274 " D%02u: h=0x%04x xor=%u,%u\n",
3275 col, dd->ioaccel_handle,
3276 dd->xor_mult[0], dd->xor_mult[1]);
3277 disks_per_row =
3278 le16_to_cpu(map_buff->metadata_disks_per_row);
3279 for (col = 0; col < disks_per_row; col++, dd++)
3280 dev_info(&h->pdev->dev,
3281 " M%02u: h=0x%04x xor=%u,%u\n",
3282 col, dd->ioaccel_handle,
3283 dd->xor_mult[0], dd->xor_mult[1]);
3284 }
3285 }
3286 }
3287 #else
3288 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3289 __attribute__((unused)) int rc,
3290 __attribute__((unused)) struct raid_map_data *map_buff)
3291 {
3292 }
3293 #endif
3294
3295 static int hpsa_get_raid_map(struct ctlr_info *h,
3296 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3297 {
3298 int rc = 0;
3299 struct CommandList *c;
3300 struct ErrorInfo *ei;
3301
3302 c = cmd_alloc(h);
3303
3304 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3305 sizeof(this_device->raid_map), 0,
3306 scsi3addr, TYPE_CMD)) {
3307 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3308 cmd_free(h, c);
3309 return -1;
3310 }
3311 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3312 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3313 if (rc)
3314 goto out;
3315 ei = c->err_info;
3316 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3317 hpsa_scsi_interpret_error(h, c);
3318 rc = -1;
3319 goto out;
3320 }
3321 cmd_free(h, c);
3322
3323 /* @todo in the future, dynamically allocate RAID map memory */
3324 if (le32_to_cpu(this_device->raid_map.structure_size) >
3325 sizeof(this_device->raid_map)) {
3326 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3327 rc = -1;
3328 }
3329 hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3330 return rc;
3331 out:
3332 cmd_free(h, c);
3333 return rc;
3334 }
3335
3336 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3337 unsigned char scsi3addr[], u16 bmic_device_index,
3338 struct bmic_sense_subsystem_info *buf, size_t bufsize)
3339 {
3340 int rc = IO_OK;
3341 struct CommandList *c;
3342 struct ErrorInfo *ei;
3343
3344 c = cmd_alloc(h);
3345
3346 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3347 0, RAID_CTLR_LUNID, TYPE_CMD);
3348 if (rc)
3349 goto out;
3350
3351 c->Request.CDB[2] = bmic_device_index & 0xff;
3352 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3353
3354 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3355 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3356 if (rc)
3357 goto out;
3358 ei = c->err_info;
3359 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3360 hpsa_scsi_interpret_error(h, c);
3361 rc = -1;
3362 }
3363 out:
3364 cmd_free(h, c);
3365 return rc;
3366 }
3367
3368 static int hpsa_bmic_id_controller(struct ctlr_info *h,
3369 struct bmic_identify_controller *buf, size_t bufsize)
3370 {
3371 int rc = IO_OK;
3372 struct CommandList *c;
3373 struct ErrorInfo *ei;
3374
3375 c = cmd_alloc(h);
3376
3377 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3378 0, RAID_CTLR_LUNID, TYPE_CMD);
3379 if (rc)
3380 goto out;
3381
3382 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3383 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3384 if (rc)
3385 goto out;
3386 ei = c->err_info;
3387 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3388 hpsa_scsi_interpret_error(h, c);
3389 rc = -1;
3390 }
3391 out:
3392 cmd_free(h, c);
3393 return rc;
3394 }
3395
3396 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3397 unsigned char scsi3addr[], u16 bmic_device_index,
3398 struct bmic_identify_physical_device *buf, size_t bufsize)
3399 {
3400 int rc = IO_OK;
3401 struct CommandList *c;
3402 struct ErrorInfo *ei;
3403
3404 c = cmd_alloc(h);
3405 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3406 0, RAID_CTLR_LUNID, TYPE_CMD);
3407 if (rc)
3408 goto out;
3409
3410 c->Request.CDB[2] = bmic_device_index & 0xff;
3411 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3412
3413 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3414 NO_TIMEOUT);
3415 ei = c->err_info;
3416 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3417 hpsa_scsi_interpret_error(h, c);
3418 rc = -1;
3419 }
3420 out:
3421 cmd_free(h, c);
3422
3423 return rc;
3424 }
3425
3426 /*
3427 * get enclosure information
3428 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3429 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3430 * Uses id_physical_device to determine the box_index.
3431 */
3432 static void hpsa_get_enclosure_info(struct ctlr_info *h,
3433 unsigned char *scsi3addr,
3434 struct ReportExtendedLUNdata *rlep, int rle_index,
3435 struct hpsa_scsi_dev_t *encl_dev)
3436 {
3437 int rc = -1;
3438 struct CommandList *c = NULL;
3439 struct ErrorInfo *ei = NULL;
3440 struct bmic_sense_storage_box_params *bssbp = NULL;
3441 struct bmic_identify_physical_device *id_phys = NULL;
3442 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3443 u16 bmic_device_index = 0;
3444
3445 encl_dev->eli =
3446 hpsa_get_enclosure_logical_identifier(h, scsi3addr);
3447
3448 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3449
3450 if (encl_dev->target == -1 || encl_dev->lun == -1) {
3451 rc = IO_OK;
3452 goto out;
3453 }
3454
3455 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
3456 rc = IO_OK;
3457 goto out;
3458 }
3459
3460 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3461 if (!bssbp)
3462 goto out;
3463
3464 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3465 if (!id_phys)
3466 goto out;
3467
3468 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3469 id_phys, sizeof(*id_phys));
3470 if (rc) {
3471 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3472 __func__, encl_dev->external, bmic_device_index);
3473 goto out;
3474 }
3475
3476 c = cmd_alloc(h);
3477
3478 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3479 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3480
3481 if (rc)
3482 goto out;
3483
3484 if (id_phys->phys_connector[1] == 'E')
3485 c->Request.CDB[5] = id_phys->box_index;
3486 else
3487 c->Request.CDB[5] = 0;
3488
3489 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3490 NO_TIMEOUT);
3491 if (rc)
3492 goto out;
3493
3494 ei = c->err_info;
3495 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3496 rc = -1;
3497 goto out;
3498 }
3499
3500 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3501 memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3502 bssbp->phys_connector, sizeof(bssbp->phys_connector));
3503
3504 rc = IO_OK;
3505 out:
3506 kfree(bssbp);
3507 kfree(id_phys);
3508
3509 if (c)
3510 cmd_free(h, c);
3511
3512 if (rc != IO_OK)
3513 hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3514 "Error, could not get enclosure information\n");
3515 }
3516
3517 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3518 unsigned char *scsi3addr)
3519 {
3520 struct ReportExtendedLUNdata *physdev;
3521 u32 nphysicals;
3522 u64 sa = 0;
3523 int i;
3524
3525 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3526 if (!physdev)
3527 return 0;
3528
3529 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3530 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3531 kfree(physdev);
3532 return 0;
3533 }
3534 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3535
3536 for (i = 0; i < nphysicals; i++)
3537 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3538 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3539 break;
3540 }
3541
3542 kfree(physdev);
3543
3544 return sa;
3545 }
3546
3547 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3548 struct hpsa_scsi_dev_t *dev)
3549 {
3550 int rc;
3551 u64 sa = 0;
3552
3553 if (is_hba_lunid(scsi3addr)) {
3554 struct bmic_sense_subsystem_info *ssi;
3555
3556 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3557 if (!ssi)
3558 return;
3559
3560 rc = hpsa_bmic_sense_subsystem_information(h,
3561 scsi3addr, 0, ssi, sizeof(*ssi));
3562 if (rc == 0) {
3563 sa = get_unaligned_be64(ssi->primary_world_wide_id);
3564 h->sas_address = sa;
3565 }
3566
3567 kfree(ssi);
3568 } else
3569 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3570
3571 dev->sas_address = sa;
3572 }
3573
3574 static void hpsa_ext_ctrl_present(struct ctlr_info *h,
3575 struct ReportExtendedLUNdata *physdev)
3576 {
3577 u32 nphysicals;
3578 int i;
3579
3580 if (h->discovery_polling)
3581 return;
3582
3583 nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1;
3584
3585 for (i = 0; i < nphysicals; i++) {
3586 if (physdev->LUN[i].device_type ==
3587 BMIC_DEVICE_TYPE_CONTROLLER
3588 && !is_hba_lunid(physdev->LUN[i].lunid)) {
3589 dev_info(&h->pdev->dev,
3590 "External controller present, activate discovery polling and disable rld caching\n");
3591 hpsa_disable_rld_caching(h);
3592 h->discovery_polling = 1;
3593 break;
3594 }
3595 }
3596 }
3597
3598 /* Get a device id from inquiry page 0x83 */
3599 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3600 unsigned char scsi3addr[], u8 page)
3601 {
3602 int rc;
3603 int i;
3604 int pages;
3605 unsigned char *buf, bufsize;
3606
3607 buf = kzalloc(256, GFP_KERNEL);
3608 if (!buf)
3609 return false;
3610
3611 /* Get the size of the page list first */
3612 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3613 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3614 buf, HPSA_VPD_HEADER_SZ);
3615 if (rc != 0)
3616 goto exit_unsupported;
3617 pages = buf[3];
3618 if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3619 bufsize = pages + HPSA_VPD_HEADER_SZ;
3620 else
3621 bufsize = 255;
3622
3623 /* Get the whole VPD page list */
3624 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3625 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3626 buf, bufsize);
3627 if (rc != 0)
3628 goto exit_unsupported;
3629
3630 pages = buf[3];
3631 for (i = 1; i <= pages; i++)
3632 if (buf[3 + i] == page)
3633 goto exit_supported;
3634 exit_unsupported:
3635 kfree(buf);
3636 return false;
3637 exit_supported:
3638 kfree(buf);
3639 return true;
3640 }
3641
3642 /*
3643 * Called during a scan operation.
3644 * Sets ioaccel status on the new device list, not the existing device list
3645 *
3646 * The device list used during I/O will be updated later in
3647 * adjust_hpsa_scsi_table.
3648 */
3649 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3650 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3651 {
3652 int rc;
3653 unsigned char *buf;
3654 u8 ioaccel_status;
3655
3656 this_device->offload_config = 0;
3657 this_device->offload_enabled = 0;
3658 this_device->offload_to_be_enabled = 0;
3659
3660 buf = kzalloc(64, GFP_KERNEL);
3661 if (!buf)
3662 return;
3663 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3664 goto out;
3665 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3666 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3667 if (rc != 0)
3668 goto out;
3669
3670 #define IOACCEL_STATUS_BYTE 4
3671 #define OFFLOAD_CONFIGURED_BIT 0x01
3672 #define OFFLOAD_ENABLED_BIT 0x02
3673 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3674 this_device->offload_config =
3675 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3676 if (this_device->offload_config) {
3677 this_device->offload_to_be_enabled =
3678 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3679 if (hpsa_get_raid_map(h, scsi3addr, this_device))
3680 this_device->offload_to_be_enabled = 0;
3681 }
3682
3683 out:
3684 kfree(buf);
3685 return;
3686 }
3687
3688 /* Get the device id from inquiry page 0x83 */
3689 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3690 unsigned char *device_id, int index, int buflen)
3691 {
3692 int rc;
3693 unsigned char *buf;
3694
3695 /* Does controller have VPD for device id? */
3696 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
3697 return 1; /* not supported */
3698
3699 buf = kzalloc(64, GFP_KERNEL);
3700 if (!buf)
3701 return -ENOMEM;
3702
3703 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3704 HPSA_VPD_LV_DEVICE_ID, buf, 64);
3705 if (rc == 0) {
3706 if (buflen > 16)
3707 buflen = 16;
3708 memcpy(device_id, &buf[8], buflen);
3709 }
3710
3711 kfree(buf);
3712
3713 return rc; /*0 - got id, otherwise, didn't */
3714 }
3715
3716 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3717 void *buf, int bufsize,
3718 int extended_response)
3719 {
3720 int rc = IO_OK;
3721 struct CommandList *c;
3722 unsigned char scsi3addr[8];
3723 struct ErrorInfo *ei;
3724
3725 c = cmd_alloc(h);
3726
3727 /* address the controller */
3728 memset(scsi3addr, 0, sizeof(scsi3addr));
3729 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3730 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3731 rc = -EAGAIN;
3732 goto out;
3733 }
3734 if (extended_response)
3735 c->Request.CDB[1] = extended_response;
3736 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3737 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3738 if (rc)
3739 goto out;
3740 ei = c->err_info;
3741 if (ei->CommandStatus != 0 &&
3742 ei->CommandStatus != CMD_DATA_UNDERRUN) {
3743 hpsa_scsi_interpret_error(h, c);
3744 rc = -EIO;
3745 } else {
3746 struct ReportLUNdata *rld = buf;
3747
3748 if (rld->extended_response_flag != extended_response) {
3749 if (!h->legacy_board) {
3750 dev_err(&h->pdev->dev,
3751 "report luns requested format %u, got %u\n",
3752 extended_response,
3753 rld->extended_response_flag);
3754 rc = -EINVAL;
3755 } else
3756 rc = -EOPNOTSUPP;
3757 }
3758 }
3759 out:
3760 cmd_free(h, c);
3761 return rc;
3762 }
3763
3764 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3765 struct ReportExtendedLUNdata *buf, int bufsize)
3766 {
3767 int rc;
3768 struct ReportLUNdata *lbuf;
3769
3770 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3771 HPSA_REPORT_PHYS_EXTENDED);
3772 if (!rc || rc != -EOPNOTSUPP)
3773 return rc;
3774
3775 /* REPORT PHYS EXTENDED is not supported */
3776 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL);
3777 if (!lbuf)
3778 return -ENOMEM;
3779
3780 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0);
3781 if (!rc) {
3782 int i;
3783 u32 nphys;
3784
3785 /* Copy ReportLUNdata header */
3786 memcpy(buf, lbuf, 8);
3787 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8;
3788 for (i = 0; i < nphys; i++)
3789 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8);
3790 }
3791 kfree(lbuf);
3792 return rc;
3793 }
3794
3795 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3796 struct ReportLUNdata *buf, int bufsize)
3797 {
3798 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3799 }
3800
3801 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3802 int bus, int target, int lun)
3803 {
3804 device->bus = bus;
3805 device->target = target;
3806 device->lun = lun;
3807 }
3808
3809 /* Use VPD inquiry to get details of volume status */
3810 static int hpsa_get_volume_status(struct ctlr_info *h,
3811 unsigned char scsi3addr[])
3812 {
3813 int rc;
3814 int status;
3815 int size;
3816 unsigned char *buf;
3817
3818 buf = kzalloc(64, GFP_KERNEL);
3819 if (!buf)
3820 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3821
3822 /* Does controller have VPD for logical volume status? */
3823 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3824 goto exit_failed;
3825
3826 /* Get the size of the VPD return buffer */
3827 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3828 buf, HPSA_VPD_HEADER_SZ);
3829 if (rc != 0)
3830 goto exit_failed;
3831 size = buf[3];
3832
3833 /* Now get the whole VPD buffer */
3834 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3835 buf, size + HPSA_VPD_HEADER_SZ);
3836 if (rc != 0)
3837 goto exit_failed;
3838 status = buf[4]; /* status byte */
3839
3840 kfree(buf);
3841 return status;
3842 exit_failed:
3843 kfree(buf);
3844 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3845 }
3846
3847 /* Determine offline status of a volume.
3848 * Return either:
3849 * 0 (not offline)
3850 * 0xff (offline for unknown reasons)
3851 * # (integer code indicating one of several NOT READY states
3852 * describing why a volume is to be kept offline)
3853 */
3854 static unsigned char hpsa_volume_offline(struct ctlr_info *h,
3855 unsigned char scsi3addr[])
3856 {
3857 struct CommandList *c;
3858 unsigned char *sense;
3859 u8 sense_key, asc, ascq;
3860 int sense_len;
3861 int rc, ldstat = 0;
3862 u16 cmd_status;
3863 u8 scsi_status;
3864 #define ASC_LUN_NOT_READY 0x04
3865 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3866 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3867
3868 c = cmd_alloc(h);
3869
3870 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3871 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3872 NO_TIMEOUT);
3873 if (rc) {
3874 cmd_free(h, c);
3875 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3876 }
3877 sense = c->err_info->SenseInfo;
3878 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3879 sense_len = sizeof(c->err_info->SenseInfo);
3880 else
3881 sense_len = c->err_info->SenseLen;
3882 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3883 cmd_status = c->err_info->CommandStatus;
3884 scsi_status = c->err_info->ScsiStatus;
3885 cmd_free(h, c);
3886
3887 /* Determine the reason for not ready state */
3888 ldstat = hpsa_get_volume_status(h, scsi3addr);
3889
3890 /* Keep volume offline in certain cases: */
3891 switch (ldstat) {
3892 case HPSA_LV_FAILED:
3893 case HPSA_LV_UNDERGOING_ERASE:
3894 case HPSA_LV_NOT_AVAILABLE:
3895 case HPSA_LV_UNDERGOING_RPI:
3896 case HPSA_LV_PENDING_RPI:
3897 case HPSA_LV_ENCRYPTED_NO_KEY:
3898 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3899 case HPSA_LV_UNDERGOING_ENCRYPTION:
3900 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3901 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3902 return ldstat;
3903 case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3904 /* If VPD status page isn't available,
3905 * use ASC/ASCQ to determine state
3906 */
3907 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3908 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3909 return ldstat;
3910 break;
3911 default:
3912 break;
3913 }
3914 return HPSA_LV_OK;
3915 }
3916
3917 static int hpsa_update_device_info(struct ctlr_info *h,
3918 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3919 unsigned char *is_OBDR_device)
3920 {
3921
3922 #define OBDR_SIG_OFFSET 43
3923 #define OBDR_TAPE_SIG "$DR-10"
3924 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3925 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3926
3927 unsigned char *inq_buff;
3928 unsigned char *obdr_sig;
3929 int rc = 0;
3930
3931 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3932 if (!inq_buff) {
3933 rc = -ENOMEM;
3934 goto bail_out;
3935 }
3936
3937 /* Do an inquiry to the device to see what it is. */
3938 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3939 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3940 dev_err(&h->pdev->dev,
3941 "%s: inquiry failed, device will be skipped.\n",
3942 __func__);
3943 rc = HPSA_INQUIRY_FAILED;
3944 goto bail_out;
3945 }
3946
3947 scsi_sanitize_inquiry_string(&inq_buff[8], 8);
3948 scsi_sanitize_inquiry_string(&inq_buff[16], 16);
3949
3950 this_device->devtype = (inq_buff[0] & 0x1f);
3951 memcpy(this_device->scsi3addr, scsi3addr, 8);
3952 memcpy(this_device->vendor, &inq_buff[8],
3953 sizeof(this_device->vendor));
3954 memcpy(this_device->model, &inq_buff[16],
3955 sizeof(this_device->model));
3956 this_device->rev = inq_buff[2];
3957 memset(this_device->device_id, 0,
3958 sizeof(this_device->device_id));
3959 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3960 sizeof(this_device->device_id)) < 0)
3961 dev_err(&h->pdev->dev,
3962 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n",
3963 h->ctlr, __func__,
3964 h->scsi_host->host_no,
3965 this_device->target, this_device->lun,
3966 scsi_device_type(this_device->devtype),
3967 this_device->model);
3968
3969 if ((this_device->devtype == TYPE_DISK ||
3970 this_device->devtype == TYPE_ZBC) &&
3971 is_logical_dev_addr_mode(scsi3addr)) {
3972 unsigned char volume_offline;
3973
3974 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3975 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3976 hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3977 volume_offline = hpsa_volume_offline(h, scsi3addr);
3978 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED &&
3979 h->legacy_board) {
3980 /*
3981 * Legacy boards might not support volume status
3982 */
3983 dev_info(&h->pdev->dev,
3984 "C0:T%d:L%d Volume status not available, assuming online.\n",
3985 this_device->target, this_device->lun);
3986 volume_offline = 0;
3987 }
3988 this_device->volume_offline = volume_offline;
3989 if (volume_offline == HPSA_LV_FAILED) {
3990 rc = HPSA_LV_FAILED;
3991 dev_err(&h->pdev->dev,
3992 "%s: LV failed, device will be skipped.\n",
3993 __func__);
3994 goto bail_out;
3995 }
3996 } else {
3997 this_device->raid_level = RAID_UNKNOWN;
3998 this_device->offload_config = 0;
3999 this_device->offload_enabled = 0;
4000 this_device->offload_to_be_enabled = 0;
4001 this_device->hba_ioaccel_enabled = 0;
4002 this_device->volume_offline = 0;
4003 this_device->queue_depth = h->nr_cmds;
4004 }
4005
4006 if (this_device->external)
4007 this_device->queue_depth = EXTERNAL_QD;
4008
4009 if (is_OBDR_device) {
4010 /* See if this is a One-Button-Disaster-Recovery device
4011 * by looking for "$DR-10" at offset 43 in inquiry data.
4012 */
4013 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
4014 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
4015 strncmp(obdr_sig, OBDR_TAPE_SIG,
4016 OBDR_SIG_LEN) == 0);
4017 }
4018 kfree(inq_buff);
4019 return 0;
4020
4021 bail_out:
4022 kfree(inq_buff);
4023 return rc;
4024 }
4025
4026 /*
4027 * Helper function to assign bus, target, lun mapping of devices.
4028 * Logical drive target and lun are assigned at this time, but
4029 * physical device lun and target assignment are deferred (assigned
4030 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
4031 */
4032 static void figure_bus_target_lun(struct ctlr_info *h,
4033 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
4034 {
4035 u32 lunid = get_unaligned_le32(lunaddrbytes);
4036
4037 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
4038 /* physical device, target and lun filled in later */
4039 if (is_hba_lunid(lunaddrbytes)) {
4040 int bus = HPSA_HBA_BUS;
4041
4042 if (!device->rev)
4043 bus = HPSA_LEGACY_HBA_BUS;
4044 hpsa_set_bus_target_lun(device,
4045 bus, 0, lunid & 0x3fff);
4046 } else
4047 /* defer target, lun assignment for physical devices */
4048 hpsa_set_bus_target_lun(device,
4049 HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
4050 return;
4051 }
4052 /* It's a logical device */
4053 if (device->external) {
4054 hpsa_set_bus_target_lun(device,
4055 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
4056 lunid & 0x00ff);
4057 return;
4058 }
4059 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
4060 0, lunid & 0x3fff);
4061 }
4062
4063 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
4064 int i, int nphysicals, int nlocal_logicals)
4065 {
4066 /* In report logicals, local logicals are listed first,
4067 * then any externals.
4068 */
4069 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4070
4071 if (i == raid_ctlr_position)
4072 return 0;
4073
4074 if (i < logicals_start)
4075 return 0;
4076
4077 /* i is in logicals range, but still within local logicals */
4078 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
4079 return 0;
4080
4081 return 1; /* it's an external lun */
4082 }
4083
4084 /*
4085 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
4086 * logdev. The number of luns in physdev and logdev are returned in
4087 * *nphysicals and *nlogicals, respectively.
4088 * Returns 0 on success, -1 otherwise.
4089 */
4090 static int hpsa_gather_lun_info(struct ctlr_info *h,
4091 struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
4092 struct ReportLUNdata *logdev, u32 *nlogicals)
4093 {
4094 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4095 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4096 return -1;
4097 }
4098 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4099 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
4100 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
4101 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4102 *nphysicals = HPSA_MAX_PHYS_LUN;
4103 }
4104 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4105 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4106 return -1;
4107 }
4108 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4109 /* Reject Logicals in excess of our max capability. */
4110 if (*nlogicals > HPSA_MAX_LUN) {
4111 dev_warn(&h->pdev->dev,
4112 "maximum logical LUNs (%d) exceeded. "
4113 "%d LUNs ignored.\n", HPSA_MAX_LUN,
4114 *nlogicals - HPSA_MAX_LUN);
4115 *nlogicals = HPSA_MAX_LUN;
4116 }
4117 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4118 dev_warn(&h->pdev->dev,
4119 "maximum logical + physical LUNs (%d) exceeded. "
4120 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4121 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4122 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4123 }
4124 return 0;
4125 }
4126
4127 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
4128 int i, int nphysicals, int nlogicals,
4129 struct ReportExtendedLUNdata *physdev_list,
4130 struct ReportLUNdata *logdev_list)
4131 {
4132 /* Helper function, figure out where the LUN ID info is coming from
4133 * given index i, lists of physical and logical devices, where in
4134 * the list the raid controller is supposed to appear (first or last)
4135 */
4136
4137 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4138 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4139
4140 if (i == raid_ctlr_position)
4141 return RAID_CTLR_LUNID;
4142
4143 if (i < logicals_start)
4144 return &physdev_list->LUN[i -
4145 (raid_ctlr_position == 0)].lunid[0];
4146
4147 if (i < last_device)
4148 return &logdev_list->LUN[i - nphysicals -
4149 (raid_ctlr_position == 0)][0];
4150 BUG();
4151 return NULL;
4152 }
4153
4154 /* get physical drive ioaccel handle and queue depth */
4155 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
4156 struct hpsa_scsi_dev_t *dev,
4157 struct ReportExtendedLUNdata *rlep, int rle_index,
4158 struct bmic_identify_physical_device *id_phys)
4159 {
4160 int rc;
4161 struct ext_report_lun_entry *rle;
4162
4163 rle = &rlep->LUN[rle_index];
4164
4165 dev->ioaccel_handle = rle->ioaccel_handle;
4166 if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4167 dev->hba_ioaccel_enabled = 1;
4168 memset(id_phys, 0, sizeof(*id_phys));
4169 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4170 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
4171 sizeof(*id_phys));
4172 if (!rc)
4173 /* Reserve space for FW operations */
4174 #define DRIVE_CMDS_RESERVED_FOR_FW 2
4175 #define DRIVE_QUEUE_DEPTH 7
4176 dev->queue_depth =
4177 le16_to_cpu(id_phys->current_queue_depth_limit) -
4178 DRIVE_CMDS_RESERVED_FOR_FW;
4179 else
4180 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
4181 }
4182
4183 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4184 struct ReportExtendedLUNdata *rlep, int rle_index,
4185 struct bmic_identify_physical_device *id_phys)
4186 {
4187 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
4188
4189 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
4190 this_device->hba_ioaccel_enabled = 1;
4191
4192 memcpy(&this_device->active_path_index,
4193 &id_phys->active_path_number,
4194 sizeof(this_device->active_path_index));
4195 memcpy(&this_device->path_map,
4196 &id_phys->redundant_path_present_map,
4197 sizeof(this_device->path_map));
4198 memcpy(&this_device->box,
4199 &id_phys->alternate_paths_phys_box_on_port,
4200 sizeof(this_device->box));
4201 memcpy(&this_device->phys_connector,
4202 &id_phys->alternate_paths_phys_connector,
4203 sizeof(this_device->phys_connector));
4204 memcpy(&this_device->bay,
4205 &id_phys->phys_bay_in_box,
4206 sizeof(this_device->bay));
4207 }
4208
4209 /* get number of local logical disks. */
4210 static int hpsa_set_local_logical_count(struct ctlr_info *h,
4211 struct bmic_identify_controller *id_ctlr,
4212 u32 *nlocals)
4213 {
4214 int rc;
4215
4216 if (!id_ctlr) {
4217 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
4218 __func__);
4219 return -ENOMEM;
4220 }
4221 memset(id_ctlr, 0, sizeof(*id_ctlr));
4222 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
4223 if (!rc)
4224 if (id_ctlr->configured_logical_drive_count < 255)
4225 *nlocals = id_ctlr->configured_logical_drive_count;
4226 else
4227 *nlocals = le16_to_cpu(
4228 id_ctlr->extended_logical_unit_count);
4229 else
4230 *nlocals = -1;
4231 return rc;
4232 }
4233
4234 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
4235 {
4236 struct bmic_identify_physical_device *id_phys;
4237 bool is_spare = false;
4238 int rc;
4239
4240 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4241 if (!id_phys)
4242 return false;
4243
4244 rc = hpsa_bmic_id_physical_device(h,
4245 lunaddrbytes,
4246 GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
4247 id_phys, sizeof(*id_phys));
4248 if (rc == 0)
4249 is_spare = (id_phys->more_flags >> 6) & 0x01;
4250
4251 kfree(id_phys);
4252 return is_spare;
4253 }
4254
4255 #define RPL_DEV_FLAG_NON_DISK 0x1
4256 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2
4257 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4
4258
4259 #define BMIC_DEVICE_TYPE_ENCLOSURE 6
4260
4261 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
4262 struct ext_report_lun_entry *rle)
4263 {
4264 u8 device_flags;
4265 u8 device_type;
4266
4267 if (!MASKED_DEVICE(lunaddrbytes))
4268 return false;
4269
4270 device_flags = rle->device_flags;
4271 device_type = rle->device_type;
4272
4273 if (device_flags & RPL_DEV_FLAG_NON_DISK) {
4274 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
4275 return false;
4276 return true;
4277 }
4278
4279 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
4280 return false;
4281
4282 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
4283 return false;
4284
4285 /*
4286 * Spares may be spun down, we do not want to
4287 * do an Inquiry to a RAID set spare drive as
4288 * that would have them spun up, that is a
4289 * performance hit because I/O to the RAID device
4290 * stops while the spin up occurs which can take
4291 * over 50 seconds.
4292 */
4293 if (hpsa_is_disk_spare(h, lunaddrbytes))
4294 return true;
4295
4296 return false;
4297 }
4298
4299 static void hpsa_update_scsi_devices(struct ctlr_info *h)
4300 {
4301 /* the idea here is we could get notified
4302 * that some devices have changed, so we do a report
4303 * physical luns and report logical luns cmd, and adjust
4304 * our list of devices accordingly.
4305 *
4306 * The scsi3addr's of devices won't change so long as the
4307 * adapter is not reset. That means we can rescan and
4308 * tell which devices we already know about, vs. new
4309 * devices, vs. disappearing devices.
4310 */
4311 struct ReportExtendedLUNdata *physdev_list = NULL;
4312 struct ReportLUNdata *logdev_list = NULL;
4313 struct bmic_identify_physical_device *id_phys = NULL;
4314 struct bmic_identify_controller *id_ctlr = NULL;
4315 u32 nphysicals = 0;
4316 u32 nlogicals = 0;
4317 u32 nlocal_logicals = 0;
4318 u32 ndev_allocated = 0;
4319 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4320 int ncurrent = 0;
4321 int i, n_ext_target_devs, ndevs_to_allocate;
4322 int raid_ctlr_position;
4323 bool physical_device;
4324 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4325
4326 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
4327 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4328 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4329 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
4330 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4331 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4332
4333 if (!currentsd || !physdev_list || !logdev_list ||
4334 !tmpdevice || !id_phys || !id_ctlr) {
4335 dev_err(&h->pdev->dev, "out of memory\n");
4336 goto out;
4337 }
4338 memset(lunzerobits, 0, sizeof(lunzerobits));
4339
4340 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4341
4342 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4343 logdev_list, &nlogicals)) {
4344 h->drv_req_rescan = 1;
4345 goto out;
4346 }
4347
4348 /* Set number of local logicals (non PTRAID) */
4349 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4350 dev_warn(&h->pdev->dev,
4351 "%s: Can't determine number of local logical devices.\n",
4352 __func__);
4353 }
4354
4355 /* We might see up to the maximum number of logical and physical disks
4356 * plus external target devices, and a device for the local RAID
4357 * controller.
4358 */
4359 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4360
4361 hpsa_ext_ctrl_present(h, physdev_list);
4362
4363 /* Allocate the per device structures */
4364 for (i = 0; i < ndevs_to_allocate; i++) {
4365 if (i >= HPSA_MAX_DEVICES) {
4366 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4367 " %d devices ignored.\n", HPSA_MAX_DEVICES,
4368 ndevs_to_allocate - HPSA_MAX_DEVICES);
4369 break;
4370 }
4371
4372 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4373 if (!currentsd[i]) {
4374 h->drv_req_rescan = 1;
4375 goto out;
4376 }
4377 ndev_allocated++;
4378 }
4379
4380 if (is_scsi_rev_5(h))
4381 raid_ctlr_position = 0;
4382 else
4383 raid_ctlr_position = nphysicals + nlogicals;
4384
4385 /* adjust our table of devices */
4386 n_ext_target_devs = 0;
4387 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
4388 u8 *lunaddrbytes, is_OBDR = 0;
4389 int rc = 0;
4390 int phys_dev_index = i - (raid_ctlr_position == 0);
4391 bool skip_device = false;
4392
4393 memset(tmpdevice, 0, sizeof(*tmpdevice));
4394
4395 physical_device = i < nphysicals + (raid_ctlr_position == 0);
4396
4397 /* Figure out where the LUN ID info is coming from */
4398 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4399 i, nphysicals, nlogicals, physdev_list, logdev_list);
4400
4401 /* Determine if this is a lun from an external target array */
4402 tmpdevice->external =
4403 figure_external_status(h, raid_ctlr_position, i,
4404 nphysicals, nlocal_logicals);
4405
4406 /*
4407 * Skip over some devices such as a spare.
4408 */
4409 if (!tmpdevice->external && physical_device) {
4410 skip_device = hpsa_skip_device(h, lunaddrbytes,
4411 &physdev_list->LUN[phys_dev_index]);
4412 if (skip_device)
4413 continue;
4414 }
4415
4416 /* Get device type, vendor, model, device id, raid_map */
4417 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4418 &is_OBDR);
4419 if (rc == -ENOMEM) {
4420 dev_warn(&h->pdev->dev,
4421 "Out of memory, rescan deferred.\n");
4422 h->drv_req_rescan = 1;
4423 goto out;
4424 }
4425 if (rc) {
4426 h->drv_req_rescan = 1;
4427 continue;
4428 }
4429
4430 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4431 this_device = currentsd[ncurrent];
4432
4433 *this_device = *tmpdevice;
4434 this_device->physical_device = physical_device;
4435
4436 /*
4437 * Expose all devices except for physical devices that
4438 * are masked.
4439 */
4440 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
4441 this_device->expose_device = 0;
4442 else
4443 this_device->expose_device = 1;
4444
4445
4446 /*
4447 * Get the SAS address for physical devices that are exposed.
4448 */
4449 if (this_device->physical_device && this_device->expose_device)
4450 hpsa_get_sas_address(h, lunaddrbytes, this_device);
4451
4452 switch (this_device->devtype) {
4453 case TYPE_ROM:
4454 /* We don't *really* support actual CD-ROM devices,
4455 * just "One Button Disaster Recovery" tape drive
4456 * which temporarily pretends to be a CD-ROM drive.
4457 * So we check that the device is really an OBDR tape
4458 * device by checking for "$DR-10" in bytes 43-48 of
4459 * the inquiry data.
4460 */
4461 if (is_OBDR)
4462 ncurrent++;
4463 break;
4464 case TYPE_DISK:
4465 case TYPE_ZBC:
4466 if (this_device->physical_device) {
4467 /* The disk is in HBA mode. */
4468 /* Never use RAID mapper in HBA mode. */
4469 this_device->offload_enabled = 0;
4470 hpsa_get_ioaccel_drive_info(h, this_device,
4471 physdev_list, phys_dev_index, id_phys);
4472 hpsa_get_path_info(this_device,
4473 physdev_list, phys_dev_index, id_phys);
4474 }
4475 ncurrent++;
4476 break;
4477 case TYPE_TAPE:
4478 case TYPE_MEDIUM_CHANGER:
4479 ncurrent++;
4480 break;
4481 case TYPE_ENCLOSURE:
4482 if (!this_device->external)
4483 hpsa_get_enclosure_info(h, lunaddrbytes,
4484 physdev_list, phys_dev_index,
4485 this_device);
4486 ncurrent++;
4487 break;
4488 case TYPE_RAID:
4489 /* Only present the Smartarray HBA as a RAID controller.
4490 * If it's a RAID controller other than the HBA itself
4491 * (an external RAID controller, MSA500 or similar)
4492 * don't present it.
4493 */
4494 if (!is_hba_lunid(lunaddrbytes))
4495 break;
4496 ncurrent++;
4497 break;
4498 default:
4499 break;
4500 }
4501 if (ncurrent >= HPSA_MAX_DEVICES)
4502 break;
4503 }
4504
4505 if (h->sas_host == NULL) {
4506 int rc = 0;
4507
4508 rc = hpsa_add_sas_host(h);
4509 if (rc) {
4510 dev_warn(&h->pdev->dev,
4511 "Could not add sas host %d\n", rc);
4512 goto out;
4513 }
4514 }
4515
4516 adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4517 out:
4518 kfree(tmpdevice);
4519 for (i = 0; i < ndev_allocated; i++)
4520 kfree(currentsd[i]);
4521 kfree(currentsd);
4522 kfree(physdev_list);
4523 kfree(logdev_list);
4524 kfree(id_ctlr);
4525 kfree(id_phys);
4526 }
4527
4528 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4529 struct scatterlist *sg)
4530 {
4531 u64 addr64 = (u64) sg_dma_address(sg);
4532 unsigned int len = sg_dma_len(sg);
4533
4534 desc->Addr = cpu_to_le64(addr64);
4535 desc->Len = cpu_to_le32(len);
4536 desc->Ext = 0;
4537 }
4538
4539 /*
4540 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4541 * dma mapping and fills in the scatter gather entries of the
4542 * hpsa command, cp.
4543 */
4544 static int hpsa_scatter_gather(struct ctlr_info *h,
4545 struct CommandList *cp,
4546 struct scsi_cmnd *cmd)
4547 {
4548 struct scatterlist *sg;
4549 int use_sg, i, sg_limit, chained, last_sg;
4550 struct SGDescriptor *curr_sg;
4551
4552 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4553
4554 use_sg = scsi_dma_map(cmd);
4555 if (use_sg < 0)
4556 return use_sg;
4557
4558 if (!use_sg)
4559 goto sglist_finished;
4560
4561 /*
4562 * If the number of entries is greater than the max for a single list,
4563 * then we have a chained list; we will set up all but one entry in the
4564 * first list (the last entry is saved for link information);
4565 * otherwise, we don't have a chained list and we'll set up at each of
4566 * the entries in the one list.
4567 */
4568 curr_sg = cp->SG;
4569 chained = use_sg > h->max_cmd_sg_entries;
4570 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4571 last_sg = scsi_sg_count(cmd) - 1;
4572 scsi_for_each_sg(cmd, sg, sg_limit, i) {
4573 hpsa_set_sg_descriptor(curr_sg, sg);
4574 curr_sg++;
4575 }
4576
4577 if (chained) {
4578 /*
4579 * Continue with the chained list. Set curr_sg to the chained
4580 * list. Modify the limit to the total count less the entries
4581 * we've already set up. Resume the scan at the list entry
4582 * where the previous loop left off.
4583 */
4584 curr_sg = h->cmd_sg_list[cp->cmdindex];
4585 sg_limit = use_sg - sg_limit;
4586 for_each_sg(sg, sg, sg_limit, i) {
4587 hpsa_set_sg_descriptor(curr_sg, sg);
4588 curr_sg++;
4589 }
4590 }
4591
4592 /* Back the pointer up to the last entry and mark it as "last". */
4593 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4594
4595 if (use_sg + chained > h->maxSG)
4596 h->maxSG = use_sg + chained;
4597
4598 if (chained) {
4599 cp->Header.SGList = h->max_cmd_sg_entries;
4600 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4601 if (hpsa_map_sg_chain_block(h, cp)) {
4602 scsi_dma_unmap(cmd);
4603 return -1;
4604 }
4605 return 0;
4606 }
4607
4608 sglist_finished:
4609
4610 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
4611 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4612 return 0;
4613 }
4614
4615 #define BUFLEN 128
4616 static inline void warn_zero_length_transfer(struct ctlr_info *h,
4617 u8 *cdb, int cdb_len,
4618 const char *func)
4619 {
4620 char buf[BUFLEN];
4621 int outlen;
4622 int i;
4623
4624 outlen = scnprintf(buf, BUFLEN,
4625 "%s: Blocking zero-length request: CDB:", func);
4626 for (i = 0; i < cdb_len; i++)
4627 outlen += scnprintf(buf+outlen, BUFLEN - outlen,
4628 "%02hhx", cdb[i]);
4629 dev_warn(&h->pdev->dev, "%s\n", buf);
4630 }
4631
4632 #define IO_ACCEL_INELIGIBLE 1
4633 /* zero-length transfers trigger hardware errors. */
4634 static bool is_zero_length_transfer(u8 *cdb)
4635 {
4636 u32 block_cnt;
4637
4638 /* Block zero-length transfer sizes on certain commands. */
4639 switch (cdb[0]) {
4640 case READ_10:
4641 case WRITE_10:
4642 case VERIFY: /* 0x2F */
4643 case WRITE_VERIFY: /* 0x2E */
4644 block_cnt = get_unaligned_be16(&cdb[7]);
4645 break;
4646 case READ_12:
4647 case WRITE_12:
4648 case VERIFY_12: /* 0xAF */
4649 case WRITE_VERIFY_12: /* 0xAE */
4650 block_cnt = get_unaligned_be32(&cdb[6]);
4651 break;
4652 case READ_16:
4653 case WRITE_16:
4654 case VERIFY_16: /* 0x8F */
4655 block_cnt = get_unaligned_be32(&cdb[10]);
4656 break;
4657 default:
4658 return false;
4659 }
4660
4661 return block_cnt == 0;
4662 }
4663
4664 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4665 {
4666 int is_write = 0;
4667 u32 block;
4668 u32 block_cnt;
4669
4670 /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4671 switch (cdb[0]) {
4672 case WRITE_6:
4673 case WRITE_12:
4674 is_write = 1;
4675 case READ_6:
4676 case READ_12:
4677 if (*cdb_len == 6) {
4678 block = (((cdb[1] & 0x1F) << 16) |
4679 (cdb[2] << 8) |
4680 cdb[3]);
4681 block_cnt = cdb[4];
4682 if (block_cnt == 0)
4683 block_cnt = 256;
4684 } else {
4685 BUG_ON(*cdb_len != 12);
4686 block = get_unaligned_be32(&cdb[2]);
4687 block_cnt = get_unaligned_be32(&cdb[6]);
4688 }
4689 if (block_cnt > 0xffff)
4690 return IO_ACCEL_INELIGIBLE;
4691
4692 cdb[0] = is_write ? WRITE_10 : READ_10;
4693 cdb[1] = 0;
4694 cdb[2] = (u8) (block >> 24);
4695 cdb[3] = (u8) (block >> 16);
4696 cdb[4] = (u8) (block >> 8);
4697 cdb[5] = (u8) (block);
4698 cdb[6] = 0;
4699 cdb[7] = (u8) (block_cnt >> 8);
4700 cdb[8] = (u8) (block_cnt);
4701 cdb[9] = 0;
4702 *cdb_len = 10;
4703 break;
4704 }
4705 return 0;
4706 }
4707
4708 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4709 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4710 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4711 {
4712 struct scsi_cmnd *cmd = c->scsi_cmd;
4713 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4714 unsigned int len;
4715 unsigned int total_len = 0;
4716 struct scatterlist *sg;
4717 u64 addr64;
4718 int use_sg, i;
4719 struct SGDescriptor *curr_sg;
4720 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4721
4722 /* TODO: implement chaining support */
4723 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4724 atomic_dec(&phys_disk->ioaccel_cmds_out);
4725 return IO_ACCEL_INELIGIBLE;
4726 }
4727
4728 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4729
4730 if (is_zero_length_transfer(cdb)) {
4731 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4732 atomic_dec(&phys_disk->ioaccel_cmds_out);
4733 return IO_ACCEL_INELIGIBLE;
4734 }
4735
4736 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4737 atomic_dec(&phys_disk->ioaccel_cmds_out);
4738 return IO_ACCEL_INELIGIBLE;
4739 }
4740
4741 c->cmd_type = CMD_IOACCEL1;
4742
4743 /* Adjust the DMA address to point to the accelerated command buffer */
4744 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4745 (c->cmdindex * sizeof(*cp));
4746 BUG_ON(c->busaddr & 0x0000007F);
4747
4748 use_sg = scsi_dma_map(cmd);
4749 if (use_sg < 0) {
4750 atomic_dec(&phys_disk->ioaccel_cmds_out);
4751 return use_sg;
4752 }
4753
4754 if (use_sg) {
4755 curr_sg = cp->SG;
4756 scsi_for_each_sg(cmd, sg, use_sg, i) {
4757 addr64 = (u64) sg_dma_address(sg);
4758 len = sg_dma_len(sg);
4759 total_len += len;
4760 curr_sg->Addr = cpu_to_le64(addr64);
4761 curr_sg->Len = cpu_to_le32(len);
4762 curr_sg->Ext = cpu_to_le32(0);
4763 curr_sg++;
4764 }
4765 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4766
4767 switch (cmd->sc_data_direction) {
4768 case DMA_TO_DEVICE:
4769 control |= IOACCEL1_CONTROL_DATA_OUT;
4770 break;
4771 case DMA_FROM_DEVICE:
4772 control |= IOACCEL1_CONTROL_DATA_IN;
4773 break;
4774 case DMA_NONE:
4775 control |= IOACCEL1_CONTROL_NODATAXFER;
4776 break;
4777 default:
4778 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4779 cmd->sc_data_direction);
4780 BUG();
4781 break;
4782 }
4783 } else {
4784 control |= IOACCEL1_CONTROL_NODATAXFER;
4785 }
4786
4787 c->Header.SGList = use_sg;
4788 /* Fill out the command structure to submit */
4789 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4790 cp->transfer_len = cpu_to_le32(total_len);
4791 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4792 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4793 cp->control = cpu_to_le32(control);
4794 memcpy(cp->CDB, cdb, cdb_len);
4795 memcpy(cp->CISS_LUN, scsi3addr, 8);
4796 /* Tag was already set at init time. */
4797 enqueue_cmd_and_start_io(h, c);
4798 return 0;
4799 }
4800
4801 /*
4802 * Queue a command directly to a device behind the controller using the
4803 * I/O accelerator path.
4804 */
4805 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4806 struct CommandList *c)
4807 {
4808 struct scsi_cmnd *cmd = c->scsi_cmd;
4809 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4810
4811 if (!dev)
4812 return -1;
4813
4814 c->phys_disk = dev;
4815
4816 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4817 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4818 }
4819
4820 /*
4821 * Set encryption parameters for the ioaccel2 request
4822 */
4823 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4824 struct CommandList *c, struct io_accel2_cmd *cp)
4825 {
4826 struct scsi_cmnd *cmd = c->scsi_cmd;
4827 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4828 struct raid_map_data *map = &dev->raid_map;
4829 u64 first_block;
4830
4831 /* Are we doing encryption on this device */
4832 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4833 return;
4834 /* Set the data encryption key index. */
4835 cp->dekindex = map->dekindex;
4836
4837 /* Set the encryption enable flag, encoded into direction field. */
4838 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4839
4840 /* Set encryption tweak values based on logical block address
4841 * If block size is 512, tweak value is LBA.
4842 * For other block sizes, tweak is (LBA * block size)/ 512)
4843 */
4844 switch (cmd->cmnd[0]) {
4845 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4846 case READ_6:
4847 case WRITE_6:
4848 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4849 (cmd->cmnd[2] << 8) |
4850 cmd->cmnd[3]);
4851 break;
4852 case WRITE_10:
4853 case READ_10:
4854 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4855 case WRITE_12:
4856 case READ_12:
4857 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4858 break;
4859 case WRITE_16:
4860 case READ_16:
4861 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4862 break;
4863 default:
4864 dev_err(&h->pdev->dev,
4865 "ERROR: %s: size (0x%x) not supported for encryption\n",
4866 __func__, cmd->cmnd[0]);
4867 BUG();
4868 break;
4869 }
4870
4871 if (le32_to_cpu(map->volume_blk_size) != 512)
4872 first_block = first_block *
4873 le32_to_cpu(map->volume_blk_size)/512;
4874
4875 cp->tweak_lower = cpu_to_le32(first_block);
4876 cp->tweak_upper = cpu_to_le32(first_block >> 32);
4877 }
4878
4879 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4880 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4881 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4882 {
4883 struct scsi_cmnd *cmd = c->scsi_cmd;
4884 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4885 struct ioaccel2_sg_element *curr_sg;
4886 int use_sg, i;
4887 struct scatterlist *sg;
4888 u64 addr64;
4889 u32 len;
4890 u32 total_len = 0;
4891
4892 if (!cmd->device)
4893 return -1;
4894
4895 if (!cmd->device->hostdata)
4896 return -1;
4897
4898 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4899
4900 if (is_zero_length_transfer(cdb)) {
4901 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4902 atomic_dec(&phys_disk->ioaccel_cmds_out);
4903 return IO_ACCEL_INELIGIBLE;
4904 }
4905
4906 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4907 atomic_dec(&phys_disk->ioaccel_cmds_out);
4908 return IO_ACCEL_INELIGIBLE;
4909 }
4910
4911 c->cmd_type = CMD_IOACCEL2;
4912 /* Adjust the DMA address to point to the accelerated command buffer */
4913 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4914 (c->cmdindex * sizeof(*cp));
4915 BUG_ON(c->busaddr & 0x0000007F);
4916
4917 memset(cp, 0, sizeof(*cp));
4918 cp->IU_type = IOACCEL2_IU_TYPE;
4919
4920 use_sg = scsi_dma_map(cmd);
4921 if (use_sg < 0) {
4922 atomic_dec(&phys_disk->ioaccel_cmds_out);
4923 return use_sg;
4924 }
4925
4926 if (use_sg) {
4927 curr_sg = cp->sg;
4928 if (use_sg > h->ioaccel_maxsg) {
4929 addr64 = le64_to_cpu(
4930 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4931 curr_sg->address = cpu_to_le64(addr64);
4932 curr_sg->length = 0;
4933 curr_sg->reserved[0] = 0;
4934 curr_sg->reserved[1] = 0;
4935 curr_sg->reserved[2] = 0;
4936 curr_sg->chain_indicator = IOACCEL2_CHAIN;
4937
4938 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4939 }
4940 scsi_for_each_sg(cmd, sg, use_sg, i) {
4941 addr64 = (u64) sg_dma_address(sg);
4942 len = sg_dma_len(sg);
4943 total_len += len;
4944 curr_sg->address = cpu_to_le64(addr64);
4945 curr_sg->length = cpu_to_le32(len);
4946 curr_sg->reserved[0] = 0;
4947 curr_sg->reserved[1] = 0;
4948 curr_sg->reserved[2] = 0;
4949 curr_sg->chain_indicator = 0;
4950 curr_sg++;
4951 }
4952
4953 /*
4954 * Set the last s/g element bit
4955 */
4956 (curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG;
4957
4958 switch (cmd->sc_data_direction) {
4959 case DMA_TO_DEVICE:
4960 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4961 cp->direction |= IOACCEL2_DIR_DATA_OUT;
4962 break;
4963 case DMA_FROM_DEVICE:
4964 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4965 cp->direction |= IOACCEL2_DIR_DATA_IN;
4966 break;
4967 case DMA_NONE:
4968 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4969 cp->direction |= IOACCEL2_DIR_NO_DATA;
4970 break;
4971 default:
4972 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4973 cmd->sc_data_direction);
4974 BUG();
4975 break;
4976 }
4977 } else {
4978 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4979 cp->direction |= IOACCEL2_DIR_NO_DATA;
4980 }
4981
4982 /* Set encryption parameters, if necessary */
4983 set_encrypt_ioaccel2(h, c, cp);
4984
4985 cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4986 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4987 memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4988
4989 cp->data_len = cpu_to_le32(total_len);
4990 cp->err_ptr = cpu_to_le64(c->busaddr +
4991 offsetof(struct io_accel2_cmd, error_data));
4992 cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4993
4994 /* fill in sg elements */
4995 if (use_sg > h->ioaccel_maxsg) {
4996 cp->sg_count = 1;
4997 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
4998 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4999 atomic_dec(&phys_disk->ioaccel_cmds_out);
5000 scsi_dma_unmap(cmd);
5001 return -1;
5002 }
5003 } else
5004 cp->sg_count = (u8) use_sg;
5005
5006 enqueue_cmd_and_start_io(h, c);
5007 return 0;
5008 }
5009
5010 /*
5011 * Queue a command to the correct I/O accelerator path.
5012 */
5013 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
5014 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
5015 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
5016 {
5017 if (!c->scsi_cmd->device)
5018 return -1;
5019
5020 if (!c->scsi_cmd->device->hostdata)
5021 return -1;
5022
5023 /* Try to honor the device's queue depth */
5024 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
5025 phys_disk->queue_depth) {
5026 atomic_dec(&phys_disk->ioaccel_cmds_out);
5027 return IO_ACCEL_INELIGIBLE;
5028 }
5029 if (h->transMethod & CFGTBL_Trans_io_accel1)
5030 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
5031 cdb, cdb_len, scsi3addr,
5032 phys_disk);
5033 else
5034 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
5035 cdb, cdb_len, scsi3addr,
5036 phys_disk);
5037 }
5038
5039 static void raid_map_helper(struct raid_map_data *map,
5040 int offload_to_mirror, u32 *map_index, u32 *current_group)
5041 {
5042 if (offload_to_mirror == 0) {
5043 /* use physical disk in the first mirrored group. */
5044 *map_index %= le16_to_cpu(map->data_disks_per_row);
5045 return;
5046 }
5047 do {
5048 /* determine mirror group that *map_index indicates */
5049 *current_group = *map_index /
5050 le16_to_cpu(map->data_disks_per_row);
5051 if (offload_to_mirror == *current_group)
5052 continue;
5053 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
5054 /* select map index from next group */
5055 *map_index += le16_to_cpu(map->data_disks_per_row);
5056 (*current_group)++;
5057 } else {
5058 /* select map index from first group */
5059 *map_index %= le16_to_cpu(map->data_disks_per_row);
5060 *current_group = 0;
5061 }
5062 } while (offload_to_mirror != *current_group);
5063 }
5064
5065 /*
5066 * Attempt to perform offload RAID mapping for a logical volume I/O.
5067 */
5068 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
5069 struct CommandList *c)
5070 {
5071 struct scsi_cmnd *cmd = c->scsi_cmd;
5072 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5073 struct raid_map_data *map = &dev->raid_map;
5074 struct raid_map_disk_data *dd = &map->data[0];
5075 int is_write = 0;
5076 u32 map_index;
5077 u64 first_block, last_block;
5078 u32 block_cnt;
5079 u32 blocks_per_row;
5080 u64 first_row, last_row;
5081 u32 first_row_offset, last_row_offset;
5082 u32 first_column, last_column;
5083 u64 r0_first_row, r0_last_row;
5084 u32 r5or6_blocks_per_row;
5085 u64 r5or6_first_row, r5or6_last_row;
5086 u32 r5or6_first_row_offset, r5or6_last_row_offset;
5087 u32 r5or6_first_column, r5or6_last_column;
5088 u32 total_disks_per_row;
5089 u32 stripesize;
5090 u32 first_group, last_group, current_group;
5091 u32 map_row;
5092 u32 disk_handle;
5093 u64 disk_block;
5094 u32 disk_block_cnt;
5095 u8 cdb[16];
5096 u8 cdb_len;
5097 u16 strip_size;
5098 #if BITS_PER_LONG == 32
5099 u64 tmpdiv;
5100 #endif
5101 int offload_to_mirror;
5102
5103 if (!dev)
5104 return -1;
5105
5106 /* check for valid opcode, get LBA and block count */
5107 switch (cmd->cmnd[0]) {
5108 case WRITE_6:
5109 is_write = 1;
5110 case READ_6:
5111 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
5112 (cmd->cmnd[2] << 8) |
5113 cmd->cmnd[3]);
5114 block_cnt = cmd->cmnd[4];
5115 if (block_cnt == 0)
5116 block_cnt = 256;
5117 break;
5118 case WRITE_10:
5119 is_write = 1;
5120 case READ_10:
5121 first_block =
5122 (((u64) cmd->cmnd[2]) << 24) |
5123 (((u64) cmd->cmnd[3]) << 16) |
5124 (((u64) cmd->cmnd[4]) << 8) |
5125 cmd->cmnd[5];
5126 block_cnt =
5127 (((u32) cmd->cmnd[7]) << 8) |
5128 cmd->cmnd[8];
5129 break;
5130 case WRITE_12:
5131 is_write = 1;
5132 case READ_12:
5133 first_block =
5134 (((u64) cmd->cmnd[2]) << 24) |
5135 (((u64) cmd->cmnd[3]) << 16) |
5136 (((u64) cmd->cmnd[4]) << 8) |
5137 cmd->cmnd[5];
5138 block_cnt =
5139 (((u32) cmd->cmnd[6]) << 24) |
5140 (((u32) cmd->cmnd[7]) << 16) |
5141 (((u32) cmd->cmnd[8]) << 8) |
5142 cmd->cmnd[9];
5143 break;
5144 case WRITE_16:
5145 is_write = 1;
5146 case READ_16:
5147 first_block =
5148 (((u64) cmd->cmnd[2]) << 56) |
5149 (((u64) cmd->cmnd[3]) << 48) |
5150 (((u64) cmd->cmnd[4]) << 40) |
5151 (((u64) cmd->cmnd[5]) << 32) |
5152 (((u64) cmd->cmnd[6]) << 24) |
5153 (((u64) cmd->cmnd[7]) << 16) |
5154 (((u64) cmd->cmnd[8]) << 8) |
5155 cmd->cmnd[9];
5156 block_cnt =
5157 (((u32) cmd->cmnd[10]) << 24) |
5158 (((u32) cmd->cmnd[11]) << 16) |
5159 (((u32) cmd->cmnd[12]) << 8) |
5160 cmd->cmnd[13];
5161 break;
5162 default:
5163 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5164 }
5165 last_block = first_block + block_cnt - 1;
5166
5167 /* check for write to non-RAID-0 */
5168 if (is_write && dev->raid_level != 0)
5169 return IO_ACCEL_INELIGIBLE;
5170
5171 /* check for invalid block or wraparound */
5172 if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
5173 last_block < first_block)
5174 return IO_ACCEL_INELIGIBLE;
5175
5176 /* calculate stripe information for the request */
5177 blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
5178 le16_to_cpu(map->strip_size);
5179 strip_size = le16_to_cpu(map->strip_size);
5180 #if BITS_PER_LONG == 32
5181 tmpdiv = first_block;
5182 (void) do_div(tmpdiv, blocks_per_row);
5183 first_row = tmpdiv;
5184 tmpdiv = last_block;
5185 (void) do_div(tmpdiv, blocks_per_row);
5186 last_row = tmpdiv;
5187 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5188 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5189 tmpdiv = first_row_offset;
5190 (void) do_div(tmpdiv, strip_size);
5191 first_column = tmpdiv;
5192 tmpdiv = last_row_offset;
5193 (void) do_div(tmpdiv, strip_size);
5194 last_column = tmpdiv;
5195 #else
5196 first_row = first_block / blocks_per_row;
5197 last_row = last_block / blocks_per_row;
5198 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5199 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5200 first_column = first_row_offset / strip_size;
5201 last_column = last_row_offset / strip_size;
5202 #endif
5203
5204 /* if this isn't a single row/column then give to the controller */
5205 if ((first_row != last_row) || (first_column != last_column))
5206 return IO_ACCEL_INELIGIBLE;
5207
5208 /* proceeding with driver mapping */
5209 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
5210 le16_to_cpu(map->metadata_disks_per_row);
5211 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5212 le16_to_cpu(map->row_cnt);
5213 map_index = (map_row * total_disks_per_row) + first_column;
5214
5215 switch (dev->raid_level) {
5216 case HPSA_RAID_0:
5217 break; /* nothing special to do */
5218 case HPSA_RAID_1:
5219 /* Handles load balance across RAID 1 members.
5220 * (2-drive R1 and R10 with even # of drives.)
5221 * Appropriate for SSDs, not optimal for HDDs
5222 */
5223 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
5224 if (dev->offload_to_mirror)
5225 map_index += le16_to_cpu(map->data_disks_per_row);
5226 dev->offload_to_mirror = !dev->offload_to_mirror;
5227 break;
5228 case HPSA_RAID_ADM:
5229 /* Handles N-way mirrors (R1-ADM)
5230 * and R10 with # of drives divisible by 3.)
5231 */
5232 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
5233
5234 offload_to_mirror = dev->offload_to_mirror;
5235 raid_map_helper(map, offload_to_mirror,
5236 &map_index, &current_group);
5237 /* set mirror group to use next time */
5238 offload_to_mirror =
5239 (offload_to_mirror >=
5240 le16_to_cpu(map->layout_map_count) - 1)
5241 ? 0 : offload_to_mirror + 1;
5242 dev->offload_to_mirror = offload_to_mirror;
5243 /* Avoid direct use of dev->offload_to_mirror within this
5244 * function since multiple threads might simultaneously
5245 * increment it beyond the range of dev->layout_map_count -1.
5246 */
5247 break;
5248 case HPSA_RAID_5:
5249 case HPSA_RAID_6:
5250 if (le16_to_cpu(map->layout_map_count) <= 1)
5251 break;
5252
5253 /* Verify first and last block are in same RAID group */
5254 r5or6_blocks_per_row =
5255 le16_to_cpu(map->strip_size) *
5256 le16_to_cpu(map->data_disks_per_row);
5257 BUG_ON(r5or6_blocks_per_row == 0);
5258 stripesize = r5or6_blocks_per_row *
5259 le16_to_cpu(map->layout_map_count);
5260 #if BITS_PER_LONG == 32
5261 tmpdiv = first_block;
5262 first_group = do_div(tmpdiv, stripesize);
5263 tmpdiv = first_group;
5264 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5265 first_group = tmpdiv;
5266 tmpdiv = last_block;
5267 last_group = do_div(tmpdiv, stripesize);
5268 tmpdiv = last_group;
5269 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5270 last_group = tmpdiv;
5271 #else
5272 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
5273 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
5274 #endif
5275 if (first_group != last_group)
5276 return IO_ACCEL_INELIGIBLE;
5277
5278 /* Verify request is in a single row of RAID 5/6 */
5279 #if BITS_PER_LONG == 32
5280 tmpdiv = first_block;
5281 (void) do_div(tmpdiv, stripesize);
5282 first_row = r5or6_first_row = r0_first_row = tmpdiv;
5283 tmpdiv = last_block;
5284 (void) do_div(tmpdiv, stripesize);
5285 r5or6_last_row = r0_last_row = tmpdiv;
5286 #else
5287 first_row = r5or6_first_row = r0_first_row =
5288 first_block / stripesize;
5289 r5or6_last_row = r0_last_row = last_block / stripesize;
5290 #endif
5291 if (r5or6_first_row != r5or6_last_row)
5292 return IO_ACCEL_INELIGIBLE;
5293
5294
5295 /* Verify request is in a single column */
5296 #if BITS_PER_LONG == 32
5297 tmpdiv = first_block;
5298 first_row_offset = do_div(tmpdiv, stripesize);
5299 tmpdiv = first_row_offset;
5300 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
5301 r5or6_first_row_offset = first_row_offset;
5302 tmpdiv = last_block;
5303 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
5304 tmpdiv = r5or6_last_row_offset;
5305 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
5306 tmpdiv = r5or6_first_row_offset;
5307 (void) do_div(tmpdiv, map->strip_size);
5308 first_column = r5or6_first_column = tmpdiv;
5309 tmpdiv = r5or6_last_row_offset;
5310 (void) do_div(tmpdiv, map->strip_size);
5311 r5or6_last_column = tmpdiv;
5312 #else
5313 first_row_offset = r5or6_first_row_offset =
5314 (u32)((first_block % stripesize) %
5315 r5or6_blocks_per_row);
5316
5317 r5or6_last_row_offset =
5318 (u32)((last_block % stripesize) %
5319 r5or6_blocks_per_row);
5320
5321 first_column = r5or6_first_column =
5322 r5or6_first_row_offset / le16_to_cpu(map->strip_size);
5323 r5or6_last_column =
5324 r5or6_last_row_offset / le16_to_cpu(map->strip_size);
5325 #endif
5326 if (r5or6_first_column != r5or6_last_column)
5327 return IO_ACCEL_INELIGIBLE;
5328
5329 /* Request is eligible */
5330 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5331 le16_to_cpu(map->row_cnt);
5332
5333 map_index = (first_group *
5334 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
5335 (map_row * total_disks_per_row) + first_column;
5336 break;
5337 default:
5338 return IO_ACCEL_INELIGIBLE;
5339 }
5340
5341 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
5342 return IO_ACCEL_INELIGIBLE;
5343
5344 c->phys_disk = dev->phys_disk[map_index];
5345 if (!c->phys_disk)
5346 return IO_ACCEL_INELIGIBLE;
5347
5348 disk_handle = dd[map_index].ioaccel_handle;
5349 disk_block = le64_to_cpu(map->disk_starting_blk) +
5350 first_row * le16_to_cpu(map->strip_size) +
5351 (first_row_offset - first_column *
5352 le16_to_cpu(map->strip_size));
5353 disk_block_cnt = block_cnt;
5354
5355 /* handle differing logical/physical block sizes */
5356 if (map->phys_blk_shift) {
5357 disk_block <<= map->phys_blk_shift;
5358 disk_block_cnt <<= map->phys_blk_shift;
5359 }
5360 BUG_ON(disk_block_cnt > 0xffff);
5361
5362 /* build the new CDB for the physical disk I/O */
5363 if (disk_block > 0xffffffff) {
5364 cdb[0] = is_write ? WRITE_16 : READ_16;
5365 cdb[1] = 0;
5366 cdb[2] = (u8) (disk_block >> 56);
5367 cdb[3] = (u8) (disk_block >> 48);
5368 cdb[4] = (u8) (disk_block >> 40);
5369 cdb[5] = (u8) (disk_block >> 32);
5370 cdb[6] = (u8) (disk_block >> 24);
5371 cdb[7] = (u8) (disk_block >> 16);
5372 cdb[8] = (u8) (disk_block >> 8);
5373 cdb[9] = (u8) (disk_block);
5374 cdb[10] = (u8) (disk_block_cnt >> 24);
5375 cdb[11] = (u8) (disk_block_cnt >> 16);
5376 cdb[12] = (u8) (disk_block_cnt >> 8);
5377 cdb[13] = (u8) (disk_block_cnt);
5378 cdb[14] = 0;
5379 cdb[15] = 0;
5380 cdb_len = 16;
5381 } else {
5382 cdb[0] = is_write ? WRITE_10 : READ_10;
5383 cdb[1] = 0;
5384 cdb[2] = (u8) (disk_block >> 24);
5385 cdb[3] = (u8) (disk_block >> 16);
5386 cdb[4] = (u8) (disk_block >> 8);
5387 cdb[5] = (u8) (disk_block);
5388 cdb[6] = 0;
5389 cdb[7] = (u8) (disk_block_cnt >> 8);
5390 cdb[8] = (u8) (disk_block_cnt);
5391 cdb[9] = 0;
5392 cdb_len = 10;
5393 }
5394 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
5395 dev->scsi3addr,
5396 dev->phys_disk[map_index]);
5397 }
5398
5399 /*
5400 * Submit commands down the "normal" RAID stack path
5401 * All callers to hpsa_ciss_submit must check lockup_detected
5402 * beforehand, before (opt.) and after calling cmd_alloc
5403 */
5404 static int hpsa_ciss_submit(struct ctlr_info *h,
5405 struct CommandList *c, struct scsi_cmnd *cmd,
5406 unsigned char scsi3addr[])
5407 {
5408 cmd->host_scribble = (unsigned char *) c;
5409 c->cmd_type = CMD_SCSI;
5410 c->scsi_cmd = cmd;
5411 c->Header.ReplyQueue = 0; /* unused in simple mode */
5412 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
5413 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5414
5415 /* Fill in the request block... */
5416
5417 c->Request.Timeout = 0;
5418 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5419 c->Request.CDBLen = cmd->cmd_len;
5420 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5421 switch (cmd->sc_data_direction) {
5422 case DMA_TO_DEVICE:
5423 c->Request.type_attr_dir =
5424 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5425 break;
5426 case DMA_FROM_DEVICE:
5427 c->Request.type_attr_dir =
5428 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5429 break;
5430 case DMA_NONE:
5431 c->Request.type_attr_dir =
5432 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5433 break;
5434 case DMA_BIDIRECTIONAL:
5435 /* This can happen if a buggy application does a scsi passthru
5436 * and sets both inlen and outlen to non-zero. ( see
5437 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5438 */
5439
5440 c->Request.type_attr_dir =
5441 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5442 /* This is technically wrong, and hpsa controllers should
5443 * reject it with CMD_INVALID, which is the most correct
5444 * response, but non-fibre backends appear to let it
5445 * slide by, and give the same results as if this field
5446 * were set correctly. Either way is acceptable for
5447 * our purposes here.
5448 */
5449
5450 break;
5451
5452 default:
5453 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5454 cmd->sc_data_direction);
5455 BUG();
5456 break;
5457 }
5458
5459 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
5460 hpsa_cmd_resolve_and_free(h, c);
5461 return SCSI_MLQUEUE_HOST_BUSY;
5462 }
5463 enqueue_cmd_and_start_io(h, c);
5464 /* the cmd'll come back via intr handler in complete_scsi_command() */
5465 return 0;
5466 }
5467
5468 static void hpsa_cmd_init(struct ctlr_info *h, int index,
5469 struct CommandList *c)
5470 {
5471 dma_addr_t cmd_dma_handle, err_dma_handle;
5472
5473 /* Zero out all of commandlist except the last field, refcount */
5474 memset(c, 0, offsetof(struct CommandList, refcount));
5475 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5476 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5477 c->err_info = h->errinfo_pool + index;
5478 memset(c->err_info, 0, sizeof(*c->err_info));
5479 err_dma_handle = h->errinfo_pool_dhandle
5480 + index * sizeof(*c->err_info);
5481 c->cmdindex = index;
5482 c->busaddr = (u32) cmd_dma_handle;
5483 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5484 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5485 c->h = h;
5486 c->scsi_cmd = SCSI_CMD_IDLE;
5487 }
5488
5489 static void hpsa_preinitialize_commands(struct ctlr_info *h)
5490 {
5491 int i;
5492
5493 for (i = 0; i < h->nr_cmds; i++) {
5494 struct CommandList *c = h->cmd_pool + i;
5495
5496 hpsa_cmd_init(h, i, c);
5497 atomic_set(&c->refcount, 0);
5498 }
5499 }
5500
5501 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5502 struct CommandList *c)
5503 {
5504 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5505
5506 BUG_ON(c->cmdindex != index);
5507
5508 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5509 memset(c->err_info, 0, sizeof(*c->err_info));
5510 c->busaddr = (u32) cmd_dma_handle;
5511 }
5512
5513 static int hpsa_ioaccel_submit(struct ctlr_info *h,
5514 struct CommandList *c, struct scsi_cmnd *cmd,
5515 unsigned char *scsi3addr)
5516 {
5517 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5518 int rc = IO_ACCEL_INELIGIBLE;
5519
5520 if (!dev)
5521 return SCSI_MLQUEUE_HOST_BUSY;
5522
5523 cmd->host_scribble = (unsigned char *) c;
5524
5525 if (dev->offload_enabled) {
5526 hpsa_cmd_init(h, c->cmdindex, c);
5527 c->cmd_type = CMD_SCSI;
5528 c->scsi_cmd = cmd;
5529 rc = hpsa_scsi_ioaccel_raid_map(h, c);
5530 if (rc < 0) /* scsi_dma_map failed. */
5531 rc = SCSI_MLQUEUE_HOST_BUSY;
5532 } else if (dev->hba_ioaccel_enabled) {
5533 hpsa_cmd_init(h, c->cmdindex, c);
5534 c->cmd_type = CMD_SCSI;
5535 c->scsi_cmd = cmd;
5536 rc = hpsa_scsi_ioaccel_direct_map(h, c);
5537 if (rc < 0) /* scsi_dma_map failed. */
5538 rc = SCSI_MLQUEUE_HOST_BUSY;
5539 }
5540 return rc;
5541 }
5542
5543 static void hpsa_command_resubmit_worker(struct work_struct *work)
5544 {
5545 struct scsi_cmnd *cmd;
5546 struct hpsa_scsi_dev_t *dev;
5547 struct CommandList *c = container_of(work, struct CommandList, work);
5548
5549 cmd = c->scsi_cmd;
5550 dev = cmd->device->hostdata;
5551 if (!dev) {
5552 cmd->result = DID_NO_CONNECT << 16;
5553 return hpsa_cmd_free_and_done(c->h, c, cmd);
5554 }
5555 if (c->reset_pending)
5556 return hpsa_cmd_free_and_done(c->h, c, cmd);
5557 if (c->cmd_type == CMD_IOACCEL2) {
5558 struct ctlr_info *h = c->h;
5559 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5560 int rc;
5561
5562 if (c2->error_data.serv_response ==
5563 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5564 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
5565 if (rc == 0)
5566 return;
5567 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5568 /*
5569 * If we get here, it means dma mapping failed.
5570 * Try again via scsi mid layer, which will
5571 * then get SCSI_MLQUEUE_HOST_BUSY.
5572 */
5573 cmd->result = DID_IMM_RETRY << 16;
5574 return hpsa_cmd_free_and_done(h, c, cmd);
5575 }
5576 /* else, fall thru and resubmit down CISS path */
5577 }
5578 }
5579 hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5580 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
5581 /*
5582 * If we get here, it means dma mapping failed. Try
5583 * again via scsi mid layer, which will then get
5584 * SCSI_MLQUEUE_HOST_BUSY.
5585 *
5586 * hpsa_ciss_submit will have already freed c
5587 * if it encountered a dma mapping failure.
5588 */
5589 cmd->result = DID_IMM_RETRY << 16;
5590 cmd->scsi_done(cmd);
5591 }
5592 }
5593
5594 /* Running in struct Scsi_Host->host_lock less mode */
5595 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5596 {
5597 struct ctlr_info *h;
5598 struct hpsa_scsi_dev_t *dev;
5599 unsigned char scsi3addr[8];
5600 struct CommandList *c;
5601 int rc = 0;
5602
5603 /* Get the ptr to our adapter structure out of cmd->host. */
5604 h = sdev_to_hba(cmd->device);
5605
5606 BUG_ON(cmd->request->tag < 0);
5607
5608 dev = cmd->device->hostdata;
5609 if (!dev) {
5610 cmd->result = DID_NO_CONNECT << 16;
5611 cmd->scsi_done(cmd);
5612 return 0;
5613 }
5614
5615 if (dev->removed) {
5616 cmd->result = DID_NO_CONNECT << 16;
5617 cmd->scsi_done(cmd);
5618 return 0;
5619 }
5620
5621 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
5622
5623 if (unlikely(lockup_detected(h))) {
5624 cmd->result = DID_NO_CONNECT << 16;
5625 cmd->scsi_done(cmd);
5626 return 0;
5627 }
5628 c = cmd_tagged_alloc(h, cmd);
5629
5630 /*
5631 * This is necessary because the SML doesn't zero out this field during
5632 * error recovery.
5633 */
5634 cmd->result = 0;
5635
5636 /*
5637 * Call alternate submit routine for I/O accelerated commands.
5638 * Retries always go down the normal I/O path.
5639 */
5640 if (likely(cmd->retries == 0 &&
5641 !blk_rq_is_passthrough(cmd->request) &&
5642 h->acciopath_status)) {
5643 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
5644 if (rc == 0)
5645 return 0;
5646 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5647 hpsa_cmd_resolve_and_free(h, c);
5648 return SCSI_MLQUEUE_HOST_BUSY;
5649 }
5650 }
5651 return hpsa_ciss_submit(h, c, cmd, scsi3addr);
5652 }
5653
5654 static void hpsa_scan_complete(struct ctlr_info *h)
5655 {
5656 unsigned long flags;
5657
5658 spin_lock_irqsave(&h->scan_lock, flags);
5659 h->scan_finished = 1;
5660 wake_up(&h->scan_wait_queue);
5661 spin_unlock_irqrestore(&h->scan_lock, flags);
5662 }
5663
5664 static void hpsa_scan_start(struct Scsi_Host *sh)
5665 {
5666 struct ctlr_info *h = shost_to_hba(sh);
5667 unsigned long flags;
5668
5669 /*
5670 * Don't let rescans be initiated on a controller known to be locked
5671 * up. If the controller locks up *during* a rescan, that thread is
5672 * probably hosed, but at least we can prevent new rescan threads from
5673 * piling up on a locked up controller.
5674 */
5675 if (unlikely(lockup_detected(h)))
5676 return hpsa_scan_complete(h);
5677
5678 /*
5679 * If a scan is already waiting to run, no need to add another
5680 */
5681 spin_lock_irqsave(&h->scan_lock, flags);
5682 if (h->scan_waiting) {
5683 spin_unlock_irqrestore(&h->scan_lock, flags);
5684 return;
5685 }
5686
5687 spin_unlock_irqrestore(&h->scan_lock, flags);
5688
5689 /* wait until any scan already in progress is finished. */
5690 while (1) {
5691 spin_lock_irqsave(&h->scan_lock, flags);
5692 if (h->scan_finished)
5693 break;
5694 h->scan_waiting = 1;
5695 spin_unlock_irqrestore(&h->scan_lock, flags);
5696 wait_event(h->scan_wait_queue, h->scan_finished);
5697 /* Note: We don't need to worry about a race between this
5698 * thread and driver unload because the midlayer will
5699 * have incremented the reference count, so unload won't
5700 * happen if we're in here.
5701 */
5702 }
5703 h->scan_finished = 0; /* mark scan as in progress */
5704 h->scan_waiting = 0;
5705 spin_unlock_irqrestore(&h->scan_lock, flags);
5706
5707 if (unlikely(lockup_detected(h)))
5708 return hpsa_scan_complete(h);
5709
5710 /*
5711 * Do the scan after a reset completion
5712 */
5713 spin_lock_irqsave(&h->reset_lock, flags);
5714 if (h->reset_in_progress) {
5715 h->drv_req_rescan = 1;
5716 spin_unlock_irqrestore(&h->reset_lock, flags);
5717 hpsa_scan_complete(h);
5718 return;
5719 }
5720 spin_unlock_irqrestore(&h->reset_lock, flags);
5721
5722 hpsa_update_scsi_devices(h);
5723
5724 hpsa_scan_complete(h);
5725 }
5726
5727 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5728 {
5729 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5730
5731 if (!logical_drive)
5732 return -ENODEV;
5733
5734 if (qdepth < 1)
5735 qdepth = 1;
5736 else if (qdepth > logical_drive->queue_depth)
5737 qdepth = logical_drive->queue_depth;
5738
5739 return scsi_change_queue_depth(sdev, qdepth);
5740 }
5741
5742 static int hpsa_scan_finished(struct Scsi_Host *sh,
5743 unsigned long elapsed_time)
5744 {
5745 struct ctlr_info *h = shost_to_hba(sh);
5746 unsigned long flags;
5747 int finished;
5748
5749 spin_lock_irqsave(&h->scan_lock, flags);
5750 finished = h->scan_finished;
5751 spin_unlock_irqrestore(&h->scan_lock, flags);
5752 return finished;
5753 }
5754
5755 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5756 {
5757 struct Scsi_Host *sh;
5758
5759 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5760 if (sh == NULL) {
5761 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5762 return -ENOMEM;
5763 }
5764
5765 sh->io_port = 0;
5766 sh->n_io_port = 0;
5767 sh->this_id = -1;
5768 sh->max_channel = 3;
5769 sh->max_cmd_len = MAX_COMMAND_SIZE;
5770 sh->max_lun = HPSA_MAX_LUN;
5771 sh->max_id = HPSA_MAX_LUN;
5772 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5773 sh->cmd_per_lun = sh->can_queue;
5774 sh->sg_tablesize = h->maxsgentries;
5775 sh->transportt = hpsa_sas_transport_template;
5776 sh->hostdata[0] = (unsigned long) h;
5777 sh->irq = pci_irq_vector(h->pdev, 0);
5778 sh->unique_id = sh->irq;
5779
5780 h->scsi_host = sh;
5781 return 0;
5782 }
5783
5784 static int hpsa_scsi_add_host(struct ctlr_info *h)
5785 {
5786 int rv;
5787
5788 rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5789 if (rv) {
5790 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5791 return rv;
5792 }
5793 scsi_scan_host(h->scsi_host);
5794 return 0;
5795 }
5796
5797 /*
5798 * The block layer has already gone to the trouble of picking out a unique,
5799 * small-integer tag for this request. We use an offset from that value as
5800 * an index to select our command block. (The offset allows us to reserve the
5801 * low-numbered entries for our own uses.)
5802 */
5803 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5804 {
5805 int idx = scmd->request->tag;
5806
5807 if (idx < 0)
5808 return idx;
5809
5810 /* Offset to leave space for internal cmds. */
5811 return idx += HPSA_NRESERVED_CMDS;
5812 }
5813
5814 /*
5815 * Send a TEST_UNIT_READY command to the specified LUN using the specified
5816 * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5817 */
5818 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5819 struct CommandList *c, unsigned char lunaddr[],
5820 int reply_queue)
5821 {
5822 int rc;
5823
5824 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5825 (void) fill_cmd(c, TEST_UNIT_READY, h,
5826 NULL, 0, 0, lunaddr, TYPE_CMD);
5827 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
5828 if (rc)
5829 return rc;
5830 /* no unmap needed here because no data xfer. */
5831
5832 /* Check if the unit is already ready. */
5833 if (c->err_info->CommandStatus == CMD_SUCCESS)
5834 return 0;
5835
5836 /*
5837 * The first command sent after reset will receive "unit attention" to
5838 * indicate that the LUN has been reset...this is actually what we're
5839 * looking for (but, success is good too).
5840 */
5841 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5842 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5843 (c->err_info->SenseInfo[2] == NO_SENSE ||
5844 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5845 return 0;
5846
5847 return 1;
5848 }
5849
5850 /*
5851 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5852 * returns zero when the unit is ready, and non-zero when giving up.
5853 */
5854 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5855 struct CommandList *c,
5856 unsigned char lunaddr[], int reply_queue)
5857 {
5858 int rc;
5859 int count = 0;
5860 int waittime = 1; /* seconds */
5861
5862 /* Send test unit ready until device ready, or give up. */
5863 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5864
5865 /*
5866 * Wait for a bit. do this first, because if we send
5867 * the TUR right away, the reset will just abort it.
5868 */
5869 msleep(1000 * waittime);
5870
5871 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5872 if (!rc)
5873 break;
5874
5875 /* Increase wait time with each try, up to a point. */
5876 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5877 waittime *= 2;
5878
5879 dev_warn(&h->pdev->dev,
5880 "waiting %d secs for device to become ready.\n",
5881 waittime);
5882 }
5883
5884 return rc;
5885 }
5886
5887 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5888 unsigned char lunaddr[],
5889 int reply_queue)
5890 {
5891 int first_queue;
5892 int last_queue;
5893 int rq;
5894 int rc = 0;
5895 struct CommandList *c;
5896
5897 c = cmd_alloc(h);
5898
5899 /*
5900 * If no specific reply queue was requested, then send the TUR
5901 * repeatedly, requesting a reply on each reply queue; otherwise execute
5902 * the loop exactly once using only the specified queue.
5903 */
5904 if (reply_queue == DEFAULT_REPLY_QUEUE) {
5905 first_queue = 0;
5906 last_queue = h->nreply_queues - 1;
5907 } else {
5908 first_queue = reply_queue;
5909 last_queue = reply_queue;
5910 }
5911
5912 for (rq = first_queue; rq <= last_queue; rq++) {
5913 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5914 if (rc)
5915 break;
5916 }
5917
5918 if (rc)
5919 dev_warn(&h->pdev->dev, "giving up on device.\n");
5920 else
5921 dev_warn(&h->pdev->dev, "device is ready.\n");
5922
5923 cmd_free(h, c);
5924 return rc;
5925 }
5926
5927 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5928 * complaining. Doing a host- or bus-reset can't do anything good here.
5929 */
5930 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5931 {
5932 int rc = SUCCESS;
5933 struct ctlr_info *h;
5934 struct hpsa_scsi_dev_t *dev;
5935 u8 reset_type;
5936 char msg[48];
5937 unsigned long flags;
5938
5939 /* find the controller to which the command to be aborted was sent */
5940 h = sdev_to_hba(scsicmd->device);
5941 if (h == NULL) /* paranoia */
5942 return FAILED;
5943
5944 spin_lock_irqsave(&h->reset_lock, flags);
5945 h->reset_in_progress = 1;
5946 spin_unlock_irqrestore(&h->reset_lock, flags);
5947
5948 if (lockup_detected(h)) {
5949 rc = FAILED;
5950 goto return_reset_status;
5951 }
5952
5953 dev = scsicmd->device->hostdata;
5954 if (!dev) {
5955 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5956 rc = FAILED;
5957 goto return_reset_status;
5958 }
5959
5960 if (dev->devtype == TYPE_ENCLOSURE) {
5961 rc = SUCCESS;
5962 goto return_reset_status;
5963 }
5964
5965 /* if controller locked up, we can guarantee command won't complete */
5966 if (lockup_detected(h)) {
5967 snprintf(msg, sizeof(msg),
5968 "cmd %d RESET FAILED, lockup detected",
5969 hpsa_get_cmd_index(scsicmd));
5970 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5971 rc = FAILED;
5972 goto return_reset_status;
5973 }
5974
5975 /* this reset request might be the result of a lockup; check */
5976 if (detect_controller_lockup(h)) {
5977 snprintf(msg, sizeof(msg),
5978 "cmd %d RESET FAILED, new lockup detected",
5979 hpsa_get_cmd_index(scsicmd));
5980 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5981 rc = FAILED;
5982 goto return_reset_status;
5983 }
5984
5985 /* Do not attempt on controller */
5986 if (is_hba_lunid(dev->scsi3addr)) {
5987 rc = SUCCESS;
5988 goto return_reset_status;
5989 }
5990
5991 if (is_logical_dev_addr_mode(dev->scsi3addr))
5992 reset_type = HPSA_DEVICE_RESET_MSG;
5993 else
5994 reset_type = HPSA_PHYS_TARGET_RESET;
5995
5996 sprintf(msg, "resetting %s",
5997 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
5998 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5999
6000 /* send a reset to the SCSI LUN which the command was sent to */
6001 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type,
6002 DEFAULT_REPLY_QUEUE);
6003 if (rc == 0)
6004 rc = SUCCESS;
6005 else
6006 rc = FAILED;
6007
6008 sprintf(msg, "reset %s %s",
6009 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
6010 rc == SUCCESS ? "completed successfully" : "failed");
6011 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6012
6013 return_reset_status:
6014 spin_lock_irqsave(&h->reset_lock, flags);
6015 h->reset_in_progress = 0;
6016 spin_unlock_irqrestore(&h->reset_lock, flags);
6017 return rc;
6018 }
6019
6020 /*
6021 * For operations with an associated SCSI command, a command block is allocated
6022 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
6023 * block request tag as an index into a table of entries. cmd_tagged_free() is
6024 * the complement, although cmd_free() may be called instead.
6025 */
6026 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
6027 struct scsi_cmnd *scmd)
6028 {
6029 int idx = hpsa_get_cmd_index(scmd);
6030 struct CommandList *c = h->cmd_pool + idx;
6031
6032 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
6033 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
6034 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
6035 /* The index value comes from the block layer, so if it's out of
6036 * bounds, it's probably not our bug.
6037 */
6038 BUG();
6039 }
6040
6041 atomic_inc(&c->refcount);
6042 if (unlikely(!hpsa_is_cmd_idle(c))) {
6043 /*
6044 * We expect that the SCSI layer will hand us a unique tag
6045 * value. Thus, there should never be a collision here between
6046 * two requests...because if the selected command isn't idle
6047 * then someone is going to be very disappointed.
6048 */
6049 dev_err(&h->pdev->dev,
6050 "tag collision (tag=%d) in cmd_tagged_alloc().\n",
6051 idx);
6052 if (c->scsi_cmd != NULL)
6053 scsi_print_command(c->scsi_cmd);
6054 scsi_print_command(scmd);
6055 }
6056
6057 hpsa_cmd_partial_init(h, idx, c);
6058 return c;
6059 }
6060
6061 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
6062 {
6063 /*
6064 * Release our reference to the block. We don't need to do anything
6065 * else to free it, because it is accessed by index.
6066 */
6067 (void)atomic_dec(&c->refcount);
6068 }
6069
6070 /*
6071 * For operations that cannot sleep, a command block is allocated at init,
6072 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6073 * which ones are free or in use. Lock must be held when calling this.
6074 * cmd_free() is the complement.
6075 * This function never gives up and returns NULL. If it hangs,
6076 * another thread must call cmd_free() to free some tags.
6077 */
6078
6079 static struct CommandList *cmd_alloc(struct ctlr_info *h)
6080 {
6081 struct CommandList *c;
6082 int refcount, i;
6083 int offset = 0;
6084
6085 /*
6086 * There is some *extremely* small but non-zero chance that that
6087 * multiple threads could get in here, and one thread could
6088 * be scanning through the list of bits looking for a free
6089 * one, but the free ones are always behind him, and other
6090 * threads sneak in behind him and eat them before he can
6091 * get to them, so that while there is always a free one, a
6092 * very unlucky thread might be starved anyway, never able to
6093 * beat the other threads. In reality, this happens so
6094 * infrequently as to be indistinguishable from never.
6095 *
6096 * Note that we start allocating commands before the SCSI host structure
6097 * is initialized. Since the search starts at bit zero, this
6098 * all works, since we have at least one command structure available;
6099 * however, it means that the structures with the low indexes have to be
6100 * reserved for driver-initiated requests, while requests from the block
6101 * layer will use the higher indexes.
6102 */
6103
6104 for (;;) {
6105 i = find_next_zero_bit(h->cmd_pool_bits,
6106 HPSA_NRESERVED_CMDS,
6107 offset);
6108 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6109 offset = 0;
6110 continue;
6111 }
6112 c = h->cmd_pool + i;
6113 refcount = atomic_inc_return(&c->refcount);
6114 if (unlikely(refcount > 1)) {
6115 cmd_free(h, c); /* already in use */
6116 offset = (i + 1) % HPSA_NRESERVED_CMDS;
6117 continue;
6118 }
6119 set_bit(i & (BITS_PER_LONG - 1),
6120 h->cmd_pool_bits + (i / BITS_PER_LONG));
6121 break; /* it's ours now. */
6122 }
6123 hpsa_cmd_partial_init(h, i, c);
6124 return c;
6125 }
6126
6127 /*
6128 * This is the complementary operation to cmd_alloc(). Note, however, in some
6129 * corner cases it may also be used to free blocks allocated by
6130 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
6131 * the clear-bit is harmless.
6132 */
6133 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6134 {
6135 if (atomic_dec_and_test(&c->refcount)) {
6136 int i;
6137
6138 i = c - h->cmd_pool;
6139 clear_bit(i & (BITS_PER_LONG - 1),
6140 h->cmd_pool_bits + (i / BITS_PER_LONG));
6141 }
6142 }
6143
6144 #ifdef CONFIG_COMPAT
6145
6146 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
6147 void __user *arg)
6148 {
6149 IOCTL32_Command_struct __user *arg32 =
6150 (IOCTL32_Command_struct __user *) arg;
6151 IOCTL_Command_struct arg64;
6152 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
6153 int err;
6154 u32 cp;
6155
6156 memset(&arg64, 0, sizeof(arg64));
6157 err = 0;
6158 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6159 sizeof(arg64.LUN_info));
6160 err |= copy_from_user(&arg64.Request, &arg32->Request,
6161 sizeof(arg64.Request));
6162 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6163 sizeof(arg64.error_info));
6164 err |= get_user(arg64.buf_size, &arg32->buf_size);
6165 err |= get_user(cp, &arg32->buf);
6166 arg64.buf = compat_ptr(cp);
6167 err |= copy_to_user(p, &arg64, sizeof(arg64));
6168
6169 if (err)
6170 return -EFAULT;
6171
6172 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
6173 if (err)
6174 return err;
6175 err |= copy_in_user(&arg32->error_info, &p->error_info,
6176 sizeof(arg32->error_info));
6177 if (err)
6178 return -EFAULT;
6179 return err;
6180 }
6181
6182 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
6183 int cmd, void __user *arg)
6184 {
6185 BIG_IOCTL32_Command_struct __user *arg32 =
6186 (BIG_IOCTL32_Command_struct __user *) arg;
6187 BIG_IOCTL_Command_struct arg64;
6188 BIG_IOCTL_Command_struct __user *p =
6189 compat_alloc_user_space(sizeof(arg64));
6190 int err;
6191 u32 cp;
6192
6193 memset(&arg64, 0, sizeof(arg64));
6194 err = 0;
6195 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6196 sizeof(arg64.LUN_info));
6197 err |= copy_from_user(&arg64.Request, &arg32->Request,
6198 sizeof(arg64.Request));
6199 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6200 sizeof(arg64.error_info));
6201 err |= get_user(arg64.buf_size, &arg32->buf_size);
6202 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
6203 err |= get_user(cp, &arg32->buf);
6204 arg64.buf = compat_ptr(cp);
6205 err |= copy_to_user(p, &arg64, sizeof(arg64));
6206
6207 if (err)
6208 return -EFAULT;
6209
6210 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
6211 if (err)
6212 return err;
6213 err |= copy_in_user(&arg32->error_info, &p->error_info,
6214 sizeof(arg32->error_info));
6215 if (err)
6216 return -EFAULT;
6217 return err;
6218 }
6219
6220 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6221 {
6222 switch (cmd) {
6223 case CCISS_GETPCIINFO:
6224 case CCISS_GETINTINFO:
6225 case CCISS_SETINTINFO:
6226 case CCISS_GETNODENAME:
6227 case CCISS_SETNODENAME:
6228 case CCISS_GETHEARTBEAT:
6229 case CCISS_GETBUSTYPES:
6230 case CCISS_GETFIRMVER:
6231 case CCISS_GETDRIVVER:
6232 case CCISS_REVALIDVOLS:
6233 case CCISS_DEREGDISK:
6234 case CCISS_REGNEWDISK:
6235 case CCISS_REGNEWD:
6236 case CCISS_RESCANDISK:
6237 case CCISS_GETLUNINFO:
6238 return hpsa_ioctl(dev, cmd, arg);
6239
6240 case CCISS_PASSTHRU32:
6241 return hpsa_ioctl32_passthru(dev, cmd, arg);
6242 case CCISS_BIG_PASSTHRU32:
6243 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6244
6245 default:
6246 return -ENOIOCTLCMD;
6247 }
6248 }
6249 #endif
6250
6251 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6252 {
6253 struct hpsa_pci_info pciinfo;
6254
6255 if (!argp)
6256 return -EINVAL;
6257 pciinfo.domain = pci_domain_nr(h->pdev->bus);
6258 pciinfo.bus = h->pdev->bus->number;
6259 pciinfo.dev_fn = h->pdev->devfn;
6260 pciinfo.board_id = h->board_id;
6261 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6262 return -EFAULT;
6263 return 0;
6264 }
6265
6266 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6267 {
6268 DriverVer_type DriverVer;
6269 unsigned char vmaj, vmin, vsubmin;
6270 int rc;
6271
6272 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6273 &vmaj, &vmin, &vsubmin);
6274 if (rc != 3) {
6275 dev_info(&h->pdev->dev, "driver version string '%s' "
6276 "unrecognized.", HPSA_DRIVER_VERSION);
6277 vmaj = 0;
6278 vmin = 0;
6279 vsubmin = 0;
6280 }
6281 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6282 if (!argp)
6283 return -EINVAL;
6284 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6285 return -EFAULT;
6286 return 0;
6287 }
6288
6289 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6290 {
6291 IOCTL_Command_struct iocommand;
6292 struct CommandList *c;
6293 char *buff = NULL;
6294 u64 temp64;
6295 int rc = 0;
6296
6297 if (!argp)
6298 return -EINVAL;
6299 if (!capable(CAP_SYS_RAWIO))
6300 return -EPERM;
6301 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6302 return -EFAULT;
6303 if ((iocommand.buf_size < 1) &&
6304 (iocommand.Request.Type.Direction != XFER_NONE)) {
6305 return -EINVAL;
6306 }
6307 if (iocommand.buf_size > 0) {
6308 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
6309 if (buff == NULL)
6310 return -ENOMEM;
6311 if (iocommand.Request.Type.Direction & XFER_WRITE) {
6312 /* Copy the data into the buffer we created */
6313 if (copy_from_user(buff, iocommand.buf,
6314 iocommand.buf_size)) {
6315 rc = -EFAULT;
6316 goto out_kfree;
6317 }
6318 } else {
6319 memset(buff, 0, iocommand.buf_size);
6320 }
6321 }
6322 c = cmd_alloc(h);
6323
6324 /* Fill in the command type */
6325 c->cmd_type = CMD_IOCTL_PEND;
6326 c->scsi_cmd = SCSI_CMD_BUSY;
6327 /* Fill in Command Header */
6328 c->Header.ReplyQueue = 0; /* unused in simple mode */
6329 if (iocommand.buf_size > 0) { /* buffer to fill */
6330 c->Header.SGList = 1;
6331 c->Header.SGTotal = cpu_to_le16(1);
6332 } else { /* no buffers to fill */
6333 c->Header.SGList = 0;
6334 c->Header.SGTotal = cpu_to_le16(0);
6335 }
6336 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
6337
6338 /* Fill in Request block */
6339 memcpy(&c->Request, &iocommand.Request,
6340 sizeof(c->Request));
6341
6342 /* Fill in the scatter gather information */
6343 if (iocommand.buf_size > 0) {
6344 temp64 = pci_map_single(h->pdev, buff,
6345 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
6346 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6347 c->SG[0].Addr = cpu_to_le64(0);
6348 c->SG[0].Len = cpu_to_le32(0);
6349 rc = -ENOMEM;
6350 goto out;
6351 }
6352 c->SG[0].Addr = cpu_to_le64(temp64);
6353 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
6354 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6355 }
6356 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6357 NO_TIMEOUT);
6358 if (iocommand.buf_size > 0)
6359 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
6360 check_ioctl_unit_attention(h, c);
6361 if (rc) {
6362 rc = -EIO;
6363 goto out;
6364 }
6365
6366 /* Copy the error information out */
6367 memcpy(&iocommand.error_info, c->err_info,
6368 sizeof(iocommand.error_info));
6369 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6370 rc = -EFAULT;
6371 goto out;
6372 }
6373 if ((iocommand.Request.Type.Direction & XFER_READ) &&
6374 iocommand.buf_size > 0) {
6375 /* Copy the data out of the buffer we created */
6376 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6377 rc = -EFAULT;
6378 goto out;
6379 }
6380 }
6381 out:
6382 cmd_free(h, c);
6383 out_kfree:
6384 kfree(buff);
6385 return rc;
6386 }
6387
6388 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6389 {
6390 BIG_IOCTL_Command_struct *ioc;
6391 struct CommandList *c;
6392 unsigned char **buff = NULL;
6393 int *buff_size = NULL;
6394 u64 temp64;
6395 BYTE sg_used = 0;
6396 int status = 0;
6397 u32 left;
6398 u32 sz;
6399 BYTE __user *data_ptr;
6400
6401 if (!argp)
6402 return -EINVAL;
6403 if (!capable(CAP_SYS_RAWIO))
6404 return -EPERM;
6405 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
6406 if (!ioc) {
6407 status = -ENOMEM;
6408 goto cleanup1;
6409 }
6410 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6411 status = -EFAULT;
6412 goto cleanup1;
6413 }
6414 if ((ioc->buf_size < 1) &&
6415 (ioc->Request.Type.Direction != XFER_NONE)) {
6416 status = -EINVAL;
6417 goto cleanup1;
6418 }
6419 /* Check kmalloc limits using all SGs */
6420 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6421 status = -EINVAL;
6422 goto cleanup1;
6423 }
6424 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6425 status = -EINVAL;
6426 goto cleanup1;
6427 }
6428 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
6429 if (!buff) {
6430 status = -ENOMEM;
6431 goto cleanup1;
6432 }
6433 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
6434 if (!buff_size) {
6435 status = -ENOMEM;
6436 goto cleanup1;
6437 }
6438 left = ioc->buf_size;
6439 data_ptr = ioc->buf;
6440 while (left) {
6441 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6442 buff_size[sg_used] = sz;
6443 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6444 if (buff[sg_used] == NULL) {
6445 status = -ENOMEM;
6446 goto cleanup1;
6447 }
6448 if (ioc->Request.Type.Direction & XFER_WRITE) {
6449 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6450 status = -EFAULT;
6451 goto cleanup1;
6452 }
6453 } else
6454 memset(buff[sg_used], 0, sz);
6455 left -= sz;
6456 data_ptr += sz;
6457 sg_used++;
6458 }
6459 c = cmd_alloc(h);
6460
6461 c->cmd_type = CMD_IOCTL_PEND;
6462 c->scsi_cmd = SCSI_CMD_BUSY;
6463 c->Header.ReplyQueue = 0;
6464 c->Header.SGList = (u8) sg_used;
6465 c->Header.SGTotal = cpu_to_le16(sg_used);
6466 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6467 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6468 if (ioc->buf_size > 0) {
6469 int i;
6470 for (i = 0; i < sg_used; i++) {
6471 temp64 = pci_map_single(h->pdev, buff[i],
6472 buff_size[i], PCI_DMA_BIDIRECTIONAL);
6473 if (dma_mapping_error(&h->pdev->dev,
6474 (dma_addr_t) temp64)) {
6475 c->SG[i].Addr = cpu_to_le64(0);
6476 c->SG[i].Len = cpu_to_le32(0);
6477 hpsa_pci_unmap(h->pdev, c, i,
6478 PCI_DMA_BIDIRECTIONAL);
6479 status = -ENOMEM;
6480 goto cleanup0;
6481 }
6482 c->SG[i].Addr = cpu_to_le64(temp64);
6483 c->SG[i].Len = cpu_to_le32(buff_size[i]);
6484 c->SG[i].Ext = cpu_to_le32(0);
6485 }
6486 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6487 }
6488 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6489 NO_TIMEOUT);
6490 if (sg_used)
6491 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6492 check_ioctl_unit_attention(h, c);
6493 if (status) {
6494 status = -EIO;
6495 goto cleanup0;
6496 }
6497
6498 /* Copy the error information out */
6499 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6500 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6501 status = -EFAULT;
6502 goto cleanup0;
6503 }
6504 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6505 int i;
6506
6507 /* Copy the data out of the buffer we created */
6508 BYTE __user *ptr = ioc->buf;
6509 for (i = 0; i < sg_used; i++) {
6510 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6511 status = -EFAULT;
6512 goto cleanup0;
6513 }
6514 ptr += buff_size[i];
6515 }
6516 }
6517 status = 0;
6518 cleanup0:
6519 cmd_free(h, c);
6520 cleanup1:
6521 if (buff) {
6522 int i;
6523
6524 for (i = 0; i < sg_used; i++)
6525 kfree(buff[i]);
6526 kfree(buff);
6527 }
6528 kfree(buff_size);
6529 kfree(ioc);
6530 return status;
6531 }
6532
6533 static void check_ioctl_unit_attention(struct ctlr_info *h,
6534 struct CommandList *c)
6535 {
6536 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6537 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6538 (void) check_for_unit_attention(h, c);
6539 }
6540
6541 /*
6542 * ioctl
6543 */
6544 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6545 {
6546 struct ctlr_info *h;
6547 void __user *argp = (void __user *)arg;
6548 int rc;
6549
6550 h = sdev_to_hba(dev);
6551
6552 switch (cmd) {
6553 case CCISS_DEREGDISK:
6554 case CCISS_REGNEWDISK:
6555 case CCISS_REGNEWD:
6556 hpsa_scan_start(h->scsi_host);
6557 return 0;
6558 case CCISS_GETPCIINFO:
6559 return hpsa_getpciinfo_ioctl(h, argp);
6560 case CCISS_GETDRIVVER:
6561 return hpsa_getdrivver_ioctl(h, argp);
6562 case CCISS_PASSTHRU:
6563 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6564 return -EAGAIN;
6565 rc = hpsa_passthru_ioctl(h, argp);
6566 atomic_inc(&h->passthru_cmds_avail);
6567 return rc;
6568 case CCISS_BIG_PASSTHRU:
6569 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6570 return -EAGAIN;
6571 rc = hpsa_big_passthru_ioctl(h, argp);
6572 atomic_inc(&h->passthru_cmds_avail);
6573 return rc;
6574 default:
6575 return -ENOTTY;
6576 }
6577 }
6578
6579 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
6580 u8 reset_type)
6581 {
6582 struct CommandList *c;
6583
6584 c = cmd_alloc(h);
6585
6586 /* fill_cmd can't fail here, no data buffer to map */
6587 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6588 RAID_CTLR_LUNID, TYPE_MSG);
6589 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6590 c->waiting = NULL;
6591 enqueue_cmd_and_start_io(h, c);
6592 /* Don't wait for completion, the reset won't complete. Don't free
6593 * the command either. This is the last command we will send before
6594 * re-initializing everything, so it doesn't matter and won't leak.
6595 */
6596 return;
6597 }
6598
6599 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6600 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6601 int cmd_type)
6602 {
6603 int pci_dir = XFER_NONE;
6604
6605 c->cmd_type = CMD_IOCTL_PEND;
6606 c->scsi_cmd = SCSI_CMD_BUSY;
6607 c->Header.ReplyQueue = 0;
6608 if (buff != NULL && size > 0) {
6609 c->Header.SGList = 1;
6610 c->Header.SGTotal = cpu_to_le16(1);
6611 } else {
6612 c->Header.SGList = 0;
6613 c->Header.SGTotal = cpu_to_le16(0);
6614 }
6615 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6616
6617 if (cmd_type == TYPE_CMD) {
6618 switch (cmd) {
6619 case HPSA_INQUIRY:
6620 /* are we trying to read a vital product page */
6621 if (page_code & VPD_PAGE) {
6622 c->Request.CDB[1] = 0x01;
6623 c->Request.CDB[2] = (page_code & 0xff);
6624 }
6625 c->Request.CDBLen = 6;
6626 c->Request.type_attr_dir =
6627 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6628 c->Request.Timeout = 0;
6629 c->Request.CDB[0] = HPSA_INQUIRY;
6630 c->Request.CDB[4] = size & 0xFF;
6631 break;
6632 case RECEIVE_DIAGNOSTIC:
6633 c->Request.CDBLen = 6;
6634 c->Request.type_attr_dir =
6635 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6636 c->Request.Timeout = 0;
6637 c->Request.CDB[0] = cmd;
6638 c->Request.CDB[1] = 1;
6639 c->Request.CDB[2] = 1;
6640 c->Request.CDB[3] = (size >> 8) & 0xFF;
6641 c->Request.CDB[4] = size & 0xFF;
6642 break;
6643 case HPSA_REPORT_LOG:
6644 case HPSA_REPORT_PHYS:
6645 /* Talking to controller so It's a physical command
6646 mode = 00 target = 0. Nothing to write.
6647 */
6648 c->Request.CDBLen = 12;
6649 c->Request.type_attr_dir =
6650 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6651 c->Request.Timeout = 0;
6652 c->Request.CDB[0] = cmd;
6653 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6654 c->Request.CDB[7] = (size >> 16) & 0xFF;
6655 c->Request.CDB[8] = (size >> 8) & 0xFF;
6656 c->Request.CDB[9] = size & 0xFF;
6657 break;
6658 case BMIC_SENSE_DIAG_OPTIONS:
6659 c->Request.CDBLen = 16;
6660 c->Request.type_attr_dir =
6661 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6662 c->Request.Timeout = 0;
6663 /* Spec says this should be BMIC_WRITE */
6664 c->Request.CDB[0] = BMIC_READ;
6665 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6666 break;
6667 case BMIC_SET_DIAG_OPTIONS:
6668 c->Request.CDBLen = 16;
6669 c->Request.type_attr_dir =
6670 TYPE_ATTR_DIR(cmd_type,
6671 ATTR_SIMPLE, XFER_WRITE);
6672 c->Request.Timeout = 0;
6673 c->Request.CDB[0] = BMIC_WRITE;
6674 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6675 break;
6676 case HPSA_CACHE_FLUSH:
6677 c->Request.CDBLen = 12;
6678 c->Request.type_attr_dir =
6679 TYPE_ATTR_DIR(cmd_type,
6680 ATTR_SIMPLE, XFER_WRITE);
6681 c->Request.Timeout = 0;
6682 c->Request.CDB[0] = BMIC_WRITE;
6683 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6684 c->Request.CDB[7] = (size >> 8) & 0xFF;
6685 c->Request.CDB[8] = size & 0xFF;
6686 break;
6687 case TEST_UNIT_READY:
6688 c->Request.CDBLen = 6;
6689 c->Request.type_attr_dir =
6690 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6691 c->Request.Timeout = 0;
6692 break;
6693 case HPSA_GET_RAID_MAP:
6694 c->Request.CDBLen = 12;
6695 c->Request.type_attr_dir =
6696 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6697 c->Request.Timeout = 0;
6698 c->Request.CDB[0] = HPSA_CISS_READ;
6699 c->Request.CDB[1] = cmd;
6700 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6701 c->Request.CDB[7] = (size >> 16) & 0xFF;
6702 c->Request.CDB[8] = (size >> 8) & 0xFF;
6703 c->Request.CDB[9] = size & 0xFF;
6704 break;
6705 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6706 c->Request.CDBLen = 10;
6707 c->Request.type_attr_dir =
6708 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6709 c->Request.Timeout = 0;
6710 c->Request.CDB[0] = BMIC_READ;
6711 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6712 c->Request.CDB[7] = (size >> 16) & 0xFF;
6713 c->Request.CDB[8] = (size >> 8) & 0xFF;
6714 break;
6715 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6716 c->Request.CDBLen = 10;
6717 c->Request.type_attr_dir =
6718 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6719 c->Request.Timeout = 0;
6720 c->Request.CDB[0] = BMIC_READ;
6721 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6722 c->Request.CDB[7] = (size >> 16) & 0xFF;
6723 c->Request.CDB[8] = (size >> 8) & 0XFF;
6724 break;
6725 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6726 c->Request.CDBLen = 10;
6727 c->Request.type_attr_dir =
6728 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6729 c->Request.Timeout = 0;
6730 c->Request.CDB[0] = BMIC_READ;
6731 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6732 c->Request.CDB[7] = (size >> 16) & 0xFF;
6733 c->Request.CDB[8] = (size >> 8) & 0XFF;
6734 break;
6735 case BMIC_SENSE_STORAGE_BOX_PARAMS:
6736 c->Request.CDBLen = 10;
6737 c->Request.type_attr_dir =
6738 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6739 c->Request.Timeout = 0;
6740 c->Request.CDB[0] = BMIC_READ;
6741 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6742 c->Request.CDB[7] = (size >> 16) & 0xFF;
6743 c->Request.CDB[8] = (size >> 8) & 0XFF;
6744 break;
6745 case BMIC_IDENTIFY_CONTROLLER:
6746 c->Request.CDBLen = 10;
6747 c->Request.type_attr_dir =
6748 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6749 c->Request.Timeout = 0;
6750 c->Request.CDB[0] = BMIC_READ;
6751 c->Request.CDB[1] = 0;
6752 c->Request.CDB[2] = 0;
6753 c->Request.CDB[3] = 0;
6754 c->Request.CDB[4] = 0;
6755 c->Request.CDB[5] = 0;
6756 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
6757 c->Request.CDB[7] = (size >> 16) & 0xFF;
6758 c->Request.CDB[8] = (size >> 8) & 0XFF;
6759 c->Request.CDB[9] = 0;
6760 break;
6761 default:
6762 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6763 BUG();
6764 }
6765 } else if (cmd_type == TYPE_MSG) {
6766 switch (cmd) {
6767
6768 case HPSA_PHYS_TARGET_RESET:
6769 c->Request.CDBLen = 16;
6770 c->Request.type_attr_dir =
6771 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6772 c->Request.Timeout = 0; /* Don't time out */
6773 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6774 c->Request.CDB[0] = HPSA_RESET;
6775 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
6776 /* Physical target reset needs no control bytes 4-7*/
6777 c->Request.CDB[4] = 0x00;
6778 c->Request.CDB[5] = 0x00;
6779 c->Request.CDB[6] = 0x00;
6780 c->Request.CDB[7] = 0x00;
6781 break;
6782 case HPSA_DEVICE_RESET_MSG:
6783 c->Request.CDBLen = 16;
6784 c->Request.type_attr_dir =
6785 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6786 c->Request.Timeout = 0; /* Don't time out */
6787 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6788 c->Request.CDB[0] = cmd;
6789 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6790 /* If bytes 4-7 are zero, it means reset the */
6791 /* LunID device */
6792 c->Request.CDB[4] = 0x00;
6793 c->Request.CDB[5] = 0x00;
6794 c->Request.CDB[6] = 0x00;
6795 c->Request.CDB[7] = 0x00;
6796 break;
6797 default:
6798 dev_warn(&h->pdev->dev, "unknown message type %d\n",
6799 cmd);
6800 BUG();
6801 }
6802 } else {
6803 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6804 BUG();
6805 }
6806
6807 switch (GET_DIR(c->Request.type_attr_dir)) {
6808 case XFER_READ:
6809 pci_dir = PCI_DMA_FROMDEVICE;
6810 break;
6811 case XFER_WRITE:
6812 pci_dir = PCI_DMA_TODEVICE;
6813 break;
6814 case XFER_NONE:
6815 pci_dir = PCI_DMA_NONE;
6816 break;
6817 default:
6818 pci_dir = PCI_DMA_BIDIRECTIONAL;
6819 }
6820 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
6821 return -1;
6822 return 0;
6823 }
6824
6825 /*
6826 * Map (physical) PCI mem into (virtual) kernel space
6827 */
6828 static void __iomem *remap_pci_mem(ulong base, ulong size)
6829 {
6830 ulong page_base = ((ulong) base) & PAGE_MASK;
6831 ulong page_offs = ((ulong) base) - page_base;
6832 void __iomem *page_remapped = ioremap_nocache(page_base,
6833 page_offs + size);
6834
6835 return page_remapped ? (page_remapped + page_offs) : NULL;
6836 }
6837
6838 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6839 {
6840 return h->access.command_completed(h, q);
6841 }
6842
6843 static inline bool interrupt_pending(struct ctlr_info *h)
6844 {
6845 return h->access.intr_pending(h);
6846 }
6847
6848 static inline long interrupt_not_for_us(struct ctlr_info *h)
6849 {
6850 return (h->access.intr_pending(h) == 0) ||
6851 (h->interrupts_enabled == 0);
6852 }
6853
6854 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6855 u32 raw_tag)
6856 {
6857 if (unlikely(tag_index >= h->nr_cmds)) {
6858 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6859 return 1;
6860 }
6861 return 0;
6862 }
6863
6864 static inline void finish_cmd(struct CommandList *c)
6865 {
6866 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6867 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6868 || c->cmd_type == CMD_IOACCEL2))
6869 complete_scsi_command(c);
6870 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6871 complete(c->waiting);
6872 }
6873
6874 /* process completion of an indexed ("direct lookup") command */
6875 static inline void process_indexed_cmd(struct ctlr_info *h,
6876 u32 raw_tag)
6877 {
6878 u32 tag_index;
6879 struct CommandList *c;
6880
6881 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6882 if (!bad_tag(h, tag_index, raw_tag)) {
6883 c = h->cmd_pool + tag_index;
6884 finish_cmd(c);
6885 }
6886 }
6887
6888 /* Some controllers, like p400, will give us one interrupt
6889 * after a soft reset, even if we turned interrupts off.
6890 * Only need to check for this in the hpsa_xxx_discard_completions
6891 * functions.
6892 */
6893 static int ignore_bogus_interrupt(struct ctlr_info *h)
6894 {
6895 if (likely(!reset_devices))
6896 return 0;
6897
6898 if (likely(h->interrupts_enabled))
6899 return 0;
6900
6901 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6902 "(known firmware bug.) Ignoring.\n");
6903
6904 return 1;
6905 }
6906
6907 /*
6908 * Convert &h->q[x] (passed to interrupt handlers) back to h.
6909 * Relies on (h-q[x] == x) being true for x such that
6910 * 0 <= x < MAX_REPLY_QUEUES.
6911 */
6912 static struct ctlr_info *queue_to_hba(u8 *queue)
6913 {
6914 return container_of((queue - *queue), struct ctlr_info, q[0]);
6915 }
6916
6917 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6918 {
6919 struct ctlr_info *h = queue_to_hba(queue);
6920 u8 q = *(u8 *) queue;
6921 u32 raw_tag;
6922
6923 if (ignore_bogus_interrupt(h))
6924 return IRQ_NONE;
6925
6926 if (interrupt_not_for_us(h))
6927 return IRQ_NONE;
6928 h->last_intr_timestamp = get_jiffies_64();
6929 while (interrupt_pending(h)) {
6930 raw_tag = get_next_completion(h, q);
6931 while (raw_tag != FIFO_EMPTY)
6932 raw_tag = next_command(h, q);
6933 }
6934 return IRQ_HANDLED;
6935 }
6936
6937 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
6938 {
6939 struct ctlr_info *h = queue_to_hba(queue);
6940 u32 raw_tag;
6941 u8 q = *(u8 *) queue;
6942
6943 if (ignore_bogus_interrupt(h))
6944 return IRQ_NONE;
6945
6946 h->last_intr_timestamp = get_jiffies_64();
6947 raw_tag = get_next_completion(h, q);
6948 while (raw_tag != FIFO_EMPTY)
6949 raw_tag = next_command(h, q);
6950 return IRQ_HANDLED;
6951 }
6952
6953 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
6954 {
6955 struct ctlr_info *h = queue_to_hba((u8 *) queue);
6956 u32 raw_tag;
6957 u8 q = *(u8 *) queue;
6958
6959 if (interrupt_not_for_us(h))
6960 return IRQ_NONE;
6961 h->last_intr_timestamp = get_jiffies_64();
6962 while (interrupt_pending(h)) {
6963 raw_tag = get_next_completion(h, q);
6964 while (raw_tag != FIFO_EMPTY) {
6965 process_indexed_cmd(h, raw_tag);
6966 raw_tag = next_command(h, q);
6967 }
6968 }
6969 return IRQ_HANDLED;
6970 }
6971
6972 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
6973 {
6974 struct ctlr_info *h = queue_to_hba(queue);
6975 u32 raw_tag;
6976 u8 q = *(u8 *) queue;
6977
6978 h->last_intr_timestamp = get_jiffies_64();
6979 raw_tag = get_next_completion(h, q);
6980 while (raw_tag != FIFO_EMPTY) {
6981 process_indexed_cmd(h, raw_tag);
6982 raw_tag = next_command(h, q);
6983 }
6984 return IRQ_HANDLED;
6985 }
6986
6987 /* Send a message CDB to the firmware. Careful, this only works
6988 * in simple mode, not performant mode due to the tag lookup.
6989 * We only ever use this immediately after a controller reset.
6990 */
6991 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
6992 unsigned char type)
6993 {
6994 struct Command {
6995 struct CommandListHeader CommandHeader;
6996 struct RequestBlock Request;
6997 struct ErrDescriptor ErrorDescriptor;
6998 };
6999 struct Command *cmd;
7000 static const size_t cmd_sz = sizeof(*cmd) +
7001 sizeof(cmd->ErrorDescriptor);
7002 dma_addr_t paddr64;
7003 __le32 paddr32;
7004 u32 tag;
7005 void __iomem *vaddr;
7006 int i, err;
7007
7008 vaddr = pci_ioremap_bar(pdev, 0);
7009 if (vaddr == NULL)
7010 return -ENOMEM;
7011
7012 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
7013 * CCISS commands, so they must be allocated from the lower 4GiB of
7014 * memory.
7015 */
7016 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
7017 if (err) {
7018 iounmap(vaddr);
7019 return err;
7020 }
7021
7022 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
7023 if (cmd == NULL) {
7024 iounmap(vaddr);
7025 return -ENOMEM;
7026 }
7027
7028 /* This must fit, because of the 32-bit consistent DMA mask. Also,
7029 * although there's no guarantee, we assume that the address is at
7030 * least 4-byte aligned (most likely, it's page-aligned).
7031 */
7032 paddr32 = cpu_to_le32(paddr64);
7033
7034 cmd->CommandHeader.ReplyQueue = 0;
7035 cmd->CommandHeader.SGList = 0;
7036 cmd->CommandHeader.SGTotal = cpu_to_le16(0);
7037 cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7038 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7039
7040 cmd->Request.CDBLen = 16;
7041 cmd->Request.type_attr_dir =
7042 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7043 cmd->Request.Timeout = 0; /* Don't time out */
7044 cmd->Request.CDB[0] = opcode;
7045 cmd->Request.CDB[1] = type;
7046 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
7047 cmd->ErrorDescriptor.Addr =
7048 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
7049 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7050
7051 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7052
7053 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7054 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
7055 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7056 break;
7057 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7058 }
7059
7060 iounmap(vaddr);
7061
7062 /* we leak the DMA buffer here ... no choice since the controller could
7063 * still complete the command.
7064 */
7065 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7066 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7067 opcode, type);
7068 return -ETIMEDOUT;
7069 }
7070
7071 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
7072
7073 if (tag & HPSA_ERROR_BIT) {
7074 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7075 opcode, type);
7076 return -EIO;
7077 }
7078
7079 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7080 opcode, type);
7081 return 0;
7082 }
7083
7084 #define hpsa_noop(p) hpsa_message(p, 3, 0)
7085
7086 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
7087 void __iomem *vaddr, u32 use_doorbell)
7088 {
7089
7090 if (use_doorbell) {
7091 /* For everything after the P600, the PCI power state method
7092 * of resetting the controller doesn't work, so we have this
7093 * other way using the doorbell register.
7094 */
7095 dev_info(&pdev->dev, "using doorbell to reset controller\n");
7096 writel(use_doorbell, vaddr + SA5_DOORBELL);
7097
7098 /* PMC hardware guys tell us we need a 10 second delay after
7099 * doorbell reset and before any attempt to talk to the board
7100 * at all to ensure that this actually works and doesn't fall
7101 * over in some weird corner cases.
7102 */
7103 msleep(10000);
7104 } else { /* Try to do it the PCI power state way */
7105
7106 /* Quoting from the Open CISS Specification: "The Power
7107 * Management Control/Status Register (CSR) controls the power
7108 * state of the device. The normal operating state is D0,
7109 * CSR=00h. The software off state is D3, CSR=03h. To reset
7110 * the controller, place the interface device in D3 then to D0,
7111 * this causes a secondary PCI reset which will reset the
7112 * controller." */
7113
7114 int rc = 0;
7115
7116 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
7117
7118 /* enter the D3hot power management state */
7119 rc = pci_set_power_state(pdev, PCI_D3hot);
7120 if (rc)
7121 return rc;
7122
7123 msleep(500);
7124
7125 /* enter the D0 power management state */
7126 rc = pci_set_power_state(pdev, PCI_D0);
7127 if (rc)
7128 return rc;
7129
7130 /*
7131 * The P600 requires a small delay when changing states.
7132 * Otherwise we may think the board did not reset and we bail.
7133 * This for kdump only and is particular to the P600.
7134 */
7135 msleep(500);
7136 }
7137 return 0;
7138 }
7139
7140 static void init_driver_version(char *driver_version, int len)
7141 {
7142 memset(driver_version, 0, len);
7143 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7144 }
7145
7146 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7147 {
7148 char *driver_version;
7149 int i, size = sizeof(cfgtable->driver_version);
7150
7151 driver_version = kmalloc(size, GFP_KERNEL);
7152 if (!driver_version)
7153 return -ENOMEM;
7154
7155 init_driver_version(driver_version, size);
7156 for (i = 0; i < size; i++)
7157 writeb(driver_version[i], &cfgtable->driver_version[i]);
7158 kfree(driver_version);
7159 return 0;
7160 }
7161
7162 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7163 unsigned char *driver_ver)
7164 {
7165 int i;
7166
7167 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7168 driver_ver[i] = readb(&cfgtable->driver_version[i]);
7169 }
7170
7171 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7172 {
7173
7174 char *driver_ver, *old_driver_ver;
7175 int rc, size = sizeof(cfgtable->driver_version);
7176
7177 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
7178 if (!old_driver_ver)
7179 return -ENOMEM;
7180 driver_ver = old_driver_ver + size;
7181
7182 /* After a reset, the 32 bytes of "driver version" in the cfgtable
7183 * should have been changed, otherwise we know the reset failed.
7184 */
7185 init_driver_version(old_driver_ver, size);
7186 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7187 rc = !memcmp(driver_ver, old_driver_ver, size);
7188 kfree(old_driver_ver);
7189 return rc;
7190 }
7191 /* This does a hard reset of the controller using PCI power management
7192 * states or the using the doorbell register.
7193 */
7194 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
7195 {
7196 u64 cfg_offset;
7197 u32 cfg_base_addr;
7198 u64 cfg_base_addr_index;
7199 void __iomem *vaddr;
7200 unsigned long paddr;
7201 u32 misc_fw_support;
7202 int rc;
7203 struct CfgTable __iomem *cfgtable;
7204 u32 use_doorbell;
7205 u16 command_register;
7206
7207 /* For controllers as old as the P600, this is very nearly
7208 * the same thing as
7209 *
7210 * pci_save_state(pci_dev);
7211 * pci_set_power_state(pci_dev, PCI_D3hot);
7212 * pci_set_power_state(pci_dev, PCI_D0);
7213 * pci_restore_state(pci_dev);
7214 *
7215 * For controllers newer than the P600, the pci power state
7216 * method of resetting doesn't work so we have another way
7217 * using the doorbell register.
7218 */
7219
7220 if (!ctlr_is_resettable(board_id)) {
7221 dev_warn(&pdev->dev, "Controller not resettable\n");
7222 return -ENODEV;
7223 }
7224
7225 /* if controller is soft- but not hard resettable... */
7226 if (!ctlr_is_hard_resettable(board_id))
7227 return -ENOTSUPP; /* try soft reset later. */
7228
7229 /* Save the PCI command register */
7230 pci_read_config_word(pdev, 4, &command_register);
7231 pci_save_state(pdev);
7232
7233 /* find the first memory BAR, so we can find the cfg table */
7234 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7235 if (rc)
7236 return rc;
7237 vaddr = remap_pci_mem(paddr, 0x250);
7238 if (!vaddr)
7239 return -ENOMEM;
7240
7241 /* find cfgtable in order to check if reset via doorbell is supported */
7242 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7243 &cfg_base_addr_index, &cfg_offset);
7244 if (rc)
7245 goto unmap_vaddr;
7246 cfgtable = remap_pci_mem(pci_resource_start(pdev,
7247 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7248 if (!cfgtable) {
7249 rc = -ENOMEM;
7250 goto unmap_vaddr;
7251 }
7252 rc = write_driver_ver_to_cfgtable(cfgtable);
7253 if (rc)
7254 goto unmap_cfgtable;
7255
7256 /* If reset via doorbell register is supported, use that.
7257 * There are two such methods. Favor the newest method.
7258 */
7259 misc_fw_support = readl(&cfgtable->misc_fw_support);
7260 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7261 if (use_doorbell) {
7262 use_doorbell = DOORBELL_CTLR_RESET2;
7263 } else {
7264 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7265 if (use_doorbell) {
7266 dev_warn(&pdev->dev,
7267 "Soft reset not supported. Firmware update is required.\n");
7268 rc = -ENOTSUPP; /* try soft reset */
7269 goto unmap_cfgtable;
7270 }
7271 }
7272
7273 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7274 if (rc)
7275 goto unmap_cfgtable;
7276
7277 pci_restore_state(pdev);
7278 pci_write_config_word(pdev, 4, command_register);
7279
7280 /* Some devices (notably the HP Smart Array 5i Controller)
7281 need a little pause here */
7282 msleep(HPSA_POST_RESET_PAUSE_MSECS);
7283
7284 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7285 if (rc) {
7286 dev_warn(&pdev->dev,
7287 "Failed waiting for board to become ready after hard reset\n");
7288 goto unmap_cfgtable;
7289 }
7290
7291 rc = controller_reset_failed(vaddr);
7292 if (rc < 0)
7293 goto unmap_cfgtable;
7294 if (rc) {
7295 dev_warn(&pdev->dev, "Unable to successfully reset "
7296 "controller. Will try soft reset.\n");
7297 rc = -ENOTSUPP;
7298 } else {
7299 dev_info(&pdev->dev, "board ready after hard reset.\n");
7300 }
7301
7302 unmap_cfgtable:
7303 iounmap(cfgtable);
7304
7305 unmap_vaddr:
7306 iounmap(vaddr);
7307 return rc;
7308 }
7309
7310 /*
7311 * We cannot read the structure directly, for portability we must use
7312 * the io functions.
7313 * This is for debug only.
7314 */
7315 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7316 {
7317 #ifdef HPSA_DEBUG
7318 int i;
7319 char temp_name[17];
7320
7321 dev_info(dev, "Controller Configuration information\n");
7322 dev_info(dev, "------------------------------------\n");
7323 for (i = 0; i < 4; i++)
7324 temp_name[i] = readb(&(tb->Signature[i]));
7325 temp_name[4] = '\0';
7326 dev_info(dev, " Signature = %s\n", temp_name);
7327 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7328 dev_info(dev, " Transport methods supported = 0x%x\n",
7329 readl(&(tb->TransportSupport)));
7330 dev_info(dev, " Transport methods active = 0x%x\n",
7331 readl(&(tb->TransportActive)));
7332 dev_info(dev, " Requested transport Method = 0x%x\n",
7333 readl(&(tb->HostWrite.TransportRequest)));
7334 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
7335 readl(&(tb->HostWrite.CoalIntDelay)));
7336 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
7337 readl(&(tb->HostWrite.CoalIntCount)));
7338 dev_info(dev, " Max outstanding commands = %d\n",
7339 readl(&(tb->CmdsOutMax)));
7340 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7341 for (i = 0; i < 16; i++)
7342 temp_name[i] = readb(&(tb->ServerName[i]));
7343 temp_name[16] = '\0';
7344 dev_info(dev, " Server Name = %s\n", temp_name);
7345 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
7346 readl(&(tb->HeartBeat)));
7347 #endif /* HPSA_DEBUG */
7348 }
7349
7350 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7351 {
7352 int i, offset, mem_type, bar_type;
7353
7354 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
7355 return 0;
7356 offset = 0;
7357 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7358 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7359 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7360 offset += 4;
7361 else {
7362 mem_type = pci_resource_flags(pdev, i) &
7363 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7364 switch (mem_type) {
7365 case PCI_BASE_ADDRESS_MEM_TYPE_32:
7366 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7367 offset += 4; /* 32 bit */
7368 break;
7369 case PCI_BASE_ADDRESS_MEM_TYPE_64:
7370 offset += 8;
7371 break;
7372 default: /* reserved in PCI 2.2 */
7373 dev_warn(&pdev->dev,
7374 "base address is invalid\n");
7375 return -1;
7376 break;
7377 }
7378 }
7379 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7380 return i + 1;
7381 }
7382 return -1;
7383 }
7384
7385 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7386 {
7387 pci_free_irq_vectors(h->pdev);
7388 h->msix_vectors = 0;
7389 }
7390
7391 static void hpsa_setup_reply_map(struct ctlr_info *h)
7392 {
7393 const struct cpumask *mask;
7394 unsigned int queue, cpu;
7395
7396 for (queue = 0; queue < h->msix_vectors; queue++) {
7397 mask = pci_irq_get_affinity(h->pdev, queue);
7398 if (!mask)
7399 goto fallback;
7400
7401 for_each_cpu(cpu, mask)
7402 h->reply_map[cpu] = queue;
7403 }
7404 return;
7405
7406 fallback:
7407 for_each_possible_cpu(cpu)
7408 h->reply_map[cpu] = 0;
7409 }
7410
7411 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7412 * controllers that are capable. If not, we use legacy INTx mode.
7413 */
7414 static int hpsa_interrupt_mode(struct ctlr_info *h)
7415 {
7416 unsigned int flags = PCI_IRQ_LEGACY;
7417 int ret;
7418
7419 /* Some boards advertise MSI but don't really support it */
7420 switch (h->board_id) {
7421 case 0x40700E11:
7422 case 0x40800E11:
7423 case 0x40820E11:
7424 case 0x40830E11:
7425 break;
7426 default:
7427 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7428 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7429 if (ret > 0) {
7430 h->msix_vectors = ret;
7431 return 0;
7432 }
7433
7434 flags |= PCI_IRQ_MSI;
7435 break;
7436 }
7437
7438 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7439 if (ret < 0)
7440 return ret;
7441 return 0;
7442 }
7443
7444 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
7445 bool *legacy_board)
7446 {
7447 int i;
7448 u32 subsystem_vendor_id, subsystem_device_id;
7449
7450 subsystem_vendor_id = pdev->subsystem_vendor;
7451 subsystem_device_id = pdev->subsystem_device;
7452 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7453 subsystem_vendor_id;
7454
7455 if (legacy_board)
7456 *legacy_board = false;
7457 for (i = 0; i < ARRAY_SIZE(products); i++)
7458 if (*board_id == products[i].board_id) {
7459 if (products[i].access != &SA5A_access &&
7460 products[i].access != &SA5B_access)
7461 return i;
7462 dev_warn(&pdev->dev,
7463 "legacy board ID: 0x%08x\n",
7464 *board_id);
7465 if (legacy_board)
7466 *legacy_board = true;
7467 return i;
7468 }
7469
7470 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id);
7471 if (legacy_board)
7472 *legacy_board = true;
7473 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7474 }
7475
7476 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7477 unsigned long *memory_bar)
7478 {
7479 int i;
7480
7481 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7482 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7483 /* addressing mode bits already removed */
7484 *memory_bar = pci_resource_start(pdev, i);
7485 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7486 *memory_bar);
7487 return 0;
7488 }
7489 dev_warn(&pdev->dev, "no memory BAR found\n");
7490 return -ENODEV;
7491 }
7492
7493 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7494 int wait_for_ready)
7495 {
7496 int i, iterations;
7497 u32 scratchpad;
7498 if (wait_for_ready)
7499 iterations = HPSA_BOARD_READY_ITERATIONS;
7500 else
7501 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7502
7503 for (i = 0; i < iterations; i++) {
7504 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7505 if (wait_for_ready) {
7506 if (scratchpad == HPSA_FIRMWARE_READY)
7507 return 0;
7508 } else {
7509 if (scratchpad != HPSA_FIRMWARE_READY)
7510 return 0;
7511 }
7512 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7513 }
7514 dev_warn(&pdev->dev, "board not ready, timed out.\n");
7515 return -ENODEV;
7516 }
7517
7518 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7519 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7520 u64 *cfg_offset)
7521 {
7522 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7523 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7524 *cfg_base_addr &= (u32) 0x0000ffff;
7525 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7526 if (*cfg_base_addr_index == -1) {
7527 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7528 return -ENODEV;
7529 }
7530 return 0;
7531 }
7532
7533 static void hpsa_free_cfgtables(struct ctlr_info *h)
7534 {
7535 if (h->transtable) {
7536 iounmap(h->transtable);
7537 h->transtable = NULL;
7538 }
7539 if (h->cfgtable) {
7540 iounmap(h->cfgtable);
7541 h->cfgtable = NULL;
7542 }
7543 }
7544
7545 /* Find and map CISS config table and transfer table
7546 + * several items must be unmapped (freed) later
7547 + * */
7548 static int hpsa_find_cfgtables(struct ctlr_info *h)
7549 {
7550 u64 cfg_offset;
7551 u32 cfg_base_addr;
7552 u64 cfg_base_addr_index;
7553 u32 trans_offset;
7554 int rc;
7555
7556 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7557 &cfg_base_addr_index, &cfg_offset);
7558 if (rc)
7559 return rc;
7560 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7561 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7562 if (!h->cfgtable) {
7563 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7564 return -ENOMEM;
7565 }
7566 rc = write_driver_ver_to_cfgtable(h->cfgtable);
7567 if (rc)
7568 return rc;
7569 /* Find performant mode table. */
7570 trans_offset = readl(&h->cfgtable->TransMethodOffset);
7571 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7572 cfg_base_addr_index)+cfg_offset+trans_offset,
7573 sizeof(*h->transtable));
7574 if (!h->transtable) {
7575 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7576 hpsa_free_cfgtables(h);
7577 return -ENOMEM;
7578 }
7579 return 0;
7580 }
7581
7582 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7583 {
7584 #define MIN_MAX_COMMANDS 16
7585 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7586
7587 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7588
7589 /* Limit commands in memory limited kdump scenario. */
7590 if (reset_devices && h->max_commands > 32)
7591 h->max_commands = 32;
7592
7593 if (h->max_commands < MIN_MAX_COMMANDS) {
7594 dev_warn(&h->pdev->dev,
7595 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7596 h->max_commands,
7597 MIN_MAX_COMMANDS);
7598 h->max_commands = MIN_MAX_COMMANDS;
7599 }
7600 }
7601
7602 /* If the controller reports that the total max sg entries is greater than 512,
7603 * then we know that chained SG blocks work. (Original smart arrays did not
7604 * support chained SG blocks and would return zero for max sg entries.)
7605 */
7606 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7607 {
7608 return h->maxsgentries > 512;
7609 }
7610
7611 /* Interrogate the hardware for some limits:
7612 * max commands, max SG elements without chaining, and with chaining,
7613 * SG chain block size, etc.
7614 */
7615 static void hpsa_find_board_params(struct ctlr_info *h)
7616 {
7617 hpsa_get_max_perf_mode_cmds(h);
7618 h->nr_cmds = h->max_commands;
7619 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7620 h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7621 if (hpsa_supports_chained_sg_blocks(h)) {
7622 /* Limit in-command s/g elements to 32 save dma'able memory. */
7623 h->max_cmd_sg_entries = 32;
7624 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7625 h->maxsgentries--; /* save one for chain pointer */
7626 } else {
7627 /*
7628 * Original smart arrays supported at most 31 s/g entries
7629 * embedded inline in the command (trying to use more
7630 * would lock up the controller)
7631 */
7632 h->max_cmd_sg_entries = 31;
7633 h->maxsgentries = 31; /* default to traditional values */
7634 h->chainsize = 0;
7635 }
7636
7637 /* Find out what task management functions are supported and cache */
7638 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7639 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7640 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7641 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7642 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7643 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7644 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7645 }
7646
7647 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7648 {
7649 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7650 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7651 return false;
7652 }
7653 return true;
7654 }
7655
7656 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7657 {
7658 u32 driver_support;
7659
7660 driver_support = readl(&(h->cfgtable->driver_support));
7661 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7662 #ifdef CONFIG_X86
7663 driver_support |= ENABLE_SCSI_PREFETCH;
7664 #endif
7665 driver_support |= ENABLE_UNIT_ATTN;
7666 writel(driver_support, &(h->cfgtable->driver_support));
7667 }
7668
7669 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
7670 * in a prefetch beyond physical memory.
7671 */
7672 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7673 {
7674 u32 dma_prefetch;
7675
7676 if (h->board_id != 0x3225103C)
7677 return;
7678 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7679 dma_prefetch |= 0x8000;
7680 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7681 }
7682
7683 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7684 {
7685 int i;
7686 u32 doorbell_value;
7687 unsigned long flags;
7688 /* wait until the clear_event_notify bit 6 is cleared by controller. */
7689 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7690 spin_lock_irqsave(&h->lock, flags);
7691 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7692 spin_unlock_irqrestore(&h->lock, flags);
7693 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7694 goto done;
7695 /* delay and try again */
7696 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7697 }
7698 return -ENODEV;
7699 done:
7700 return 0;
7701 }
7702
7703 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7704 {
7705 int i;
7706 u32 doorbell_value;
7707 unsigned long flags;
7708
7709 /* under certain very rare conditions, this can take awhile.
7710 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7711 * as we enter this code.)
7712 */
7713 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7714 if (h->remove_in_progress)
7715 goto done;
7716 spin_lock_irqsave(&h->lock, flags);
7717 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7718 spin_unlock_irqrestore(&h->lock, flags);
7719 if (!(doorbell_value & CFGTBL_ChangeReq))
7720 goto done;
7721 /* delay and try again */
7722 msleep(MODE_CHANGE_WAIT_INTERVAL);
7723 }
7724 return -ENODEV;
7725 done:
7726 return 0;
7727 }
7728
7729 /* return -ENODEV or other reason on error, 0 on success */
7730 static int hpsa_enter_simple_mode(struct ctlr_info *h)
7731 {
7732 u32 trans_support;
7733
7734 trans_support = readl(&(h->cfgtable->TransportSupport));
7735 if (!(trans_support & SIMPLE_MODE))
7736 return -ENOTSUPP;
7737
7738 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7739
7740 /* Update the field, and then ring the doorbell */
7741 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7742 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7743 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7744 if (hpsa_wait_for_mode_change_ack(h))
7745 goto error;
7746 print_cfg_table(&h->pdev->dev, h->cfgtable);
7747 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7748 goto error;
7749 h->transMethod = CFGTBL_Trans_Simple;
7750 return 0;
7751 error:
7752 dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7753 return -ENODEV;
7754 }
7755
7756 /* free items allocated or mapped by hpsa_pci_init */
7757 static void hpsa_free_pci_init(struct ctlr_info *h)
7758 {
7759 hpsa_free_cfgtables(h); /* pci_init 4 */
7760 iounmap(h->vaddr); /* pci_init 3 */
7761 h->vaddr = NULL;
7762 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
7763 /*
7764 * call pci_disable_device before pci_release_regions per
7765 * Documentation/PCI/pci.txt
7766 */
7767 pci_disable_device(h->pdev); /* pci_init 1 */
7768 pci_release_regions(h->pdev); /* pci_init 2 */
7769 }
7770
7771 /* several items must be freed later */
7772 static int hpsa_pci_init(struct ctlr_info *h)
7773 {
7774 int prod_index, err;
7775 bool legacy_board;
7776
7777 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board);
7778 if (prod_index < 0)
7779 return prod_index;
7780 h->product_name = products[prod_index].product_name;
7781 h->access = *(products[prod_index].access);
7782 h->legacy_board = legacy_board;
7783 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7784 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7785
7786 err = pci_enable_device(h->pdev);
7787 if (err) {
7788 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7789 pci_disable_device(h->pdev);
7790 return err;
7791 }
7792
7793 err = pci_request_regions(h->pdev, HPSA);
7794 if (err) {
7795 dev_err(&h->pdev->dev,
7796 "failed to obtain PCI resources\n");
7797 pci_disable_device(h->pdev);
7798 return err;
7799 }
7800
7801 pci_set_master(h->pdev);
7802
7803 err = hpsa_interrupt_mode(h);
7804 if (err)
7805 goto clean1;
7806
7807 /* setup mapping between CPU and reply queue */
7808 hpsa_setup_reply_map(h);
7809
7810 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7811 if (err)
7812 goto clean2; /* intmode+region, pci */
7813 h->vaddr = remap_pci_mem(h->paddr, 0x250);
7814 if (!h->vaddr) {
7815 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7816 err = -ENOMEM;
7817 goto clean2; /* intmode+region, pci */
7818 }
7819 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7820 if (err)
7821 goto clean3; /* vaddr, intmode+region, pci */
7822 err = hpsa_find_cfgtables(h);
7823 if (err)
7824 goto clean3; /* vaddr, intmode+region, pci */
7825 hpsa_find_board_params(h);
7826
7827 if (!hpsa_CISS_signature_present(h)) {
7828 err = -ENODEV;
7829 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7830 }
7831 hpsa_set_driver_support_bits(h);
7832 hpsa_p600_dma_prefetch_quirk(h);
7833 err = hpsa_enter_simple_mode(h);
7834 if (err)
7835 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7836 return 0;
7837
7838 clean4: /* cfgtables, vaddr, intmode+region, pci */
7839 hpsa_free_cfgtables(h);
7840 clean3: /* vaddr, intmode+region, pci */
7841 iounmap(h->vaddr);
7842 h->vaddr = NULL;
7843 clean2: /* intmode+region, pci */
7844 hpsa_disable_interrupt_mode(h);
7845 clean1:
7846 /*
7847 * call pci_disable_device before pci_release_regions per
7848 * Documentation/PCI/pci.txt
7849 */
7850 pci_disable_device(h->pdev);
7851 pci_release_regions(h->pdev);
7852 return err;
7853 }
7854
7855 static void hpsa_hba_inquiry(struct ctlr_info *h)
7856 {
7857 int rc;
7858
7859 #define HBA_INQUIRY_BYTE_COUNT 64
7860 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7861 if (!h->hba_inquiry_data)
7862 return;
7863 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7864 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7865 if (rc != 0) {
7866 kfree(h->hba_inquiry_data);
7867 h->hba_inquiry_data = NULL;
7868 }
7869 }
7870
7871 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7872 {
7873 int rc, i;
7874 void __iomem *vaddr;
7875
7876 if (!reset_devices)
7877 return 0;
7878
7879 /* kdump kernel is loading, we don't know in which state is
7880 * the pci interface. The dev->enable_cnt is equal zero
7881 * so we call enable+disable, wait a while and switch it on.
7882 */
7883 rc = pci_enable_device(pdev);
7884 if (rc) {
7885 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7886 return -ENODEV;
7887 }
7888 pci_disable_device(pdev);
7889 msleep(260); /* a randomly chosen number */
7890 rc = pci_enable_device(pdev);
7891 if (rc) {
7892 dev_warn(&pdev->dev, "failed to enable device.\n");
7893 return -ENODEV;
7894 }
7895
7896 pci_set_master(pdev);
7897
7898 vaddr = pci_ioremap_bar(pdev, 0);
7899 if (vaddr == NULL) {
7900 rc = -ENOMEM;
7901 goto out_disable;
7902 }
7903 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7904 iounmap(vaddr);
7905
7906 /* Reset the controller with a PCI power-cycle or via doorbell */
7907 rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7908
7909 /* -ENOTSUPP here means we cannot reset the controller
7910 * but it's already (and still) up and running in
7911 * "performant mode". Or, it might be 640x, which can't reset
7912 * due to concerns about shared bbwc between 6402/6404 pair.
7913 */
7914 if (rc)
7915 goto out_disable;
7916
7917 /* Now try to get the controller to respond to a no-op */
7918 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7919 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7920 if (hpsa_noop(pdev) == 0)
7921 break;
7922 else
7923 dev_warn(&pdev->dev, "no-op failed%s\n",
7924 (i < 11 ? "; re-trying" : ""));
7925 }
7926
7927 out_disable:
7928
7929 pci_disable_device(pdev);
7930 return rc;
7931 }
7932
7933 static void hpsa_free_cmd_pool(struct ctlr_info *h)
7934 {
7935 kfree(h->cmd_pool_bits);
7936 h->cmd_pool_bits = NULL;
7937 if (h->cmd_pool) {
7938 pci_free_consistent(h->pdev,
7939 h->nr_cmds * sizeof(struct CommandList),
7940 h->cmd_pool,
7941 h->cmd_pool_dhandle);
7942 h->cmd_pool = NULL;
7943 h->cmd_pool_dhandle = 0;
7944 }
7945 if (h->errinfo_pool) {
7946 pci_free_consistent(h->pdev,
7947 h->nr_cmds * sizeof(struct ErrorInfo),
7948 h->errinfo_pool,
7949 h->errinfo_pool_dhandle);
7950 h->errinfo_pool = NULL;
7951 h->errinfo_pool_dhandle = 0;
7952 }
7953 }
7954
7955 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
7956 {
7957 h->cmd_pool_bits = kzalloc(
7958 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
7959 sizeof(unsigned long), GFP_KERNEL);
7960 h->cmd_pool = pci_alloc_consistent(h->pdev,
7961 h->nr_cmds * sizeof(*h->cmd_pool),
7962 &(h->cmd_pool_dhandle));
7963 h->errinfo_pool = pci_alloc_consistent(h->pdev,
7964 h->nr_cmds * sizeof(*h->errinfo_pool),
7965 &(h->errinfo_pool_dhandle));
7966 if ((h->cmd_pool_bits == NULL)
7967 || (h->cmd_pool == NULL)
7968 || (h->errinfo_pool == NULL)) {
7969 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
7970 goto clean_up;
7971 }
7972 hpsa_preinitialize_commands(h);
7973 return 0;
7974 clean_up:
7975 hpsa_free_cmd_pool(h);
7976 return -ENOMEM;
7977 }
7978
7979 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
7980 static void hpsa_free_irqs(struct ctlr_info *h)
7981 {
7982 int i;
7983
7984 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
7985 /* Single reply queue, only one irq to free */
7986 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]);
7987 h->q[h->intr_mode] = 0;
7988 return;
7989 }
7990
7991 for (i = 0; i < h->msix_vectors; i++) {
7992 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
7993 h->q[i] = 0;
7994 }
7995 for (; i < MAX_REPLY_QUEUES; i++)
7996 h->q[i] = 0;
7997 }
7998
7999 /* returns 0 on success; cleans up and returns -Enn on error */
8000 static int hpsa_request_irqs(struct ctlr_info *h,
8001 irqreturn_t (*msixhandler)(int, void *),
8002 irqreturn_t (*intxhandler)(int, void *))
8003 {
8004 int rc, i;
8005
8006 /*
8007 * initialize h->q[x] = x so that interrupt handlers know which
8008 * queue to process.
8009 */
8010 for (i = 0; i < MAX_REPLY_QUEUES; i++)
8011 h->q[i] = (u8) i;
8012
8013 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
8014 /* If performant mode and MSI-X, use multiple reply queues */
8015 for (i = 0; i < h->msix_vectors; i++) {
8016 sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8017 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
8018 0, h->intrname[i],
8019 &h->q[i]);
8020 if (rc) {
8021 int j;
8022
8023 dev_err(&h->pdev->dev,
8024 "failed to get irq %d for %s\n",
8025 pci_irq_vector(h->pdev, i), h->devname);
8026 for (j = 0; j < i; j++) {
8027 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
8028 h->q[j] = 0;
8029 }
8030 for (; j < MAX_REPLY_QUEUES; j++)
8031 h->q[j] = 0;
8032 return rc;
8033 }
8034 }
8035 } else {
8036 /* Use single reply pool */
8037 if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
8038 sprintf(h->intrname[0], "%s-msi%s", h->devname,
8039 h->msix_vectors ? "x" : "");
8040 rc = request_irq(pci_irq_vector(h->pdev, 0),
8041 msixhandler, 0,
8042 h->intrname[0],
8043 &h->q[h->intr_mode]);
8044 } else {
8045 sprintf(h->intrname[h->intr_mode],
8046 "%s-intx", h->devname);
8047 rc = request_irq(pci_irq_vector(h->pdev, 0),
8048 intxhandler, IRQF_SHARED,
8049 h->intrname[0],
8050 &h->q[h->intr_mode]);
8051 }
8052 }
8053 if (rc) {
8054 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8055 pci_irq_vector(h->pdev, 0), h->devname);
8056 hpsa_free_irqs(h);
8057 return -ENODEV;
8058 }
8059 return 0;
8060 }
8061
8062 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
8063 {
8064 int rc;
8065 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
8066
8067 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
8068 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
8069 if (rc) {
8070 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
8071 return rc;
8072 }
8073
8074 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
8075 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8076 if (rc) {
8077 dev_warn(&h->pdev->dev, "Board failed to become ready "
8078 "after soft reset.\n");
8079 return rc;
8080 }
8081
8082 return 0;
8083 }
8084
8085 static void hpsa_free_reply_queues(struct ctlr_info *h)
8086 {
8087 int i;
8088
8089 for (i = 0; i < h->nreply_queues; i++) {
8090 if (!h->reply_queue[i].head)
8091 continue;
8092 pci_free_consistent(h->pdev,
8093 h->reply_queue_size,
8094 h->reply_queue[i].head,
8095 h->reply_queue[i].busaddr);
8096 h->reply_queue[i].head = NULL;
8097 h->reply_queue[i].busaddr = 0;
8098 }
8099 h->reply_queue_size = 0;
8100 }
8101
8102 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
8103 {
8104 hpsa_free_performant_mode(h); /* init_one 7 */
8105 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8106 hpsa_free_cmd_pool(h); /* init_one 5 */
8107 hpsa_free_irqs(h); /* init_one 4 */
8108 scsi_host_put(h->scsi_host); /* init_one 3 */
8109 h->scsi_host = NULL; /* init_one 3 */
8110 hpsa_free_pci_init(h); /* init_one 2_5 */
8111 free_percpu(h->lockup_detected); /* init_one 2 */
8112 h->lockup_detected = NULL; /* init_one 2 */
8113 if (h->resubmit_wq) {
8114 destroy_workqueue(h->resubmit_wq); /* init_one 1 */
8115 h->resubmit_wq = NULL;
8116 }
8117 if (h->rescan_ctlr_wq) {
8118 destroy_workqueue(h->rescan_ctlr_wq);
8119 h->rescan_ctlr_wq = NULL;
8120 }
8121 kfree(h); /* init_one 1 */
8122 }
8123
8124 /* Called when controller lockup detected. */
8125 static void fail_all_outstanding_cmds(struct ctlr_info *h)
8126 {
8127 int i, refcount;
8128 struct CommandList *c;
8129 int failcount = 0;
8130
8131 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8132 for (i = 0; i < h->nr_cmds; i++) {
8133 c = h->cmd_pool + i;
8134 refcount = atomic_inc_return(&c->refcount);
8135 if (refcount > 1) {
8136 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
8137 finish_cmd(c);
8138 atomic_dec(&h->commands_outstanding);
8139 failcount++;
8140 }
8141 cmd_free(h, c);
8142 }
8143 dev_warn(&h->pdev->dev,
8144 "failed %d commands in fail_all\n", failcount);
8145 }
8146
8147 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8148 {
8149 int cpu;
8150
8151 for_each_online_cpu(cpu) {
8152 u32 *lockup_detected;
8153 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8154 *lockup_detected = value;
8155 }
8156 wmb(); /* be sure the per-cpu variables are out to memory */
8157 }
8158
8159 static void controller_lockup_detected(struct ctlr_info *h)
8160 {
8161 unsigned long flags;
8162 u32 lockup_detected;
8163
8164 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8165 spin_lock_irqsave(&h->lock, flags);
8166 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8167 if (!lockup_detected) {
8168 /* no heartbeat, but controller gave us a zero. */
8169 dev_warn(&h->pdev->dev,
8170 "lockup detected after %d but scratchpad register is zero\n",
8171 h->heartbeat_sample_interval / HZ);
8172 lockup_detected = 0xffffffff;
8173 }
8174 set_lockup_detected_for_all_cpus(h, lockup_detected);
8175 spin_unlock_irqrestore(&h->lock, flags);
8176 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8177 lockup_detected, h->heartbeat_sample_interval / HZ);
8178 if (lockup_detected == 0xffff0000) {
8179 dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n");
8180 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL);
8181 }
8182 pci_disable_device(h->pdev);
8183 fail_all_outstanding_cmds(h);
8184 }
8185
8186 static int detect_controller_lockup(struct ctlr_info *h)
8187 {
8188 u64 now;
8189 u32 heartbeat;
8190 unsigned long flags;
8191
8192 now = get_jiffies_64();
8193 /* If we've received an interrupt recently, we're ok. */
8194 if (time_after64(h->last_intr_timestamp +
8195 (h->heartbeat_sample_interval), now))
8196 return false;
8197
8198 /*
8199 * If we've already checked the heartbeat recently, we're ok.
8200 * This could happen if someone sends us a signal. We
8201 * otherwise don't care about signals in this thread.
8202 */
8203 if (time_after64(h->last_heartbeat_timestamp +
8204 (h->heartbeat_sample_interval), now))
8205 return false;
8206
8207 /* If heartbeat has not changed since we last looked, we're not ok. */
8208 spin_lock_irqsave(&h->lock, flags);
8209 heartbeat = readl(&h->cfgtable->HeartBeat);
8210 spin_unlock_irqrestore(&h->lock, flags);
8211 if (h->last_heartbeat == heartbeat) {
8212 controller_lockup_detected(h);
8213 return true;
8214 }
8215
8216 /* We're ok. */
8217 h->last_heartbeat = heartbeat;
8218 h->last_heartbeat_timestamp = now;
8219 return false;
8220 }
8221
8222 /*
8223 * Set ioaccel status for all ioaccel volumes.
8224 *
8225 * Called from monitor controller worker (hpsa_event_monitor_worker)
8226 *
8227 * A Volume (or Volumes that comprise an Array set may be undergoing a
8228 * transformation, so we will be turning off ioaccel for all volumes that
8229 * make up the Array.
8230 */
8231 static void hpsa_set_ioaccel_status(struct ctlr_info *h)
8232 {
8233 int rc;
8234 int i;
8235 u8 ioaccel_status;
8236 unsigned char *buf;
8237 struct hpsa_scsi_dev_t *device;
8238
8239 if (!h)
8240 return;
8241
8242 buf = kmalloc(64, GFP_KERNEL);
8243 if (!buf)
8244 return;
8245
8246 /*
8247 * Run through current device list used during I/O requests.
8248 */
8249 for (i = 0; i < h->ndevices; i++) {
8250 device = h->dev[i];
8251
8252 if (!device)
8253 continue;
8254 if (!device->scsi3addr)
8255 continue;
8256 if (!hpsa_vpd_page_supported(h, device->scsi3addr,
8257 HPSA_VPD_LV_IOACCEL_STATUS))
8258 continue;
8259
8260 memset(buf, 0, 64);
8261
8262 rc = hpsa_scsi_do_inquiry(h, device->scsi3addr,
8263 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS,
8264 buf, 64);
8265 if (rc != 0)
8266 continue;
8267
8268 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
8269 device->offload_config =
8270 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
8271 if (device->offload_config)
8272 device->offload_to_be_enabled =
8273 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
8274
8275 /*
8276 * Immediately turn off ioaccel for any volume the
8277 * controller tells us to. Some of the reasons could be:
8278 * transformation - change to the LVs of an Array.
8279 * degraded volume - component failure
8280 *
8281 * If ioaccel is to be re-enabled, re-enable later during the
8282 * scan operation so the driver can get a fresh raidmap
8283 * before turning ioaccel back on.
8284 *
8285 */
8286 if (!device->offload_to_be_enabled)
8287 device->offload_enabled = 0;
8288 }
8289
8290 kfree(buf);
8291 }
8292
8293 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
8294 {
8295 char *event_type;
8296
8297 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8298 return;
8299
8300 /* Ask the controller to clear the events we're handling. */
8301 if ((h->transMethod & (CFGTBL_Trans_io_accel1
8302 | CFGTBL_Trans_io_accel2)) &&
8303 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8304 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8305
8306 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8307 event_type = "state change";
8308 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8309 event_type = "configuration change";
8310 /* Stop sending new RAID offload reqs via the IO accelerator */
8311 scsi_block_requests(h->scsi_host);
8312 hpsa_set_ioaccel_status(h);
8313 hpsa_drain_accel_commands(h);
8314 /* Set 'accelerator path config change' bit */
8315 dev_warn(&h->pdev->dev,
8316 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8317 h->events, event_type);
8318 writel(h->events, &(h->cfgtable->clear_event_notify));
8319 /* Set the "clear event notify field update" bit 6 */
8320 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8321 /* Wait until ctlr clears 'clear event notify field', bit 6 */
8322 hpsa_wait_for_clear_event_notify_ack(h);
8323 scsi_unblock_requests(h->scsi_host);
8324 } else {
8325 /* Acknowledge controller notification events. */
8326 writel(h->events, &(h->cfgtable->clear_event_notify));
8327 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8328 hpsa_wait_for_clear_event_notify_ack(h);
8329 }
8330 return;
8331 }
8332
8333 /* Check a register on the controller to see if there are configuration
8334 * changes (added/changed/removed logical drives, etc.) which mean that
8335 * we should rescan the controller for devices.
8336 * Also check flag for driver-initiated rescan.
8337 */
8338 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8339 {
8340 if (h->drv_req_rescan) {
8341 h->drv_req_rescan = 0;
8342 return 1;
8343 }
8344
8345 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8346 return 0;
8347
8348 h->events = readl(&(h->cfgtable->event_notify));
8349 return h->events & RESCAN_REQUIRED_EVENT_BITS;
8350 }
8351
8352 /*
8353 * Check if any of the offline devices have become ready
8354 */
8355 static int hpsa_offline_devices_ready(struct ctlr_info *h)
8356 {
8357 unsigned long flags;
8358 struct offline_device_entry *d;
8359 struct list_head *this, *tmp;
8360
8361 spin_lock_irqsave(&h->offline_device_lock, flags);
8362 list_for_each_safe(this, tmp, &h->offline_device_list) {
8363 d = list_entry(this, struct offline_device_entry,
8364 offline_list);
8365 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8366 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8367 spin_lock_irqsave(&h->offline_device_lock, flags);
8368 list_del(&d->offline_list);
8369 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8370 return 1;
8371 }
8372 spin_lock_irqsave(&h->offline_device_lock, flags);
8373 }
8374 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8375 return 0;
8376 }
8377
8378 static int hpsa_luns_changed(struct ctlr_info *h)
8379 {
8380 int rc = 1; /* assume there are changes */
8381 struct ReportLUNdata *logdev = NULL;
8382
8383 /* if we can't find out if lun data has changed,
8384 * assume that it has.
8385 */
8386
8387 if (!h->lastlogicals)
8388 return rc;
8389
8390 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8391 if (!logdev)
8392 return rc;
8393
8394 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8395 dev_warn(&h->pdev->dev,
8396 "report luns failed, can't track lun changes.\n");
8397 goto out;
8398 }
8399 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8400 dev_info(&h->pdev->dev,
8401 "Lun changes detected.\n");
8402 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8403 goto out;
8404 } else
8405 rc = 0; /* no changes detected. */
8406 out:
8407 kfree(logdev);
8408 return rc;
8409 }
8410
8411 static void hpsa_perform_rescan(struct ctlr_info *h)
8412 {
8413 struct Scsi_Host *sh = NULL;
8414 unsigned long flags;
8415
8416 /*
8417 * Do the scan after the reset
8418 */
8419 spin_lock_irqsave(&h->reset_lock, flags);
8420 if (h->reset_in_progress) {
8421 h->drv_req_rescan = 1;
8422 spin_unlock_irqrestore(&h->reset_lock, flags);
8423 return;
8424 }
8425 spin_unlock_irqrestore(&h->reset_lock, flags);
8426
8427 sh = scsi_host_get(h->scsi_host);
8428 if (sh != NULL) {
8429 hpsa_scan_start(sh);
8430 scsi_host_put(sh);
8431 h->drv_req_rescan = 0;
8432 }
8433 }
8434
8435 /*
8436 * watch for controller events
8437 */
8438 static void hpsa_event_monitor_worker(struct work_struct *work)
8439 {
8440 struct ctlr_info *h = container_of(to_delayed_work(work),
8441 struct ctlr_info, event_monitor_work);
8442 unsigned long flags;
8443
8444 spin_lock_irqsave(&h->lock, flags);
8445 if (h->remove_in_progress) {
8446 spin_unlock_irqrestore(&h->lock, flags);
8447 return;
8448 }
8449 spin_unlock_irqrestore(&h->lock, flags);
8450
8451 if (hpsa_ctlr_needs_rescan(h)) {
8452 hpsa_ack_ctlr_events(h);
8453 hpsa_perform_rescan(h);
8454 }
8455
8456 spin_lock_irqsave(&h->lock, flags);
8457 if (!h->remove_in_progress)
8458 schedule_delayed_work(&h->event_monitor_work,
8459 HPSA_EVENT_MONITOR_INTERVAL);
8460 spin_unlock_irqrestore(&h->lock, flags);
8461 }
8462
8463 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8464 {
8465 unsigned long flags;
8466 struct ctlr_info *h = container_of(to_delayed_work(work),
8467 struct ctlr_info, rescan_ctlr_work);
8468
8469 spin_lock_irqsave(&h->lock, flags);
8470 if (h->remove_in_progress) {
8471 spin_unlock_irqrestore(&h->lock, flags);
8472 return;
8473 }
8474 spin_unlock_irqrestore(&h->lock, flags);
8475
8476 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) {
8477 hpsa_perform_rescan(h);
8478 } else if (h->discovery_polling) {
8479 if (hpsa_luns_changed(h)) {
8480 dev_info(&h->pdev->dev,
8481 "driver discovery polling rescan.\n");
8482 hpsa_perform_rescan(h);
8483 }
8484 }
8485 spin_lock_irqsave(&h->lock, flags);
8486 if (!h->remove_in_progress)
8487 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8488 h->heartbeat_sample_interval);
8489 spin_unlock_irqrestore(&h->lock, flags);
8490 }
8491
8492 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8493 {
8494 unsigned long flags;
8495 struct ctlr_info *h = container_of(to_delayed_work(work),
8496 struct ctlr_info, monitor_ctlr_work);
8497
8498 detect_controller_lockup(h);
8499 if (lockup_detected(h))
8500 return;
8501
8502 spin_lock_irqsave(&h->lock, flags);
8503 if (!h->remove_in_progress)
8504 schedule_delayed_work(&h->monitor_ctlr_work,
8505 h->heartbeat_sample_interval);
8506 spin_unlock_irqrestore(&h->lock, flags);
8507 }
8508
8509 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8510 char *name)
8511 {
8512 struct workqueue_struct *wq = NULL;
8513
8514 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8515 if (!wq)
8516 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8517
8518 return wq;
8519 }
8520
8521 static void hpda_free_ctlr_info(struct ctlr_info *h)
8522 {
8523 kfree(h->reply_map);
8524 kfree(h);
8525 }
8526
8527 static struct ctlr_info *hpda_alloc_ctlr_info(void)
8528 {
8529 struct ctlr_info *h;
8530
8531 h = kzalloc(sizeof(*h), GFP_KERNEL);
8532 if (!h)
8533 return NULL;
8534
8535 h->reply_map = kzalloc(sizeof(*h->reply_map) * nr_cpu_ids, GFP_KERNEL);
8536 if (!h->reply_map) {
8537 kfree(h);
8538 return NULL;
8539 }
8540 return h;
8541 }
8542
8543 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8544 {
8545 int dac, rc;
8546 struct ctlr_info *h;
8547 int try_soft_reset = 0;
8548 unsigned long flags;
8549 u32 board_id;
8550
8551 if (number_of_controllers == 0)
8552 printk(KERN_INFO DRIVER_NAME "\n");
8553
8554 rc = hpsa_lookup_board_id(pdev, &board_id, NULL);
8555 if (rc < 0) {
8556 dev_warn(&pdev->dev, "Board ID not found\n");
8557 return rc;
8558 }
8559
8560 rc = hpsa_init_reset_devices(pdev, board_id);
8561 if (rc) {
8562 if (rc != -ENOTSUPP)
8563 return rc;
8564 /* If the reset fails in a particular way (it has no way to do
8565 * a proper hard reset, so returns -ENOTSUPP) we can try to do
8566 * a soft reset once we get the controller configured up to the
8567 * point that it can accept a command.
8568 */
8569 try_soft_reset = 1;
8570 rc = 0;
8571 }
8572
8573 reinit_after_soft_reset:
8574
8575 /* Command structures must be aligned on a 32-byte boundary because
8576 * the 5 lower bits of the address are used by the hardware. and by
8577 * the driver. See comments in hpsa.h for more info.
8578 */
8579 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8580 h = hpda_alloc_ctlr_info();
8581 if (!h) {
8582 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8583 return -ENOMEM;
8584 }
8585
8586 h->pdev = pdev;
8587
8588 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8589 INIT_LIST_HEAD(&h->offline_device_list);
8590 spin_lock_init(&h->lock);
8591 spin_lock_init(&h->offline_device_lock);
8592 spin_lock_init(&h->scan_lock);
8593 spin_lock_init(&h->reset_lock);
8594 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8595
8596 /* Allocate and clear per-cpu variable lockup_detected */
8597 h->lockup_detected = alloc_percpu(u32);
8598 if (!h->lockup_detected) {
8599 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8600 rc = -ENOMEM;
8601 goto clean1; /* aer/h */
8602 }
8603 set_lockup_detected_for_all_cpus(h, 0);
8604
8605 rc = hpsa_pci_init(h);
8606 if (rc)
8607 goto clean2; /* lu, aer/h */
8608
8609 /* relies on h-> settings made by hpsa_pci_init, including
8610 * interrupt_mode h->intr */
8611 rc = hpsa_scsi_host_alloc(h);
8612 if (rc)
8613 goto clean2_5; /* pci, lu, aer/h */
8614
8615 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8616 h->ctlr = number_of_controllers;
8617 number_of_controllers++;
8618
8619 /* configure PCI DMA stuff */
8620 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8621 if (rc == 0) {
8622 dac = 1;
8623 } else {
8624 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8625 if (rc == 0) {
8626 dac = 0;
8627 } else {
8628 dev_err(&pdev->dev, "no suitable DMA available\n");
8629 goto clean3; /* shost, pci, lu, aer/h */
8630 }
8631 }
8632
8633 /* make sure the board interrupts are off */
8634 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8635
8636 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8637 if (rc)
8638 goto clean3; /* shost, pci, lu, aer/h */
8639 rc = hpsa_alloc_cmd_pool(h);
8640 if (rc)
8641 goto clean4; /* irq, shost, pci, lu, aer/h */
8642 rc = hpsa_alloc_sg_chain_blocks(h);
8643 if (rc)
8644 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */
8645 init_waitqueue_head(&h->scan_wait_queue);
8646 init_waitqueue_head(&h->event_sync_wait_queue);
8647 mutex_init(&h->reset_mutex);
8648 h->scan_finished = 1; /* no scan currently in progress */
8649 h->scan_waiting = 0;
8650
8651 pci_set_drvdata(pdev, h);
8652 h->ndevices = 0;
8653
8654 spin_lock_init(&h->devlock);
8655 rc = hpsa_put_ctlr_into_performant_mode(h);
8656 if (rc)
8657 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8658
8659 /* create the resubmit workqueue */
8660 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8661 if (!h->rescan_ctlr_wq) {
8662 rc = -ENOMEM;
8663 goto clean7;
8664 }
8665
8666 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8667 if (!h->resubmit_wq) {
8668 rc = -ENOMEM;
8669 goto clean7; /* aer/h */
8670 }
8671
8672 /*
8673 * At this point, the controller is ready to take commands.
8674 * Now, if reset_devices and the hard reset didn't work, try
8675 * the soft reset and see if that works.
8676 */
8677 if (try_soft_reset) {
8678
8679 /* This is kind of gross. We may or may not get a completion
8680 * from the soft reset command, and if we do, then the value
8681 * from the fifo may or may not be valid. So, we wait 10 secs
8682 * after the reset throwing away any completions we get during
8683 * that time. Unregister the interrupt handler and register
8684 * fake ones to scoop up any residual completions.
8685 */
8686 spin_lock_irqsave(&h->lock, flags);
8687 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8688 spin_unlock_irqrestore(&h->lock, flags);
8689 hpsa_free_irqs(h);
8690 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8691 hpsa_intx_discard_completions);
8692 if (rc) {
8693 dev_warn(&h->pdev->dev,
8694 "Failed to request_irq after soft reset.\n");
8695 /*
8696 * cannot goto clean7 or free_irqs will be called
8697 * again. Instead, do its work
8698 */
8699 hpsa_free_performant_mode(h); /* clean7 */
8700 hpsa_free_sg_chain_blocks(h); /* clean6 */
8701 hpsa_free_cmd_pool(h); /* clean5 */
8702 /*
8703 * skip hpsa_free_irqs(h) clean4 since that
8704 * was just called before request_irqs failed
8705 */
8706 goto clean3;
8707 }
8708
8709 rc = hpsa_kdump_soft_reset(h);
8710 if (rc)
8711 /* Neither hard nor soft reset worked, we're hosed. */
8712 goto clean7;
8713
8714 dev_info(&h->pdev->dev, "Board READY.\n");
8715 dev_info(&h->pdev->dev,
8716 "Waiting for stale completions to drain.\n");
8717 h->access.set_intr_mask(h, HPSA_INTR_ON);
8718 msleep(10000);
8719 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8720
8721 rc = controller_reset_failed(h->cfgtable);
8722 if (rc)
8723 dev_info(&h->pdev->dev,
8724 "Soft reset appears to have failed.\n");
8725
8726 /* since the controller's reset, we have to go back and re-init
8727 * everything. Easiest to just forget what we've done and do it
8728 * all over again.
8729 */
8730 hpsa_undo_allocations_after_kdump_soft_reset(h);
8731 try_soft_reset = 0;
8732 if (rc)
8733 /* don't goto clean, we already unallocated */
8734 return -ENODEV;
8735
8736 goto reinit_after_soft_reset;
8737 }
8738
8739 /* Enable Accelerated IO path at driver layer */
8740 h->acciopath_status = 1;
8741 /* Disable discovery polling.*/
8742 h->discovery_polling = 0;
8743
8744
8745 /* Turn the interrupts on so we can service requests */
8746 h->access.set_intr_mask(h, HPSA_INTR_ON);
8747
8748 hpsa_hba_inquiry(h);
8749
8750 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8751 if (!h->lastlogicals)
8752 dev_info(&h->pdev->dev,
8753 "Can't track change to report lun data\n");
8754
8755 /* hook into SCSI subsystem */
8756 rc = hpsa_scsi_add_host(h);
8757 if (rc)
8758 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8759
8760 /* Monitor the controller for firmware lockups */
8761 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8762 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8763 schedule_delayed_work(&h->monitor_ctlr_work,
8764 h->heartbeat_sample_interval);
8765 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8766 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8767 h->heartbeat_sample_interval);
8768 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker);
8769 schedule_delayed_work(&h->event_monitor_work,
8770 HPSA_EVENT_MONITOR_INTERVAL);
8771 return 0;
8772
8773 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8774 hpsa_free_performant_mode(h);
8775 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8776 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8777 hpsa_free_sg_chain_blocks(h);
8778 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8779 hpsa_free_cmd_pool(h);
8780 clean4: /* irq, shost, pci, lu, aer/h */
8781 hpsa_free_irqs(h);
8782 clean3: /* shost, pci, lu, aer/h */
8783 scsi_host_put(h->scsi_host);
8784 h->scsi_host = NULL;
8785 clean2_5: /* pci, lu, aer/h */
8786 hpsa_free_pci_init(h);
8787 clean2: /* lu, aer/h */
8788 if (h->lockup_detected) {
8789 free_percpu(h->lockup_detected);
8790 h->lockup_detected = NULL;
8791 }
8792 clean1: /* wq/aer/h */
8793 if (h->resubmit_wq) {
8794 destroy_workqueue(h->resubmit_wq);
8795 h->resubmit_wq = NULL;
8796 }
8797 if (h->rescan_ctlr_wq) {
8798 destroy_workqueue(h->rescan_ctlr_wq);
8799 h->rescan_ctlr_wq = NULL;
8800 }
8801 kfree(h);
8802 return rc;
8803 }
8804
8805 static void hpsa_flush_cache(struct ctlr_info *h)
8806 {
8807 char *flush_buf;
8808 struct CommandList *c;
8809 int rc;
8810
8811 if (unlikely(lockup_detected(h)))
8812 return;
8813 flush_buf = kzalloc(4, GFP_KERNEL);
8814 if (!flush_buf)
8815 return;
8816
8817 c = cmd_alloc(h);
8818
8819 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8820 RAID_CTLR_LUNID, TYPE_CMD)) {
8821 goto out;
8822 }
8823 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8824 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
8825 if (rc)
8826 goto out;
8827 if (c->err_info->CommandStatus != 0)
8828 out:
8829 dev_warn(&h->pdev->dev,
8830 "error flushing cache on controller\n");
8831 cmd_free(h, c);
8832 kfree(flush_buf);
8833 }
8834
8835 /* Make controller gather fresh report lun data each time we
8836 * send down a report luns request
8837 */
8838 static void hpsa_disable_rld_caching(struct ctlr_info *h)
8839 {
8840 u32 *options;
8841 struct CommandList *c;
8842 int rc;
8843
8844 /* Don't bother trying to set diag options if locked up */
8845 if (unlikely(h->lockup_detected))
8846 return;
8847
8848 options = kzalloc(sizeof(*options), GFP_KERNEL);
8849 if (!options)
8850 return;
8851
8852 c = cmd_alloc(h);
8853
8854 /* first, get the current diag options settings */
8855 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8856 RAID_CTLR_LUNID, TYPE_CMD))
8857 goto errout;
8858
8859 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8860 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
8861 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8862 goto errout;
8863
8864 /* Now, set the bit for disabling the RLD caching */
8865 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8866
8867 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8868 RAID_CTLR_LUNID, TYPE_CMD))
8869 goto errout;
8870
8871 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8872 PCI_DMA_TODEVICE, NO_TIMEOUT);
8873 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8874 goto errout;
8875
8876 /* Now verify that it got set: */
8877 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8878 RAID_CTLR_LUNID, TYPE_CMD))
8879 goto errout;
8880
8881 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8882 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
8883 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8884 goto errout;
8885
8886 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
8887 goto out;
8888
8889 errout:
8890 dev_err(&h->pdev->dev,
8891 "Error: failed to disable report lun data caching.\n");
8892 out:
8893 cmd_free(h, c);
8894 kfree(options);
8895 }
8896
8897 static void __hpsa_shutdown(struct pci_dev *pdev)
8898 {
8899 struct ctlr_info *h;
8900
8901 h = pci_get_drvdata(pdev);
8902 /* Turn board interrupts off and send the flush cache command
8903 * sendcmd will turn off interrupt, and send the flush...
8904 * To write all data in the battery backed cache to disks
8905 */
8906 hpsa_flush_cache(h);
8907 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8908 hpsa_free_irqs(h); /* init_one 4 */
8909 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
8910 }
8911
8912 static void hpsa_shutdown(struct pci_dev *pdev)
8913 {
8914 __hpsa_shutdown(pdev);
8915 pci_disable_device(pdev);
8916 }
8917
8918 static void hpsa_free_device_info(struct ctlr_info *h)
8919 {
8920 int i;
8921
8922 for (i = 0; i < h->ndevices; i++) {
8923 kfree(h->dev[i]);
8924 h->dev[i] = NULL;
8925 }
8926 }
8927
8928 static void hpsa_remove_one(struct pci_dev *pdev)
8929 {
8930 struct ctlr_info *h;
8931 unsigned long flags;
8932
8933 if (pci_get_drvdata(pdev) == NULL) {
8934 dev_err(&pdev->dev, "unable to remove device\n");
8935 return;
8936 }
8937 h = pci_get_drvdata(pdev);
8938
8939 /* Get rid of any controller monitoring work items */
8940 spin_lock_irqsave(&h->lock, flags);
8941 h->remove_in_progress = 1;
8942 spin_unlock_irqrestore(&h->lock, flags);
8943 cancel_delayed_work_sync(&h->monitor_ctlr_work);
8944 cancel_delayed_work_sync(&h->rescan_ctlr_work);
8945 cancel_delayed_work_sync(&h->event_monitor_work);
8946 destroy_workqueue(h->rescan_ctlr_wq);
8947 destroy_workqueue(h->resubmit_wq);
8948
8949 hpsa_delete_sas_host(h);
8950
8951 /*
8952 * Call before disabling interrupts.
8953 * scsi_remove_host can trigger I/O operations especially
8954 * when multipath is enabled. There can be SYNCHRONIZE CACHE
8955 * operations which cannot complete and will hang the system.
8956 */
8957 if (h->scsi_host)
8958 scsi_remove_host(h->scsi_host); /* init_one 8 */
8959 /* includes hpsa_free_irqs - init_one 4 */
8960 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8961 __hpsa_shutdown(pdev);
8962
8963 hpsa_free_device_info(h); /* scan */
8964
8965 kfree(h->hba_inquiry_data); /* init_one 10 */
8966 h->hba_inquiry_data = NULL; /* init_one 10 */
8967 hpsa_free_ioaccel2_sg_chain_blocks(h);
8968 hpsa_free_performant_mode(h); /* init_one 7 */
8969 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8970 hpsa_free_cmd_pool(h); /* init_one 5 */
8971 kfree(h->lastlogicals);
8972
8973 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
8974
8975 scsi_host_put(h->scsi_host); /* init_one 3 */
8976 h->scsi_host = NULL; /* init_one 3 */
8977
8978 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8979 hpsa_free_pci_init(h); /* init_one 2.5 */
8980
8981 free_percpu(h->lockup_detected); /* init_one 2 */
8982 h->lockup_detected = NULL; /* init_one 2 */
8983 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */
8984
8985 hpda_free_ctlr_info(h); /* init_one 1 */
8986 }
8987
8988 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
8989 __attribute__((unused)) pm_message_t state)
8990 {
8991 return -ENOSYS;
8992 }
8993
8994 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
8995 {
8996 return -ENOSYS;
8997 }
8998
8999 static struct pci_driver hpsa_pci_driver = {
9000 .name = HPSA,
9001 .probe = hpsa_init_one,
9002 .remove = hpsa_remove_one,
9003 .id_table = hpsa_pci_device_id, /* id_table */
9004 .shutdown = hpsa_shutdown,
9005 .suspend = hpsa_suspend,
9006 .resume = hpsa_resume,
9007 };
9008
9009 /* Fill in bucket_map[], given nsgs (the max number of
9010 * scatter gather elements supported) and bucket[],
9011 * which is an array of 8 integers. The bucket[] array
9012 * contains 8 different DMA transfer sizes (in 16
9013 * byte increments) which the controller uses to fetch
9014 * commands. This function fills in bucket_map[], which
9015 * maps a given number of scatter gather elements to one of
9016 * the 8 DMA transfer sizes. The point of it is to allow the
9017 * controller to only do as much DMA as needed to fetch the
9018 * command, with the DMA transfer size encoded in the lower
9019 * bits of the command address.
9020 */
9021 static void calc_bucket_map(int bucket[], int num_buckets,
9022 int nsgs, int min_blocks, u32 *bucket_map)
9023 {
9024 int i, j, b, size;
9025
9026 /* Note, bucket_map must have nsgs+1 entries. */
9027 for (i = 0; i <= nsgs; i++) {
9028 /* Compute size of a command with i SG entries */
9029 size = i + min_blocks;
9030 b = num_buckets; /* Assume the biggest bucket */
9031 /* Find the bucket that is just big enough */
9032 for (j = 0; j < num_buckets; j++) {
9033 if (bucket[j] >= size) {
9034 b = j;
9035 break;
9036 }
9037 }
9038 /* for a command with i SG entries, use bucket b. */
9039 bucket_map[i] = b;
9040 }
9041 }
9042
9043 /*
9044 * return -ENODEV on err, 0 on success (or no action)
9045 * allocates numerous items that must be freed later
9046 */
9047 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9048 {
9049 int i;
9050 unsigned long register_value;
9051 unsigned long transMethod = CFGTBL_Trans_Performant |
9052 (trans_support & CFGTBL_Trans_use_short_tags) |
9053 CFGTBL_Trans_enable_directed_msix |
9054 (trans_support & (CFGTBL_Trans_io_accel1 |
9055 CFGTBL_Trans_io_accel2));
9056 struct access_method access = SA5_performant_access;
9057
9058 /* This is a bit complicated. There are 8 registers on
9059 * the controller which we write to to tell it 8 different
9060 * sizes of commands which there may be. It's a way of
9061 * reducing the DMA done to fetch each command. Encoded into
9062 * each command's tag are 3 bits which communicate to the controller
9063 * which of the eight sizes that command fits within. The size of
9064 * each command depends on how many scatter gather entries there are.
9065 * Each SG entry requires 16 bytes. The eight registers are programmed
9066 * with the number of 16-byte blocks a command of that size requires.
9067 * The smallest command possible requires 5 such 16 byte blocks.
9068 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
9069 * blocks. Note, this only extends to the SG entries contained
9070 * within the command block, and does not extend to chained blocks
9071 * of SG elements. bft[] contains the eight values we write to
9072 * the registers. They are not evenly distributed, but have more
9073 * sizes for small commands, and fewer sizes for larger commands.
9074 */
9075 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9076 #define MIN_IOACCEL2_BFT_ENTRY 5
9077 #define HPSA_IOACCEL2_HEADER_SZ 4
9078 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9079 13, 14, 15, 16, 17, 18, 19,
9080 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9081 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9082 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9083 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9084 16 * MIN_IOACCEL2_BFT_ENTRY);
9085 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9086 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9087 /* 5 = 1 s/g entry or 4k
9088 * 6 = 2 s/g entry or 8k
9089 * 8 = 4 s/g entry or 16k
9090 * 10 = 6 s/g entry or 24k
9091 */
9092
9093 /* If the controller supports either ioaccel method then
9094 * we can also use the RAID stack submit path that does not
9095 * perform the superfluous readl() after each command submission.
9096 */
9097 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9098 access = SA5_performant_access_no_read;
9099
9100 /* Controller spec: zero out this buffer. */
9101 for (i = 0; i < h->nreply_queues; i++)
9102 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9103
9104 bft[7] = SG_ENTRIES_IN_CMD + 4;
9105 calc_bucket_map(bft, ARRAY_SIZE(bft),
9106 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9107 for (i = 0; i < 8; i++)
9108 writel(bft[i], &h->transtable->BlockFetch[i]);
9109
9110 /* size of controller ring buffer */
9111 writel(h->max_commands, &h->transtable->RepQSize);
9112 writel(h->nreply_queues, &h->transtable->RepQCount);
9113 writel(0, &h->transtable->RepQCtrAddrLow32);
9114 writel(0, &h->transtable->RepQCtrAddrHigh32);
9115
9116 for (i = 0; i < h->nreply_queues; i++) {
9117 writel(0, &h->transtable->RepQAddr[i].upper);
9118 writel(h->reply_queue[i].busaddr,
9119 &h->transtable->RepQAddr[i].lower);
9120 }
9121
9122 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9123 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9124 /*
9125 * enable outbound interrupt coalescing in accelerator mode;
9126 */
9127 if (trans_support & CFGTBL_Trans_io_accel1) {
9128 access = SA5_ioaccel_mode1_access;
9129 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9130 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9131 } else
9132 if (trans_support & CFGTBL_Trans_io_accel2)
9133 access = SA5_ioaccel_mode2_access;
9134 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9135 if (hpsa_wait_for_mode_change_ack(h)) {
9136 dev_err(&h->pdev->dev,
9137 "performant mode problem - doorbell timeout\n");
9138 return -ENODEV;
9139 }
9140 register_value = readl(&(h->cfgtable->TransportActive));
9141 if (!(register_value & CFGTBL_Trans_Performant)) {
9142 dev_err(&h->pdev->dev,
9143 "performant mode problem - transport not active\n");
9144 return -ENODEV;
9145 }
9146 /* Change the access methods to the performant access methods */
9147 h->access = access;
9148 h->transMethod = transMethod;
9149
9150 if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9151 (trans_support & CFGTBL_Trans_io_accel2)))
9152 return 0;
9153
9154 if (trans_support & CFGTBL_Trans_io_accel1) {
9155 /* Set up I/O accelerator mode */
9156 for (i = 0; i < h->nreply_queues; i++) {
9157 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9158 h->reply_queue[i].current_entry =
9159 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9160 }
9161 bft[7] = h->ioaccel_maxsg + 8;
9162 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9163 h->ioaccel1_blockFetchTable);
9164
9165 /* initialize all reply queue entries to unused */
9166 for (i = 0; i < h->nreply_queues; i++)
9167 memset(h->reply_queue[i].head,
9168 (u8) IOACCEL_MODE1_REPLY_UNUSED,
9169 h->reply_queue_size);
9170
9171 /* set all the constant fields in the accelerator command
9172 * frames once at init time to save CPU cycles later.
9173 */
9174 for (i = 0; i < h->nr_cmds; i++) {
9175 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9176
9177 cp->function = IOACCEL1_FUNCTION_SCSIIO;
9178 cp->err_info = (u32) (h->errinfo_pool_dhandle +
9179 (i * sizeof(struct ErrorInfo)));
9180 cp->err_info_len = sizeof(struct ErrorInfo);
9181 cp->sgl_offset = IOACCEL1_SGLOFFSET;
9182 cp->host_context_flags =
9183 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9184 cp->timeout_sec = 0;
9185 cp->ReplyQueue = 0;
9186 cp->tag =
9187 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
9188 cp->host_addr =
9189 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9190 (i * sizeof(struct io_accel1_cmd)));
9191 }
9192 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9193 u64 cfg_offset, cfg_base_addr_index;
9194 u32 bft2_offset, cfg_base_addr;
9195 int rc;
9196
9197 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9198 &cfg_base_addr_index, &cfg_offset);
9199 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9200 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9201 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9202 4, h->ioaccel2_blockFetchTable);
9203 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9204 BUILD_BUG_ON(offsetof(struct CfgTable,
9205 io_accel_request_size_offset) != 0xb8);
9206 h->ioaccel2_bft2_regs =
9207 remap_pci_mem(pci_resource_start(h->pdev,
9208 cfg_base_addr_index) +
9209 cfg_offset + bft2_offset,
9210 ARRAY_SIZE(bft2) *
9211 sizeof(*h->ioaccel2_bft2_regs));
9212 for (i = 0; i < ARRAY_SIZE(bft2); i++)
9213 writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9214 }
9215 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9216 if (hpsa_wait_for_mode_change_ack(h)) {
9217 dev_err(&h->pdev->dev,
9218 "performant mode problem - enabling ioaccel mode\n");
9219 return -ENODEV;
9220 }
9221 return 0;
9222 }
9223
9224 /* Free ioaccel1 mode command blocks and block fetch table */
9225 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9226 {
9227 if (h->ioaccel_cmd_pool) {
9228 pci_free_consistent(h->pdev,
9229 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9230 h->ioaccel_cmd_pool,
9231 h->ioaccel_cmd_pool_dhandle);
9232 h->ioaccel_cmd_pool = NULL;
9233 h->ioaccel_cmd_pool_dhandle = 0;
9234 }
9235 kfree(h->ioaccel1_blockFetchTable);
9236 h->ioaccel1_blockFetchTable = NULL;
9237 }
9238
9239 /* Allocate ioaccel1 mode command blocks and block fetch table */
9240 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9241 {
9242 h->ioaccel_maxsg =
9243 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9244 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9245 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9246
9247 /* Command structures must be aligned on a 128-byte boundary
9248 * because the 7 lower bits of the address are used by the
9249 * hardware.
9250 */
9251 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9252 IOACCEL1_COMMANDLIST_ALIGNMENT);
9253 h->ioaccel_cmd_pool =
9254 pci_alloc_consistent(h->pdev,
9255 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9256 &(h->ioaccel_cmd_pool_dhandle));
9257
9258 h->ioaccel1_blockFetchTable =
9259 kmalloc(((h->ioaccel_maxsg + 1) *
9260 sizeof(u32)), GFP_KERNEL);
9261
9262 if ((h->ioaccel_cmd_pool == NULL) ||
9263 (h->ioaccel1_blockFetchTable == NULL))
9264 goto clean_up;
9265
9266 memset(h->ioaccel_cmd_pool, 0,
9267 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9268 return 0;
9269
9270 clean_up:
9271 hpsa_free_ioaccel1_cmd_and_bft(h);
9272 return -ENOMEM;
9273 }
9274
9275 /* Free ioaccel2 mode command blocks and block fetch table */
9276 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9277 {
9278 hpsa_free_ioaccel2_sg_chain_blocks(h);
9279
9280 if (h->ioaccel2_cmd_pool) {
9281 pci_free_consistent(h->pdev,
9282 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9283 h->ioaccel2_cmd_pool,
9284 h->ioaccel2_cmd_pool_dhandle);
9285 h->ioaccel2_cmd_pool = NULL;
9286 h->ioaccel2_cmd_pool_dhandle = 0;
9287 }
9288 kfree(h->ioaccel2_blockFetchTable);
9289 h->ioaccel2_blockFetchTable = NULL;
9290 }
9291
9292 /* Allocate ioaccel2 mode command blocks and block fetch table */
9293 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9294 {
9295 int rc;
9296
9297 /* Allocate ioaccel2 mode command blocks and block fetch table */
9298
9299 h->ioaccel_maxsg =
9300 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9301 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9302 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9303
9304 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9305 IOACCEL2_COMMANDLIST_ALIGNMENT);
9306 h->ioaccel2_cmd_pool =
9307 pci_alloc_consistent(h->pdev,
9308 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9309 &(h->ioaccel2_cmd_pool_dhandle));
9310
9311 h->ioaccel2_blockFetchTable =
9312 kmalloc(((h->ioaccel_maxsg + 1) *
9313 sizeof(u32)), GFP_KERNEL);
9314
9315 if ((h->ioaccel2_cmd_pool == NULL) ||
9316 (h->ioaccel2_blockFetchTable == NULL)) {
9317 rc = -ENOMEM;
9318 goto clean_up;
9319 }
9320
9321 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9322 if (rc)
9323 goto clean_up;
9324
9325 memset(h->ioaccel2_cmd_pool, 0,
9326 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9327 return 0;
9328
9329 clean_up:
9330 hpsa_free_ioaccel2_cmd_and_bft(h);
9331 return rc;
9332 }
9333
9334 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9335 static void hpsa_free_performant_mode(struct ctlr_info *h)
9336 {
9337 kfree(h->blockFetchTable);
9338 h->blockFetchTable = NULL;
9339 hpsa_free_reply_queues(h);
9340 hpsa_free_ioaccel1_cmd_and_bft(h);
9341 hpsa_free_ioaccel2_cmd_and_bft(h);
9342 }
9343
9344 /* return -ENODEV on error, 0 on success (or no action)
9345 * allocates numerous items that must be freed later
9346 */
9347 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
9348 {
9349 u32 trans_support;
9350 unsigned long transMethod = CFGTBL_Trans_Performant |
9351 CFGTBL_Trans_use_short_tags;
9352 int i, rc;
9353
9354 if (hpsa_simple_mode)
9355 return 0;
9356
9357 trans_support = readl(&(h->cfgtable->TransportSupport));
9358 if (!(trans_support & PERFORMANT_MODE))
9359 return 0;
9360
9361 /* Check for I/O accelerator mode support */
9362 if (trans_support & CFGTBL_Trans_io_accel1) {
9363 transMethod |= CFGTBL_Trans_io_accel1 |
9364 CFGTBL_Trans_enable_directed_msix;
9365 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9366 if (rc)
9367 return rc;
9368 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9369 transMethod |= CFGTBL_Trans_io_accel2 |
9370 CFGTBL_Trans_enable_directed_msix;
9371 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9372 if (rc)
9373 return rc;
9374 }
9375
9376 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
9377 hpsa_get_max_perf_mode_cmds(h);
9378 /* Performant mode ring buffer and supporting data structures */
9379 h->reply_queue_size = h->max_commands * sizeof(u64);
9380
9381 for (i = 0; i < h->nreply_queues; i++) {
9382 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
9383 h->reply_queue_size,
9384 &(h->reply_queue[i].busaddr));
9385 if (!h->reply_queue[i].head) {
9386 rc = -ENOMEM;
9387 goto clean1; /* rq, ioaccel */
9388 }
9389 h->reply_queue[i].size = h->max_commands;
9390 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
9391 h->reply_queue[i].current_entry = 0;
9392 }
9393
9394 /* Need a block fetch table for performant mode */
9395 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9396 sizeof(u32)), GFP_KERNEL);
9397 if (!h->blockFetchTable) {
9398 rc = -ENOMEM;
9399 goto clean1; /* rq, ioaccel */
9400 }
9401
9402 rc = hpsa_enter_performant_mode(h, trans_support);
9403 if (rc)
9404 goto clean2; /* bft, rq, ioaccel */
9405 return 0;
9406
9407 clean2: /* bft, rq, ioaccel */
9408 kfree(h->blockFetchTable);
9409 h->blockFetchTable = NULL;
9410 clean1: /* rq, ioaccel */
9411 hpsa_free_reply_queues(h);
9412 hpsa_free_ioaccel1_cmd_and_bft(h);
9413 hpsa_free_ioaccel2_cmd_and_bft(h);
9414 return rc;
9415 }
9416
9417 static int is_accelerated_cmd(struct CommandList *c)
9418 {
9419 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9420 }
9421
9422 static void hpsa_drain_accel_commands(struct ctlr_info *h)
9423 {
9424 struct CommandList *c = NULL;
9425 int i, accel_cmds_out;
9426 int refcount;
9427
9428 do { /* wait for all outstanding ioaccel commands to drain out */
9429 accel_cmds_out = 0;
9430 for (i = 0; i < h->nr_cmds; i++) {
9431 c = h->cmd_pool + i;
9432 refcount = atomic_inc_return(&c->refcount);
9433 if (refcount > 1) /* Command is allocated */
9434 accel_cmds_out += is_accelerated_cmd(c);
9435 cmd_free(h, c);
9436 }
9437 if (accel_cmds_out <= 0)
9438 break;
9439 msleep(100);
9440 } while (1);
9441 }
9442
9443 static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9444 struct hpsa_sas_port *hpsa_sas_port)
9445 {
9446 struct hpsa_sas_phy *hpsa_sas_phy;
9447 struct sas_phy *phy;
9448
9449 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9450 if (!hpsa_sas_phy)
9451 return NULL;
9452
9453 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9454 hpsa_sas_port->next_phy_index);
9455 if (!phy) {
9456 kfree(hpsa_sas_phy);
9457 return NULL;
9458 }
9459
9460 hpsa_sas_port->next_phy_index++;
9461 hpsa_sas_phy->phy = phy;
9462 hpsa_sas_phy->parent_port = hpsa_sas_port;
9463
9464 return hpsa_sas_phy;
9465 }
9466
9467 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9468 {
9469 struct sas_phy *phy = hpsa_sas_phy->phy;
9470
9471 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9472 if (hpsa_sas_phy->added_to_port)
9473 list_del(&hpsa_sas_phy->phy_list_entry);
9474 sas_phy_delete(phy);
9475 kfree(hpsa_sas_phy);
9476 }
9477
9478 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9479 {
9480 int rc;
9481 struct hpsa_sas_port *hpsa_sas_port;
9482 struct sas_phy *phy;
9483 struct sas_identify *identify;
9484
9485 hpsa_sas_port = hpsa_sas_phy->parent_port;
9486 phy = hpsa_sas_phy->phy;
9487
9488 identify = &phy->identify;
9489 memset(identify, 0, sizeof(*identify));
9490 identify->sas_address = hpsa_sas_port->sas_address;
9491 identify->device_type = SAS_END_DEVICE;
9492 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9493 identify->target_port_protocols = SAS_PROTOCOL_STP;
9494 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9495 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9496 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9497 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9498 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9499
9500 rc = sas_phy_add(hpsa_sas_phy->phy);
9501 if (rc)
9502 return rc;
9503
9504 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9505 list_add_tail(&hpsa_sas_phy->phy_list_entry,
9506 &hpsa_sas_port->phy_list_head);
9507 hpsa_sas_phy->added_to_port = true;
9508
9509 return 0;
9510 }
9511
9512 static int
9513 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9514 struct sas_rphy *rphy)
9515 {
9516 struct sas_identify *identify;
9517
9518 identify = &rphy->identify;
9519 identify->sas_address = hpsa_sas_port->sas_address;
9520 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9521 identify->target_port_protocols = SAS_PROTOCOL_STP;
9522
9523 return sas_rphy_add(rphy);
9524 }
9525
9526 static struct hpsa_sas_port
9527 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9528 u64 sas_address)
9529 {
9530 int rc;
9531 struct hpsa_sas_port *hpsa_sas_port;
9532 struct sas_port *port;
9533
9534 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9535 if (!hpsa_sas_port)
9536 return NULL;
9537
9538 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9539 hpsa_sas_port->parent_node = hpsa_sas_node;
9540
9541 port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9542 if (!port)
9543 goto free_hpsa_port;
9544
9545 rc = sas_port_add(port);
9546 if (rc)
9547 goto free_sas_port;
9548
9549 hpsa_sas_port->port = port;
9550 hpsa_sas_port->sas_address = sas_address;
9551 list_add_tail(&hpsa_sas_port->port_list_entry,
9552 &hpsa_sas_node->port_list_head);
9553
9554 return hpsa_sas_port;
9555
9556 free_sas_port:
9557 sas_port_free(port);
9558 free_hpsa_port:
9559 kfree(hpsa_sas_port);
9560
9561 return NULL;
9562 }
9563
9564 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9565 {
9566 struct hpsa_sas_phy *hpsa_sas_phy;
9567 struct hpsa_sas_phy *next;
9568
9569 list_for_each_entry_safe(hpsa_sas_phy, next,
9570 &hpsa_sas_port->phy_list_head, phy_list_entry)
9571 hpsa_free_sas_phy(hpsa_sas_phy);
9572
9573 sas_port_delete(hpsa_sas_port->port);
9574 list_del(&hpsa_sas_port->port_list_entry);
9575 kfree(hpsa_sas_port);
9576 }
9577
9578 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9579 {
9580 struct hpsa_sas_node *hpsa_sas_node;
9581
9582 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9583 if (hpsa_sas_node) {
9584 hpsa_sas_node->parent_dev = parent_dev;
9585 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9586 }
9587
9588 return hpsa_sas_node;
9589 }
9590
9591 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9592 {
9593 struct hpsa_sas_port *hpsa_sas_port;
9594 struct hpsa_sas_port *next;
9595
9596 if (!hpsa_sas_node)
9597 return;
9598
9599 list_for_each_entry_safe(hpsa_sas_port, next,
9600 &hpsa_sas_node->port_list_head, port_list_entry)
9601 hpsa_free_sas_port(hpsa_sas_port);
9602
9603 kfree(hpsa_sas_node);
9604 }
9605
9606 static struct hpsa_scsi_dev_t
9607 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9608 struct sas_rphy *rphy)
9609 {
9610 int i;
9611 struct hpsa_scsi_dev_t *device;
9612
9613 for (i = 0; i < h->ndevices; i++) {
9614 device = h->dev[i];
9615 if (!device->sas_port)
9616 continue;
9617 if (device->sas_port->rphy == rphy)
9618 return device;
9619 }
9620
9621 return NULL;
9622 }
9623
9624 static int hpsa_add_sas_host(struct ctlr_info *h)
9625 {
9626 int rc;
9627 struct device *parent_dev;
9628 struct hpsa_sas_node *hpsa_sas_node;
9629 struct hpsa_sas_port *hpsa_sas_port;
9630 struct hpsa_sas_phy *hpsa_sas_phy;
9631
9632 parent_dev = &h->scsi_host->shost_dev;
9633
9634 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9635 if (!hpsa_sas_node)
9636 return -ENOMEM;
9637
9638 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9639 if (!hpsa_sas_port) {
9640 rc = -ENODEV;
9641 goto free_sas_node;
9642 }
9643
9644 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9645 if (!hpsa_sas_phy) {
9646 rc = -ENODEV;
9647 goto free_sas_port;
9648 }
9649
9650 rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9651 if (rc)
9652 goto free_sas_phy;
9653
9654 h->sas_host = hpsa_sas_node;
9655
9656 return 0;
9657
9658 free_sas_phy:
9659 hpsa_free_sas_phy(hpsa_sas_phy);
9660 free_sas_port:
9661 hpsa_free_sas_port(hpsa_sas_port);
9662 free_sas_node:
9663 hpsa_free_sas_node(hpsa_sas_node);
9664
9665 return rc;
9666 }
9667
9668 static void hpsa_delete_sas_host(struct ctlr_info *h)
9669 {
9670 hpsa_free_sas_node(h->sas_host);
9671 }
9672
9673 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9674 struct hpsa_scsi_dev_t *device)
9675 {
9676 int rc;
9677 struct hpsa_sas_port *hpsa_sas_port;
9678 struct sas_rphy *rphy;
9679
9680 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9681 if (!hpsa_sas_port)
9682 return -ENOMEM;
9683
9684 rphy = sas_end_device_alloc(hpsa_sas_port->port);
9685 if (!rphy) {
9686 rc = -ENODEV;
9687 goto free_sas_port;
9688 }
9689
9690 hpsa_sas_port->rphy = rphy;
9691 device->sas_port = hpsa_sas_port;
9692
9693 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9694 if (rc)
9695 goto free_sas_port;
9696
9697 return 0;
9698
9699 free_sas_port:
9700 hpsa_free_sas_port(hpsa_sas_port);
9701 device->sas_port = NULL;
9702
9703 return rc;
9704 }
9705
9706 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9707 {
9708 if (device->sas_port) {
9709 hpsa_free_sas_port(device->sas_port);
9710 device->sas_port = NULL;
9711 }
9712 }
9713
9714 static int
9715 hpsa_sas_get_linkerrors(struct sas_phy *phy)
9716 {
9717 return 0;
9718 }
9719
9720 static int
9721 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9722 {
9723 struct Scsi_Host *shost = phy_to_shost(rphy);
9724 struct ctlr_info *h;
9725 struct hpsa_scsi_dev_t *sd;
9726
9727 if (!shost)
9728 return -ENXIO;
9729
9730 h = shost_to_hba(shost);
9731
9732 if (!h)
9733 return -ENXIO;
9734
9735 sd = hpsa_find_device_by_sas_rphy(h, rphy);
9736 if (!sd)
9737 return -ENXIO;
9738
9739 *identifier = sd->eli;
9740
9741 return 0;
9742 }
9743
9744 static int
9745 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9746 {
9747 return -ENXIO;
9748 }
9749
9750 static int
9751 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9752 {
9753 return 0;
9754 }
9755
9756 static int
9757 hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9758 {
9759 return 0;
9760 }
9761
9762 static int
9763 hpsa_sas_phy_setup(struct sas_phy *phy)
9764 {
9765 return 0;
9766 }
9767
9768 static void
9769 hpsa_sas_phy_release(struct sas_phy *phy)
9770 {
9771 }
9772
9773 static int
9774 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9775 {
9776 return -EINVAL;
9777 }
9778
9779 static struct sas_function_template hpsa_sas_transport_functions = {
9780 .get_linkerrors = hpsa_sas_get_linkerrors,
9781 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9782 .get_bay_identifier = hpsa_sas_get_bay_identifier,
9783 .phy_reset = hpsa_sas_phy_reset,
9784 .phy_enable = hpsa_sas_phy_enable,
9785 .phy_setup = hpsa_sas_phy_setup,
9786 .phy_release = hpsa_sas_phy_release,
9787 .set_phy_speed = hpsa_sas_phy_speed,
9788 };
9789
9790 /*
9791 * This is it. Register the PCI driver information for the cards we control
9792 * the OS will call our registered routines when it finds one of our cards.
9793 */
9794 static int __init hpsa_init(void)
9795 {
9796 int rc;
9797
9798 hpsa_sas_transport_template =
9799 sas_attach_transport(&hpsa_sas_transport_functions);
9800 if (!hpsa_sas_transport_template)
9801 return -ENODEV;
9802
9803 rc = pci_register_driver(&hpsa_pci_driver);
9804
9805 if (rc)
9806 sas_release_transport(hpsa_sas_transport_template);
9807
9808 return rc;
9809 }
9810
9811 static void __exit hpsa_cleanup(void)
9812 {
9813 pci_unregister_driver(&hpsa_pci_driver);
9814 sas_release_transport(hpsa_sas_transport_template);
9815 }
9816
9817 static void __attribute__((unused)) verify_offsets(void)
9818 {
9819 #define VERIFY_OFFSET(member, offset) \
9820 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9821
9822 VERIFY_OFFSET(structure_size, 0);
9823 VERIFY_OFFSET(volume_blk_size, 4);
9824 VERIFY_OFFSET(volume_blk_cnt, 8);
9825 VERIFY_OFFSET(phys_blk_shift, 16);
9826 VERIFY_OFFSET(parity_rotation_shift, 17);
9827 VERIFY_OFFSET(strip_size, 18);
9828 VERIFY_OFFSET(disk_starting_blk, 20);
9829 VERIFY_OFFSET(disk_blk_cnt, 28);
9830 VERIFY_OFFSET(data_disks_per_row, 36);
9831 VERIFY_OFFSET(metadata_disks_per_row, 38);
9832 VERIFY_OFFSET(row_cnt, 40);
9833 VERIFY_OFFSET(layout_map_count, 42);
9834 VERIFY_OFFSET(flags, 44);
9835 VERIFY_OFFSET(dekindex, 46);
9836 /* VERIFY_OFFSET(reserved, 48 */
9837 VERIFY_OFFSET(data, 64);
9838
9839 #undef VERIFY_OFFSET
9840
9841 #define VERIFY_OFFSET(member, offset) \
9842 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9843
9844 VERIFY_OFFSET(IU_type, 0);
9845 VERIFY_OFFSET(direction, 1);
9846 VERIFY_OFFSET(reply_queue, 2);
9847 /* VERIFY_OFFSET(reserved1, 3); */
9848 VERIFY_OFFSET(scsi_nexus, 4);
9849 VERIFY_OFFSET(Tag, 8);
9850 VERIFY_OFFSET(cdb, 16);
9851 VERIFY_OFFSET(cciss_lun, 32);
9852 VERIFY_OFFSET(data_len, 40);
9853 VERIFY_OFFSET(cmd_priority_task_attr, 44);
9854 VERIFY_OFFSET(sg_count, 45);
9855 /* VERIFY_OFFSET(reserved3 */
9856 VERIFY_OFFSET(err_ptr, 48);
9857 VERIFY_OFFSET(err_len, 56);
9858 /* VERIFY_OFFSET(reserved4 */
9859 VERIFY_OFFSET(sg, 64);
9860
9861 #undef VERIFY_OFFSET
9862
9863 #define VERIFY_OFFSET(member, offset) \
9864 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9865
9866 VERIFY_OFFSET(dev_handle, 0x00);
9867 VERIFY_OFFSET(reserved1, 0x02);
9868 VERIFY_OFFSET(function, 0x03);
9869 VERIFY_OFFSET(reserved2, 0x04);
9870 VERIFY_OFFSET(err_info, 0x0C);
9871 VERIFY_OFFSET(reserved3, 0x10);
9872 VERIFY_OFFSET(err_info_len, 0x12);
9873 VERIFY_OFFSET(reserved4, 0x13);
9874 VERIFY_OFFSET(sgl_offset, 0x14);
9875 VERIFY_OFFSET(reserved5, 0x15);
9876 VERIFY_OFFSET(transfer_len, 0x1C);
9877 VERIFY_OFFSET(reserved6, 0x20);
9878 VERIFY_OFFSET(io_flags, 0x24);
9879 VERIFY_OFFSET(reserved7, 0x26);
9880 VERIFY_OFFSET(LUN, 0x34);
9881 VERIFY_OFFSET(control, 0x3C);
9882 VERIFY_OFFSET(CDB, 0x40);
9883 VERIFY_OFFSET(reserved8, 0x50);
9884 VERIFY_OFFSET(host_context_flags, 0x60);
9885 VERIFY_OFFSET(timeout_sec, 0x62);
9886 VERIFY_OFFSET(ReplyQueue, 0x64);
9887 VERIFY_OFFSET(reserved9, 0x65);
9888 VERIFY_OFFSET(tag, 0x68);
9889 VERIFY_OFFSET(host_addr, 0x70);
9890 VERIFY_OFFSET(CISS_LUN, 0x78);
9891 VERIFY_OFFSET(SG, 0x78 + 8);
9892 #undef VERIFY_OFFSET
9893 }
9894
9895 module_init(hpsa_init);
9896 module_exit(hpsa_cleanup);
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