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[mirror_ubuntu-bionic-kernel.git] / drivers / scsi / hpsa.c
1 /*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2016 Microsemi Corporation
4 * Copyright 2014-2015 PMC-Sierra, Inc.
5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14 * NON INFRINGEMENT. See the GNU General Public License for more details.
15 *
16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
17 *
18 */
19
20 #include <linux/module.h>
21 #include <linux/interrupt.h>
22 #include <linux/types.h>
23 #include <linux/pci.h>
24 #include <linux/pci-aspm.h>
25 #include <linux/kernel.h>
26 #include <linux/slab.h>
27 #include <linux/delay.h>
28 #include <linux/fs.h>
29 #include <linux/timer.h>
30 #include <linux/init.h>
31 #include <linux/spinlock.h>
32 #include <linux/compat.h>
33 #include <linux/blktrace_api.h>
34 #include <linux/uaccess.h>
35 #include <linux/io.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/completion.h>
38 #include <linux/moduleparam.h>
39 #include <scsi/scsi.h>
40 #include <scsi/scsi_cmnd.h>
41 #include <scsi/scsi_device.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_tcq.h>
44 #include <scsi/scsi_eh.h>
45 #include <scsi/scsi_transport_sas.h>
46 #include <scsi/scsi_dbg.h>
47 #include <linux/cciss_ioctl.h>
48 #include <linux/string.h>
49 #include <linux/bitmap.h>
50 #include <linux/atomic.h>
51 #include <linux/jiffies.h>
52 #include <linux/percpu-defs.h>
53 #include <linux/percpu.h>
54 #include <asm/unaligned.h>
55 #include <asm/div64.h>
56 #include "hpsa_cmd.h"
57 #include "hpsa.h"
58
59 /*
60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
61 * with an optional trailing '-' followed by a byte value (0-255).
62 */
63 #define HPSA_DRIVER_VERSION "3.4.16-0"
64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
65 #define HPSA "hpsa"
66
67 /* How long to wait for CISS doorbell communication */
68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */
69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */
70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */
71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */
72 #define MAX_IOCTL_CONFIG_WAIT 1000
73
74 /*define how many times we will try a command because of bus resets */
75 #define MAX_CMD_RETRIES 3
76
77 /* Embedded module documentation macros - see modules.h */
78 MODULE_AUTHOR("Hewlett-Packard Company");
79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
80 HPSA_DRIVER_VERSION);
81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
82 MODULE_VERSION(HPSA_DRIVER_VERSION);
83 MODULE_LICENSE("GPL");
84
85 static int hpsa_allow_any;
86 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
87 MODULE_PARM_DESC(hpsa_allow_any,
88 "Allow hpsa driver to access unknown HP Smart Array hardware");
89 static int hpsa_simple_mode;
90 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
91 MODULE_PARM_DESC(hpsa_simple_mode,
92 "Use 'simple mode' rather than 'performant mode'");
93
94 /* define the PCI info for the cards we can control */
95 static const struct pci_device_id hpsa_pci_device_id[] = {
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6},
128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA},
132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB},
133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC},
134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD},
135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE},
136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
146 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
147 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
148 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
149 {0,}
150 };
151
152 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
153
154 /* board_id = Subsystem Device ID & Vendor ID
155 * product = Marketing Name for the board
156 * access = Address of the struct of function pointers
157 */
158 static struct board_type products[] = {
159 {0x3241103C, "Smart Array P212", &SA5_access},
160 {0x3243103C, "Smart Array P410", &SA5_access},
161 {0x3245103C, "Smart Array P410i", &SA5_access},
162 {0x3247103C, "Smart Array P411", &SA5_access},
163 {0x3249103C, "Smart Array P812", &SA5_access},
164 {0x324A103C, "Smart Array P712m", &SA5_access},
165 {0x324B103C, "Smart Array P711m", &SA5_access},
166 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
167 {0x3350103C, "Smart Array P222", &SA5_access},
168 {0x3351103C, "Smart Array P420", &SA5_access},
169 {0x3352103C, "Smart Array P421", &SA5_access},
170 {0x3353103C, "Smart Array P822", &SA5_access},
171 {0x3354103C, "Smart Array P420i", &SA5_access},
172 {0x3355103C, "Smart Array P220i", &SA5_access},
173 {0x3356103C, "Smart Array P721m", &SA5_access},
174 {0x1921103C, "Smart Array P830i", &SA5_access},
175 {0x1922103C, "Smart Array P430", &SA5_access},
176 {0x1923103C, "Smart Array P431", &SA5_access},
177 {0x1924103C, "Smart Array P830", &SA5_access},
178 {0x1926103C, "Smart Array P731m", &SA5_access},
179 {0x1928103C, "Smart Array P230i", &SA5_access},
180 {0x1929103C, "Smart Array P530", &SA5_access},
181 {0x21BD103C, "Smart Array P244br", &SA5_access},
182 {0x21BE103C, "Smart Array P741m", &SA5_access},
183 {0x21BF103C, "Smart HBA H240ar", &SA5_access},
184 {0x21C0103C, "Smart Array P440ar", &SA5_access},
185 {0x21C1103C, "Smart Array P840ar", &SA5_access},
186 {0x21C2103C, "Smart Array P440", &SA5_access},
187 {0x21C3103C, "Smart Array P441", &SA5_access},
188 {0x21C4103C, "Smart Array", &SA5_access},
189 {0x21C5103C, "Smart Array P841", &SA5_access},
190 {0x21C6103C, "Smart HBA H244br", &SA5_access},
191 {0x21C7103C, "Smart HBA H240", &SA5_access},
192 {0x21C8103C, "Smart HBA H241", &SA5_access},
193 {0x21C9103C, "Smart Array", &SA5_access},
194 {0x21CA103C, "Smart Array P246br", &SA5_access},
195 {0x21CB103C, "Smart Array P840", &SA5_access},
196 {0x21CC103C, "Smart Array", &SA5_access},
197 {0x21CD103C, "Smart Array", &SA5_access},
198 {0x21CE103C, "Smart HBA", &SA5_access},
199 {0x05809005, "SmartHBA-SA", &SA5_access},
200 {0x05819005, "SmartHBA-SA 8i", &SA5_access},
201 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
202 {0x05839005, "SmartHBA-SA 8e", &SA5_access},
203 {0x05849005, "SmartHBA-SA 16i", &SA5_access},
204 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
205 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
206 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
207 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
208 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
209 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
210 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
211 };
212
213 static struct scsi_transport_template *hpsa_sas_transport_template;
214 static int hpsa_add_sas_host(struct ctlr_info *h);
215 static void hpsa_delete_sas_host(struct ctlr_info *h);
216 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
217 struct hpsa_scsi_dev_t *device);
218 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
219 static struct hpsa_scsi_dev_t
220 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
221 struct sas_rphy *rphy);
222
223 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
224 static const struct scsi_cmnd hpsa_cmd_busy;
225 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
226 static const struct scsi_cmnd hpsa_cmd_idle;
227 static int number_of_controllers;
228
229 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
230 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
231 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
232
233 #ifdef CONFIG_COMPAT
234 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
235 void __user *arg);
236 #endif
237
238 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
239 static struct CommandList *cmd_alloc(struct ctlr_info *h);
240 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
241 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
242 struct scsi_cmnd *scmd);
243 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
244 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
245 int cmd_type);
246 static void hpsa_free_cmd_pool(struct ctlr_info *h);
247 #define VPD_PAGE (1 << 8)
248 #define HPSA_SIMPLE_ERROR_BITS 0x03
249
250 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
251 static void hpsa_scan_start(struct Scsi_Host *);
252 static int hpsa_scan_finished(struct Scsi_Host *sh,
253 unsigned long elapsed_time);
254 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
255
256 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
257 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
258 static int hpsa_slave_alloc(struct scsi_device *sdev);
259 static int hpsa_slave_configure(struct scsi_device *sdev);
260 static void hpsa_slave_destroy(struct scsi_device *sdev);
261
262 static void hpsa_update_scsi_devices(struct ctlr_info *h);
263 static int check_for_unit_attention(struct ctlr_info *h,
264 struct CommandList *c);
265 static void check_ioctl_unit_attention(struct ctlr_info *h,
266 struct CommandList *c);
267 /* performant mode helper functions */
268 static void calc_bucket_map(int *bucket, int num_buckets,
269 int nsgs, int min_blocks, u32 *bucket_map);
270 static void hpsa_free_performant_mode(struct ctlr_info *h);
271 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
272 static inline u32 next_command(struct ctlr_info *h, u8 q);
273 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
274 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
275 u64 *cfg_offset);
276 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
277 unsigned long *memory_bar);
278 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
279 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
280 int wait_for_ready);
281 static inline void finish_cmd(struct CommandList *c);
282 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
283 #define BOARD_NOT_READY 0
284 #define BOARD_READY 1
285 static void hpsa_drain_accel_commands(struct ctlr_info *h);
286 static void hpsa_flush_cache(struct ctlr_info *h);
287 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
288 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
289 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
290 static void hpsa_command_resubmit_worker(struct work_struct *work);
291 static u32 lockup_detected(struct ctlr_info *h);
292 static int detect_controller_lockup(struct ctlr_info *h);
293 static void hpsa_disable_rld_caching(struct ctlr_info *h);
294 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
295 struct ReportExtendedLUNdata *buf, int bufsize);
296 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
297 unsigned char scsi3addr[], u8 page);
298 static int hpsa_luns_changed(struct ctlr_info *h);
299 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
300 struct hpsa_scsi_dev_t *dev,
301 unsigned char *scsi3addr);
302
303 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
304 {
305 unsigned long *priv = shost_priv(sdev->host);
306 return (struct ctlr_info *) *priv;
307 }
308
309 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
310 {
311 unsigned long *priv = shost_priv(sh);
312 return (struct ctlr_info *) *priv;
313 }
314
315 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
316 {
317 return c->scsi_cmd == SCSI_CMD_IDLE;
318 }
319
320 static inline bool hpsa_is_pending_event(struct CommandList *c)
321 {
322 return c->abort_pending || c->reset_pending;
323 }
324
325 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */
326 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
327 u8 *sense_key, u8 *asc, u8 *ascq)
328 {
329 struct scsi_sense_hdr sshdr;
330 bool rc;
331
332 *sense_key = -1;
333 *asc = -1;
334 *ascq = -1;
335
336 if (sense_data_len < 1)
337 return;
338
339 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
340 if (rc) {
341 *sense_key = sshdr.sense_key;
342 *asc = sshdr.asc;
343 *ascq = sshdr.ascq;
344 }
345 }
346
347 static int check_for_unit_attention(struct ctlr_info *h,
348 struct CommandList *c)
349 {
350 u8 sense_key, asc, ascq;
351 int sense_len;
352
353 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
354 sense_len = sizeof(c->err_info->SenseInfo);
355 else
356 sense_len = c->err_info->SenseLen;
357
358 decode_sense_data(c->err_info->SenseInfo, sense_len,
359 &sense_key, &asc, &ascq);
360 if (sense_key != UNIT_ATTENTION || asc == 0xff)
361 return 0;
362
363 switch (asc) {
364 case STATE_CHANGED:
365 dev_warn(&h->pdev->dev,
366 "%s: a state change detected, command retried\n",
367 h->devname);
368 break;
369 case LUN_FAILED:
370 dev_warn(&h->pdev->dev,
371 "%s: LUN failure detected\n", h->devname);
372 break;
373 case REPORT_LUNS_CHANGED:
374 dev_warn(&h->pdev->dev,
375 "%s: report LUN data changed\n", h->devname);
376 /*
377 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
378 * target (array) devices.
379 */
380 break;
381 case POWER_OR_RESET:
382 dev_warn(&h->pdev->dev,
383 "%s: a power on or device reset detected\n",
384 h->devname);
385 break;
386 case UNIT_ATTENTION_CLEARED:
387 dev_warn(&h->pdev->dev,
388 "%s: unit attention cleared by another initiator\n",
389 h->devname);
390 break;
391 default:
392 dev_warn(&h->pdev->dev,
393 "%s: unknown unit attention detected\n",
394 h->devname);
395 break;
396 }
397 return 1;
398 }
399
400 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
401 {
402 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
403 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
404 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
405 return 0;
406 dev_warn(&h->pdev->dev, HPSA "device busy");
407 return 1;
408 }
409
410 static u32 lockup_detected(struct ctlr_info *h);
411 static ssize_t host_show_lockup_detected(struct device *dev,
412 struct device_attribute *attr, char *buf)
413 {
414 int ld;
415 struct ctlr_info *h;
416 struct Scsi_Host *shost = class_to_shost(dev);
417
418 h = shost_to_hba(shost);
419 ld = lockup_detected(h);
420
421 return sprintf(buf, "ld=%d\n", ld);
422 }
423
424 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
425 struct device_attribute *attr,
426 const char *buf, size_t count)
427 {
428 int status, len;
429 struct ctlr_info *h;
430 struct Scsi_Host *shost = class_to_shost(dev);
431 char tmpbuf[10];
432
433 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
434 return -EACCES;
435 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
436 strncpy(tmpbuf, buf, len);
437 tmpbuf[len] = '\0';
438 if (sscanf(tmpbuf, "%d", &status) != 1)
439 return -EINVAL;
440 h = shost_to_hba(shost);
441 h->acciopath_status = !!status;
442 dev_warn(&h->pdev->dev,
443 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
444 h->acciopath_status ? "enabled" : "disabled");
445 return count;
446 }
447
448 static ssize_t host_store_raid_offload_debug(struct device *dev,
449 struct device_attribute *attr,
450 const char *buf, size_t count)
451 {
452 int debug_level, len;
453 struct ctlr_info *h;
454 struct Scsi_Host *shost = class_to_shost(dev);
455 char tmpbuf[10];
456
457 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
458 return -EACCES;
459 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
460 strncpy(tmpbuf, buf, len);
461 tmpbuf[len] = '\0';
462 if (sscanf(tmpbuf, "%d", &debug_level) != 1)
463 return -EINVAL;
464 if (debug_level < 0)
465 debug_level = 0;
466 h = shost_to_hba(shost);
467 h->raid_offload_debug = debug_level;
468 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
469 h->raid_offload_debug);
470 return count;
471 }
472
473 static ssize_t host_store_rescan(struct device *dev,
474 struct device_attribute *attr,
475 const char *buf, size_t count)
476 {
477 struct ctlr_info *h;
478 struct Scsi_Host *shost = class_to_shost(dev);
479 h = shost_to_hba(shost);
480 hpsa_scan_start(h->scsi_host);
481 return count;
482 }
483
484 static ssize_t host_show_firmware_revision(struct device *dev,
485 struct device_attribute *attr, char *buf)
486 {
487 struct ctlr_info *h;
488 struct Scsi_Host *shost = class_to_shost(dev);
489 unsigned char *fwrev;
490
491 h = shost_to_hba(shost);
492 if (!h->hba_inquiry_data)
493 return 0;
494 fwrev = &h->hba_inquiry_data[32];
495 return snprintf(buf, 20, "%c%c%c%c\n",
496 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
497 }
498
499 static ssize_t host_show_commands_outstanding(struct device *dev,
500 struct device_attribute *attr, char *buf)
501 {
502 struct Scsi_Host *shost = class_to_shost(dev);
503 struct ctlr_info *h = shost_to_hba(shost);
504
505 return snprintf(buf, 20, "%d\n",
506 atomic_read(&h->commands_outstanding));
507 }
508
509 static ssize_t host_show_transport_mode(struct device *dev,
510 struct device_attribute *attr, char *buf)
511 {
512 struct ctlr_info *h;
513 struct Scsi_Host *shost = class_to_shost(dev);
514
515 h = shost_to_hba(shost);
516 return snprintf(buf, 20, "%s\n",
517 h->transMethod & CFGTBL_Trans_Performant ?
518 "performant" : "simple");
519 }
520
521 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
522 struct device_attribute *attr, char *buf)
523 {
524 struct ctlr_info *h;
525 struct Scsi_Host *shost = class_to_shost(dev);
526
527 h = shost_to_hba(shost);
528 return snprintf(buf, 30, "HP SSD Smart Path %s\n",
529 (h->acciopath_status == 1) ? "enabled" : "disabled");
530 }
531
532 /* List of controllers which cannot be hard reset on kexec with reset_devices */
533 static u32 unresettable_controller[] = {
534 0x324a103C, /* Smart Array P712m */
535 0x324b103C, /* Smart Array P711m */
536 0x3223103C, /* Smart Array P800 */
537 0x3234103C, /* Smart Array P400 */
538 0x3235103C, /* Smart Array P400i */
539 0x3211103C, /* Smart Array E200i */
540 0x3212103C, /* Smart Array E200 */
541 0x3213103C, /* Smart Array E200i */
542 0x3214103C, /* Smart Array E200i */
543 0x3215103C, /* Smart Array E200i */
544 0x3237103C, /* Smart Array E500 */
545 0x323D103C, /* Smart Array P700m */
546 0x40800E11, /* Smart Array 5i */
547 0x409C0E11, /* Smart Array 6400 */
548 0x409D0E11, /* Smart Array 6400 EM */
549 0x40700E11, /* Smart Array 5300 */
550 0x40820E11, /* Smart Array 532 */
551 0x40830E11, /* Smart Array 5312 */
552 0x409A0E11, /* Smart Array 641 */
553 0x409B0E11, /* Smart Array 642 */
554 0x40910E11, /* Smart Array 6i */
555 };
556
557 /* List of controllers which cannot even be soft reset */
558 static u32 soft_unresettable_controller[] = {
559 0x40800E11, /* Smart Array 5i */
560 0x40700E11, /* Smart Array 5300 */
561 0x40820E11, /* Smart Array 532 */
562 0x40830E11, /* Smart Array 5312 */
563 0x409A0E11, /* Smart Array 641 */
564 0x409B0E11, /* Smart Array 642 */
565 0x40910E11, /* Smart Array 6i */
566 /* Exclude 640x boards. These are two pci devices in one slot
567 * which share a battery backed cache module. One controls the
568 * cache, the other accesses the cache through the one that controls
569 * it. If we reset the one controlling the cache, the other will
570 * likely not be happy. Just forbid resetting this conjoined mess.
571 * The 640x isn't really supported by hpsa anyway.
572 */
573 0x409C0E11, /* Smart Array 6400 */
574 0x409D0E11, /* Smart Array 6400 EM */
575 };
576
577 static u32 needs_abort_tags_swizzled[] = {
578 0x323D103C, /* Smart Array P700m */
579 0x324a103C, /* Smart Array P712m */
580 0x324b103C, /* SmartArray P711m */
581 };
582
583 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
584 {
585 int i;
586
587 for (i = 0; i < nelems; i++)
588 if (a[i] == board_id)
589 return 1;
590 return 0;
591 }
592
593 static int ctlr_is_hard_resettable(u32 board_id)
594 {
595 return !board_id_in_array(unresettable_controller,
596 ARRAY_SIZE(unresettable_controller), board_id);
597 }
598
599 static int ctlr_is_soft_resettable(u32 board_id)
600 {
601 return !board_id_in_array(soft_unresettable_controller,
602 ARRAY_SIZE(soft_unresettable_controller), board_id);
603 }
604
605 static int ctlr_is_resettable(u32 board_id)
606 {
607 return ctlr_is_hard_resettable(board_id) ||
608 ctlr_is_soft_resettable(board_id);
609 }
610
611 static int ctlr_needs_abort_tags_swizzled(u32 board_id)
612 {
613 return board_id_in_array(needs_abort_tags_swizzled,
614 ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
615 }
616
617 static ssize_t host_show_resettable(struct device *dev,
618 struct device_attribute *attr, char *buf)
619 {
620 struct ctlr_info *h;
621 struct Scsi_Host *shost = class_to_shost(dev);
622
623 h = shost_to_hba(shost);
624 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
625 }
626
627 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
628 {
629 return (scsi3addr[3] & 0xC0) == 0x40;
630 }
631
632 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
633 "1(+0)ADM", "UNKNOWN", "PHYS DRV"
634 };
635 #define HPSA_RAID_0 0
636 #define HPSA_RAID_4 1
637 #define HPSA_RAID_1 2 /* also used for RAID 10 */
638 #define HPSA_RAID_5 3 /* also used for RAID 50 */
639 #define HPSA_RAID_51 4
640 #define HPSA_RAID_6 5 /* also used for RAID 60 */
641 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
642 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
643 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
644
645 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
646 {
647 return !device->physical_device;
648 }
649
650 static ssize_t raid_level_show(struct device *dev,
651 struct device_attribute *attr, char *buf)
652 {
653 ssize_t l = 0;
654 unsigned char rlevel;
655 struct ctlr_info *h;
656 struct scsi_device *sdev;
657 struct hpsa_scsi_dev_t *hdev;
658 unsigned long flags;
659
660 sdev = to_scsi_device(dev);
661 h = sdev_to_hba(sdev);
662 spin_lock_irqsave(&h->lock, flags);
663 hdev = sdev->hostdata;
664 if (!hdev) {
665 spin_unlock_irqrestore(&h->lock, flags);
666 return -ENODEV;
667 }
668
669 /* Is this even a logical drive? */
670 if (!is_logical_device(hdev)) {
671 spin_unlock_irqrestore(&h->lock, flags);
672 l = snprintf(buf, PAGE_SIZE, "N/A\n");
673 return l;
674 }
675
676 rlevel = hdev->raid_level;
677 spin_unlock_irqrestore(&h->lock, flags);
678 if (rlevel > RAID_UNKNOWN)
679 rlevel = RAID_UNKNOWN;
680 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
681 return l;
682 }
683
684 static ssize_t lunid_show(struct device *dev,
685 struct device_attribute *attr, char *buf)
686 {
687 struct ctlr_info *h;
688 struct scsi_device *sdev;
689 struct hpsa_scsi_dev_t *hdev;
690 unsigned long flags;
691 unsigned char lunid[8];
692
693 sdev = to_scsi_device(dev);
694 h = sdev_to_hba(sdev);
695 spin_lock_irqsave(&h->lock, flags);
696 hdev = sdev->hostdata;
697 if (!hdev) {
698 spin_unlock_irqrestore(&h->lock, flags);
699 return -ENODEV;
700 }
701 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
702 spin_unlock_irqrestore(&h->lock, flags);
703 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
704 lunid[0], lunid[1], lunid[2], lunid[3],
705 lunid[4], lunid[5], lunid[6], lunid[7]);
706 }
707
708 static ssize_t unique_id_show(struct device *dev,
709 struct device_attribute *attr, char *buf)
710 {
711 struct ctlr_info *h;
712 struct scsi_device *sdev;
713 struct hpsa_scsi_dev_t *hdev;
714 unsigned long flags;
715 unsigned char sn[16];
716
717 sdev = to_scsi_device(dev);
718 h = sdev_to_hba(sdev);
719 spin_lock_irqsave(&h->lock, flags);
720 hdev = sdev->hostdata;
721 if (!hdev) {
722 spin_unlock_irqrestore(&h->lock, flags);
723 return -ENODEV;
724 }
725 memcpy(sn, hdev->device_id, sizeof(sn));
726 spin_unlock_irqrestore(&h->lock, flags);
727 return snprintf(buf, 16 * 2 + 2,
728 "%02X%02X%02X%02X%02X%02X%02X%02X"
729 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
730 sn[0], sn[1], sn[2], sn[3],
731 sn[4], sn[5], sn[6], sn[7],
732 sn[8], sn[9], sn[10], sn[11],
733 sn[12], sn[13], sn[14], sn[15]);
734 }
735
736 static ssize_t sas_address_show(struct device *dev,
737 struct device_attribute *attr, char *buf)
738 {
739 struct ctlr_info *h;
740 struct scsi_device *sdev;
741 struct hpsa_scsi_dev_t *hdev;
742 unsigned long flags;
743 u64 sas_address;
744
745 sdev = to_scsi_device(dev);
746 h = sdev_to_hba(sdev);
747 spin_lock_irqsave(&h->lock, flags);
748 hdev = sdev->hostdata;
749 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
750 spin_unlock_irqrestore(&h->lock, flags);
751 return -ENODEV;
752 }
753 sas_address = hdev->sas_address;
754 spin_unlock_irqrestore(&h->lock, flags);
755
756 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
757 }
758
759 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
760 struct device_attribute *attr, char *buf)
761 {
762 struct ctlr_info *h;
763 struct scsi_device *sdev;
764 struct hpsa_scsi_dev_t *hdev;
765 unsigned long flags;
766 int offload_enabled;
767
768 sdev = to_scsi_device(dev);
769 h = sdev_to_hba(sdev);
770 spin_lock_irqsave(&h->lock, flags);
771 hdev = sdev->hostdata;
772 if (!hdev) {
773 spin_unlock_irqrestore(&h->lock, flags);
774 return -ENODEV;
775 }
776 offload_enabled = hdev->offload_enabled;
777 spin_unlock_irqrestore(&h->lock, flags);
778 return snprintf(buf, 20, "%d\n", offload_enabled);
779 }
780
781 #define MAX_PATHS 8
782 static ssize_t path_info_show(struct device *dev,
783 struct device_attribute *attr, char *buf)
784 {
785 struct ctlr_info *h;
786 struct scsi_device *sdev;
787 struct hpsa_scsi_dev_t *hdev;
788 unsigned long flags;
789 int i;
790 int output_len = 0;
791 u8 box;
792 u8 bay;
793 u8 path_map_index = 0;
794 char *active;
795 unsigned char phys_connector[2];
796
797 sdev = to_scsi_device(dev);
798 h = sdev_to_hba(sdev);
799 spin_lock_irqsave(&h->devlock, flags);
800 hdev = sdev->hostdata;
801 if (!hdev) {
802 spin_unlock_irqrestore(&h->devlock, flags);
803 return -ENODEV;
804 }
805
806 bay = hdev->bay;
807 for (i = 0; i < MAX_PATHS; i++) {
808 path_map_index = 1<<i;
809 if (i == hdev->active_path_index)
810 active = "Active";
811 else if (hdev->path_map & path_map_index)
812 active = "Inactive";
813 else
814 continue;
815
816 output_len += scnprintf(buf + output_len,
817 PAGE_SIZE - output_len,
818 "[%d:%d:%d:%d] %20.20s ",
819 h->scsi_host->host_no,
820 hdev->bus, hdev->target, hdev->lun,
821 scsi_device_type(hdev->devtype));
822
823 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
824 output_len += scnprintf(buf + output_len,
825 PAGE_SIZE - output_len,
826 "%s\n", active);
827 continue;
828 }
829
830 box = hdev->box[i];
831 memcpy(&phys_connector, &hdev->phys_connector[i],
832 sizeof(phys_connector));
833 if (phys_connector[0] < '0')
834 phys_connector[0] = '0';
835 if (phys_connector[1] < '0')
836 phys_connector[1] = '0';
837 output_len += scnprintf(buf + output_len,
838 PAGE_SIZE - output_len,
839 "PORT: %.2s ",
840 phys_connector);
841 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
842 hdev->expose_device) {
843 if (box == 0 || box == 0xFF) {
844 output_len += scnprintf(buf + output_len,
845 PAGE_SIZE - output_len,
846 "BAY: %hhu %s\n",
847 bay, active);
848 } else {
849 output_len += scnprintf(buf + output_len,
850 PAGE_SIZE - output_len,
851 "BOX: %hhu BAY: %hhu %s\n",
852 box, bay, active);
853 }
854 } else if (box != 0 && box != 0xFF) {
855 output_len += scnprintf(buf + output_len,
856 PAGE_SIZE - output_len, "BOX: %hhu %s\n",
857 box, active);
858 } else
859 output_len += scnprintf(buf + output_len,
860 PAGE_SIZE - output_len, "%s\n", active);
861 }
862
863 spin_unlock_irqrestore(&h->devlock, flags);
864 return output_len;
865 }
866
867 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
868 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
869 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
870 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
871 static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL);
872 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
873 host_show_hp_ssd_smart_path_enabled, NULL);
874 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL);
875 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
876 host_show_hp_ssd_smart_path_status,
877 host_store_hp_ssd_smart_path_status);
878 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
879 host_store_raid_offload_debug);
880 static DEVICE_ATTR(firmware_revision, S_IRUGO,
881 host_show_firmware_revision, NULL);
882 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
883 host_show_commands_outstanding, NULL);
884 static DEVICE_ATTR(transport_mode, S_IRUGO,
885 host_show_transport_mode, NULL);
886 static DEVICE_ATTR(resettable, S_IRUGO,
887 host_show_resettable, NULL);
888 static DEVICE_ATTR(lockup_detected, S_IRUGO,
889 host_show_lockup_detected, NULL);
890
891 static struct device_attribute *hpsa_sdev_attrs[] = {
892 &dev_attr_raid_level,
893 &dev_attr_lunid,
894 &dev_attr_unique_id,
895 &dev_attr_hp_ssd_smart_path_enabled,
896 &dev_attr_path_info,
897 &dev_attr_sas_address,
898 NULL,
899 };
900
901 static struct device_attribute *hpsa_shost_attrs[] = {
902 &dev_attr_rescan,
903 &dev_attr_firmware_revision,
904 &dev_attr_commands_outstanding,
905 &dev_attr_transport_mode,
906 &dev_attr_resettable,
907 &dev_attr_hp_ssd_smart_path_status,
908 &dev_attr_raid_offload_debug,
909 &dev_attr_lockup_detected,
910 NULL,
911 };
912
913 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \
914 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)
915
916 static struct scsi_host_template hpsa_driver_template = {
917 .module = THIS_MODULE,
918 .name = HPSA,
919 .proc_name = HPSA,
920 .queuecommand = hpsa_scsi_queue_command,
921 .scan_start = hpsa_scan_start,
922 .scan_finished = hpsa_scan_finished,
923 .change_queue_depth = hpsa_change_queue_depth,
924 .this_id = -1,
925 .use_clustering = ENABLE_CLUSTERING,
926 .eh_abort_handler = hpsa_eh_abort_handler,
927 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
928 .ioctl = hpsa_ioctl,
929 .slave_alloc = hpsa_slave_alloc,
930 .slave_configure = hpsa_slave_configure,
931 .slave_destroy = hpsa_slave_destroy,
932 #ifdef CONFIG_COMPAT
933 .compat_ioctl = hpsa_compat_ioctl,
934 #endif
935 .sdev_attrs = hpsa_sdev_attrs,
936 .shost_attrs = hpsa_shost_attrs,
937 .max_sectors = 8192,
938 .no_write_same = 1,
939 };
940
941 static inline u32 next_command(struct ctlr_info *h, u8 q)
942 {
943 u32 a;
944 struct reply_queue_buffer *rq = &h->reply_queue[q];
945
946 if (h->transMethod & CFGTBL_Trans_io_accel1)
947 return h->access.command_completed(h, q);
948
949 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
950 return h->access.command_completed(h, q);
951
952 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
953 a = rq->head[rq->current_entry];
954 rq->current_entry++;
955 atomic_dec(&h->commands_outstanding);
956 } else {
957 a = FIFO_EMPTY;
958 }
959 /* Check for wraparound */
960 if (rq->current_entry == h->max_commands) {
961 rq->current_entry = 0;
962 rq->wraparound ^= 1;
963 }
964 return a;
965 }
966
967 /*
968 * There are some special bits in the bus address of the
969 * command that we have to set for the controller to know
970 * how to process the command:
971 *
972 * Normal performant mode:
973 * bit 0: 1 means performant mode, 0 means simple mode.
974 * bits 1-3 = block fetch table entry
975 * bits 4-6 = command type (== 0)
976 *
977 * ioaccel1 mode:
978 * bit 0 = "performant mode" bit.
979 * bits 1-3 = block fetch table entry
980 * bits 4-6 = command type (== 110)
981 * (command type is needed because ioaccel1 mode
982 * commands are submitted through the same register as normal
983 * mode commands, so this is how the controller knows whether
984 * the command is normal mode or ioaccel1 mode.)
985 *
986 * ioaccel2 mode:
987 * bit 0 = "performant mode" bit.
988 * bits 1-4 = block fetch table entry (note extra bit)
989 * bits 4-6 = not needed, because ioaccel2 mode has
990 * a separate special register for submitting commands.
991 */
992
993 /*
994 * set_performant_mode: Modify the tag for cciss performant
995 * set bit 0 for pull model, bits 3-1 for block fetch
996 * register number
997 */
998 #define DEFAULT_REPLY_QUEUE (-1)
999 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
1000 int reply_queue)
1001 {
1002 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
1003 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1004 if (unlikely(!h->msix_vector))
1005 return;
1006 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1007 c->Header.ReplyQueue =
1008 raw_smp_processor_id() % h->nreply_queues;
1009 else
1010 c->Header.ReplyQueue = reply_queue % h->nreply_queues;
1011 }
1012 }
1013
1014 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
1015 struct CommandList *c,
1016 int reply_queue)
1017 {
1018 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1019
1020 /*
1021 * Tell the controller to post the reply to the queue for this
1022 * processor. This seems to give the best I/O throughput.
1023 */
1024 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1025 cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
1026 else
1027 cp->ReplyQueue = reply_queue % h->nreply_queues;
1028 /*
1029 * Set the bits in the address sent down to include:
1030 * - performant mode bit (bit 0)
1031 * - pull count (bits 1-3)
1032 * - command type (bits 4-6)
1033 */
1034 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1035 IOACCEL1_BUSADDR_CMDTYPE;
1036 }
1037
1038 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1039 struct CommandList *c,
1040 int reply_queue)
1041 {
1042 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1043 &h->ioaccel2_cmd_pool[c->cmdindex];
1044
1045 /* Tell the controller to post the reply to the queue for this
1046 * processor. This seems to give the best I/O throughput.
1047 */
1048 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1049 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1050 else
1051 cp->reply_queue = reply_queue % h->nreply_queues;
1052 /* Set the bits in the address sent down to include:
1053 * - performant mode bit not used in ioaccel mode 2
1054 * - pull count (bits 0-3)
1055 * - command type isn't needed for ioaccel2
1056 */
1057 c->busaddr |= h->ioaccel2_blockFetchTable[0];
1058 }
1059
1060 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1061 struct CommandList *c,
1062 int reply_queue)
1063 {
1064 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1065
1066 /*
1067 * Tell the controller to post the reply to the queue for this
1068 * processor. This seems to give the best I/O throughput.
1069 */
1070 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1071 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1072 else
1073 cp->reply_queue = reply_queue % h->nreply_queues;
1074 /*
1075 * Set the bits in the address sent down to include:
1076 * - performant mode bit not used in ioaccel mode 2
1077 * - pull count (bits 0-3)
1078 * - command type isn't needed for ioaccel2
1079 */
1080 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1081 }
1082
1083 static int is_firmware_flash_cmd(u8 *cdb)
1084 {
1085 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1086 }
1087
1088 /*
1089 * During firmware flash, the heartbeat register may not update as frequently
1090 * as it should. So we dial down lockup detection during firmware flash. and
1091 * dial it back up when firmware flash completes.
1092 */
1093 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1094 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1095 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1096 struct CommandList *c)
1097 {
1098 if (!is_firmware_flash_cmd(c->Request.CDB))
1099 return;
1100 atomic_inc(&h->firmware_flash_in_progress);
1101 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1102 }
1103
1104 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1105 struct CommandList *c)
1106 {
1107 if (is_firmware_flash_cmd(c->Request.CDB) &&
1108 atomic_dec_and_test(&h->firmware_flash_in_progress))
1109 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1110 }
1111
1112 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1113 struct CommandList *c, int reply_queue)
1114 {
1115 dial_down_lockup_detection_during_fw_flash(h, c);
1116 atomic_inc(&h->commands_outstanding);
1117 switch (c->cmd_type) {
1118 case CMD_IOACCEL1:
1119 set_ioaccel1_performant_mode(h, c, reply_queue);
1120 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1121 break;
1122 case CMD_IOACCEL2:
1123 set_ioaccel2_performant_mode(h, c, reply_queue);
1124 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1125 break;
1126 case IOACCEL2_TMF:
1127 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1128 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1129 break;
1130 default:
1131 set_performant_mode(h, c, reply_queue);
1132 h->access.submit_command(h, c);
1133 }
1134 }
1135
1136 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1137 {
1138 if (unlikely(hpsa_is_pending_event(c)))
1139 return finish_cmd(c);
1140
1141 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1142 }
1143
1144 static inline int is_hba_lunid(unsigned char scsi3addr[])
1145 {
1146 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1147 }
1148
1149 static inline int is_scsi_rev_5(struct ctlr_info *h)
1150 {
1151 if (!h->hba_inquiry_data)
1152 return 0;
1153 if ((h->hba_inquiry_data[2] & 0x07) == 5)
1154 return 1;
1155 return 0;
1156 }
1157
1158 static int hpsa_find_target_lun(struct ctlr_info *h,
1159 unsigned char scsi3addr[], int bus, int *target, int *lun)
1160 {
1161 /* finds an unused bus, target, lun for a new physical device
1162 * assumes h->devlock is held
1163 */
1164 int i, found = 0;
1165 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1166
1167 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1168
1169 for (i = 0; i < h->ndevices; i++) {
1170 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1171 __set_bit(h->dev[i]->target, lun_taken);
1172 }
1173
1174 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1175 if (i < HPSA_MAX_DEVICES) {
1176 /* *bus = 1; */
1177 *target = i;
1178 *lun = 0;
1179 found = 1;
1180 }
1181 return !found;
1182 }
1183
1184 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1185 struct hpsa_scsi_dev_t *dev, char *description)
1186 {
1187 #define LABEL_SIZE 25
1188 char label[LABEL_SIZE];
1189
1190 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1191 return;
1192
1193 switch (dev->devtype) {
1194 case TYPE_RAID:
1195 snprintf(label, LABEL_SIZE, "controller");
1196 break;
1197 case TYPE_ENCLOSURE:
1198 snprintf(label, LABEL_SIZE, "enclosure");
1199 break;
1200 case TYPE_DISK:
1201 case TYPE_ZBC:
1202 if (dev->external)
1203 snprintf(label, LABEL_SIZE, "external");
1204 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1205 snprintf(label, LABEL_SIZE, "%s",
1206 raid_label[PHYSICAL_DRIVE]);
1207 else
1208 snprintf(label, LABEL_SIZE, "RAID-%s",
1209 dev->raid_level > RAID_UNKNOWN ? "?" :
1210 raid_label[dev->raid_level]);
1211 break;
1212 case TYPE_ROM:
1213 snprintf(label, LABEL_SIZE, "rom");
1214 break;
1215 case TYPE_TAPE:
1216 snprintf(label, LABEL_SIZE, "tape");
1217 break;
1218 case TYPE_MEDIUM_CHANGER:
1219 snprintf(label, LABEL_SIZE, "changer");
1220 break;
1221 default:
1222 snprintf(label, LABEL_SIZE, "UNKNOWN");
1223 break;
1224 }
1225
1226 dev_printk(level, &h->pdev->dev,
1227 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1228 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1229 description,
1230 scsi_device_type(dev->devtype),
1231 dev->vendor,
1232 dev->model,
1233 label,
1234 dev->offload_config ? '+' : '-',
1235 dev->offload_enabled ? '+' : '-',
1236 dev->expose_device);
1237 }
1238
1239 /* Add an entry into h->dev[] array. */
1240 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1241 struct hpsa_scsi_dev_t *device,
1242 struct hpsa_scsi_dev_t *added[], int *nadded)
1243 {
1244 /* assumes h->devlock is held */
1245 int n = h->ndevices;
1246 int i;
1247 unsigned char addr1[8], addr2[8];
1248 struct hpsa_scsi_dev_t *sd;
1249
1250 if (n >= HPSA_MAX_DEVICES) {
1251 dev_err(&h->pdev->dev, "too many devices, some will be "
1252 "inaccessible.\n");
1253 return -1;
1254 }
1255
1256 /* physical devices do not have lun or target assigned until now. */
1257 if (device->lun != -1)
1258 /* Logical device, lun is already assigned. */
1259 goto lun_assigned;
1260
1261 /* If this device a non-zero lun of a multi-lun device
1262 * byte 4 of the 8-byte LUN addr will contain the logical
1263 * unit no, zero otherwise.
1264 */
1265 if (device->scsi3addr[4] == 0) {
1266 /* This is not a non-zero lun of a multi-lun device */
1267 if (hpsa_find_target_lun(h, device->scsi3addr,
1268 device->bus, &device->target, &device->lun) != 0)
1269 return -1;
1270 goto lun_assigned;
1271 }
1272
1273 /* This is a non-zero lun of a multi-lun device.
1274 * Search through our list and find the device which
1275 * has the same 8 byte LUN address, excepting byte 4 and 5.
1276 * Assign the same bus and target for this new LUN.
1277 * Use the logical unit number from the firmware.
1278 */
1279 memcpy(addr1, device->scsi3addr, 8);
1280 addr1[4] = 0;
1281 addr1[5] = 0;
1282 for (i = 0; i < n; i++) {
1283 sd = h->dev[i];
1284 memcpy(addr2, sd->scsi3addr, 8);
1285 addr2[4] = 0;
1286 addr2[5] = 0;
1287 /* differ only in byte 4 and 5? */
1288 if (memcmp(addr1, addr2, 8) == 0) {
1289 device->bus = sd->bus;
1290 device->target = sd->target;
1291 device->lun = device->scsi3addr[4];
1292 break;
1293 }
1294 }
1295 if (device->lun == -1) {
1296 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1297 " suspect firmware bug or unsupported hardware "
1298 "configuration.\n");
1299 return -1;
1300 }
1301
1302 lun_assigned:
1303
1304 h->dev[n] = device;
1305 h->ndevices++;
1306 added[*nadded] = device;
1307 (*nadded)++;
1308 hpsa_show_dev_msg(KERN_INFO, h, device,
1309 device->expose_device ? "added" : "masked");
1310 device->offload_to_be_enabled = device->offload_enabled;
1311 device->offload_enabled = 0;
1312 return 0;
1313 }
1314
1315 /* Update an entry in h->dev[] array. */
1316 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1317 int entry, struct hpsa_scsi_dev_t *new_entry)
1318 {
1319 int offload_enabled;
1320 /* assumes h->devlock is held */
1321 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1322
1323 /* Raid level changed. */
1324 h->dev[entry]->raid_level = new_entry->raid_level;
1325
1326 /* Raid offload parameters changed. Careful about the ordering. */
1327 if (new_entry->offload_config && new_entry->offload_enabled) {
1328 /*
1329 * if drive is newly offload_enabled, we want to copy the
1330 * raid map data first. If previously offload_enabled and
1331 * offload_config were set, raid map data had better be
1332 * the same as it was before. if raid map data is changed
1333 * then it had better be the case that
1334 * h->dev[entry]->offload_enabled is currently 0.
1335 */
1336 h->dev[entry]->raid_map = new_entry->raid_map;
1337 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1338 }
1339 if (new_entry->hba_ioaccel_enabled) {
1340 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1341 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1342 }
1343 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1344 h->dev[entry]->offload_config = new_entry->offload_config;
1345 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1346 h->dev[entry]->queue_depth = new_entry->queue_depth;
1347
1348 /*
1349 * We can turn off ioaccel offload now, but need to delay turning
1350 * it on until we can update h->dev[entry]->phys_disk[], but we
1351 * can't do that until all the devices are updated.
1352 */
1353 h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
1354 if (!new_entry->offload_enabled)
1355 h->dev[entry]->offload_enabled = 0;
1356
1357 offload_enabled = h->dev[entry]->offload_enabled;
1358 h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
1359 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1360 h->dev[entry]->offload_enabled = offload_enabled;
1361 }
1362
1363 /* Replace an entry from h->dev[] array. */
1364 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1365 int entry, struct hpsa_scsi_dev_t *new_entry,
1366 struct hpsa_scsi_dev_t *added[], int *nadded,
1367 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1368 {
1369 /* assumes h->devlock is held */
1370 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1371 removed[*nremoved] = h->dev[entry];
1372 (*nremoved)++;
1373
1374 /*
1375 * New physical devices won't have target/lun assigned yet
1376 * so we need to preserve the values in the slot we are replacing.
1377 */
1378 if (new_entry->target == -1) {
1379 new_entry->target = h->dev[entry]->target;
1380 new_entry->lun = h->dev[entry]->lun;
1381 }
1382
1383 h->dev[entry] = new_entry;
1384 added[*nadded] = new_entry;
1385 (*nadded)++;
1386 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1387 new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1388 new_entry->offload_enabled = 0;
1389 }
1390
1391 /* Remove an entry from h->dev[] array. */
1392 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1393 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1394 {
1395 /* assumes h->devlock is held */
1396 int i;
1397 struct hpsa_scsi_dev_t *sd;
1398
1399 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1400
1401 sd = h->dev[entry];
1402 removed[*nremoved] = h->dev[entry];
1403 (*nremoved)++;
1404
1405 for (i = entry; i < h->ndevices-1; i++)
1406 h->dev[i] = h->dev[i+1];
1407 h->ndevices--;
1408 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1409 }
1410
1411 #define SCSI3ADDR_EQ(a, b) ( \
1412 (a)[7] == (b)[7] && \
1413 (a)[6] == (b)[6] && \
1414 (a)[5] == (b)[5] && \
1415 (a)[4] == (b)[4] && \
1416 (a)[3] == (b)[3] && \
1417 (a)[2] == (b)[2] && \
1418 (a)[1] == (b)[1] && \
1419 (a)[0] == (b)[0])
1420
1421 static void fixup_botched_add(struct ctlr_info *h,
1422 struct hpsa_scsi_dev_t *added)
1423 {
1424 /* called when scsi_add_device fails in order to re-adjust
1425 * h->dev[] to match the mid layer's view.
1426 */
1427 unsigned long flags;
1428 int i, j;
1429
1430 spin_lock_irqsave(&h->lock, flags);
1431 for (i = 0; i < h->ndevices; i++) {
1432 if (h->dev[i] == added) {
1433 for (j = i; j < h->ndevices-1; j++)
1434 h->dev[j] = h->dev[j+1];
1435 h->ndevices--;
1436 break;
1437 }
1438 }
1439 spin_unlock_irqrestore(&h->lock, flags);
1440 kfree(added);
1441 }
1442
1443 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1444 struct hpsa_scsi_dev_t *dev2)
1445 {
1446 /* we compare everything except lun and target as these
1447 * are not yet assigned. Compare parts likely
1448 * to differ first
1449 */
1450 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1451 sizeof(dev1->scsi3addr)) != 0)
1452 return 0;
1453 if (memcmp(dev1->device_id, dev2->device_id,
1454 sizeof(dev1->device_id)) != 0)
1455 return 0;
1456 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1457 return 0;
1458 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1459 return 0;
1460 if (dev1->devtype != dev2->devtype)
1461 return 0;
1462 if (dev1->bus != dev2->bus)
1463 return 0;
1464 return 1;
1465 }
1466
1467 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1468 struct hpsa_scsi_dev_t *dev2)
1469 {
1470 /* Device attributes that can change, but don't mean
1471 * that the device is a different device, nor that the OS
1472 * needs to be told anything about the change.
1473 */
1474 if (dev1->raid_level != dev2->raid_level)
1475 return 1;
1476 if (dev1->offload_config != dev2->offload_config)
1477 return 1;
1478 if (dev1->offload_enabled != dev2->offload_enabled)
1479 return 1;
1480 if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1481 if (dev1->queue_depth != dev2->queue_depth)
1482 return 1;
1483 return 0;
1484 }
1485
1486 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
1487 * and return needle location in *index. If scsi3addr matches, but not
1488 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1489 * location in *index.
1490 * In the case of a minor device attribute change, such as RAID level, just
1491 * return DEVICE_UPDATED, along with the updated device's location in index.
1492 * If needle not found, return DEVICE_NOT_FOUND.
1493 */
1494 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1495 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1496 int *index)
1497 {
1498 int i;
1499 #define DEVICE_NOT_FOUND 0
1500 #define DEVICE_CHANGED 1
1501 #define DEVICE_SAME 2
1502 #define DEVICE_UPDATED 3
1503 if (needle == NULL)
1504 return DEVICE_NOT_FOUND;
1505
1506 for (i = 0; i < haystack_size; i++) {
1507 if (haystack[i] == NULL) /* previously removed. */
1508 continue;
1509 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1510 *index = i;
1511 if (device_is_the_same(needle, haystack[i])) {
1512 if (device_updated(needle, haystack[i]))
1513 return DEVICE_UPDATED;
1514 return DEVICE_SAME;
1515 } else {
1516 /* Keep offline devices offline */
1517 if (needle->volume_offline)
1518 return DEVICE_NOT_FOUND;
1519 return DEVICE_CHANGED;
1520 }
1521 }
1522 }
1523 *index = -1;
1524 return DEVICE_NOT_FOUND;
1525 }
1526
1527 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1528 unsigned char scsi3addr[])
1529 {
1530 struct offline_device_entry *device;
1531 unsigned long flags;
1532
1533 /* Check to see if device is already on the list */
1534 spin_lock_irqsave(&h->offline_device_lock, flags);
1535 list_for_each_entry(device, &h->offline_device_list, offline_list) {
1536 if (memcmp(device->scsi3addr, scsi3addr,
1537 sizeof(device->scsi3addr)) == 0) {
1538 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1539 return;
1540 }
1541 }
1542 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1543
1544 /* Device is not on the list, add it. */
1545 device = kmalloc(sizeof(*device), GFP_KERNEL);
1546 if (!device) {
1547 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1548 return;
1549 }
1550 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1551 spin_lock_irqsave(&h->offline_device_lock, flags);
1552 list_add_tail(&device->offline_list, &h->offline_device_list);
1553 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1554 }
1555
1556 /* Print a message explaining various offline volume states */
1557 static void hpsa_show_volume_status(struct ctlr_info *h,
1558 struct hpsa_scsi_dev_t *sd)
1559 {
1560 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1561 dev_info(&h->pdev->dev,
1562 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1563 h->scsi_host->host_no,
1564 sd->bus, sd->target, sd->lun);
1565 switch (sd->volume_offline) {
1566 case HPSA_LV_OK:
1567 break;
1568 case HPSA_LV_UNDERGOING_ERASE:
1569 dev_info(&h->pdev->dev,
1570 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1571 h->scsi_host->host_no,
1572 sd->bus, sd->target, sd->lun);
1573 break;
1574 case HPSA_LV_NOT_AVAILABLE:
1575 dev_info(&h->pdev->dev,
1576 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1577 h->scsi_host->host_no,
1578 sd->bus, sd->target, sd->lun);
1579 break;
1580 case HPSA_LV_UNDERGOING_RPI:
1581 dev_info(&h->pdev->dev,
1582 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1583 h->scsi_host->host_no,
1584 sd->bus, sd->target, sd->lun);
1585 break;
1586 case HPSA_LV_PENDING_RPI:
1587 dev_info(&h->pdev->dev,
1588 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1589 h->scsi_host->host_no,
1590 sd->bus, sd->target, sd->lun);
1591 break;
1592 case HPSA_LV_ENCRYPTED_NO_KEY:
1593 dev_info(&h->pdev->dev,
1594 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1595 h->scsi_host->host_no,
1596 sd->bus, sd->target, sd->lun);
1597 break;
1598 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1599 dev_info(&h->pdev->dev,
1600 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1601 h->scsi_host->host_no,
1602 sd->bus, sd->target, sd->lun);
1603 break;
1604 case HPSA_LV_UNDERGOING_ENCRYPTION:
1605 dev_info(&h->pdev->dev,
1606 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1607 h->scsi_host->host_no,
1608 sd->bus, sd->target, sd->lun);
1609 break;
1610 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1611 dev_info(&h->pdev->dev,
1612 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1613 h->scsi_host->host_no,
1614 sd->bus, sd->target, sd->lun);
1615 break;
1616 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1617 dev_info(&h->pdev->dev,
1618 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1619 h->scsi_host->host_no,
1620 sd->bus, sd->target, sd->lun);
1621 break;
1622 case HPSA_LV_PENDING_ENCRYPTION:
1623 dev_info(&h->pdev->dev,
1624 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1625 h->scsi_host->host_no,
1626 sd->bus, sd->target, sd->lun);
1627 break;
1628 case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1629 dev_info(&h->pdev->dev,
1630 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1631 h->scsi_host->host_no,
1632 sd->bus, sd->target, sd->lun);
1633 break;
1634 }
1635 }
1636
1637 /*
1638 * Figure the list of physical drive pointers for a logical drive with
1639 * raid offload configured.
1640 */
1641 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1642 struct hpsa_scsi_dev_t *dev[], int ndevices,
1643 struct hpsa_scsi_dev_t *logical_drive)
1644 {
1645 struct raid_map_data *map = &logical_drive->raid_map;
1646 struct raid_map_disk_data *dd = &map->data[0];
1647 int i, j;
1648 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1649 le16_to_cpu(map->metadata_disks_per_row);
1650 int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1651 le16_to_cpu(map->layout_map_count) *
1652 total_disks_per_row;
1653 int nphys_disk = le16_to_cpu(map->layout_map_count) *
1654 total_disks_per_row;
1655 int qdepth;
1656
1657 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1658 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1659
1660 logical_drive->nphysical_disks = nraid_map_entries;
1661
1662 qdepth = 0;
1663 for (i = 0; i < nraid_map_entries; i++) {
1664 logical_drive->phys_disk[i] = NULL;
1665 if (!logical_drive->offload_config)
1666 continue;
1667 for (j = 0; j < ndevices; j++) {
1668 if (dev[j] == NULL)
1669 continue;
1670 if (dev[j]->devtype != TYPE_DISK &&
1671 dev[j]->devtype != TYPE_ZBC)
1672 continue;
1673 if (is_logical_device(dev[j]))
1674 continue;
1675 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1676 continue;
1677
1678 logical_drive->phys_disk[i] = dev[j];
1679 if (i < nphys_disk)
1680 qdepth = min(h->nr_cmds, qdepth +
1681 logical_drive->phys_disk[i]->queue_depth);
1682 break;
1683 }
1684
1685 /*
1686 * This can happen if a physical drive is removed and
1687 * the logical drive is degraded. In that case, the RAID
1688 * map data will refer to a physical disk which isn't actually
1689 * present. And in that case offload_enabled should already
1690 * be 0, but we'll turn it off here just in case
1691 */
1692 if (!logical_drive->phys_disk[i]) {
1693 logical_drive->offload_enabled = 0;
1694 logical_drive->offload_to_be_enabled = 0;
1695 logical_drive->queue_depth = 8;
1696 }
1697 }
1698 if (nraid_map_entries)
1699 /*
1700 * This is correct for reads, too high for full stripe writes,
1701 * way too high for partial stripe writes
1702 */
1703 logical_drive->queue_depth = qdepth;
1704 else
1705 logical_drive->queue_depth = h->nr_cmds;
1706 }
1707
1708 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1709 struct hpsa_scsi_dev_t *dev[], int ndevices)
1710 {
1711 int i;
1712
1713 for (i = 0; i < ndevices; i++) {
1714 if (dev[i] == NULL)
1715 continue;
1716 if (dev[i]->devtype != TYPE_DISK &&
1717 dev[i]->devtype != TYPE_ZBC)
1718 continue;
1719 if (!is_logical_device(dev[i]))
1720 continue;
1721
1722 /*
1723 * If offload is currently enabled, the RAID map and
1724 * phys_disk[] assignment *better* not be changing
1725 * and since it isn't changing, we do not need to
1726 * update it.
1727 */
1728 if (dev[i]->offload_enabled)
1729 continue;
1730
1731 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1732 }
1733 }
1734
1735 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1736 {
1737 int rc = 0;
1738
1739 if (!h->scsi_host)
1740 return 1;
1741
1742 if (is_logical_device(device)) /* RAID */
1743 rc = scsi_add_device(h->scsi_host, device->bus,
1744 device->target, device->lun);
1745 else /* HBA */
1746 rc = hpsa_add_sas_device(h->sas_host, device);
1747
1748 return rc;
1749 }
1750
1751 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1752 struct hpsa_scsi_dev_t *dev)
1753 {
1754 int i;
1755 int count = 0;
1756
1757 for (i = 0; i < h->nr_cmds; i++) {
1758 struct CommandList *c = h->cmd_pool + i;
1759 int refcount = atomic_inc_return(&c->refcount);
1760
1761 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1762 dev->scsi3addr)) {
1763 unsigned long flags;
1764
1765 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
1766 if (!hpsa_is_cmd_idle(c))
1767 ++count;
1768 spin_unlock_irqrestore(&h->lock, flags);
1769 }
1770
1771 cmd_free(h, c);
1772 }
1773
1774 return count;
1775 }
1776
1777 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1778 struct hpsa_scsi_dev_t *device)
1779 {
1780 int cmds = 0;
1781 int waits = 0;
1782
1783 while (1) {
1784 cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1785 if (cmds == 0)
1786 break;
1787 if (++waits > 20)
1788 break;
1789 dev_warn(&h->pdev->dev,
1790 "%s: removing device with %d outstanding commands!\n",
1791 __func__, cmds);
1792 msleep(1000);
1793 }
1794 }
1795
1796 static void hpsa_remove_device(struct ctlr_info *h,
1797 struct hpsa_scsi_dev_t *device)
1798 {
1799 struct scsi_device *sdev = NULL;
1800
1801 if (!h->scsi_host)
1802 return;
1803
1804 if (is_logical_device(device)) { /* RAID */
1805 sdev = scsi_device_lookup(h->scsi_host, device->bus,
1806 device->target, device->lun);
1807 if (sdev) {
1808 scsi_remove_device(sdev);
1809 scsi_device_put(sdev);
1810 } else {
1811 /*
1812 * We don't expect to get here. Future commands
1813 * to this device will get a selection timeout as
1814 * if the device were gone.
1815 */
1816 hpsa_show_dev_msg(KERN_WARNING, h, device,
1817 "didn't find device for removal.");
1818 }
1819 } else { /* HBA */
1820
1821 device->removed = 1;
1822 hpsa_wait_for_outstanding_commands_for_dev(h, device);
1823
1824 hpsa_remove_sas_device(device);
1825 }
1826 }
1827
1828 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1829 struct hpsa_scsi_dev_t *sd[], int nsds)
1830 {
1831 /* sd contains scsi3 addresses and devtypes, and inquiry
1832 * data. This function takes what's in sd to be the current
1833 * reality and updates h->dev[] to reflect that reality.
1834 */
1835 int i, entry, device_change, changes = 0;
1836 struct hpsa_scsi_dev_t *csd;
1837 unsigned long flags;
1838 struct hpsa_scsi_dev_t **added, **removed;
1839 int nadded, nremoved;
1840
1841 /*
1842 * A reset can cause a device status to change
1843 * re-schedule the scan to see what happened.
1844 */
1845 if (h->reset_in_progress) {
1846 h->drv_req_rescan = 1;
1847 return;
1848 }
1849
1850 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1851 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1852
1853 if (!added || !removed) {
1854 dev_warn(&h->pdev->dev, "out of memory in "
1855 "adjust_hpsa_scsi_table\n");
1856 goto free_and_out;
1857 }
1858
1859 spin_lock_irqsave(&h->devlock, flags);
1860
1861 /* find any devices in h->dev[] that are not in
1862 * sd[] and remove them from h->dev[], and for any
1863 * devices which have changed, remove the old device
1864 * info and add the new device info.
1865 * If minor device attributes change, just update
1866 * the existing device structure.
1867 */
1868 i = 0;
1869 nremoved = 0;
1870 nadded = 0;
1871 while (i < h->ndevices) {
1872 csd = h->dev[i];
1873 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1874 if (device_change == DEVICE_NOT_FOUND) {
1875 changes++;
1876 hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1877 continue; /* remove ^^^, hence i not incremented */
1878 } else if (device_change == DEVICE_CHANGED) {
1879 changes++;
1880 hpsa_scsi_replace_entry(h, i, sd[entry],
1881 added, &nadded, removed, &nremoved);
1882 /* Set it to NULL to prevent it from being freed
1883 * at the bottom of hpsa_update_scsi_devices()
1884 */
1885 sd[entry] = NULL;
1886 } else if (device_change == DEVICE_UPDATED) {
1887 hpsa_scsi_update_entry(h, i, sd[entry]);
1888 }
1889 i++;
1890 }
1891
1892 /* Now, make sure every device listed in sd[] is also
1893 * listed in h->dev[], adding them if they aren't found
1894 */
1895
1896 for (i = 0; i < nsds; i++) {
1897 if (!sd[i]) /* if already added above. */
1898 continue;
1899
1900 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1901 * as the SCSI mid-layer does not handle such devices well.
1902 * It relentlessly loops sending TUR at 3Hz, then READ(10)
1903 * at 160Hz, and prevents the system from coming up.
1904 */
1905 if (sd[i]->volume_offline) {
1906 hpsa_show_volume_status(h, sd[i]);
1907 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1908 continue;
1909 }
1910
1911 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1912 h->ndevices, &entry);
1913 if (device_change == DEVICE_NOT_FOUND) {
1914 changes++;
1915 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1916 break;
1917 sd[i] = NULL; /* prevent from being freed later. */
1918 } else if (device_change == DEVICE_CHANGED) {
1919 /* should never happen... */
1920 changes++;
1921 dev_warn(&h->pdev->dev,
1922 "device unexpectedly changed.\n");
1923 /* but if it does happen, we just ignore that device */
1924 }
1925 }
1926 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
1927
1928 /* Now that h->dev[]->phys_disk[] is coherent, we can enable
1929 * any logical drives that need it enabled.
1930 */
1931 for (i = 0; i < h->ndevices; i++) {
1932 if (h->dev[i] == NULL)
1933 continue;
1934 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
1935 }
1936
1937 spin_unlock_irqrestore(&h->devlock, flags);
1938
1939 /* Monitor devices which are in one of several NOT READY states to be
1940 * brought online later. This must be done without holding h->devlock,
1941 * so don't touch h->dev[]
1942 */
1943 for (i = 0; i < nsds; i++) {
1944 if (!sd[i]) /* if already added above. */
1945 continue;
1946 if (sd[i]->volume_offline)
1947 hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1948 }
1949
1950 /* Don't notify scsi mid layer of any changes the first time through
1951 * (or if there are no changes) scsi_scan_host will do it later the
1952 * first time through.
1953 */
1954 if (!changes)
1955 goto free_and_out;
1956
1957 /* Notify scsi mid layer of any removed devices */
1958 for (i = 0; i < nremoved; i++) {
1959 if (removed[i] == NULL)
1960 continue;
1961 if (removed[i]->expose_device)
1962 hpsa_remove_device(h, removed[i]);
1963 kfree(removed[i]);
1964 removed[i] = NULL;
1965 }
1966
1967 /* Notify scsi mid layer of any added devices */
1968 for (i = 0; i < nadded; i++) {
1969 int rc = 0;
1970
1971 if (added[i] == NULL)
1972 continue;
1973 if (!(added[i]->expose_device))
1974 continue;
1975 rc = hpsa_add_device(h, added[i]);
1976 if (!rc)
1977 continue;
1978 dev_warn(&h->pdev->dev,
1979 "addition failed %d, device not added.", rc);
1980 /* now we have to remove it from h->dev,
1981 * since it didn't get added to scsi mid layer
1982 */
1983 fixup_botched_add(h, added[i]);
1984 h->drv_req_rescan = 1;
1985 }
1986
1987 free_and_out:
1988 kfree(added);
1989 kfree(removed);
1990 }
1991
1992 /*
1993 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1994 * Assume's h->devlock is held.
1995 */
1996 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1997 int bus, int target, int lun)
1998 {
1999 int i;
2000 struct hpsa_scsi_dev_t *sd;
2001
2002 for (i = 0; i < h->ndevices; i++) {
2003 sd = h->dev[i];
2004 if (sd->bus == bus && sd->target == target && sd->lun == lun)
2005 return sd;
2006 }
2007 return NULL;
2008 }
2009
2010 static int hpsa_slave_alloc(struct scsi_device *sdev)
2011 {
2012 struct hpsa_scsi_dev_t *sd = NULL;
2013 unsigned long flags;
2014 struct ctlr_info *h;
2015
2016 h = sdev_to_hba(sdev);
2017 spin_lock_irqsave(&h->devlock, flags);
2018 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2019 struct scsi_target *starget;
2020 struct sas_rphy *rphy;
2021
2022 starget = scsi_target(sdev);
2023 rphy = target_to_rphy(starget);
2024 sd = hpsa_find_device_by_sas_rphy(h, rphy);
2025 if (sd) {
2026 sd->target = sdev_id(sdev);
2027 sd->lun = sdev->lun;
2028 }
2029 }
2030 if (!sd)
2031 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2032 sdev_id(sdev), sdev->lun);
2033
2034 if (sd && sd->expose_device) {
2035 atomic_set(&sd->ioaccel_cmds_out, 0);
2036 sdev->hostdata = sd;
2037 } else
2038 sdev->hostdata = NULL;
2039 spin_unlock_irqrestore(&h->devlock, flags);
2040 return 0;
2041 }
2042
2043 /* configure scsi device based on internal per-device structure */
2044 static int hpsa_slave_configure(struct scsi_device *sdev)
2045 {
2046 struct hpsa_scsi_dev_t *sd;
2047 int queue_depth;
2048
2049 sd = sdev->hostdata;
2050 sdev->no_uld_attach = !sd || !sd->expose_device;
2051
2052 if (sd)
2053 queue_depth = sd->queue_depth != 0 ?
2054 sd->queue_depth : sdev->host->can_queue;
2055 else
2056 queue_depth = sdev->host->can_queue;
2057
2058 scsi_change_queue_depth(sdev, queue_depth);
2059
2060 return 0;
2061 }
2062
2063 static void hpsa_slave_destroy(struct scsi_device *sdev)
2064 {
2065 /* nothing to do. */
2066 }
2067
2068 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2069 {
2070 int i;
2071
2072 if (!h->ioaccel2_cmd_sg_list)
2073 return;
2074 for (i = 0; i < h->nr_cmds; i++) {
2075 kfree(h->ioaccel2_cmd_sg_list[i]);
2076 h->ioaccel2_cmd_sg_list[i] = NULL;
2077 }
2078 kfree(h->ioaccel2_cmd_sg_list);
2079 h->ioaccel2_cmd_sg_list = NULL;
2080 }
2081
2082 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2083 {
2084 int i;
2085
2086 if (h->chainsize <= 0)
2087 return 0;
2088
2089 h->ioaccel2_cmd_sg_list =
2090 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
2091 GFP_KERNEL);
2092 if (!h->ioaccel2_cmd_sg_list)
2093 return -ENOMEM;
2094 for (i = 0; i < h->nr_cmds; i++) {
2095 h->ioaccel2_cmd_sg_list[i] =
2096 kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
2097 h->maxsgentries, GFP_KERNEL);
2098 if (!h->ioaccel2_cmd_sg_list[i])
2099 goto clean;
2100 }
2101 return 0;
2102
2103 clean:
2104 hpsa_free_ioaccel2_sg_chain_blocks(h);
2105 return -ENOMEM;
2106 }
2107
2108 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2109 {
2110 int i;
2111
2112 if (!h->cmd_sg_list)
2113 return;
2114 for (i = 0; i < h->nr_cmds; i++) {
2115 kfree(h->cmd_sg_list[i]);
2116 h->cmd_sg_list[i] = NULL;
2117 }
2118 kfree(h->cmd_sg_list);
2119 h->cmd_sg_list = NULL;
2120 }
2121
2122 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2123 {
2124 int i;
2125
2126 if (h->chainsize <= 0)
2127 return 0;
2128
2129 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
2130 GFP_KERNEL);
2131 if (!h->cmd_sg_list) {
2132 dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
2133 return -ENOMEM;
2134 }
2135 for (i = 0; i < h->nr_cmds; i++) {
2136 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
2137 h->chainsize, GFP_KERNEL);
2138 if (!h->cmd_sg_list[i]) {
2139 dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
2140 goto clean;
2141 }
2142 }
2143 return 0;
2144
2145 clean:
2146 hpsa_free_sg_chain_blocks(h);
2147 return -ENOMEM;
2148 }
2149
2150 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2151 struct io_accel2_cmd *cp, struct CommandList *c)
2152 {
2153 struct ioaccel2_sg_element *chain_block;
2154 u64 temp64;
2155 u32 chain_size;
2156
2157 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2158 chain_size = le32_to_cpu(cp->sg[0].length);
2159 temp64 = pci_map_single(h->pdev, chain_block, chain_size,
2160 PCI_DMA_TODEVICE);
2161 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2162 /* prevent subsequent unmapping */
2163 cp->sg->address = 0;
2164 return -1;
2165 }
2166 cp->sg->address = cpu_to_le64(temp64);
2167 return 0;
2168 }
2169
2170 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2171 struct io_accel2_cmd *cp)
2172 {
2173 struct ioaccel2_sg_element *chain_sg;
2174 u64 temp64;
2175 u32 chain_size;
2176
2177 chain_sg = cp->sg;
2178 temp64 = le64_to_cpu(chain_sg->address);
2179 chain_size = le32_to_cpu(cp->sg[0].length);
2180 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
2181 }
2182
2183 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2184 struct CommandList *c)
2185 {
2186 struct SGDescriptor *chain_sg, *chain_block;
2187 u64 temp64;
2188 u32 chain_len;
2189
2190 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2191 chain_block = h->cmd_sg_list[c->cmdindex];
2192 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2193 chain_len = sizeof(*chain_sg) *
2194 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2195 chain_sg->Len = cpu_to_le32(chain_len);
2196 temp64 = pci_map_single(h->pdev, chain_block, chain_len,
2197 PCI_DMA_TODEVICE);
2198 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2199 /* prevent subsequent unmapping */
2200 chain_sg->Addr = cpu_to_le64(0);
2201 return -1;
2202 }
2203 chain_sg->Addr = cpu_to_le64(temp64);
2204 return 0;
2205 }
2206
2207 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2208 struct CommandList *c)
2209 {
2210 struct SGDescriptor *chain_sg;
2211
2212 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2213 return;
2214
2215 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2216 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
2217 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
2218 }
2219
2220
2221 /* Decode the various types of errors on ioaccel2 path.
2222 * Return 1 for any error that should generate a RAID path retry.
2223 * Return 0 for errors that don't require a RAID path retry.
2224 */
2225 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2226 struct CommandList *c,
2227 struct scsi_cmnd *cmd,
2228 struct io_accel2_cmd *c2,
2229 struct hpsa_scsi_dev_t *dev)
2230 {
2231 int data_len;
2232 int retry = 0;
2233 u32 ioaccel2_resid = 0;
2234
2235 switch (c2->error_data.serv_response) {
2236 case IOACCEL2_SERV_RESPONSE_COMPLETE:
2237 switch (c2->error_data.status) {
2238 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2239 break;
2240 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2241 cmd->result |= SAM_STAT_CHECK_CONDITION;
2242 if (c2->error_data.data_present !=
2243 IOACCEL2_SENSE_DATA_PRESENT) {
2244 memset(cmd->sense_buffer, 0,
2245 SCSI_SENSE_BUFFERSIZE);
2246 break;
2247 }
2248 /* copy the sense data */
2249 data_len = c2->error_data.sense_data_len;
2250 if (data_len > SCSI_SENSE_BUFFERSIZE)
2251 data_len = SCSI_SENSE_BUFFERSIZE;
2252 if (data_len > sizeof(c2->error_data.sense_data_buff))
2253 data_len =
2254 sizeof(c2->error_data.sense_data_buff);
2255 memcpy(cmd->sense_buffer,
2256 c2->error_data.sense_data_buff, data_len);
2257 retry = 1;
2258 break;
2259 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2260 retry = 1;
2261 break;
2262 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2263 retry = 1;
2264 break;
2265 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2266 retry = 1;
2267 break;
2268 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2269 retry = 1;
2270 break;
2271 default:
2272 retry = 1;
2273 break;
2274 }
2275 break;
2276 case IOACCEL2_SERV_RESPONSE_FAILURE:
2277 switch (c2->error_data.status) {
2278 case IOACCEL2_STATUS_SR_IO_ERROR:
2279 case IOACCEL2_STATUS_SR_IO_ABORTED:
2280 case IOACCEL2_STATUS_SR_OVERRUN:
2281 retry = 1;
2282 break;
2283 case IOACCEL2_STATUS_SR_UNDERRUN:
2284 cmd->result = (DID_OK << 16); /* host byte */
2285 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2286 ioaccel2_resid = get_unaligned_le32(
2287 &c2->error_data.resid_cnt[0]);
2288 scsi_set_resid(cmd, ioaccel2_resid);
2289 break;
2290 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2291 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2292 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2293 /*
2294 * Did an HBA disk disappear? We will eventually
2295 * get a state change event from the controller but
2296 * in the meantime, we need to tell the OS that the
2297 * HBA disk is no longer there and stop I/O
2298 * from going down. This allows the potential re-insert
2299 * of the disk to get the same device node.
2300 */
2301 if (dev->physical_device && dev->expose_device) {
2302 cmd->result = DID_NO_CONNECT << 16;
2303 dev->removed = 1;
2304 h->drv_req_rescan = 1;
2305 dev_warn(&h->pdev->dev,
2306 "%s: device is gone!\n", __func__);
2307 } else
2308 /*
2309 * Retry by sending down the RAID path.
2310 * We will get an event from ctlr to
2311 * trigger rescan regardless.
2312 */
2313 retry = 1;
2314 break;
2315 default:
2316 retry = 1;
2317 }
2318 break;
2319 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2320 break;
2321 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2322 break;
2323 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2324 retry = 1;
2325 break;
2326 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2327 break;
2328 default:
2329 retry = 1;
2330 break;
2331 }
2332
2333 return retry; /* retry on raid path? */
2334 }
2335
2336 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2337 struct CommandList *c)
2338 {
2339 bool do_wake = false;
2340
2341 /*
2342 * Prevent the following race in the abort handler:
2343 *
2344 * 1. LLD is requested to abort a SCSI command
2345 * 2. The SCSI command completes
2346 * 3. The struct CommandList associated with step 2 is made available
2347 * 4. New I/O request to LLD to another LUN re-uses struct CommandList
2348 * 5. Abort handler follows scsi_cmnd->host_scribble and
2349 * finds struct CommandList and tries to aborts it
2350 * Now we have aborted the wrong command.
2351 *
2352 * Reset c->scsi_cmd here so that the abort or reset handler will know
2353 * this command has completed. Then, check to see if the handler is
2354 * waiting for this command, and, if so, wake it.
2355 */
2356 c->scsi_cmd = SCSI_CMD_IDLE;
2357 mb(); /* Declare command idle before checking for pending events. */
2358 if (c->abort_pending) {
2359 do_wake = true;
2360 c->abort_pending = false;
2361 }
2362 if (c->reset_pending) {
2363 unsigned long flags;
2364 struct hpsa_scsi_dev_t *dev;
2365
2366 /*
2367 * There appears to be a reset pending; lock the lock and
2368 * reconfirm. If so, then decrement the count of outstanding
2369 * commands and wake the reset command if this is the last one.
2370 */
2371 spin_lock_irqsave(&h->lock, flags);
2372 dev = c->reset_pending; /* Re-fetch under the lock. */
2373 if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2374 do_wake = true;
2375 c->reset_pending = NULL;
2376 spin_unlock_irqrestore(&h->lock, flags);
2377 }
2378
2379 if (do_wake)
2380 wake_up_all(&h->event_sync_wait_queue);
2381 }
2382
2383 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2384 struct CommandList *c)
2385 {
2386 hpsa_cmd_resolve_events(h, c);
2387 cmd_tagged_free(h, c);
2388 }
2389
2390 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2391 struct CommandList *c, struct scsi_cmnd *cmd)
2392 {
2393 hpsa_cmd_resolve_and_free(h, c);
2394 if (cmd && cmd->scsi_done)
2395 cmd->scsi_done(cmd);
2396 }
2397
2398 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2399 {
2400 INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2401 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2402 }
2403
2404 static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd)
2405 {
2406 cmd->result = DID_ABORT << 16;
2407 }
2408
2409 static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c,
2410 struct scsi_cmnd *cmd)
2411 {
2412 hpsa_set_scsi_cmd_aborted(cmd);
2413 dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
2414 c->Request.CDB, c->err_info->ScsiStatus);
2415 hpsa_cmd_resolve_and_free(h, c);
2416 }
2417
2418 static void process_ioaccel2_completion(struct ctlr_info *h,
2419 struct CommandList *c, struct scsi_cmnd *cmd,
2420 struct hpsa_scsi_dev_t *dev)
2421 {
2422 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2423
2424 /* check for good status */
2425 if (likely(c2->error_data.serv_response == 0 &&
2426 c2->error_data.status == 0))
2427 return hpsa_cmd_free_and_done(h, c, cmd);
2428
2429 /*
2430 * Any RAID offload error results in retry which will use
2431 * the normal I/O path so the controller can handle whatever's
2432 * wrong.
2433 */
2434 if (is_logical_device(dev) &&
2435 c2->error_data.serv_response ==
2436 IOACCEL2_SERV_RESPONSE_FAILURE) {
2437 if (c2->error_data.status ==
2438 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2439 dev->offload_enabled = 0;
2440 dev->offload_to_be_enabled = 0;
2441 }
2442
2443 return hpsa_retry_cmd(h, c);
2444 }
2445
2446 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
2447 return hpsa_retry_cmd(h, c);
2448
2449 return hpsa_cmd_free_and_done(h, c, cmd);
2450 }
2451
2452 /* Returns 0 on success, < 0 otherwise. */
2453 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2454 struct CommandList *cp)
2455 {
2456 u8 tmf_status = cp->err_info->ScsiStatus;
2457
2458 switch (tmf_status) {
2459 case CISS_TMF_COMPLETE:
2460 /*
2461 * CISS_TMF_COMPLETE never happens, instead,
2462 * ei->CommandStatus == 0 for this case.
2463 */
2464 case CISS_TMF_SUCCESS:
2465 return 0;
2466 case CISS_TMF_INVALID_FRAME:
2467 case CISS_TMF_NOT_SUPPORTED:
2468 case CISS_TMF_FAILED:
2469 case CISS_TMF_WRONG_LUN:
2470 case CISS_TMF_OVERLAPPED_TAG:
2471 break;
2472 default:
2473 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2474 tmf_status);
2475 break;
2476 }
2477 return -tmf_status;
2478 }
2479
2480 static void complete_scsi_command(struct CommandList *cp)
2481 {
2482 struct scsi_cmnd *cmd;
2483 struct ctlr_info *h;
2484 struct ErrorInfo *ei;
2485 struct hpsa_scsi_dev_t *dev;
2486 struct io_accel2_cmd *c2;
2487
2488 u8 sense_key;
2489 u8 asc; /* additional sense code */
2490 u8 ascq; /* additional sense code qualifier */
2491 unsigned long sense_data_size;
2492
2493 ei = cp->err_info;
2494 cmd = cp->scsi_cmd;
2495 h = cp->h;
2496
2497 if (!cmd->device) {
2498 cmd->result = DID_NO_CONNECT << 16;
2499 return hpsa_cmd_free_and_done(h, cp, cmd);
2500 }
2501
2502 dev = cmd->device->hostdata;
2503 if (!dev) {
2504 cmd->result = DID_NO_CONNECT << 16;
2505 return hpsa_cmd_free_and_done(h, cp, cmd);
2506 }
2507 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2508
2509 scsi_dma_unmap(cmd); /* undo the DMA mappings */
2510 if ((cp->cmd_type == CMD_SCSI) &&
2511 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2512 hpsa_unmap_sg_chain_block(h, cp);
2513
2514 if ((cp->cmd_type == CMD_IOACCEL2) &&
2515 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2516 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2517
2518 cmd->result = (DID_OK << 16); /* host byte */
2519 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2520
2521 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2522 if (dev->physical_device && dev->expose_device &&
2523 dev->removed) {
2524 cmd->result = DID_NO_CONNECT << 16;
2525 return hpsa_cmd_free_and_done(h, cp, cmd);
2526 }
2527 if (likely(cp->phys_disk != NULL))
2528 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2529 }
2530
2531 /*
2532 * We check for lockup status here as it may be set for
2533 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2534 * fail_all_oustanding_cmds()
2535 */
2536 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2537 /* DID_NO_CONNECT will prevent a retry */
2538 cmd->result = DID_NO_CONNECT << 16;
2539 return hpsa_cmd_free_and_done(h, cp, cmd);
2540 }
2541
2542 if ((unlikely(hpsa_is_pending_event(cp)))) {
2543 if (cp->reset_pending)
2544 return hpsa_cmd_resolve_and_free(h, cp);
2545 if (cp->abort_pending)
2546 return hpsa_cmd_abort_and_free(h, cp, cmd);
2547 }
2548
2549 if (cp->cmd_type == CMD_IOACCEL2)
2550 return process_ioaccel2_completion(h, cp, cmd, dev);
2551
2552 scsi_set_resid(cmd, ei->ResidualCnt);
2553 if (ei->CommandStatus == 0)
2554 return hpsa_cmd_free_and_done(h, cp, cmd);
2555
2556 /* For I/O accelerator commands, copy over some fields to the normal
2557 * CISS header used below for error handling.
2558 */
2559 if (cp->cmd_type == CMD_IOACCEL1) {
2560 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2561 cp->Header.SGList = scsi_sg_count(cmd);
2562 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2563 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2564 IOACCEL1_IOFLAGS_CDBLEN_MASK;
2565 cp->Header.tag = c->tag;
2566 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2567 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2568
2569 /* Any RAID offload error results in retry which will use
2570 * the normal I/O path so the controller can handle whatever's
2571 * wrong.
2572 */
2573 if (is_logical_device(dev)) {
2574 if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2575 dev->offload_enabled = 0;
2576 return hpsa_retry_cmd(h, cp);
2577 }
2578 }
2579
2580 /* an error has occurred */
2581 switch (ei->CommandStatus) {
2582
2583 case CMD_TARGET_STATUS:
2584 cmd->result |= ei->ScsiStatus;
2585 /* copy the sense data */
2586 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2587 sense_data_size = SCSI_SENSE_BUFFERSIZE;
2588 else
2589 sense_data_size = sizeof(ei->SenseInfo);
2590 if (ei->SenseLen < sense_data_size)
2591 sense_data_size = ei->SenseLen;
2592 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2593 if (ei->ScsiStatus)
2594 decode_sense_data(ei->SenseInfo, sense_data_size,
2595 &sense_key, &asc, &ascq);
2596 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2597 if (sense_key == ABORTED_COMMAND) {
2598 cmd->result |= DID_SOFT_ERROR << 16;
2599 break;
2600 }
2601 break;
2602 }
2603 /* Problem was not a check condition
2604 * Pass it up to the upper layers...
2605 */
2606 if (ei->ScsiStatus) {
2607 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2608 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2609 "Returning result: 0x%x\n",
2610 cp, ei->ScsiStatus,
2611 sense_key, asc, ascq,
2612 cmd->result);
2613 } else { /* scsi status is zero??? How??? */
2614 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2615 "Returning no connection.\n", cp),
2616
2617 /* Ordinarily, this case should never happen,
2618 * but there is a bug in some released firmware
2619 * revisions that allows it to happen if, for
2620 * example, a 4100 backplane loses power and
2621 * the tape drive is in it. We assume that
2622 * it's a fatal error of some kind because we
2623 * can't show that it wasn't. We will make it
2624 * look like selection timeout since that is
2625 * the most common reason for this to occur,
2626 * and it's severe enough.
2627 */
2628
2629 cmd->result = DID_NO_CONNECT << 16;
2630 }
2631 break;
2632
2633 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2634 break;
2635 case CMD_DATA_OVERRUN:
2636 dev_warn(&h->pdev->dev,
2637 "CDB %16phN data overrun\n", cp->Request.CDB);
2638 break;
2639 case CMD_INVALID: {
2640 /* print_bytes(cp, sizeof(*cp), 1, 0);
2641 print_cmd(cp); */
2642 /* We get CMD_INVALID if you address a non-existent device
2643 * instead of a selection timeout (no response). You will
2644 * see this if you yank out a drive, then try to access it.
2645 * This is kind of a shame because it means that any other
2646 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2647 * missing target. */
2648 cmd->result = DID_NO_CONNECT << 16;
2649 }
2650 break;
2651 case CMD_PROTOCOL_ERR:
2652 cmd->result = DID_ERROR << 16;
2653 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2654 cp->Request.CDB);
2655 break;
2656 case CMD_HARDWARE_ERR:
2657 cmd->result = DID_ERROR << 16;
2658 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2659 cp->Request.CDB);
2660 break;
2661 case CMD_CONNECTION_LOST:
2662 cmd->result = DID_ERROR << 16;
2663 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2664 cp->Request.CDB);
2665 break;
2666 case CMD_ABORTED:
2667 /* Return now to avoid calling scsi_done(). */
2668 return hpsa_cmd_abort_and_free(h, cp, cmd);
2669 case CMD_ABORT_FAILED:
2670 cmd->result = DID_ERROR << 16;
2671 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2672 cp->Request.CDB);
2673 break;
2674 case CMD_UNSOLICITED_ABORT:
2675 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2676 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2677 cp->Request.CDB);
2678 break;
2679 case CMD_TIMEOUT:
2680 cmd->result = DID_TIME_OUT << 16;
2681 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2682 cp->Request.CDB);
2683 break;
2684 case CMD_UNABORTABLE:
2685 cmd->result = DID_ERROR << 16;
2686 dev_warn(&h->pdev->dev, "Command unabortable\n");
2687 break;
2688 case CMD_TMF_STATUS:
2689 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2690 cmd->result = DID_ERROR << 16;
2691 break;
2692 case CMD_IOACCEL_DISABLED:
2693 /* This only handles the direct pass-through case since RAID
2694 * offload is handled above. Just attempt a retry.
2695 */
2696 cmd->result = DID_SOFT_ERROR << 16;
2697 dev_warn(&h->pdev->dev,
2698 "cp %p had HP SSD Smart Path error\n", cp);
2699 break;
2700 default:
2701 cmd->result = DID_ERROR << 16;
2702 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2703 cp, ei->CommandStatus);
2704 }
2705
2706 return hpsa_cmd_free_and_done(h, cp, cmd);
2707 }
2708
2709 static void hpsa_pci_unmap(struct pci_dev *pdev,
2710 struct CommandList *c, int sg_used, int data_direction)
2711 {
2712 int i;
2713
2714 for (i = 0; i < sg_used; i++)
2715 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2716 le32_to_cpu(c->SG[i].Len),
2717 data_direction);
2718 }
2719
2720 static int hpsa_map_one(struct pci_dev *pdev,
2721 struct CommandList *cp,
2722 unsigned char *buf,
2723 size_t buflen,
2724 int data_direction)
2725 {
2726 u64 addr64;
2727
2728 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2729 cp->Header.SGList = 0;
2730 cp->Header.SGTotal = cpu_to_le16(0);
2731 return 0;
2732 }
2733
2734 addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2735 if (dma_mapping_error(&pdev->dev, addr64)) {
2736 /* Prevent subsequent unmap of something never mapped */
2737 cp->Header.SGList = 0;
2738 cp->Header.SGTotal = cpu_to_le16(0);
2739 return -1;
2740 }
2741 cp->SG[0].Addr = cpu_to_le64(addr64);
2742 cp->SG[0].Len = cpu_to_le32(buflen);
2743 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2744 cp->Header.SGList = 1; /* no. SGs contig in this cmd */
2745 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2746 return 0;
2747 }
2748
2749 #define NO_TIMEOUT ((unsigned long) -1)
2750 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2751 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2752 struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2753 {
2754 DECLARE_COMPLETION_ONSTACK(wait);
2755
2756 c->waiting = &wait;
2757 __enqueue_cmd_and_start_io(h, c, reply_queue);
2758 if (timeout_msecs == NO_TIMEOUT) {
2759 /* TODO: get rid of this no-timeout thing */
2760 wait_for_completion_io(&wait);
2761 return IO_OK;
2762 }
2763 if (!wait_for_completion_io_timeout(&wait,
2764 msecs_to_jiffies(timeout_msecs))) {
2765 dev_warn(&h->pdev->dev, "Command timed out.\n");
2766 return -ETIMEDOUT;
2767 }
2768 return IO_OK;
2769 }
2770
2771 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2772 int reply_queue, unsigned long timeout_msecs)
2773 {
2774 if (unlikely(lockup_detected(h))) {
2775 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2776 return IO_OK;
2777 }
2778 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2779 }
2780
2781 static u32 lockup_detected(struct ctlr_info *h)
2782 {
2783 int cpu;
2784 u32 rc, *lockup_detected;
2785
2786 cpu = get_cpu();
2787 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2788 rc = *lockup_detected;
2789 put_cpu();
2790 return rc;
2791 }
2792
2793 #define MAX_DRIVER_CMD_RETRIES 25
2794 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2795 struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2796 {
2797 int backoff_time = 10, retry_count = 0;
2798 int rc;
2799
2800 do {
2801 memset(c->err_info, 0, sizeof(*c->err_info));
2802 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2803 timeout_msecs);
2804 if (rc)
2805 break;
2806 retry_count++;
2807 if (retry_count > 3) {
2808 msleep(backoff_time);
2809 if (backoff_time < 1000)
2810 backoff_time *= 2;
2811 }
2812 } while ((check_for_unit_attention(h, c) ||
2813 check_for_busy(h, c)) &&
2814 retry_count <= MAX_DRIVER_CMD_RETRIES);
2815 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2816 if (retry_count > MAX_DRIVER_CMD_RETRIES)
2817 rc = -EIO;
2818 return rc;
2819 }
2820
2821 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2822 struct CommandList *c)
2823 {
2824 const u8 *cdb = c->Request.CDB;
2825 const u8 *lun = c->Header.LUN.LunAddrBytes;
2826
2827 dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2828 " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2829 txt, lun[0], lun[1], lun[2], lun[3],
2830 lun[4], lun[5], lun[6], lun[7],
2831 cdb[0], cdb[1], cdb[2], cdb[3],
2832 cdb[4], cdb[5], cdb[6], cdb[7],
2833 cdb[8], cdb[9], cdb[10], cdb[11],
2834 cdb[12], cdb[13], cdb[14], cdb[15]);
2835 }
2836
2837 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2838 struct CommandList *cp)
2839 {
2840 const struct ErrorInfo *ei = cp->err_info;
2841 struct device *d = &cp->h->pdev->dev;
2842 u8 sense_key, asc, ascq;
2843 int sense_len;
2844
2845 switch (ei->CommandStatus) {
2846 case CMD_TARGET_STATUS:
2847 if (ei->SenseLen > sizeof(ei->SenseInfo))
2848 sense_len = sizeof(ei->SenseInfo);
2849 else
2850 sense_len = ei->SenseLen;
2851 decode_sense_data(ei->SenseInfo, sense_len,
2852 &sense_key, &asc, &ascq);
2853 hpsa_print_cmd(h, "SCSI status", cp);
2854 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2855 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2856 sense_key, asc, ascq);
2857 else
2858 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2859 if (ei->ScsiStatus == 0)
2860 dev_warn(d, "SCSI status is abnormally zero. "
2861 "(probably indicates selection timeout "
2862 "reported incorrectly due to a known "
2863 "firmware bug, circa July, 2001.)\n");
2864 break;
2865 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2866 break;
2867 case CMD_DATA_OVERRUN:
2868 hpsa_print_cmd(h, "overrun condition", cp);
2869 break;
2870 case CMD_INVALID: {
2871 /* controller unfortunately reports SCSI passthru's
2872 * to non-existent targets as invalid commands.
2873 */
2874 hpsa_print_cmd(h, "invalid command", cp);
2875 dev_warn(d, "probably means device no longer present\n");
2876 }
2877 break;
2878 case CMD_PROTOCOL_ERR:
2879 hpsa_print_cmd(h, "protocol error", cp);
2880 break;
2881 case CMD_HARDWARE_ERR:
2882 hpsa_print_cmd(h, "hardware error", cp);
2883 break;
2884 case CMD_CONNECTION_LOST:
2885 hpsa_print_cmd(h, "connection lost", cp);
2886 break;
2887 case CMD_ABORTED:
2888 hpsa_print_cmd(h, "aborted", cp);
2889 break;
2890 case CMD_ABORT_FAILED:
2891 hpsa_print_cmd(h, "abort failed", cp);
2892 break;
2893 case CMD_UNSOLICITED_ABORT:
2894 hpsa_print_cmd(h, "unsolicited abort", cp);
2895 break;
2896 case CMD_TIMEOUT:
2897 hpsa_print_cmd(h, "timed out", cp);
2898 break;
2899 case CMD_UNABORTABLE:
2900 hpsa_print_cmd(h, "unabortable", cp);
2901 break;
2902 case CMD_CTLR_LOCKUP:
2903 hpsa_print_cmd(h, "controller lockup detected", cp);
2904 break;
2905 default:
2906 hpsa_print_cmd(h, "unknown status", cp);
2907 dev_warn(d, "Unknown command status %x\n",
2908 ei->CommandStatus);
2909 }
2910 }
2911
2912 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2913 u16 page, unsigned char *buf,
2914 unsigned char bufsize)
2915 {
2916 int rc = IO_OK;
2917 struct CommandList *c;
2918 struct ErrorInfo *ei;
2919
2920 c = cmd_alloc(h);
2921
2922 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2923 page, scsi3addr, TYPE_CMD)) {
2924 rc = -1;
2925 goto out;
2926 }
2927 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2928 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
2929 if (rc)
2930 goto out;
2931 ei = c->err_info;
2932 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2933 hpsa_scsi_interpret_error(h, c);
2934 rc = -1;
2935 }
2936 out:
2937 cmd_free(h, c);
2938 return rc;
2939 }
2940
2941 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2942 u8 reset_type, int reply_queue)
2943 {
2944 int rc = IO_OK;
2945 struct CommandList *c;
2946 struct ErrorInfo *ei;
2947
2948 c = cmd_alloc(h);
2949
2950
2951 /* fill_cmd can't fail here, no data buffer to map. */
2952 (void) fill_cmd(c, reset_type, h, NULL, 0, 0,
2953 scsi3addr, TYPE_MSG);
2954 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
2955 if (rc) {
2956 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
2957 goto out;
2958 }
2959 /* no unmap needed here because no data xfer. */
2960
2961 ei = c->err_info;
2962 if (ei->CommandStatus != 0) {
2963 hpsa_scsi_interpret_error(h, c);
2964 rc = -1;
2965 }
2966 out:
2967 cmd_free(h, c);
2968 return rc;
2969 }
2970
2971 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
2972 struct hpsa_scsi_dev_t *dev,
2973 unsigned char *scsi3addr)
2974 {
2975 int i;
2976 bool match = false;
2977 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2978 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
2979
2980 if (hpsa_is_cmd_idle(c))
2981 return false;
2982
2983 switch (c->cmd_type) {
2984 case CMD_SCSI:
2985 case CMD_IOCTL_PEND:
2986 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
2987 sizeof(c->Header.LUN.LunAddrBytes));
2988 break;
2989
2990 case CMD_IOACCEL1:
2991 case CMD_IOACCEL2:
2992 if (c->phys_disk == dev) {
2993 /* HBA mode match */
2994 match = true;
2995 } else {
2996 /* Possible RAID mode -- check each phys dev. */
2997 /* FIXME: Do we need to take out a lock here? If
2998 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
2999 * instead. */
3000 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3001 /* FIXME: an alternate test might be
3002 *
3003 * match = dev->phys_disk[i]->ioaccel_handle
3004 * == c2->scsi_nexus; */
3005 match = dev->phys_disk[i] == c->phys_disk;
3006 }
3007 }
3008 break;
3009
3010 case IOACCEL2_TMF:
3011 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3012 match = dev->phys_disk[i]->ioaccel_handle ==
3013 le32_to_cpu(ac->it_nexus);
3014 }
3015 break;
3016
3017 case 0: /* The command is in the middle of being initialized. */
3018 match = false;
3019 break;
3020
3021 default:
3022 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3023 c->cmd_type);
3024 BUG();
3025 }
3026
3027 return match;
3028 }
3029
3030 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3031 unsigned char *scsi3addr, u8 reset_type, int reply_queue)
3032 {
3033 int i;
3034 int rc = 0;
3035
3036 /* We can really only handle one reset at a time */
3037 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3038 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3039 return -EINTR;
3040 }
3041
3042 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
3043
3044 for (i = 0; i < h->nr_cmds; i++) {
3045 struct CommandList *c = h->cmd_pool + i;
3046 int refcount = atomic_inc_return(&c->refcount);
3047
3048 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
3049 unsigned long flags;
3050
3051 /*
3052 * Mark the target command as having a reset pending,
3053 * then lock a lock so that the command cannot complete
3054 * while we're considering it. If the command is not
3055 * idle then count it; otherwise revoke the event.
3056 */
3057 c->reset_pending = dev;
3058 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
3059 if (!hpsa_is_cmd_idle(c))
3060 atomic_inc(&dev->reset_cmds_out);
3061 else
3062 c->reset_pending = NULL;
3063 spin_unlock_irqrestore(&h->lock, flags);
3064 }
3065
3066 cmd_free(h, c);
3067 }
3068
3069 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
3070 if (!rc)
3071 wait_event(h->event_sync_wait_queue,
3072 atomic_read(&dev->reset_cmds_out) == 0 ||
3073 lockup_detected(h));
3074
3075 if (unlikely(lockup_detected(h))) {
3076 dev_warn(&h->pdev->dev,
3077 "Controller lockup detected during reset wait\n");
3078 rc = -ENODEV;
3079 }
3080
3081 if (unlikely(rc))
3082 atomic_set(&dev->reset_cmds_out, 0);
3083
3084 mutex_unlock(&h->reset_mutex);
3085 return rc;
3086 }
3087
3088 static void hpsa_get_raid_level(struct ctlr_info *h,
3089 unsigned char *scsi3addr, unsigned char *raid_level)
3090 {
3091 int rc;
3092 unsigned char *buf;
3093
3094 *raid_level = RAID_UNKNOWN;
3095 buf = kzalloc(64, GFP_KERNEL);
3096 if (!buf)
3097 return;
3098
3099 if (!hpsa_vpd_page_supported(h, scsi3addr,
3100 HPSA_VPD_LV_DEVICE_GEOMETRY))
3101 goto exit;
3102
3103 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3104 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
3105
3106 if (rc == 0)
3107 *raid_level = buf[8];
3108 if (*raid_level > RAID_UNKNOWN)
3109 *raid_level = RAID_UNKNOWN;
3110 exit:
3111 kfree(buf);
3112 return;
3113 }
3114
3115 #define HPSA_MAP_DEBUG
3116 #ifdef HPSA_MAP_DEBUG
3117 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3118 struct raid_map_data *map_buff)
3119 {
3120 struct raid_map_disk_data *dd = &map_buff->data[0];
3121 int map, row, col;
3122 u16 map_cnt, row_cnt, disks_per_row;
3123
3124 if (rc != 0)
3125 return;
3126
3127 /* Show details only if debugging has been activated. */
3128 if (h->raid_offload_debug < 2)
3129 return;
3130
3131 dev_info(&h->pdev->dev, "structure_size = %u\n",
3132 le32_to_cpu(map_buff->structure_size));
3133 dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3134 le32_to_cpu(map_buff->volume_blk_size));
3135 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3136 le64_to_cpu(map_buff->volume_blk_cnt));
3137 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3138 map_buff->phys_blk_shift);
3139 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3140 map_buff->parity_rotation_shift);
3141 dev_info(&h->pdev->dev, "strip_size = %u\n",
3142 le16_to_cpu(map_buff->strip_size));
3143 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3144 le64_to_cpu(map_buff->disk_starting_blk));
3145 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3146 le64_to_cpu(map_buff->disk_blk_cnt));
3147 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3148 le16_to_cpu(map_buff->data_disks_per_row));
3149 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3150 le16_to_cpu(map_buff->metadata_disks_per_row));
3151 dev_info(&h->pdev->dev, "row_cnt = %u\n",
3152 le16_to_cpu(map_buff->row_cnt));
3153 dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3154 le16_to_cpu(map_buff->layout_map_count));
3155 dev_info(&h->pdev->dev, "flags = 0x%x\n",
3156 le16_to_cpu(map_buff->flags));
3157 dev_info(&h->pdev->dev, "encrypytion = %s\n",
3158 le16_to_cpu(map_buff->flags) &
3159 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF");
3160 dev_info(&h->pdev->dev, "dekindex = %u\n",
3161 le16_to_cpu(map_buff->dekindex));
3162 map_cnt = le16_to_cpu(map_buff->layout_map_count);
3163 for (map = 0; map < map_cnt; map++) {
3164 dev_info(&h->pdev->dev, "Map%u:\n", map);
3165 row_cnt = le16_to_cpu(map_buff->row_cnt);
3166 for (row = 0; row < row_cnt; row++) {
3167 dev_info(&h->pdev->dev, " Row%u:\n", row);
3168 disks_per_row =
3169 le16_to_cpu(map_buff->data_disks_per_row);
3170 for (col = 0; col < disks_per_row; col++, dd++)
3171 dev_info(&h->pdev->dev,
3172 " D%02u: h=0x%04x xor=%u,%u\n",
3173 col, dd->ioaccel_handle,
3174 dd->xor_mult[0], dd->xor_mult[1]);
3175 disks_per_row =
3176 le16_to_cpu(map_buff->metadata_disks_per_row);
3177 for (col = 0; col < disks_per_row; col++, dd++)
3178 dev_info(&h->pdev->dev,
3179 " M%02u: h=0x%04x xor=%u,%u\n",
3180 col, dd->ioaccel_handle,
3181 dd->xor_mult[0], dd->xor_mult[1]);
3182 }
3183 }
3184 }
3185 #else
3186 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3187 __attribute__((unused)) int rc,
3188 __attribute__((unused)) struct raid_map_data *map_buff)
3189 {
3190 }
3191 #endif
3192
3193 static int hpsa_get_raid_map(struct ctlr_info *h,
3194 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3195 {
3196 int rc = 0;
3197 struct CommandList *c;
3198 struct ErrorInfo *ei;
3199
3200 c = cmd_alloc(h);
3201
3202 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3203 sizeof(this_device->raid_map), 0,
3204 scsi3addr, TYPE_CMD)) {
3205 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3206 cmd_free(h, c);
3207 return -1;
3208 }
3209 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3210 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3211 if (rc)
3212 goto out;
3213 ei = c->err_info;
3214 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3215 hpsa_scsi_interpret_error(h, c);
3216 rc = -1;
3217 goto out;
3218 }
3219 cmd_free(h, c);
3220
3221 /* @todo in the future, dynamically allocate RAID map memory */
3222 if (le32_to_cpu(this_device->raid_map.structure_size) >
3223 sizeof(this_device->raid_map)) {
3224 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3225 rc = -1;
3226 }
3227 hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3228 return rc;
3229 out:
3230 cmd_free(h, c);
3231 return rc;
3232 }
3233
3234 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3235 unsigned char scsi3addr[], u16 bmic_device_index,
3236 struct bmic_sense_subsystem_info *buf, size_t bufsize)
3237 {
3238 int rc = IO_OK;
3239 struct CommandList *c;
3240 struct ErrorInfo *ei;
3241
3242 c = cmd_alloc(h);
3243
3244 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3245 0, RAID_CTLR_LUNID, TYPE_CMD);
3246 if (rc)
3247 goto out;
3248
3249 c->Request.CDB[2] = bmic_device_index & 0xff;
3250 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3251
3252 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3253 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3254 if (rc)
3255 goto out;
3256 ei = c->err_info;
3257 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3258 hpsa_scsi_interpret_error(h, c);
3259 rc = -1;
3260 }
3261 out:
3262 cmd_free(h, c);
3263 return rc;
3264 }
3265
3266 static int hpsa_bmic_id_controller(struct ctlr_info *h,
3267 struct bmic_identify_controller *buf, size_t bufsize)
3268 {
3269 int rc = IO_OK;
3270 struct CommandList *c;
3271 struct ErrorInfo *ei;
3272
3273 c = cmd_alloc(h);
3274
3275 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3276 0, RAID_CTLR_LUNID, TYPE_CMD);
3277 if (rc)
3278 goto out;
3279
3280 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3281 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3282 if (rc)
3283 goto out;
3284 ei = c->err_info;
3285 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3286 hpsa_scsi_interpret_error(h, c);
3287 rc = -1;
3288 }
3289 out:
3290 cmd_free(h, c);
3291 return rc;
3292 }
3293
3294 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3295 unsigned char scsi3addr[], u16 bmic_device_index,
3296 struct bmic_identify_physical_device *buf, size_t bufsize)
3297 {
3298 int rc = IO_OK;
3299 struct CommandList *c;
3300 struct ErrorInfo *ei;
3301
3302 c = cmd_alloc(h);
3303 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3304 0, RAID_CTLR_LUNID, TYPE_CMD);
3305 if (rc)
3306 goto out;
3307
3308 c->Request.CDB[2] = bmic_device_index & 0xff;
3309 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3310
3311 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3312 DEFAULT_TIMEOUT);
3313 ei = c->err_info;
3314 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3315 hpsa_scsi_interpret_error(h, c);
3316 rc = -1;
3317 }
3318 out:
3319 cmd_free(h, c);
3320
3321 return rc;
3322 }
3323
3324 /*
3325 * get enclosure information
3326 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3327 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3328 * Uses id_physical_device to determine the box_index.
3329 */
3330 static void hpsa_get_enclosure_info(struct ctlr_info *h,
3331 unsigned char *scsi3addr,
3332 struct ReportExtendedLUNdata *rlep, int rle_index,
3333 struct hpsa_scsi_dev_t *encl_dev)
3334 {
3335 int rc = -1;
3336 struct CommandList *c = NULL;
3337 struct ErrorInfo *ei = NULL;
3338 struct bmic_sense_storage_box_params *bssbp = NULL;
3339 struct bmic_identify_physical_device *id_phys = NULL;
3340 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3341 u16 bmic_device_index = 0;
3342
3343 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3344
3345 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
3346 rc = IO_OK;
3347 goto out;
3348 }
3349
3350 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3351 if (!bssbp)
3352 goto out;
3353
3354 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3355 if (!id_phys)
3356 goto out;
3357
3358 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3359 id_phys, sizeof(*id_phys));
3360 if (rc) {
3361 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3362 __func__, encl_dev->external, bmic_device_index);
3363 goto out;
3364 }
3365
3366 c = cmd_alloc(h);
3367
3368 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3369 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3370
3371 if (rc)
3372 goto out;
3373
3374 if (id_phys->phys_connector[1] == 'E')
3375 c->Request.CDB[5] = id_phys->box_index;
3376 else
3377 c->Request.CDB[5] = 0;
3378
3379 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3380 DEFAULT_TIMEOUT);
3381 if (rc)
3382 goto out;
3383
3384 ei = c->err_info;
3385 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3386 rc = -1;
3387 goto out;
3388 }
3389
3390 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3391 memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3392 bssbp->phys_connector, sizeof(bssbp->phys_connector));
3393
3394 rc = IO_OK;
3395 out:
3396 kfree(bssbp);
3397 kfree(id_phys);
3398
3399 if (c)
3400 cmd_free(h, c);
3401
3402 if (rc != IO_OK)
3403 hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3404 "Error, could not get enclosure information\n");
3405 }
3406
3407 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3408 unsigned char *scsi3addr)
3409 {
3410 struct ReportExtendedLUNdata *physdev;
3411 u32 nphysicals;
3412 u64 sa = 0;
3413 int i;
3414
3415 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3416 if (!physdev)
3417 return 0;
3418
3419 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3420 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3421 kfree(physdev);
3422 return 0;
3423 }
3424 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3425
3426 for (i = 0; i < nphysicals; i++)
3427 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3428 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3429 break;
3430 }
3431
3432 kfree(physdev);
3433
3434 return sa;
3435 }
3436
3437 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3438 struct hpsa_scsi_dev_t *dev)
3439 {
3440 int rc;
3441 u64 sa = 0;
3442
3443 if (is_hba_lunid(scsi3addr)) {
3444 struct bmic_sense_subsystem_info *ssi;
3445
3446 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3447 if (ssi == NULL) {
3448 dev_warn(&h->pdev->dev,
3449 "%s: out of memory\n", __func__);
3450 return;
3451 }
3452
3453 rc = hpsa_bmic_sense_subsystem_information(h,
3454 scsi3addr, 0, ssi, sizeof(*ssi));
3455 if (rc == 0) {
3456 sa = get_unaligned_be64(ssi->primary_world_wide_id);
3457 h->sas_address = sa;
3458 }
3459
3460 kfree(ssi);
3461 } else
3462 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3463
3464 dev->sas_address = sa;
3465 }
3466
3467 /* Get a device id from inquiry page 0x83 */
3468 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3469 unsigned char scsi3addr[], u8 page)
3470 {
3471 int rc;
3472 int i;
3473 int pages;
3474 unsigned char *buf, bufsize;
3475
3476 buf = kzalloc(256, GFP_KERNEL);
3477 if (!buf)
3478 return false;
3479
3480 /* Get the size of the page list first */
3481 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3482 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3483 buf, HPSA_VPD_HEADER_SZ);
3484 if (rc != 0)
3485 goto exit_unsupported;
3486 pages = buf[3];
3487 if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3488 bufsize = pages + HPSA_VPD_HEADER_SZ;
3489 else
3490 bufsize = 255;
3491
3492 /* Get the whole VPD page list */
3493 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3494 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3495 buf, bufsize);
3496 if (rc != 0)
3497 goto exit_unsupported;
3498
3499 pages = buf[3];
3500 for (i = 1; i <= pages; i++)
3501 if (buf[3 + i] == page)
3502 goto exit_supported;
3503 exit_unsupported:
3504 kfree(buf);
3505 return false;
3506 exit_supported:
3507 kfree(buf);
3508 return true;
3509 }
3510
3511 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3512 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3513 {
3514 int rc;
3515 unsigned char *buf;
3516 u8 ioaccel_status;
3517
3518 this_device->offload_config = 0;
3519 this_device->offload_enabled = 0;
3520 this_device->offload_to_be_enabled = 0;
3521
3522 buf = kzalloc(64, GFP_KERNEL);
3523 if (!buf)
3524 return;
3525 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3526 goto out;
3527 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3528 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3529 if (rc != 0)
3530 goto out;
3531
3532 #define IOACCEL_STATUS_BYTE 4
3533 #define OFFLOAD_CONFIGURED_BIT 0x01
3534 #define OFFLOAD_ENABLED_BIT 0x02
3535 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3536 this_device->offload_config =
3537 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3538 if (this_device->offload_config) {
3539 this_device->offload_enabled =
3540 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3541 if (hpsa_get_raid_map(h, scsi3addr, this_device))
3542 this_device->offload_enabled = 0;
3543 }
3544 this_device->offload_to_be_enabled = this_device->offload_enabled;
3545 out:
3546 kfree(buf);
3547 return;
3548 }
3549
3550 /* Get the device id from inquiry page 0x83 */
3551 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3552 unsigned char *device_id, int index, int buflen)
3553 {
3554 int rc;
3555 unsigned char *buf;
3556
3557 /* Does controller have VPD for device id? */
3558 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
3559 return 1; /* not supported */
3560
3561 buf = kzalloc(64, GFP_KERNEL);
3562 if (!buf)
3563 return -ENOMEM;
3564
3565 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3566 HPSA_VPD_LV_DEVICE_ID, buf, 64);
3567 if (rc == 0) {
3568 if (buflen > 16)
3569 buflen = 16;
3570 memcpy(device_id, &buf[8], buflen);
3571 }
3572
3573 kfree(buf);
3574
3575 return rc; /*0 - got id, otherwise, didn't */
3576 }
3577
3578 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3579 void *buf, int bufsize,
3580 int extended_response)
3581 {
3582 int rc = IO_OK;
3583 struct CommandList *c;
3584 unsigned char scsi3addr[8];
3585 struct ErrorInfo *ei;
3586
3587 c = cmd_alloc(h);
3588
3589 /* address the controller */
3590 memset(scsi3addr, 0, sizeof(scsi3addr));
3591 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3592 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3593 rc = -1;
3594 goto out;
3595 }
3596 if (extended_response)
3597 c->Request.CDB[1] = extended_response;
3598 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3599 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3600 if (rc)
3601 goto out;
3602 ei = c->err_info;
3603 if (ei->CommandStatus != 0 &&
3604 ei->CommandStatus != CMD_DATA_UNDERRUN) {
3605 hpsa_scsi_interpret_error(h, c);
3606 rc = -1;
3607 } else {
3608 struct ReportLUNdata *rld = buf;
3609
3610 if (rld->extended_response_flag != extended_response) {
3611 dev_err(&h->pdev->dev,
3612 "report luns requested format %u, got %u\n",
3613 extended_response,
3614 rld->extended_response_flag);
3615 rc = -1;
3616 }
3617 }
3618 out:
3619 cmd_free(h, c);
3620 return rc;
3621 }
3622
3623 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3624 struct ReportExtendedLUNdata *buf, int bufsize)
3625 {
3626 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3627 HPSA_REPORT_PHYS_EXTENDED);
3628 }
3629
3630 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3631 struct ReportLUNdata *buf, int bufsize)
3632 {
3633 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3634 }
3635
3636 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3637 int bus, int target, int lun)
3638 {
3639 device->bus = bus;
3640 device->target = target;
3641 device->lun = lun;
3642 }
3643
3644 /* Use VPD inquiry to get details of volume status */
3645 static int hpsa_get_volume_status(struct ctlr_info *h,
3646 unsigned char scsi3addr[])
3647 {
3648 int rc;
3649 int status;
3650 int size;
3651 unsigned char *buf;
3652
3653 buf = kzalloc(64, GFP_KERNEL);
3654 if (!buf)
3655 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3656
3657 /* Does controller have VPD for logical volume status? */
3658 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3659 goto exit_failed;
3660
3661 /* Get the size of the VPD return buffer */
3662 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3663 buf, HPSA_VPD_HEADER_SZ);
3664 if (rc != 0)
3665 goto exit_failed;
3666 size = buf[3];
3667
3668 /* Now get the whole VPD buffer */
3669 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3670 buf, size + HPSA_VPD_HEADER_SZ);
3671 if (rc != 0)
3672 goto exit_failed;
3673 status = buf[4]; /* status byte */
3674
3675 kfree(buf);
3676 return status;
3677 exit_failed:
3678 kfree(buf);
3679 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3680 }
3681
3682 /* Determine offline status of a volume.
3683 * Return either:
3684 * 0 (not offline)
3685 * 0xff (offline for unknown reasons)
3686 * # (integer code indicating one of several NOT READY states
3687 * describing why a volume is to be kept offline)
3688 */
3689 static int hpsa_volume_offline(struct ctlr_info *h,
3690 unsigned char scsi3addr[])
3691 {
3692 struct CommandList *c;
3693 unsigned char *sense;
3694 u8 sense_key, asc, ascq;
3695 int sense_len;
3696 int rc, ldstat = 0;
3697 u16 cmd_status;
3698 u8 scsi_status;
3699 #define ASC_LUN_NOT_READY 0x04
3700 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3701 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3702
3703 c = cmd_alloc(h);
3704
3705 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3706 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3707 DEFAULT_TIMEOUT);
3708 if (rc) {
3709 cmd_free(h, c);
3710 return 0;
3711 }
3712 sense = c->err_info->SenseInfo;
3713 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3714 sense_len = sizeof(c->err_info->SenseInfo);
3715 else
3716 sense_len = c->err_info->SenseLen;
3717 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3718 cmd_status = c->err_info->CommandStatus;
3719 scsi_status = c->err_info->ScsiStatus;
3720 cmd_free(h, c);
3721 /* Is the volume 'not ready'? */
3722 if (cmd_status != CMD_TARGET_STATUS ||
3723 scsi_status != SAM_STAT_CHECK_CONDITION ||
3724 sense_key != NOT_READY ||
3725 asc != ASC_LUN_NOT_READY) {
3726 return 0;
3727 }
3728
3729 /* Determine the reason for not ready state */
3730 ldstat = hpsa_get_volume_status(h, scsi3addr);
3731
3732 /* Keep volume offline in certain cases: */
3733 switch (ldstat) {
3734 case HPSA_LV_UNDERGOING_ERASE:
3735 case HPSA_LV_NOT_AVAILABLE:
3736 case HPSA_LV_UNDERGOING_RPI:
3737 case HPSA_LV_PENDING_RPI:
3738 case HPSA_LV_ENCRYPTED_NO_KEY:
3739 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3740 case HPSA_LV_UNDERGOING_ENCRYPTION:
3741 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3742 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3743 return ldstat;
3744 case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3745 /* If VPD status page isn't available,
3746 * use ASC/ASCQ to determine state
3747 */
3748 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3749 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3750 return ldstat;
3751 break;
3752 default:
3753 break;
3754 }
3755 return 0;
3756 }
3757
3758 /*
3759 * Find out if a logical device supports aborts by simply trying one.
3760 * Smart Array may claim not to support aborts on logical drives, but
3761 * if a MSA2000 * is connected, the drives on that will be presented
3762 * by the Smart Array as logical drives, and aborts may be sent to
3763 * those devices successfully. So the simplest way to find out is
3764 * to simply try an abort and see how the device responds.
3765 */
3766 static int hpsa_device_supports_aborts(struct ctlr_info *h,
3767 unsigned char *scsi3addr)
3768 {
3769 struct CommandList *c;
3770 struct ErrorInfo *ei;
3771 int rc = 0;
3772
3773 u64 tag = (u64) -1; /* bogus tag */
3774
3775 /* Assume that physical devices support aborts */
3776 if (!is_logical_dev_addr_mode(scsi3addr))
3777 return 1;
3778
3779 c = cmd_alloc(h);
3780
3781 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
3782 (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3783 DEFAULT_TIMEOUT);
3784 /* no unmap needed here because no data xfer. */
3785 ei = c->err_info;
3786 switch (ei->CommandStatus) {
3787 case CMD_INVALID:
3788 rc = 0;
3789 break;
3790 case CMD_UNABORTABLE:
3791 case CMD_ABORT_FAILED:
3792 rc = 1;
3793 break;
3794 case CMD_TMF_STATUS:
3795 rc = hpsa_evaluate_tmf_status(h, c);
3796 break;
3797 default:
3798 rc = 0;
3799 break;
3800 }
3801 cmd_free(h, c);
3802 return rc;
3803 }
3804
3805 static int hpsa_update_device_info(struct ctlr_info *h,
3806 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3807 unsigned char *is_OBDR_device)
3808 {
3809
3810 #define OBDR_SIG_OFFSET 43
3811 #define OBDR_TAPE_SIG "$DR-10"
3812 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3813 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3814
3815 unsigned char *inq_buff;
3816 unsigned char *obdr_sig;
3817 int rc = 0;
3818
3819 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3820 if (!inq_buff) {
3821 rc = -ENOMEM;
3822 goto bail_out;
3823 }
3824
3825 /* Do an inquiry to the device to see what it is. */
3826 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3827 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3828 /* Inquiry failed (msg printed already) */
3829 dev_err(&h->pdev->dev,
3830 "hpsa_update_device_info: inquiry failed\n");
3831 rc = -EIO;
3832 goto bail_out;
3833 }
3834
3835 scsi_sanitize_inquiry_string(&inq_buff[8], 8);
3836 scsi_sanitize_inquiry_string(&inq_buff[16], 16);
3837
3838 this_device->devtype = (inq_buff[0] & 0x1f);
3839 memcpy(this_device->scsi3addr, scsi3addr, 8);
3840 memcpy(this_device->vendor, &inq_buff[8],
3841 sizeof(this_device->vendor));
3842 memcpy(this_device->model, &inq_buff[16],
3843 sizeof(this_device->model));
3844 this_device->rev = inq_buff[2];
3845 memset(this_device->device_id, 0,
3846 sizeof(this_device->device_id));
3847 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3848 sizeof(this_device->device_id)))
3849 dev_err(&h->pdev->dev,
3850 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n",
3851 h->ctlr, __func__,
3852 h->scsi_host->host_no,
3853 this_device->target, this_device->lun,
3854 scsi_device_type(this_device->devtype),
3855 this_device->model);
3856
3857 if ((this_device->devtype == TYPE_DISK ||
3858 this_device->devtype == TYPE_ZBC) &&
3859 is_logical_dev_addr_mode(scsi3addr)) {
3860 int volume_offline;
3861
3862 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3863 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3864 hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3865 volume_offline = hpsa_volume_offline(h, scsi3addr);
3866 if (volume_offline < 0 || volume_offline > 0xff)
3867 volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
3868 this_device->volume_offline = volume_offline & 0xff;
3869 } else {
3870 this_device->raid_level = RAID_UNKNOWN;
3871 this_device->offload_config = 0;
3872 this_device->offload_enabled = 0;
3873 this_device->offload_to_be_enabled = 0;
3874 this_device->hba_ioaccel_enabled = 0;
3875 this_device->volume_offline = 0;
3876 this_device->queue_depth = h->nr_cmds;
3877 }
3878
3879 if (is_OBDR_device) {
3880 /* See if this is a One-Button-Disaster-Recovery device
3881 * by looking for "$DR-10" at offset 43 in inquiry data.
3882 */
3883 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
3884 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
3885 strncmp(obdr_sig, OBDR_TAPE_SIG,
3886 OBDR_SIG_LEN) == 0);
3887 }
3888 kfree(inq_buff);
3889 return 0;
3890
3891 bail_out:
3892 kfree(inq_buff);
3893 return rc;
3894 }
3895
3896 static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
3897 struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
3898 {
3899 unsigned long flags;
3900 int rc, entry;
3901 /*
3902 * See if this device supports aborts. If we already know
3903 * the device, we already know if it supports aborts, otherwise
3904 * we have to find out if it supports aborts by trying one.
3905 */
3906 spin_lock_irqsave(&h->devlock, flags);
3907 rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
3908 if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
3909 entry >= 0 && entry < h->ndevices) {
3910 dev->supports_aborts = h->dev[entry]->supports_aborts;
3911 spin_unlock_irqrestore(&h->devlock, flags);
3912 } else {
3913 spin_unlock_irqrestore(&h->devlock, flags);
3914 dev->supports_aborts =
3915 hpsa_device_supports_aborts(h, scsi3addr);
3916 if (dev->supports_aborts < 0)
3917 dev->supports_aborts = 0;
3918 }
3919 }
3920
3921 /*
3922 * Helper function to assign bus, target, lun mapping of devices.
3923 * Logical drive target and lun are assigned at this time, but
3924 * physical device lun and target assignment are deferred (assigned
3925 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3926 */
3927 static void figure_bus_target_lun(struct ctlr_info *h,
3928 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3929 {
3930 u32 lunid = get_unaligned_le32(lunaddrbytes);
3931
3932 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
3933 /* physical device, target and lun filled in later */
3934 if (is_hba_lunid(lunaddrbytes)) {
3935 int bus = HPSA_HBA_BUS;
3936
3937 if (!device->rev)
3938 bus = HPSA_LEGACY_HBA_BUS;
3939 hpsa_set_bus_target_lun(device,
3940 bus, 0, lunid & 0x3fff);
3941 } else
3942 /* defer target, lun assignment for physical devices */
3943 hpsa_set_bus_target_lun(device,
3944 HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
3945 return;
3946 }
3947 /* It's a logical device */
3948 if (device->external) {
3949 hpsa_set_bus_target_lun(device,
3950 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
3951 lunid & 0x00ff);
3952 return;
3953 }
3954 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
3955 0, lunid & 0x3fff);
3956 }
3957
3958
3959 /*
3960 * Get address of physical disk used for an ioaccel2 mode command:
3961 * 1. Extract ioaccel2 handle from the command.
3962 * 2. Find a matching ioaccel2 handle from list of physical disks.
3963 * 3. Return:
3964 * 1 and set scsi3addr to address of matching physical
3965 * 0 if no matching physical disk was found.
3966 */
3967 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
3968 struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
3969 {
3970 struct io_accel2_cmd *c2 =
3971 &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
3972 unsigned long flags;
3973 int i;
3974
3975 spin_lock_irqsave(&h->devlock, flags);
3976 for (i = 0; i < h->ndevices; i++)
3977 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
3978 memcpy(scsi3addr, h->dev[i]->scsi3addr,
3979 sizeof(h->dev[i]->scsi3addr));
3980 spin_unlock_irqrestore(&h->devlock, flags);
3981 return 1;
3982 }
3983 spin_unlock_irqrestore(&h->devlock, flags);
3984 return 0;
3985 }
3986
3987 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
3988 int i, int nphysicals, int nlocal_logicals)
3989 {
3990 /* In report logicals, local logicals are listed first,
3991 * then any externals.
3992 */
3993 int logicals_start = nphysicals + (raid_ctlr_position == 0);
3994
3995 if (i == raid_ctlr_position)
3996 return 0;
3997
3998 if (i < logicals_start)
3999 return 0;
4000
4001 /* i is in logicals range, but still within local logicals */
4002 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
4003 return 0;
4004
4005 return 1; /* it's an external lun */
4006 }
4007
4008 /*
4009 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
4010 * logdev. The number of luns in physdev and logdev are returned in
4011 * *nphysicals and *nlogicals, respectively.
4012 * Returns 0 on success, -1 otherwise.
4013 */
4014 static int hpsa_gather_lun_info(struct ctlr_info *h,
4015 struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
4016 struct ReportLUNdata *logdev, u32 *nlogicals)
4017 {
4018 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4019 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4020 return -1;
4021 }
4022 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4023 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
4024 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
4025 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4026 *nphysicals = HPSA_MAX_PHYS_LUN;
4027 }
4028 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4029 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4030 return -1;
4031 }
4032 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4033 /* Reject Logicals in excess of our max capability. */
4034 if (*nlogicals > HPSA_MAX_LUN) {
4035 dev_warn(&h->pdev->dev,
4036 "maximum logical LUNs (%d) exceeded. "
4037 "%d LUNs ignored.\n", HPSA_MAX_LUN,
4038 *nlogicals - HPSA_MAX_LUN);
4039 *nlogicals = HPSA_MAX_LUN;
4040 }
4041 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4042 dev_warn(&h->pdev->dev,
4043 "maximum logical + physical LUNs (%d) exceeded. "
4044 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4045 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4046 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4047 }
4048 return 0;
4049 }
4050
4051 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
4052 int i, int nphysicals, int nlogicals,
4053 struct ReportExtendedLUNdata *physdev_list,
4054 struct ReportLUNdata *logdev_list)
4055 {
4056 /* Helper function, figure out where the LUN ID info is coming from
4057 * given index i, lists of physical and logical devices, where in
4058 * the list the raid controller is supposed to appear (first or last)
4059 */
4060
4061 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4062 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4063
4064 if (i == raid_ctlr_position)
4065 return RAID_CTLR_LUNID;
4066
4067 if (i < logicals_start)
4068 return &physdev_list->LUN[i -
4069 (raid_ctlr_position == 0)].lunid[0];
4070
4071 if (i < last_device)
4072 return &logdev_list->LUN[i - nphysicals -
4073 (raid_ctlr_position == 0)][0];
4074 BUG();
4075 return NULL;
4076 }
4077
4078 /* get physical drive ioaccel handle and queue depth */
4079 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
4080 struct hpsa_scsi_dev_t *dev,
4081 struct ReportExtendedLUNdata *rlep, int rle_index,
4082 struct bmic_identify_physical_device *id_phys)
4083 {
4084 int rc;
4085 struct ext_report_lun_entry *rle;
4086
4087 /*
4088 * external targets don't support BMIC
4089 */
4090 if (dev->external) {
4091 dev->queue_depth = 7;
4092 return;
4093 }
4094
4095 rle = &rlep->LUN[rle_index];
4096
4097 dev->ioaccel_handle = rle->ioaccel_handle;
4098 if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4099 dev->hba_ioaccel_enabled = 1;
4100 memset(id_phys, 0, sizeof(*id_phys));
4101 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4102 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
4103 sizeof(*id_phys));
4104 if (!rc)
4105 /* Reserve space for FW operations */
4106 #define DRIVE_CMDS_RESERVED_FOR_FW 2
4107 #define DRIVE_QUEUE_DEPTH 7
4108 dev->queue_depth =
4109 le16_to_cpu(id_phys->current_queue_depth_limit) -
4110 DRIVE_CMDS_RESERVED_FOR_FW;
4111 else
4112 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
4113 }
4114
4115 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4116 struct ReportExtendedLUNdata *rlep, int rle_index,
4117 struct bmic_identify_physical_device *id_phys)
4118 {
4119 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
4120
4121 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
4122 this_device->hba_ioaccel_enabled = 1;
4123
4124 memcpy(&this_device->active_path_index,
4125 &id_phys->active_path_number,
4126 sizeof(this_device->active_path_index));
4127 memcpy(&this_device->path_map,
4128 &id_phys->redundant_path_present_map,
4129 sizeof(this_device->path_map));
4130 memcpy(&this_device->box,
4131 &id_phys->alternate_paths_phys_box_on_port,
4132 sizeof(this_device->box));
4133 memcpy(&this_device->phys_connector,
4134 &id_phys->alternate_paths_phys_connector,
4135 sizeof(this_device->phys_connector));
4136 memcpy(&this_device->bay,
4137 &id_phys->phys_bay_in_box,
4138 sizeof(this_device->bay));
4139 }
4140
4141 /* get number of local logical disks. */
4142 static int hpsa_set_local_logical_count(struct ctlr_info *h,
4143 struct bmic_identify_controller *id_ctlr,
4144 u32 *nlocals)
4145 {
4146 int rc;
4147
4148 if (!id_ctlr) {
4149 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
4150 __func__);
4151 return -ENOMEM;
4152 }
4153 memset(id_ctlr, 0, sizeof(*id_ctlr));
4154 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
4155 if (!rc)
4156 if (id_ctlr->configured_logical_drive_count < 256)
4157 *nlocals = id_ctlr->configured_logical_drive_count;
4158 else
4159 *nlocals = le16_to_cpu(
4160 id_ctlr->extended_logical_unit_count);
4161 else
4162 *nlocals = -1;
4163 return rc;
4164 }
4165
4166 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
4167 {
4168 struct bmic_identify_physical_device *id_phys;
4169 bool is_spare = false;
4170 int rc;
4171
4172 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4173 if (!id_phys)
4174 return false;
4175
4176 rc = hpsa_bmic_id_physical_device(h,
4177 lunaddrbytes,
4178 GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
4179 id_phys, sizeof(*id_phys));
4180 if (rc == 0)
4181 is_spare = (id_phys->more_flags >> 6) & 0x01;
4182
4183 kfree(id_phys);
4184 return is_spare;
4185 }
4186
4187 #define RPL_DEV_FLAG_NON_DISK 0x1
4188 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2
4189 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4
4190
4191 #define BMIC_DEVICE_TYPE_ENCLOSURE 6
4192
4193 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
4194 struct ext_report_lun_entry *rle)
4195 {
4196 u8 device_flags;
4197 u8 device_type;
4198
4199 if (!MASKED_DEVICE(lunaddrbytes))
4200 return false;
4201
4202 device_flags = rle->device_flags;
4203 device_type = rle->device_type;
4204
4205 if (device_flags & RPL_DEV_FLAG_NON_DISK) {
4206 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
4207 return false;
4208 return true;
4209 }
4210
4211 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
4212 return false;
4213
4214 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
4215 return false;
4216
4217 /*
4218 * Spares may be spun down, we do not want to
4219 * do an Inquiry to a RAID set spare drive as
4220 * that would have them spun up, that is a
4221 * performance hit because I/O to the RAID device
4222 * stops while the spin up occurs which can take
4223 * over 50 seconds.
4224 */
4225 if (hpsa_is_disk_spare(h, lunaddrbytes))
4226 return true;
4227
4228 return false;
4229 }
4230
4231 static void hpsa_update_scsi_devices(struct ctlr_info *h)
4232 {
4233 /* the idea here is we could get notified
4234 * that some devices have changed, so we do a report
4235 * physical luns and report logical luns cmd, and adjust
4236 * our list of devices accordingly.
4237 *
4238 * The scsi3addr's of devices won't change so long as the
4239 * adapter is not reset. That means we can rescan and
4240 * tell which devices we already know about, vs. new
4241 * devices, vs. disappearing devices.
4242 */
4243 struct ReportExtendedLUNdata *physdev_list = NULL;
4244 struct ReportLUNdata *logdev_list = NULL;
4245 struct bmic_identify_physical_device *id_phys = NULL;
4246 struct bmic_identify_controller *id_ctlr = NULL;
4247 u32 nphysicals = 0;
4248 u32 nlogicals = 0;
4249 u32 nlocal_logicals = 0;
4250 u32 ndev_allocated = 0;
4251 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4252 int ncurrent = 0;
4253 int i, n_ext_target_devs, ndevs_to_allocate;
4254 int raid_ctlr_position;
4255 bool physical_device;
4256 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4257
4258 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
4259 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4260 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4261 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
4262 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4263 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4264
4265 if (!currentsd || !physdev_list || !logdev_list ||
4266 !tmpdevice || !id_phys || !id_ctlr) {
4267 dev_err(&h->pdev->dev, "out of memory\n");
4268 goto out;
4269 }
4270 memset(lunzerobits, 0, sizeof(lunzerobits));
4271
4272 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4273
4274 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4275 logdev_list, &nlogicals)) {
4276 h->drv_req_rescan = 1;
4277 goto out;
4278 }
4279
4280 /* Set number of local logicals (non PTRAID) */
4281 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4282 dev_warn(&h->pdev->dev,
4283 "%s: Can't determine number of local logical devices.\n",
4284 __func__);
4285 }
4286
4287 /* We might see up to the maximum number of logical and physical disks
4288 * plus external target devices, and a device for the local RAID
4289 * controller.
4290 */
4291 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4292
4293 /* Allocate the per device structures */
4294 for (i = 0; i < ndevs_to_allocate; i++) {
4295 if (i >= HPSA_MAX_DEVICES) {
4296 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4297 " %d devices ignored.\n", HPSA_MAX_DEVICES,
4298 ndevs_to_allocate - HPSA_MAX_DEVICES);
4299 break;
4300 }
4301
4302 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4303 if (!currentsd[i]) {
4304 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
4305 __FILE__, __LINE__);
4306 h->drv_req_rescan = 1;
4307 goto out;
4308 }
4309 ndev_allocated++;
4310 }
4311
4312 if (is_scsi_rev_5(h))
4313 raid_ctlr_position = 0;
4314 else
4315 raid_ctlr_position = nphysicals + nlogicals;
4316
4317 /* adjust our table of devices */
4318 n_ext_target_devs = 0;
4319 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
4320 u8 *lunaddrbytes, is_OBDR = 0;
4321 int rc = 0;
4322 int phys_dev_index = i - (raid_ctlr_position == 0);
4323 bool skip_device = false;
4324
4325 physical_device = i < nphysicals + (raid_ctlr_position == 0);
4326
4327 /* Figure out where the LUN ID info is coming from */
4328 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4329 i, nphysicals, nlogicals, physdev_list, logdev_list);
4330
4331 /* Determine if this is a lun from an external target array */
4332 tmpdevice->external =
4333 figure_external_status(h, raid_ctlr_position, i,
4334 nphysicals, nlocal_logicals);
4335
4336 /*
4337 * Skip over some devices such as a spare.
4338 */
4339 if (!tmpdevice->external && physical_device) {
4340 skip_device = hpsa_skip_device(h, lunaddrbytes,
4341 &physdev_list->LUN[phys_dev_index]);
4342 if (skip_device)
4343 continue;
4344 }
4345
4346 /* Get device type, vendor, model, device id */
4347 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4348 &is_OBDR);
4349 if (rc == -ENOMEM) {
4350 dev_warn(&h->pdev->dev,
4351 "Out of memory, rescan deferred.\n");
4352 h->drv_req_rescan = 1;
4353 goto out;
4354 }
4355 if (rc) {
4356 dev_warn(&h->pdev->dev,
4357 "Inquiry failed, skipping device.\n");
4358 continue;
4359 }
4360
4361 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4362 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
4363 this_device = currentsd[ncurrent];
4364
4365 /* Turn on discovery_polling if there are ext target devices.
4366 * Event-based change notification is unreliable for those.
4367 */
4368 if (!h->discovery_polling) {
4369 if (tmpdevice->external) {
4370 h->discovery_polling = 1;
4371 dev_info(&h->pdev->dev,
4372 "External target, activate discovery polling.\n");
4373 }
4374 }
4375
4376
4377 *this_device = *tmpdevice;
4378 this_device->physical_device = physical_device;
4379
4380 /*
4381 * Expose all devices except for physical devices that
4382 * are masked.
4383 */
4384 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
4385 this_device->expose_device = 0;
4386 else
4387 this_device->expose_device = 1;
4388
4389
4390 /*
4391 * Get the SAS address for physical devices that are exposed.
4392 */
4393 if (this_device->physical_device && this_device->expose_device)
4394 hpsa_get_sas_address(h, lunaddrbytes, this_device);
4395
4396 switch (this_device->devtype) {
4397 case TYPE_ROM:
4398 /* We don't *really* support actual CD-ROM devices,
4399 * just "One Button Disaster Recovery" tape drive
4400 * which temporarily pretends to be a CD-ROM drive.
4401 * So we check that the device is really an OBDR tape
4402 * device by checking for "$DR-10" in bytes 43-48 of
4403 * the inquiry data.
4404 */
4405 if (is_OBDR)
4406 ncurrent++;
4407 break;
4408 case TYPE_DISK:
4409 case TYPE_ZBC:
4410 if (this_device->physical_device) {
4411 /* The disk is in HBA mode. */
4412 /* Never use RAID mapper in HBA mode. */
4413 this_device->offload_enabled = 0;
4414 hpsa_get_ioaccel_drive_info(h, this_device,
4415 physdev_list, phys_dev_index, id_phys);
4416 hpsa_get_path_info(this_device,
4417 physdev_list, phys_dev_index, id_phys);
4418 }
4419 ncurrent++;
4420 break;
4421 case TYPE_TAPE:
4422 case TYPE_MEDIUM_CHANGER:
4423 ncurrent++;
4424 break;
4425 case TYPE_ENCLOSURE:
4426 if (!this_device->external)
4427 hpsa_get_enclosure_info(h, lunaddrbytes,
4428 physdev_list, phys_dev_index,
4429 this_device);
4430 ncurrent++;
4431 break;
4432 case TYPE_RAID:
4433 /* Only present the Smartarray HBA as a RAID controller.
4434 * If it's a RAID controller other than the HBA itself
4435 * (an external RAID controller, MSA500 or similar)
4436 * don't present it.
4437 */
4438 if (!is_hba_lunid(lunaddrbytes))
4439 break;
4440 ncurrent++;
4441 break;
4442 default:
4443 break;
4444 }
4445 if (ncurrent >= HPSA_MAX_DEVICES)
4446 break;
4447 }
4448
4449 if (h->sas_host == NULL) {
4450 int rc = 0;
4451
4452 rc = hpsa_add_sas_host(h);
4453 if (rc) {
4454 dev_warn(&h->pdev->dev,
4455 "Could not add sas host %d\n", rc);
4456 goto out;
4457 }
4458 }
4459
4460 adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4461 out:
4462 kfree(tmpdevice);
4463 for (i = 0; i < ndev_allocated; i++)
4464 kfree(currentsd[i]);
4465 kfree(currentsd);
4466 kfree(physdev_list);
4467 kfree(logdev_list);
4468 kfree(id_ctlr);
4469 kfree(id_phys);
4470 }
4471
4472 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4473 struct scatterlist *sg)
4474 {
4475 u64 addr64 = (u64) sg_dma_address(sg);
4476 unsigned int len = sg_dma_len(sg);
4477
4478 desc->Addr = cpu_to_le64(addr64);
4479 desc->Len = cpu_to_le32(len);
4480 desc->Ext = 0;
4481 }
4482
4483 /*
4484 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4485 * dma mapping and fills in the scatter gather entries of the
4486 * hpsa command, cp.
4487 */
4488 static int hpsa_scatter_gather(struct ctlr_info *h,
4489 struct CommandList *cp,
4490 struct scsi_cmnd *cmd)
4491 {
4492 struct scatterlist *sg;
4493 int use_sg, i, sg_limit, chained, last_sg;
4494 struct SGDescriptor *curr_sg;
4495
4496 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4497
4498 use_sg = scsi_dma_map(cmd);
4499 if (use_sg < 0)
4500 return use_sg;
4501
4502 if (!use_sg)
4503 goto sglist_finished;
4504
4505 /*
4506 * If the number of entries is greater than the max for a single list,
4507 * then we have a chained list; we will set up all but one entry in the
4508 * first list (the last entry is saved for link information);
4509 * otherwise, we don't have a chained list and we'll set up at each of
4510 * the entries in the one list.
4511 */
4512 curr_sg = cp->SG;
4513 chained = use_sg > h->max_cmd_sg_entries;
4514 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4515 last_sg = scsi_sg_count(cmd) - 1;
4516 scsi_for_each_sg(cmd, sg, sg_limit, i) {
4517 hpsa_set_sg_descriptor(curr_sg, sg);
4518 curr_sg++;
4519 }
4520
4521 if (chained) {
4522 /*
4523 * Continue with the chained list. Set curr_sg to the chained
4524 * list. Modify the limit to the total count less the entries
4525 * we've already set up. Resume the scan at the list entry
4526 * where the previous loop left off.
4527 */
4528 curr_sg = h->cmd_sg_list[cp->cmdindex];
4529 sg_limit = use_sg - sg_limit;
4530 for_each_sg(sg, sg, sg_limit, i) {
4531 hpsa_set_sg_descriptor(curr_sg, sg);
4532 curr_sg++;
4533 }
4534 }
4535
4536 /* Back the pointer up to the last entry and mark it as "last". */
4537 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4538
4539 if (use_sg + chained > h->maxSG)
4540 h->maxSG = use_sg + chained;
4541
4542 if (chained) {
4543 cp->Header.SGList = h->max_cmd_sg_entries;
4544 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4545 if (hpsa_map_sg_chain_block(h, cp)) {
4546 scsi_dma_unmap(cmd);
4547 return -1;
4548 }
4549 return 0;
4550 }
4551
4552 sglist_finished:
4553
4554 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
4555 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4556 return 0;
4557 }
4558
4559 #define IO_ACCEL_INELIGIBLE (1)
4560 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4561 {
4562 int is_write = 0;
4563 u32 block;
4564 u32 block_cnt;
4565
4566 /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4567 switch (cdb[0]) {
4568 case WRITE_6:
4569 case WRITE_12:
4570 is_write = 1;
4571 case READ_6:
4572 case READ_12:
4573 if (*cdb_len == 6) {
4574 block = (((cdb[1] & 0x1F) << 16) |
4575 (cdb[2] << 8) |
4576 cdb[3]);
4577 block_cnt = cdb[4];
4578 if (block_cnt == 0)
4579 block_cnt = 256;
4580 } else {
4581 BUG_ON(*cdb_len != 12);
4582 block = get_unaligned_be32(&cdb[2]);
4583 block_cnt = get_unaligned_be32(&cdb[6]);
4584 }
4585 if (block_cnt > 0xffff)
4586 return IO_ACCEL_INELIGIBLE;
4587
4588 cdb[0] = is_write ? WRITE_10 : READ_10;
4589 cdb[1] = 0;
4590 cdb[2] = (u8) (block >> 24);
4591 cdb[3] = (u8) (block >> 16);
4592 cdb[4] = (u8) (block >> 8);
4593 cdb[5] = (u8) (block);
4594 cdb[6] = 0;
4595 cdb[7] = (u8) (block_cnt >> 8);
4596 cdb[8] = (u8) (block_cnt);
4597 cdb[9] = 0;
4598 *cdb_len = 10;
4599 break;
4600 }
4601 return 0;
4602 }
4603
4604 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4605 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4606 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4607 {
4608 struct scsi_cmnd *cmd = c->scsi_cmd;
4609 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4610 unsigned int len;
4611 unsigned int total_len = 0;
4612 struct scatterlist *sg;
4613 u64 addr64;
4614 int use_sg, i;
4615 struct SGDescriptor *curr_sg;
4616 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4617
4618 /* TODO: implement chaining support */
4619 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4620 atomic_dec(&phys_disk->ioaccel_cmds_out);
4621 return IO_ACCEL_INELIGIBLE;
4622 }
4623
4624 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4625
4626 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4627 atomic_dec(&phys_disk->ioaccel_cmds_out);
4628 return IO_ACCEL_INELIGIBLE;
4629 }
4630
4631 c->cmd_type = CMD_IOACCEL1;
4632
4633 /* Adjust the DMA address to point to the accelerated command buffer */
4634 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4635 (c->cmdindex * sizeof(*cp));
4636 BUG_ON(c->busaddr & 0x0000007F);
4637
4638 use_sg = scsi_dma_map(cmd);
4639 if (use_sg < 0) {
4640 atomic_dec(&phys_disk->ioaccel_cmds_out);
4641 return use_sg;
4642 }
4643
4644 if (use_sg) {
4645 curr_sg = cp->SG;
4646 scsi_for_each_sg(cmd, sg, use_sg, i) {
4647 addr64 = (u64) sg_dma_address(sg);
4648 len = sg_dma_len(sg);
4649 total_len += len;
4650 curr_sg->Addr = cpu_to_le64(addr64);
4651 curr_sg->Len = cpu_to_le32(len);
4652 curr_sg->Ext = cpu_to_le32(0);
4653 curr_sg++;
4654 }
4655 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4656
4657 switch (cmd->sc_data_direction) {
4658 case DMA_TO_DEVICE:
4659 control |= IOACCEL1_CONTROL_DATA_OUT;
4660 break;
4661 case DMA_FROM_DEVICE:
4662 control |= IOACCEL1_CONTROL_DATA_IN;
4663 break;
4664 case DMA_NONE:
4665 control |= IOACCEL1_CONTROL_NODATAXFER;
4666 break;
4667 default:
4668 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4669 cmd->sc_data_direction);
4670 BUG();
4671 break;
4672 }
4673 } else {
4674 control |= IOACCEL1_CONTROL_NODATAXFER;
4675 }
4676
4677 c->Header.SGList = use_sg;
4678 /* Fill out the command structure to submit */
4679 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4680 cp->transfer_len = cpu_to_le32(total_len);
4681 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4682 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4683 cp->control = cpu_to_le32(control);
4684 memcpy(cp->CDB, cdb, cdb_len);
4685 memcpy(cp->CISS_LUN, scsi3addr, 8);
4686 /* Tag was already set at init time. */
4687 enqueue_cmd_and_start_io(h, c);
4688 return 0;
4689 }
4690
4691 /*
4692 * Queue a command directly to a device behind the controller using the
4693 * I/O accelerator path.
4694 */
4695 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4696 struct CommandList *c)
4697 {
4698 struct scsi_cmnd *cmd = c->scsi_cmd;
4699 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4700
4701 if (!dev)
4702 return -1;
4703
4704 c->phys_disk = dev;
4705
4706 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4707 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4708 }
4709
4710 /*
4711 * Set encryption parameters for the ioaccel2 request
4712 */
4713 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4714 struct CommandList *c, struct io_accel2_cmd *cp)
4715 {
4716 struct scsi_cmnd *cmd = c->scsi_cmd;
4717 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4718 struct raid_map_data *map = &dev->raid_map;
4719 u64 first_block;
4720
4721 /* Are we doing encryption on this device */
4722 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4723 return;
4724 /* Set the data encryption key index. */
4725 cp->dekindex = map->dekindex;
4726
4727 /* Set the encryption enable flag, encoded into direction field. */
4728 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4729
4730 /* Set encryption tweak values based on logical block address
4731 * If block size is 512, tweak value is LBA.
4732 * For other block sizes, tweak is (LBA * block size)/ 512)
4733 */
4734 switch (cmd->cmnd[0]) {
4735 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4736 case READ_6:
4737 case WRITE_6:
4738 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4739 (cmd->cmnd[2] << 8) |
4740 cmd->cmnd[3]);
4741 break;
4742 case WRITE_10:
4743 case READ_10:
4744 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4745 case WRITE_12:
4746 case READ_12:
4747 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4748 break;
4749 case WRITE_16:
4750 case READ_16:
4751 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4752 break;
4753 default:
4754 dev_err(&h->pdev->dev,
4755 "ERROR: %s: size (0x%x) not supported for encryption\n",
4756 __func__, cmd->cmnd[0]);
4757 BUG();
4758 break;
4759 }
4760
4761 if (le32_to_cpu(map->volume_blk_size) != 512)
4762 first_block = first_block *
4763 le32_to_cpu(map->volume_blk_size)/512;
4764
4765 cp->tweak_lower = cpu_to_le32(first_block);
4766 cp->tweak_upper = cpu_to_le32(first_block >> 32);
4767 }
4768
4769 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4770 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4771 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4772 {
4773 struct scsi_cmnd *cmd = c->scsi_cmd;
4774 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4775 struct ioaccel2_sg_element *curr_sg;
4776 int use_sg, i;
4777 struct scatterlist *sg;
4778 u64 addr64;
4779 u32 len;
4780 u32 total_len = 0;
4781
4782 if (!cmd->device)
4783 return -1;
4784
4785 if (!cmd->device->hostdata)
4786 return -1;
4787
4788 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4789
4790 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4791 atomic_dec(&phys_disk->ioaccel_cmds_out);
4792 return IO_ACCEL_INELIGIBLE;
4793 }
4794
4795 c->cmd_type = CMD_IOACCEL2;
4796 /* Adjust the DMA address to point to the accelerated command buffer */
4797 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4798 (c->cmdindex * sizeof(*cp));
4799 BUG_ON(c->busaddr & 0x0000007F);
4800
4801 memset(cp, 0, sizeof(*cp));
4802 cp->IU_type = IOACCEL2_IU_TYPE;
4803
4804 use_sg = scsi_dma_map(cmd);
4805 if (use_sg < 0) {
4806 atomic_dec(&phys_disk->ioaccel_cmds_out);
4807 return use_sg;
4808 }
4809
4810 if (use_sg) {
4811 curr_sg = cp->sg;
4812 if (use_sg > h->ioaccel_maxsg) {
4813 addr64 = le64_to_cpu(
4814 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4815 curr_sg->address = cpu_to_le64(addr64);
4816 curr_sg->length = 0;
4817 curr_sg->reserved[0] = 0;
4818 curr_sg->reserved[1] = 0;
4819 curr_sg->reserved[2] = 0;
4820 curr_sg->chain_indicator = 0x80;
4821
4822 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4823 }
4824 scsi_for_each_sg(cmd, sg, use_sg, i) {
4825 addr64 = (u64) sg_dma_address(sg);
4826 len = sg_dma_len(sg);
4827 total_len += len;
4828 curr_sg->address = cpu_to_le64(addr64);
4829 curr_sg->length = cpu_to_le32(len);
4830 curr_sg->reserved[0] = 0;
4831 curr_sg->reserved[1] = 0;
4832 curr_sg->reserved[2] = 0;
4833 curr_sg->chain_indicator = 0;
4834 curr_sg++;
4835 }
4836
4837 switch (cmd->sc_data_direction) {
4838 case DMA_TO_DEVICE:
4839 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4840 cp->direction |= IOACCEL2_DIR_DATA_OUT;
4841 break;
4842 case DMA_FROM_DEVICE:
4843 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4844 cp->direction |= IOACCEL2_DIR_DATA_IN;
4845 break;
4846 case DMA_NONE:
4847 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4848 cp->direction |= IOACCEL2_DIR_NO_DATA;
4849 break;
4850 default:
4851 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4852 cmd->sc_data_direction);
4853 BUG();
4854 break;
4855 }
4856 } else {
4857 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4858 cp->direction |= IOACCEL2_DIR_NO_DATA;
4859 }
4860
4861 /* Set encryption parameters, if necessary */
4862 set_encrypt_ioaccel2(h, c, cp);
4863
4864 cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4865 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4866 memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4867
4868 cp->data_len = cpu_to_le32(total_len);
4869 cp->err_ptr = cpu_to_le64(c->busaddr +
4870 offsetof(struct io_accel2_cmd, error_data));
4871 cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4872
4873 /* fill in sg elements */
4874 if (use_sg > h->ioaccel_maxsg) {
4875 cp->sg_count = 1;
4876 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
4877 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4878 atomic_dec(&phys_disk->ioaccel_cmds_out);
4879 scsi_dma_unmap(cmd);
4880 return -1;
4881 }
4882 } else
4883 cp->sg_count = (u8) use_sg;
4884
4885 enqueue_cmd_and_start_io(h, c);
4886 return 0;
4887 }
4888
4889 /*
4890 * Queue a command to the correct I/O accelerator path.
4891 */
4892 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
4893 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4894 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4895 {
4896 if (!c->scsi_cmd->device)
4897 return -1;
4898
4899 if (!c->scsi_cmd->device->hostdata)
4900 return -1;
4901
4902 /* Try to honor the device's queue depth */
4903 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
4904 phys_disk->queue_depth) {
4905 atomic_dec(&phys_disk->ioaccel_cmds_out);
4906 return IO_ACCEL_INELIGIBLE;
4907 }
4908 if (h->transMethod & CFGTBL_Trans_io_accel1)
4909 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
4910 cdb, cdb_len, scsi3addr,
4911 phys_disk);
4912 else
4913 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
4914 cdb, cdb_len, scsi3addr,
4915 phys_disk);
4916 }
4917
4918 static void raid_map_helper(struct raid_map_data *map,
4919 int offload_to_mirror, u32 *map_index, u32 *current_group)
4920 {
4921 if (offload_to_mirror == 0) {
4922 /* use physical disk in the first mirrored group. */
4923 *map_index %= le16_to_cpu(map->data_disks_per_row);
4924 return;
4925 }
4926 do {
4927 /* determine mirror group that *map_index indicates */
4928 *current_group = *map_index /
4929 le16_to_cpu(map->data_disks_per_row);
4930 if (offload_to_mirror == *current_group)
4931 continue;
4932 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
4933 /* select map index from next group */
4934 *map_index += le16_to_cpu(map->data_disks_per_row);
4935 (*current_group)++;
4936 } else {
4937 /* select map index from first group */
4938 *map_index %= le16_to_cpu(map->data_disks_per_row);
4939 *current_group = 0;
4940 }
4941 } while (offload_to_mirror != *current_group);
4942 }
4943
4944 /*
4945 * Attempt to perform offload RAID mapping for a logical volume I/O.
4946 */
4947 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
4948 struct CommandList *c)
4949 {
4950 struct scsi_cmnd *cmd = c->scsi_cmd;
4951 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4952 struct raid_map_data *map = &dev->raid_map;
4953 struct raid_map_disk_data *dd = &map->data[0];
4954 int is_write = 0;
4955 u32 map_index;
4956 u64 first_block, last_block;
4957 u32 block_cnt;
4958 u32 blocks_per_row;
4959 u64 first_row, last_row;
4960 u32 first_row_offset, last_row_offset;
4961 u32 first_column, last_column;
4962 u64 r0_first_row, r0_last_row;
4963 u32 r5or6_blocks_per_row;
4964 u64 r5or6_first_row, r5or6_last_row;
4965 u32 r5or6_first_row_offset, r5or6_last_row_offset;
4966 u32 r5or6_first_column, r5or6_last_column;
4967 u32 total_disks_per_row;
4968 u32 stripesize;
4969 u32 first_group, last_group, current_group;
4970 u32 map_row;
4971 u32 disk_handle;
4972 u64 disk_block;
4973 u32 disk_block_cnt;
4974 u8 cdb[16];
4975 u8 cdb_len;
4976 u16 strip_size;
4977 #if BITS_PER_LONG == 32
4978 u64 tmpdiv;
4979 #endif
4980 int offload_to_mirror;
4981
4982 if (!dev)
4983 return -1;
4984
4985 /* check for valid opcode, get LBA and block count */
4986 switch (cmd->cmnd[0]) {
4987 case WRITE_6:
4988 is_write = 1;
4989 case READ_6:
4990 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4991 (cmd->cmnd[2] << 8) |
4992 cmd->cmnd[3]);
4993 block_cnt = cmd->cmnd[4];
4994 if (block_cnt == 0)
4995 block_cnt = 256;
4996 break;
4997 case WRITE_10:
4998 is_write = 1;
4999 case READ_10:
5000 first_block =
5001 (((u64) cmd->cmnd[2]) << 24) |
5002 (((u64) cmd->cmnd[3]) << 16) |
5003 (((u64) cmd->cmnd[4]) << 8) |
5004 cmd->cmnd[5];
5005 block_cnt =
5006 (((u32) cmd->cmnd[7]) << 8) |
5007 cmd->cmnd[8];
5008 break;
5009 case WRITE_12:
5010 is_write = 1;
5011 case READ_12:
5012 first_block =
5013 (((u64) cmd->cmnd[2]) << 24) |
5014 (((u64) cmd->cmnd[3]) << 16) |
5015 (((u64) cmd->cmnd[4]) << 8) |
5016 cmd->cmnd[5];
5017 block_cnt =
5018 (((u32) cmd->cmnd[6]) << 24) |
5019 (((u32) cmd->cmnd[7]) << 16) |
5020 (((u32) cmd->cmnd[8]) << 8) |
5021 cmd->cmnd[9];
5022 break;
5023 case WRITE_16:
5024 is_write = 1;
5025 case READ_16:
5026 first_block =
5027 (((u64) cmd->cmnd[2]) << 56) |
5028 (((u64) cmd->cmnd[3]) << 48) |
5029 (((u64) cmd->cmnd[4]) << 40) |
5030 (((u64) cmd->cmnd[5]) << 32) |
5031 (((u64) cmd->cmnd[6]) << 24) |
5032 (((u64) cmd->cmnd[7]) << 16) |
5033 (((u64) cmd->cmnd[8]) << 8) |
5034 cmd->cmnd[9];
5035 block_cnt =
5036 (((u32) cmd->cmnd[10]) << 24) |
5037 (((u32) cmd->cmnd[11]) << 16) |
5038 (((u32) cmd->cmnd[12]) << 8) |
5039 cmd->cmnd[13];
5040 break;
5041 default:
5042 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5043 }
5044 last_block = first_block + block_cnt - 1;
5045
5046 /* check for write to non-RAID-0 */
5047 if (is_write && dev->raid_level != 0)
5048 return IO_ACCEL_INELIGIBLE;
5049
5050 /* check for invalid block or wraparound */
5051 if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
5052 last_block < first_block)
5053 return IO_ACCEL_INELIGIBLE;
5054
5055 /* calculate stripe information for the request */
5056 blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
5057 le16_to_cpu(map->strip_size);
5058 strip_size = le16_to_cpu(map->strip_size);
5059 #if BITS_PER_LONG == 32
5060 tmpdiv = first_block;
5061 (void) do_div(tmpdiv, blocks_per_row);
5062 first_row = tmpdiv;
5063 tmpdiv = last_block;
5064 (void) do_div(tmpdiv, blocks_per_row);
5065 last_row = tmpdiv;
5066 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5067 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5068 tmpdiv = first_row_offset;
5069 (void) do_div(tmpdiv, strip_size);
5070 first_column = tmpdiv;
5071 tmpdiv = last_row_offset;
5072 (void) do_div(tmpdiv, strip_size);
5073 last_column = tmpdiv;
5074 #else
5075 first_row = first_block / blocks_per_row;
5076 last_row = last_block / blocks_per_row;
5077 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5078 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5079 first_column = first_row_offset / strip_size;
5080 last_column = last_row_offset / strip_size;
5081 #endif
5082
5083 /* if this isn't a single row/column then give to the controller */
5084 if ((first_row != last_row) || (first_column != last_column))
5085 return IO_ACCEL_INELIGIBLE;
5086
5087 /* proceeding with driver mapping */
5088 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
5089 le16_to_cpu(map->metadata_disks_per_row);
5090 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5091 le16_to_cpu(map->row_cnt);
5092 map_index = (map_row * total_disks_per_row) + first_column;
5093
5094 switch (dev->raid_level) {
5095 case HPSA_RAID_0:
5096 break; /* nothing special to do */
5097 case HPSA_RAID_1:
5098 /* Handles load balance across RAID 1 members.
5099 * (2-drive R1 and R10 with even # of drives.)
5100 * Appropriate for SSDs, not optimal for HDDs
5101 */
5102 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
5103 if (dev->offload_to_mirror)
5104 map_index += le16_to_cpu(map->data_disks_per_row);
5105 dev->offload_to_mirror = !dev->offload_to_mirror;
5106 break;
5107 case HPSA_RAID_ADM:
5108 /* Handles N-way mirrors (R1-ADM)
5109 * and R10 with # of drives divisible by 3.)
5110 */
5111 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
5112
5113 offload_to_mirror = dev->offload_to_mirror;
5114 raid_map_helper(map, offload_to_mirror,
5115 &map_index, &current_group);
5116 /* set mirror group to use next time */
5117 offload_to_mirror =
5118 (offload_to_mirror >=
5119 le16_to_cpu(map->layout_map_count) - 1)
5120 ? 0 : offload_to_mirror + 1;
5121 dev->offload_to_mirror = offload_to_mirror;
5122 /* Avoid direct use of dev->offload_to_mirror within this
5123 * function since multiple threads might simultaneously
5124 * increment it beyond the range of dev->layout_map_count -1.
5125 */
5126 break;
5127 case HPSA_RAID_5:
5128 case HPSA_RAID_6:
5129 if (le16_to_cpu(map->layout_map_count) <= 1)
5130 break;
5131
5132 /* Verify first and last block are in same RAID group */
5133 r5or6_blocks_per_row =
5134 le16_to_cpu(map->strip_size) *
5135 le16_to_cpu(map->data_disks_per_row);
5136 BUG_ON(r5or6_blocks_per_row == 0);
5137 stripesize = r5or6_blocks_per_row *
5138 le16_to_cpu(map->layout_map_count);
5139 #if BITS_PER_LONG == 32
5140 tmpdiv = first_block;
5141 first_group = do_div(tmpdiv, stripesize);
5142 tmpdiv = first_group;
5143 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5144 first_group = tmpdiv;
5145 tmpdiv = last_block;
5146 last_group = do_div(tmpdiv, stripesize);
5147 tmpdiv = last_group;
5148 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5149 last_group = tmpdiv;
5150 #else
5151 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
5152 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
5153 #endif
5154 if (first_group != last_group)
5155 return IO_ACCEL_INELIGIBLE;
5156
5157 /* Verify request is in a single row of RAID 5/6 */
5158 #if BITS_PER_LONG == 32
5159 tmpdiv = first_block;
5160 (void) do_div(tmpdiv, stripesize);
5161 first_row = r5or6_first_row = r0_first_row = tmpdiv;
5162 tmpdiv = last_block;
5163 (void) do_div(tmpdiv, stripesize);
5164 r5or6_last_row = r0_last_row = tmpdiv;
5165 #else
5166 first_row = r5or6_first_row = r0_first_row =
5167 first_block / stripesize;
5168 r5or6_last_row = r0_last_row = last_block / stripesize;
5169 #endif
5170 if (r5or6_first_row != r5or6_last_row)
5171 return IO_ACCEL_INELIGIBLE;
5172
5173
5174 /* Verify request is in a single column */
5175 #if BITS_PER_LONG == 32
5176 tmpdiv = first_block;
5177 first_row_offset = do_div(tmpdiv, stripesize);
5178 tmpdiv = first_row_offset;
5179 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
5180 r5or6_first_row_offset = first_row_offset;
5181 tmpdiv = last_block;
5182 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
5183 tmpdiv = r5or6_last_row_offset;
5184 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
5185 tmpdiv = r5or6_first_row_offset;
5186 (void) do_div(tmpdiv, map->strip_size);
5187 first_column = r5or6_first_column = tmpdiv;
5188 tmpdiv = r5or6_last_row_offset;
5189 (void) do_div(tmpdiv, map->strip_size);
5190 r5or6_last_column = tmpdiv;
5191 #else
5192 first_row_offset = r5or6_first_row_offset =
5193 (u32)((first_block % stripesize) %
5194 r5or6_blocks_per_row);
5195
5196 r5or6_last_row_offset =
5197 (u32)((last_block % stripesize) %
5198 r5or6_blocks_per_row);
5199
5200 first_column = r5or6_first_column =
5201 r5or6_first_row_offset / le16_to_cpu(map->strip_size);
5202 r5or6_last_column =
5203 r5or6_last_row_offset / le16_to_cpu(map->strip_size);
5204 #endif
5205 if (r5or6_first_column != r5or6_last_column)
5206 return IO_ACCEL_INELIGIBLE;
5207
5208 /* Request is eligible */
5209 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5210 le16_to_cpu(map->row_cnt);
5211
5212 map_index = (first_group *
5213 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
5214 (map_row * total_disks_per_row) + first_column;
5215 break;
5216 default:
5217 return IO_ACCEL_INELIGIBLE;
5218 }
5219
5220 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
5221 return IO_ACCEL_INELIGIBLE;
5222
5223 c->phys_disk = dev->phys_disk[map_index];
5224 if (!c->phys_disk)
5225 return IO_ACCEL_INELIGIBLE;
5226
5227 disk_handle = dd[map_index].ioaccel_handle;
5228 disk_block = le64_to_cpu(map->disk_starting_blk) +
5229 first_row * le16_to_cpu(map->strip_size) +
5230 (first_row_offset - first_column *
5231 le16_to_cpu(map->strip_size));
5232 disk_block_cnt = block_cnt;
5233
5234 /* handle differing logical/physical block sizes */
5235 if (map->phys_blk_shift) {
5236 disk_block <<= map->phys_blk_shift;
5237 disk_block_cnt <<= map->phys_blk_shift;
5238 }
5239 BUG_ON(disk_block_cnt > 0xffff);
5240
5241 /* build the new CDB for the physical disk I/O */
5242 if (disk_block > 0xffffffff) {
5243 cdb[0] = is_write ? WRITE_16 : READ_16;
5244 cdb[1] = 0;
5245 cdb[2] = (u8) (disk_block >> 56);
5246 cdb[3] = (u8) (disk_block >> 48);
5247 cdb[4] = (u8) (disk_block >> 40);
5248 cdb[5] = (u8) (disk_block >> 32);
5249 cdb[6] = (u8) (disk_block >> 24);
5250 cdb[7] = (u8) (disk_block >> 16);
5251 cdb[8] = (u8) (disk_block >> 8);
5252 cdb[9] = (u8) (disk_block);
5253 cdb[10] = (u8) (disk_block_cnt >> 24);
5254 cdb[11] = (u8) (disk_block_cnt >> 16);
5255 cdb[12] = (u8) (disk_block_cnt >> 8);
5256 cdb[13] = (u8) (disk_block_cnt);
5257 cdb[14] = 0;
5258 cdb[15] = 0;
5259 cdb_len = 16;
5260 } else {
5261 cdb[0] = is_write ? WRITE_10 : READ_10;
5262 cdb[1] = 0;
5263 cdb[2] = (u8) (disk_block >> 24);
5264 cdb[3] = (u8) (disk_block >> 16);
5265 cdb[4] = (u8) (disk_block >> 8);
5266 cdb[5] = (u8) (disk_block);
5267 cdb[6] = 0;
5268 cdb[7] = (u8) (disk_block_cnt >> 8);
5269 cdb[8] = (u8) (disk_block_cnt);
5270 cdb[9] = 0;
5271 cdb_len = 10;
5272 }
5273 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
5274 dev->scsi3addr,
5275 dev->phys_disk[map_index]);
5276 }
5277
5278 /*
5279 * Submit commands down the "normal" RAID stack path
5280 * All callers to hpsa_ciss_submit must check lockup_detected
5281 * beforehand, before (opt.) and after calling cmd_alloc
5282 */
5283 static int hpsa_ciss_submit(struct ctlr_info *h,
5284 struct CommandList *c, struct scsi_cmnd *cmd,
5285 unsigned char scsi3addr[])
5286 {
5287 cmd->host_scribble = (unsigned char *) c;
5288 c->cmd_type = CMD_SCSI;
5289 c->scsi_cmd = cmd;
5290 c->Header.ReplyQueue = 0; /* unused in simple mode */
5291 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
5292 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5293
5294 /* Fill in the request block... */
5295
5296 c->Request.Timeout = 0;
5297 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5298 c->Request.CDBLen = cmd->cmd_len;
5299 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5300 switch (cmd->sc_data_direction) {
5301 case DMA_TO_DEVICE:
5302 c->Request.type_attr_dir =
5303 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5304 break;
5305 case DMA_FROM_DEVICE:
5306 c->Request.type_attr_dir =
5307 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5308 break;
5309 case DMA_NONE:
5310 c->Request.type_attr_dir =
5311 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5312 break;
5313 case DMA_BIDIRECTIONAL:
5314 /* This can happen if a buggy application does a scsi passthru
5315 * and sets both inlen and outlen to non-zero. ( see
5316 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5317 */
5318
5319 c->Request.type_attr_dir =
5320 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5321 /* This is technically wrong, and hpsa controllers should
5322 * reject it with CMD_INVALID, which is the most correct
5323 * response, but non-fibre backends appear to let it
5324 * slide by, and give the same results as if this field
5325 * were set correctly. Either way is acceptable for
5326 * our purposes here.
5327 */
5328
5329 break;
5330
5331 default:
5332 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5333 cmd->sc_data_direction);
5334 BUG();
5335 break;
5336 }
5337
5338 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
5339 hpsa_cmd_resolve_and_free(h, c);
5340 return SCSI_MLQUEUE_HOST_BUSY;
5341 }
5342 enqueue_cmd_and_start_io(h, c);
5343 /* the cmd'll come back via intr handler in complete_scsi_command() */
5344 return 0;
5345 }
5346
5347 static void hpsa_cmd_init(struct ctlr_info *h, int index,
5348 struct CommandList *c)
5349 {
5350 dma_addr_t cmd_dma_handle, err_dma_handle;
5351
5352 /* Zero out all of commandlist except the last field, refcount */
5353 memset(c, 0, offsetof(struct CommandList, refcount));
5354 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5355 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5356 c->err_info = h->errinfo_pool + index;
5357 memset(c->err_info, 0, sizeof(*c->err_info));
5358 err_dma_handle = h->errinfo_pool_dhandle
5359 + index * sizeof(*c->err_info);
5360 c->cmdindex = index;
5361 c->busaddr = (u32) cmd_dma_handle;
5362 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5363 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5364 c->h = h;
5365 c->scsi_cmd = SCSI_CMD_IDLE;
5366 }
5367
5368 static void hpsa_preinitialize_commands(struct ctlr_info *h)
5369 {
5370 int i;
5371
5372 for (i = 0; i < h->nr_cmds; i++) {
5373 struct CommandList *c = h->cmd_pool + i;
5374
5375 hpsa_cmd_init(h, i, c);
5376 atomic_set(&c->refcount, 0);
5377 }
5378 }
5379
5380 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5381 struct CommandList *c)
5382 {
5383 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5384
5385 BUG_ON(c->cmdindex != index);
5386
5387 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5388 memset(c->err_info, 0, sizeof(*c->err_info));
5389 c->busaddr = (u32) cmd_dma_handle;
5390 }
5391
5392 static int hpsa_ioaccel_submit(struct ctlr_info *h,
5393 struct CommandList *c, struct scsi_cmnd *cmd,
5394 unsigned char *scsi3addr)
5395 {
5396 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5397 int rc = IO_ACCEL_INELIGIBLE;
5398
5399 if (!dev)
5400 return SCSI_MLQUEUE_HOST_BUSY;
5401
5402 cmd->host_scribble = (unsigned char *) c;
5403
5404 if (dev->offload_enabled) {
5405 hpsa_cmd_init(h, c->cmdindex, c);
5406 c->cmd_type = CMD_SCSI;
5407 c->scsi_cmd = cmd;
5408 rc = hpsa_scsi_ioaccel_raid_map(h, c);
5409 if (rc < 0) /* scsi_dma_map failed. */
5410 rc = SCSI_MLQUEUE_HOST_BUSY;
5411 } else if (dev->hba_ioaccel_enabled) {
5412 hpsa_cmd_init(h, c->cmdindex, c);
5413 c->cmd_type = CMD_SCSI;
5414 c->scsi_cmd = cmd;
5415 rc = hpsa_scsi_ioaccel_direct_map(h, c);
5416 if (rc < 0) /* scsi_dma_map failed. */
5417 rc = SCSI_MLQUEUE_HOST_BUSY;
5418 }
5419 return rc;
5420 }
5421
5422 static void hpsa_command_resubmit_worker(struct work_struct *work)
5423 {
5424 struct scsi_cmnd *cmd;
5425 struct hpsa_scsi_dev_t *dev;
5426 struct CommandList *c = container_of(work, struct CommandList, work);
5427
5428 cmd = c->scsi_cmd;
5429 dev = cmd->device->hostdata;
5430 if (!dev) {
5431 cmd->result = DID_NO_CONNECT << 16;
5432 return hpsa_cmd_free_and_done(c->h, c, cmd);
5433 }
5434 if (c->reset_pending)
5435 return hpsa_cmd_resolve_and_free(c->h, c);
5436 if (c->abort_pending)
5437 return hpsa_cmd_abort_and_free(c->h, c, cmd);
5438 if (c->cmd_type == CMD_IOACCEL2) {
5439 struct ctlr_info *h = c->h;
5440 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5441 int rc;
5442
5443 if (c2->error_data.serv_response ==
5444 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5445 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
5446 if (rc == 0)
5447 return;
5448 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5449 /*
5450 * If we get here, it means dma mapping failed.
5451 * Try again via scsi mid layer, which will
5452 * then get SCSI_MLQUEUE_HOST_BUSY.
5453 */
5454 cmd->result = DID_IMM_RETRY << 16;
5455 return hpsa_cmd_free_and_done(h, c, cmd);
5456 }
5457 /* else, fall thru and resubmit down CISS path */
5458 }
5459 }
5460 hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5461 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
5462 /*
5463 * If we get here, it means dma mapping failed. Try
5464 * again via scsi mid layer, which will then get
5465 * SCSI_MLQUEUE_HOST_BUSY.
5466 *
5467 * hpsa_ciss_submit will have already freed c
5468 * if it encountered a dma mapping failure.
5469 */
5470 cmd->result = DID_IMM_RETRY << 16;
5471 cmd->scsi_done(cmd);
5472 }
5473 }
5474
5475 /* Running in struct Scsi_Host->host_lock less mode */
5476 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5477 {
5478 struct ctlr_info *h;
5479 struct hpsa_scsi_dev_t *dev;
5480 unsigned char scsi3addr[8];
5481 struct CommandList *c;
5482 int rc = 0;
5483
5484 /* Get the ptr to our adapter structure out of cmd->host. */
5485 h = sdev_to_hba(cmd->device);
5486
5487 BUG_ON(cmd->request->tag < 0);
5488
5489 dev = cmd->device->hostdata;
5490 if (!dev) {
5491 cmd->result = NOT_READY << 16; /* host byte */
5492 cmd->scsi_done(cmd);
5493 return 0;
5494 }
5495
5496 if (dev->removed) {
5497 cmd->result = DID_NO_CONNECT << 16;
5498 cmd->scsi_done(cmd);
5499 return 0;
5500 }
5501
5502 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
5503
5504 if (unlikely(lockup_detected(h))) {
5505 cmd->result = DID_NO_CONNECT << 16;
5506 cmd->scsi_done(cmd);
5507 return 0;
5508 }
5509 c = cmd_tagged_alloc(h, cmd);
5510
5511 /*
5512 * Call alternate submit routine for I/O accelerated commands.
5513 * Retries always go down the normal I/O path.
5514 */
5515 if (likely(cmd->retries == 0 &&
5516 cmd->request->cmd_type == REQ_TYPE_FS &&
5517 h->acciopath_status)) {
5518 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
5519 if (rc == 0)
5520 return 0;
5521 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5522 hpsa_cmd_resolve_and_free(h, c);
5523 return SCSI_MLQUEUE_HOST_BUSY;
5524 }
5525 }
5526 return hpsa_ciss_submit(h, c, cmd, scsi3addr);
5527 }
5528
5529 static void hpsa_scan_complete(struct ctlr_info *h)
5530 {
5531 unsigned long flags;
5532
5533 spin_lock_irqsave(&h->scan_lock, flags);
5534 h->scan_finished = 1;
5535 wake_up_all(&h->scan_wait_queue);
5536 spin_unlock_irqrestore(&h->scan_lock, flags);
5537 }
5538
5539 static void hpsa_scan_start(struct Scsi_Host *sh)
5540 {
5541 struct ctlr_info *h = shost_to_hba(sh);
5542 unsigned long flags;
5543
5544 /*
5545 * Don't let rescans be initiated on a controller known to be locked
5546 * up. If the controller locks up *during* a rescan, that thread is
5547 * probably hosed, but at least we can prevent new rescan threads from
5548 * piling up on a locked up controller.
5549 */
5550 if (unlikely(lockup_detected(h)))
5551 return hpsa_scan_complete(h);
5552
5553 /* wait until any scan already in progress is finished. */
5554 while (1) {
5555 spin_lock_irqsave(&h->scan_lock, flags);
5556 if (h->scan_finished)
5557 break;
5558 spin_unlock_irqrestore(&h->scan_lock, flags);
5559 wait_event(h->scan_wait_queue, h->scan_finished);
5560 /* Note: We don't need to worry about a race between this
5561 * thread and driver unload because the midlayer will
5562 * have incremented the reference count, so unload won't
5563 * happen if we're in here.
5564 */
5565 }
5566 h->scan_finished = 0; /* mark scan as in progress */
5567 spin_unlock_irqrestore(&h->scan_lock, flags);
5568
5569 if (unlikely(lockup_detected(h)))
5570 return hpsa_scan_complete(h);
5571
5572 hpsa_update_scsi_devices(h);
5573
5574 hpsa_scan_complete(h);
5575 }
5576
5577 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5578 {
5579 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5580
5581 if (!logical_drive)
5582 return -ENODEV;
5583
5584 if (qdepth < 1)
5585 qdepth = 1;
5586 else if (qdepth > logical_drive->queue_depth)
5587 qdepth = logical_drive->queue_depth;
5588
5589 return scsi_change_queue_depth(sdev, qdepth);
5590 }
5591
5592 static int hpsa_scan_finished(struct Scsi_Host *sh,
5593 unsigned long elapsed_time)
5594 {
5595 struct ctlr_info *h = shost_to_hba(sh);
5596 unsigned long flags;
5597 int finished;
5598
5599 spin_lock_irqsave(&h->scan_lock, flags);
5600 finished = h->scan_finished;
5601 spin_unlock_irqrestore(&h->scan_lock, flags);
5602 return finished;
5603 }
5604
5605 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5606 {
5607 struct Scsi_Host *sh;
5608
5609 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5610 if (sh == NULL) {
5611 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5612 return -ENOMEM;
5613 }
5614
5615 sh->io_port = 0;
5616 sh->n_io_port = 0;
5617 sh->this_id = -1;
5618 sh->max_channel = 3;
5619 sh->max_cmd_len = MAX_COMMAND_SIZE;
5620 sh->max_lun = HPSA_MAX_LUN;
5621 sh->max_id = HPSA_MAX_LUN;
5622 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5623 sh->cmd_per_lun = sh->can_queue;
5624 sh->sg_tablesize = h->maxsgentries;
5625 sh->transportt = hpsa_sas_transport_template;
5626 sh->hostdata[0] = (unsigned long) h;
5627 sh->irq = h->intr[h->intr_mode];
5628 sh->unique_id = sh->irq;
5629
5630 h->scsi_host = sh;
5631 return 0;
5632 }
5633
5634 static int hpsa_scsi_add_host(struct ctlr_info *h)
5635 {
5636 int rv;
5637
5638 rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5639 if (rv) {
5640 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5641 return rv;
5642 }
5643 scsi_scan_host(h->scsi_host);
5644 return 0;
5645 }
5646
5647 /*
5648 * The block layer has already gone to the trouble of picking out a unique,
5649 * small-integer tag for this request. We use an offset from that value as
5650 * an index to select our command block. (The offset allows us to reserve the
5651 * low-numbered entries for our own uses.)
5652 */
5653 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5654 {
5655 int idx = scmd->request->tag;
5656
5657 if (idx < 0)
5658 return idx;
5659
5660 /* Offset to leave space for internal cmds. */
5661 return idx += HPSA_NRESERVED_CMDS;
5662 }
5663
5664 /*
5665 * Send a TEST_UNIT_READY command to the specified LUN using the specified
5666 * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5667 */
5668 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5669 struct CommandList *c, unsigned char lunaddr[],
5670 int reply_queue)
5671 {
5672 int rc;
5673
5674 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5675 (void) fill_cmd(c, TEST_UNIT_READY, h,
5676 NULL, 0, 0, lunaddr, TYPE_CMD);
5677 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
5678 if (rc)
5679 return rc;
5680 /* no unmap needed here because no data xfer. */
5681
5682 /* Check if the unit is already ready. */
5683 if (c->err_info->CommandStatus == CMD_SUCCESS)
5684 return 0;
5685
5686 /*
5687 * The first command sent after reset will receive "unit attention" to
5688 * indicate that the LUN has been reset...this is actually what we're
5689 * looking for (but, success is good too).
5690 */
5691 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5692 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5693 (c->err_info->SenseInfo[2] == NO_SENSE ||
5694 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5695 return 0;
5696
5697 return 1;
5698 }
5699
5700 /*
5701 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5702 * returns zero when the unit is ready, and non-zero when giving up.
5703 */
5704 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5705 struct CommandList *c,
5706 unsigned char lunaddr[], int reply_queue)
5707 {
5708 int rc;
5709 int count = 0;
5710 int waittime = 1; /* seconds */
5711
5712 /* Send test unit ready until device ready, or give up. */
5713 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5714
5715 /*
5716 * Wait for a bit. do this first, because if we send
5717 * the TUR right away, the reset will just abort it.
5718 */
5719 msleep(1000 * waittime);
5720
5721 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5722 if (!rc)
5723 break;
5724
5725 /* Increase wait time with each try, up to a point. */
5726 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5727 waittime *= 2;
5728
5729 dev_warn(&h->pdev->dev,
5730 "waiting %d secs for device to become ready.\n",
5731 waittime);
5732 }
5733
5734 return rc;
5735 }
5736
5737 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5738 unsigned char lunaddr[],
5739 int reply_queue)
5740 {
5741 int first_queue;
5742 int last_queue;
5743 int rq;
5744 int rc = 0;
5745 struct CommandList *c;
5746
5747 c = cmd_alloc(h);
5748
5749 /*
5750 * If no specific reply queue was requested, then send the TUR
5751 * repeatedly, requesting a reply on each reply queue; otherwise execute
5752 * the loop exactly once using only the specified queue.
5753 */
5754 if (reply_queue == DEFAULT_REPLY_QUEUE) {
5755 first_queue = 0;
5756 last_queue = h->nreply_queues - 1;
5757 } else {
5758 first_queue = reply_queue;
5759 last_queue = reply_queue;
5760 }
5761
5762 for (rq = first_queue; rq <= last_queue; rq++) {
5763 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5764 if (rc)
5765 break;
5766 }
5767
5768 if (rc)
5769 dev_warn(&h->pdev->dev, "giving up on device.\n");
5770 else
5771 dev_warn(&h->pdev->dev, "device is ready.\n");
5772
5773 cmd_free(h, c);
5774 return rc;
5775 }
5776
5777 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5778 * complaining. Doing a host- or bus-reset can't do anything good here.
5779 */
5780 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5781 {
5782 int rc;
5783 struct ctlr_info *h;
5784 struct hpsa_scsi_dev_t *dev;
5785 u8 reset_type;
5786 char msg[48];
5787
5788 /* find the controller to which the command to be aborted was sent */
5789 h = sdev_to_hba(scsicmd->device);
5790 if (h == NULL) /* paranoia */
5791 return FAILED;
5792
5793 if (lockup_detected(h))
5794 return FAILED;
5795
5796 dev = scsicmd->device->hostdata;
5797 if (!dev) {
5798 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5799 return FAILED;
5800 }
5801
5802 /* if controller locked up, we can guarantee command won't complete */
5803 if (lockup_detected(h)) {
5804 snprintf(msg, sizeof(msg),
5805 "cmd %d RESET FAILED, lockup detected",
5806 hpsa_get_cmd_index(scsicmd));
5807 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5808 return FAILED;
5809 }
5810
5811 /* this reset request might be the result of a lockup; check */
5812 if (detect_controller_lockup(h)) {
5813 snprintf(msg, sizeof(msg),
5814 "cmd %d RESET FAILED, new lockup detected",
5815 hpsa_get_cmd_index(scsicmd));
5816 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5817 return FAILED;
5818 }
5819
5820 /* Do not attempt on controller */
5821 if (is_hba_lunid(dev->scsi3addr))
5822 return SUCCESS;
5823
5824 if (is_logical_dev_addr_mode(dev->scsi3addr))
5825 reset_type = HPSA_DEVICE_RESET_MSG;
5826 else
5827 reset_type = HPSA_PHYS_TARGET_RESET;
5828
5829 sprintf(msg, "resetting %s",
5830 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
5831 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5832
5833 h->reset_in_progress = 1;
5834
5835 /* send a reset to the SCSI LUN which the command was sent to */
5836 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type,
5837 DEFAULT_REPLY_QUEUE);
5838 sprintf(msg, "reset %s %s",
5839 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
5840 rc == 0 ? "completed successfully" : "failed");
5841 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5842 h->reset_in_progress = 0;
5843 return rc == 0 ? SUCCESS : FAILED;
5844 }
5845
5846 static void swizzle_abort_tag(u8 *tag)
5847 {
5848 u8 original_tag[8];
5849
5850 memcpy(original_tag, tag, 8);
5851 tag[0] = original_tag[3];
5852 tag[1] = original_tag[2];
5853 tag[2] = original_tag[1];
5854 tag[3] = original_tag[0];
5855 tag[4] = original_tag[7];
5856 tag[5] = original_tag[6];
5857 tag[6] = original_tag[5];
5858 tag[7] = original_tag[4];
5859 }
5860
5861 static void hpsa_get_tag(struct ctlr_info *h,
5862 struct CommandList *c, __le32 *taglower, __le32 *tagupper)
5863 {
5864 u64 tag;
5865 if (c->cmd_type == CMD_IOACCEL1) {
5866 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
5867 &h->ioaccel_cmd_pool[c->cmdindex];
5868 tag = le64_to_cpu(cm1->tag);
5869 *tagupper = cpu_to_le32(tag >> 32);
5870 *taglower = cpu_to_le32(tag);
5871 return;
5872 }
5873 if (c->cmd_type == CMD_IOACCEL2) {
5874 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
5875 &h->ioaccel2_cmd_pool[c->cmdindex];
5876 /* upper tag not used in ioaccel2 mode */
5877 memset(tagupper, 0, sizeof(*tagupper));
5878 *taglower = cm2->Tag;
5879 return;
5880 }
5881 tag = le64_to_cpu(c->Header.tag);
5882 *tagupper = cpu_to_le32(tag >> 32);
5883 *taglower = cpu_to_le32(tag);
5884 }
5885
5886 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
5887 struct CommandList *abort, int reply_queue)
5888 {
5889 int rc = IO_OK;
5890 struct CommandList *c;
5891 struct ErrorInfo *ei;
5892 __le32 tagupper, taglower;
5893
5894 c = cmd_alloc(h);
5895
5896 /* fill_cmd can't fail here, no buffer to map */
5897 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
5898 0, 0, scsi3addr, TYPE_MSG);
5899 if (h->needs_abort_tags_swizzled)
5900 swizzle_abort_tag(&c->Request.CDB[4]);
5901 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
5902 hpsa_get_tag(h, abort, &taglower, &tagupper);
5903 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
5904 __func__, tagupper, taglower);
5905 /* no unmap needed here because no data xfer. */
5906
5907 ei = c->err_info;
5908 switch (ei->CommandStatus) {
5909 case CMD_SUCCESS:
5910 break;
5911 case CMD_TMF_STATUS:
5912 rc = hpsa_evaluate_tmf_status(h, c);
5913 break;
5914 case CMD_UNABORTABLE: /* Very common, don't make noise. */
5915 rc = -1;
5916 break;
5917 default:
5918 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
5919 __func__, tagupper, taglower);
5920 hpsa_scsi_interpret_error(h, c);
5921 rc = -1;
5922 break;
5923 }
5924 cmd_free(h, c);
5925 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
5926 __func__, tagupper, taglower);
5927 return rc;
5928 }
5929
5930 static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h,
5931 struct CommandList *command_to_abort, int reply_queue)
5932 {
5933 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5934 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
5935 struct io_accel2_cmd *c2a =
5936 &h->ioaccel2_cmd_pool[command_to_abort->cmdindex];
5937 struct scsi_cmnd *scmd = command_to_abort->scsi_cmd;
5938 struct hpsa_scsi_dev_t *dev = scmd->device->hostdata;
5939
5940 if (!dev)
5941 return;
5942
5943 /*
5944 * We're overlaying struct hpsa_tmf_struct on top of something which
5945 * was allocated as a struct io_accel2_cmd, so we better be sure it
5946 * actually fits, and doesn't overrun the error info space.
5947 */
5948 BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) >
5949 sizeof(struct io_accel2_cmd));
5950 BUG_ON(offsetof(struct io_accel2_cmd, error_data) <
5951 offsetof(struct hpsa_tmf_struct, error_len) +
5952 sizeof(ac->error_len));
5953
5954 c->cmd_type = IOACCEL2_TMF;
5955 c->scsi_cmd = SCSI_CMD_BUSY;
5956
5957 /* Adjust the DMA address to point to the accelerated command buffer */
5958 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
5959 (c->cmdindex * sizeof(struct io_accel2_cmd));
5960 BUG_ON(c->busaddr & 0x0000007F);
5961
5962 memset(ac, 0, sizeof(*c2)); /* yes this is correct */
5963 ac->iu_type = IOACCEL2_IU_TMF_TYPE;
5964 ac->reply_queue = reply_queue;
5965 ac->tmf = IOACCEL2_TMF_ABORT;
5966 ac->it_nexus = cpu_to_le32(dev->ioaccel_handle);
5967 memset(ac->lun_id, 0, sizeof(ac->lun_id));
5968 ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5969 ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag));
5970 ac->error_ptr = cpu_to_le64(c->busaddr +
5971 offsetof(struct io_accel2_cmd, error_data));
5972 ac->error_len = cpu_to_le32(sizeof(c2->error_data));
5973 }
5974
5975 /* ioaccel2 path firmware cannot handle abort task requests.
5976 * Change abort requests to physical target reset, and send to the
5977 * address of the physical disk used for the ioaccel 2 command.
5978 * Return 0 on success (IO_OK)
5979 * -1 on failure
5980 */
5981
5982 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
5983 unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
5984 {
5985 int rc = IO_OK;
5986 struct scsi_cmnd *scmd; /* scsi command within request being aborted */
5987 struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
5988 unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
5989 unsigned char *psa = &phys_scsi3addr[0];
5990
5991 /* Get a pointer to the hpsa logical device. */
5992 scmd = abort->scsi_cmd;
5993 dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
5994 if (dev == NULL) {
5995 dev_warn(&h->pdev->dev,
5996 "Cannot abort: no device pointer for command.\n");
5997 return -1; /* not abortable */
5998 }
5999
6000 if (h->raid_offload_debug > 0)
6001 dev_info(&h->pdev->dev,
6002 "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
6003 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
6004 "Reset as abort",
6005 scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
6006 scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
6007
6008 if (!dev->offload_enabled) {
6009 dev_warn(&h->pdev->dev,
6010 "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
6011 return -1; /* not abortable */
6012 }
6013
6014 /* Incoming scsi3addr is logical addr. We need physical disk addr. */
6015 if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
6016 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
6017 return -1; /* not abortable */
6018 }
6019
6020 /* send the reset */
6021 if (h->raid_offload_debug > 0)
6022 dev_info(&h->pdev->dev,
6023 "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
6024 psa[0], psa[1], psa[2], psa[3],
6025 psa[4], psa[5], psa[6], psa[7]);
6026 rc = hpsa_do_reset(h, dev, psa, HPSA_PHYS_TARGET_RESET, reply_queue);
6027 if (rc != 0) {
6028 dev_warn(&h->pdev->dev,
6029 "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
6030 psa[0], psa[1], psa[2], psa[3],
6031 psa[4], psa[5], psa[6], psa[7]);
6032 return rc; /* failed to reset */
6033 }
6034
6035 /* wait for device to recover */
6036 if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) {
6037 dev_warn(&h->pdev->dev,
6038 "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
6039 psa[0], psa[1], psa[2], psa[3],
6040 psa[4], psa[5], psa[6], psa[7]);
6041 return -1; /* failed to recover */
6042 }
6043
6044 /* device recovered */
6045 dev_info(&h->pdev->dev,
6046 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
6047 psa[0], psa[1], psa[2], psa[3],
6048 psa[4], psa[5], psa[6], psa[7]);
6049
6050 return rc; /* success */
6051 }
6052
6053 static int hpsa_send_abort_ioaccel2(struct ctlr_info *h,
6054 struct CommandList *abort, int reply_queue)
6055 {
6056 int rc = IO_OK;
6057 struct CommandList *c;
6058 __le32 taglower, tagupper;
6059 struct hpsa_scsi_dev_t *dev;
6060 struct io_accel2_cmd *c2;
6061
6062 dev = abort->scsi_cmd->device->hostdata;
6063 if (!dev)
6064 return -1;
6065
6066 if (!dev->offload_enabled && !dev->hba_ioaccel_enabled)
6067 return -1;
6068
6069 c = cmd_alloc(h);
6070 setup_ioaccel2_abort_cmd(c, h, abort, reply_queue);
6071 c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
6072 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
6073 hpsa_get_tag(h, abort, &taglower, &tagupper);
6074 dev_dbg(&h->pdev->dev,
6075 "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n",
6076 __func__, tagupper, taglower);
6077 /* no unmap needed here because no data xfer. */
6078
6079 dev_dbg(&h->pdev->dev,
6080 "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n",
6081 __func__, tagupper, taglower, c2->error_data.serv_response);
6082 switch (c2->error_data.serv_response) {
6083 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
6084 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
6085 rc = 0;
6086 break;
6087 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
6088 case IOACCEL2_SERV_RESPONSE_FAILURE:
6089 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
6090 rc = -1;
6091 break;
6092 default:
6093 dev_warn(&h->pdev->dev,
6094 "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n",
6095 __func__, tagupper, taglower,
6096 c2->error_data.serv_response);
6097 rc = -1;
6098 }
6099 cmd_free(h, c);
6100 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
6101 tagupper, taglower);
6102 return rc;
6103 }
6104
6105 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
6106 struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue)
6107 {
6108 /*
6109 * ioccelerator mode 2 commands should be aborted via the
6110 * accelerated path, since RAID path is unaware of these commands,
6111 * but not all underlying firmware can handle abort TMF.
6112 * Change abort to physical device reset when abort TMF is unsupported.
6113 */
6114 if (abort->cmd_type == CMD_IOACCEL2) {
6115 if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) ||
6116 dev->physical_device)
6117 return hpsa_send_abort_ioaccel2(h, abort,
6118 reply_queue);
6119 else
6120 return hpsa_send_reset_as_abort_ioaccel2(h,
6121 dev->scsi3addr,
6122 abort, reply_queue);
6123 }
6124 return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue);
6125 }
6126
6127 /* Find out which reply queue a command was meant to return on */
6128 static int hpsa_extract_reply_queue(struct ctlr_info *h,
6129 struct CommandList *c)
6130 {
6131 if (c->cmd_type == CMD_IOACCEL2)
6132 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
6133 return c->Header.ReplyQueue;
6134 }
6135
6136 /*
6137 * Limit concurrency of abort commands to prevent
6138 * over-subscription of commands
6139 */
6140 static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
6141 {
6142 #define ABORT_CMD_WAIT_MSECS 5000
6143 return !wait_event_timeout(h->abort_cmd_wait_queue,
6144 atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
6145 msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
6146 }
6147
6148 /* Send an abort for the specified command.
6149 * If the device and controller support it,
6150 * send a task abort request.
6151 */
6152 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
6153 {
6154
6155 int rc;
6156 struct ctlr_info *h;
6157 struct hpsa_scsi_dev_t *dev;
6158 struct CommandList *abort; /* pointer to command to be aborted */
6159 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
6160 char msg[256]; /* For debug messaging. */
6161 int ml = 0;
6162 __le32 tagupper, taglower;
6163 int refcount, reply_queue;
6164
6165 if (sc == NULL)
6166 return FAILED;
6167
6168 if (sc->device == NULL)
6169 return FAILED;
6170
6171 /* Find the controller of the command to be aborted */
6172 h = sdev_to_hba(sc->device);
6173 if (h == NULL)
6174 return FAILED;
6175
6176 /* Find the device of the command to be aborted */
6177 dev = sc->device->hostdata;
6178 if (!dev) {
6179 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
6180 msg);
6181 return FAILED;
6182 }
6183
6184 /* If controller locked up, we can guarantee command won't complete */
6185 if (lockup_detected(h)) {
6186 hpsa_show_dev_msg(KERN_WARNING, h, dev,
6187 "ABORT FAILED, lockup detected");
6188 return FAILED;
6189 }
6190
6191 /* This is a good time to check if controller lockup has occurred */
6192 if (detect_controller_lockup(h)) {
6193 hpsa_show_dev_msg(KERN_WARNING, h, dev,
6194 "ABORT FAILED, new lockup detected");
6195 return FAILED;
6196 }
6197
6198 /* Check that controller supports some kind of task abort */
6199 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
6200 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
6201 return FAILED;
6202
6203 memset(msg, 0, sizeof(msg));
6204 ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p",
6205 h->scsi_host->host_no, sc->device->channel,
6206 sc->device->id, sc->device->lun,
6207 "Aborting command", sc);
6208
6209 /* Get SCSI command to be aborted */
6210 abort = (struct CommandList *) sc->host_scribble;
6211 if (abort == NULL) {
6212 /* This can happen if the command already completed. */
6213 return SUCCESS;
6214 }
6215 refcount = atomic_inc_return(&abort->refcount);
6216 if (refcount == 1) { /* Command is done already. */
6217 cmd_free(h, abort);
6218 return SUCCESS;
6219 }
6220
6221 /* Don't bother trying the abort if we know it won't work. */
6222 if (abort->cmd_type != CMD_IOACCEL2 &&
6223 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
6224 cmd_free(h, abort);
6225 return FAILED;
6226 }
6227
6228 /*
6229 * Check that we're aborting the right command.
6230 * It's possible the CommandList already completed and got re-used.
6231 */
6232 if (abort->scsi_cmd != sc) {
6233 cmd_free(h, abort);
6234 return SUCCESS;
6235 }
6236
6237 abort->abort_pending = true;
6238 hpsa_get_tag(h, abort, &taglower, &tagupper);
6239 reply_queue = hpsa_extract_reply_queue(h, abort);
6240 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
6241 as = abort->scsi_cmd;
6242 if (as != NULL)
6243 ml += sprintf(msg+ml,
6244 "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ",
6245 as->cmd_len, as->cmnd[0], as->cmnd[1],
6246 as->serial_number);
6247 dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg);
6248 hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
6249
6250 /*
6251 * Command is in flight, or possibly already completed
6252 * by the firmware (but not to the scsi mid layer) but we can't
6253 * distinguish which. Send the abort down.
6254 */
6255 if (wait_for_available_abort_cmd(h)) {
6256 dev_warn(&h->pdev->dev,
6257 "%s FAILED, timeout waiting for an abort command to become available.\n",
6258 msg);
6259 cmd_free(h, abort);
6260 return FAILED;
6261 }
6262 rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue);
6263 atomic_inc(&h->abort_cmds_available);
6264 wake_up_all(&h->abort_cmd_wait_queue);
6265 if (rc != 0) {
6266 dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg);
6267 hpsa_show_dev_msg(KERN_WARNING, h, dev,
6268 "FAILED to abort command");
6269 cmd_free(h, abort);
6270 return FAILED;
6271 }
6272 dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg);
6273 wait_event(h->event_sync_wait_queue,
6274 abort->scsi_cmd != sc || lockup_detected(h));
6275 cmd_free(h, abort);
6276 return !lockup_detected(h) ? SUCCESS : FAILED;
6277 }
6278
6279 /*
6280 * For operations with an associated SCSI command, a command block is allocated
6281 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
6282 * block request tag as an index into a table of entries. cmd_tagged_free() is
6283 * the complement, although cmd_free() may be called instead.
6284 */
6285 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
6286 struct scsi_cmnd *scmd)
6287 {
6288 int idx = hpsa_get_cmd_index(scmd);
6289 struct CommandList *c = h->cmd_pool + idx;
6290
6291 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
6292 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
6293 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
6294 /* The index value comes from the block layer, so if it's out of
6295 * bounds, it's probably not our bug.
6296 */
6297 BUG();
6298 }
6299
6300 atomic_inc(&c->refcount);
6301 if (unlikely(!hpsa_is_cmd_idle(c))) {
6302 /*
6303 * We expect that the SCSI layer will hand us a unique tag
6304 * value. Thus, there should never be a collision here between
6305 * two requests...because if the selected command isn't idle
6306 * then someone is going to be very disappointed.
6307 */
6308 dev_err(&h->pdev->dev,
6309 "tag collision (tag=%d) in cmd_tagged_alloc().\n",
6310 idx);
6311 if (c->scsi_cmd != NULL)
6312 scsi_print_command(c->scsi_cmd);
6313 scsi_print_command(scmd);
6314 }
6315
6316 hpsa_cmd_partial_init(h, idx, c);
6317 return c;
6318 }
6319
6320 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
6321 {
6322 /*
6323 * Release our reference to the block. We don't need to do anything
6324 * else to free it, because it is accessed by index. (There's no point
6325 * in checking the result of the decrement, since we cannot guarantee
6326 * that there isn't a concurrent abort which is also accessing it.)
6327 */
6328 (void)atomic_dec(&c->refcount);
6329 }
6330
6331 /*
6332 * For operations that cannot sleep, a command block is allocated at init,
6333 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6334 * which ones are free or in use. Lock must be held when calling this.
6335 * cmd_free() is the complement.
6336 * This function never gives up and returns NULL. If it hangs,
6337 * another thread must call cmd_free() to free some tags.
6338 */
6339
6340 static struct CommandList *cmd_alloc(struct ctlr_info *h)
6341 {
6342 struct CommandList *c;
6343 int refcount, i;
6344 int offset = 0;
6345
6346 /*
6347 * There is some *extremely* small but non-zero chance that that
6348 * multiple threads could get in here, and one thread could
6349 * be scanning through the list of bits looking for a free
6350 * one, but the free ones are always behind him, and other
6351 * threads sneak in behind him and eat them before he can
6352 * get to them, so that while there is always a free one, a
6353 * very unlucky thread might be starved anyway, never able to
6354 * beat the other threads. In reality, this happens so
6355 * infrequently as to be indistinguishable from never.
6356 *
6357 * Note that we start allocating commands before the SCSI host structure
6358 * is initialized. Since the search starts at bit zero, this
6359 * all works, since we have at least one command structure available;
6360 * however, it means that the structures with the low indexes have to be
6361 * reserved for driver-initiated requests, while requests from the block
6362 * layer will use the higher indexes.
6363 */
6364
6365 for (;;) {
6366 i = find_next_zero_bit(h->cmd_pool_bits,
6367 HPSA_NRESERVED_CMDS,
6368 offset);
6369 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6370 offset = 0;
6371 continue;
6372 }
6373 c = h->cmd_pool + i;
6374 refcount = atomic_inc_return(&c->refcount);
6375 if (unlikely(refcount > 1)) {
6376 cmd_free(h, c); /* already in use */
6377 offset = (i + 1) % HPSA_NRESERVED_CMDS;
6378 continue;
6379 }
6380 set_bit(i & (BITS_PER_LONG - 1),
6381 h->cmd_pool_bits + (i / BITS_PER_LONG));
6382 break; /* it's ours now. */
6383 }
6384 hpsa_cmd_partial_init(h, i, c);
6385 return c;
6386 }
6387
6388 /*
6389 * This is the complementary operation to cmd_alloc(). Note, however, in some
6390 * corner cases it may also be used to free blocks allocated by
6391 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
6392 * the clear-bit is harmless.
6393 */
6394 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6395 {
6396 if (atomic_dec_and_test(&c->refcount)) {
6397 int i;
6398
6399 i = c - h->cmd_pool;
6400 clear_bit(i & (BITS_PER_LONG - 1),
6401 h->cmd_pool_bits + (i / BITS_PER_LONG));
6402 }
6403 }
6404
6405 #ifdef CONFIG_COMPAT
6406
6407 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
6408 void __user *arg)
6409 {
6410 IOCTL32_Command_struct __user *arg32 =
6411 (IOCTL32_Command_struct __user *) arg;
6412 IOCTL_Command_struct arg64;
6413 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
6414 int err;
6415 u32 cp;
6416
6417 memset(&arg64, 0, sizeof(arg64));
6418 err = 0;
6419 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6420 sizeof(arg64.LUN_info));
6421 err |= copy_from_user(&arg64.Request, &arg32->Request,
6422 sizeof(arg64.Request));
6423 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6424 sizeof(arg64.error_info));
6425 err |= get_user(arg64.buf_size, &arg32->buf_size);
6426 err |= get_user(cp, &arg32->buf);
6427 arg64.buf = compat_ptr(cp);
6428 err |= copy_to_user(p, &arg64, sizeof(arg64));
6429
6430 if (err)
6431 return -EFAULT;
6432
6433 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
6434 if (err)
6435 return err;
6436 err |= copy_in_user(&arg32->error_info, &p->error_info,
6437 sizeof(arg32->error_info));
6438 if (err)
6439 return -EFAULT;
6440 return err;
6441 }
6442
6443 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
6444 int cmd, void __user *arg)
6445 {
6446 BIG_IOCTL32_Command_struct __user *arg32 =
6447 (BIG_IOCTL32_Command_struct __user *) arg;
6448 BIG_IOCTL_Command_struct arg64;
6449 BIG_IOCTL_Command_struct __user *p =
6450 compat_alloc_user_space(sizeof(arg64));
6451 int err;
6452 u32 cp;
6453
6454 memset(&arg64, 0, sizeof(arg64));
6455 err = 0;
6456 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6457 sizeof(arg64.LUN_info));
6458 err |= copy_from_user(&arg64.Request, &arg32->Request,
6459 sizeof(arg64.Request));
6460 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6461 sizeof(arg64.error_info));
6462 err |= get_user(arg64.buf_size, &arg32->buf_size);
6463 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
6464 err |= get_user(cp, &arg32->buf);
6465 arg64.buf = compat_ptr(cp);
6466 err |= copy_to_user(p, &arg64, sizeof(arg64));
6467
6468 if (err)
6469 return -EFAULT;
6470
6471 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
6472 if (err)
6473 return err;
6474 err |= copy_in_user(&arg32->error_info, &p->error_info,
6475 sizeof(arg32->error_info));
6476 if (err)
6477 return -EFAULT;
6478 return err;
6479 }
6480
6481 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6482 {
6483 switch (cmd) {
6484 case CCISS_GETPCIINFO:
6485 case CCISS_GETINTINFO:
6486 case CCISS_SETINTINFO:
6487 case CCISS_GETNODENAME:
6488 case CCISS_SETNODENAME:
6489 case CCISS_GETHEARTBEAT:
6490 case CCISS_GETBUSTYPES:
6491 case CCISS_GETFIRMVER:
6492 case CCISS_GETDRIVVER:
6493 case CCISS_REVALIDVOLS:
6494 case CCISS_DEREGDISK:
6495 case CCISS_REGNEWDISK:
6496 case CCISS_REGNEWD:
6497 case CCISS_RESCANDISK:
6498 case CCISS_GETLUNINFO:
6499 return hpsa_ioctl(dev, cmd, arg);
6500
6501 case CCISS_PASSTHRU32:
6502 return hpsa_ioctl32_passthru(dev, cmd, arg);
6503 case CCISS_BIG_PASSTHRU32:
6504 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6505
6506 default:
6507 return -ENOIOCTLCMD;
6508 }
6509 }
6510 #endif
6511
6512 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6513 {
6514 struct hpsa_pci_info pciinfo;
6515
6516 if (!argp)
6517 return -EINVAL;
6518 pciinfo.domain = pci_domain_nr(h->pdev->bus);
6519 pciinfo.bus = h->pdev->bus->number;
6520 pciinfo.dev_fn = h->pdev->devfn;
6521 pciinfo.board_id = h->board_id;
6522 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6523 return -EFAULT;
6524 return 0;
6525 }
6526
6527 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6528 {
6529 DriverVer_type DriverVer;
6530 unsigned char vmaj, vmin, vsubmin;
6531 int rc;
6532
6533 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6534 &vmaj, &vmin, &vsubmin);
6535 if (rc != 3) {
6536 dev_info(&h->pdev->dev, "driver version string '%s' "
6537 "unrecognized.", HPSA_DRIVER_VERSION);
6538 vmaj = 0;
6539 vmin = 0;
6540 vsubmin = 0;
6541 }
6542 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6543 if (!argp)
6544 return -EINVAL;
6545 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6546 return -EFAULT;
6547 return 0;
6548 }
6549
6550 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6551 {
6552 IOCTL_Command_struct iocommand;
6553 struct CommandList *c;
6554 char *buff = NULL;
6555 u64 temp64;
6556 int rc = 0;
6557
6558 if (!argp)
6559 return -EINVAL;
6560 if (!capable(CAP_SYS_RAWIO))
6561 return -EPERM;
6562 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6563 return -EFAULT;
6564 if ((iocommand.buf_size < 1) &&
6565 (iocommand.Request.Type.Direction != XFER_NONE)) {
6566 return -EINVAL;
6567 }
6568 if (iocommand.buf_size > 0) {
6569 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
6570 if (buff == NULL)
6571 return -ENOMEM;
6572 if (iocommand.Request.Type.Direction & XFER_WRITE) {
6573 /* Copy the data into the buffer we created */
6574 if (copy_from_user(buff, iocommand.buf,
6575 iocommand.buf_size)) {
6576 rc = -EFAULT;
6577 goto out_kfree;
6578 }
6579 } else {
6580 memset(buff, 0, iocommand.buf_size);
6581 }
6582 }
6583 c = cmd_alloc(h);
6584
6585 /* Fill in the command type */
6586 c->cmd_type = CMD_IOCTL_PEND;
6587 c->scsi_cmd = SCSI_CMD_BUSY;
6588 /* Fill in Command Header */
6589 c->Header.ReplyQueue = 0; /* unused in simple mode */
6590 if (iocommand.buf_size > 0) { /* buffer to fill */
6591 c->Header.SGList = 1;
6592 c->Header.SGTotal = cpu_to_le16(1);
6593 } else { /* no buffers to fill */
6594 c->Header.SGList = 0;
6595 c->Header.SGTotal = cpu_to_le16(0);
6596 }
6597 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
6598
6599 /* Fill in Request block */
6600 memcpy(&c->Request, &iocommand.Request,
6601 sizeof(c->Request));
6602
6603 /* Fill in the scatter gather information */
6604 if (iocommand.buf_size > 0) {
6605 temp64 = pci_map_single(h->pdev, buff,
6606 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
6607 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6608 c->SG[0].Addr = cpu_to_le64(0);
6609 c->SG[0].Len = cpu_to_le32(0);
6610 rc = -ENOMEM;
6611 goto out;
6612 }
6613 c->SG[0].Addr = cpu_to_le64(temp64);
6614 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
6615 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6616 }
6617 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6618 NO_TIMEOUT);
6619 if (iocommand.buf_size > 0)
6620 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
6621 check_ioctl_unit_attention(h, c);
6622 if (rc) {
6623 rc = -EIO;
6624 goto out;
6625 }
6626
6627 /* Copy the error information out */
6628 memcpy(&iocommand.error_info, c->err_info,
6629 sizeof(iocommand.error_info));
6630 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6631 rc = -EFAULT;
6632 goto out;
6633 }
6634 if ((iocommand.Request.Type.Direction & XFER_READ) &&
6635 iocommand.buf_size > 0) {
6636 /* Copy the data out of the buffer we created */
6637 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6638 rc = -EFAULT;
6639 goto out;
6640 }
6641 }
6642 out:
6643 cmd_free(h, c);
6644 out_kfree:
6645 kfree(buff);
6646 return rc;
6647 }
6648
6649 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6650 {
6651 BIG_IOCTL_Command_struct *ioc;
6652 struct CommandList *c;
6653 unsigned char **buff = NULL;
6654 int *buff_size = NULL;
6655 u64 temp64;
6656 BYTE sg_used = 0;
6657 int status = 0;
6658 u32 left;
6659 u32 sz;
6660 BYTE __user *data_ptr;
6661
6662 if (!argp)
6663 return -EINVAL;
6664 if (!capable(CAP_SYS_RAWIO))
6665 return -EPERM;
6666 ioc = (BIG_IOCTL_Command_struct *)
6667 kmalloc(sizeof(*ioc), GFP_KERNEL);
6668 if (!ioc) {
6669 status = -ENOMEM;
6670 goto cleanup1;
6671 }
6672 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6673 status = -EFAULT;
6674 goto cleanup1;
6675 }
6676 if ((ioc->buf_size < 1) &&
6677 (ioc->Request.Type.Direction != XFER_NONE)) {
6678 status = -EINVAL;
6679 goto cleanup1;
6680 }
6681 /* Check kmalloc limits using all SGs */
6682 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6683 status = -EINVAL;
6684 goto cleanup1;
6685 }
6686 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6687 status = -EINVAL;
6688 goto cleanup1;
6689 }
6690 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
6691 if (!buff) {
6692 status = -ENOMEM;
6693 goto cleanup1;
6694 }
6695 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
6696 if (!buff_size) {
6697 status = -ENOMEM;
6698 goto cleanup1;
6699 }
6700 left = ioc->buf_size;
6701 data_ptr = ioc->buf;
6702 while (left) {
6703 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6704 buff_size[sg_used] = sz;
6705 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6706 if (buff[sg_used] == NULL) {
6707 status = -ENOMEM;
6708 goto cleanup1;
6709 }
6710 if (ioc->Request.Type.Direction & XFER_WRITE) {
6711 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6712 status = -EFAULT;
6713 goto cleanup1;
6714 }
6715 } else
6716 memset(buff[sg_used], 0, sz);
6717 left -= sz;
6718 data_ptr += sz;
6719 sg_used++;
6720 }
6721 c = cmd_alloc(h);
6722
6723 c->cmd_type = CMD_IOCTL_PEND;
6724 c->scsi_cmd = SCSI_CMD_BUSY;
6725 c->Header.ReplyQueue = 0;
6726 c->Header.SGList = (u8) sg_used;
6727 c->Header.SGTotal = cpu_to_le16(sg_used);
6728 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6729 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6730 if (ioc->buf_size > 0) {
6731 int i;
6732 for (i = 0; i < sg_used; i++) {
6733 temp64 = pci_map_single(h->pdev, buff[i],
6734 buff_size[i], PCI_DMA_BIDIRECTIONAL);
6735 if (dma_mapping_error(&h->pdev->dev,
6736 (dma_addr_t) temp64)) {
6737 c->SG[i].Addr = cpu_to_le64(0);
6738 c->SG[i].Len = cpu_to_le32(0);
6739 hpsa_pci_unmap(h->pdev, c, i,
6740 PCI_DMA_BIDIRECTIONAL);
6741 status = -ENOMEM;
6742 goto cleanup0;
6743 }
6744 c->SG[i].Addr = cpu_to_le64(temp64);
6745 c->SG[i].Len = cpu_to_le32(buff_size[i]);
6746 c->SG[i].Ext = cpu_to_le32(0);
6747 }
6748 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6749 }
6750 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6751 NO_TIMEOUT);
6752 if (sg_used)
6753 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6754 check_ioctl_unit_attention(h, c);
6755 if (status) {
6756 status = -EIO;
6757 goto cleanup0;
6758 }
6759
6760 /* Copy the error information out */
6761 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6762 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6763 status = -EFAULT;
6764 goto cleanup0;
6765 }
6766 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6767 int i;
6768
6769 /* Copy the data out of the buffer we created */
6770 BYTE __user *ptr = ioc->buf;
6771 for (i = 0; i < sg_used; i++) {
6772 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6773 status = -EFAULT;
6774 goto cleanup0;
6775 }
6776 ptr += buff_size[i];
6777 }
6778 }
6779 status = 0;
6780 cleanup0:
6781 cmd_free(h, c);
6782 cleanup1:
6783 if (buff) {
6784 int i;
6785
6786 for (i = 0; i < sg_used; i++)
6787 kfree(buff[i]);
6788 kfree(buff);
6789 }
6790 kfree(buff_size);
6791 kfree(ioc);
6792 return status;
6793 }
6794
6795 static void check_ioctl_unit_attention(struct ctlr_info *h,
6796 struct CommandList *c)
6797 {
6798 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6799 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6800 (void) check_for_unit_attention(h, c);
6801 }
6802
6803 /*
6804 * ioctl
6805 */
6806 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6807 {
6808 struct ctlr_info *h;
6809 void __user *argp = (void __user *)arg;
6810 int rc;
6811
6812 h = sdev_to_hba(dev);
6813
6814 switch (cmd) {
6815 case CCISS_DEREGDISK:
6816 case CCISS_REGNEWDISK:
6817 case CCISS_REGNEWD:
6818 hpsa_scan_start(h->scsi_host);
6819 return 0;
6820 case CCISS_GETPCIINFO:
6821 return hpsa_getpciinfo_ioctl(h, argp);
6822 case CCISS_GETDRIVVER:
6823 return hpsa_getdrivver_ioctl(h, argp);
6824 case CCISS_PASSTHRU:
6825 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6826 return -EAGAIN;
6827 rc = hpsa_passthru_ioctl(h, argp);
6828 atomic_inc(&h->passthru_cmds_avail);
6829 return rc;
6830 case CCISS_BIG_PASSTHRU:
6831 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6832 return -EAGAIN;
6833 rc = hpsa_big_passthru_ioctl(h, argp);
6834 atomic_inc(&h->passthru_cmds_avail);
6835 return rc;
6836 default:
6837 return -ENOTTY;
6838 }
6839 }
6840
6841 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
6842 u8 reset_type)
6843 {
6844 struct CommandList *c;
6845
6846 c = cmd_alloc(h);
6847
6848 /* fill_cmd can't fail here, no data buffer to map */
6849 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6850 RAID_CTLR_LUNID, TYPE_MSG);
6851 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6852 c->waiting = NULL;
6853 enqueue_cmd_and_start_io(h, c);
6854 /* Don't wait for completion, the reset won't complete. Don't free
6855 * the command either. This is the last command we will send before
6856 * re-initializing everything, so it doesn't matter and won't leak.
6857 */
6858 return;
6859 }
6860
6861 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6862 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6863 int cmd_type)
6864 {
6865 int pci_dir = XFER_NONE;
6866 u64 tag; /* for commands to be aborted */
6867
6868 c->cmd_type = CMD_IOCTL_PEND;
6869 c->scsi_cmd = SCSI_CMD_BUSY;
6870 c->Header.ReplyQueue = 0;
6871 if (buff != NULL && size > 0) {
6872 c->Header.SGList = 1;
6873 c->Header.SGTotal = cpu_to_le16(1);
6874 } else {
6875 c->Header.SGList = 0;
6876 c->Header.SGTotal = cpu_to_le16(0);
6877 }
6878 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6879
6880 if (cmd_type == TYPE_CMD) {
6881 switch (cmd) {
6882 case HPSA_INQUIRY:
6883 /* are we trying to read a vital product page */
6884 if (page_code & VPD_PAGE) {
6885 c->Request.CDB[1] = 0x01;
6886 c->Request.CDB[2] = (page_code & 0xff);
6887 }
6888 c->Request.CDBLen = 6;
6889 c->Request.type_attr_dir =
6890 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6891 c->Request.Timeout = 0;
6892 c->Request.CDB[0] = HPSA_INQUIRY;
6893 c->Request.CDB[4] = size & 0xFF;
6894 break;
6895 case HPSA_REPORT_LOG:
6896 case HPSA_REPORT_PHYS:
6897 /* Talking to controller so It's a physical command
6898 mode = 00 target = 0. Nothing to write.
6899 */
6900 c->Request.CDBLen = 12;
6901 c->Request.type_attr_dir =
6902 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6903 c->Request.Timeout = 0;
6904 c->Request.CDB[0] = cmd;
6905 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6906 c->Request.CDB[7] = (size >> 16) & 0xFF;
6907 c->Request.CDB[8] = (size >> 8) & 0xFF;
6908 c->Request.CDB[9] = size & 0xFF;
6909 break;
6910 case BMIC_SENSE_DIAG_OPTIONS:
6911 c->Request.CDBLen = 16;
6912 c->Request.type_attr_dir =
6913 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6914 c->Request.Timeout = 0;
6915 /* Spec says this should be BMIC_WRITE */
6916 c->Request.CDB[0] = BMIC_READ;
6917 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6918 break;
6919 case BMIC_SET_DIAG_OPTIONS:
6920 c->Request.CDBLen = 16;
6921 c->Request.type_attr_dir =
6922 TYPE_ATTR_DIR(cmd_type,
6923 ATTR_SIMPLE, XFER_WRITE);
6924 c->Request.Timeout = 0;
6925 c->Request.CDB[0] = BMIC_WRITE;
6926 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6927 break;
6928 case HPSA_CACHE_FLUSH:
6929 c->Request.CDBLen = 12;
6930 c->Request.type_attr_dir =
6931 TYPE_ATTR_DIR(cmd_type,
6932 ATTR_SIMPLE, XFER_WRITE);
6933 c->Request.Timeout = 0;
6934 c->Request.CDB[0] = BMIC_WRITE;
6935 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6936 c->Request.CDB[7] = (size >> 8) & 0xFF;
6937 c->Request.CDB[8] = size & 0xFF;
6938 break;
6939 case TEST_UNIT_READY:
6940 c->Request.CDBLen = 6;
6941 c->Request.type_attr_dir =
6942 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6943 c->Request.Timeout = 0;
6944 break;
6945 case HPSA_GET_RAID_MAP:
6946 c->Request.CDBLen = 12;
6947 c->Request.type_attr_dir =
6948 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6949 c->Request.Timeout = 0;
6950 c->Request.CDB[0] = HPSA_CISS_READ;
6951 c->Request.CDB[1] = cmd;
6952 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6953 c->Request.CDB[7] = (size >> 16) & 0xFF;
6954 c->Request.CDB[8] = (size >> 8) & 0xFF;
6955 c->Request.CDB[9] = size & 0xFF;
6956 break;
6957 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6958 c->Request.CDBLen = 10;
6959 c->Request.type_attr_dir =
6960 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6961 c->Request.Timeout = 0;
6962 c->Request.CDB[0] = BMIC_READ;
6963 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6964 c->Request.CDB[7] = (size >> 16) & 0xFF;
6965 c->Request.CDB[8] = (size >> 8) & 0xFF;
6966 break;
6967 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6968 c->Request.CDBLen = 10;
6969 c->Request.type_attr_dir =
6970 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6971 c->Request.Timeout = 0;
6972 c->Request.CDB[0] = BMIC_READ;
6973 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6974 c->Request.CDB[7] = (size >> 16) & 0xFF;
6975 c->Request.CDB[8] = (size >> 8) & 0XFF;
6976 break;
6977 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6978 c->Request.CDBLen = 10;
6979 c->Request.type_attr_dir =
6980 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6981 c->Request.Timeout = 0;
6982 c->Request.CDB[0] = BMIC_READ;
6983 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6984 c->Request.CDB[7] = (size >> 16) & 0xFF;
6985 c->Request.CDB[8] = (size >> 8) & 0XFF;
6986 break;
6987 case BMIC_SENSE_STORAGE_BOX_PARAMS:
6988 c->Request.CDBLen = 10;
6989 c->Request.type_attr_dir =
6990 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6991 c->Request.Timeout = 0;
6992 c->Request.CDB[0] = BMIC_READ;
6993 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6994 c->Request.CDB[7] = (size >> 16) & 0xFF;
6995 c->Request.CDB[8] = (size >> 8) & 0XFF;
6996 break;
6997 case BMIC_IDENTIFY_CONTROLLER:
6998 c->Request.CDBLen = 10;
6999 c->Request.type_attr_dir =
7000 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
7001 c->Request.Timeout = 0;
7002 c->Request.CDB[0] = BMIC_READ;
7003 c->Request.CDB[1] = 0;
7004 c->Request.CDB[2] = 0;
7005 c->Request.CDB[3] = 0;
7006 c->Request.CDB[4] = 0;
7007 c->Request.CDB[5] = 0;
7008 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
7009 c->Request.CDB[7] = (size >> 16) & 0xFF;
7010 c->Request.CDB[8] = (size >> 8) & 0XFF;
7011 c->Request.CDB[9] = 0;
7012 break;
7013 default:
7014 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
7015 BUG();
7016 return -1;
7017 }
7018 } else if (cmd_type == TYPE_MSG) {
7019 switch (cmd) {
7020
7021 case HPSA_PHYS_TARGET_RESET:
7022 c->Request.CDBLen = 16;
7023 c->Request.type_attr_dir =
7024 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
7025 c->Request.Timeout = 0; /* Don't time out */
7026 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7027 c->Request.CDB[0] = HPSA_RESET;
7028 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
7029 /* Physical target reset needs no control bytes 4-7*/
7030 c->Request.CDB[4] = 0x00;
7031 c->Request.CDB[5] = 0x00;
7032 c->Request.CDB[6] = 0x00;
7033 c->Request.CDB[7] = 0x00;
7034 break;
7035 case HPSA_DEVICE_RESET_MSG:
7036 c->Request.CDBLen = 16;
7037 c->Request.type_attr_dir =
7038 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
7039 c->Request.Timeout = 0; /* Don't time out */
7040 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7041 c->Request.CDB[0] = cmd;
7042 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
7043 /* If bytes 4-7 are zero, it means reset the */
7044 /* LunID device */
7045 c->Request.CDB[4] = 0x00;
7046 c->Request.CDB[5] = 0x00;
7047 c->Request.CDB[6] = 0x00;
7048 c->Request.CDB[7] = 0x00;
7049 break;
7050 case HPSA_ABORT_MSG:
7051 memcpy(&tag, buff, sizeof(tag));
7052 dev_dbg(&h->pdev->dev,
7053 "Abort Tag:0x%016llx using rqst Tag:0x%016llx",
7054 tag, c->Header.tag);
7055 c->Request.CDBLen = 16;
7056 c->Request.type_attr_dir =
7057 TYPE_ATTR_DIR(cmd_type,
7058 ATTR_SIMPLE, XFER_WRITE);
7059 c->Request.Timeout = 0; /* Don't time out */
7060 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
7061 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
7062 c->Request.CDB[2] = 0x00; /* reserved */
7063 c->Request.CDB[3] = 0x00; /* reserved */
7064 /* Tag to abort goes in CDB[4]-CDB[11] */
7065 memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
7066 c->Request.CDB[12] = 0x00; /* reserved */
7067 c->Request.CDB[13] = 0x00; /* reserved */
7068 c->Request.CDB[14] = 0x00; /* reserved */
7069 c->Request.CDB[15] = 0x00; /* reserved */
7070 break;
7071 default:
7072 dev_warn(&h->pdev->dev, "unknown message type %d\n",
7073 cmd);
7074 BUG();
7075 }
7076 } else {
7077 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
7078 BUG();
7079 }
7080
7081 switch (GET_DIR(c->Request.type_attr_dir)) {
7082 case XFER_READ:
7083 pci_dir = PCI_DMA_FROMDEVICE;
7084 break;
7085 case XFER_WRITE:
7086 pci_dir = PCI_DMA_TODEVICE;
7087 break;
7088 case XFER_NONE:
7089 pci_dir = PCI_DMA_NONE;
7090 break;
7091 default:
7092 pci_dir = PCI_DMA_BIDIRECTIONAL;
7093 }
7094 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
7095 return -1;
7096 return 0;
7097 }
7098
7099 /*
7100 * Map (physical) PCI mem into (virtual) kernel space
7101 */
7102 static void __iomem *remap_pci_mem(ulong base, ulong size)
7103 {
7104 ulong page_base = ((ulong) base) & PAGE_MASK;
7105 ulong page_offs = ((ulong) base) - page_base;
7106 void __iomem *page_remapped = ioremap_nocache(page_base,
7107 page_offs + size);
7108
7109 return page_remapped ? (page_remapped + page_offs) : NULL;
7110 }
7111
7112 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
7113 {
7114 return h->access.command_completed(h, q);
7115 }
7116
7117 static inline bool interrupt_pending(struct ctlr_info *h)
7118 {
7119 return h->access.intr_pending(h);
7120 }
7121
7122 static inline long interrupt_not_for_us(struct ctlr_info *h)
7123 {
7124 return (h->access.intr_pending(h) == 0) ||
7125 (h->interrupts_enabled == 0);
7126 }
7127
7128 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
7129 u32 raw_tag)
7130 {
7131 if (unlikely(tag_index >= h->nr_cmds)) {
7132 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
7133 return 1;
7134 }
7135 return 0;
7136 }
7137
7138 static inline void finish_cmd(struct CommandList *c)
7139 {
7140 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
7141 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
7142 || c->cmd_type == CMD_IOACCEL2))
7143 complete_scsi_command(c);
7144 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
7145 complete(c->waiting);
7146 }
7147
7148 /* process completion of an indexed ("direct lookup") command */
7149 static inline void process_indexed_cmd(struct ctlr_info *h,
7150 u32 raw_tag)
7151 {
7152 u32 tag_index;
7153 struct CommandList *c;
7154
7155 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
7156 if (!bad_tag(h, tag_index, raw_tag)) {
7157 c = h->cmd_pool + tag_index;
7158 finish_cmd(c);
7159 }
7160 }
7161
7162 /* Some controllers, like p400, will give us one interrupt
7163 * after a soft reset, even if we turned interrupts off.
7164 * Only need to check for this in the hpsa_xxx_discard_completions
7165 * functions.
7166 */
7167 static int ignore_bogus_interrupt(struct ctlr_info *h)
7168 {
7169 if (likely(!reset_devices))
7170 return 0;
7171
7172 if (likely(h->interrupts_enabled))
7173 return 0;
7174
7175 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
7176 "(known firmware bug.) Ignoring.\n");
7177
7178 return 1;
7179 }
7180
7181 /*
7182 * Convert &h->q[x] (passed to interrupt handlers) back to h.
7183 * Relies on (h-q[x] == x) being true for x such that
7184 * 0 <= x < MAX_REPLY_QUEUES.
7185 */
7186 static struct ctlr_info *queue_to_hba(u8 *queue)
7187 {
7188 return container_of((queue - *queue), struct ctlr_info, q[0]);
7189 }
7190
7191 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
7192 {
7193 struct ctlr_info *h = queue_to_hba(queue);
7194 u8 q = *(u8 *) queue;
7195 u32 raw_tag;
7196
7197 if (ignore_bogus_interrupt(h))
7198 return IRQ_NONE;
7199
7200 if (interrupt_not_for_us(h))
7201 return IRQ_NONE;
7202 h->last_intr_timestamp = get_jiffies_64();
7203 while (interrupt_pending(h)) {
7204 raw_tag = get_next_completion(h, q);
7205 while (raw_tag != FIFO_EMPTY)
7206 raw_tag = next_command(h, q);
7207 }
7208 return IRQ_HANDLED;
7209 }
7210
7211 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
7212 {
7213 struct ctlr_info *h = queue_to_hba(queue);
7214 u32 raw_tag;
7215 u8 q = *(u8 *) queue;
7216
7217 if (ignore_bogus_interrupt(h))
7218 return IRQ_NONE;
7219
7220 h->last_intr_timestamp = get_jiffies_64();
7221 raw_tag = get_next_completion(h, q);
7222 while (raw_tag != FIFO_EMPTY)
7223 raw_tag = next_command(h, q);
7224 return IRQ_HANDLED;
7225 }
7226
7227 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
7228 {
7229 struct ctlr_info *h = queue_to_hba((u8 *) queue);
7230 u32 raw_tag;
7231 u8 q = *(u8 *) queue;
7232
7233 if (interrupt_not_for_us(h))
7234 return IRQ_NONE;
7235 h->last_intr_timestamp = get_jiffies_64();
7236 while (interrupt_pending(h)) {
7237 raw_tag = get_next_completion(h, q);
7238 while (raw_tag != FIFO_EMPTY) {
7239 process_indexed_cmd(h, raw_tag);
7240 raw_tag = next_command(h, q);
7241 }
7242 }
7243 return IRQ_HANDLED;
7244 }
7245
7246 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
7247 {
7248 struct ctlr_info *h = queue_to_hba(queue);
7249 u32 raw_tag;
7250 u8 q = *(u8 *) queue;
7251
7252 h->last_intr_timestamp = get_jiffies_64();
7253 raw_tag = get_next_completion(h, q);
7254 while (raw_tag != FIFO_EMPTY) {
7255 process_indexed_cmd(h, raw_tag);
7256 raw_tag = next_command(h, q);
7257 }
7258 return IRQ_HANDLED;
7259 }
7260
7261 /* Send a message CDB to the firmware. Careful, this only works
7262 * in simple mode, not performant mode due to the tag lookup.
7263 * We only ever use this immediately after a controller reset.
7264 */
7265 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
7266 unsigned char type)
7267 {
7268 struct Command {
7269 struct CommandListHeader CommandHeader;
7270 struct RequestBlock Request;
7271 struct ErrDescriptor ErrorDescriptor;
7272 };
7273 struct Command *cmd;
7274 static const size_t cmd_sz = sizeof(*cmd) +
7275 sizeof(cmd->ErrorDescriptor);
7276 dma_addr_t paddr64;
7277 __le32 paddr32;
7278 u32 tag;
7279 void __iomem *vaddr;
7280 int i, err;
7281
7282 vaddr = pci_ioremap_bar(pdev, 0);
7283 if (vaddr == NULL)
7284 return -ENOMEM;
7285
7286 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
7287 * CCISS commands, so they must be allocated from the lower 4GiB of
7288 * memory.
7289 */
7290 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
7291 if (err) {
7292 iounmap(vaddr);
7293 return err;
7294 }
7295
7296 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
7297 if (cmd == NULL) {
7298 iounmap(vaddr);
7299 return -ENOMEM;
7300 }
7301
7302 /* This must fit, because of the 32-bit consistent DMA mask. Also,
7303 * although there's no guarantee, we assume that the address is at
7304 * least 4-byte aligned (most likely, it's page-aligned).
7305 */
7306 paddr32 = cpu_to_le32(paddr64);
7307
7308 cmd->CommandHeader.ReplyQueue = 0;
7309 cmd->CommandHeader.SGList = 0;
7310 cmd->CommandHeader.SGTotal = cpu_to_le16(0);
7311 cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7312 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7313
7314 cmd->Request.CDBLen = 16;
7315 cmd->Request.type_attr_dir =
7316 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7317 cmd->Request.Timeout = 0; /* Don't time out */
7318 cmd->Request.CDB[0] = opcode;
7319 cmd->Request.CDB[1] = type;
7320 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
7321 cmd->ErrorDescriptor.Addr =
7322 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
7323 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7324
7325 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7326
7327 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7328 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
7329 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7330 break;
7331 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7332 }
7333
7334 iounmap(vaddr);
7335
7336 /* we leak the DMA buffer here ... no choice since the controller could
7337 * still complete the command.
7338 */
7339 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7340 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7341 opcode, type);
7342 return -ETIMEDOUT;
7343 }
7344
7345 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
7346
7347 if (tag & HPSA_ERROR_BIT) {
7348 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7349 opcode, type);
7350 return -EIO;
7351 }
7352
7353 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7354 opcode, type);
7355 return 0;
7356 }
7357
7358 #define hpsa_noop(p) hpsa_message(p, 3, 0)
7359
7360 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
7361 void __iomem *vaddr, u32 use_doorbell)
7362 {
7363
7364 if (use_doorbell) {
7365 /* For everything after the P600, the PCI power state method
7366 * of resetting the controller doesn't work, so we have this
7367 * other way using the doorbell register.
7368 */
7369 dev_info(&pdev->dev, "using doorbell to reset controller\n");
7370 writel(use_doorbell, vaddr + SA5_DOORBELL);
7371
7372 /* PMC hardware guys tell us we need a 10 second delay after
7373 * doorbell reset and before any attempt to talk to the board
7374 * at all to ensure that this actually works and doesn't fall
7375 * over in some weird corner cases.
7376 */
7377 msleep(10000);
7378 } else { /* Try to do it the PCI power state way */
7379
7380 /* Quoting from the Open CISS Specification: "The Power
7381 * Management Control/Status Register (CSR) controls the power
7382 * state of the device. The normal operating state is D0,
7383 * CSR=00h. The software off state is D3, CSR=03h. To reset
7384 * the controller, place the interface device in D3 then to D0,
7385 * this causes a secondary PCI reset which will reset the
7386 * controller." */
7387
7388 int rc = 0;
7389
7390 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
7391
7392 /* enter the D3hot power management state */
7393 rc = pci_set_power_state(pdev, PCI_D3hot);
7394 if (rc)
7395 return rc;
7396
7397 msleep(500);
7398
7399 /* enter the D0 power management state */
7400 rc = pci_set_power_state(pdev, PCI_D0);
7401 if (rc)
7402 return rc;
7403
7404 /*
7405 * The P600 requires a small delay when changing states.
7406 * Otherwise we may think the board did not reset and we bail.
7407 * This for kdump only and is particular to the P600.
7408 */
7409 msleep(500);
7410 }
7411 return 0;
7412 }
7413
7414 static void init_driver_version(char *driver_version, int len)
7415 {
7416 memset(driver_version, 0, len);
7417 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7418 }
7419
7420 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7421 {
7422 char *driver_version;
7423 int i, size = sizeof(cfgtable->driver_version);
7424
7425 driver_version = kmalloc(size, GFP_KERNEL);
7426 if (!driver_version)
7427 return -ENOMEM;
7428
7429 init_driver_version(driver_version, size);
7430 for (i = 0; i < size; i++)
7431 writeb(driver_version[i], &cfgtable->driver_version[i]);
7432 kfree(driver_version);
7433 return 0;
7434 }
7435
7436 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7437 unsigned char *driver_ver)
7438 {
7439 int i;
7440
7441 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7442 driver_ver[i] = readb(&cfgtable->driver_version[i]);
7443 }
7444
7445 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7446 {
7447
7448 char *driver_ver, *old_driver_ver;
7449 int rc, size = sizeof(cfgtable->driver_version);
7450
7451 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
7452 if (!old_driver_ver)
7453 return -ENOMEM;
7454 driver_ver = old_driver_ver + size;
7455
7456 /* After a reset, the 32 bytes of "driver version" in the cfgtable
7457 * should have been changed, otherwise we know the reset failed.
7458 */
7459 init_driver_version(old_driver_ver, size);
7460 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7461 rc = !memcmp(driver_ver, old_driver_ver, size);
7462 kfree(old_driver_ver);
7463 return rc;
7464 }
7465 /* This does a hard reset of the controller using PCI power management
7466 * states or the using the doorbell register.
7467 */
7468 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
7469 {
7470 u64 cfg_offset;
7471 u32 cfg_base_addr;
7472 u64 cfg_base_addr_index;
7473 void __iomem *vaddr;
7474 unsigned long paddr;
7475 u32 misc_fw_support;
7476 int rc;
7477 struct CfgTable __iomem *cfgtable;
7478 u32 use_doorbell;
7479 u16 command_register;
7480
7481 /* For controllers as old as the P600, this is very nearly
7482 * the same thing as
7483 *
7484 * pci_save_state(pci_dev);
7485 * pci_set_power_state(pci_dev, PCI_D3hot);
7486 * pci_set_power_state(pci_dev, PCI_D0);
7487 * pci_restore_state(pci_dev);
7488 *
7489 * For controllers newer than the P600, the pci power state
7490 * method of resetting doesn't work so we have another way
7491 * using the doorbell register.
7492 */
7493
7494 if (!ctlr_is_resettable(board_id)) {
7495 dev_warn(&pdev->dev, "Controller not resettable\n");
7496 return -ENODEV;
7497 }
7498
7499 /* if controller is soft- but not hard resettable... */
7500 if (!ctlr_is_hard_resettable(board_id))
7501 return -ENOTSUPP; /* try soft reset later. */
7502
7503 /* Save the PCI command register */
7504 pci_read_config_word(pdev, 4, &command_register);
7505 pci_save_state(pdev);
7506
7507 /* find the first memory BAR, so we can find the cfg table */
7508 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7509 if (rc)
7510 return rc;
7511 vaddr = remap_pci_mem(paddr, 0x250);
7512 if (!vaddr)
7513 return -ENOMEM;
7514
7515 /* find cfgtable in order to check if reset via doorbell is supported */
7516 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7517 &cfg_base_addr_index, &cfg_offset);
7518 if (rc)
7519 goto unmap_vaddr;
7520 cfgtable = remap_pci_mem(pci_resource_start(pdev,
7521 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7522 if (!cfgtable) {
7523 rc = -ENOMEM;
7524 goto unmap_vaddr;
7525 }
7526 rc = write_driver_ver_to_cfgtable(cfgtable);
7527 if (rc)
7528 goto unmap_cfgtable;
7529
7530 /* If reset via doorbell register is supported, use that.
7531 * There are two such methods. Favor the newest method.
7532 */
7533 misc_fw_support = readl(&cfgtable->misc_fw_support);
7534 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7535 if (use_doorbell) {
7536 use_doorbell = DOORBELL_CTLR_RESET2;
7537 } else {
7538 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7539 if (use_doorbell) {
7540 dev_warn(&pdev->dev,
7541 "Soft reset not supported. Firmware update is required.\n");
7542 rc = -ENOTSUPP; /* try soft reset */
7543 goto unmap_cfgtable;
7544 }
7545 }
7546
7547 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7548 if (rc)
7549 goto unmap_cfgtable;
7550
7551 pci_restore_state(pdev);
7552 pci_write_config_word(pdev, 4, command_register);
7553
7554 /* Some devices (notably the HP Smart Array 5i Controller)
7555 need a little pause here */
7556 msleep(HPSA_POST_RESET_PAUSE_MSECS);
7557
7558 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7559 if (rc) {
7560 dev_warn(&pdev->dev,
7561 "Failed waiting for board to become ready after hard reset\n");
7562 goto unmap_cfgtable;
7563 }
7564
7565 rc = controller_reset_failed(vaddr);
7566 if (rc < 0)
7567 goto unmap_cfgtable;
7568 if (rc) {
7569 dev_warn(&pdev->dev, "Unable to successfully reset "
7570 "controller. Will try soft reset.\n");
7571 rc = -ENOTSUPP;
7572 } else {
7573 dev_info(&pdev->dev, "board ready after hard reset.\n");
7574 }
7575
7576 unmap_cfgtable:
7577 iounmap(cfgtable);
7578
7579 unmap_vaddr:
7580 iounmap(vaddr);
7581 return rc;
7582 }
7583
7584 /*
7585 * We cannot read the structure directly, for portability we must use
7586 * the io functions.
7587 * This is for debug only.
7588 */
7589 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7590 {
7591 #ifdef HPSA_DEBUG
7592 int i;
7593 char temp_name[17];
7594
7595 dev_info(dev, "Controller Configuration information\n");
7596 dev_info(dev, "------------------------------------\n");
7597 for (i = 0; i < 4; i++)
7598 temp_name[i] = readb(&(tb->Signature[i]));
7599 temp_name[4] = '\0';
7600 dev_info(dev, " Signature = %s\n", temp_name);
7601 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7602 dev_info(dev, " Transport methods supported = 0x%x\n",
7603 readl(&(tb->TransportSupport)));
7604 dev_info(dev, " Transport methods active = 0x%x\n",
7605 readl(&(tb->TransportActive)));
7606 dev_info(dev, " Requested transport Method = 0x%x\n",
7607 readl(&(tb->HostWrite.TransportRequest)));
7608 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
7609 readl(&(tb->HostWrite.CoalIntDelay)));
7610 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
7611 readl(&(tb->HostWrite.CoalIntCount)));
7612 dev_info(dev, " Max outstanding commands = %d\n",
7613 readl(&(tb->CmdsOutMax)));
7614 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7615 for (i = 0; i < 16; i++)
7616 temp_name[i] = readb(&(tb->ServerName[i]));
7617 temp_name[16] = '\0';
7618 dev_info(dev, " Server Name = %s\n", temp_name);
7619 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
7620 readl(&(tb->HeartBeat)));
7621 #endif /* HPSA_DEBUG */
7622 }
7623
7624 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7625 {
7626 int i, offset, mem_type, bar_type;
7627
7628 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
7629 return 0;
7630 offset = 0;
7631 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7632 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7633 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7634 offset += 4;
7635 else {
7636 mem_type = pci_resource_flags(pdev, i) &
7637 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7638 switch (mem_type) {
7639 case PCI_BASE_ADDRESS_MEM_TYPE_32:
7640 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7641 offset += 4; /* 32 bit */
7642 break;
7643 case PCI_BASE_ADDRESS_MEM_TYPE_64:
7644 offset += 8;
7645 break;
7646 default: /* reserved in PCI 2.2 */
7647 dev_warn(&pdev->dev,
7648 "base address is invalid\n");
7649 return -1;
7650 break;
7651 }
7652 }
7653 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7654 return i + 1;
7655 }
7656 return -1;
7657 }
7658
7659 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7660 {
7661 if (h->msix_vector) {
7662 if (h->pdev->msix_enabled)
7663 pci_disable_msix(h->pdev);
7664 h->msix_vector = 0;
7665 } else if (h->msi_vector) {
7666 if (h->pdev->msi_enabled)
7667 pci_disable_msi(h->pdev);
7668 h->msi_vector = 0;
7669 }
7670 }
7671
7672 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7673 * controllers that are capable. If not, we use legacy INTx mode.
7674 */
7675 static void hpsa_interrupt_mode(struct ctlr_info *h)
7676 {
7677 #ifdef CONFIG_PCI_MSI
7678 int err, i;
7679 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
7680
7681 for (i = 0; i < MAX_REPLY_QUEUES; i++) {
7682 hpsa_msix_entries[i].vector = 0;
7683 hpsa_msix_entries[i].entry = i;
7684 }
7685
7686 /* Some boards advertise MSI but don't really support it */
7687 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
7688 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
7689 goto default_int_mode;
7690 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
7691 dev_info(&h->pdev->dev, "MSI-X capable controller\n");
7692 h->msix_vector = MAX_REPLY_QUEUES;
7693 if (h->msix_vector > num_online_cpus())
7694 h->msix_vector = num_online_cpus();
7695 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
7696 1, h->msix_vector);
7697 if (err < 0) {
7698 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
7699 h->msix_vector = 0;
7700 goto single_msi_mode;
7701 } else if (err < h->msix_vector) {
7702 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
7703 "available\n", err);
7704 }
7705 h->msix_vector = err;
7706 for (i = 0; i < h->msix_vector; i++)
7707 h->intr[i] = hpsa_msix_entries[i].vector;
7708 return;
7709 }
7710 single_msi_mode:
7711 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
7712 dev_info(&h->pdev->dev, "MSI capable controller\n");
7713 if (!pci_enable_msi(h->pdev))
7714 h->msi_vector = 1;
7715 else
7716 dev_warn(&h->pdev->dev, "MSI init failed\n");
7717 }
7718 default_int_mode:
7719 #endif /* CONFIG_PCI_MSI */
7720 /* if we get here we're going to use the default interrupt mode */
7721 h->intr[h->intr_mode] = h->pdev->irq;
7722 }
7723
7724 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
7725 {
7726 int i;
7727 u32 subsystem_vendor_id, subsystem_device_id;
7728
7729 subsystem_vendor_id = pdev->subsystem_vendor;
7730 subsystem_device_id = pdev->subsystem_device;
7731 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7732 subsystem_vendor_id;
7733
7734 for (i = 0; i < ARRAY_SIZE(products); i++)
7735 if (*board_id == products[i].board_id)
7736 return i;
7737
7738 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
7739 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
7740 !hpsa_allow_any) {
7741 dev_warn(&pdev->dev, "unrecognized board ID: "
7742 "0x%08x, ignoring.\n", *board_id);
7743 return -ENODEV;
7744 }
7745 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7746 }
7747
7748 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7749 unsigned long *memory_bar)
7750 {
7751 int i;
7752
7753 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7754 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7755 /* addressing mode bits already removed */
7756 *memory_bar = pci_resource_start(pdev, i);
7757 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7758 *memory_bar);
7759 return 0;
7760 }
7761 dev_warn(&pdev->dev, "no memory BAR found\n");
7762 return -ENODEV;
7763 }
7764
7765 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7766 int wait_for_ready)
7767 {
7768 int i, iterations;
7769 u32 scratchpad;
7770 if (wait_for_ready)
7771 iterations = HPSA_BOARD_READY_ITERATIONS;
7772 else
7773 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7774
7775 for (i = 0; i < iterations; i++) {
7776 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7777 if (wait_for_ready) {
7778 if (scratchpad == HPSA_FIRMWARE_READY)
7779 return 0;
7780 } else {
7781 if (scratchpad != HPSA_FIRMWARE_READY)
7782 return 0;
7783 }
7784 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7785 }
7786 dev_warn(&pdev->dev, "board not ready, timed out.\n");
7787 return -ENODEV;
7788 }
7789
7790 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7791 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7792 u64 *cfg_offset)
7793 {
7794 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7795 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7796 *cfg_base_addr &= (u32) 0x0000ffff;
7797 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7798 if (*cfg_base_addr_index == -1) {
7799 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7800 return -ENODEV;
7801 }
7802 return 0;
7803 }
7804
7805 static void hpsa_free_cfgtables(struct ctlr_info *h)
7806 {
7807 if (h->transtable) {
7808 iounmap(h->transtable);
7809 h->transtable = NULL;
7810 }
7811 if (h->cfgtable) {
7812 iounmap(h->cfgtable);
7813 h->cfgtable = NULL;
7814 }
7815 }
7816
7817 /* Find and map CISS config table and transfer table
7818 + * several items must be unmapped (freed) later
7819 + * */
7820 static int hpsa_find_cfgtables(struct ctlr_info *h)
7821 {
7822 u64 cfg_offset;
7823 u32 cfg_base_addr;
7824 u64 cfg_base_addr_index;
7825 u32 trans_offset;
7826 int rc;
7827
7828 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7829 &cfg_base_addr_index, &cfg_offset);
7830 if (rc)
7831 return rc;
7832 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7833 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7834 if (!h->cfgtable) {
7835 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7836 return -ENOMEM;
7837 }
7838 rc = write_driver_ver_to_cfgtable(h->cfgtable);
7839 if (rc)
7840 return rc;
7841 /* Find performant mode table. */
7842 trans_offset = readl(&h->cfgtable->TransMethodOffset);
7843 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7844 cfg_base_addr_index)+cfg_offset+trans_offset,
7845 sizeof(*h->transtable));
7846 if (!h->transtable) {
7847 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7848 hpsa_free_cfgtables(h);
7849 return -ENOMEM;
7850 }
7851 return 0;
7852 }
7853
7854 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7855 {
7856 #define MIN_MAX_COMMANDS 16
7857 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7858
7859 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7860
7861 /* Limit commands in memory limited kdump scenario. */
7862 if (reset_devices && h->max_commands > 32)
7863 h->max_commands = 32;
7864
7865 if (h->max_commands < MIN_MAX_COMMANDS) {
7866 dev_warn(&h->pdev->dev,
7867 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7868 h->max_commands,
7869 MIN_MAX_COMMANDS);
7870 h->max_commands = MIN_MAX_COMMANDS;
7871 }
7872 }
7873
7874 /* If the controller reports that the total max sg entries is greater than 512,
7875 * then we know that chained SG blocks work. (Original smart arrays did not
7876 * support chained SG blocks and would return zero for max sg entries.)
7877 */
7878 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7879 {
7880 return h->maxsgentries > 512;
7881 }
7882
7883 /* Interrogate the hardware for some limits:
7884 * max commands, max SG elements without chaining, and with chaining,
7885 * SG chain block size, etc.
7886 */
7887 static void hpsa_find_board_params(struct ctlr_info *h)
7888 {
7889 hpsa_get_max_perf_mode_cmds(h);
7890 h->nr_cmds = h->max_commands;
7891 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7892 h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7893 if (hpsa_supports_chained_sg_blocks(h)) {
7894 /* Limit in-command s/g elements to 32 save dma'able memory. */
7895 h->max_cmd_sg_entries = 32;
7896 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7897 h->maxsgentries--; /* save one for chain pointer */
7898 } else {
7899 /*
7900 * Original smart arrays supported at most 31 s/g entries
7901 * embedded inline in the command (trying to use more
7902 * would lock up the controller)
7903 */
7904 h->max_cmd_sg_entries = 31;
7905 h->maxsgentries = 31; /* default to traditional values */
7906 h->chainsize = 0;
7907 }
7908
7909 /* Find out what task management functions are supported and cache */
7910 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7911 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7912 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7913 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7914 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7915 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7916 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7917 }
7918
7919 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7920 {
7921 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7922 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7923 return false;
7924 }
7925 return true;
7926 }
7927
7928 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7929 {
7930 u32 driver_support;
7931
7932 driver_support = readl(&(h->cfgtable->driver_support));
7933 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7934 #ifdef CONFIG_X86
7935 driver_support |= ENABLE_SCSI_PREFETCH;
7936 #endif
7937 driver_support |= ENABLE_UNIT_ATTN;
7938 writel(driver_support, &(h->cfgtable->driver_support));
7939 }
7940
7941 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
7942 * in a prefetch beyond physical memory.
7943 */
7944 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7945 {
7946 u32 dma_prefetch;
7947
7948 if (h->board_id != 0x3225103C)
7949 return;
7950 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7951 dma_prefetch |= 0x8000;
7952 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7953 }
7954
7955 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7956 {
7957 int i;
7958 u32 doorbell_value;
7959 unsigned long flags;
7960 /* wait until the clear_event_notify bit 6 is cleared by controller. */
7961 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7962 spin_lock_irqsave(&h->lock, flags);
7963 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7964 spin_unlock_irqrestore(&h->lock, flags);
7965 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7966 goto done;
7967 /* delay and try again */
7968 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7969 }
7970 return -ENODEV;
7971 done:
7972 return 0;
7973 }
7974
7975 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7976 {
7977 int i;
7978 u32 doorbell_value;
7979 unsigned long flags;
7980
7981 /* under certain very rare conditions, this can take awhile.
7982 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7983 * as we enter this code.)
7984 */
7985 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7986 if (h->remove_in_progress)
7987 goto done;
7988 spin_lock_irqsave(&h->lock, flags);
7989 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7990 spin_unlock_irqrestore(&h->lock, flags);
7991 if (!(doorbell_value & CFGTBL_ChangeReq))
7992 goto done;
7993 /* delay and try again */
7994 msleep(MODE_CHANGE_WAIT_INTERVAL);
7995 }
7996 return -ENODEV;
7997 done:
7998 return 0;
7999 }
8000
8001 /* return -ENODEV or other reason on error, 0 on success */
8002 static int hpsa_enter_simple_mode(struct ctlr_info *h)
8003 {
8004 u32 trans_support;
8005
8006 trans_support = readl(&(h->cfgtable->TransportSupport));
8007 if (!(trans_support & SIMPLE_MODE))
8008 return -ENOTSUPP;
8009
8010 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
8011
8012 /* Update the field, and then ring the doorbell */
8013 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
8014 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
8015 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8016 if (hpsa_wait_for_mode_change_ack(h))
8017 goto error;
8018 print_cfg_table(&h->pdev->dev, h->cfgtable);
8019 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
8020 goto error;
8021 h->transMethod = CFGTBL_Trans_Simple;
8022 return 0;
8023 error:
8024 dev_err(&h->pdev->dev, "failed to enter simple mode\n");
8025 return -ENODEV;
8026 }
8027
8028 /* free items allocated or mapped by hpsa_pci_init */
8029 static void hpsa_free_pci_init(struct ctlr_info *h)
8030 {
8031 hpsa_free_cfgtables(h); /* pci_init 4 */
8032 iounmap(h->vaddr); /* pci_init 3 */
8033 h->vaddr = NULL;
8034 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
8035 /*
8036 * call pci_disable_device before pci_release_regions per
8037 * Documentation/PCI/pci.txt
8038 */
8039 pci_disable_device(h->pdev); /* pci_init 1 */
8040 pci_release_regions(h->pdev); /* pci_init 2 */
8041 }
8042
8043 /* several items must be freed later */
8044 static int hpsa_pci_init(struct ctlr_info *h)
8045 {
8046 int prod_index, err;
8047
8048 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
8049 if (prod_index < 0)
8050 return prod_index;
8051 h->product_name = products[prod_index].product_name;
8052 h->access = *(products[prod_index].access);
8053
8054 h->needs_abort_tags_swizzled =
8055 ctlr_needs_abort_tags_swizzled(h->board_id);
8056
8057 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
8058 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
8059
8060 err = pci_enable_device(h->pdev);
8061 if (err) {
8062 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
8063 pci_disable_device(h->pdev);
8064 return err;
8065 }
8066
8067 err = pci_request_regions(h->pdev, HPSA);
8068 if (err) {
8069 dev_err(&h->pdev->dev,
8070 "failed to obtain PCI resources\n");
8071 pci_disable_device(h->pdev);
8072 return err;
8073 }
8074
8075 pci_set_master(h->pdev);
8076
8077 hpsa_interrupt_mode(h);
8078 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
8079 if (err)
8080 goto clean2; /* intmode+region, pci */
8081 h->vaddr = remap_pci_mem(h->paddr, 0x250);
8082 if (!h->vaddr) {
8083 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
8084 err = -ENOMEM;
8085 goto clean2; /* intmode+region, pci */
8086 }
8087 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8088 if (err)
8089 goto clean3; /* vaddr, intmode+region, pci */
8090 err = hpsa_find_cfgtables(h);
8091 if (err)
8092 goto clean3; /* vaddr, intmode+region, pci */
8093 hpsa_find_board_params(h);
8094
8095 if (!hpsa_CISS_signature_present(h)) {
8096 err = -ENODEV;
8097 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
8098 }
8099 hpsa_set_driver_support_bits(h);
8100 hpsa_p600_dma_prefetch_quirk(h);
8101 err = hpsa_enter_simple_mode(h);
8102 if (err)
8103 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
8104 return 0;
8105
8106 clean4: /* cfgtables, vaddr, intmode+region, pci */
8107 hpsa_free_cfgtables(h);
8108 clean3: /* vaddr, intmode+region, pci */
8109 iounmap(h->vaddr);
8110 h->vaddr = NULL;
8111 clean2: /* intmode+region, pci */
8112 hpsa_disable_interrupt_mode(h);
8113 /*
8114 * call pci_disable_device before pci_release_regions per
8115 * Documentation/PCI/pci.txt
8116 */
8117 pci_disable_device(h->pdev);
8118 pci_release_regions(h->pdev);
8119 return err;
8120 }
8121
8122 static void hpsa_hba_inquiry(struct ctlr_info *h)
8123 {
8124 int rc;
8125
8126 #define HBA_INQUIRY_BYTE_COUNT 64
8127 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
8128 if (!h->hba_inquiry_data)
8129 return;
8130 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
8131 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
8132 if (rc != 0) {
8133 kfree(h->hba_inquiry_data);
8134 h->hba_inquiry_data = NULL;
8135 }
8136 }
8137
8138 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
8139 {
8140 int rc, i;
8141 void __iomem *vaddr;
8142
8143 if (!reset_devices)
8144 return 0;
8145
8146 /* kdump kernel is loading, we don't know in which state is
8147 * the pci interface. The dev->enable_cnt is equal zero
8148 * so we call enable+disable, wait a while and switch it on.
8149 */
8150 rc = pci_enable_device(pdev);
8151 if (rc) {
8152 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
8153 return -ENODEV;
8154 }
8155 pci_disable_device(pdev);
8156 msleep(260); /* a randomly chosen number */
8157 rc = pci_enable_device(pdev);
8158 if (rc) {
8159 dev_warn(&pdev->dev, "failed to enable device.\n");
8160 return -ENODEV;
8161 }
8162
8163 pci_set_master(pdev);
8164
8165 vaddr = pci_ioremap_bar(pdev, 0);
8166 if (vaddr == NULL) {
8167 rc = -ENOMEM;
8168 goto out_disable;
8169 }
8170 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
8171 iounmap(vaddr);
8172
8173 /* Reset the controller with a PCI power-cycle or via doorbell */
8174 rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
8175
8176 /* -ENOTSUPP here means we cannot reset the controller
8177 * but it's already (and still) up and running in
8178 * "performant mode". Or, it might be 640x, which can't reset
8179 * due to concerns about shared bbwc between 6402/6404 pair.
8180 */
8181 if (rc)
8182 goto out_disable;
8183
8184 /* Now try to get the controller to respond to a no-op */
8185 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
8186 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
8187 if (hpsa_noop(pdev) == 0)
8188 break;
8189 else
8190 dev_warn(&pdev->dev, "no-op failed%s\n",
8191 (i < 11 ? "; re-trying" : ""));
8192 }
8193
8194 out_disable:
8195
8196 pci_disable_device(pdev);
8197 return rc;
8198 }
8199
8200 static void hpsa_free_cmd_pool(struct ctlr_info *h)
8201 {
8202 kfree(h->cmd_pool_bits);
8203 h->cmd_pool_bits = NULL;
8204 if (h->cmd_pool) {
8205 pci_free_consistent(h->pdev,
8206 h->nr_cmds * sizeof(struct CommandList),
8207 h->cmd_pool,
8208 h->cmd_pool_dhandle);
8209 h->cmd_pool = NULL;
8210 h->cmd_pool_dhandle = 0;
8211 }
8212 if (h->errinfo_pool) {
8213 pci_free_consistent(h->pdev,
8214 h->nr_cmds * sizeof(struct ErrorInfo),
8215 h->errinfo_pool,
8216 h->errinfo_pool_dhandle);
8217 h->errinfo_pool = NULL;
8218 h->errinfo_pool_dhandle = 0;
8219 }
8220 }
8221
8222 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
8223 {
8224 h->cmd_pool_bits = kzalloc(
8225 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
8226 sizeof(unsigned long), GFP_KERNEL);
8227 h->cmd_pool = pci_alloc_consistent(h->pdev,
8228 h->nr_cmds * sizeof(*h->cmd_pool),
8229 &(h->cmd_pool_dhandle));
8230 h->errinfo_pool = pci_alloc_consistent(h->pdev,
8231 h->nr_cmds * sizeof(*h->errinfo_pool),
8232 &(h->errinfo_pool_dhandle));
8233 if ((h->cmd_pool_bits == NULL)
8234 || (h->cmd_pool == NULL)
8235 || (h->errinfo_pool == NULL)) {
8236 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
8237 goto clean_up;
8238 }
8239 hpsa_preinitialize_commands(h);
8240 return 0;
8241 clean_up:
8242 hpsa_free_cmd_pool(h);
8243 return -ENOMEM;
8244 }
8245
8246 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
8247 {
8248 int i, cpu;
8249
8250 cpu = cpumask_first(cpu_online_mask);
8251 for (i = 0; i < h->msix_vector; i++) {
8252 irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
8253 cpu = cpumask_next(cpu, cpu_online_mask);
8254 }
8255 }
8256
8257 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
8258 static void hpsa_free_irqs(struct ctlr_info *h)
8259 {
8260 int i;
8261
8262 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
8263 /* Single reply queue, only one irq to free */
8264 i = h->intr_mode;
8265 irq_set_affinity_hint(h->intr[i], NULL);
8266 free_irq(h->intr[i], &h->q[i]);
8267 h->q[i] = 0;
8268 return;
8269 }
8270
8271 for (i = 0; i < h->msix_vector; i++) {
8272 irq_set_affinity_hint(h->intr[i], NULL);
8273 free_irq(h->intr[i], &h->q[i]);
8274 h->q[i] = 0;
8275 }
8276 for (; i < MAX_REPLY_QUEUES; i++)
8277 h->q[i] = 0;
8278 }
8279
8280 /* returns 0 on success; cleans up and returns -Enn on error */
8281 static int hpsa_request_irqs(struct ctlr_info *h,
8282 irqreturn_t (*msixhandler)(int, void *),
8283 irqreturn_t (*intxhandler)(int, void *))
8284 {
8285 int rc, i;
8286
8287 /*
8288 * initialize h->q[x] = x so that interrupt handlers know which
8289 * queue to process.
8290 */
8291 for (i = 0; i < MAX_REPLY_QUEUES; i++)
8292 h->q[i] = (u8) i;
8293
8294 if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
8295 /* If performant mode and MSI-X, use multiple reply queues */
8296 for (i = 0; i < h->msix_vector; i++) {
8297 sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8298 rc = request_irq(h->intr[i], msixhandler,
8299 0, h->intrname[i],
8300 &h->q[i]);
8301 if (rc) {
8302 int j;
8303
8304 dev_err(&h->pdev->dev,
8305 "failed to get irq %d for %s\n",
8306 h->intr[i], h->devname);
8307 for (j = 0; j < i; j++) {
8308 free_irq(h->intr[j], &h->q[j]);
8309 h->q[j] = 0;
8310 }
8311 for (; j < MAX_REPLY_QUEUES; j++)
8312 h->q[j] = 0;
8313 return rc;
8314 }
8315 }
8316 hpsa_irq_affinity_hints(h);
8317 } else {
8318 /* Use single reply pool */
8319 if (h->msix_vector > 0 || h->msi_vector) {
8320 if (h->msix_vector)
8321 sprintf(h->intrname[h->intr_mode],
8322 "%s-msix", h->devname);
8323 else
8324 sprintf(h->intrname[h->intr_mode],
8325 "%s-msi", h->devname);
8326 rc = request_irq(h->intr[h->intr_mode],
8327 msixhandler, 0,
8328 h->intrname[h->intr_mode],
8329 &h->q[h->intr_mode]);
8330 } else {
8331 sprintf(h->intrname[h->intr_mode],
8332 "%s-intx", h->devname);
8333 rc = request_irq(h->intr[h->intr_mode],
8334 intxhandler, IRQF_SHARED,
8335 h->intrname[h->intr_mode],
8336 &h->q[h->intr_mode]);
8337 }
8338 irq_set_affinity_hint(h->intr[h->intr_mode], NULL);
8339 }
8340 if (rc) {
8341 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8342 h->intr[h->intr_mode], h->devname);
8343 hpsa_free_irqs(h);
8344 return -ENODEV;
8345 }
8346 return 0;
8347 }
8348
8349 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
8350 {
8351 int rc;
8352 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
8353
8354 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
8355 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
8356 if (rc) {
8357 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
8358 return rc;
8359 }
8360
8361 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
8362 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8363 if (rc) {
8364 dev_warn(&h->pdev->dev, "Board failed to become ready "
8365 "after soft reset.\n");
8366 return rc;
8367 }
8368
8369 return 0;
8370 }
8371
8372 static void hpsa_free_reply_queues(struct ctlr_info *h)
8373 {
8374 int i;
8375
8376 for (i = 0; i < h->nreply_queues; i++) {
8377 if (!h->reply_queue[i].head)
8378 continue;
8379 pci_free_consistent(h->pdev,
8380 h->reply_queue_size,
8381 h->reply_queue[i].head,
8382 h->reply_queue[i].busaddr);
8383 h->reply_queue[i].head = NULL;
8384 h->reply_queue[i].busaddr = 0;
8385 }
8386 h->reply_queue_size = 0;
8387 }
8388
8389 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
8390 {
8391 hpsa_free_performant_mode(h); /* init_one 7 */
8392 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8393 hpsa_free_cmd_pool(h); /* init_one 5 */
8394 hpsa_free_irqs(h); /* init_one 4 */
8395 scsi_host_put(h->scsi_host); /* init_one 3 */
8396 h->scsi_host = NULL; /* init_one 3 */
8397 hpsa_free_pci_init(h); /* init_one 2_5 */
8398 free_percpu(h->lockup_detected); /* init_one 2 */
8399 h->lockup_detected = NULL; /* init_one 2 */
8400 if (h->resubmit_wq) {
8401 destroy_workqueue(h->resubmit_wq); /* init_one 1 */
8402 h->resubmit_wq = NULL;
8403 }
8404 if (h->rescan_ctlr_wq) {
8405 destroy_workqueue(h->rescan_ctlr_wq);
8406 h->rescan_ctlr_wq = NULL;
8407 }
8408 kfree(h); /* init_one 1 */
8409 }
8410
8411 /* Called when controller lockup detected. */
8412 static void fail_all_outstanding_cmds(struct ctlr_info *h)
8413 {
8414 int i, refcount;
8415 struct CommandList *c;
8416 int failcount = 0;
8417
8418 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8419 for (i = 0; i < h->nr_cmds; i++) {
8420 c = h->cmd_pool + i;
8421 refcount = atomic_inc_return(&c->refcount);
8422 if (refcount > 1) {
8423 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
8424 finish_cmd(c);
8425 atomic_dec(&h->commands_outstanding);
8426 failcount++;
8427 }
8428 cmd_free(h, c);
8429 }
8430 dev_warn(&h->pdev->dev,
8431 "failed %d commands in fail_all\n", failcount);
8432 }
8433
8434 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8435 {
8436 int cpu;
8437
8438 for_each_online_cpu(cpu) {
8439 u32 *lockup_detected;
8440 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8441 *lockup_detected = value;
8442 }
8443 wmb(); /* be sure the per-cpu variables are out to memory */
8444 }
8445
8446 static void controller_lockup_detected(struct ctlr_info *h)
8447 {
8448 unsigned long flags;
8449 u32 lockup_detected;
8450
8451 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8452 spin_lock_irqsave(&h->lock, flags);
8453 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8454 if (!lockup_detected) {
8455 /* no heartbeat, but controller gave us a zero. */
8456 dev_warn(&h->pdev->dev,
8457 "lockup detected after %d but scratchpad register is zero\n",
8458 h->heartbeat_sample_interval / HZ);
8459 lockup_detected = 0xffffffff;
8460 }
8461 set_lockup_detected_for_all_cpus(h, lockup_detected);
8462 spin_unlock_irqrestore(&h->lock, flags);
8463 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8464 lockup_detected, h->heartbeat_sample_interval / HZ);
8465 pci_disable_device(h->pdev);
8466 fail_all_outstanding_cmds(h);
8467 }
8468
8469 static int detect_controller_lockup(struct ctlr_info *h)
8470 {
8471 u64 now;
8472 u32 heartbeat;
8473 unsigned long flags;
8474
8475 now = get_jiffies_64();
8476 /* If we've received an interrupt recently, we're ok. */
8477 if (time_after64(h->last_intr_timestamp +
8478 (h->heartbeat_sample_interval), now))
8479 return false;
8480
8481 /*
8482 * If we've already checked the heartbeat recently, we're ok.
8483 * This could happen if someone sends us a signal. We
8484 * otherwise don't care about signals in this thread.
8485 */
8486 if (time_after64(h->last_heartbeat_timestamp +
8487 (h->heartbeat_sample_interval), now))
8488 return false;
8489
8490 /* If heartbeat has not changed since we last looked, we're not ok. */
8491 spin_lock_irqsave(&h->lock, flags);
8492 heartbeat = readl(&h->cfgtable->HeartBeat);
8493 spin_unlock_irqrestore(&h->lock, flags);
8494 if (h->last_heartbeat == heartbeat) {
8495 controller_lockup_detected(h);
8496 return true;
8497 }
8498
8499 /* We're ok. */
8500 h->last_heartbeat = heartbeat;
8501 h->last_heartbeat_timestamp = now;
8502 return false;
8503 }
8504
8505 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
8506 {
8507 int i;
8508 char *event_type;
8509
8510 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8511 return;
8512
8513 /* Ask the controller to clear the events we're handling. */
8514 if ((h->transMethod & (CFGTBL_Trans_io_accel1
8515 | CFGTBL_Trans_io_accel2)) &&
8516 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8517 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8518
8519 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8520 event_type = "state change";
8521 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8522 event_type = "configuration change";
8523 /* Stop sending new RAID offload reqs via the IO accelerator */
8524 scsi_block_requests(h->scsi_host);
8525 for (i = 0; i < h->ndevices; i++) {
8526 h->dev[i]->offload_enabled = 0;
8527 h->dev[i]->offload_to_be_enabled = 0;
8528 }
8529 hpsa_drain_accel_commands(h);
8530 /* Set 'accelerator path config change' bit */
8531 dev_warn(&h->pdev->dev,
8532 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8533 h->events, event_type);
8534 writel(h->events, &(h->cfgtable->clear_event_notify));
8535 /* Set the "clear event notify field update" bit 6 */
8536 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8537 /* Wait until ctlr clears 'clear event notify field', bit 6 */
8538 hpsa_wait_for_clear_event_notify_ack(h);
8539 scsi_unblock_requests(h->scsi_host);
8540 } else {
8541 /* Acknowledge controller notification events. */
8542 writel(h->events, &(h->cfgtable->clear_event_notify));
8543 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8544 hpsa_wait_for_clear_event_notify_ack(h);
8545 #if 0
8546 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8547 hpsa_wait_for_mode_change_ack(h);
8548 #endif
8549 }
8550 return;
8551 }
8552
8553 /* Check a register on the controller to see if there are configuration
8554 * changes (added/changed/removed logical drives, etc.) which mean that
8555 * we should rescan the controller for devices.
8556 * Also check flag for driver-initiated rescan.
8557 */
8558 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8559 {
8560 if (h->drv_req_rescan) {
8561 h->drv_req_rescan = 0;
8562 return 1;
8563 }
8564
8565 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8566 return 0;
8567
8568 h->events = readl(&(h->cfgtable->event_notify));
8569 return h->events & RESCAN_REQUIRED_EVENT_BITS;
8570 }
8571
8572 /*
8573 * Check if any of the offline devices have become ready
8574 */
8575 static int hpsa_offline_devices_ready(struct ctlr_info *h)
8576 {
8577 unsigned long flags;
8578 struct offline_device_entry *d;
8579 struct list_head *this, *tmp;
8580
8581 spin_lock_irqsave(&h->offline_device_lock, flags);
8582 list_for_each_safe(this, tmp, &h->offline_device_list) {
8583 d = list_entry(this, struct offline_device_entry,
8584 offline_list);
8585 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8586 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8587 spin_lock_irqsave(&h->offline_device_lock, flags);
8588 list_del(&d->offline_list);
8589 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8590 return 1;
8591 }
8592 spin_lock_irqsave(&h->offline_device_lock, flags);
8593 }
8594 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8595 return 0;
8596 }
8597
8598 static int hpsa_luns_changed(struct ctlr_info *h)
8599 {
8600 int rc = 1; /* assume there are changes */
8601 struct ReportLUNdata *logdev = NULL;
8602
8603 /* if we can't find out if lun data has changed,
8604 * assume that it has.
8605 */
8606
8607 if (!h->lastlogicals)
8608 goto out;
8609
8610 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8611 if (!logdev) {
8612 dev_warn(&h->pdev->dev,
8613 "Out of memory, can't track lun changes.\n");
8614 goto out;
8615 }
8616 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8617 dev_warn(&h->pdev->dev,
8618 "report luns failed, can't track lun changes.\n");
8619 goto out;
8620 }
8621 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8622 dev_info(&h->pdev->dev,
8623 "Lun changes detected.\n");
8624 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8625 goto out;
8626 } else
8627 rc = 0; /* no changes detected. */
8628 out:
8629 kfree(logdev);
8630 return rc;
8631 }
8632
8633 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8634 {
8635 unsigned long flags;
8636 struct ctlr_info *h = container_of(to_delayed_work(work),
8637 struct ctlr_info, rescan_ctlr_work);
8638
8639
8640 if (h->remove_in_progress)
8641 return;
8642
8643 if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
8644 scsi_host_get(h->scsi_host);
8645 hpsa_ack_ctlr_events(h);
8646 hpsa_scan_start(h->scsi_host);
8647 scsi_host_put(h->scsi_host);
8648 } else if (h->discovery_polling) {
8649 hpsa_disable_rld_caching(h);
8650 if (hpsa_luns_changed(h)) {
8651 struct Scsi_Host *sh = NULL;
8652
8653 dev_info(&h->pdev->dev,
8654 "driver discovery polling rescan.\n");
8655 sh = scsi_host_get(h->scsi_host);
8656 if (sh != NULL) {
8657 hpsa_scan_start(sh);
8658 scsi_host_put(sh);
8659 }
8660 }
8661 }
8662 spin_lock_irqsave(&h->lock, flags);
8663 if (!h->remove_in_progress)
8664 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8665 h->heartbeat_sample_interval);
8666 spin_unlock_irqrestore(&h->lock, flags);
8667 }
8668
8669 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8670 {
8671 unsigned long flags;
8672 struct ctlr_info *h = container_of(to_delayed_work(work),
8673 struct ctlr_info, monitor_ctlr_work);
8674
8675 detect_controller_lockup(h);
8676 if (lockup_detected(h))
8677 return;
8678
8679 spin_lock_irqsave(&h->lock, flags);
8680 if (!h->remove_in_progress)
8681 schedule_delayed_work(&h->monitor_ctlr_work,
8682 h->heartbeat_sample_interval);
8683 spin_unlock_irqrestore(&h->lock, flags);
8684 }
8685
8686 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8687 char *name)
8688 {
8689 struct workqueue_struct *wq = NULL;
8690
8691 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8692 if (!wq)
8693 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8694
8695 return wq;
8696 }
8697
8698 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8699 {
8700 int dac, rc;
8701 struct ctlr_info *h;
8702 int try_soft_reset = 0;
8703 unsigned long flags;
8704 u32 board_id;
8705
8706 if (number_of_controllers == 0)
8707 printk(KERN_INFO DRIVER_NAME "\n");
8708
8709 rc = hpsa_lookup_board_id(pdev, &board_id);
8710 if (rc < 0) {
8711 dev_warn(&pdev->dev, "Board ID not found\n");
8712 return rc;
8713 }
8714
8715 rc = hpsa_init_reset_devices(pdev, board_id);
8716 if (rc) {
8717 if (rc != -ENOTSUPP)
8718 return rc;
8719 /* If the reset fails in a particular way (it has no way to do
8720 * a proper hard reset, so returns -ENOTSUPP) we can try to do
8721 * a soft reset once we get the controller configured up to the
8722 * point that it can accept a command.
8723 */
8724 try_soft_reset = 1;
8725 rc = 0;
8726 }
8727
8728 reinit_after_soft_reset:
8729
8730 /* Command structures must be aligned on a 32-byte boundary because
8731 * the 5 lower bits of the address are used by the hardware. and by
8732 * the driver. See comments in hpsa.h for more info.
8733 */
8734 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8735 h = kzalloc(sizeof(*h), GFP_KERNEL);
8736 if (!h) {
8737 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8738 return -ENOMEM;
8739 }
8740
8741 h->pdev = pdev;
8742
8743 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8744 INIT_LIST_HEAD(&h->offline_device_list);
8745 spin_lock_init(&h->lock);
8746 spin_lock_init(&h->offline_device_lock);
8747 spin_lock_init(&h->scan_lock);
8748 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8749 atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
8750
8751 /* Allocate and clear per-cpu variable lockup_detected */
8752 h->lockup_detected = alloc_percpu(u32);
8753 if (!h->lockup_detected) {
8754 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8755 rc = -ENOMEM;
8756 goto clean1; /* aer/h */
8757 }
8758 set_lockup_detected_for_all_cpus(h, 0);
8759
8760 rc = hpsa_pci_init(h);
8761 if (rc)
8762 goto clean2; /* lu, aer/h */
8763
8764 /* relies on h-> settings made by hpsa_pci_init, including
8765 * interrupt_mode h->intr */
8766 rc = hpsa_scsi_host_alloc(h);
8767 if (rc)
8768 goto clean2_5; /* pci, lu, aer/h */
8769
8770 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8771 h->ctlr = number_of_controllers;
8772 number_of_controllers++;
8773
8774 /* configure PCI DMA stuff */
8775 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8776 if (rc == 0) {
8777 dac = 1;
8778 } else {
8779 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8780 if (rc == 0) {
8781 dac = 0;
8782 } else {
8783 dev_err(&pdev->dev, "no suitable DMA available\n");
8784 goto clean3; /* shost, pci, lu, aer/h */
8785 }
8786 }
8787
8788 /* make sure the board interrupts are off */
8789 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8790
8791 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8792 if (rc)
8793 goto clean3; /* shost, pci, lu, aer/h */
8794 rc = hpsa_alloc_cmd_pool(h);
8795 if (rc)
8796 goto clean4; /* irq, shost, pci, lu, aer/h */
8797 rc = hpsa_alloc_sg_chain_blocks(h);
8798 if (rc)
8799 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */
8800 init_waitqueue_head(&h->scan_wait_queue);
8801 init_waitqueue_head(&h->abort_cmd_wait_queue);
8802 init_waitqueue_head(&h->event_sync_wait_queue);
8803 mutex_init(&h->reset_mutex);
8804 h->scan_finished = 1; /* no scan currently in progress */
8805
8806 pci_set_drvdata(pdev, h);
8807 h->ndevices = 0;
8808
8809 spin_lock_init(&h->devlock);
8810 rc = hpsa_put_ctlr_into_performant_mode(h);
8811 if (rc)
8812 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8813
8814 /* create the resubmit workqueue */
8815 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8816 if (!h->rescan_ctlr_wq) {
8817 rc = -ENOMEM;
8818 goto clean7;
8819 }
8820
8821 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8822 if (!h->resubmit_wq) {
8823 rc = -ENOMEM;
8824 goto clean7; /* aer/h */
8825 }
8826
8827 /*
8828 * At this point, the controller is ready to take commands.
8829 * Now, if reset_devices and the hard reset didn't work, try
8830 * the soft reset and see if that works.
8831 */
8832 if (try_soft_reset) {
8833
8834 /* This is kind of gross. We may or may not get a completion
8835 * from the soft reset command, and if we do, then the value
8836 * from the fifo may or may not be valid. So, we wait 10 secs
8837 * after the reset throwing away any completions we get during
8838 * that time. Unregister the interrupt handler and register
8839 * fake ones to scoop up any residual completions.
8840 */
8841 spin_lock_irqsave(&h->lock, flags);
8842 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8843 spin_unlock_irqrestore(&h->lock, flags);
8844 hpsa_free_irqs(h);
8845 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8846 hpsa_intx_discard_completions);
8847 if (rc) {
8848 dev_warn(&h->pdev->dev,
8849 "Failed to request_irq after soft reset.\n");
8850 /*
8851 * cannot goto clean7 or free_irqs will be called
8852 * again. Instead, do its work
8853 */
8854 hpsa_free_performant_mode(h); /* clean7 */
8855 hpsa_free_sg_chain_blocks(h); /* clean6 */
8856 hpsa_free_cmd_pool(h); /* clean5 */
8857 /*
8858 * skip hpsa_free_irqs(h) clean4 since that
8859 * was just called before request_irqs failed
8860 */
8861 goto clean3;
8862 }
8863
8864 rc = hpsa_kdump_soft_reset(h);
8865 if (rc)
8866 /* Neither hard nor soft reset worked, we're hosed. */
8867 goto clean7;
8868
8869 dev_info(&h->pdev->dev, "Board READY.\n");
8870 dev_info(&h->pdev->dev,
8871 "Waiting for stale completions to drain.\n");
8872 h->access.set_intr_mask(h, HPSA_INTR_ON);
8873 msleep(10000);
8874 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8875
8876 rc = controller_reset_failed(h->cfgtable);
8877 if (rc)
8878 dev_info(&h->pdev->dev,
8879 "Soft reset appears to have failed.\n");
8880
8881 /* since the controller's reset, we have to go back and re-init
8882 * everything. Easiest to just forget what we've done and do it
8883 * all over again.
8884 */
8885 hpsa_undo_allocations_after_kdump_soft_reset(h);
8886 try_soft_reset = 0;
8887 if (rc)
8888 /* don't goto clean, we already unallocated */
8889 return -ENODEV;
8890
8891 goto reinit_after_soft_reset;
8892 }
8893
8894 /* Enable Accelerated IO path at driver layer */
8895 h->acciopath_status = 1;
8896 /* Disable discovery polling.*/
8897 h->discovery_polling = 0;
8898
8899
8900 /* Turn the interrupts on so we can service requests */
8901 h->access.set_intr_mask(h, HPSA_INTR_ON);
8902
8903 hpsa_hba_inquiry(h);
8904
8905 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8906 if (!h->lastlogicals)
8907 dev_info(&h->pdev->dev,
8908 "Can't track change to report lun data\n");
8909
8910 /* hook into SCSI subsystem */
8911 rc = hpsa_scsi_add_host(h);
8912 if (rc)
8913 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8914
8915 /* Monitor the controller for firmware lockups */
8916 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8917 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8918 schedule_delayed_work(&h->monitor_ctlr_work,
8919 h->heartbeat_sample_interval);
8920 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8921 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8922 h->heartbeat_sample_interval);
8923 return 0;
8924
8925 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8926 hpsa_free_performant_mode(h);
8927 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8928 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8929 hpsa_free_sg_chain_blocks(h);
8930 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8931 hpsa_free_cmd_pool(h);
8932 clean4: /* irq, shost, pci, lu, aer/h */
8933 hpsa_free_irqs(h);
8934 clean3: /* shost, pci, lu, aer/h */
8935 scsi_host_put(h->scsi_host);
8936 h->scsi_host = NULL;
8937 clean2_5: /* pci, lu, aer/h */
8938 hpsa_free_pci_init(h);
8939 clean2: /* lu, aer/h */
8940 if (h->lockup_detected) {
8941 free_percpu(h->lockup_detected);
8942 h->lockup_detected = NULL;
8943 }
8944 clean1: /* wq/aer/h */
8945 if (h->resubmit_wq) {
8946 destroy_workqueue(h->resubmit_wq);
8947 h->resubmit_wq = NULL;
8948 }
8949 if (h->rescan_ctlr_wq) {
8950 destroy_workqueue(h->rescan_ctlr_wq);
8951 h->rescan_ctlr_wq = NULL;
8952 }
8953 kfree(h);
8954 return rc;
8955 }
8956
8957 static void hpsa_flush_cache(struct ctlr_info *h)
8958 {
8959 char *flush_buf;
8960 struct CommandList *c;
8961 int rc;
8962
8963 if (unlikely(lockup_detected(h)))
8964 return;
8965 flush_buf = kzalloc(4, GFP_KERNEL);
8966 if (!flush_buf)
8967 return;
8968
8969 c = cmd_alloc(h);
8970
8971 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8972 RAID_CTLR_LUNID, TYPE_CMD)) {
8973 goto out;
8974 }
8975 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8976 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
8977 if (rc)
8978 goto out;
8979 if (c->err_info->CommandStatus != 0)
8980 out:
8981 dev_warn(&h->pdev->dev,
8982 "error flushing cache on controller\n");
8983 cmd_free(h, c);
8984 kfree(flush_buf);
8985 }
8986
8987 /* Make controller gather fresh report lun data each time we
8988 * send down a report luns request
8989 */
8990 static void hpsa_disable_rld_caching(struct ctlr_info *h)
8991 {
8992 u32 *options;
8993 struct CommandList *c;
8994 int rc;
8995
8996 /* Don't bother trying to set diag options if locked up */
8997 if (unlikely(h->lockup_detected))
8998 return;
8999
9000 options = kzalloc(sizeof(*options), GFP_KERNEL);
9001 if (!options) {
9002 dev_err(&h->pdev->dev,
9003 "Error: failed to disable rld caching, during alloc.\n");
9004 return;
9005 }
9006
9007 c = cmd_alloc(h);
9008
9009 /* first, get the current diag options settings */
9010 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
9011 RAID_CTLR_LUNID, TYPE_CMD))
9012 goto errout;
9013
9014 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
9015 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
9016 if ((rc != 0) || (c->err_info->CommandStatus != 0))
9017 goto errout;
9018
9019 /* Now, set the bit for disabling the RLD caching */
9020 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
9021
9022 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
9023 RAID_CTLR_LUNID, TYPE_CMD))
9024 goto errout;
9025
9026 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
9027 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
9028 if ((rc != 0) || (c->err_info->CommandStatus != 0))
9029 goto errout;
9030
9031 /* Now verify that it got set: */
9032 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
9033 RAID_CTLR_LUNID, TYPE_CMD))
9034 goto errout;
9035
9036 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
9037 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
9038 if ((rc != 0) || (c->err_info->CommandStatus != 0))
9039 goto errout;
9040
9041 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
9042 goto out;
9043
9044 errout:
9045 dev_err(&h->pdev->dev,
9046 "Error: failed to disable report lun data caching.\n");
9047 out:
9048 cmd_free(h, c);
9049 kfree(options);
9050 }
9051
9052 static void hpsa_shutdown(struct pci_dev *pdev)
9053 {
9054 struct ctlr_info *h;
9055
9056 h = pci_get_drvdata(pdev);
9057 /* Turn board interrupts off and send the flush cache command
9058 * sendcmd will turn off interrupt, and send the flush...
9059 * To write all data in the battery backed cache to disks
9060 */
9061 hpsa_flush_cache(h);
9062 h->access.set_intr_mask(h, HPSA_INTR_OFF);
9063 hpsa_free_irqs(h); /* init_one 4 */
9064 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
9065 }
9066
9067 static void hpsa_free_device_info(struct ctlr_info *h)
9068 {
9069 int i;
9070
9071 for (i = 0; i < h->ndevices; i++) {
9072 kfree(h->dev[i]);
9073 h->dev[i] = NULL;
9074 }
9075 }
9076
9077 static void hpsa_remove_one(struct pci_dev *pdev)
9078 {
9079 struct ctlr_info *h;
9080 unsigned long flags;
9081
9082 if (pci_get_drvdata(pdev) == NULL) {
9083 dev_err(&pdev->dev, "unable to remove device\n");
9084 return;
9085 }
9086 h = pci_get_drvdata(pdev);
9087
9088 /* Get rid of any controller monitoring work items */
9089 spin_lock_irqsave(&h->lock, flags);
9090 h->remove_in_progress = 1;
9091 spin_unlock_irqrestore(&h->lock, flags);
9092 cancel_delayed_work_sync(&h->monitor_ctlr_work);
9093 cancel_delayed_work_sync(&h->rescan_ctlr_work);
9094 destroy_workqueue(h->rescan_ctlr_wq);
9095 destroy_workqueue(h->resubmit_wq);
9096
9097 /*
9098 * Call before disabling interrupts.
9099 * scsi_remove_host can trigger I/O operations especially
9100 * when multipath is enabled. There can be SYNCHRONIZE CACHE
9101 * operations which cannot complete and will hang the system.
9102 */
9103 if (h->scsi_host)
9104 scsi_remove_host(h->scsi_host); /* init_one 8 */
9105 /* includes hpsa_free_irqs - init_one 4 */
9106 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
9107 hpsa_shutdown(pdev);
9108
9109 hpsa_free_device_info(h); /* scan */
9110
9111 kfree(h->hba_inquiry_data); /* init_one 10 */
9112 h->hba_inquiry_data = NULL; /* init_one 10 */
9113 hpsa_free_ioaccel2_sg_chain_blocks(h);
9114 hpsa_free_performant_mode(h); /* init_one 7 */
9115 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
9116 hpsa_free_cmd_pool(h); /* init_one 5 */
9117 kfree(h->lastlogicals);
9118
9119 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
9120
9121 scsi_host_put(h->scsi_host); /* init_one 3 */
9122 h->scsi_host = NULL; /* init_one 3 */
9123
9124 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
9125 hpsa_free_pci_init(h); /* init_one 2.5 */
9126
9127 free_percpu(h->lockup_detected); /* init_one 2 */
9128 h->lockup_detected = NULL; /* init_one 2 */
9129 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */
9130
9131 hpsa_delete_sas_host(h);
9132
9133 kfree(h); /* init_one 1 */
9134 }
9135
9136 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
9137 __attribute__((unused)) pm_message_t state)
9138 {
9139 return -ENOSYS;
9140 }
9141
9142 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
9143 {
9144 return -ENOSYS;
9145 }
9146
9147 static struct pci_driver hpsa_pci_driver = {
9148 .name = HPSA,
9149 .probe = hpsa_init_one,
9150 .remove = hpsa_remove_one,
9151 .id_table = hpsa_pci_device_id, /* id_table */
9152 .shutdown = hpsa_shutdown,
9153 .suspend = hpsa_suspend,
9154 .resume = hpsa_resume,
9155 };
9156
9157 /* Fill in bucket_map[], given nsgs (the max number of
9158 * scatter gather elements supported) and bucket[],
9159 * which is an array of 8 integers. The bucket[] array
9160 * contains 8 different DMA transfer sizes (in 16
9161 * byte increments) which the controller uses to fetch
9162 * commands. This function fills in bucket_map[], which
9163 * maps a given number of scatter gather elements to one of
9164 * the 8 DMA transfer sizes. The point of it is to allow the
9165 * controller to only do as much DMA as needed to fetch the
9166 * command, with the DMA transfer size encoded in the lower
9167 * bits of the command address.
9168 */
9169 static void calc_bucket_map(int bucket[], int num_buckets,
9170 int nsgs, int min_blocks, u32 *bucket_map)
9171 {
9172 int i, j, b, size;
9173
9174 /* Note, bucket_map must have nsgs+1 entries. */
9175 for (i = 0; i <= nsgs; i++) {
9176 /* Compute size of a command with i SG entries */
9177 size = i + min_blocks;
9178 b = num_buckets; /* Assume the biggest bucket */
9179 /* Find the bucket that is just big enough */
9180 for (j = 0; j < num_buckets; j++) {
9181 if (bucket[j] >= size) {
9182 b = j;
9183 break;
9184 }
9185 }
9186 /* for a command with i SG entries, use bucket b. */
9187 bucket_map[i] = b;
9188 }
9189 }
9190
9191 /*
9192 * return -ENODEV on err, 0 on success (or no action)
9193 * allocates numerous items that must be freed later
9194 */
9195 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9196 {
9197 int i;
9198 unsigned long register_value;
9199 unsigned long transMethod = CFGTBL_Trans_Performant |
9200 (trans_support & CFGTBL_Trans_use_short_tags) |
9201 CFGTBL_Trans_enable_directed_msix |
9202 (trans_support & (CFGTBL_Trans_io_accel1 |
9203 CFGTBL_Trans_io_accel2));
9204 struct access_method access = SA5_performant_access;
9205
9206 /* This is a bit complicated. There are 8 registers on
9207 * the controller which we write to to tell it 8 different
9208 * sizes of commands which there may be. It's a way of
9209 * reducing the DMA done to fetch each command. Encoded into
9210 * each command's tag are 3 bits which communicate to the controller
9211 * which of the eight sizes that command fits within. The size of
9212 * each command depends on how many scatter gather entries there are.
9213 * Each SG entry requires 16 bytes. The eight registers are programmed
9214 * with the number of 16-byte blocks a command of that size requires.
9215 * The smallest command possible requires 5 such 16 byte blocks.
9216 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
9217 * blocks. Note, this only extends to the SG entries contained
9218 * within the command block, and does not extend to chained blocks
9219 * of SG elements. bft[] contains the eight values we write to
9220 * the registers. They are not evenly distributed, but have more
9221 * sizes for small commands, and fewer sizes for larger commands.
9222 */
9223 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9224 #define MIN_IOACCEL2_BFT_ENTRY 5
9225 #define HPSA_IOACCEL2_HEADER_SZ 4
9226 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9227 13, 14, 15, 16, 17, 18, 19,
9228 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9229 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9230 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9231 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9232 16 * MIN_IOACCEL2_BFT_ENTRY);
9233 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9234 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9235 /* 5 = 1 s/g entry or 4k
9236 * 6 = 2 s/g entry or 8k
9237 * 8 = 4 s/g entry or 16k
9238 * 10 = 6 s/g entry or 24k
9239 */
9240
9241 /* If the controller supports either ioaccel method then
9242 * we can also use the RAID stack submit path that does not
9243 * perform the superfluous readl() after each command submission.
9244 */
9245 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9246 access = SA5_performant_access_no_read;
9247
9248 /* Controller spec: zero out this buffer. */
9249 for (i = 0; i < h->nreply_queues; i++)
9250 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9251
9252 bft[7] = SG_ENTRIES_IN_CMD + 4;
9253 calc_bucket_map(bft, ARRAY_SIZE(bft),
9254 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9255 for (i = 0; i < 8; i++)
9256 writel(bft[i], &h->transtable->BlockFetch[i]);
9257
9258 /* size of controller ring buffer */
9259 writel(h->max_commands, &h->transtable->RepQSize);
9260 writel(h->nreply_queues, &h->transtable->RepQCount);
9261 writel(0, &h->transtable->RepQCtrAddrLow32);
9262 writel(0, &h->transtable->RepQCtrAddrHigh32);
9263
9264 for (i = 0; i < h->nreply_queues; i++) {
9265 writel(0, &h->transtable->RepQAddr[i].upper);
9266 writel(h->reply_queue[i].busaddr,
9267 &h->transtable->RepQAddr[i].lower);
9268 }
9269
9270 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9271 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9272 /*
9273 * enable outbound interrupt coalescing in accelerator mode;
9274 */
9275 if (trans_support & CFGTBL_Trans_io_accel1) {
9276 access = SA5_ioaccel_mode1_access;
9277 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9278 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9279 } else {
9280 if (trans_support & CFGTBL_Trans_io_accel2) {
9281 access = SA5_ioaccel_mode2_access;
9282 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9283 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9284 }
9285 }
9286 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9287 if (hpsa_wait_for_mode_change_ack(h)) {
9288 dev_err(&h->pdev->dev,
9289 "performant mode problem - doorbell timeout\n");
9290 return -ENODEV;
9291 }
9292 register_value = readl(&(h->cfgtable->TransportActive));
9293 if (!(register_value & CFGTBL_Trans_Performant)) {
9294 dev_err(&h->pdev->dev,
9295 "performant mode problem - transport not active\n");
9296 return -ENODEV;
9297 }
9298 /* Change the access methods to the performant access methods */
9299 h->access = access;
9300 h->transMethod = transMethod;
9301
9302 if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9303 (trans_support & CFGTBL_Trans_io_accel2)))
9304 return 0;
9305
9306 if (trans_support & CFGTBL_Trans_io_accel1) {
9307 /* Set up I/O accelerator mode */
9308 for (i = 0; i < h->nreply_queues; i++) {
9309 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9310 h->reply_queue[i].current_entry =
9311 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9312 }
9313 bft[7] = h->ioaccel_maxsg + 8;
9314 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9315 h->ioaccel1_blockFetchTable);
9316
9317 /* initialize all reply queue entries to unused */
9318 for (i = 0; i < h->nreply_queues; i++)
9319 memset(h->reply_queue[i].head,
9320 (u8) IOACCEL_MODE1_REPLY_UNUSED,
9321 h->reply_queue_size);
9322
9323 /* set all the constant fields in the accelerator command
9324 * frames once at init time to save CPU cycles later.
9325 */
9326 for (i = 0; i < h->nr_cmds; i++) {
9327 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9328
9329 cp->function = IOACCEL1_FUNCTION_SCSIIO;
9330 cp->err_info = (u32) (h->errinfo_pool_dhandle +
9331 (i * sizeof(struct ErrorInfo)));
9332 cp->err_info_len = sizeof(struct ErrorInfo);
9333 cp->sgl_offset = IOACCEL1_SGLOFFSET;
9334 cp->host_context_flags =
9335 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9336 cp->timeout_sec = 0;
9337 cp->ReplyQueue = 0;
9338 cp->tag =
9339 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
9340 cp->host_addr =
9341 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9342 (i * sizeof(struct io_accel1_cmd)));
9343 }
9344 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9345 u64 cfg_offset, cfg_base_addr_index;
9346 u32 bft2_offset, cfg_base_addr;
9347 int rc;
9348
9349 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9350 &cfg_base_addr_index, &cfg_offset);
9351 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9352 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9353 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9354 4, h->ioaccel2_blockFetchTable);
9355 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9356 BUILD_BUG_ON(offsetof(struct CfgTable,
9357 io_accel_request_size_offset) != 0xb8);
9358 h->ioaccel2_bft2_regs =
9359 remap_pci_mem(pci_resource_start(h->pdev,
9360 cfg_base_addr_index) +
9361 cfg_offset + bft2_offset,
9362 ARRAY_SIZE(bft2) *
9363 sizeof(*h->ioaccel2_bft2_regs));
9364 for (i = 0; i < ARRAY_SIZE(bft2); i++)
9365 writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9366 }
9367 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9368 if (hpsa_wait_for_mode_change_ack(h)) {
9369 dev_err(&h->pdev->dev,
9370 "performant mode problem - enabling ioaccel mode\n");
9371 return -ENODEV;
9372 }
9373 return 0;
9374 }
9375
9376 /* Free ioaccel1 mode command blocks and block fetch table */
9377 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9378 {
9379 if (h->ioaccel_cmd_pool) {
9380 pci_free_consistent(h->pdev,
9381 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9382 h->ioaccel_cmd_pool,
9383 h->ioaccel_cmd_pool_dhandle);
9384 h->ioaccel_cmd_pool = NULL;
9385 h->ioaccel_cmd_pool_dhandle = 0;
9386 }
9387 kfree(h->ioaccel1_blockFetchTable);
9388 h->ioaccel1_blockFetchTable = NULL;
9389 }
9390
9391 /* Allocate ioaccel1 mode command blocks and block fetch table */
9392 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9393 {
9394 h->ioaccel_maxsg =
9395 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9396 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9397 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9398
9399 /* Command structures must be aligned on a 128-byte boundary
9400 * because the 7 lower bits of the address are used by the
9401 * hardware.
9402 */
9403 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9404 IOACCEL1_COMMANDLIST_ALIGNMENT);
9405 h->ioaccel_cmd_pool =
9406 pci_alloc_consistent(h->pdev,
9407 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9408 &(h->ioaccel_cmd_pool_dhandle));
9409
9410 h->ioaccel1_blockFetchTable =
9411 kmalloc(((h->ioaccel_maxsg + 1) *
9412 sizeof(u32)), GFP_KERNEL);
9413
9414 if ((h->ioaccel_cmd_pool == NULL) ||
9415 (h->ioaccel1_blockFetchTable == NULL))
9416 goto clean_up;
9417
9418 memset(h->ioaccel_cmd_pool, 0,
9419 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9420 return 0;
9421
9422 clean_up:
9423 hpsa_free_ioaccel1_cmd_and_bft(h);
9424 return -ENOMEM;
9425 }
9426
9427 /* Free ioaccel2 mode command blocks and block fetch table */
9428 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9429 {
9430 hpsa_free_ioaccel2_sg_chain_blocks(h);
9431
9432 if (h->ioaccel2_cmd_pool) {
9433 pci_free_consistent(h->pdev,
9434 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9435 h->ioaccel2_cmd_pool,
9436 h->ioaccel2_cmd_pool_dhandle);
9437 h->ioaccel2_cmd_pool = NULL;
9438 h->ioaccel2_cmd_pool_dhandle = 0;
9439 }
9440 kfree(h->ioaccel2_blockFetchTable);
9441 h->ioaccel2_blockFetchTable = NULL;
9442 }
9443
9444 /* Allocate ioaccel2 mode command blocks and block fetch table */
9445 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9446 {
9447 int rc;
9448
9449 /* Allocate ioaccel2 mode command blocks and block fetch table */
9450
9451 h->ioaccel_maxsg =
9452 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9453 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9454 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9455
9456 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9457 IOACCEL2_COMMANDLIST_ALIGNMENT);
9458 h->ioaccel2_cmd_pool =
9459 pci_alloc_consistent(h->pdev,
9460 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9461 &(h->ioaccel2_cmd_pool_dhandle));
9462
9463 h->ioaccel2_blockFetchTable =
9464 kmalloc(((h->ioaccel_maxsg + 1) *
9465 sizeof(u32)), GFP_KERNEL);
9466
9467 if ((h->ioaccel2_cmd_pool == NULL) ||
9468 (h->ioaccel2_blockFetchTable == NULL)) {
9469 rc = -ENOMEM;
9470 goto clean_up;
9471 }
9472
9473 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9474 if (rc)
9475 goto clean_up;
9476
9477 memset(h->ioaccel2_cmd_pool, 0,
9478 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9479 return 0;
9480
9481 clean_up:
9482 hpsa_free_ioaccel2_cmd_and_bft(h);
9483 return rc;
9484 }
9485
9486 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9487 static void hpsa_free_performant_mode(struct ctlr_info *h)
9488 {
9489 kfree(h->blockFetchTable);
9490 h->blockFetchTable = NULL;
9491 hpsa_free_reply_queues(h);
9492 hpsa_free_ioaccel1_cmd_and_bft(h);
9493 hpsa_free_ioaccel2_cmd_and_bft(h);
9494 }
9495
9496 /* return -ENODEV on error, 0 on success (or no action)
9497 * allocates numerous items that must be freed later
9498 */
9499 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
9500 {
9501 u32 trans_support;
9502 unsigned long transMethod = CFGTBL_Trans_Performant |
9503 CFGTBL_Trans_use_short_tags;
9504 int i, rc;
9505
9506 if (hpsa_simple_mode)
9507 return 0;
9508
9509 trans_support = readl(&(h->cfgtable->TransportSupport));
9510 if (!(trans_support & PERFORMANT_MODE))
9511 return 0;
9512
9513 /* Check for I/O accelerator mode support */
9514 if (trans_support & CFGTBL_Trans_io_accel1) {
9515 transMethod |= CFGTBL_Trans_io_accel1 |
9516 CFGTBL_Trans_enable_directed_msix;
9517 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9518 if (rc)
9519 return rc;
9520 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9521 transMethod |= CFGTBL_Trans_io_accel2 |
9522 CFGTBL_Trans_enable_directed_msix;
9523 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9524 if (rc)
9525 return rc;
9526 }
9527
9528 h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
9529 hpsa_get_max_perf_mode_cmds(h);
9530 /* Performant mode ring buffer and supporting data structures */
9531 h->reply_queue_size = h->max_commands * sizeof(u64);
9532
9533 for (i = 0; i < h->nreply_queues; i++) {
9534 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
9535 h->reply_queue_size,
9536 &(h->reply_queue[i].busaddr));
9537 if (!h->reply_queue[i].head) {
9538 rc = -ENOMEM;
9539 goto clean1; /* rq, ioaccel */
9540 }
9541 h->reply_queue[i].size = h->max_commands;
9542 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
9543 h->reply_queue[i].current_entry = 0;
9544 }
9545
9546 /* Need a block fetch table for performant mode */
9547 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9548 sizeof(u32)), GFP_KERNEL);
9549 if (!h->blockFetchTable) {
9550 rc = -ENOMEM;
9551 goto clean1; /* rq, ioaccel */
9552 }
9553
9554 rc = hpsa_enter_performant_mode(h, trans_support);
9555 if (rc)
9556 goto clean2; /* bft, rq, ioaccel */
9557 return 0;
9558
9559 clean2: /* bft, rq, ioaccel */
9560 kfree(h->blockFetchTable);
9561 h->blockFetchTable = NULL;
9562 clean1: /* rq, ioaccel */
9563 hpsa_free_reply_queues(h);
9564 hpsa_free_ioaccel1_cmd_and_bft(h);
9565 hpsa_free_ioaccel2_cmd_and_bft(h);
9566 return rc;
9567 }
9568
9569 static int is_accelerated_cmd(struct CommandList *c)
9570 {
9571 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9572 }
9573
9574 static void hpsa_drain_accel_commands(struct ctlr_info *h)
9575 {
9576 struct CommandList *c = NULL;
9577 int i, accel_cmds_out;
9578 int refcount;
9579
9580 do { /* wait for all outstanding ioaccel commands to drain out */
9581 accel_cmds_out = 0;
9582 for (i = 0; i < h->nr_cmds; i++) {
9583 c = h->cmd_pool + i;
9584 refcount = atomic_inc_return(&c->refcount);
9585 if (refcount > 1) /* Command is allocated */
9586 accel_cmds_out += is_accelerated_cmd(c);
9587 cmd_free(h, c);
9588 }
9589 if (accel_cmds_out <= 0)
9590 break;
9591 msleep(100);
9592 } while (1);
9593 }
9594
9595 static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9596 struct hpsa_sas_port *hpsa_sas_port)
9597 {
9598 struct hpsa_sas_phy *hpsa_sas_phy;
9599 struct sas_phy *phy;
9600
9601 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9602 if (!hpsa_sas_phy)
9603 return NULL;
9604
9605 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9606 hpsa_sas_port->next_phy_index);
9607 if (!phy) {
9608 kfree(hpsa_sas_phy);
9609 return NULL;
9610 }
9611
9612 hpsa_sas_port->next_phy_index++;
9613 hpsa_sas_phy->phy = phy;
9614 hpsa_sas_phy->parent_port = hpsa_sas_port;
9615
9616 return hpsa_sas_phy;
9617 }
9618
9619 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9620 {
9621 struct sas_phy *phy = hpsa_sas_phy->phy;
9622
9623 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9624 sas_phy_free(phy);
9625 if (hpsa_sas_phy->added_to_port)
9626 list_del(&hpsa_sas_phy->phy_list_entry);
9627 kfree(hpsa_sas_phy);
9628 }
9629
9630 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9631 {
9632 int rc;
9633 struct hpsa_sas_port *hpsa_sas_port;
9634 struct sas_phy *phy;
9635 struct sas_identify *identify;
9636
9637 hpsa_sas_port = hpsa_sas_phy->parent_port;
9638 phy = hpsa_sas_phy->phy;
9639
9640 identify = &phy->identify;
9641 memset(identify, 0, sizeof(*identify));
9642 identify->sas_address = hpsa_sas_port->sas_address;
9643 identify->device_type = SAS_END_DEVICE;
9644 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9645 identify->target_port_protocols = SAS_PROTOCOL_STP;
9646 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9647 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9648 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9649 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9650 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9651
9652 rc = sas_phy_add(hpsa_sas_phy->phy);
9653 if (rc)
9654 return rc;
9655
9656 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9657 list_add_tail(&hpsa_sas_phy->phy_list_entry,
9658 &hpsa_sas_port->phy_list_head);
9659 hpsa_sas_phy->added_to_port = true;
9660
9661 return 0;
9662 }
9663
9664 static int
9665 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9666 struct sas_rphy *rphy)
9667 {
9668 struct sas_identify *identify;
9669
9670 identify = &rphy->identify;
9671 identify->sas_address = hpsa_sas_port->sas_address;
9672 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9673 identify->target_port_protocols = SAS_PROTOCOL_STP;
9674
9675 return sas_rphy_add(rphy);
9676 }
9677
9678 static struct hpsa_sas_port
9679 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9680 u64 sas_address)
9681 {
9682 int rc;
9683 struct hpsa_sas_port *hpsa_sas_port;
9684 struct sas_port *port;
9685
9686 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9687 if (!hpsa_sas_port)
9688 return NULL;
9689
9690 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9691 hpsa_sas_port->parent_node = hpsa_sas_node;
9692
9693 port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9694 if (!port)
9695 goto free_hpsa_port;
9696
9697 rc = sas_port_add(port);
9698 if (rc)
9699 goto free_sas_port;
9700
9701 hpsa_sas_port->port = port;
9702 hpsa_sas_port->sas_address = sas_address;
9703 list_add_tail(&hpsa_sas_port->port_list_entry,
9704 &hpsa_sas_node->port_list_head);
9705
9706 return hpsa_sas_port;
9707
9708 free_sas_port:
9709 sas_port_free(port);
9710 free_hpsa_port:
9711 kfree(hpsa_sas_port);
9712
9713 return NULL;
9714 }
9715
9716 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9717 {
9718 struct hpsa_sas_phy *hpsa_sas_phy;
9719 struct hpsa_sas_phy *next;
9720
9721 list_for_each_entry_safe(hpsa_sas_phy, next,
9722 &hpsa_sas_port->phy_list_head, phy_list_entry)
9723 hpsa_free_sas_phy(hpsa_sas_phy);
9724
9725 sas_port_delete(hpsa_sas_port->port);
9726 list_del(&hpsa_sas_port->port_list_entry);
9727 kfree(hpsa_sas_port);
9728 }
9729
9730 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9731 {
9732 struct hpsa_sas_node *hpsa_sas_node;
9733
9734 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9735 if (hpsa_sas_node) {
9736 hpsa_sas_node->parent_dev = parent_dev;
9737 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9738 }
9739
9740 return hpsa_sas_node;
9741 }
9742
9743 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9744 {
9745 struct hpsa_sas_port *hpsa_sas_port;
9746 struct hpsa_sas_port *next;
9747
9748 if (!hpsa_sas_node)
9749 return;
9750
9751 list_for_each_entry_safe(hpsa_sas_port, next,
9752 &hpsa_sas_node->port_list_head, port_list_entry)
9753 hpsa_free_sas_port(hpsa_sas_port);
9754
9755 kfree(hpsa_sas_node);
9756 }
9757
9758 static struct hpsa_scsi_dev_t
9759 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9760 struct sas_rphy *rphy)
9761 {
9762 int i;
9763 struct hpsa_scsi_dev_t *device;
9764
9765 for (i = 0; i < h->ndevices; i++) {
9766 device = h->dev[i];
9767 if (!device->sas_port)
9768 continue;
9769 if (device->sas_port->rphy == rphy)
9770 return device;
9771 }
9772
9773 return NULL;
9774 }
9775
9776 static int hpsa_add_sas_host(struct ctlr_info *h)
9777 {
9778 int rc;
9779 struct device *parent_dev;
9780 struct hpsa_sas_node *hpsa_sas_node;
9781 struct hpsa_sas_port *hpsa_sas_port;
9782 struct hpsa_sas_phy *hpsa_sas_phy;
9783
9784 parent_dev = &h->scsi_host->shost_gendev;
9785
9786 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9787 if (!hpsa_sas_node)
9788 return -ENOMEM;
9789
9790 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9791 if (!hpsa_sas_port) {
9792 rc = -ENODEV;
9793 goto free_sas_node;
9794 }
9795
9796 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9797 if (!hpsa_sas_phy) {
9798 rc = -ENODEV;
9799 goto free_sas_port;
9800 }
9801
9802 rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9803 if (rc)
9804 goto free_sas_phy;
9805
9806 h->sas_host = hpsa_sas_node;
9807
9808 return 0;
9809
9810 free_sas_phy:
9811 hpsa_free_sas_phy(hpsa_sas_phy);
9812 free_sas_port:
9813 hpsa_free_sas_port(hpsa_sas_port);
9814 free_sas_node:
9815 hpsa_free_sas_node(hpsa_sas_node);
9816
9817 return rc;
9818 }
9819
9820 static void hpsa_delete_sas_host(struct ctlr_info *h)
9821 {
9822 hpsa_free_sas_node(h->sas_host);
9823 }
9824
9825 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9826 struct hpsa_scsi_dev_t *device)
9827 {
9828 int rc;
9829 struct hpsa_sas_port *hpsa_sas_port;
9830 struct sas_rphy *rphy;
9831
9832 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9833 if (!hpsa_sas_port)
9834 return -ENOMEM;
9835
9836 rphy = sas_end_device_alloc(hpsa_sas_port->port);
9837 if (!rphy) {
9838 rc = -ENODEV;
9839 goto free_sas_port;
9840 }
9841
9842 hpsa_sas_port->rphy = rphy;
9843 device->sas_port = hpsa_sas_port;
9844
9845 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9846 if (rc)
9847 goto free_sas_port;
9848
9849 return 0;
9850
9851 free_sas_port:
9852 hpsa_free_sas_port(hpsa_sas_port);
9853 device->sas_port = NULL;
9854
9855 return rc;
9856 }
9857
9858 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9859 {
9860 if (device->sas_port) {
9861 hpsa_free_sas_port(device->sas_port);
9862 device->sas_port = NULL;
9863 }
9864 }
9865
9866 static int
9867 hpsa_sas_get_linkerrors(struct sas_phy *phy)
9868 {
9869 return 0;
9870 }
9871
9872 static int
9873 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9874 {
9875 *identifier = 0;
9876 return 0;
9877 }
9878
9879 static int
9880 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9881 {
9882 return -ENXIO;
9883 }
9884
9885 static int
9886 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9887 {
9888 return 0;
9889 }
9890
9891 static int
9892 hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9893 {
9894 return 0;
9895 }
9896
9897 static int
9898 hpsa_sas_phy_setup(struct sas_phy *phy)
9899 {
9900 return 0;
9901 }
9902
9903 static void
9904 hpsa_sas_phy_release(struct sas_phy *phy)
9905 {
9906 }
9907
9908 static int
9909 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9910 {
9911 return -EINVAL;
9912 }
9913
9914 /* SMP = Serial Management Protocol */
9915 static int
9916 hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,
9917 struct request *req)
9918 {
9919 return -EINVAL;
9920 }
9921
9922 static struct sas_function_template hpsa_sas_transport_functions = {
9923 .get_linkerrors = hpsa_sas_get_linkerrors,
9924 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9925 .get_bay_identifier = hpsa_sas_get_bay_identifier,
9926 .phy_reset = hpsa_sas_phy_reset,
9927 .phy_enable = hpsa_sas_phy_enable,
9928 .phy_setup = hpsa_sas_phy_setup,
9929 .phy_release = hpsa_sas_phy_release,
9930 .set_phy_speed = hpsa_sas_phy_speed,
9931 .smp_handler = hpsa_sas_smp_handler,
9932 };
9933
9934 /*
9935 * This is it. Register the PCI driver information for the cards we control
9936 * the OS will call our registered routines when it finds one of our cards.
9937 */
9938 static int __init hpsa_init(void)
9939 {
9940 int rc;
9941
9942 hpsa_sas_transport_template =
9943 sas_attach_transport(&hpsa_sas_transport_functions);
9944 if (!hpsa_sas_transport_template)
9945 return -ENODEV;
9946
9947 rc = pci_register_driver(&hpsa_pci_driver);
9948
9949 if (rc)
9950 sas_release_transport(hpsa_sas_transport_template);
9951
9952 return rc;
9953 }
9954
9955 static void __exit hpsa_cleanup(void)
9956 {
9957 pci_unregister_driver(&hpsa_pci_driver);
9958 sas_release_transport(hpsa_sas_transport_template);
9959 }
9960
9961 static void __attribute__((unused)) verify_offsets(void)
9962 {
9963 #define VERIFY_OFFSET(member, offset) \
9964 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9965
9966 VERIFY_OFFSET(structure_size, 0);
9967 VERIFY_OFFSET(volume_blk_size, 4);
9968 VERIFY_OFFSET(volume_blk_cnt, 8);
9969 VERIFY_OFFSET(phys_blk_shift, 16);
9970 VERIFY_OFFSET(parity_rotation_shift, 17);
9971 VERIFY_OFFSET(strip_size, 18);
9972 VERIFY_OFFSET(disk_starting_blk, 20);
9973 VERIFY_OFFSET(disk_blk_cnt, 28);
9974 VERIFY_OFFSET(data_disks_per_row, 36);
9975 VERIFY_OFFSET(metadata_disks_per_row, 38);
9976 VERIFY_OFFSET(row_cnt, 40);
9977 VERIFY_OFFSET(layout_map_count, 42);
9978 VERIFY_OFFSET(flags, 44);
9979 VERIFY_OFFSET(dekindex, 46);
9980 /* VERIFY_OFFSET(reserved, 48 */
9981 VERIFY_OFFSET(data, 64);
9982
9983 #undef VERIFY_OFFSET
9984
9985 #define VERIFY_OFFSET(member, offset) \
9986 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9987
9988 VERIFY_OFFSET(IU_type, 0);
9989 VERIFY_OFFSET(direction, 1);
9990 VERIFY_OFFSET(reply_queue, 2);
9991 /* VERIFY_OFFSET(reserved1, 3); */
9992 VERIFY_OFFSET(scsi_nexus, 4);
9993 VERIFY_OFFSET(Tag, 8);
9994 VERIFY_OFFSET(cdb, 16);
9995 VERIFY_OFFSET(cciss_lun, 32);
9996 VERIFY_OFFSET(data_len, 40);
9997 VERIFY_OFFSET(cmd_priority_task_attr, 44);
9998 VERIFY_OFFSET(sg_count, 45);
9999 /* VERIFY_OFFSET(reserved3 */
10000 VERIFY_OFFSET(err_ptr, 48);
10001 VERIFY_OFFSET(err_len, 56);
10002 /* VERIFY_OFFSET(reserved4 */
10003 VERIFY_OFFSET(sg, 64);
10004
10005 #undef VERIFY_OFFSET
10006
10007 #define VERIFY_OFFSET(member, offset) \
10008 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
10009
10010 VERIFY_OFFSET(dev_handle, 0x00);
10011 VERIFY_OFFSET(reserved1, 0x02);
10012 VERIFY_OFFSET(function, 0x03);
10013 VERIFY_OFFSET(reserved2, 0x04);
10014 VERIFY_OFFSET(err_info, 0x0C);
10015 VERIFY_OFFSET(reserved3, 0x10);
10016 VERIFY_OFFSET(err_info_len, 0x12);
10017 VERIFY_OFFSET(reserved4, 0x13);
10018 VERIFY_OFFSET(sgl_offset, 0x14);
10019 VERIFY_OFFSET(reserved5, 0x15);
10020 VERIFY_OFFSET(transfer_len, 0x1C);
10021 VERIFY_OFFSET(reserved6, 0x20);
10022 VERIFY_OFFSET(io_flags, 0x24);
10023 VERIFY_OFFSET(reserved7, 0x26);
10024 VERIFY_OFFSET(LUN, 0x34);
10025 VERIFY_OFFSET(control, 0x3C);
10026 VERIFY_OFFSET(CDB, 0x40);
10027 VERIFY_OFFSET(reserved8, 0x50);
10028 VERIFY_OFFSET(host_context_flags, 0x60);
10029 VERIFY_OFFSET(timeout_sec, 0x62);
10030 VERIFY_OFFSET(ReplyQueue, 0x64);
10031 VERIFY_OFFSET(reserved9, 0x65);
10032 VERIFY_OFFSET(tag, 0x68);
10033 VERIFY_OFFSET(host_addr, 0x70);
10034 VERIFY_OFFSET(CISS_LUN, 0x78);
10035 VERIFY_OFFSET(SG, 0x78 + 8);
10036 #undef VERIFY_OFFSET
10037 }
10038
10039 module_init(hpsa_init);
10040 module_exit(hpsa_cleanup);
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