2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55 #include <linux/device.h>
61 #include "probe_roms.h"
62 #include "remote_device.h"
64 #include "scu_completion_codes.h"
65 #include "scu_event_codes.h"
66 #include "registers.h"
67 #include "scu_remote_node_context.h"
68 #include "scu_task_context.h"
69 #include "scu_unsolicited_frame.h"
72 #define SCU_CONTEXT_RAM_INIT_STALL_TIME 200
75 * smu_dcc_get_max_ports() -
77 * This macro returns the maximum number of logical ports supported by the
78 * hardware. The caller passes in the value read from the device context
79 * capacity register and this macro will mash and shift the value appropriately.
81 #define smu_dcc_get_max_ports(dcc_value) \
83 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_MASK) \
84 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT) + 1 \
88 * smu_dcc_get_max_task_context() -
90 * This macro returns the maximum number of task contexts supported by the
91 * hardware. The caller passes in the value read from the device context
92 * capacity register and this macro will mash and shift the value appropriately.
94 #define smu_dcc_get_max_task_context(dcc_value) \
96 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_MASK) \
97 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT) + 1 \
101 * smu_dcc_get_max_remote_node_context() -
103 * This macro returns the maximum number of remote node contexts supported by
104 * the hardware. The caller passes in the value read from the device context
105 * capacity register and this macro will mash and shift the value appropriately.
107 #define smu_dcc_get_max_remote_node_context(dcc_value) \
109 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_MASK) \
110 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT) + 1 \
114 #define SCIC_SDS_CONTROLLER_MIN_TIMER_COUNT 3
115 #define SCIC_SDS_CONTROLLER_MAX_TIMER_COUNT 3
120 * The number of milliseconds to wait for a phy to start.
122 #define SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT 100
127 * The number of milliseconds to wait while a given phy is consuming power
128 * before allowing another set of phys to consume power. Ultimately, this will
129 * be specified by OEM parameter.
131 #define SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL 500
134 * NORMALIZE_PUT_POINTER() -
136 * This macro will normalize the completion queue put pointer so its value can
137 * be used as an array inde
139 #define NORMALIZE_PUT_POINTER(x) \
140 ((x) & SMU_COMPLETION_QUEUE_PUT_POINTER_MASK)
144 * NORMALIZE_EVENT_POINTER() -
146 * This macro will normalize the completion queue event entry so its value can
147 * be used as an index.
149 #define NORMALIZE_EVENT_POINTER(x) \
151 ((x) & SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_MASK) \
152 >> SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_SHIFT \
156 * INCREMENT_COMPLETION_QUEUE_GET() -
158 * This macro will increment the controllers completion queue index value and
159 * possibly toggle the cycle bit if the completion queue index wraps back to 0.
161 #define INCREMENT_COMPLETION_QUEUE_GET(controller, index, cycle) \
162 INCREMENT_QUEUE_GET(\
165 (controller)->completion_queue_entries, \
170 * INCREMENT_EVENT_QUEUE_GET() -
172 * This macro will increment the controllers event queue index value and
173 * possibly toggle the event cycle bit if the event queue index wraps back to 0.
175 #define INCREMENT_EVENT_QUEUE_GET(controller, index, cycle) \
176 INCREMENT_QUEUE_GET(\
179 (controller)->completion_event_entries, \
180 SMU_CQGR_EVENT_CYCLE_BIT \
185 * NORMALIZE_GET_POINTER() -
187 * This macro will normalize the completion queue get pointer so its value can
188 * be used as an index into an array
190 #define NORMALIZE_GET_POINTER(x) \
191 ((x) & SMU_COMPLETION_QUEUE_GET_POINTER_MASK)
194 * NORMALIZE_GET_POINTER_CYCLE_BIT() -
196 * This macro will normalize the completion queue cycle pointer so it matches
197 * the completion queue cycle bit
199 #define NORMALIZE_GET_POINTER_CYCLE_BIT(x) \
200 ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT))
203 * COMPLETION_QUEUE_CYCLE_BIT() -
205 * This macro will return the cycle bit of the completion queue entry
207 #define COMPLETION_QUEUE_CYCLE_BIT(x) ((x) & 0x80000000)
209 static bool scic_sds_controller_completion_queue_has_entries(
210 struct scic_sds_controller
*scic
)
212 u32 get_value
= scic
->completion_queue_get
;
213 u32 get_index
= get_value
& SMU_COMPLETION_QUEUE_GET_POINTER_MASK
;
215 if (NORMALIZE_GET_POINTER_CYCLE_BIT(get_value
) ==
216 COMPLETION_QUEUE_CYCLE_BIT(scic
->completion_queue
[get_index
]))
222 static bool scic_sds_controller_isr(struct scic_sds_controller
*scic
)
224 if (scic_sds_controller_completion_queue_has_entries(scic
)) {
228 * we have a spurious interrupt it could be that we have already
229 * emptied the completion queue from a previous interrupt */
230 writel(SMU_ISR_COMPLETION
, &scic
->smu_registers
->interrupt_status
);
233 * There is a race in the hardware that could cause us not to be notified
234 * of an interrupt completion if we do not take this step. We will mask
235 * then unmask the interrupts so if there is another interrupt pending
236 * the clearing of the interrupt source we get the next interrupt message. */
237 writel(0xFF000000, &scic
->smu_registers
->interrupt_mask
);
238 writel(0, &scic
->smu_registers
->interrupt_mask
);
244 irqreturn_t
isci_msix_isr(int vec
, void *data
)
246 struct isci_host
*ihost
= data
;
248 if (scic_sds_controller_isr(&ihost
->sci
))
249 tasklet_schedule(&ihost
->completion_tasklet
);
254 static bool scic_sds_controller_error_isr(struct scic_sds_controller
*scic
)
256 u32 interrupt_status
;
259 readl(&scic
->smu_registers
->interrupt_status
);
260 interrupt_status
&= (SMU_ISR_QUEUE_ERROR
| SMU_ISR_QUEUE_SUSPEND
);
262 if (interrupt_status
!= 0) {
264 * There is an error interrupt pending so let it through and handle
270 * There is a race in the hardware that could cause us not to be notified
271 * of an interrupt completion if we do not take this step. We will mask
272 * then unmask the error interrupts so if there was another interrupt
273 * pending we will be notified.
274 * Could we write the value of (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)? */
275 writel(0xff, &scic
->smu_registers
->interrupt_mask
);
276 writel(0, &scic
->smu_registers
->interrupt_mask
);
281 static void scic_sds_controller_task_completion(struct scic_sds_controller
*scic
,
282 u32 completion_entry
)
285 struct scic_sds_request
*io_request
;
287 index
= SCU_GET_COMPLETION_INDEX(completion_entry
);
288 io_request
= scic
->io_request_table
[index
];
290 /* Make sure that we really want to process this IO request */
293 && (io_request
->io_tag
!= SCI_CONTROLLER_INVALID_IO_TAG
)
295 scic_sds_io_tag_get_sequence(io_request
->io_tag
)
296 == scic
->io_request_sequence
[index
]
299 /* Yep this is a valid io request pass it along to the io request handler */
300 scic_sds_io_request_tc_completion(io_request
, completion_entry
);
304 static void scic_sds_controller_sdma_completion(struct scic_sds_controller
*scic
,
305 u32 completion_entry
)
308 struct scic_sds_request
*io_request
;
309 struct scic_sds_remote_device
*device
;
311 index
= SCU_GET_COMPLETION_INDEX(completion_entry
);
313 switch (scu_get_command_request_type(completion_entry
)) {
314 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC
:
315 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_TC
:
316 io_request
= scic
->io_request_table
[index
];
317 dev_warn(scic_to_dev(scic
),
318 "%s: SCIC SDS Completion type SDMA %x for io request "
323 /* @todo For a post TC operation we need to fail the IO
328 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC
:
329 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC
:
330 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC
:
331 device
= scic
->device_table
[index
];
332 dev_warn(scic_to_dev(scic
),
333 "%s: SCIC SDS Completion type SDMA %x for remote "
338 /* @todo For a port RNC operation we need to fail the
344 dev_warn(scic_to_dev(scic
),
345 "%s: SCIC SDS Completion unknown SDMA completion "
354 static void scic_sds_controller_unsolicited_frame(struct scic_sds_controller
*scic
,
355 u32 completion_entry
)
360 struct isci_host
*ihost
= scic_to_ihost(scic
);
361 struct scu_unsolicited_frame_header
*frame_header
;
362 struct scic_sds_phy
*phy
;
363 struct scic_sds_remote_device
*device
;
365 enum sci_status result
= SCI_FAILURE
;
367 frame_index
= SCU_GET_FRAME_INDEX(completion_entry
);
369 frame_header
= scic
->uf_control
.buffers
.array
[frame_index
].header
;
370 scic
->uf_control
.buffers
.array
[frame_index
].state
= UNSOLICITED_FRAME_IN_USE
;
372 if (SCU_GET_FRAME_ERROR(completion_entry
)) {
374 * / @todo If the IAF frame or SIGNATURE FIS frame has an error will
375 * / this cause a problem? We expect the phy initialization will
376 * / fail if there is an error in the frame. */
377 scic_sds_controller_release_frame(scic
, frame_index
);
381 if (frame_header
->is_address_frame
) {
382 index
= SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry
);
383 phy
= &ihost
->phys
[index
].sci
;
384 result
= scic_sds_phy_frame_handler(phy
, frame_index
);
387 index
= SCU_GET_COMPLETION_INDEX(completion_entry
);
389 if (index
== SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX
) {
391 * This is a signature fis or a frame from a direct attached SATA
392 * device that has not yet been created. In either case forwared
393 * the frame to the PE and let it take care of the frame data. */
394 index
= SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry
);
395 phy
= &ihost
->phys
[index
].sci
;
396 result
= scic_sds_phy_frame_handler(phy
, frame_index
);
398 if (index
< scic
->remote_node_entries
)
399 device
= scic
->device_table
[index
];
404 result
= scic_sds_remote_device_frame_handler(device
, frame_index
);
406 scic_sds_controller_release_frame(scic
, frame_index
);
410 if (result
!= SCI_SUCCESS
) {
412 * / @todo Is there any reason to report some additional error message
413 * / when we get this failure notifiction? */
417 static void scic_sds_controller_event_completion(struct scic_sds_controller
*scic
,
418 u32 completion_entry
)
420 struct isci_host
*ihost
= scic_to_ihost(scic
);
421 struct scic_sds_request
*io_request
;
422 struct scic_sds_remote_device
*device
;
423 struct scic_sds_phy
*phy
;
426 index
= SCU_GET_COMPLETION_INDEX(completion_entry
);
428 switch (scu_get_event_type(completion_entry
)) {
429 case SCU_EVENT_TYPE_SMU_COMMAND_ERROR
:
430 /* / @todo The driver did something wrong and we need to fix the condtion. */
431 dev_err(scic_to_dev(scic
),
432 "%s: SCIC Controller 0x%p received SMU command error "
439 case SCU_EVENT_TYPE_SMU_PCQ_ERROR
:
440 case SCU_EVENT_TYPE_SMU_ERROR
:
441 case SCU_EVENT_TYPE_FATAL_MEMORY_ERROR
:
443 * / @todo This is a hardware failure and its likely that we want to
444 * / reset the controller. */
445 dev_err(scic_to_dev(scic
),
446 "%s: SCIC Controller 0x%p received fatal controller "
453 case SCU_EVENT_TYPE_TRANSPORT_ERROR
:
454 io_request
= scic
->io_request_table
[index
];
455 scic_sds_io_request_event_handler(io_request
, completion_entry
);
458 case SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT
:
459 switch (scu_get_event_specifier(completion_entry
)) {
460 case SCU_EVENT_SPECIFIC_SMP_RESPONSE_NO_PE
:
461 case SCU_EVENT_SPECIFIC_TASK_TIMEOUT
:
462 io_request
= scic
->io_request_table
[index
];
463 if (io_request
!= NULL
)
464 scic_sds_io_request_event_handler(io_request
, completion_entry
);
466 dev_warn(scic_to_dev(scic
),
467 "%s: SCIC Controller 0x%p received "
468 "event 0x%x for io request object "
469 "that doesnt exist.\n",
476 case SCU_EVENT_SPECIFIC_IT_NEXUS_TIMEOUT
:
477 device
= scic
->device_table
[index
];
479 scic_sds_remote_device_event_handler(device
, completion_entry
);
481 dev_warn(scic_to_dev(scic
),
482 "%s: SCIC Controller 0x%p received "
483 "event 0x%x for remote device object "
484 "that doesnt exist.\n",
493 case SCU_EVENT_TYPE_BROADCAST_CHANGE
:
495 * direct the broadcast change event to the phy first and then let
496 * the phy redirect the broadcast change to the port object */
497 case SCU_EVENT_TYPE_ERR_CNT_EVENT
:
499 * direct error counter event to the phy object since that is where
500 * we get the event notification. This is a type 4 event. */
501 case SCU_EVENT_TYPE_OSSP_EVENT
:
502 index
= SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry
);
503 phy
= &ihost
->phys
[index
].sci
;
504 scic_sds_phy_event_handler(phy
, completion_entry
);
507 case SCU_EVENT_TYPE_RNC_SUSPEND_TX
:
508 case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX
:
509 case SCU_EVENT_TYPE_RNC_OPS_MISC
:
510 if (index
< scic
->remote_node_entries
) {
511 device
= scic
->device_table
[index
];
514 scic_sds_remote_device_event_handler(device
, completion_entry
);
516 dev_err(scic_to_dev(scic
),
517 "%s: SCIC Controller 0x%p received event 0x%x "
518 "for remote device object 0x%0x that doesnt "
528 dev_warn(scic_to_dev(scic
),
529 "%s: SCIC Controller received unknown event code %x\n",
538 static void scic_sds_controller_process_completions(struct scic_sds_controller
*scic
)
540 u32 completion_count
= 0;
541 u32 completion_entry
;
547 dev_dbg(scic_to_dev(scic
),
548 "%s: completion queue begining get:0x%08x\n",
550 scic
->completion_queue_get
);
552 /* Get the component parts of the completion queue */
553 get_index
= NORMALIZE_GET_POINTER(scic
->completion_queue_get
);
554 get_cycle
= SMU_CQGR_CYCLE_BIT
& scic
->completion_queue_get
;
556 event_index
= NORMALIZE_EVENT_POINTER(scic
->completion_queue_get
);
557 event_cycle
= SMU_CQGR_EVENT_CYCLE_BIT
& scic
->completion_queue_get
;
560 NORMALIZE_GET_POINTER_CYCLE_BIT(get_cycle
)
561 == COMPLETION_QUEUE_CYCLE_BIT(scic
->completion_queue
[get_index
])
565 completion_entry
= scic
->completion_queue
[get_index
];
566 INCREMENT_COMPLETION_QUEUE_GET(scic
, get_index
, get_cycle
);
568 dev_dbg(scic_to_dev(scic
),
569 "%s: completion queue entry:0x%08x\n",
573 switch (SCU_GET_COMPLETION_TYPE(completion_entry
)) {
574 case SCU_COMPLETION_TYPE_TASK
:
575 scic_sds_controller_task_completion(scic
, completion_entry
);
578 case SCU_COMPLETION_TYPE_SDMA
:
579 scic_sds_controller_sdma_completion(scic
, completion_entry
);
582 case SCU_COMPLETION_TYPE_UFI
:
583 scic_sds_controller_unsolicited_frame(scic
, completion_entry
);
586 case SCU_COMPLETION_TYPE_EVENT
:
587 INCREMENT_EVENT_QUEUE_GET(scic
, event_index
, event_cycle
);
588 scic_sds_controller_event_completion(scic
, completion_entry
);
591 case SCU_COMPLETION_TYPE_NOTIFY
:
593 * Presently we do the same thing with a notify event that we do with the
594 * other event codes. */
595 INCREMENT_EVENT_QUEUE_GET(scic
, event_index
, event_cycle
);
596 scic_sds_controller_event_completion(scic
, completion_entry
);
600 dev_warn(scic_to_dev(scic
),
601 "%s: SCIC Controller received unknown "
602 "completion type %x\n",
609 /* Update the get register if we completed one or more entries */
610 if (completion_count
> 0) {
611 scic
->completion_queue_get
=
612 SMU_CQGR_GEN_BIT(ENABLE
) |
613 SMU_CQGR_GEN_BIT(EVENT_ENABLE
) |
615 SMU_CQGR_GEN_VAL(EVENT_POINTER
, event_index
) |
617 SMU_CQGR_GEN_VAL(POINTER
, get_index
);
619 writel(scic
->completion_queue_get
,
620 &scic
->smu_registers
->completion_queue_get
);
624 dev_dbg(scic_to_dev(scic
),
625 "%s: completion queue ending get:0x%08x\n",
627 scic
->completion_queue_get
);
631 static void scic_sds_controller_error_handler(struct scic_sds_controller
*scic
)
633 u32 interrupt_status
;
636 readl(&scic
->smu_registers
->interrupt_status
);
638 if ((interrupt_status
& SMU_ISR_QUEUE_SUSPEND
) &&
639 scic_sds_controller_completion_queue_has_entries(scic
)) {
641 scic_sds_controller_process_completions(scic
);
642 writel(SMU_ISR_QUEUE_SUSPEND
, &scic
->smu_registers
->interrupt_status
);
644 dev_err(scic_to_dev(scic
), "%s: status: %#x\n", __func__
,
647 sci_base_state_machine_change_state(&scic
->state_machine
,
648 SCI_BASE_CONTROLLER_STATE_FAILED
);
653 /* If we dont process any completions I am not sure that we want to do this.
654 * We are in the middle of a hardware fault and should probably be reset.
656 writel(0, &scic
->smu_registers
->interrupt_mask
);
659 irqreturn_t
isci_intx_isr(int vec
, void *data
)
661 irqreturn_t ret
= IRQ_NONE
;
662 struct isci_host
*ihost
= data
;
663 struct scic_sds_controller
*scic
= &ihost
->sci
;
665 if (scic_sds_controller_isr(scic
)) {
666 writel(SMU_ISR_COMPLETION
, &scic
->smu_registers
->interrupt_status
);
667 tasklet_schedule(&ihost
->completion_tasklet
);
669 } else if (scic_sds_controller_error_isr(scic
)) {
670 spin_lock(&ihost
->scic_lock
);
671 scic_sds_controller_error_handler(scic
);
672 spin_unlock(&ihost
->scic_lock
);
679 irqreturn_t
isci_error_isr(int vec
, void *data
)
681 struct isci_host
*ihost
= data
;
683 if (scic_sds_controller_error_isr(&ihost
->sci
))
684 scic_sds_controller_error_handler(&ihost
->sci
);
690 * isci_host_start_complete() - This function is called by the core library,
691 * through the ISCI Module, to indicate controller start status.
692 * @isci_host: This parameter specifies the ISCI host object
693 * @completion_status: This parameter specifies the completion status from the
697 static void isci_host_start_complete(struct isci_host
*ihost
, enum sci_status completion_status
)
699 if (completion_status
!= SCI_SUCCESS
)
700 dev_info(&ihost
->pdev
->dev
,
701 "controller start timed out, continuing...\n");
702 isci_host_change_state(ihost
, isci_ready
);
703 clear_bit(IHOST_START_PENDING
, &ihost
->flags
);
704 wake_up(&ihost
->eventq
);
707 int isci_host_scan_finished(struct Scsi_Host
*shost
, unsigned long time
)
709 struct isci_host
*ihost
= SHOST_TO_SAS_HA(shost
)->lldd_ha
;
711 if (test_bit(IHOST_START_PENDING
, &ihost
->flags
))
714 /* todo: use sas_flush_discovery once it is upstream */
715 scsi_flush_work(shost
);
717 scsi_flush_work(shost
);
719 dev_dbg(&ihost
->pdev
->dev
,
720 "%s: ihost->status = %d, time = %ld\n",
721 __func__
, isci_host_get_state(ihost
), time
);
728 * scic_controller_get_suggested_start_timeout() - This method returns the
729 * suggested scic_controller_start() timeout amount. The user is free to
730 * use any timeout value, but this method provides the suggested minimum
731 * start timeout value. The returned value is based upon empirical
732 * information determined as a result of interoperability testing.
733 * @controller: the handle to the controller object for which to return the
734 * suggested start timeout.
736 * This method returns the number of milliseconds for the suggested start
739 static u32
scic_controller_get_suggested_start_timeout(
740 struct scic_sds_controller
*sc
)
742 /* Validate the user supplied parameters. */
747 * The suggested minimum timeout value for a controller start operation:
749 * Signature FIS Timeout
750 * + Phy Start Timeout
751 * + Number of Phy Spin Up Intervals
752 * ---------------------------------
753 * Number of milliseconds for the controller start operation.
755 * NOTE: The number of phy spin up intervals will be equivalent
756 * to the number of phys divided by the number phys allowed
757 * per interval - 1 (once OEM parameters are supported).
758 * Currently we assume only 1 phy per interval. */
760 return SCIC_SDS_SIGNATURE_FIS_TIMEOUT
761 + SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
762 + ((SCI_MAX_PHYS
- 1) * SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL
);
765 static void scic_controller_enable_interrupts(
766 struct scic_sds_controller
*scic
)
768 BUG_ON(scic
->smu_registers
== NULL
);
769 writel(0, &scic
->smu_registers
->interrupt_mask
);
772 void scic_controller_disable_interrupts(
773 struct scic_sds_controller
*scic
)
775 BUG_ON(scic
->smu_registers
== NULL
);
776 writel(0xffffffff, &scic
->smu_registers
->interrupt_mask
);
779 static void scic_sds_controller_enable_port_task_scheduler(
780 struct scic_sds_controller
*scic
)
782 u32 port_task_scheduler_value
;
784 port_task_scheduler_value
=
785 readl(&scic
->scu_registers
->peg0
.ptsg
.control
);
786 port_task_scheduler_value
|=
787 (SCU_PTSGCR_GEN_BIT(ETM_ENABLE
) |
788 SCU_PTSGCR_GEN_BIT(PTSG_ENABLE
));
789 writel(port_task_scheduler_value
,
790 &scic
->scu_registers
->peg0
.ptsg
.control
);
793 static void scic_sds_controller_assign_task_entries(struct scic_sds_controller
*scic
)
798 * Assign all the TCs to function 0
799 * TODO: Do we actually need to read this register to write it back?
803 readl(&scic
->smu_registers
->task_context_assignment
[0]);
805 task_assignment
|= (SMU_TCA_GEN_VAL(STARTING
, 0)) |
806 (SMU_TCA_GEN_VAL(ENDING
, scic
->task_context_entries
- 1)) |
807 (SMU_TCA_GEN_BIT(RANGE_CHECK_ENABLE
));
809 writel(task_assignment
,
810 &scic
->smu_registers
->task_context_assignment
[0]);
814 static void scic_sds_controller_initialize_completion_queue(struct scic_sds_controller
*scic
)
817 u32 completion_queue_control_value
;
818 u32 completion_queue_get_value
;
819 u32 completion_queue_put_value
;
821 scic
->completion_queue_get
= 0;
823 completion_queue_control_value
= (
824 SMU_CQC_QUEUE_LIMIT_SET(scic
->completion_queue_entries
- 1)
825 | SMU_CQC_EVENT_LIMIT_SET(scic
->completion_event_entries
- 1)
828 writel(completion_queue_control_value
,
829 &scic
->smu_registers
->completion_queue_control
);
832 /* Set the completion queue get pointer and enable the queue */
833 completion_queue_get_value
= (
834 (SMU_CQGR_GEN_VAL(POINTER
, 0))
835 | (SMU_CQGR_GEN_VAL(EVENT_POINTER
, 0))
836 | (SMU_CQGR_GEN_BIT(ENABLE
))
837 | (SMU_CQGR_GEN_BIT(EVENT_ENABLE
))
840 writel(completion_queue_get_value
,
841 &scic
->smu_registers
->completion_queue_get
);
843 /* Set the completion queue put pointer */
844 completion_queue_put_value
= (
845 (SMU_CQPR_GEN_VAL(POINTER
, 0))
846 | (SMU_CQPR_GEN_VAL(EVENT_POINTER
, 0))
849 writel(completion_queue_put_value
,
850 &scic
->smu_registers
->completion_queue_put
);
852 /* Initialize the cycle bit of the completion queue entries */
853 for (index
= 0; index
< scic
->completion_queue_entries
; index
++) {
855 * If get.cycle_bit != completion_queue.cycle_bit
856 * its not a valid completion queue entry
857 * so at system start all entries are invalid */
858 scic
->completion_queue
[index
] = 0x80000000;
862 static void scic_sds_controller_initialize_unsolicited_frame_queue(struct scic_sds_controller
*scic
)
864 u32 frame_queue_control_value
;
865 u32 frame_queue_get_value
;
866 u32 frame_queue_put_value
;
868 /* Write the queue size */
869 frame_queue_control_value
=
870 SCU_UFQC_GEN_VAL(QUEUE_SIZE
,
871 scic
->uf_control
.address_table
.count
);
873 writel(frame_queue_control_value
,
874 &scic
->scu_registers
->sdma
.unsolicited_frame_queue_control
);
876 /* Setup the get pointer for the unsolicited frame queue */
877 frame_queue_get_value
= (
878 SCU_UFQGP_GEN_VAL(POINTER
, 0)
879 | SCU_UFQGP_GEN_BIT(ENABLE_BIT
)
882 writel(frame_queue_get_value
,
883 &scic
->scu_registers
->sdma
.unsolicited_frame_get_pointer
);
884 /* Setup the put pointer for the unsolicited frame queue */
885 frame_queue_put_value
= SCU_UFQPP_GEN_VAL(POINTER
, 0);
886 writel(frame_queue_put_value
,
887 &scic
->scu_registers
->sdma
.unsolicited_frame_put_pointer
);
891 * This method will attempt to transition into the ready state for the
892 * controller and indicate that the controller start operation has completed
893 * if all criteria are met.
894 * @scic: This parameter indicates the controller object for which
895 * to transition to ready.
896 * @status: This parameter indicates the status value to be pass into the call
897 * to scic_cb_controller_start_complete().
901 static void scic_sds_controller_transition_to_ready(
902 struct scic_sds_controller
*scic
,
903 enum sci_status status
)
905 struct isci_host
*ihost
= scic_to_ihost(scic
);
907 if (scic
->state_machine
.current_state_id
==
908 SCI_BASE_CONTROLLER_STATE_STARTING
) {
910 * We move into the ready state, because some of the phys/ports
911 * may be up and operational.
913 sci_base_state_machine_change_state(&scic
->state_machine
,
914 SCI_BASE_CONTROLLER_STATE_READY
);
916 isci_host_start_complete(ihost
, status
);
920 static void scic_sds_controller_phy_timer_stop(struct scic_sds_controller
*scic
)
922 isci_timer_stop(scic
->phy_startup_timer
);
924 scic
->phy_startup_timer_pending
= false;
927 static void scic_sds_controller_phy_timer_start(struct scic_sds_controller
*scic
)
929 isci_timer_start(scic
->phy_startup_timer
,
930 SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
);
932 scic
->phy_startup_timer_pending
= true;
935 static bool is_phy_starting(struct scic_sds_phy
*sci_phy
)
937 enum scic_sds_phy_states state
;
939 state
= sci_phy
->state_machine
.current_state_id
;
941 case SCI_BASE_PHY_STATE_STARTING
:
942 case SCIC_SDS_PHY_STARTING_SUBSTATE_INITIAL
:
943 case SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SAS_SPEED_EN
:
944 case SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_IAF_UF
:
945 case SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SAS_POWER
:
946 case SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_POWER
:
947 case SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_PHY_EN
:
948 case SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_SPEED_EN
:
949 case SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SIG_FIS_UF
:
950 case SCIC_SDS_PHY_STARTING_SUBSTATE_FINAL
:
958 * scic_sds_controller_start_next_phy - start phy
961 * If all the phys have been started, then attempt to transition the
962 * controller to the READY state and inform the user
963 * (scic_cb_controller_start_complete()).
965 static enum sci_status
scic_sds_controller_start_next_phy(struct scic_sds_controller
*scic
)
967 struct isci_host
*ihost
= scic_to_ihost(scic
);
968 struct scic_sds_oem_params
*oem
= &scic
->oem_parameters
.sds1
;
969 struct scic_sds_phy
*sci_phy
;
970 enum sci_status status
;
972 status
= SCI_SUCCESS
;
974 if (scic
->phy_startup_timer_pending
)
977 if (scic
->next_phy_to_start
>= SCI_MAX_PHYS
) {
978 bool is_controller_start_complete
= true;
982 for (index
= 0; index
< SCI_MAX_PHYS
; index
++) {
983 sci_phy
= &ihost
->phys
[index
].sci
;
984 state
= sci_phy
->state_machine
.current_state_id
;
986 if (!phy_get_non_dummy_port(sci_phy
))
989 /* The controller start operation is complete iff:
990 * - all links have been given an opportunity to start
991 * - have no indication of a connected device
992 * - have an indication of a connected device and it has
993 * finished the link training process.
995 if ((sci_phy
->is_in_link_training
== false &&
996 state
== SCI_BASE_PHY_STATE_INITIAL
) ||
997 (sci_phy
->is_in_link_training
== false &&
998 state
== SCI_BASE_PHY_STATE_STOPPED
) ||
999 (sci_phy
->is_in_link_training
== true &&
1000 is_phy_starting(sci_phy
))) {
1001 is_controller_start_complete
= false;
1007 * The controller has successfully finished the start process.
1008 * Inform the SCI Core user and transition to the READY state. */
1009 if (is_controller_start_complete
== true) {
1010 scic_sds_controller_transition_to_ready(scic
, SCI_SUCCESS
);
1011 scic_sds_controller_phy_timer_stop(scic
);
1014 sci_phy
= &ihost
->phys
[scic
->next_phy_to_start
].sci
;
1016 if (oem
->controller
.mode_type
== SCIC_PORT_MANUAL_CONFIGURATION_MODE
) {
1017 if (phy_get_non_dummy_port(sci_phy
) == NULL
) {
1018 scic
->next_phy_to_start
++;
1020 /* Caution recursion ahead be forwarned
1022 * The PHY was never added to a PORT in MPC mode
1023 * so start the next phy in sequence This phy
1024 * will never go link up and will not draw power
1025 * the OEM parameters either configured the phy
1026 * incorrectly for the PORT or it was never
1027 * assigned to a PORT
1029 return scic_sds_controller_start_next_phy(scic
);
1033 status
= scic_sds_phy_start(sci_phy
);
1035 if (status
== SCI_SUCCESS
) {
1036 scic_sds_controller_phy_timer_start(scic
);
1038 dev_warn(scic_to_dev(scic
),
1039 "%s: Controller stop operation failed "
1040 "to stop phy %d because of status "
1043 ihost
->phys
[scic
->next_phy_to_start
].sci
.phy_index
,
1047 scic
->next_phy_to_start
++;
1053 static void scic_sds_controller_phy_startup_timeout_handler(void *_scic
)
1055 struct scic_sds_controller
*scic
= _scic
;
1056 enum sci_status status
;
1058 scic
->phy_startup_timer_pending
= false;
1059 status
= SCI_FAILURE
;
1060 while (status
!= SCI_SUCCESS
)
1061 status
= scic_sds_controller_start_next_phy(scic
);
1064 static enum sci_status
scic_controller_start(struct scic_sds_controller
*scic
,
1067 struct isci_host
*ihost
= scic_to_ihost(scic
);
1068 enum sci_status result
;
1071 if (scic
->state_machine
.current_state_id
!=
1072 SCI_BASE_CONTROLLER_STATE_INITIALIZED
) {
1073 dev_warn(scic_to_dev(scic
),
1074 "SCIC Controller start operation requested in "
1076 return SCI_FAILURE_INVALID_STATE
;
1079 /* Build the TCi free pool */
1080 sci_pool_initialize(scic
->tci_pool
);
1081 for (index
= 0; index
< scic
->task_context_entries
; index
++)
1082 sci_pool_put(scic
->tci_pool
, index
);
1084 /* Build the RNi free pool */
1085 scic_sds_remote_node_table_initialize(
1086 &scic
->available_remote_nodes
,
1087 scic
->remote_node_entries
);
1090 * Before anything else lets make sure we will not be
1091 * interrupted by the hardware.
1093 scic_controller_disable_interrupts(scic
);
1095 /* Enable the port task scheduler */
1096 scic_sds_controller_enable_port_task_scheduler(scic
);
1098 /* Assign all the task entries to scic physical function */
1099 scic_sds_controller_assign_task_entries(scic
);
1101 /* Now initialize the completion queue */
1102 scic_sds_controller_initialize_completion_queue(scic
);
1104 /* Initialize the unsolicited frame queue for use */
1105 scic_sds_controller_initialize_unsolicited_frame_queue(scic
);
1107 /* Start all of the ports on this controller */
1108 for (index
= 0; index
< scic
->logical_port_entries
; index
++) {
1109 struct scic_sds_port
*sci_port
= &ihost
->ports
[index
].sci
;
1111 result
= scic_sds_port_start(sci_port
);
1116 scic_sds_controller_start_next_phy(scic
);
1118 isci_timer_start(scic
->timeout_timer
, timeout
);
1120 sci_base_state_machine_change_state(&scic
->state_machine
,
1121 SCI_BASE_CONTROLLER_STATE_STARTING
);
1126 void isci_host_scan_start(struct Scsi_Host
*shost
)
1128 struct isci_host
*ihost
= SHOST_TO_SAS_HA(shost
)->lldd_ha
;
1129 unsigned long tmo
= scic_controller_get_suggested_start_timeout(&ihost
->sci
);
1131 set_bit(IHOST_START_PENDING
, &ihost
->flags
);
1133 spin_lock_irq(&ihost
->scic_lock
);
1134 scic_controller_start(&ihost
->sci
, tmo
);
1135 scic_controller_enable_interrupts(&ihost
->sci
);
1136 spin_unlock_irq(&ihost
->scic_lock
);
1139 static void isci_host_stop_complete(struct isci_host
*ihost
, enum sci_status completion_status
)
1141 isci_host_change_state(ihost
, isci_stopped
);
1142 scic_controller_disable_interrupts(&ihost
->sci
);
1143 clear_bit(IHOST_STOP_PENDING
, &ihost
->flags
);
1144 wake_up(&ihost
->eventq
);
1147 static void scic_sds_controller_completion_handler(struct scic_sds_controller
*scic
)
1149 /* Empty out the completion queue */
1150 if (scic_sds_controller_completion_queue_has_entries(scic
))
1151 scic_sds_controller_process_completions(scic
);
1153 /* Clear the interrupt and enable all interrupts again */
1154 writel(SMU_ISR_COMPLETION
, &scic
->smu_registers
->interrupt_status
);
1155 /* Could we write the value of SMU_ISR_COMPLETION? */
1156 writel(0xFF000000, &scic
->smu_registers
->interrupt_mask
);
1157 writel(0, &scic
->smu_registers
->interrupt_mask
);
1161 * isci_host_completion_routine() - This function is the delayed service
1162 * routine that calls the sci core library's completion handler. It's
1163 * scheduled as a tasklet from the interrupt service routine when interrupts
1164 * in use, or set as the timeout function in polled mode.
1165 * @data: This parameter specifies the ISCI host object
1168 static void isci_host_completion_routine(unsigned long data
)
1170 struct isci_host
*isci_host
= (struct isci_host
*)data
;
1171 struct list_head completed_request_list
;
1172 struct list_head errored_request_list
;
1173 struct list_head
*current_position
;
1174 struct list_head
*next_position
;
1175 struct isci_request
*request
;
1176 struct isci_request
*next_request
;
1177 struct sas_task
*task
;
1179 INIT_LIST_HEAD(&completed_request_list
);
1180 INIT_LIST_HEAD(&errored_request_list
);
1182 spin_lock_irq(&isci_host
->scic_lock
);
1184 scic_sds_controller_completion_handler(&isci_host
->sci
);
1186 /* Take the lists of completed I/Os from the host. */
1188 list_splice_init(&isci_host
->requests_to_complete
,
1189 &completed_request_list
);
1191 /* Take the list of errored I/Os from the host. */
1192 list_splice_init(&isci_host
->requests_to_errorback
,
1193 &errored_request_list
);
1195 spin_unlock_irq(&isci_host
->scic_lock
);
1197 /* Process any completions in the lists. */
1198 list_for_each_safe(current_position
, next_position
,
1199 &completed_request_list
) {
1201 request
= list_entry(current_position
, struct isci_request
,
1203 task
= isci_request_access_task(request
);
1205 /* Normal notification (task_done) */
1206 dev_dbg(&isci_host
->pdev
->dev
,
1207 "%s: Normal - request/task = %p/%p\n",
1212 /* Return the task to libsas */
1215 task
->lldd_task
= NULL
;
1216 if (!(task
->task_state_flags
& SAS_TASK_STATE_ABORTED
)) {
1218 /* If the task is already in the abort path,
1219 * the task_done callback cannot be called.
1221 task
->task_done(task
);
1224 /* Free the request object. */
1225 isci_request_free(isci_host
, request
);
1227 list_for_each_entry_safe(request
, next_request
, &errored_request_list
,
1230 task
= isci_request_access_task(request
);
1232 /* Use sas_task_abort */
1233 dev_warn(&isci_host
->pdev
->dev
,
1234 "%s: Error - request/task = %p/%p\n",
1241 /* Put the task into the abort path if it's not there
1244 if (!(task
->task_state_flags
& SAS_TASK_STATE_ABORTED
))
1245 sas_task_abort(task
);
1248 /* This is a case where the request has completed with a
1249 * status such that it needed further target servicing,
1250 * but the sas_task reference has already been removed
1251 * from the request. Since it was errored, it was not
1252 * being aborted, so there is nothing to do except free
1256 spin_lock_irq(&isci_host
->scic_lock
);
1257 /* Remove the request from the remote device's list
1258 * of pending requests.
1260 list_del_init(&request
->dev_node
);
1261 spin_unlock_irq(&isci_host
->scic_lock
);
1263 /* Free the request object. */
1264 isci_request_free(isci_host
, request
);
1271 * scic_controller_stop() - This method will stop an individual controller
1272 * object.This method will invoke the associated user callback upon
1273 * completion. The completion callback is called when the following
1274 * conditions are met: -# the method return status is SCI_SUCCESS. -# the
1275 * controller has been quiesced. This method will ensure that all IO
1276 * requests are quiesced, phys are stopped, and all additional operation by
1277 * the hardware is halted.
1278 * @controller: the handle to the controller object to stop.
1279 * @timeout: This parameter specifies the number of milliseconds in which the
1280 * stop operation should complete.
1282 * The controller must be in the STARTED or STOPPED state. Indicate if the
1283 * controller stop method succeeded or failed in some way. SCI_SUCCESS if the
1284 * stop operation successfully began. SCI_WARNING_ALREADY_IN_STATE if the
1285 * controller is already in the STOPPED state. SCI_FAILURE_INVALID_STATE if the
1286 * controller is not either in the STARTED or STOPPED states.
1288 static enum sci_status
scic_controller_stop(struct scic_sds_controller
*scic
,
1291 if (scic
->state_machine
.current_state_id
!=
1292 SCI_BASE_CONTROLLER_STATE_READY
) {
1293 dev_warn(scic_to_dev(scic
),
1294 "SCIC Controller stop operation requested in "
1296 return SCI_FAILURE_INVALID_STATE
;
1299 isci_timer_start(scic
->timeout_timer
, timeout
);
1300 sci_base_state_machine_change_state(&scic
->state_machine
,
1301 SCI_BASE_CONTROLLER_STATE_STOPPING
);
1306 * scic_controller_reset() - This method will reset the supplied core
1307 * controller regardless of the state of said controller. This operation is
1308 * considered destructive. In other words, all current operations are wiped
1309 * out. No IO completions for outstanding devices occur. Outstanding IO
1310 * requests are not aborted or completed at the actual remote device.
1311 * @controller: the handle to the controller object to reset.
1313 * Indicate if the controller reset method succeeded or failed in some way.
1314 * SCI_SUCCESS if the reset operation successfully started. SCI_FATAL_ERROR if
1315 * the controller reset operation is unable to complete.
1317 static enum sci_status
scic_controller_reset(struct scic_sds_controller
*scic
)
1319 switch (scic
->state_machine
.current_state_id
) {
1320 case SCI_BASE_CONTROLLER_STATE_RESET
:
1321 case SCI_BASE_CONTROLLER_STATE_READY
:
1322 case SCI_BASE_CONTROLLER_STATE_STOPPED
:
1323 case SCI_BASE_CONTROLLER_STATE_FAILED
:
1325 * The reset operation is not a graceful cleanup, just
1326 * perform the state transition.
1328 sci_base_state_machine_change_state(&scic
->state_machine
,
1329 SCI_BASE_CONTROLLER_STATE_RESETTING
);
1332 dev_warn(scic_to_dev(scic
),
1333 "SCIC Controller reset operation requested in "
1335 return SCI_FAILURE_INVALID_STATE
;
1339 void isci_host_deinit(struct isci_host
*ihost
)
1343 isci_host_change_state(ihost
, isci_stopping
);
1344 for (i
= 0; i
< SCI_MAX_PORTS
; i
++) {
1345 struct isci_port
*iport
= &ihost
->ports
[i
];
1346 struct isci_remote_device
*idev
, *d
;
1348 list_for_each_entry_safe(idev
, d
, &iport
->remote_dev_list
, node
) {
1349 isci_remote_device_change_state(idev
, isci_stopping
);
1350 isci_remote_device_stop(ihost
, idev
);
1354 set_bit(IHOST_STOP_PENDING
, &ihost
->flags
);
1356 spin_lock_irq(&ihost
->scic_lock
);
1357 scic_controller_stop(&ihost
->sci
, SCIC_CONTROLLER_STOP_TIMEOUT
);
1358 spin_unlock_irq(&ihost
->scic_lock
);
1360 wait_for_stop(ihost
);
1361 scic_controller_reset(&ihost
->sci
);
1362 isci_timer_list_destroy(ihost
);
1365 static void __iomem
*scu_base(struct isci_host
*isci_host
)
1367 struct pci_dev
*pdev
= isci_host
->pdev
;
1368 int id
= isci_host
->id
;
1370 return pcim_iomap_table(pdev
)[SCI_SCU_BAR
* 2] + SCI_SCU_BAR_SIZE
* id
;
1373 static void __iomem
*smu_base(struct isci_host
*isci_host
)
1375 struct pci_dev
*pdev
= isci_host
->pdev
;
1376 int id
= isci_host
->id
;
1378 return pcim_iomap_table(pdev
)[SCI_SMU_BAR
* 2] + SCI_SMU_BAR_SIZE
* id
;
1381 static void isci_user_parameters_get(
1382 struct isci_host
*isci_host
,
1383 union scic_user_parameters
*scic_user_params
)
1385 struct scic_sds_user_parameters
*u
= &scic_user_params
->sds1
;
1388 for (i
= 0; i
< SCI_MAX_PHYS
; i
++) {
1389 struct sci_phy_user_params
*u_phy
= &u
->phys
[i
];
1391 u_phy
->max_speed_generation
= phy_gen
;
1393 /* we are not exporting these for now */
1394 u_phy
->align_insertion_frequency
= 0x7f;
1395 u_phy
->in_connection_align_insertion_frequency
= 0xff;
1396 u_phy
->notify_enable_spin_up_insertion_frequency
= 0x33;
1399 u
->stp_inactivity_timeout
= stp_inactive_to
;
1400 u
->ssp_inactivity_timeout
= ssp_inactive_to
;
1401 u
->stp_max_occupancy_timeout
= stp_max_occ_to
;
1402 u
->ssp_max_occupancy_timeout
= ssp_max_occ_to
;
1403 u
->no_outbound_task_timeout
= no_outbound_task_to
;
1404 u
->max_number_concurrent_device_spin_up
= max_concurr_spinup
;
1407 static void scic_sds_controller_initial_state_enter(struct sci_base_state_machine
*sm
)
1409 struct scic_sds_controller
*scic
= container_of(sm
, typeof(*scic
), state_machine
);
1411 sci_base_state_machine_change_state(&scic
->state_machine
,
1412 SCI_BASE_CONTROLLER_STATE_RESET
);
1415 static inline void scic_sds_controller_starting_state_exit(struct sci_base_state_machine
*sm
)
1417 struct scic_sds_controller
*scic
= container_of(sm
, typeof(*scic
), state_machine
);
1419 isci_timer_stop(scic
->timeout_timer
);
1422 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS 853
1423 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS 1280
1424 #define INTERRUPT_COALESCE_TIMEOUT_MAX_US 2700000
1425 #define INTERRUPT_COALESCE_NUMBER_MAX 256
1426 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN 7
1427 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX 28
1430 * scic_controller_set_interrupt_coalescence() - This method allows the user to
1431 * configure the interrupt coalescence.
1432 * @controller: This parameter represents the handle to the controller object
1433 * for which its interrupt coalesce register is overridden.
1434 * @coalesce_number: Used to control the number of entries in the Completion
1435 * Queue before an interrupt is generated. If the number of entries exceed
1436 * this number, an interrupt will be generated. The valid range of the input
1437 * is [0, 256]. A setting of 0 results in coalescing being disabled.
1438 * @coalesce_timeout: Timeout value in microseconds. The valid range of the
1439 * input is [0, 2700000] . A setting of 0 is allowed and results in no
1440 * interrupt coalescing timeout.
1442 * Indicate if the user successfully set the interrupt coalesce parameters.
1443 * SCI_SUCCESS The user successfully updated the interrutp coalescence.
1444 * SCI_FAILURE_INVALID_PARAMETER_VALUE The user input value is out of range.
1446 static enum sci_status
scic_controller_set_interrupt_coalescence(
1447 struct scic_sds_controller
*scic_controller
,
1448 u32 coalesce_number
,
1449 u32 coalesce_timeout
)
1451 u8 timeout_encode
= 0;
1455 /* Check if the input parameters fall in the range. */
1456 if (coalesce_number
> INTERRUPT_COALESCE_NUMBER_MAX
)
1457 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
1460 * Defined encoding for interrupt coalescing timeout:
1461 * Value Min Max Units
1462 * ----- --- --- -----
1492 * Others Undefined */
1495 * Use the table above to decide the encode of interrupt coalescing timeout
1496 * value for register writing. */
1497 if (coalesce_timeout
== 0)
1500 /* make the timeout value in unit of (10 ns). */
1501 coalesce_timeout
= coalesce_timeout
* 100;
1502 min
= INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS
/ 10;
1503 max
= INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS
/ 10;
1505 /* get the encode of timeout for register writing. */
1506 for (timeout_encode
= INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN
;
1507 timeout_encode
<= INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX
;
1509 if (min
<= coalesce_timeout
&& max
> coalesce_timeout
)
1511 else if (coalesce_timeout
>= max
&& coalesce_timeout
< min
* 2
1512 && coalesce_timeout
<= INTERRUPT_COALESCE_TIMEOUT_MAX_US
* 100) {
1513 if ((coalesce_timeout
- max
) < (2 * min
- coalesce_timeout
))
1525 if (timeout_encode
== INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX
+ 1)
1526 /* the value is out of range. */
1527 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
1530 writel(SMU_ICC_GEN_VAL(NUMBER
, coalesce_number
) |
1531 SMU_ICC_GEN_VAL(TIMER
, timeout_encode
),
1532 &scic_controller
->smu_registers
->interrupt_coalesce_control
);
1535 scic_controller
->interrupt_coalesce_number
= (u16
)coalesce_number
;
1536 scic_controller
->interrupt_coalesce_timeout
= coalesce_timeout
/ 100;
1542 static void scic_sds_controller_ready_state_enter(struct sci_base_state_machine
*sm
)
1544 struct scic_sds_controller
*scic
= container_of(sm
, typeof(*scic
), state_machine
);
1546 /* set the default interrupt coalescence number and timeout value. */
1547 scic_controller_set_interrupt_coalescence(scic
, 0x10, 250);
1550 static void scic_sds_controller_ready_state_exit(struct sci_base_state_machine
*sm
)
1552 struct scic_sds_controller
*scic
= container_of(sm
, typeof(*scic
), state_machine
);
1554 /* disable interrupt coalescence. */
1555 scic_controller_set_interrupt_coalescence(scic
, 0, 0);
1558 static enum sci_status
scic_sds_controller_stop_phys(struct scic_sds_controller
*scic
)
1561 enum sci_status status
;
1562 enum sci_status phy_status
;
1563 struct isci_host
*ihost
= scic_to_ihost(scic
);
1565 status
= SCI_SUCCESS
;
1567 for (index
= 0; index
< SCI_MAX_PHYS
; index
++) {
1568 phy_status
= scic_sds_phy_stop(&ihost
->phys
[index
].sci
);
1570 if (phy_status
!= SCI_SUCCESS
&&
1571 phy_status
!= SCI_FAILURE_INVALID_STATE
) {
1572 status
= SCI_FAILURE
;
1574 dev_warn(scic_to_dev(scic
),
1575 "%s: Controller stop operation failed to stop "
1576 "phy %d because of status %d.\n",
1578 ihost
->phys
[index
].sci
.phy_index
, phy_status
);
1585 static enum sci_status
scic_sds_controller_stop_ports(struct scic_sds_controller
*scic
)
1588 enum sci_status port_status
;
1589 enum sci_status status
= SCI_SUCCESS
;
1590 struct isci_host
*ihost
= scic_to_ihost(scic
);
1592 for (index
= 0; index
< scic
->logical_port_entries
; index
++) {
1593 struct scic_sds_port
*sci_port
= &ihost
->ports
[index
].sci
;
1595 port_status
= scic_sds_port_stop(sci_port
);
1597 if ((port_status
!= SCI_SUCCESS
) &&
1598 (port_status
!= SCI_FAILURE_INVALID_STATE
)) {
1599 status
= SCI_FAILURE
;
1601 dev_warn(scic_to_dev(scic
),
1602 "%s: Controller stop operation failed to "
1603 "stop port %d because of status %d.\n",
1605 sci_port
->logical_port_index
,
1613 static enum sci_status
scic_sds_controller_stop_devices(struct scic_sds_controller
*scic
)
1616 enum sci_status status
;
1617 enum sci_status device_status
;
1619 status
= SCI_SUCCESS
;
1621 for (index
= 0; index
< scic
->remote_node_entries
; index
++) {
1622 if (scic
->device_table
[index
] != NULL
) {
1623 /* / @todo What timeout value do we want to provide to this request? */
1624 device_status
= scic_remote_device_stop(scic
->device_table
[index
], 0);
1626 if ((device_status
!= SCI_SUCCESS
) &&
1627 (device_status
!= SCI_FAILURE_INVALID_STATE
)) {
1628 dev_warn(scic_to_dev(scic
),
1629 "%s: Controller stop operation failed "
1630 "to stop device 0x%p because of "
1633 scic
->device_table
[index
], device_status
);
1641 static void scic_sds_controller_stopping_state_enter(struct sci_base_state_machine
*sm
)
1643 struct scic_sds_controller
*scic
= container_of(sm
, typeof(*scic
), state_machine
);
1645 /* Stop all of the components for this controller */
1646 scic_sds_controller_stop_phys(scic
);
1647 scic_sds_controller_stop_ports(scic
);
1648 scic_sds_controller_stop_devices(scic
);
1651 static void scic_sds_controller_stopping_state_exit(struct sci_base_state_machine
*sm
)
1653 struct scic_sds_controller
*scic
= container_of(sm
, typeof(*scic
), state_machine
);
1655 isci_timer_stop(scic
->timeout_timer
);
1660 * scic_sds_controller_reset_hardware() -
1662 * This method will reset the controller hardware.
1664 static void scic_sds_controller_reset_hardware(struct scic_sds_controller
*scic
)
1666 /* Disable interrupts so we dont take any spurious interrupts */
1667 scic_controller_disable_interrupts(scic
);
1670 writel(0xFFFFFFFF, &scic
->smu_registers
->soft_reset_control
);
1672 /* Delay for 1ms to before clearing the CQP and UFQPR. */
1675 /* The write to the CQGR clears the CQP */
1676 writel(0x00000000, &scic
->smu_registers
->completion_queue_get
);
1678 /* The write to the UFQGP clears the UFQPR */
1679 writel(0, &scic
->scu_registers
->sdma
.unsolicited_frame_get_pointer
);
1682 static void scic_sds_controller_resetting_state_enter(struct sci_base_state_machine
*sm
)
1684 struct scic_sds_controller
*scic
= container_of(sm
, typeof(*scic
), state_machine
);
1686 scic_sds_controller_reset_hardware(scic
);
1687 sci_base_state_machine_change_state(&scic
->state_machine
,
1688 SCI_BASE_CONTROLLER_STATE_RESET
);
1691 static const struct sci_base_state scic_sds_controller_state_table
[] = {
1692 [SCI_BASE_CONTROLLER_STATE_INITIAL
] = {
1693 .enter_state
= scic_sds_controller_initial_state_enter
,
1695 [SCI_BASE_CONTROLLER_STATE_RESET
] = {},
1696 [SCI_BASE_CONTROLLER_STATE_INITIALIZING
] = {},
1697 [SCI_BASE_CONTROLLER_STATE_INITIALIZED
] = {},
1698 [SCI_BASE_CONTROLLER_STATE_STARTING
] = {
1699 .exit_state
= scic_sds_controller_starting_state_exit
,
1701 [SCI_BASE_CONTROLLER_STATE_READY
] = {
1702 .enter_state
= scic_sds_controller_ready_state_enter
,
1703 .exit_state
= scic_sds_controller_ready_state_exit
,
1705 [SCI_BASE_CONTROLLER_STATE_RESETTING
] = {
1706 .enter_state
= scic_sds_controller_resetting_state_enter
,
1708 [SCI_BASE_CONTROLLER_STATE_STOPPING
] = {
1709 .enter_state
= scic_sds_controller_stopping_state_enter
,
1710 .exit_state
= scic_sds_controller_stopping_state_exit
,
1712 [SCI_BASE_CONTROLLER_STATE_STOPPED
] = {},
1713 [SCI_BASE_CONTROLLER_STATE_FAILED
] = {}
1716 static void scic_sds_controller_set_default_config_parameters(struct scic_sds_controller
*scic
)
1718 /* these defaults are overridden by the platform / firmware */
1719 struct isci_host
*ihost
= scic_to_ihost(scic
);
1722 /* Default to APC mode. */
1723 scic
->oem_parameters
.sds1
.controller
.mode_type
= SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE
;
1725 /* Default to APC mode. */
1726 scic
->oem_parameters
.sds1
.controller
.max_concurrent_dev_spin_up
= 1;
1728 /* Default to no SSC operation. */
1729 scic
->oem_parameters
.sds1
.controller
.do_enable_ssc
= false;
1731 /* Initialize all of the port parameter information to narrow ports. */
1732 for (index
= 0; index
< SCI_MAX_PORTS
; index
++) {
1733 scic
->oem_parameters
.sds1
.ports
[index
].phy_mask
= 0;
1736 /* Initialize all of the phy parameter information. */
1737 for (index
= 0; index
< SCI_MAX_PHYS
; index
++) {
1738 /* Default to 6G (i.e. Gen 3) for now. */
1739 scic
->user_parameters
.sds1
.phys
[index
].max_speed_generation
= 3;
1741 /* the frequencies cannot be 0 */
1742 scic
->user_parameters
.sds1
.phys
[index
].align_insertion_frequency
= 0x7f;
1743 scic
->user_parameters
.sds1
.phys
[index
].in_connection_align_insertion_frequency
= 0xff;
1744 scic
->user_parameters
.sds1
.phys
[index
].notify_enable_spin_up_insertion_frequency
= 0x33;
1747 * Previous Vitesse based expanders had a arbitration issue that
1748 * is worked around by having the upper 32-bits of SAS address
1749 * with a value greater then the Vitesse company identifier.
1750 * Hence, usage of 0x5FCFFFFF. */
1751 scic
->oem_parameters
.sds1
.phys
[index
].sas_address
.low
= 0x1 + ihost
->id
;
1752 scic
->oem_parameters
.sds1
.phys
[index
].sas_address
.high
= 0x5FCFFFFF;
1755 scic
->user_parameters
.sds1
.stp_inactivity_timeout
= 5;
1756 scic
->user_parameters
.sds1
.ssp_inactivity_timeout
= 5;
1757 scic
->user_parameters
.sds1
.stp_max_occupancy_timeout
= 5;
1758 scic
->user_parameters
.sds1
.ssp_max_occupancy_timeout
= 20;
1759 scic
->user_parameters
.sds1
.no_outbound_task_timeout
= 20;
1765 * scic_controller_construct() - This method will attempt to construct a
1766 * controller object utilizing the supplied parameter information.
1767 * @c: This parameter specifies the controller to be constructed.
1768 * @scu_base: mapped base address of the scu registers
1769 * @smu_base: mapped base address of the smu registers
1771 * Indicate if the controller was successfully constructed or if it failed in
1772 * some way. SCI_SUCCESS This value is returned if the controller was
1773 * successfully constructed. SCI_WARNING_TIMER_CONFLICT This value is returned
1774 * if the interrupt coalescence timer may cause SAS compliance issues for SMP
1775 * Target mode response processing. SCI_FAILURE_UNSUPPORTED_CONTROLLER_TYPE
1776 * This value is returned if the controller does not support the supplied type.
1777 * SCI_FAILURE_UNSUPPORTED_INIT_DATA_VERSION This value is returned if the
1778 * controller does not support the supplied initialization data version.
1780 static enum sci_status
scic_controller_construct(struct scic_sds_controller
*scic
,
1781 void __iomem
*scu_base
,
1782 void __iomem
*smu_base
)
1784 struct isci_host
*ihost
= scic_to_ihost(scic
);
1787 sci_base_state_machine_construct(&scic
->state_machine
,
1788 scic_sds_controller_state_table
,
1789 SCI_BASE_CONTROLLER_STATE_INITIAL
);
1791 sci_base_state_machine_start(&scic
->state_machine
);
1793 scic
->scu_registers
= scu_base
;
1794 scic
->smu_registers
= smu_base
;
1796 scic_sds_port_configuration_agent_construct(&scic
->port_agent
);
1798 /* Construct the ports for this controller */
1799 for (i
= 0; i
< SCI_MAX_PORTS
; i
++)
1800 scic_sds_port_construct(&ihost
->ports
[i
].sci
, i
, scic
);
1801 scic_sds_port_construct(&ihost
->ports
[i
].sci
, SCIC_SDS_DUMMY_PORT
, scic
);
1803 /* Construct the phys for this controller */
1804 for (i
= 0; i
< SCI_MAX_PHYS
; i
++) {
1805 /* Add all the PHYs to the dummy port */
1806 scic_sds_phy_construct(&ihost
->phys
[i
].sci
,
1807 &ihost
->ports
[SCI_MAX_PORTS
].sci
, i
);
1810 scic
->invalid_phy_mask
= 0;
1812 /* Set the default maximum values */
1813 scic
->completion_event_entries
= SCU_EVENT_COUNT
;
1814 scic
->completion_queue_entries
= SCU_COMPLETION_QUEUE_COUNT
;
1815 scic
->remote_node_entries
= SCI_MAX_REMOTE_DEVICES
;
1816 scic
->logical_port_entries
= SCI_MAX_PORTS
;
1817 scic
->task_context_entries
= SCU_IO_REQUEST_COUNT
;
1818 scic
->uf_control
.buffers
.count
= SCU_UNSOLICITED_FRAME_COUNT
;
1819 scic
->uf_control
.address_table
.count
= SCU_UNSOLICITED_FRAME_COUNT
;
1821 /* Initialize the User and OEM parameters to default values. */
1822 scic_sds_controller_set_default_config_parameters(scic
);
1824 return scic_controller_reset(scic
);
1827 int scic_oem_parameters_validate(struct scic_sds_oem_params
*oem
)
1831 for (i
= 0; i
< SCI_MAX_PORTS
; i
++)
1832 if (oem
->ports
[i
].phy_mask
> SCIC_SDS_PARM_PHY_MASK_MAX
)
1835 for (i
= 0; i
< SCI_MAX_PHYS
; i
++)
1836 if (oem
->phys
[i
].sas_address
.high
== 0 &&
1837 oem
->phys
[i
].sas_address
.low
== 0)
1840 if (oem
->controller
.mode_type
== SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE
) {
1841 for (i
= 0; i
< SCI_MAX_PHYS
; i
++)
1842 if (oem
->ports
[i
].phy_mask
!= 0)
1844 } else if (oem
->controller
.mode_type
== SCIC_PORT_MANUAL_CONFIGURATION_MODE
) {
1847 for (i
= 0; i
< SCI_MAX_PHYS
; i
++)
1848 phy_mask
|= oem
->ports
[i
].phy_mask
;
1855 if (oem
->controller
.max_concurrent_dev_spin_up
> MAX_CONCURRENT_DEVICE_SPIN_UP_COUNT
)
1861 static enum sci_status
scic_oem_parameters_set(struct scic_sds_controller
*scic
,
1862 union scic_oem_parameters
*scic_parms
)
1864 u32 state
= scic
->state_machine
.current_state_id
;
1866 if (state
== SCI_BASE_CONTROLLER_STATE_RESET
||
1867 state
== SCI_BASE_CONTROLLER_STATE_INITIALIZING
||
1868 state
== SCI_BASE_CONTROLLER_STATE_INITIALIZED
) {
1870 if (scic_oem_parameters_validate(&scic_parms
->sds1
))
1871 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
1872 scic
->oem_parameters
.sds1
= scic_parms
->sds1
;
1877 return SCI_FAILURE_INVALID_STATE
;
1880 void scic_oem_parameters_get(
1881 struct scic_sds_controller
*scic
,
1882 union scic_oem_parameters
*scic_parms
)
1884 memcpy(scic_parms
, (&scic
->oem_parameters
), sizeof(*scic_parms
));
1887 static void scic_sds_controller_timeout_handler(void *_scic
)
1889 struct scic_sds_controller
*scic
= _scic
;
1890 struct isci_host
*ihost
= scic_to_ihost(scic
);
1891 struct sci_base_state_machine
*sm
= &scic
->state_machine
;
1893 if (sm
->current_state_id
== SCI_BASE_CONTROLLER_STATE_STARTING
)
1894 scic_sds_controller_transition_to_ready(scic
, SCI_FAILURE_TIMEOUT
);
1895 else if (sm
->current_state_id
== SCI_BASE_CONTROLLER_STATE_STOPPING
) {
1896 sci_base_state_machine_change_state(sm
, SCI_BASE_CONTROLLER_STATE_FAILED
);
1897 isci_host_stop_complete(ihost
, SCI_FAILURE_TIMEOUT
);
1898 } else /* / @todo Now what do we want to do in this case? */
1899 dev_err(scic_to_dev(scic
),
1900 "%s: Controller timer fired when controller was not "
1901 "in a state being timed.\n",
1905 static enum sci_status
scic_sds_controller_initialize_phy_startup(struct scic_sds_controller
*scic
)
1907 struct isci_host
*ihost
= scic_to_ihost(scic
);
1909 scic
->phy_startup_timer
= isci_timer_create(ihost
,
1911 scic_sds_controller_phy_startup_timeout_handler
);
1913 if (scic
->phy_startup_timer
== NULL
)
1914 return SCI_FAILURE_INSUFFICIENT_RESOURCES
;
1916 scic
->next_phy_to_start
= 0;
1917 scic
->phy_startup_timer_pending
= false;
1923 static void scic_sds_controller_power_control_timer_start(struct scic_sds_controller
*scic
)
1925 isci_timer_start(scic
->power_control
.timer
,
1926 SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL
);
1928 scic
->power_control
.timer_started
= true;
1931 static void scic_sds_controller_power_control_timer_stop(struct scic_sds_controller
*scic
)
1933 if (scic
->power_control
.timer_started
) {
1934 isci_timer_stop(scic
->power_control
.timer
);
1935 scic
->power_control
.timer_started
= false;
1939 static void scic_sds_controller_power_control_timer_restart(struct scic_sds_controller
*scic
)
1941 scic_sds_controller_power_control_timer_stop(scic
);
1942 scic_sds_controller_power_control_timer_start(scic
);
1945 static void scic_sds_controller_power_control_timer_handler(
1948 struct scic_sds_controller
*scic
;
1950 scic
= (struct scic_sds_controller
*)controller
;
1952 scic
->power_control
.phys_granted_power
= 0;
1954 if (scic
->power_control
.phys_waiting
== 0) {
1955 scic
->power_control
.timer_started
= false;
1957 struct scic_sds_phy
*sci_phy
= NULL
;
1962 && (scic
->power_control
.phys_waiting
!= 0);
1964 if (scic
->power_control
.requesters
[i
] != NULL
) {
1965 if (scic
->power_control
.phys_granted_power
<
1966 scic
->oem_parameters
.sds1
.controller
.max_concurrent_dev_spin_up
) {
1967 sci_phy
= scic
->power_control
.requesters
[i
];
1968 scic
->power_control
.requesters
[i
] = NULL
;
1969 scic
->power_control
.phys_waiting
--;
1970 scic
->power_control
.phys_granted_power
++;
1971 scic_sds_phy_consume_power_handler(sci_phy
);
1979 * It doesn't matter if the power list is empty, we need to start the
1980 * timer in case another phy becomes ready.
1982 scic_sds_controller_power_control_timer_start(scic
);
1987 * This method inserts the phy in the stagger spinup control queue.
1992 void scic_sds_controller_power_control_queue_insert(
1993 struct scic_sds_controller
*scic
,
1994 struct scic_sds_phy
*sci_phy
)
1996 BUG_ON(sci_phy
== NULL
);
1998 if (scic
->power_control
.phys_granted_power
<
1999 scic
->oem_parameters
.sds1
.controller
.max_concurrent_dev_spin_up
) {
2000 scic
->power_control
.phys_granted_power
++;
2001 scic_sds_phy_consume_power_handler(sci_phy
);
2004 * stop and start the power_control timer. When the timer fires, the
2005 * no_of_phys_granted_power will be set to 0
2007 scic_sds_controller_power_control_timer_restart(scic
);
2009 /* Add the phy in the waiting list */
2010 scic
->power_control
.requesters
[sci_phy
->phy_index
] = sci_phy
;
2011 scic
->power_control
.phys_waiting
++;
2016 * This method removes the phy from the stagger spinup control queue.
2021 void scic_sds_controller_power_control_queue_remove(
2022 struct scic_sds_controller
*scic
,
2023 struct scic_sds_phy
*sci_phy
)
2025 BUG_ON(sci_phy
== NULL
);
2027 if (scic
->power_control
.requesters
[sci_phy
->phy_index
] != NULL
) {
2028 scic
->power_control
.phys_waiting
--;
2031 scic
->power_control
.requesters
[sci_phy
->phy_index
] = NULL
;
2034 #define AFE_REGISTER_WRITE_DELAY 10
2036 /* Initialize the AFE for this phy index. We need to read the AFE setup from
2037 * the OEM parameters
2039 static void scic_sds_controller_afe_initialization(struct scic_sds_controller
*scic
)
2041 const struct scic_sds_oem_params
*oem
= &scic
->oem_parameters
.sds1
;
2045 /* Clear DFX Status registers */
2046 writel(0x0081000f, &scic
->scu_registers
->afe
.afe_dfx_master_control0
);
2047 udelay(AFE_REGISTER_WRITE_DELAY
);
2050 /* PM Rx Equalization Save, PM SPhy Rx Acknowledgement
2051 * Timer, PM Stagger Timer */
2052 writel(0x0007BFFF, &scic
->scu_registers
->afe
.afe_pmsn_master_control2
);
2053 udelay(AFE_REGISTER_WRITE_DELAY
);
2056 /* Configure bias currents to normal */
2058 writel(0x00005500, &scic
->scu_registers
->afe
.afe_bias_control
);
2060 writel(0x00005A00, &scic
->scu_registers
->afe
.afe_bias_control
);
2062 writel(0x00005F00, &scic
->scu_registers
->afe
.afe_bias_control
);
2064 udelay(AFE_REGISTER_WRITE_DELAY
);
2068 writel(0x80040A08, &scic
->scu_registers
->afe
.afe_pll_control0
);
2070 writel(0x80040908, &scic
->scu_registers
->afe
.afe_pll_control0
);
2072 udelay(AFE_REGISTER_WRITE_DELAY
);
2074 /* Wait for the PLL to lock */
2076 afe_status
= readl(&scic
->scu_registers
->afe
.afe_common_block_status
);
2077 udelay(AFE_REGISTER_WRITE_DELAY
);
2078 } while ((afe_status
& 0x00001000) == 0);
2080 if (is_a0() || is_a2()) {
2081 /* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */
2082 writel(0x7bcc96ad, &scic
->scu_registers
->afe
.afe_pmsn_master_control0
);
2083 udelay(AFE_REGISTER_WRITE_DELAY
);
2086 for (phy_id
= 0; phy_id
< SCI_MAX_PHYS
; phy_id
++) {
2087 const struct sci_phy_oem_params
*oem_phy
= &oem
->phys
[phy_id
];
2090 /* Configure transmitter SSC parameters */
2091 writel(0x00030000, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_tx_ssc_control
);
2092 udelay(AFE_REGISTER_WRITE_DELAY
);
2095 * All defaults, except the Receive Word Alignament/Comma Detect
2096 * Enable....(0xe800) */
2097 writel(0x00004512, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_xcvr_control0
);
2098 udelay(AFE_REGISTER_WRITE_DELAY
);
2100 writel(0x0050100F, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_xcvr_control1
);
2101 udelay(AFE_REGISTER_WRITE_DELAY
);
2105 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
2106 * & increase TX int & ext bias 20%....(0xe85c) */
2108 writel(0x000003D4, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_channel_control
);
2110 writel(0x000003F0, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_channel_control
);
2112 /* Power down TX and RX (PWRDNTX and PWRDNRX) */
2113 writel(0x000003d7, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_channel_control
);
2114 udelay(AFE_REGISTER_WRITE_DELAY
);
2117 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
2118 * & increase TX int & ext bias 20%....(0xe85c) */
2119 writel(0x000003d4, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_channel_control
);
2121 udelay(AFE_REGISTER_WRITE_DELAY
);
2123 if (is_a0() || is_a2()) {
2124 /* Enable TX equalization (0xe824) */
2125 writel(0x00040000, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_tx_control
);
2126 udelay(AFE_REGISTER_WRITE_DELAY
);
2130 * RDPI=0x0(RX Power On), RXOOBDETPDNC=0x0, TPD=0x0(TX Power On),
2131 * RDD=0x0(RX Detect Enabled) ....(0xe800) */
2132 writel(0x00004100, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_xcvr_control0
);
2133 udelay(AFE_REGISTER_WRITE_DELAY
);
2135 /* Leave DFE/FFE on */
2137 writel(0x3F09983F, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_rx_ssc_control0
);
2139 writel(0x3F11103F, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_rx_ssc_control0
);
2141 writel(0x3F11103F, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_rx_ssc_control0
);
2142 udelay(AFE_REGISTER_WRITE_DELAY
);
2143 /* Enable TX equalization (0xe824) */
2144 writel(0x00040000, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_tx_control
);
2146 udelay(AFE_REGISTER_WRITE_DELAY
);
2148 writel(oem_phy
->afe_tx_amp_control0
,
2149 &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_tx_amp_control0
);
2150 udelay(AFE_REGISTER_WRITE_DELAY
);
2152 writel(oem_phy
->afe_tx_amp_control1
,
2153 &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_tx_amp_control1
);
2154 udelay(AFE_REGISTER_WRITE_DELAY
);
2156 writel(oem_phy
->afe_tx_amp_control2
,
2157 &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_tx_amp_control2
);
2158 udelay(AFE_REGISTER_WRITE_DELAY
);
2160 writel(oem_phy
->afe_tx_amp_control3
,
2161 &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_tx_amp_control3
);
2162 udelay(AFE_REGISTER_WRITE_DELAY
);
2165 /* Transfer control to the PEs */
2166 writel(0x00010f00, &scic
->scu_registers
->afe
.afe_dfx_master_control0
);
2167 udelay(AFE_REGISTER_WRITE_DELAY
);
2170 static enum sci_status
scic_controller_set_mode(struct scic_sds_controller
*scic
,
2171 enum sci_controller_mode operating_mode
)
2173 enum sci_status status
= SCI_SUCCESS
;
2175 if ((scic
->state_machine
.current_state_id
==
2176 SCI_BASE_CONTROLLER_STATE_INITIALIZING
) ||
2177 (scic
->state_machine
.current_state_id
==
2178 SCI_BASE_CONTROLLER_STATE_INITIALIZED
)) {
2179 switch (operating_mode
) {
2180 case SCI_MODE_SPEED
:
2181 scic
->remote_node_entries
= SCI_MAX_REMOTE_DEVICES
;
2182 scic
->task_context_entries
= SCU_IO_REQUEST_COUNT
;
2183 scic
->uf_control
.buffers
.count
=
2184 SCU_UNSOLICITED_FRAME_COUNT
;
2185 scic
->completion_event_entries
= SCU_EVENT_COUNT
;
2186 scic
->completion_queue_entries
=
2187 SCU_COMPLETION_QUEUE_COUNT
;
2191 scic
->remote_node_entries
= SCI_MIN_REMOTE_DEVICES
;
2192 scic
->task_context_entries
= SCI_MIN_IO_REQUESTS
;
2193 scic
->uf_control
.buffers
.count
=
2194 SCU_MIN_UNSOLICITED_FRAMES
;
2195 scic
->completion_event_entries
= SCU_MIN_EVENTS
;
2196 scic
->completion_queue_entries
=
2197 SCU_MIN_COMPLETION_QUEUE_ENTRIES
;
2201 status
= SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2205 status
= SCI_FAILURE_INVALID_STATE
;
2210 static void scic_sds_controller_initialize_power_control(struct scic_sds_controller
*scic
)
2212 struct isci_host
*ihost
= scic_to_ihost(scic
);
2213 scic
->power_control
.timer
= isci_timer_create(ihost
,
2215 scic_sds_controller_power_control_timer_handler
);
2217 memset(scic
->power_control
.requesters
, 0,
2218 sizeof(scic
->power_control
.requesters
));
2220 scic
->power_control
.phys_waiting
= 0;
2221 scic
->power_control
.phys_granted_power
= 0;
2224 static enum sci_status
scic_controller_initialize(struct scic_sds_controller
*scic
)
2226 struct sci_base_state_machine
*sm
= &scic
->state_machine
;
2227 enum sci_status result
= SCI_SUCCESS
;
2228 struct isci_host
*ihost
= scic_to_ihost(scic
);
2231 if (scic
->state_machine
.current_state_id
!=
2232 SCI_BASE_CONTROLLER_STATE_RESET
) {
2233 dev_warn(scic_to_dev(scic
),
2234 "SCIC Controller initialize operation requested "
2235 "in invalid state\n");
2236 return SCI_FAILURE_INVALID_STATE
;
2239 sci_base_state_machine_change_state(sm
, SCI_BASE_CONTROLLER_STATE_INITIALIZING
);
2241 scic
->timeout_timer
= isci_timer_create(ihost
, scic
,
2242 scic_sds_controller_timeout_handler
);
2244 scic_sds_controller_initialize_phy_startup(scic
);
2246 scic_sds_controller_initialize_power_control(scic
);
2249 * There is nothing to do here for B0 since we do not have to
2250 * program the AFE registers.
2251 * / @todo The AFE settings are supposed to be correct for the B0 but
2252 * / presently they seem to be wrong. */
2253 scic_sds_controller_afe_initialization(scic
);
2255 if (result
== SCI_SUCCESS
) {
2259 /* Take the hardware out of reset */
2260 writel(0, &scic
->smu_registers
->soft_reset_control
);
2263 * / @todo Provide meaningfull error code for hardware failure
2264 * result = SCI_FAILURE_CONTROLLER_HARDWARE; */
2265 result
= SCI_FAILURE
;
2266 terminate_loop
= 100;
2268 while (terminate_loop
-- && (result
!= SCI_SUCCESS
)) {
2269 /* Loop until the hardware reports success */
2270 udelay(SCU_CONTEXT_RAM_INIT_STALL_TIME
);
2271 status
= readl(&scic
->smu_registers
->control_status
);
2273 if ((status
& SCU_RAM_INIT_COMPLETED
) ==
2274 SCU_RAM_INIT_COMPLETED
)
2275 result
= SCI_SUCCESS
;
2279 if (result
== SCI_SUCCESS
) {
2280 u32 max_supported_ports
;
2281 u32 max_supported_devices
;
2282 u32 max_supported_io_requests
;
2283 u32 device_context_capacity
;
2286 * Determine what are the actaul device capacities that the
2287 * hardware will support */
2288 device_context_capacity
=
2289 readl(&scic
->smu_registers
->device_context_capacity
);
2292 max_supported_ports
= smu_dcc_get_max_ports(device_context_capacity
);
2293 max_supported_devices
= smu_dcc_get_max_remote_node_context(device_context_capacity
);
2294 max_supported_io_requests
= smu_dcc_get_max_task_context(device_context_capacity
);
2297 * Make all PEs that are unassigned match up with the
2300 for (index
= 0; index
< max_supported_ports
; index
++) {
2301 struct scu_port_task_scheduler_group_registers __iomem
2302 *ptsg
= &scic
->scu_registers
->peg0
.ptsg
;
2304 writel(index
, &ptsg
->protocol_engine
[index
]);
2307 /* Record the smaller of the two capacity values */
2308 scic
->logical_port_entries
=
2309 min(max_supported_ports
, scic
->logical_port_entries
);
2311 scic
->task_context_entries
=
2312 min(max_supported_io_requests
,
2313 scic
->task_context_entries
);
2315 scic
->remote_node_entries
=
2316 min(max_supported_devices
, scic
->remote_node_entries
);
2319 * Now that we have the correct hardware reported minimum values
2320 * build the MDL for the controller. Default to a performance
2323 scic_controller_set_mode(scic
, SCI_MODE_SPEED
);
2326 /* Initialize hardware PCI Relaxed ordering in DMA engines */
2327 if (result
== SCI_SUCCESS
) {
2328 u32 dma_configuration
;
2330 /* Configure the payload DMA */
2332 readl(&scic
->scu_registers
->sdma
.pdma_configuration
);
2333 dma_configuration
|=
2334 SCU_PDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE
);
2335 writel(dma_configuration
,
2336 &scic
->scu_registers
->sdma
.pdma_configuration
);
2338 /* Configure the control DMA */
2340 readl(&scic
->scu_registers
->sdma
.cdma_configuration
);
2341 dma_configuration
|=
2342 SCU_CDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE
);
2343 writel(dma_configuration
,
2344 &scic
->scu_registers
->sdma
.cdma_configuration
);
2348 * Initialize the PHYs before the PORTs because the PHY registers
2349 * are accessed during the port initialization.
2351 if (result
== SCI_SUCCESS
) {
2352 /* Initialize the phys */
2354 (result
== SCI_SUCCESS
) && (index
< SCI_MAX_PHYS
);
2356 result
= scic_sds_phy_initialize(
2357 &ihost
->phys
[index
].sci
,
2358 &scic
->scu_registers
->peg0
.pe
[index
].tl
,
2359 &scic
->scu_registers
->peg0
.pe
[index
].ll
);
2363 if (result
== SCI_SUCCESS
) {
2364 /* Initialize the logical ports */
2366 (index
< scic
->logical_port_entries
) &&
2367 (result
== SCI_SUCCESS
);
2369 result
= scic_sds_port_initialize(
2370 &ihost
->ports
[index
].sci
,
2371 &scic
->scu_registers
->peg0
.ptsg
.port
[index
],
2372 &scic
->scu_registers
->peg0
.ptsg
.protocol_engine
,
2373 &scic
->scu_registers
->peg0
.viit
[index
]);
2377 if (result
== SCI_SUCCESS
)
2378 result
= scic_sds_port_configuration_agent_initialize(
2382 /* Advance the controller state machine */
2383 if (result
== SCI_SUCCESS
)
2384 state
= SCI_BASE_CONTROLLER_STATE_INITIALIZED
;
2386 state
= SCI_BASE_CONTROLLER_STATE_FAILED
;
2387 sci_base_state_machine_change_state(sm
, state
);
2392 static enum sci_status
scic_user_parameters_set(
2393 struct scic_sds_controller
*scic
,
2394 union scic_user_parameters
*scic_parms
)
2396 u32 state
= scic
->state_machine
.current_state_id
;
2398 if (state
== SCI_BASE_CONTROLLER_STATE_RESET
||
2399 state
== SCI_BASE_CONTROLLER_STATE_INITIALIZING
||
2400 state
== SCI_BASE_CONTROLLER_STATE_INITIALIZED
) {
2404 * Validate the user parameters. If they are not legal, then
2407 for (index
= 0; index
< SCI_MAX_PHYS
; index
++) {
2408 struct sci_phy_user_params
*user_phy
;
2410 user_phy
= &scic_parms
->sds1
.phys
[index
];
2412 if (!((user_phy
->max_speed_generation
<=
2413 SCIC_SDS_PARM_MAX_SPEED
) &&
2414 (user_phy
->max_speed_generation
>
2415 SCIC_SDS_PARM_NO_SPEED
)))
2416 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2418 if (user_phy
->in_connection_align_insertion_frequency
<
2420 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2422 if ((user_phy
->in_connection_align_insertion_frequency
<
2424 (user_phy
->align_insertion_frequency
== 0) ||
2426 notify_enable_spin_up_insertion_frequency
==
2428 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2431 if ((scic_parms
->sds1
.stp_inactivity_timeout
== 0) ||
2432 (scic_parms
->sds1
.ssp_inactivity_timeout
== 0) ||
2433 (scic_parms
->sds1
.stp_max_occupancy_timeout
== 0) ||
2434 (scic_parms
->sds1
.ssp_max_occupancy_timeout
== 0) ||
2435 (scic_parms
->sds1
.no_outbound_task_timeout
== 0))
2436 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2438 memcpy(&scic
->user_parameters
, scic_parms
, sizeof(*scic_parms
));
2443 return SCI_FAILURE_INVALID_STATE
;
2446 static int scic_controller_mem_init(struct scic_sds_controller
*scic
)
2448 struct device
*dev
= scic_to_dev(scic
);
2449 dma_addr_t dma_handle
;
2450 enum sci_status result
;
2452 scic
->completion_queue
= dmam_alloc_coherent(dev
,
2453 scic
->completion_queue_entries
* sizeof(u32
),
2454 &dma_handle
, GFP_KERNEL
);
2455 if (!scic
->completion_queue
)
2458 writel(lower_32_bits(dma_handle
),
2459 &scic
->smu_registers
->completion_queue_lower
);
2460 writel(upper_32_bits(dma_handle
),
2461 &scic
->smu_registers
->completion_queue_upper
);
2463 scic
->remote_node_context_table
= dmam_alloc_coherent(dev
,
2464 scic
->remote_node_entries
*
2465 sizeof(union scu_remote_node_context
),
2466 &dma_handle
, GFP_KERNEL
);
2467 if (!scic
->remote_node_context_table
)
2470 writel(lower_32_bits(dma_handle
),
2471 &scic
->smu_registers
->remote_node_context_lower
);
2472 writel(upper_32_bits(dma_handle
),
2473 &scic
->smu_registers
->remote_node_context_upper
);
2475 scic
->task_context_table
= dmam_alloc_coherent(dev
,
2476 scic
->task_context_entries
*
2477 sizeof(struct scu_task_context
),
2478 &dma_handle
, GFP_KERNEL
);
2479 if (!scic
->task_context_table
)
2482 writel(lower_32_bits(dma_handle
),
2483 &scic
->smu_registers
->host_task_table_lower
);
2484 writel(upper_32_bits(dma_handle
),
2485 &scic
->smu_registers
->host_task_table_upper
);
2487 result
= scic_sds_unsolicited_frame_control_construct(scic
);
2492 * Inform the silicon as to the location of the UF headers and
2495 writel(lower_32_bits(scic
->uf_control
.headers
.physical_address
),
2496 &scic
->scu_registers
->sdma
.uf_header_base_address_lower
);
2497 writel(upper_32_bits(scic
->uf_control
.headers
.physical_address
),
2498 &scic
->scu_registers
->sdma
.uf_header_base_address_upper
);
2500 writel(lower_32_bits(scic
->uf_control
.address_table
.physical_address
),
2501 &scic
->scu_registers
->sdma
.uf_address_table_lower
);
2502 writel(upper_32_bits(scic
->uf_control
.address_table
.physical_address
),
2503 &scic
->scu_registers
->sdma
.uf_address_table_upper
);
2508 int isci_host_init(struct isci_host
*isci_host
)
2511 enum sci_status status
;
2512 union scic_oem_parameters oem
;
2513 union scic_user_parameters scic_user_params
;
2514 struct isci_pci_info
*pci_info
= to_pci_info(isci_host
->pdev
);
2516 isci_timer_list_construct(isci_host
);
2518 spin_lock_init(&isci_host
->state_lock
);
2519 spin_lock_init(&isci_host
->scic_lock
);
2520 spin_lock_init(&isci_host
->queue_lock
);
2521 init_waitqueue_head(&isci_host
->eventq
);
2523 isci_host_change_state(isci_host
, isci_starting
);
2524 isci_host
->can_queue
= ISCI_CAN_QUEUE_VAL
;
2526 status
= scic_controller_construct(&isci_host
->sci
, scu_base(isci_host
),
2527 smu_base(isci_host
));
2529 if (status
!= SCI_SUCCESS
) {
2530 dev_err(&isci_host
->pdev
->dev
,
2531 "%s: scic_controller_construct failed - status = %x\n",
2537 isci_host
->sas_ha
.dev
= &isci_host
->pdev
->dev
;
2538 isci_host
->sas_ha
.lldd_ha
= isci_host
;
2541 * grab initial values stored in the controller object for OEM and USER
2544 isci_user_parameters_get(isci_host
, &scic_user_params
);
2545 status
= scic_user_parameters_set(&isci_host
->sci
,
2547 if (status
!= SCI_SUCCESS
) {
2548 dev_warn(&isci_host
->pdev
->dev
,
2549 "%s: scic_user_parameters_set failed\n",
2554 scic_oem_parameters_get(&isci_host
->sci
, &oem
);
2556 /* grab any OEM parameters specified in orom */
2557 if (pci_info
->orom
) {
2558 status
= isci_parse_oem_parameters(&oem
,
2561 if (status
!= SCI_SUCCESS
) {
2562 dev_warn(&isci_host
->pdev
->dev
,
2563 "parsing firmware oem parameters failed\n");
2568 status
= scic_oem_parameters_set(&isci_host
->sci
, &oem
);
2569 if (status
!= SCI_SUCCESS
) {
2570 dev_warn(&isci_host
->pdev
->dev
,
2571 "%s: scic_oem_parameters_set failed\n",
2576 tasklet_init(&isci_host
->completion_tasklet
,
2577 isci_host_completion_routine
, (unsigned long)isci_host
);
2579 INIT_LIST_HEAD(&isci_host
->requests_to_complete
);
2580 INIT_LIST_HEAD(&isci_host
->requests_to_errorback
);
2582 spin_lock_irq(&isci_host
->scic_lock
);
2583 status
= scic_controller_initialize(&isci_host
->sci
);
2584 spin_unlock_irq(&isci_host
->scic_lock
);
2585 if (status
!= SCI_SUCCESS
) {
2586 dev_warn(&isci_host
->pdev
->dev
,
2587 "%s: scic_controller_initialize failed -"
2593 err
= scic_controller_mem_init(&isci_host
->sci
);
2597 isci_host
->dma_pool
= dmam_pool_create(DRV_NAME
, &isci_host
->pdev
->dev
,
2598 sizeof(struct isci_request
),
2599 SLAB_HWCACHE_ALIGN
, 0);
2601 if (!isci_host
->dma_pool
)
2604 for (i
= 0; i
< SCI_MAX_PORTS
; i
++)
2605 isci_port_init(&isci_host
->ports
[i
], isci_host
, i
);
2607 for (i
= 0; i
< SCI_MAX_PHYS
; i
++)
2608 isci_phy_init(&isci_host
->phys
[i
], isci_host
, i
);
2610 for (i
= 0; i
< SCI_MAX_REMOTE_DEVICES
; i
++) {
2611 struct isci_remote_device
*idev
= &isci_host
->devices
[i
];
2613 INIT_LIST_HEAD(&idev
->reqs_in_process
);
2614 INIT_LIST_HEAD(&idev
->node
);
2615 spin_lock_init(&idev
->state_lock
);
2621 void scic_sds_controller_link_up(struct scic_sds_controller
*scic
,
2622 struct scic_sds_port
*port
, struct scic_sds_phy
*phy
)
2624 switch (scic
->state_machine
.current_state_id
) {
2625 case SCI_BASE_CONTROLLER_STATE_STARTING
:
2626 scic_sds_controller_phy_timer_stop(scic
);
2627 scic
->port_agent
.link_up_handler(scic
, &scic
->port_agent
,
2629 scic_sds_controller_start_next_phy(scic
);
2631 case SCI_BASE_CONTROLLER_STATE_READY
:
2632 scic
->port_agent
.link_up_handler(scic
, &scic
->port_agent
,
2636 dev_dbg(scic_to_dev(scic
),
2637 "%s: SCIC Controller linkup event from phy %d in "
2638 "unexpected state %d\n", __func__
, phy
->phy_index
,
2639 scic
->state_machine
.current_state_id
);
2643 void scic_sds_controller_link_down(struct scic_sds_controller
*scic
,
2644 struct scic_sds_port
*port
, struct scic_sds_phy
*phy
)
2646 switch (scic
->state_machine
.current_state_id
) {
2647 case SCI_BASE_CONTROLLER_STATE_STARTING
:
2648 case SCI_BASE_CONTROLLER_STATE_READY
:
2649 scic
->port_agent
.link_down_handler(scic
, &scic
->port_agent
,
2653 dev_dbg(scic_to_dev(scic
),
2654 "%s: SCIC Controller linkdown event from phy %d in "
2655 "unexpected state %d\n",
2658 scic
->state_machine
.current_state_id
);
2663 * This is a helper method to determine if any remote devices on this
2664 * controller are still in the stopping state.
2667 static bool scic_sds_controller_has_remote_devices_stopping(
2668 struct scic_sds_controller
*controller
)
2672 for (index
= 0; index
< controller
->remote_node_entries
; index
++) {
2673 if ((controller
->device_table
[index
] != NULL
) &&
2674 (controller
->device_table
[index
]->state_machine
.current_state_id
2675 == SCI_BASE_REMOTE_DEVICE_STATE_STOPPING
))
2683 * This method is called by the remote device to inform the controller
2684 * object that the remote device has stopped.
2686 void scic_sds_controller_remote_device_stopped(struct scic_sds_controller
*scic
,
2687 struct scic_sds_remote_device
*sci_dev
)
2689 if (scic
->state_machine
.current_state_id
!=
2690 SCI_BASE_CONTROLLER_STATE_STOPPING
) {
2691 dev_dbg(scic_to_dev(scic
),
2692 "SCIC Controller 0x%p remote device stopped event "
2693 "from device 0x%p in unexpected state %d\n",
2695 scic
->state_machine
.current_state_id
);
2699 if (!scic_sds_controller_has_remote_devices_stopping(scic
)) {
2700 sci_base_state_machine_change_state(&scic
->state_machine
,
2701 SCI_BASE_CONTROLLER_STATE_STOPPED
);
2706 * This method will write to the SCU PCP register the request value. The method
2707 * is used to suspend/resume ports, devices, and phys.
2712 void scic_sds_controller_post_request(
2713 struct scic_sds_controller
*scic
,
2716 dev_dbg(scic_to_dev(scic
),
2717 "%s: SCIC Controller 0x%p post request 0x%08x\n",
2722 writel(request
, &scic
->smu_registers
->post_context_port
);
2726 * This method will copy the soft copy of the task context into the physical
2727 * memory accessible by the controller.
2728 * @scic: This parameter specifies the controller for which to copy
2730 * @sci_req: This parameter specifies the request for which the task
2731 * context is being copied.
2733 * After this call is made the SCIC_SDS_IO_REQUEST object will always point to
2734 * the physical memory version of the task context. Thus, all subsequent
2735 * updates to the task context are performed in the TC table (i.e. DMAable
2738 void scic_sds_controller_copy_task_context(
2739 struct scic_sds_controller
*scic
,
2740 struct scic_sds_request
*sci_req
)
2742 struct scu_task_context
*task_context_buffer
;
2744 task_context_buffer
= scic_sds_controller_get_task_context_buffer(
2745 scic
, sci_req
->io_tag
);
2747 memcpy(task_context_buffer
,
2748 sci_req
->task_context_buffer
,
2749 offsetof(struct scu_task_context
, sgl_snapshot_ac
));
2752 * Now that the soft copy of the TC has been copied into the TC
2753 * table accessible by the silicon. Thus, any further changes to
2754 * the TC (e.g. TC termination) occur in the appropriate location. */
2755 sci_req
->task_context_buffer
= task_context_buffer
;
2759 * This method returns the task context buffer for the given io tag.
2763 * struct scu_task_context*
2765 struct scu_task_context
*scic_sds_controller_get_task_context_buffer(
2766 struct scic_sds_controller
*scic
,
2769 u16 task_index
= scic_sds_io_tag_get_index(io_tag
);
2771 if (task_index
< scic
->task_context_entries
) {
2772 return &scic
->task_context_table
[task_index
];
2778 struct scic_sds_request
*scic_request_by_tag(struct scic_sds_controller
*scic
,
2784 task_index
= scic_sds_io_tag_get_index(io_tag
);
2786 if (task_index
< scic
->task_context_entries
) {
2787 if (scic
->io_request_table
[task_index
] != NULL
) {
2788 task_sequence
= scic_sds_io_tag_get_sequence(io_tag
);
2790 if (task_sequence
== scic
->io_request_sequence
[task_index
]) {
2791 return scic
->io_request_table
[task_index
];
2800 * This method allocates remote node index and the reserves the remote node
2801 * context space for use. This method can fail if there are no more remote
2802 * node index available.
2803 * @scic: This is the controller object which contains the set of
2804 * free remote node ids
2805 * @sci_dev: This is the device object which is requesting the a remote node
2807 * @node_id: This is the remote node id that is assinged to the device if one
2810 * enum sci_status SCI_FAILURE_OUT_OF_RESOURCES if there are no available remote
2811 * node index available.
2813 enum sci_status
scic_sds_controller_allocate_remote_node_context(
2814 struct scic_sds_controller
*scic
,
2815 struct scic_sds_remote_device
*sci_dev
,
2819 u32 remote_node_count
= scic_sds_remote_device_node_count(sci_dev
);
2821 node_index
= scic_sds_remote_node_table_allocate_remote_node(
2822 &scic
->available_remote_nodes
, remote_node_count
2825 if (node_index
!= SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX
) {
2826 scic
->device_table
[node_index
] = sci_dev
;
2828 *node_id
= node_index
;
2833 return SCI_FAILURE_INSUFFICIENT_RESOURCES
;
2837 * This method frees the remote node index back to the available pool. Once
2838 * this is done the remote node context buffer is no longer valid and can
2845 void scic_sds_controller_free_remote_node_context(
2846 struct scic_sds_controller
*scic
,
2847 struct scic_sds_remote_device
*sci_dev
,
2850 u32 remote_node_count
= scic_sds_remote_device_node_count(sci_dev
);
2852 if (scic
->device_table
[node_id
] == sci_dev
) {
2853 scic
->device_table
[node_id
] = NULL
;
2855 scic_sds_remote_node_table_release_remote_node_index(
2856 &scic
->available_remote_nodes
, remote_node_count
, node_id
2862 * This method returns the union scu_remote_node_context for the specified remote
2867 * union scu_remote_node_context*
2869 union scu_remote_node_context
*scic_sds_controller_get_remote_node_context_buffer(
2870 struct scic_sds_controller
*scic
,
2874 (node_id
< scic
->remote_node_entries
)
2875 && (scic
->device_table
[node_id
] != NULL
)
2877 return &scic
->remote_node_context_table
[node_id
];
2885 * @resposne_buffer: This is the buffer into which the D2H register FIS will be
2887 * @frame_header: This is the frame header returned by the hardware.
2888 * @frame_buffer: This is the frame buffer returned by the hardware.
2890 * This method will combind the frame header and frame buffer to create a SATA
2891 * D2H register FIS none
2893 void scic_sds_controller_copy_sata_response(
2894 void *response_buffer
,
2898 memcpy(response_buffer
, frame_header
, sizeof(u32
));
2900 memcpy(response_buffer
+ sizeof(u32
),
2902 sizeof(struct dev_to_host_fis
) - sizeof(u32
));
2906 * This method releases the frame once this is done the frame is available for
2907 * re-use by the hardware. The data contained in the frame header and frame
2908 * buffer is no longer valid. The UF queue get pointer is only updated if UF
2909 * control indicates this is appropriate.
2914 void scic_sds_controller_release_frame(
2915 struct scic_sds_controller
*scic
,
2918 if (scic_sds_unsolicited_frame_control_release_frame(
2919 &scic
->uf_control
, frame_index
) == true)
2920 writel(scic
->uf_control
.get
,
2921 &scic
->scu_registers
->sdma
.unsolicited_frame_get_pointer
);
2925 * scic_controller_start_io() - This method is called by the SCI user to
2926 * send/start an IO request. If the method invocation is successful, then
2927 * the IO request has been queued to the hardware for processing.
2928 * @controller: the handle to the controller object for which to start an IO
2930 * @remote_device: the handle to the remote device object for which to start an
2932 * @io_request: the handle to the io request object to start.
2933 * @io_tag: This parameter specifies a previously allocated IO tag that the
2934 * user desires to be utilized for this request. This parameter is optional.
2935 * The user is allowed to supply SCI_CONTROLLER_INVALID_IO_TAG as the value
2936 * for this parameter.
2938 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
2939 * to ensure that each of the methods that may allocate or free available IO
2940 * tags are handled in a mutually exclusive manner. This method is one of said
2941 * methods requiring proper critical code section protection (e.g. semaphore,
2942 * spin-lock, etc.). - For SATA, the user is required to manage NCQ tags. As a
2943 * result, it is expected the user will have set the NCQ tag field in the host
2944 * to device register FIS prior to calling this method. There is also a
2945 * requirement for the user to call scic_stp_io_set_ncq_tag() prior to invoking
2946 * the scic_controller_start_io() method. scic_controller_allocate_tag() for
2947 * more information on allocating a tag. Indicate if the controller
2948 * successfully started the IO request. SCI_SUCCESS if the IO request was
2949 * successfully started. Determine the failure situations and return values.
2951 enum sci_status
scic_controller_start_io(
2952 struct scic_sds_controller
*scic
,
2953 struct scic_sds_remote_device
*rdev
,
2954 struct scic_sds_request
*req
,
2957 enum sci_status status
;
2959 if (scic
->state_machine
.current_state_id
!=
2960 SCI_BASE_CONTROLLER_STATE_READY
) {
2961 dev_warn(scic_to_dev(scic
), "invalid state to start I/O");
2962 return SCI_FAILURE_INVALID_STATE
;
2965 status
= scic_sds_remote_device_start_io(scic
, rdev
, req
);
2966 if (status
!= SCI_SUCCESS
)
2969 scic
->io_request_table
[scic_sds_io_tag_get_index(req
->io_tag
)] = req
;
2970 scic_sds_controller_post_request(scic
, scic_sds_request_get_post_context(req
));
2975 * scic_controller_terminate_request() - This method is called by the SCI Core
2976 * user to terminate an ongoing (i.e. started) core IO request. This does
2977 * not abort the IO request at the target, but rather removes the IO request
2978 * from the host controller.
2979 * @controller: the handle to the controller object for which to terminate a
2981 * @remote_device: the handle to the remote device object for which to
2982 * terminate a request.
2983 * @request: the handle to the io or task management request object to
2986 * Indicate if the controller successfully began the terminate process for the
2987 * IO request. SCI_SUCCESS if the terminate process was successfully started
2988 * for the request. Determine the failure situations and return values.
2990 enum sci_status
scic_controller_terminate_request(
2991 struct scic_sds_controller
*scic
,
2992 struct scic_sds_remote_device
*rdev
,
2993 struct scic_sds_request
*req
)
2995 enum sci_status status
;
2997 if (scic
->state_machine
.current_state_id
!=
2998 SCI_BASE_CONTROLLER_STATE_READY
) {
2999 dev_warn(scic_to_dev(scic
),
3000 "invalid state to terminate request\n");
3001 return SCI_FAILURE_INVALID_STATE
;
3004 status
= scic_sds_io_request_terminate(req
);
3005 if (status
!= SCI_SUCCESS
)
3009 * Utilize the original post context command and or in the POST_TC_ABORT
3012 scic_sds_controller_post_request(scic
,
3013 scic_sds_request_get_post_context(req
) |
3014 SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT
);
3019 * scic_controller_complete_io() - This method will perform core specific
3020 * completion operations for an IO request. After this method is invoked,
3021 * the user should consider the IO request as invalid until it is properly
3022 * reused (i.e. re-constructed).
3023 * @controller: The handle to the controller object for which to complete the
3025 * @remote_device: The handle to the remote device object for which to complete
3027 * @io_request: the handle to the io request object to complete.
3029 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
3030 * to ensure that each of the methods that may allocate or free available IO
3031 * tags are handled in a mutually exclusive manner. This method is one of said
3032 * methods requiring proper critical code section protection (e.g. semaphore,
3033 * spin-lock, etc.). - If the IO tag for a request was allocated, by the SCI
3034 * Core user, using the scic_controller_allocate_io_tag() method, then it is
3035 * the responsibility of the caller to invoke the scic_controller_free_io_tag()
3036 * method to free the tag (i.e. this method will not free the IO tag). Indicate
3037 * if the controller successfully completed the IO request. SCI_SUCCESS if the
3038 * completion process was successful.
3040 enum sci_status
scic_controller_complete_io(
3041 struct scic_sds_controller
*scic
,
3042 struct scic_sds_remote_device
*rdev
,
3043 struct scic_sds_request
*request
)
3045 enum sci_status status
;
3048 switch (scic
->state_machine
.current_state_id
) {
3049 case SCI_BASE_CONTROLLER_STATE_STOPPING
:
3050 /* XXX: Implement this function */
3052 case SCI_BASE_CONTROLLER_STATE_READY
:
3053 status
= scic_sds_remote_device_complete_io(scic
, rdev
, request
);
3054 if (status
!= SCI_SUCCESS
)
3057 index
= scic_sds_io_tag_get_index(request
->io_tag
);
3058 scic
->io_request_table
[index
] = NULL
;
3061 dev_warn(scic_to_dev(scic
), "invalid state to complete I/O");
3062 return SCI_FAILURE_INVALID_STATE
;
3067 enum sci_status
scic_controller_continue_io(struct scic_sds_request
*sci_req
)
3069 struct scic_sds_controller
*scic
= sci_req
->owning_controller
;
3071 if (scic
->state_machine
.current_state_id
!=
3072 SCI_BASE_CONTROLLER_STATE_READY
) {
3073 dev_warn(scic_to_dev(scic
), "invalid state to continue I/O");
3074 return SCI_FAILURE_INVALID_STATE
;
3077 scic
->io_request_table
[scic_sds_io_tag_get_index(sci_req
->io_tag
)] = sci_req
;
3078 scic_sds_controller_post_request(scic
, scic_sds_request_get_post_context(sci_req
));
3083 * scic_controller_start_task() - This method is called by the SCIC user to
3084 * send/start a framework task management request.
3085 * @controller: the handle to the controller object for which to start the task
3086 * management request.
3087 * @remote_device: the handle to the remote device object for which to start
3088 * the task management request.
3089 * @task_request: the handle to the task request object to start.
3090 * @io_tag: This parameter specifies a previously allocated IO tag that the
3091 * user desires to be utilized for this request. Note this not the io_tag
3092 * of the request being managed. It is to be utilized for the task request
3093 * itself. This parameter is optional. The user is allowed to supply
3094 * SCI_CONTROLLER_INVALID_IO_TAG as the value for this parameter.
3096 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
3097 * to ensure that each of the methods that may allocate or free available IO
3098 * tags are handled in a mutually exclusive manner. This method is one of said
3099 * methods requiring proper critical code section protection (e.g. semaphore,
3100 * spin-lock, etc.). - The user must synchronize this task with completion
3101 * queue processing. If they are not synchronized then it is possible for the
3102 * io requests that are being managed by the task request can complete before
3103 * starting the task request. scic_controller_allocate_tag() for more
3104 * information on allocating a tag. Indicate if the controller successfully
3105 * started the IO request. SCI_TASK_SUCCESS if the task request was
3106 * successfully started. SCI_TASK_FAILURE_REQUIRES_SCSI_ABORT This value is
3107 * returned if there is/are task(s) outstanding that require termination or
3108 * completion before this request can succeed.
3110 enum sci_task_status
scic_controller_start_task(
3111 struct scic_sds_controller
*scic
,
3112 struct scic_sds_remote_device
*rdev
,
3113 struct scic_sds_request
*req
,
3116 enum sci_status status
;
3118 if (scic
->state_machine
.current_state_id
!=
3119 SCI_BASE_CONTROLLER_STATE_READY
) {
3120 dev_warn(scic_to_dev(scic
),
3121 "%s: SCIC Controller starting task from invalid "
3124 return SCI_TASK_FAILURE_INVALID_STATE
;
3127 status
= scic_sds_remote_device_start_task(scic
, rdev
, req
);
3129 case SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS
:
3130 scic
->io_request_table
[scic_sds_io_tag_get_index(req
->io_tag
)] = req
;
3133 * We will let framework know this task request started successfully,
3134 * although core is still woring on starting the request (to post tc when
3139 scic
->io_request_table
[scic_sds_io_tag_get_index(req
->io_tag
)] = req
;
3141 scic_sds_controller_post_request(scic
,
3142 scic_sds_request_get_post_context(req
));
3152 * scic_controller_allocate_io_tag() - This method will allocate a tag from the
3153 * pool of free IO tags. Direct allocation of IO tags by the SCI Core user
3154 * is optional. The scic_controller_start_io() method will allocate an IO
3155 * tag if this method is not utilized and the tag is not supplied to the IO
3156 * construct routine. Direct allocation of IO tags may provide additional
3157 * performance improvements in environments capable of supporting this usage
3158 * model. Additionally, direct allocation of IO tags also provides
3159 * additional flexibility to the SCI Core user. Specifically, the user may
3160 * retain IO tags across the lives of multiple IO requests.
3161 * @controller: the handle to the controller object for which to allocate the
3164 * IO tags are a protected resource. It is incumbent upon the SCI Core user to
3165 * ensure that each of the methods that may allocate or free available IO tags
3166 * are handled in a mutually exclusive manner. This method is one of said
3167 * methods requiring proper critical code section protection (e.g. semaphore,
3168 * spin-lock, etc.). An unsigned integer representing an available IO tag.
3169 * SCI_CONTROLLER_INVALID_IO_TAG This value is returned if there are no
3170 * currently available tags to be allocated. All return other values indicate a
3173 u16
scic_controller_allocate_io_tag(
3174 struct scic_sds_controller
*scic
)
3179 if (!sci_pool_empty(scic
->tci_pool
)) {
3180 sci_pool_get(scic
->tci_pool
, task_context
);
3182 sequence_count
= scic
->io_request_sequence
[task_context
];
3184 return scic_sds_io_tag_construct(sequence_count
, task_context
);
3187 return SCI_CONTROLLER_INVALID_IO_TAG
;
3191 * scic_controller_free_io_tag() - This method will free an IO tag to the pool
3192 * of free IO tags. This method provides the SCI Core user more flexibility
3193 * with regards to IO tags. The user may desire to keep an IO tag after an
3194 * IO request has completed, because they plan on re-using the tag for a
3195 * subsequent IO request. This method is only legal if the tag was
3196 * allocated via scic_controller_allocate_io_tag().
3197 * @controller: This parameter specifies the handle to the controller object
3198 * for which to free/return the tag.
3199 * @io_tag: This parameter represents the tag to be freed to the pool of
3202 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
3203 * to ensure that each of the methods that may allocate or free available IO
3204 * tags are handled in a mutually exclusive manner. This method is one of said
3205 * methods requiring proper critical code section protection (e.g. semaphore,
3206 * spin-lock, etc.). - If the IO tag for a request was allocated, by the SCI
3207 * Core user, using the scic_controller_allocate_io_tag() method, then it is
3208 * the responsibility of the caller to invoke this method to free the tag. This
3209 * method returns an indication of whether the tag was successfully put back
3210 * (freed) to the pool of available tags. SCI_SUCCESS This return value
3211 * indicates the tag was successfully placed into the pool of available IO
3212 * tags. SCI_FAILURE_INVALID_IO_TAG This value is returned if the supplied tag
3213 * is not a valid IO tag value.
3215 enum sci_status
scic_controller_free_io_tag(
3216 struct scic_sds_controller
*scic
,
3222 BUG_ON(io_tag
== SCI_CONTROLLER_INVALID_IO_TAG
);
3224 sequence
= scic_sds_io_tag_get_sequence(io_tag
);
3225 index
= scic_sds_io_tag_get_index(io_tag
);
3227 if (!sci_pool_full(scic
->tci_pool
)) {
3228 if (sequence
== scic
->io_request_sequence
[index
]) {
3229 scic_sds_io_sequence_increment(
3230 scic
->io_request_sequence
[index
]);
3232 sci_pool_put(scic
->tci_pool
, index
);
3238 return SCI_FAILURE_INVALID_IO_TAG
;