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1 /*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56 /**
57 * This file contains the isci_module initialization routines.
58 *
59 * host.h
60 */
61
62
63
64 #if !defined(_SCI_HOST_H_)
65 #define _SCI_HOST_H_
66
67 #include "phy.h"
68 /*#include "task.h"*/
69 #include "timers.h"
70 #include "remote_device.h"
71 #include "scic_user_callback.h"
72
73 #define DRV_NAME "isci"
74 #define SCI_PCI_BAR_COUNT 2
75 #define SCI_NUM_MSI_X_INT 2
76 #define SCI_SMU_BAR 0
77 #define SCI_SMU_BAR_SIZE (16*1024)
78 #define SCI_SCU_BAR 1
79 #define SCI_SCU_BAR_SIZE (4*1024*1024)
80 #define SCI_IO_SPACE_BAR0 2
81 #define SCI_IO_SPACE_BAR1 3
82 #define SCI_MSIX_NORMAL_VECTOR 0
83 #define SCI_MSIX_ERROR_VECTOR 1
84 #define SCI_MSIX_SINGLE_VECTOR 1
85 #define SCI_MSIX_DOUBLE_VECTOR 2
86 #define ISCI_CAN_QUEUE_VAL 250 /* < SCI_MAX_IO_REQUESTS ? */
87 #define SCIC_CONTROLLER_STOP_TIMEOUT 5000
88
89 struct coherent_memory_info {
90 struct list_head node;
91 dma_addr_t dma_handle;
92 void *vaddr;
93 size_t size;
94 struct sci_physical_memory_descriptor *mde;
95 };
96
97 struct isci_host {
98 struct scic_sds_controller *core_controller;
99 struct scic_controller_handler_methods scic_irq_handlers[SCI_NUM_MSI_X_INT];
100 union scic_oem_parameters oem_parameters;
101
102 int id; /* unique within a given pci device */
103 struct isci_timer_list timer_list_struct;
104 void *core_ctrl_memory;
105 struct dma_pool *dma_pool;
106 unsigned int dma_pool_alloc_size;
107 struct isci_phy phys[SCI_MAX_PHYS];
108
109 /* isci_ports and sas_ports are implicitly parallel to the
110 * ports maintained by the core
111 */
112 struct isci_port isci_ports[SCI_MAX_PORTS];
113 struct asd_sas_port sas_ports[SCI_MAX_PORTS];
114 struct sas_ha_struct sas_ha;
115
116 int can_queue;
117 spinlock_t queue_lock;
118 spinlock_t state_lock;
119
120 struct pci_dev *pdev;
121 u8 sas_addr[SAS_ADDR_SIZE];
122
123 enum isci_status status;
124 struct Scsi_Host *shost;
125 struct tasklet_struct completion_tasklet;
126 struct list_head mdl_struct_list;
127 struct list_head requests_to_complete;
128 struct list_head requests_to_abort;
129 struct completion stop_complete;
130 struct completion start_complete;
131 spinlock_t scic_lock;
132 struct isci_host *next;
133 };
134
135
136 /**
137 * struct isci_pci_info - This class represents the pci function containing the
138 * controllers. Depending on PCI SKU, there could be up to 2 controllers in
139 * the PCI function.
140 */
141 #define SCI_MAX_MSIX_INT (SCI_NUM_MSI_X_INT*SCI_MAX_CONTROLLERS)
142
143 struct isci_pci_info {
144 struct msix_entry msix_entries[SCI_MAX_MSIX_INT];
145 int core_lib_array_index;
146 SCI_LIBRARY_HANDLE_T core_lib_handle;
147 struct isci_host *hosts;
148 };
149
150 static inline struct isci_pci_info *to_pci_info(struct pci_dev *pdev)
151 {
152 return pci_get_drvdata(pdev);
153 }
154
155 #define for_each_isci_host(isci_host, pdev) \
156 for (isci_host = to_pci_info(pdev)->hosts;\
157 isci_host; isci_host = isci_host->next)
158
159 static inline
160 enum isci_status isci_host_get_state(
161 struct isci_host *isci_host)
162 {
163 return isci_host->status;
164 }
165
166
167 static inline void isci_host_change_state(
168 struct isci_host *isci_host,
169 enum isci_status status)
170 {
171 unsigned long flags;
172
173 dev_dbg(&isci_host->pdev->dev,
174 "%s: isci_host = %p, state = 0x%x",
175 __func__,
176 isci_host,
177 status);
178 spin_lock_irqsave(&isci_host->state_lock, flags);
179 isci_host->status = status;
180 spin_unlock_irqrestore(&isci_host->state_lock, flags);
181
182 }
183
184 static inline int isci_host_can_queue(
185 struct isci_host *isci_host,
186 int num)
187 {
188 int ret = 0;
189 unsigned long flags;
190
191 spin_lock_irqsave(&isci_host->queue_lock, flags);
192 if ((isci_host->can_queue - num) < 0) {
193 dev_dbg(&isci_host->pdev->dev,
194 "%s: isci_host->can_queue = %d\n",
195 __func__,
196 isci_host->can_queue);
197 ret = -SAS_QUEUE_FULL;
198
199 } else
200 isci_host->can_queue -= num;
201
202 spin_unlock_irqrestore(&isci_host->queue_lock, flags);
203
204 return ret;
205 }
206
207 static inline void isci_host_can_dequeue(
208 struct isci_host *isci_host,
209 int num)
210 {
211 unsigned long flags;
212
213 spin_lock_irqsave(&isci_host->queue_lock, flags);
214 isci_host->can_queue += num;
215 spin_unlock_irqrestore(&isci_host->queue_lock, flags);
216 }
217
218 /**
219 * isci_host_from_sas_ha() - This accessor retrieves the isci_host object
220 * reference from the Linux sas_ha_struct reference.
221 * @ha_struct,: This parameter points to the Linux sas_ha_struct object
222 *
223 * A reference to the associated isci_host structure.
224 */
225 #define isci_host_from_sas_ha(ha_struct) \
226 ((struct isci_host *)(ha_struct)->lldd_ha)
227
228 /**
229 * isci_host_scan_finished() -
230 *
231 * This function is one of the SCSI Host Template functions. The SCSI midlayer
232 * calls this function during a target scan, approx. once every 10 millisecs.
233 */
234 int isci_host_scan_finished(
235 struct Scsi_Host *,
236 unsigned long);
237
238
239 /**
240 * isci_host_scan_start() -
241 *
242 * This function is one of the SCSI Host Template function, called by the SCSI
243 * mid layer berfore a target scan begins. The core library controller start
244 * routine is called from here.
245 */
246 void isci_host_scan_start(
247 struct Scsi_Host *);
248
249 /**
250 * isci_host_start_complete() -
251 *
252 * This function is called by the core library, through the ISCI Module, to
253 * indicate controller start status.
254 */
255 void isci_host_start_complete(
256 struct isci_host *,
257 enum sci_status);
258
259 void isci_host_stop_complete(
260 struct isci_host *isci_host,
261 enum sci_status completion_status);
262
263 int isci_host_init(struct isci_host *);
264
265 void isci_host_init_controller_names(
266 struct isci_host *isci_host,
267 unsigned int controller_idx);
268
269 void isci_host_deinit(
270 struct isci_host *);
271
272 void isci_host_port_link_up(
273 struct isci_host *,
274 struct scic_sds_port *,
275 struct scic_sds_phy *);
276 int isci_host_dev_found(struct domain_device *);
277
278 void isci_host_remote_device_start_complete(
279 struct isci_host *,
280 struct isci_remote_device *,
281 enum sci_status);
282
283 #endif /* !defined(_SCI_HOST_H_) */