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1 /*
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
41 #include <linux/mm.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
58 #include <asm/io.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
61
62 #include "libata.h"
63
64 static unsigned int ata_dev_init_params(struct ata_port *ap,
65 struct ata_device *dev);
66 static void ata_set_mode(struct ata_port *ap);
67 static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
68 struct ata_device *dev);
69 static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
70
71 static unsigned int ata_unique_id = 1;
72 static struct workqueue_struct *ata_wq;
73
74 int atapi_enabled = 1;
75 module_param(atapi_enabled, int, 0444);
76 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
77
78 int libata_fua = 0;
79 module_param_named(fua, libata_fua, int, 0444);
80 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
81
82 MODULE_AUTHOR("Jeff Garzik");
83 MODULE_DESCRIPTION("Library module for ATA devices");
84 MODULE_LICENSE("GPL");
85 MODULE_VERSION(DRV_VERSION);
86
87
88 /**
89 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
90 * @tf: Taskfile to convert
91 * @fis: Buffer into which data will output
92 * @pmp: Port multiplier port
93 *
94 * Converts a standard ATA taskfile to a Serial ATA
95 * FIS structure (Register - Host to Device).
96 *
97 * LOCKING:
98 * Inherited from caller.
99 */
100
101 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
102 {
103 fis[0] = 0x27; /* Register - Host to Device FIS */
104 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
105 bit 7 indicates Command FIS */
106 fis[2] = tf->command;
107 fis[3] = tf->feature;
108
109 fis[4] = tf->lbal;
110 fis[5] = tf->lbam;
111 fis[6] = tf->lbah;
112 fis[7] = tf->device;
113
114 fis[8] = tf->hob_lbal;
115 fis[9] = tf->hob_lbam;
116 fis[10] = tf->hob_lbah;
117 fis[11] = tf->hob_feature;
118
119 fis[12] = tf->nsect;
120 fis[13] = tf->hob_nsect;
121 fis[14] = 0;
122 fis[15] = tf->ctl;
123
124 fis[16] = 0;
125 fis[17] = 0;
126 fis[18] = 0;
127 fis[19] = 0;
128 }
129
130 /**
131 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
132 * @fis: Buffer from which data will be input
133 * @tf: Taskfile to output
134 *
135 * Converts a serial ATA FIS structure to a standard ATA taskfile.
136 *
137 * LOCKING:
138 * Inherited from caller.
139 */
140
141 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
142 {
143 tf->command = fis[2]; /* status */
144 tf->feature = fis[3]; /* error */
145
146 tf->lbal = fis[4];
147 tf->lbam = fis[5];
148 tf->lbah = fis[6];
149 tf->device = fis[7];
150
151 tf->hob_lbal = fis[8];
152 tf->hob_lbam = fis[9];
153 tf->hob_lbah = fis[10];
154
155 tf->nsect = fis[12];
156 tf->hob_nsect = fis[13];
157 }
158
159 static const u8 ata_rw_cmds[] = {
160 /* pio multi */
161 ATA_CMD_READ_MULTI,
162 ATA_CMD_WRITE_MULTI,
163 ATA_CMD_READ_MULTI_EXT,
164 ATA_CMD_WRITE_MULTI_EXT,
165 0,
166 0,
167 0,
168 ATA_CMD_WRITE_MULTI_FUA_EXT,
169 /* pio */
170 ATA_CMD_PIO_READ,
171 ATA_CMD_PIO_WRITE,
172 ATA_CMD_PIO_READ_EXT,
173 ATA_CMD_PIO_WRITE_EXT,
174 0,
175 0,
176 0,
177 0,
178 /* dma */
179 ATA_CMD_READ,
180 ATA_CMD_WRITE,
181 ATA_CMD_READ_EXT,
182 ATA_CMD_WRITE_EXT,
183 0,
184 0,
185 0,
186 ATA_CMD_WRITE_FUA_EXT
187 };
188
189 /**
190 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
191 * @qc: command to examine and configure
192 *
193 * Examine the device configuration and tf->flags to calculate
194 * the proper read/write commands and protocol to use.
195 *
196 * LOCKING:
197 * caller.
198 */
199 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
200 {
201 struct ata_taskfile *tf = &qc->tf;
202 struct ata_device *dev = qc->dev;
203 u8 cmd;
204
205 int index, fua, lba48, write;
206
207 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
208 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
209 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
210
211 if (dev->flags & ATA_DFLAG_PIO) {
212 tf->protocol = ATA_PROT_PIO;
213 index = dev->multi_count ? 0 : 8;
214 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
215 /* Unable to use DMA due to host limitation */
216 tf->protocol = ATA_PROT_PIO;
217 index = dev->multi_count ? 0 : 8;
218 } else {
219 tf->protocol = ATA_PROT_DMA;
220 index = 16;
221 }
222
223 cmd = ata_rw_cmds[index + fua + lba48 + write];
224 if (cmd) {
225 tf->command = cmd;
226 return 0;
227 }
228 return -1;
229 }
230
231 /**
232 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
233 * @pio_mask: pio_mask
234 * @mwdma_mask: mwdma_mask
235 * @udma_mask: udma_mask
236 *
237 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
238 * unsigned int xfer_mask.
239 *
240 * LOCKING:
241 * None.
242 *
243 * RETURNS:
244 * Packed xfer_mask.
245 */
246 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
247 unsigned int mwdma_mask,
248 unsigned int udma_mask)
249 {
250 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
251 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
252 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
253 }
254
255 /**
256 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
257 * @xfer_mask: xfer_mask to unpack
258 * @pio_mask: resulting pio_mask
259 * @mwdma_mask: resulting mwdma_mask
260 * @udma_mask: resulting udma_mask
261 *
262 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
263 * Any NULL distination masks will be ignored.
264 */
265 static void ata_unpack_xfermask(unsigned int xfer_mask,
266 unsigned int *pio_mask,
267 unsigned int *mwdma_mask,
268 unsigned int *udma_mask)
269 {
270 if (pio_mask)
271 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
272 if (mwdma_mask)
273 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
274 if (udma_mask)
275 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
276 }
277
278 static const struct ata_xfer_ent {
279 unsigned int shift, bits;
280 u8 base;
281 } ata_xfer_tbl[] = {
282 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
283 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
284 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
285 { -1, },
286 };
287
288 /**
289 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
290 * @xfer_mask: xfer_mask of interest
291 *
292 * Return matching XFER_* value for @xfer_mask. Only the highest
293 * bit of @xfer_mask is considered.
294 *
295 * LOCKING:
296 * None.
297 *
298 * RETURNS:
299 * Matching XFER_* value, 0 if no match found.
300 */
301 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
302 {
303 int highbit = fls(xfer_mask) - 1;
304 const struct ata_xfer_ent *ent;
305
306 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
307 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
308 return ent->base + highbit - ent->shift;
309 return 0;
310 }
311
312 /**
313 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
314 * @xfer_mode: XFER_* of interest
315 *
316 * Return matching xfer_mask for @xfer_mode.
317 *
318 * LOCKING:
319 * None.
320 *
321 * RETURNS:
322 * Matching xfer_mask, 0 if no match found.
323 */
324 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
325 {
326 const struct ata_xfer_ent *ent;
327
328 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
329 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
330 return 1 << (ent->shift + xfer_mode - ent->base);
331 return 0;
332 }
333
334 /**
335 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
336 * @xfer_mode: XFER_* of interest
337 *
338 * Return matching xfer_shift for @xfer_mode.
339 *
340 * LOCKING:
341 * None.
342 *
343 * RETURNS:
344 * Matching xfer_shift, -1 if no match found.
345 */
346 static int ata_xfer_mode2shift(unsigned int xfer_mode)
347 {
348 const struct ata_xfer_ent *ent;
349
350 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
351 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
352 return ent->shift;
353 return -1;
354 }
355
356 /**
357 * ata_mode_string - convert xfer_mask to string
358 * @xfer_mask: mask of bits supported; only highest bit counts.
359 *
360 * Determine string which represents the highest speed
361 * (highest bit in @modemask).
362 *
363 * LOCKING:
364 * None.
365 *
366 * RETURNS:
367 * Constant C string representing highest speed listed in
368 * @mode_mask, or the constant C string "<n/a>".
369 */
370 static const char *ata_mode_string(unsigned int xfer_mask)
371 {
372 static const char * const xfer_mode_str[] = {
373 "PIO0",
374 "PIO1",
375 "PIO2",
376 "PIO3",
377 "PIO4",
378 "MWDMA0",
379 "MWDMA1",
380 "MWDMA2",
381 "UDMA/16",
382 "UDMA/25",
383 "UDMA/33",
384 "UDMA/44",
385 "UDMA/66",
386 "UDMA/100",
387 "UDMA/133",
388 "UDMA7",
389 };
390 int highbit;
391
392 highbit = fls(xfer_mask) - 1;
393 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
394 return xfer_mode_str[highbit];
395 return "<n/a>";
396 }
397
398 static void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
399 {
400 if (ata_dev_present(dev)) {
401 printk(KERN_WARNING "ata%u: dev %u disabled\n",
402 ap->id, dev->devno);
403 dev->class++;
404 }
405 }
406
407 /**
408 * ata_pio_devchk - PATA device presence detection
409 * @ap: ATA channel to examine
410 * @device: Device to examine (starting at zero)
411 *
412 * This technique was originally described in
413 * Hale Landis's ATADRVR (www.ata-atapi.com), and
414 * later found its way into the ATA/ATAPI spec.
415 *
416 * Write a pattern to the ATA shadow registers,
417 * and if a device is present, it will respond by
418 * correctly storing and echoing back the
419 * ATA shadow register contents.
420 *
421 * LOCKING:
422 * caller.
423 */
424
425 static unsigned int ata_pio_devchk(struct ata_port *ap,
426 unsigned int device)
427 {
428 struct ata_ioports *ioaddr = &ap->ioaddr;
429 u8 nsect, lbal;
430
431 ap->ops->dev_select(ap, device);
432
433 outb(0x55, ioaddr->nsect_addr);
434 outb(0xaa, ioaddr->lbal_addr);
435
436 outb(0xaa, ioaddr->nsect_addr);
437 outb(0x55, ioaddr->lbal_addr);
438
439 outb(0x55, ioaddr->nsect_addr);
440 outb(0xaa, ioaddr->lbal_addr);
441
442 nsect = inb(ioaddr->nsect_addr);
443 lbal = inb(ioaddr->lbal_addr);
444
445 if ((nsect == 0x55) && (lbal == 0xaa))
446 return 1; /* we found a device */
447
448 return 0; /* nothing found */
449 }
450
451 /**
452 * ata_mmio_devchk - PATA device presence detection
453 * @ap: ATA channel to examine
454 * @device: Device to examine (starting at zero)
455 *
456 * This technique was originally described in
457 * Hale Landis's ATADRVR (www.ata-atapi.com), and
458 * later found its way into the ATA/ATAPI spec.
459 *
460 * Write a pattern to the ATA shadow registers,
461 * and if a device is present, it will respond by
462 * correctly storing and echoing back the
463 * ATA shadow register contents.
464 *
465 * LOCKING:
466 * caller.
467 */
468
469 static unsigned int ata_mmio_devchk(struct ata_port *ap,
470 unsigned int device)
471 {
472 struct ata_ioports *ioaddr = &ap->ioaddr;
473 u8 nsect, lbal;
474
475 ap->ops->dev_select(ap, device);
476
477 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
478 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
479
480 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
481 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
482
483 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
484 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
485
486 nsect = readb((void __iomem *) ioaddr->nsect_addr);
487 lbal = readb((void __iomem *) ioaddr->lbal_addr);
488
489 if ((nsect == 0x55) && (lbal == 0xaa))
490 return 1; /* we found a device */
491
492 return 0; /* nothing found */
493 }
494
495 /**
496 * ata_devchk - PATA device presence detection
497 * @ap: ATA channel to examine
498 * @device: Device to examine (starting at zero)
499 *
500 * Dispatch ATA device presence detection, depending
501 * on whether we are using PIO or MMIO to talk to the
502 * ATA shadow registers.
503 *
504 * LOCKING:
505 * caller.
506 */
507
508 static unsigned int ata_devchk(struct ata_port *ap,
509 unsigned int device)
510 {
511 if (ap->flags & ATA_FLAG_MMIO)
512 return ata_mmio_devchk(ap, device);
513 return ata_pio_devchk(ap, device);
514 }
515
516 /**
517 * ata_dev_classify - determine device type based on ATA-spec signature
518 * @tf: ATA taskfile register set for device to be identified
519 *
520 * Determine from taskfile register contents whether a device is
521 * ATA or ATAPI, as per "Signature and persistence" section
522 * of ATA/PI spec (volume 1, sect 5.14).
523 *
524 * LOCKING:
525 * None.
526 *
527 * RETURNS:
528 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
529 * the event of failure.
530 */
531
532 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
533 {
534 /* Apple's open source Darwin code hints that some devices only
535 * put a proper signature into the LBA mid/high registers,
536 * So, we only check those. It's sufficient for uniqueness.
537 */
538
539 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
540 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
541 DPRINTK("found ATA device by sig\n");
542 return ATA_DEV_ATA;
543 }
544
545 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
546 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
547 DPRINTK("found ATAPI device by sig\n");
548 return ATA_DEV_ATAPI;
549 }
550
551 DPRINTK("unknown device\n");
552 return ATA_DEV_UNKNOWN;
553 }
554
555 /**
556 * ata_dev_try_classify - Parse returned ATA device signature
557 * @ap: ATA channel to examine
558 * @device: Device to examine (starting at zero)
559 * @r_err: Value of error register on completion
560 *
561 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
562 * an ATA/ATAPI-defined set of values is placed in the ATA
563 * shadow registers, indicating the results of device detection
564 * and diagnostics.
565 *
566 * Select the ATA device, and read the values from the ATA shadow
567 * registers. Then parse according to the Error register value,
568 * and the spec-defined values examined by ata_dev_classify().
569 *
570 * LOCKING:
571 * caller.
572 *
573 * RETURNS:
574 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
575 */
576
577 static unsigned int
578 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
579 {
580 struct ata_taskfile tf;
581 unsigned int class;
582 u8 err;
583
584 ap->ops->dev_select(ap, device);
585
586 memset(&tf, 0, sizeof(tf));
587
588 ap->ops->tf_read(ap, &tf);
589 err = tf.feature;
590 if (r_err)
591 *r_err = err;
592
593 /* see if device passed diags */
594 if (err == 1)
595 /* do nothing */ ;
596 else if ((device == 0) && (err == 0x81))
597 /* do nothing */ ;
598 else
599 return ATA_DEV_NONE;
600
601 /* determine if device is ATA or ATAPI */
602 class = ata_dev_classify(&tf);
603
604 if (class == ATA_DEV_UNKNOWN)
605 return ATA_DEV_NONE;
606 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
607 return ATA_DEV_NONE;
608 return class;
609 }
610
611 /**
612 * ata_id_string - Convert IDENTIFY DEVICE page into string
613 * @id: IDENTIFY DEVICE results we will examine
614 * @s: string into which data is output
615 * @ofs: offset into identify device page
616 * @len: length of string to return. must be an even number.
617 *
618 * The strings in the IDENTIFY DEVICE page are broken up into
619 * 16-bit chunks. Run through the string, and output each
620 * 8-bit chunk linearly, regardless of platform.
621 *
622 * LOCKING:
623 * caller.
624 */
625
626 void ata_id_string(const u16 *id, unsigned char *s,
627 unsigned int ofs, unsigned int len)
628 {
629 unsigned int c;
630
631 while (len > 0) {
632 c = id[ofs] >> 8;
633 *s = c;
634 s++;
635
636 c = id[ofs] & 0xff;
637 *s = c;
638 s++;
639
640 ofs++;
641 len -= 2;
642 }
643 }
644
645 /**
646 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
647 * @id: IDENTIFY DEVICE results we will examine
648 * @s: string into which data is output
649 * @ofs: offset into identify device page
650 * @len: length of string to return. must be an odd number.
651 *
652 * This function is identical to ata_id_string except that it
653 * trims trailing spaces and terminates the resulting string with
654 * null. @len must be actual maximum length (even number) + 1.
655 *
656 * LOCKING:
657 * caller.
658 */
659 void ata_id_c_string(const u16 *id, unsigned char *s,
660 unsigned int ofs, unsigned int len)
661 {
662 unsigned char *p;
663
664 WARN_ON(!(len & 1));
665
666 ata_id_string(id, s, ofs, len - 1);
667
668 p = s + strnlen(s, len - 1);
669 while (p > s && p[-1] == ' ')
670 p--;
671 *p = '\0';
672 }
673
674 static u64 ata_id_n_sectors(const u16 *id)
675 {
676 if (ata_id_has_lba(id)) {
677 if (ata_id_has_lba48(id))
678 return ata_id_u64(id, 100);
679 else
680 return ata_id_u32(id, 60);
681 } else {
682 if (ata_id_current_chs_valid(id))
683 return ata_id_u32(id, 57);
684 else
685 return id[1] * id[3] * id[6];
686 }
687 }
688
689 /**
690 * ata_noop_dev_select - Select device 0/1 on ATA bus
691 * @ap: ATA channel to manipulate
692 * @device: ATA device (numbered from zero) to select
693 *
694 * This function performs no actual function.
695 *
696 * May be used as the dev_select() entry in ata_port_operations.
697 *
698 * LOCKING:
699 * caller.
700 */
701 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
702 {
703 }
704
705
706 /**
707 * ata_std_dev_select - Select device 0/1 on ATA bus
708 * @ap: ATA channel to manipulate
709 * @device: ATA device (numbered from zero) to select
710 *
711 * Use the method defined in the ATA specification to
712 * make either device 0, or device 1, active on the
713 * ATA channel. Works with both PIO and MMIO.
714 *
715 * May be used as the dev_select() entry in ata_port_operations.
716 *
717 * LOCKING:
718 * caller.
719 */
720
721 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
722 {
723 u8 tmp;
724
725 if (device == 0)
726 tmp = ATA_DEVICE_OBS;
727 else
728 tmp = ATA_DEVICE_OBS | ATA_DEV1;
729
730 if (ap->flags & ATA_FLAG_MMIO) {
731 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
732 } else {
733 outb(tmp, ap->ioaddr.device_addr);
734 }
735 ata_pause(ap); /* needed; also flushes, for mmio */
736 }
737
738 /**
739 * ata_dev_select - Select device 0/1 on ATA bus
740 * @ap: ATA channel to manipulate
741 * @device: ATA device (numbered from zero) to select
742 * @wait: non-zero to wait for Status register BSY bit to clear
743 * @can_sleep: non-zero if context allows sleeping
744 *
745 * Use the method defined in the ATA specification to
746 * make either device 0, or device 1, active on the
747 * ATA channel.
748 *
749 * This is a high-level version of ata_std_dev_select(),
750 * which additionally provides the services of inserting
751 * the proper pauses and status polling, where needed.
752 *
753 * LOCKING:
754 * caller.
755 */
756
757 void ata_dev_select(struct ata_port *ap, unsigned int device,
758 unsigned int wait, unsigned int can_sleep)
759 {
760 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
761 ap->id, device, wait);
762
763 if (wait)
764 ata_wait_idle(ap);
765
766 ap->ops->dev_select(ap, device);
767
768 if (wait) {
769 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
770 msleep(150);
771 ata_wait_idle(ap);
772 }
773 }
774
775 /**
776 * ata_dump_id - IDENTIFY DEVICE info debugging output
777 * @id: IDENTIFY DEVICE page to dump
778 *
779 * Dump selected 16-bit words from the given IDENTIFY DEVICE
780 * page.
781 *
782 * LOCKING:
783 * caller.
784 */
785
786 static inline void ata_dump_id(const u16 *id)
787 {
788 DPRINTK("49==0x%04x "
789 "53==0x%04x "
790 "63==0x%04x "
791 "64==0x%04x "
792 "75==0x%04x \n",
793 id[49],
794 id[53],
795 id[63],
796 id[64],
797 id[75]);
798 DPRINTK("80==0x%04x "
799 "81==0x%04x "
800 "82==0x%04x "
801 "83==0x%04x "
802 "84==0x%04x \n",
803 id[80],
804 id[81],
805 id[82],
806 id[83],
807 id[84]);
808 DPRINTK("88==0x%04x "
809 "93==0x%04x\n",
810 id[88],
811 id[93]);
812 }
813
814 /**
815 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
816 * @id: IDENTIFY data to compute xfer mask from
817 *
818 * Compute the xfermask for this device. This is not as trivial
819 * as it seems if we must consider early devices correctly.
820 *
821 * FIXME: pre IDE drive timing (do we care ?).
822 *
823 * LOCKING:
824 * None.
825 *
826 * RETURNS:
827 * Computed xfermask
828 */
829 static unsigned int ata_id_xfermask(const u16 *id)
830 {
831 unsigned int pio_mask, mwdma_mask, udma_mask;
832
833 /* Usual case. Word 53 indicates word 64 is valid */
834 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
835 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
836 pio_mask <<= 3;
837 pio_mask |= 0x7;
838 } else {
839 /* If word 64 isn't valid then Word 51 high byte holds
840 * the PIO timing number for the maximum. Turn it into
841 * a mask.
842 */
843 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
844
845 /* But wait.. there's more. Design your standards by
846 * committee and you too can get a free iordy field to
847 * process. However its the speeds not the modes that
848 * are supported... Note drivers using the timing API
849 * will get this right anyway
850 */
851 }
852
853 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
854
855 udma_mask = 0;
856 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
857 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
858
859 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
860 }
861
862 /**
863 * ata_port_queue_task - Queue port_task
864 * @ap: The ata_port to queue port_task for
865 *
866 * Schedule @fn(@data) for execution after @delay jiffies using
867 * port_task. There is one port_task per port and it's the
868 * user(low level driver)'s responsibility to make sure that only
869 * one task is active at any given time.
870 *
871 * libata core layer takes care of synchronization between
872 * port_task and EH. ata_port_queue_task() may be ignored for EH
873 * synchronization.
874 *
875 * LOCKING:
876 * Inherited from caller.
877 */
878 void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
879 unsigned long delay)
880 {
881 int rc;
882
883 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
884 return;
885
886 PREPARE_WORK(&ap->port_task, fn, data);
887
888 if (!delay)
889 rc = queue_work(ata_wq, &ap->port_task);
890 else
891 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
892
893 /* rc == 0 means that another user is using port task */
894 WARN_ON(rc == 0);
895 }
896
897 /**
898 * ata_port_flush_task - Flush port_task
899 * @ap: The ata_port to flush port_task for
900 *
901 * After this function completes, port_task is guranteed not to
902 * be running or scheduled.
903 *
904 * LOCKING:
905 * Kernel thread context (may sleep)
906 */
907 void ata_port_flush_task(struct ata_port *ap)
908 {
909 unsigned long flags;
910
911 DPRINTK("ENTER\n");
912
913 spin_lock_irqsave(&ap->host_set->lock, flags);
914 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
915 spin_unlock_irqrestore(&ap->host_set->lock, flags);
916
917 DPRINTK("flush #1\n");
918 flush_workqueue(ata_wq);
919
920 /*
921 * At this point, if a task is running, it's guaranteed to see
922 * the FLUSH flag; thus, it will never queue pio tasks again.
923 * Cancel and flush.
924 */
925 if (!cancel_delayed_work(&ap->port_task)) {
926 DPRINTK("flush #2\n");
927 flush_workqueue(ata_wq);
928 }
929
930 spin_lock_irqsave(&ap->host_set->lock, flags);
931 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
932 spin_unlock_irqrestore(&ap->host_set->lock, flags);
933
934 DPRINTK("EXIT\n");
935 }
936
937 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
938 {
939 struct completion *waiting = qc->private_data;
940
941 qc->ap->ops->tf_read(qc->ap, &qc->tf);
942 complete(waiting);
943 }
944
945 /**
946 * ata_exec_internal - execute libata internal command
947 * @ap: Port to which the command is sent
948 * @dev: Device to which the command is sent
949 * @tf: Taskfile registers for the command and the result
950 * @dma_dir: Data tranfer direction of the command
951 * @buf: Data buffer of the command
952 * @buflen: Length of data buffer
953 *
954 * Executes libata internal command with timeout. @tf contains
955 * command on entry and result on return. Timeout and error
956 * conditions are reported via return value. No recovery action
957 * is taken after a command times out. It's caller's duty to
958 * clean up after timeout.
959 *
960 * LOCKING:
961 * None. Should be called with kernel context, might sleep.
962 */
963
964 static unsigned
965 ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
966 struct ata_taskfile *tf,
967 int dma_dir, void *buf, unsigned int buflen)
968 {
969 u8 command = tf->command;
970 struct ata_queued_cmd *qc;
971 DECLARE_COMPLETION(wait);
972 unsigned long flags;
973 unsigned int err_mask;
974
975 spin_lock_irqsave(&ap->host_set->lock, flags);
976
977 qc = ata_qc_new_init(ap, dev);
978 BUG_ON(qc == NULL);
979
980 qc->tf = *tf;
981 qc->dma_dir = dma_dir;
982 if (dma_dir != DMA_NONE) {
983 ata_sg_init_one(qc, buf, buflen);
984 qc->nsect = buflen / ATA_SECT_SIZE;
985 }
986
987 qc->private_data = &wait;
988 qc->complete_fn = ata_qc_complete_internal;
989
990 qc->err_mask = ata_qc_issue(qc);
991 if (qc->err_mask)
992 ata_qc_complete(qc);
993
994 spin_unlock_irqrestore(&ap->host_set->lock, flags);
995
996 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
997 ata_port_flush_task(ap);
998
999 spin_lock_irqsave(&ap->host_set->lock, flags);
1000
1001 /* We're racing with irq here. If we lose, the
1002 * following test prevents us from completing the qc
1003 * again. If completion irq occurs after here but
1004 * before the caller cleans up, it will result in a
1005 * spurious interrupt. We can live with that.
1006 */
1007 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1008 qc->err_mask = AC_ERR_TIMEOUT;
1009 ata_qc_complete(qc);
1010 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1011 ap->id, command);
1012 }
1013
1014 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1015 }
1016
1017 *tf = qc->tf;
1018 err_mask = qc->err_mask;
1019
1020 ata_qc_free(qc);
1021
1022 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1023 * Until those drivers are fixed, we detect the condition
1024 * here, fail the command with AC_ERR_SYSTEM and reenable the
1025 * port.
1026 *
1027 * Note that this doesn't change any behavior as internal
1028 * command failure results in disabling the device in the
1029 * higher layer for LLDDs without new reset/EH callbacks.
1030 *
1031 * Kill the following code as soon as those drivers are fixed.
1032 */
1033 if (ap->flags & ATA_FLAG_PORT_DISABLED) {
1034 err_mask |= AC_ERR_SYSTEM;
1035 ata_port_probe(ap);
1036 }
1037
1038 return err_mask;
1039 }
1040
1041 /**
1042 * ata_pio_need_iordy - check if iordy needed
1043 * @adev: ATA device
1044 *
1045 * Check if the current speed of the device requires IORDY. Used
1046 * by various controllers for chip configuration.
1047 */
1048
1049 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1050 {
1051 int pio;
1052 int speed = adev->pio_mode - XFER_PIO_0;
1053
1054 if (speed < 2)
1055 return 0;
1056 if (speed > 2)
1057 return 1;
1058
1059 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1060
1061 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1062 pio = adev->id[ATA_ID_EIDE_PIO];
1063 /* Is the speed faster than the drive allows non IORDY ? */
1064 if (pio) {
1065 /* This is cycle times not frequency - watch the logic! */
1066 if (pio > 240) /* PIO2 is 240nS per cycle */
1067 return 1;
1068 return 0;
1069 }
1070 }
1071 return 0;
1072 }
1073
1074 /**
1075 * ata_dev_read_id - Read ID data from the specified device
1076 * @ap: port on which target device resides
1077 * @dev: target device
1078 * @p_class: pointer to class of the target device (may be changed)
1079 * @post_reset: is this read ID post-reset?
1080 * @p_id: read IDENTIFY page (newly allocated)
1081 *
1082 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1083 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1084 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1085 * for pre-ATA4 drives.
1086 *
1087 * LOCKING:
1088 * Kernel thread context (may sleep)
1089 *
1090 * RETURNS:
1091 * 0 on success, -errno otherwise.
1092 */
1093 static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
1094 unsigned int *p_class, int post_reset, u16 **p_id)
1095 {
1096 unsigned int class = *p_class;
1097 struct ata_taskfile tf;
1098 unsigned int err_mask = 0;
1099 u16 *id;
1100 const char *reason;
1101 int rc;
1102
1103 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1104
1105 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1106
1107 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1108 if (id == NULL) {
1109 rc = -ENOMEM;
1110 reason = "out of memory";
1111 goto err_out;
1112 }
1113
1114 retry:
1115 ata_tf_init(ap, &tf, dev->devno);
1116
1117 switch (class) {
1118 case ATA_DEV_ATA:
1119 tf.command = ATA_CMD_ID_ATA;
1120 break;
1121 case ATA_DEV_ATAPI:
1122 tf.command = ATA_CMD_ID_ATAPI;
1123 break;
1124 default:
1125 rc = -ENODEV;
1126 reason = "unsupported class";
1127 goto err_out;
1128 }
1129
1130 tf.protocol = ATA_PROT_PIO;
1131
1132 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
1133 id, sizeof(id[0]) * ATA_ID_WORDS);
1134 if (err_mask) {
1135 rc = -EIO;
1136 reason = "I/O error";
1137 goto err_out;
1138 }
1139
1140 swap_buf_le16(id, ATA_ID_WORDS);
1141
1142 /* sanity check */
1143 if ((class == ATA_DEV_ATA) != ata_id_is_ata(id)) {
1144 rc = -EINVAL;
1145 reason = "device reports illegal type";
1146 goto err_out;
1147 }
1148
1149 if (post_reset && class == ATA_DEV_ATA) {
1150 /*
1151 * The exact sequence expected by certain pre-ATA4 drives is:
1152 * SRST RESET
1153 * IDENTIFY
1154 * INITIALIZE DEVICE PARAMETERS
1155 * anything else..
1156 * Some drives were very specific about that exact sequence.
1157 */
1158 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1159 err_mask = ata_dev_init_params(ap, dev);
1160 if (err_mask) {
1161 rc = -EIO;
1162 reason = "INIT_DEV_PARAMS failed";
1163 goto err_out;
1164 }
1165
1166 /* current CHS translation info (id[53-58]) might be
1167 * changed. reread the identify device info.
1168 */
1169 post_reset = 0;
1170 goto retry;
1171 }
1172 }
1173
1174 *p_class = class;
1175 *p_id = id;
1176 return 0;
1177
1178 err_out:
1179 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1180 ap->id, dev->devno, reason);
1181 kfree(id);
1182 return rc;
1183 }
1184
1185 static inline u8 ata_dev_knobble(const struct ata_port *ap,
1186 struct ata_device *dev)
1187 {
1188 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1189 }
1190
1191 /**
1192 * ata_dev_configure - Configure the specified ATA/ATAPI device
1193 * @ap: Port on which target device resides
1194 * @dev: Target device to configure
1195 * @print_info: Enable device info printout
1196 *
1197 * Configure @dev according to @dev->id. Generic and low-level
1198 * driver specific fixups are also applied.
1199 *
1200 * LOCKING:
1201 * Kernel thread context (may sleep)
1202 *
1203 * RETURNS:
1204 * 0 on success, -errno otherwise
1205 */
1206 static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1207 int print_info)
1208 {
1209 const u16 *id = dev->id;
1210 unsigned int xfer_mask;
1211 int i, rc;
1212
1213 if (!ata_dev_present(dev)) {
1214 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1215 ap->id, dev->devno);
1216 return 0;
1217 }
1218
1219 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1220
1221 /* print device capabilities */
1222 if (print_info)
1223 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1224 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1225 ap->id, dev->devno, id[49], id[82], id[83],
1226 id[84], id[85], id[86], id[87], id[88]);
1227
1228 /* initialize to-be-configured parameters */
1229 dev->flags = 0;
1230 dev->max_sectors = 0;
1231 dev->cdb_len = 0;
1232 dev->n_sectors = 0;
1233 dev->cylinders = 0;
1234 dev->heads = 0;
1235 dev->sectors = 0;
1236
1237 /*
1238 * common ATA, ATAPI feature tests
1239 */
1240
1241 /* find max transfer mode; for printk only */
1242 xfer_mask = ata_id_xfermask(id);
1243
1244 ata_dump_id(id);
1245
1246 /* ATA-specific feature tests */
1247 if (dev->class == ATA_DEV_ATA) {
1248 dev->n_sectors = ata_id_n_sectors(id);
1249
1250 if (ata_id_has_lba(id)) {
1251 const char *lba_desc;
1252
1253 lba_desc = "LBA";
1254 dev->flags |= ATA_DFLAG_LBA;
1255 if (ata_id_has_lba48(id)) {
1256 dev->flags |= ATA_DFLAG_LBA48;
1257 lba_desc = "LBA48";
1258 }
1259
1260 /* print device info to dmesg */
1261 if (print_info)
1262 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1263 "max %s, %Lu sectors: %s\n",
1264 ap->id, dev->devno,
1265 ata_id_major_version(id),
1266 ata_mode_string(xfer_mask),
1267 (unsigned long long)dev->n_sectors,
1268 lba_desc);
1269 } else {
1270 /* CHS */
1271
1272 /* Default translation */
1273 dev->cylinders = id[1];
1274 dev->heads = id[3];
1275 dev->sectors = id[6];
1276
1277 if (ata_id_current_chs_valid(id)) {
1278 /* Current CHS translation is valid. */
1279 dev->cylinders = id[54];
1280 dev->heads = id[55];
1281 dev->sectors = id[56];
1282 }
1283
1284 /* print device info to dmesg */
1285 if (print_info)
1286 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1287 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1288 ap->id, dev->devno,
1289 ata_id_major_version(id),
1290 ata_mode_string(xfer_mask),
1291 (unsigned long long)dev->n_sectors,
1292 dev->cylinders, dev->heads, dev->sectors);
1293 }
1294
1295 if (dev->id[59] & 0x100) {
1296 dev->multi_count = dev->id[59] & 0xff;
1297 DPRINTK("ata%u: dev %u multi count %u\n",
1298 ap->id, dev->devno, dev->multi_count);
1299 }
1300
1301 dev->cdb_len = 16;
1302 }
1303
1304 /* ATAPI-specific feature tests */
1305 else if (dev->class == ATA_DEV_ATAPI) {
1306 rc = atapi_cdb_len(id);
1307 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1308 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1309 rc = -EINVAL;
1310 goto err_out_nosup;
1311 }
1312 dev->cdb_len = (unsigned int) rc;
1313
1314 if (ata_id_cdb_intr(dev->id))
1315 dev->flags |= ATA_DFLAG_CDB_INTR;
1316
1317 /* print device info to dmesg */
1318 if (print_info)
1319 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1320 ap->id, dev->devno, ata_mode_string(xfer_mask));
1321 }
1322
1323 ap->host->max_cmd_len = 0;
1324 for (i = 0; i < ATA_MAX_DEVICES; i++)
1325 ap->host->max_cmd_len = max_t(unsigned int,
1326 ap->host->max_cmd_len,
1327 ap->device[i].cdb_len);
1328
1329 /* limit bridge transfers to udma5, 200 sectors */
1330 if (ata_dev_knobble(ap, dev)) {
1331 if (print_info)
1332 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1333 ap->id, dev->devno);
1334 dev->udma_mask &= ATA_UDMA5;
1335 dev->max_sectors = ATA_MAX_SECTORS;
1336 }
1337
1338 if (ap->ops->dev_config)
1339 ap->ops->dev_config(ap, dev);
1340
1341 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1342 return 0;
1343
1344 err_out_nosup:
1345 DPRINTK("EXIT, err\n");
1346 return rc;
1347 }
1348
1349 /**
1350 * ata_bus_probe - Reset and probe ATA bus
1351 * @ap: Bus to probe
1352 *
1353 * Master ATA bus probing function. Initiates a hardware-dependent
1354 * bus reset, then attempts to identify any devices found on
1355 * the bus.
1356 *
1357 * LOCKING:
1358 * PCI/etc. bus probe sem.
1359 *
1360 * RETURNS:
1361 * Zero on success, non-zero on error.
1362 */
1363
1364 static int ata_bus_probe(struct ata_port *ap)
1365 {
1366 unsigned int classes[ATA_MAX_DEVICES];
1367 unsigned int i, rc, found = 0;
1368
1369 ata_port_probe(ap);
1370
1371 /* reset and determine device classes */
1372 for (i = 0; i < ATA_MAX_DEVICES; i++)
1373 classes[i] = ATA_DEV_UNKNOWN;
1374
1375 if (ap->ops->probe_reset) {
1376 rc = ap->ops->probe_reset(ap, classes);
1377 if (rc) {
1378 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1379 return rc;
1380 }
1381 } else {
1382 ap->ops->phy_reset(ap);
1383
1384 if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
1385 for (i = 0; i < ATA_MAX_DEVICES; i++)
1386 classes[i] = ap->device[i].class;
1387
1388 ata_port_probe(ap);
1389 }
1390
1391 for (i = 0; i < ATA_MAX_DEVICES; i++)
1392 if (classes[i] == ATA_DEV_UNKNOWN)
1393 classes[i] = ATA_DEV_NONE;
1394
1395 /* read IDENTIFY page and configure devices */
1396 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1397 struct ata_device *dev = &ap->device[i];
1398
1399 dev->class = classes[i];
1400
1401 if (!ata_dev_present(dev))
1402 continue;
1403
1404 WARN_ON(dev->id != NULL);
1405 if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) {
1406 dev->class = ATA_DEV_NONE;
1407 continue;
1408 }
1409
1410 if (ata_dev_configure(ap, dev, 1)) {
1411 ata_dev_disable(ap, dev);
1412 continue;
1413 }
1414
1415 found = 1;
1416 }
1417
1418 if (!found)
1419 goto err_out_disable;
1420
1421 ata_set_mode(ap);
1422 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1423 goto err_out_disable;
1424
1425 return 0;
1426
1427 err_out_disable:
1428 ap->ops->port_disable(ap);
1429 return -1;
1430 }
1431
1432 /**
1433 * ata_port_probe - Mark port as enabled
1434 * @ap: Port for which we indicate enablement
1435 *
1436 * Modify @ap data structure such that the system
1437 * thinks that the entire port is enabled.
1438 *
1439 * LOCKING: host_set lock, or some other form of
1440 * serialization.
1441 */
1442
1443 void ata_port_probe(struct ata_port *ap)
1444 {
1445 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1446 }
1447
1448 /**
1449 * sata_print_link_status - Print SATA link status
1450 * @ap: SATA port to printk link status about
1451 *
1452 * This function prints link speed and status of a SATA link.
1453 *
1454 * LOCKING:
1455 * None.
1456 */
1457 static void sata_print_link_status(struct ata_port *ap)
1458 {
1459 u32 sstatus, tmp;
1460 const char *speed;
1461
1462 if (!ap->ops->scr_read)
1463 return;
1464
1465 sstatus = scr_read(ap, SCR_STATUS);
1466
1467 if (sata_dev_present(ap)) {
1468 tmp = (sstatus >> 4) & 0xf;
1469 if (tmp & (1 << 0))
1470 speed = "1.5";
1471 else if (tmp & (1 << 1))
1472 speed = "3.0";
1473 else
1474 speed = "<unknown>";
1475 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1476 ap->id, speed, sstatus);
1477 } else {
1478 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1479 ap->id, sstatus);
1480 }
1481 }
1482
1483 /**
1484 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1485 * @ap: SATA port associated with target SATA PHY.
1486 *
1487 * This function issues commands to standard SATA Sxxx
1488 * PHY registers, to wake up the phy (and device), and
1489 * clear any reset condition.
1490 *
1491 * LOCKING:
1492 * PCI/etc. bus probe sem.
1493 *
1494 */
1495 void __sata_phy_reset(struct ata_port *ap)
1496 {
1497 u32 sstatus;
1498 unsigned long timeout = jiffies + (HZ * 5);
1499
1500 if (ap->flags & ATA_FLAG_SATA_RESET) {
1501 /* issue phy wake/reset */
1502 scr_write_flush(ap, SCR_CONTROL, 0x301);
1503 /* Couldn't find anything in SATA I/II specs, but
1504 * AHCI-1.1 10.4.2 says at least 1 ms. */
1505 mdelay(1);
1506 }
1507 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1508
1509 /* wait for phy to become ready, if necessary */
1510 do {
1511 msleep(200);
1512 sstatus = scr_read(ap, SCR_STATUS);
1513 if ((sstatus & 0xf) != 1)
1514 break;
1515 } while (time_before(jiffies, timeout));
1516
1517 /* print link status */
1518 sata_print_link_status(ap);
1519
1520 /* TODO: phy layer with polling, timeouts, etc. */
1521 if (sata_dev_present(ap))
1522 ata_port_probe(ap);
1523 else
1524 ata_port_disable(ap);
1525
1526 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1527 return;
1528
1529 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1530 ata_port_disable(ap);
1531 return;
1532 }
1533
1534 ap->cbl = ATA_CBL_SATA;
1535 }
1536
1537 /**
1538 * sata_phy_reset - Reset SATA bus.
1539 * @ap: SATA port associated with target SATA PHY.
1540 *
1541 * This function resets the SATA bus, and then probes
1542 * the bus for devices.
1543 *
1544 * LOCKING:
1545 * PCI/etc. bus probe sem.
1546 *
1547 */
1548 void sata_phy_reset(struct ata_port *ap)
1549 {
1550 __sata_phy_reset(ap);
1551 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1552 return;
1553 ata_bus_reset(ap);
1554 }
1555
1556 /**
1557 * ata_dev_pair - return other device on cable
1558 * @ap: port
1559 * @adev: device
1560 *
1561 * Obtain the other device on the same cable, or if none is
1562 * present NULL is returned
1563 */
1564
1565 struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1566 {
1567 struct ata_device *pair = &ap->device[1 - adev->devno];
1568 if (!ata_dev_present(pair))
1569 return NULL;
1570 return pair;
1571 }
1572
1573 /**
1574 * ata_port_disable - Disable port.
1575 * @ap: Port to be disabled.
1576 *
1577 * Modify @ap data structure such that the system
1578 * thinks that the entire port is disabled, and should
1579 * never attempt to probe or communicate with devices
1580 * on this port.
1581 *
1582 * LOCKING: host_set lock, or some other form of
1583 * serialization.
1584 */
1585
1586 void ata_port_disable(struct ata_port *ap)
1587 {
1588 ap->device[0].class = ATA_DEV_NONE;
1589 ap->device[1].class = ATA_DEV_NONE;
1590 ap->flags |= ATA_FLAG_PORT_DISABLED;
1591 }
1592
1593 /*
1594 * This mode timing computation functionality is ported over from
1595 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1596 */
1597 /*
1598 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1599 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1600 * for PIO 5, which is a nonstandard extension and UDMA6, which
1601 * is currently supported only by Maxtor drives.
1602 */
1603
1604 static const struct ata_timing ata_timing[] = {
1605
1606 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1607 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1608 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1609 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1610
1611 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1612 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1613 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1614
1615 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1616
1617 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1618 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1619 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1620
1621 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1622 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1623 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1624
1625 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1626 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1627 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1628
1629 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1630 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1631 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1632
1633 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1634
1635 { 0xFF }
1636 };
1637
1638 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1639 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1640
1641 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1642 {
1643 q->setup = EZ(t->setup * 1000, T);
1644 q->act8b = EZ(t->act8b * 1000, T);
1645 q->rec8b = EZ(t->rec8b * 1000, T);
1646 q->cyc8b = EZ(t->cyc8b * 1000, T);
1647 q->active = EZ(t->active * 1000, T);
1648 q->recover = EZ(t->recover * 1000, T);
1649 q->cycle = EZ(t->cycle * 1000, T);
1650 q->udma = EZ(t->udma * 1000, UT);
1651 }
1652
1653 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1654 struct ata_timing *m, unsigned int what)
1655 {
1656 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1657 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1658 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1659 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1660 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1661 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1662 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1663 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1664 }
1665
1666 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1667 {
1668 const struct ata_timing *t;
1669
1670 for (t = ata_timing; t->mode != speed; t++)
1671 if (t->mode == 0xFF)
1672 return NULL;
1673 return t;
1674 }
1675
1676 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1677 struct ata_timing *t, int T, int UT)
1678 {
1679 const struct ata_timing *s;
1680 struct ata_timing p;
1681
1682 /*
1683 * Find the mode.
1684 */
1685
1686 if (!(s = ata_timing_find_mode(speed)))
1687 return -EINVAL;
1688
1689 memcpy(t, s, sizeof(*s));
1690
1691 /*
1692 * If the drive is an EIDE drive, it can tell us it needs extended
1693 * PIO/MW_DMA cycle timing.
1694 */
1695
1696 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1697 memset(&p, 0, sizeof(p));
1698 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1699 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1700 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1701 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1702 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1703 }
1704 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1705 }
1706
1707 /*
1708 * Convert the timing to bus clock counts.
1709 */
1710
1711 ata_timing_quantize(t, t, T, UT);
1712
1713 /*
1714 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1715 * S.M.A.R.T * and some other commands. We have to ensure that the
1716 * DMA cycle timing is slower/equal than the fastest PIO timing.
1717 */
1718
1719 if (speed > XFER_PIO_4) {
1720 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1721 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1722 }
1723
1724 /*
1725 * Lengthen active & recovery time so that cycle time is correct.
1726 */
1727
1728 if (t->act8b + t->rec8b < t->cyc8b) {
1729 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1730 t->rec8b = t->cyc8b - t->act8b;
1731 }
1732
1733 if (t->active + t->recover < t->cycle) {
1734 t->active += (t->cycle - (t->active + t->recover)) / 2;
1735 t->recover = t->cycle - t->active;
1736 }
1737
1738 return 0;
1739 }
1740
1741 static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1742 {
1743 unsigned int err_mask;
1744 int rc;
1745
1746 if (dev->xfer_shift == ATA_SHIFT_PIO)
1747 dev->flags |= ATA_DFLAG_PIO;
1748
1749 err_mask = ata_dev_set_xfermode(ap, dev);
1750 if (err_mask) {
1751 printk(KERN_ERR
1752 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1753 ap->id, err_mask);
1754 return -EIO;
1755 }
1756
1757 rc = ata_dev_revalidate(ap, dev, 0);
1758 if (rc) {
1759 printk(KERN_ERR
1760 "ata%u: failed to revalidate after set xfermode\n",
1761 ap->id);
1762 return rc;
1763 }
1764
1765 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1766 dev->xfer_shift, (int)dev->xfer_mode);
1767
1768 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1769 ap->id, dev->devno,
1770 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
1771 return 0;
1772 }
1773
1774 static int ata_host_set_pio(struct ata_port *ap)
1775 {
1776 int i;
1777
1778 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1779 struct ata_device *dev = &ap->device[i];
1780
1781 if (!ata_dev_present(dev))
1782 continue;
1783
1784 if (!dev->pio_mode) {
1785 printk(KERN_WARNING "ata%u: no PIO support for device %d.\n", ap->id, i);
1786 return -1;
1787 }
1788
1789 dev->xfer_mode = dev->pio_mode;
1790 dev->xfer_shift = ATA_SHIFT_PIO;
1791 if (ap->ops->set_piomode)
1792 ap->ops->set_piomode(ap, dev);
1793 }
1794
1795 return 0;
1796 }
1797
1798 static void ata_host_set_dma(struct ata_port *ap)
1799 {
1800 int i;
1801
1802 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1803 struct ata_device *dev = &ap->device[i];
1804
1805 if (!ata_dev_present(dev) || !dev->dma_mode)
1806 continue;
1807
1808 dev->xfer_mode = dev->dma_mode;
1809 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
1810 if (ap->ops->set_dmamode)
1811 ap->ops->set_dmamode(ap, dev);
1812 }
1813 }
1814
1815 /**
1816 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1817 * @ap: port on which timings will be programmed
1818 *
1819 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1820 *
1821 * LOCKING:
1822 * PCI/etc. bus probe sem.
1823 */
1824 static void ata_set_mode(struct ata_port *ap)
1825 {
1826 int i, rc;
1827
1828 /* step 1: calculate xfer_mask */
1829 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1830 struct ata_device *dev = &ap->device[i];
1831 unsigned int pio_mask, dma_mask;
1832
1833 if (!ata_dev_present(dev))
1834 continue;
1835
1836 ata_dev_xfermask(ap, dev);
1837
1838 /* TODO: let LLDD filter dev->*_mask here */
1839
1840 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
1841 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
1842 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
1843 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
1844 }
1845
1846 /* step 2: always set host PIO timings */
1847 rc = ata_host_set_pio(ap);
1848 if (rc)
1849 goto err_out;
1850
1851 /* step 3: set host DMA timings */
1852 ata_host_set_dma(ap);
1853
1854 /* step 4: update devices' xfer mode */
1855 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1856 struct ata_device *dev = &ap->device[i];
1857
1858 if (!ata_dev_present(dev))
1859 continue;
1860
1861 if (ata_dev_set_mode(ap, dev))
1862 goto err_out;
1863 }
1864
1865 if (ap->ops->post_set_mode)
1866 ap->ops->post_set_mode(ap);
1867
1868 return;
1869
1870 err_out:
1871 ata_port_disable(ap);
1872 }
1873
1874 /**
1875 * ata_tf_to_host - issue ATA taskfile to host controller
1876 * @ap: port to which command is being issued
1877 * @tf: ATA taskfile register set
1878 *
1879 * Issues ATA taskfile register set to ATA host controller,
1880 * with proper synchronization with interrupt handler and
1881 * other threads.
1882 *
1883 * LOCKING:
1884 * spin_lock_irqsave(host_set lock)
1885 */
1886
1887 static inline void ata_tf_to_host(struct ata_port *ap,
1888 const struct ata_taskfile *tf)
1889 {
1890 ap->ops->tf_load(ap, tf);
1891 ap->ops->exec_command(ap, tf);
1892 }
1893
1894 /**
1895 * ata_busy_sleep - sleep until BSY clears, or timeout
1896 * @ap: port containing status register to be polled
1897 * @tmout_pat: impatience timeout
1898 * @tmout: overall timeout
1899 *
1900 * Sleep until ATA Status register bit BSY clears,
1901 * or a timeout occurs.
1902 *
1903 * LOCKING: None.
1904 */
1905
1906 unsigned int ata_busy_sleep (struct ata_port *ap,
1907 unsigned long tmout_pat, unsigned long tmout)
1908 {
1909 unsigned long timer_start, timeout;
1910 u8 status;
1911
1912 status = ata_busy_wait(ap, ATA_BUSY, 300);
1913 timer_start = jiffies;
1914 timeout = timer_start + tmout_pat;
1915 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1916 msleep(50);
1917 status = ata_busy_wait(ap, ATA_BUSY, 3);
1918 }
1919
1920 if (status & ATA_BUSY)
1921 printk(KERN_WARNING "ata%u is slow to respond, "
1922 "please be patient\n", ap->id);
1923
1924 timeout = timer_start + tmout;
1925 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1926 msleep(50);
1927 status = ata_chk_status(ap);
1928 }
1929
1930 if (status & ATA_BUSY) {
1931 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1932 ap->id, tmout / HZ);
1933 return 1;
1934 }
1935
1936 return 0;
1937 }
1938
1939 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1940 {
1941 struct ata_ioports *ioaddr = &ap->ioaddr;
1942 unsigned int dev0 = devmask & (1 << 0);
1943 unsigned int dev1 = devmask & (1 << 1);
1944 unsigned long timeout;
1945
1946 /* if device 0 was found in ata_devchk, wait for its
1947 * BSY bit to clear
1948 */
1949 if (dev0)
1950 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1951
1952 /* if device 1 was found in ata_devchk, wait for
1953 * register access, then wait for BSY to clear
1954 */
1955 timeout = jiffies + ATA_TMOUT_BOOT;
1956 while (dev1) {
1957 u8 nsect, lbal;
1958
1959 ap->ops->dev_select(ap, 1);
1960 if (ap->flags & ATA_FLAG_MMIO) {
1961 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1962 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1963 } else {
1964 nsect = inb(ioaddr->nsect_addr);
1965 lbal = inb(ioaddr->lbal_addr);
1966 }
1967 if ((nsect == 1) && (lbal == 1))
1968 break;
1969 if (time_after(jiffies, timeout)) {
1970 dev1 = 0;
1971 break;
1972 }
1973 msleep(50); /* give drive a breather */
1974 }
1975 if (dev1)
1976 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1977
1978 /* is all this really necessary? */
1979 ap->ops->dev_select(ap, 0);
1980 if (dev1)
1981 ap->ops->dev_select(ap, 1);
1982 if (dev0)
1983 ap->ops->dev_select(ap, 0);
1984 }
1985
1986 static unsigned int ata_bus_softreset(struct ata_port *ap,
1987 unsigned int devmask)
1988 {
1989 struct ata_ioports *ioaddr = &ap->ioaddr;
1990
1991 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1992
1993 /* software reset. causes dev0 to be selected */
1994 if (ap->flags & ATA_FLAG_MMIO) {
1995 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1996 udelay(20); /* FIXME: flush */
1997 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1998 udelay(20); /* FIXME: flush */
1999 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2000 } else {
2001 outb(ap->ctl, ioaddr->ctl_addr);
2002 udelay(10);
2003 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2004 udelay(10);
2005 outb(ap->ctl, ioaddr->ctl_addr);
2006 }
2007
2008 /* spec mandates ">= 2ms" before checking status.
2009 * We wait 150ms, because that was the magic delay used for
2010 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2011 * between when the ATA command register is written, and then
2012 * status is checked. Because waiting for "a while" before
2013 * checking status is fine, post SRST, we perform this magic
2014 * delay here as well.
2015 *
2016 * Old drivers/ide uses the 2mS rule and then waits for ready
2017 */
2018 msleep(150);
2019
2020
2021 /* Before we perform post reset processing we want to see if
2022 the bus shows 0xFF because the odd clown forgets the D7 pulldown
2023 resistor */
2024
2025 if (ata_check_status(ap) == 0xFF)
2026 return 1; /* Positive is failure for some reason */
2027
2028 ata_bus_post_reset(ap, devmask);
2029
2030 return 0;
2031 }
2032
2033 /**
2034 * ata_bus_reset - reset host port and associated ATA channel
2035 * @ap: port to reset
2036 *
2037 * This is typically the first time we actually start issuing
2038 * commands to the ATA channel. We wait for BSY to clear, then
2039 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2040 * result. Determine what devices, if any, are on the channel
2041 * by looking at the device 0/1 error register. Look at the signature
2042 * stored in each device's taskfile registers, to determine if
2043 * the device is ATA or ATAPI.
2044 *
2045 * LOCKING:
2046 * PCI/etc. bus probe sem.
2047 * Obtains host_set lock.
2048 *
2049 * SIDE EFFECTS:
2050 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2051 */
2052
2053 void ata_bus_reset(struct ata_port *ap)
2054 {
2055 struct ata_ioports *ioaddr = &ap->ioaddr;
2056 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2057 u8 err;
2058 unsigned int dev0, dev1 = 0, devmask = 0;
2059
2060 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2061
2062 /* determine if device 0/1 are present */
2063 if (ap->flags & ATA_FLAG_SATA_RESET)
2064 dev0 = 1;
2065 else {
2066 dev0 = ata_devchk(ap, 0);
2067 if (slave_possible)
2068 dev1 = ata_devchk(ap, 1);
2069 }
2070
2071 if (dev0)
2072 devmask |= (1 << 0);
2073 if (dev1)
2074 devmask |= (1 << 1);
2075
2076 /* select device 0 again */
2077 ap->ops->dev_select(ap, 0);
2078
2079 /* issue bus reset */
2080 if (ap->flags & ATA_FLAG_SRST)
2081 if (ata_bus_softreset(ap, devmask))
2082 goto err_out;
2083
2084 /*
2085 * determine by signature whether we have ATA or ATAPI devices
2086 */
2087 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2088 if ((slave_possible) && (err != 0x81))
2089 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2090
2091 /* re-enable interrupts */
2092 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2093 ata_irq_on(ap);
2094
2095 /* is double-select really necessary? */
2096 if (ap->device[1].class != ATA_DEV_NONE)
2097 ap->ops->dev_select(ap, 1);
2098 if (ap->device[0].class != ATA_DEV_NONE)
2099 ap->ops->dev_select(ap, 0);
2100
2101 /* if no devices were detected, disable this port */
2102 if ((ap->device[0].class == ATA_DEV_NONE) &&
2103 (ap->device[1].class == ATA_DEV_NONE))
2104 goto err_out;
2105
2106 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2107 /* set up device control for ATA_FLAG_SATA_RESET */
2108 if (ap->flags & ATA_FLAG_MMIO)
2109 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2110 else
2111 outb(ap->ctl, ioaddr->ctl_addr);
2112 }
2113
2114 DPRINTK("EXIT\n");
2115 return;
2116
2117 err_out:
2118 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2119 ap->ops->port_disable(ap);
2120
2121 DPRINTK("EXIT\n");
2122 }
2123
2124 static int sata_phy_resume(struct ata_port *ap)
2125 {
2126 unsigned long timeout = jiffies + (HZ * 5);
2127 u32 sstatus;
2128
2129 scr_write_flush(ap, SCR_CONTROL, 0x300);
2130
2131 /* Wait for phy to become ready, if necessary. */
2132 do {
2133 msleep(200);
2134 sstatus = scr_read(ap, SCR_STATUS);
2135 if ((sstatus & 0xf) != 1)
2136 return 0;
2137 } while (time_before(jiffies, timeout));
2138
2139 return -1;
2140 }
2141
2142 /**
2143 * ata_std_probeinit - initialize probing
2144 * @ap: port to be probed
2145 *
2146 * @ap is about to be probed. Initialize it. This function is
2147 * to be used as standard callback for ata_drive_probe_reset().
2148 *
2149 * NOTE!!! Do not use this function as probeinit if a low level
2150 * driver implements only hardreset. Just pass NULL as probeinit
2151 * in that case. Using this function is probably okay but doing
2152 * so makes reset sequence different from the original
2153 * ->phy_reset implementation and Jeff nervous. :-P
2154 */
2155 extern void ata_std_probeinit(struct ata_port *ap)
2156 {
2157 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
2158 sata_phy_resume(ap);
2159 if (sata_dev_present(ap))
2160 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2161 }
2162 }
2163
2164 /**
2165 * ata_std_softreset - reset host port via ATA SRST
2166 * @ap: port to reset
2167 * @verbose: fail verbosely
2168 * @classes: resulting classes of attached devices
2169 *
2170 * Reset host port using ATA SRST. This function is to be used
2171 * as standard callback for ata_drive_*_reset() functions.
2172 *
2173 * LOCKING:
2174 * Kernel thread context (may sleep)
2175 *
2176 * RETURNS:
2177 * 0 on success, -errno otherwise.
2178 */
2179 int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2180 {
2181 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2182 unsigned int devmask = 0, err_mask;
2183 u8 err;
2184
2185 DPRINTK("ENTER\n");
2186
2187 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2188 classes[0] = ATA_DEV_NONE;
2189 goto out;
2190 }
2191
2192 /* determine if device 0/1 are present */
2193 if (ata_devchk(ap, 0))
2194 devmask |= (1 << 0);
2195 if (slave_possible && ata_devchk(ap, 1))
2196 devmask |= (1 << 1);
2197
2198 /* select device 0 again */
2199 ap->ops->dev_select(ap, 0);
2200
2201 /* issue bus reset */
2202 DPRINTK("about to softreset, devmask=%x\n", devmask);
2203 err_mask = ata_bus_softreset(ap, devmask);
2204 if (err_mask) {
2205 if (verbose)
2206 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2207 ap->id, err_mask);
2208 else
2209 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2210 err_mask);
2211 return -EIO;
2212 }
2213
2214 /* determine by signature whether we have ATA or ATAPI devices */
2215 classes[0] = ata_dev_try_classify(ap, 0, &err);
2216 if (slave_possible && err != 0x81)
2217 classes[1] = ata_dev_try_classify(ap, 1, &err);
2218
2219 out:
2220 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2221 return 0;
2222 }
2223
2224 /**
2225 * sata_std_hardreset - reset host port via SATA phy reset
2226 * @ap: port to reset
2227 * @verbose: fail verbosely
2228 * @class: resulting class of attached device
2229 *
2230 * SATA phy-reset host port using DET bits of SControl register.
2231 * This function is to be used as standard callback for
2232 * ata_drive_*_reset().
2233 *
2234 * LOCKING:
2235 * Kernel thread context (may sleep)
2236 *
2237 * RETURNS:
2238 * 0 on success, -errno otherwise.
2239 */
2240 int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2241 {
2242 DPRINTK("ENTER\n");
2243
2244 /* Issue phy wake/reset */
2245 scr_write_flush(ap, SCR_CONTROL, 0x301);
2246
2247 /*
2248 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2249 * 10.4.2 says at least 1 ms.
2250 */
2251 msleep(1);
2252
2253 /* Bring phy back */
2254 sata_phy_resume(ap);
2255
2256 /* TODO: phy layer with polling, timeouts, etc. */
2257 if (!sata_dev_present(ap)) {
2258 *class = ATA_DEV_NONE;
2259 DPRINTK("EXIT, link offline\n");
2260 return 0;
2261 }
2262
2263 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2264 if (verbose)
2265 printk(KERN_ERR "ata%u: COMRESET failed "
2266 "(device not ready)\n", ap->id);
2267 else
2268 DPRINTK("EXIT, device not ready\n");
2269 return -EIO;
2270 }
2271
2272 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2273
2274 *class = ata_dev_try_classify(ap, 0, NULL);
2275
2276 DPRINTK("EXIT, class=%u\n", *class);
2277 return 0;
2278 }
2279
2280 /**
2281 * ata_std_postreset - standard postreset callback
2282 * @ap: the target ata_port
2283 * @classes: classes of attached devices
2284 *
2285 * This function is invoked after a successful reset. Note that
2286 * the device might have been reset more than once using
2287 * different reset methods before postreset is invoked.
2288 *
2289 * This function is to be used as standard callback for
2290 * ata_drive_*_reset().
2291 *
2292 * LOCKING:
2293 * Kernel thread context (may sleep)
2294 */
2295 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2296 {
2297 DPRINTK("ENTER\n");
2298
2299 /* set cable type if it isn't already set */
2300 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2301 ap->cbl = ATA_CBL_SATA;
2302
2303 /* print link status */
2304 if (ap->cbl == ATA_CBL_SATA)
2305 sata_print_link_status(ap);
2306
2307 /* re-enable interrupts */
2308 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2309 ata_irq_on(ap);
2310
2311 /* is double-select really necessary? */
2312 if (classes[0] != ATA_DEV_NONE)
2313 ap->ops->dev_select(ap, 1);
2314 if (classes[1] != ATA_DEV_NONE)
2315 ap->ops->dev_select(ap, 0);
2316
2317 /* bail out if no device is present */
2318 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2319 DPRINTK("EXIT, no device\n");
2320 return;
2321 }
2322
2323 /* set up device control */
2324 if (ap->ioaddr.ctl_addr) {
2325 if (ap->flags & ATA_FLAG_MMIO)
2326 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2327 else
2328 outb(ap->ctl, ap->ioaddr.ctl_addr);
2329 }
2330
2331 DPRINTK("EXIT\n");
2332 }
2333
2334 /**
2335 * ata_std_probe_reset - standard probe reset method
2336 * @ap: prot to perform probe-reset
2337 * @classes: resulting classes of attached devices
2338 *
2339 * The stock off-the-shelf ->probe_reset method.
2340 *
2341 * LOCKING:
2342 * Kernel thread context (may sleep)
2343 *
2344 * RETURNS:
2345 * 0 on success, -errno otherwise.
2346 */
2347 int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2348 {
2349 ata_reset_fn_t hardreset;
2350
2351 hardreset = NULL;
2352 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
2353 hardreset = sata_std_hardreset;
2354
2355 return ata_drive_probe_reset(ap, ata_std_probeinit,
2356 ata_std_softreset, hardreset,
2357 ata_std_postreset, classes);
2358 }
2359
2360 static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2361 ata_postreset_fn_t postreset,
2362 unsigned int *classes)
2363 {
2364 int i, rc;
2365
2366 for (i = 0; i < ATA_MAX_DEVICES; i++)
2367 classes[i] = ATA_DEV_UNKNOWN;
2368
2369 rc = reset(ap, 0, classes);
2370 if (rc)
2371 return rc;
2372
2373 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2374 * is complete and convert all ATA_DEV_UNKNOWN to
2375 * ATA_DEV_NONE.
2376 */
2377 for (i = 0; i < ATA_MAX_DEVICES; i++)
2378 if (classes[i] != ATA_DEV_UNKNOWN)
2379 break;
2380
2381 if (i < ATA_MAX_DEVICES)
2382 for (i = 0; i < ATA_MAX_DEVICES; i++)
2383 if (classes[i] == ATA_DEV_UNKNOWN)
2384 classes[i] = ATA_DEV_NONE;
2385
2386 if (postreset)
2387 postreset(ap, classes);
2388
2389 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2390 }
2391
2392 /**
2393 * ata_drive_probe_reset - Perform probe reset with given methods
2394 * @ap: port to reset
2395 * @probeinit: probeinit method (can be NULL)
2396 * @softreset: softreset method (can be NULL)
2397 * @hardreset: hardreset method (can be NULL)
2398 * @postreset: postreset method (can be NULL)
2399 * @classes: resulting classes of attached devices
2400 *
2401 * Reset the specified port and classify attached devices using
2402 * given methods. This function prefers softreset but tries all
2403 * possible reset sequences to reset and classify devices. This
2404 * function is intended to be used for constructing ->probe_reset
2405 * callback by low level drivers.
2406 *
2407 * Reset methods should follow the following rules.
2408 *
2409 * - Return 0 on sucess, -errno on failure.
2410 * - If classification is supported, fill classes[] with
2411 * recognized class codes.
2412 * - If classification is not supported, leave classes[] alone.
2413 * - If verbose is non-zero, print error message on failure;
2414 * otherwise, shut up.
2415 *
2416 * LOCKING:
2417 * Kernel thread context (may sleep)
2418 *
2419 * RETURNS:
2420 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2421 * if classification fails, and any error code from reset
2422 * methods.
2423 */
2424 int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
2425 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2426 ata_postreset_fn_t postreset, unsigned int *classes)
2427 {
2428 int rc = -EINVAL;
2429
2430 if (probeinit)
2431 probeinit(ap);
2432
2433 if (softreset) {
2434 rc = do_probe_reset(ap, softreset, postreset, classes);
2435 if (rc == 0)
2436 return 0;
2437 }
2438
2439 if (!hardreset)
2440 return rc;
2441
2442 rc = do_probe_reset(ap, hardreset, postreset, classes);
2443 if (rc == 0 || rc != -ENODEV)
2444 return rc;
2445
2446 if (softreset)
2447 rc = do_probe_reset(ap, softreset, postreset, classes);
2448
2449 return rc;
2450 }
2451
2452 /**
2453 * ata_dev_same_device - Determine whether new ID matches configured device
2454 * @ap: port on which the device to compare against resides
2455 * @dev: device to compare against
2456 * @new_class: class of the new device
2457 * @new_id: IDENTIFY page of the new device
2458 *
2459 * Compare @new_class and @new_id against @dev and determine
2460 * whether @dev is the device indicated by @new_class and
2461 * @new_id.
2462 *
2463 * LOCKING:
2464 * None.
2465 *
2466 * RETURNS:
2467 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2468 */
2469 static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2470 unsigned int new_class, const u16 *new_id)
2471 {
2472 const u16 *old_id = dev->id;
2473 unsigned char model[2][41], serial[2][21];
2474 u64 new_n_sectors;
2475
2476 if (dev->class != new_class) {
2477 printk(KERN_INFO
2478 "ata%u: dev %u class mismatch %d != %d\n",
2479 ap->id, dev->devno, dev->class, new_class);
2480 return 0;
2481 }
2482
2483 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2484 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2485 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2486 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2487 new_n_sectors = ata_id_n_sectors(new_id);
2488
2489 if (strcmp(model[0], model[1])) {
2490 printk(KERN_INFO
2491 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2492 ap->id, dev->devno, model[0], model[1]);
2493 return 0;
2494 }
2495
2496 if (strcmp(serial[0], serial[1])) {
2497 printk(KERN_INFO
2498 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2499 ap->id, dev->devno, serial[0], serial[1]);
2500 return 0;
2501 }
2502
2503 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2504 printk(KERN_INFO
2505 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2506 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2507 (unsigned long long)new_n_sectors);
2508 return 0;
2509 }
2510
2511 return 1;
2512 }
2513
2514 /**
2515 * ata_dev_revalidate - Revalidate ATA device
2516 * @ap: port on which the device to revalidate resides
2517 * @dev: device to revalidate
2518 * @post_reset: is this revalidation after reset?
2519 *
2520 * Re-read IDENTIFY page and make sure @dev is still attached to
2521 * the port.
2522 *
2523 * LOCKING:
2524 * Kernel thread context (may sleep)
2525 *
2526 * RETURNS:
2527 * 0 on success, negative errno otherwise
2528 */
2529 int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2530 int post_reset)
2531 {
2532 unsigned int class;
2533 u16 *id;
2534 int rc;
2535
2536 if (!ata_dev_present(dev))
2537 return -ENODEV;
2538
2539 class = dev->class;
2540 id = NULL;
2541
2542 /* allocate & read ID data */
2543 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2544 if (rc)
2545 goto fail;
2546
2547 /* is the device still there? */
2548 if (!ata_dev_same_device(ap, dev, class, id)) {
2549 rc = -ENODEV;
2550 goto fail;
2551 }
2552
2553 kfree(dev->id);
2554 dev->id = id;
2555
2556 /* configure device according to the new ID */
2557 return ata_dev_configure(ap, dev, 0);
2558
2559 fail:
2560 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2561 ap->id, dev->devno, rc);
2562 kfree(id);
2563 return rc;
2564 }
2565
2566 static const char * const ata_dma_blacklist [] = {
2567 "WDC AC11000H", NULL,
2568 "WDC AC22100H", NULL,
2569 "WDC AC32500H", NULL,
2570 "WDC AC33100H", NULL,
2571 "WDC AC31600H", NULL,
2572 "WDC AC32100H", "24.09P07",
2573 "WDC AC23200L", "21.10N21",
2574 "Compaq CRD-8241B", NULL,
2575 "CRD-8400B", NULL,
2576 "CRD-8480B", NULL,
2577 "CRD-8482B", NULL,
2578 "CRD-84", NULL,
2579 "SanDisk SDP3B", NULL,
2580 "SanDisk SDP3B-64", NULL,
2581 "SANYO CD-ROM CRD", NULL,
2582 "HITACHI CDR-8", NULL,
2583 "HITACHI CDR-8335", NULL,
2584 "HITACHI CDR-8435", NULL,
2585 "Toshiba CD-ROM XM-6202B", NULL,
2586 "TOSHIBA CD-ROM XM-1702BC", NULL,
2587 "CD-532E-A", NULL,
2588 "E-IDE CD-ROM CR-840", NULL,
2589 "CD-ROM Drive/F5A", NULL,
2590 "WPI CDD-820", NULL,
2591 "SAMSUNG CD-ROM SC-148C", NULL,
2592 "SAMSUNG CD-ROM SC", NULL,
2593 "SanDisk SDP3B-64", NULL,
2594 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2595 "_NEC DV5800A", NULL,
2596 "SAMSUNG CD-ROM SN-124", "N001"
2597 };
2598
2599 static int ata_strim(char *s, size_t len)
2600 {
2601 len = strnlen(s, len);
2602
2603 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2604 while ((len > 0) && (s[len - 1] == ' ')) {
2605 len--;
2606 s[len] = 0;
2607 }
2608 return len;
2609 }
2610
2611 static int ata_dma_blacklisted(const struct ata_device *dev)
2612 {
2613 unsigned char model_num[40];
2614 unsigned char model_rev[16];
2615 unsigned int nlen, rlen;
2616 int i;
2617
2618 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2619 sizeof(model_num));
2620 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2621 sizeof(model_rev));
2622 nlen = ata_strim(model_num, sizeof(model_num));
2623 rlen = ata_strim(model_rev, sizeof(model_rev));
2624
2625 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2626 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2627 if (ata_dma_blacklist[i+1] == NULL)
2628 return 1;
2629 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2630 return 1;
2631 }
2632 }
2633 return 0;
2634 }
2635
2636 /**
2637 * ata_dev_xfermask - Compute supported xfermask of the given device
2638 * @ap: Port on which the device to compute xfermask for resides
2639 * @dev: Device to compute xfermask for
2640 *
2641 * Compute supported xfermask of @dev and store it in
2642 * dev->*_mask. This function is responsible for applying all
2643 * known limits including host controller limits, device
2644 * blacklist, etc...
2645 *
2646 * LOCKING:
2647 * None.
2648 */
2649 static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
2650 {
2651 unsigned long xfer_mask;
2652 int i;
2653
2654 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
2655 ap->udma_mask);
2656
2657 /* use port-wide xfermask for now */
2658 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2659 struct ata_device *d = &ap->device[i];
2660 if (!ata_dev_present(d))
2661 continue;
2662 xfer_mask &= ata_pack_xfermask(d->pio_mask, d->mwdma_mask,
2663 d->udma_mask);
2664 xfer_mask &= ata_id_xfermask(d->id);
2665 if (ata_dma_blacklisted(d))
2666 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2667 }
2668
2669 if (ata_dma_blacklisted(dev))
2670 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2671 "disabling DMA\n", ap->id, dev->devno);
2672
2673 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2674 &dev->udma_mask);
2675 }
2676
2677 /**
2678 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2679 * @ap: Port associated with device @dev
2680 * @dev: Device to which command will be sent
2681 *
2682 * Issue SET FEATURES - XFER MODE command to device @dev
2683 * on port @ap.
2684 *
2685 * LOCKING:
2686 * PCI/etc. bus probe sem.
2687 *
2688 * RETURNS:
2689 * 0 on success, AC_ERR_* mask otherwise.
2690 */
2691
2692 static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2693 struct ata_device *dev)
2694 {
2695 struct ata_taskfile tf;
2696 unsigned int err_mask;
2697
2698 /* set up set-features taskfile */
2699 DPRINTK("set features - xfer mode\n");
2700
2701 ata_tf_init(ap, &tf, dev->devno);
2702 tf.command = ATA_CMD_SET_FEATURES;
2703 tf.feature = SETFEATURES_XFER;
2704 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2705 tf.protocol = ATA_PROT_NODATA;
2706 tf.nsect = dev->xfer_mode;
2707
2708 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
2709
2710 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2711 return err_mask;
2712 }
2713
2714 /**
2715 * ata_dev_init_params - Issue INIT DEV PARAMS command
2716 * @ap: Port associated with device @dev
2717 * @dev: Device to which command will be sent
2718 *
2719 * LOCKING:
2720 * Kernel thread context (may sleep)
2721 *
2722 * RETURNS:
2723 * 0 on success, AC_ERR_* mask otherwise.
2724 */
2725
2726 static unsigned int ata_dev_init_params(struct ata_port *ap,
2727 struct ata_device *dev)
2728 {
2729 struct ata_taskfile tf;
2730 unsigned int err_mask;
2731 u16 sectors = dev->id[6];
2732 u16 heads = dev->id[3];
2733
2734 /* Number of sectors per track 1-255. Number of heads 1-16 */
2735 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2736 return 0;
2737
2738 /* set up init dev params taskfile */
2739 DPRINTK("init dev params \n");
2740
2741 ata_tf_init(ap, &tf, dev->devno);
2742 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2743 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2744 tf.protocol = ATA_PROT_NODATA;
2745 tf.nsect = sectors;
2746 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2747
2748 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
2749
2750 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2751 return err_mask;
2752 }
2753
2754 /**
2755 * ata_sg_clean - Unmap DMA memory associated with command
2756 * @qc: Command containing DMA memory to be released
2757 *
2758 * Unmap all mapped DMA memory associated with this command.
2759 *
2760 * LOCKING:
2761 * spin_lock_irqsave(host_set lock)
2762 */
2763
2764 static void ata_sg_clean(struct ata_queued_cmd *qc)
2765 {
2766 struct ata_port *ap = qc->ap;
2767 struct scatterlist *sg = qc->__sg;
2768 int dir = qc->dma_dir;
2769 void *pad_buf = NULL;
2770
2771 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2772 WARN_ON(sg == NULL);
2773
2774 if (qc->flags & ATA_QCFLAG_SINGLE)
2775 WARN_ON(qc->n_elem > 1);
2776
2777 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
2778
2779 /* if we padded the buffer out to 32-bit bound, and data
2780 * xfer direction is from-device, we must copy from the
2781 * pad buffer back into the supplied buffer
2782 */
2783 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2784 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2785
2786 if (qc->flags & ATA_QCFLAG_SG) {
2787 if (qc->n_elem)
2788 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
2789 /* restore last sg */
2790 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2791 if (pad_buf) {
2792 struct scatterlist *psg = &qc->pad_sgent;
2793 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2794 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2795 kunmap_atomic(addr, KM_IRQ0);
2796 }
2797 } else {
2798 if (qc->n_elem)
2799 dma_unmap_single(ap->dev,
2800 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2801 dir);
2802 /* restore sg */
2803 sg->length += qc->pad_len;
2804 if (pad_buf)
2805 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2806 pad_buf, qc->pad_len);
2807 }
2808
2809 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2810 qc->__sg = NULL;
2811 }
2812
2813 /**
2814 * ata_fill_sg - Fill PCI IDE PRD table
2815 * @qc: Metadata associated with taskfile to be transferred
2816 *
2817 * Fill PCI IDE PRD (scatter-gather) table with segments
2818 * associated with the current disk command.
2819 *
2820 * LOCKING:
2821 * spin_lock_irqsave(host_set lock)
2822 *
2823 */
2824 static void ata_fill_sg(struct ata_queued_cmd *qc)
2825 {
2826 struct ata_port *ap = qc->ap;
2827 struct scatterlist *sg;
2828 unsigned int idx;
2829
2830 WARN_ON(qc->__sg == NULL);
2831 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
2832
2833 idx = 0;
2834 ata_for_each_sg(sg, qc) {
2835 u32 addr, offset;
2836 u32 sg_len, len;
2837
2838 /* determine if physical DMA addr spans 64K boundary.
2839 * Note h/w doesn't support 64-bit, so we unconditionally
2840 * truncate dma_addr_t to u32.
2841 */
2842 addr = (u32) sg_dma_address(sg);
2843 sg_len = sg_dma_len(sg);
2844
2845 while (sg_len) {
2846 offset = addr & 0xffff;
2847 len = sg_len;
2848 if ((offset + sg_len) > 0x10000)
2849 len = 0x10000 - offset;
2850
2851 ap->prd[idx].addr = cpu_to_le32(addr);
2852 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2853 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2854
2855 idx++;
2856 sg_len -= len;
2857 addr += len;
2858 }
2859 }
2860
2861 if (idx)
2862 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2863 }
2864 /**
2865 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2866 * @qc: Metadata associated with taskfile to check
2867 *
2868 * Allow low-level driver to filter ATA PACKET commands, returning
2869 * a status indicating whether or not it is OK to use DMA for the
2870 * supplied PACKET command.
2871 *
2872 * LOCKING:
2873 * spin_lock_irqsave(host_set lock)
2874 *
2875 * RETURNS: 0 when ATAPI DMA can be used
2876 * nonzero otherwise
2877 */
2878 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2879 {
2880 struct ata_port *ap = qc->ap;
2881 int rc = 0; /* Assume ATAPI DMA is OK by default */
2882
2883 if (ap->ops->check_atapi_dma)
2884 rc = ap->ops->check_atapi_dma(qc);
2885
2886 /* We don't support polling DMA.
2887 * Use PIO if the LLDD handles only interrupts in
2888 * the HSM_ST_LAST state and the ATAPI device
2889 * generates CDB interrupts.
2890 */
2891 if ((ap->flags & ATA_FLAG_PIO_POLLING) &&
2892 (qc->dev->flags & ATA_DFLAG_CDB_INTR))
2893 rc = 1;
2894
2895 return rc;
2896 }
2897 /**
2898 * ata_qc_prep - Prepare taskfile for submission
2899 * @qc: Metadata associated with taskfile to be prepared
2900 *
2901 * Prepare ATA taskfile for submission.
2902 *
2903 * LOCKING:
2904 * spin_lock_irqsave(host_set lock)
2905 */
2906 void ata_qc_prep(struct ata_queued_cmd *qc)
2907 {
2908 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2909 return;
2910
2911 ata_fill_sg(qc);
2912 }
2913
2914 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
2915
2916 /**
2917 * ata_sg_init_one - Associate command with memory buffer
2918 * @qc: Command to be associated
2919 * @buf: Memory buffer
2920 * @buflen: Length of memory buffer, in bytes.
2921 *
2922 * Initialize the data-related elements of queued_cmd @qc
2923 * to point to a single memory buffer, @buf of byte length @buflen.
2924 *
2925 * LOCKING:
2926 * spin_lock_irqsave(host_set lock)
2927 */
2928
2929 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2930 {
2931 struct scatterlist *sg;
2932
2933 qc->flags |= ATA_QCFLAG_SINGLE;
2934
2935 memset(&qc->sgent, 0, sizeof(qc->sgent));
2936 qc->__sg = &qc->sgent;
2937 qc->n_elem = 1;
2938 qc->orig_n_elem = 1;
2939 qc->buf_virt = buf;
2940
2941 sg = qc->__sg;
2942 sg_init_one(sg, buf, buflen);
2943 }
2944
2945 /**
2946 * ata_sg_init - Associate command with scatter-gather table.
2947 * @qc: Command to be associated
2948 * @sg: Scatter-gather table.
2949 * @n_elem: Number of elements in s/g table.
2950 *
2951 * Initialize the data-related elements of queued_cmd @qc
2952 * to point to a scatter-gather table @sg, containing @n_elem
2953 * elements.
2954 *
2955 * LOCKING:
2956 * spin_lock_irqsave(host_set lock)
2957 */
2958
2959 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2960 unsigned int n_elem)
2961 {
2962 qc->flags |= ATA_QCFLAG_SG;
2963 qc->__sg = sg;
2964 qc->n_elem = n_elem;
2965 qc->orig_n_elem = n_elem;
2966 }
2967
2968 /**
2969 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2970 * @qc: Command with memory buffer to be mapped.
2971 *
2972 * DMA-map the memory buffer associated with queued_cmd @qc.
2973 *
2974 * LOCKING:
2975 * spin_lock_irqsave(host_set lock)
2976 *
2977 * RETURNS:
2978 * Zero on success, negative on error.
2979 */
2980
2981 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2982 {
2983 struct ata_port *ap = qc->ap;
2984 int dir = qc->dma_dir;
2985 struct scatterlist *sg = qc->__sg;
2986 dma_addr_t dma_address;
2987 int trim_sg = 0;
2988
2989 /* we must lengthen transfers to end on a 32-bit boundary */
2990 qc->pad_len = sg->length & 3;
2991 if (qc->pad_len) {
2992 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2993 struct scatterlist *psg = &qc->pad_sgent;
2994
2995 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
2996
2997 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2998
2999 if (qc->tf.flags & ATA_TFLAG_WRITE)
3000 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3001 qc->pad_len);
3002
3003 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3004 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3005 /* trim sg */
3006 sg->length -= qc->pad_len;
3007 if (sg->length == 0)
3008 trim_sg = 1;
3009
3010 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3011 sg->length, qc->pad_len);
3012 }
3013
3014 if (trim_sg) {
3015 qc->n_elem--;
3016 goto skip_map;
3017 }
3018
3019 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3020 sg->length, dir);
3021 if (dma_mapping_error(dma_address)) {
3022 /* restore sg */
3023 sg->length += qc->pad_len;
3024 return -1;
3025 }
3026
3027 sg_dma_address(sg) = dma_address;
3028 sg_dma_len(sg) = sg->length;
3029
3030 skip_map:
3031 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3032 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3033
3034 return 0;
3035 }
3036
3037 /**
3038 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3039 * @qc: Command with scatter-gather table to be mapped.
3040 *
3041 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3042 *
3043 * LOCKING:
3044 * spin_lock_irqsave(host_set lock)
3045 *
3046 * RETURNS:
3047 * Zero on success, negative on error.
3048 *
3049 */
3050
3051 static int ata_sg_setup(struct ata_queued_cmd *qc)
3052 {
3053 struct ata_port *ap = qc->ap;
3054 struct scatterlist *sg = qc->__sg;
3055 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3056 int n_elem, pre_n_elem, dir, trim_sg = 0;
3057
3058 VPRINTK("ENTER, ata%u\n", ap->id);
3059 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3060
3061 /* we must lengthen transfers to end on a 32-bit boundary */
3062 qc->pad_len = lsg->length & 3;
3063 if (qc->pad_len) {
3064 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3065 struct scatterlist *psg = &qc->pad_sgent;
3066 unsigned int offset;
3067
3068 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3069
3070 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3071
3072 /*
3073 * psg->page/offset are used to copy to-be-written
3074 * data in this function or read data in ata_sg_clean.
3075 */
3076 offset = lsg->offset + lsg->length - qc->pad_len;
3077 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3078 psg->offset = offset_in_page(offset);
3079
3080 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3081 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3082 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3083 kunmap_atomic(addr, KM_IRQ0);
3084 }
3085
3086 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3087 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3088 /* trim last sg */
3089 lsg->length -= qc->pad_len;
3090 if (lsg->length == 0)
3091 trim_sg = 1;
3092
3093 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3094 qc->n_elem - 1, lsg->length, qc->pad_len);
3095 }
3096
3097 pre_n_elem = qc->n_elem;
3098 if (trim_sg && pre_n_elem)
3099 pre_n_elem--;
3100
3101 if (!pre_n_elem) {
3102 n_elem = 0;
3103 goto skip_map;
3104 }
3105
3106 dir = qc->dma_dir;
3107 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3108 if (n_elem < 1) {
3109 /* restore last sg */
3110 lsg->length += qc->pad_len;
3111 return -1;
3112 }
3113
3114 DPRINTK("%d sg elements mapped\n", n_elem);
3115
3116 skip_map:
3117 qc->n_elem = n_elem;
3118
3119 return 0;
3120 }
3121
3122 /**
3123 * ata_poll_qc_complete - turn irq back on and finish qc
3124 * @qc: Command to complete
3125 * @err_mask: ATA status register content
3126 *
3127 * LOCKING:
3128 * None. (grabs host lock)
3129 */
3130
3131 void ata_poll_qc_complete(struct ata_queued_cmd *qc)
3132 {
3133 struct ata_port *ap = qc->ap;
3134 unsigned long flags;
3135
3136 spin_lock_irqsave(&ap->host_set->lock, flags);
3137 ata_irq_on(ap);
3138 ata_qc_complete(qc);
3139 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3140 }
3141
3142 /**
3143 * swap_buf_le16 - swap halves of 16-bit words in place
3144 * @buf: Buffer to swap
3145 * @buf_words: Number of 16-bit words in buffer.
3146 *
3147 * Swap halves of 16-bit words if needed to convert from
3148 * little-endian byte order to native cpu byte order, or
3149 * vice-versa.
3150 *
3151 * LOCKING:
3152 * Inherited from caller.
3153 */
3154 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3155 {
3156 #ifdef __BIG_ENDIAN
3157 unsigned int i;
3158
3159 for (i = 0; i < buf_words; i++)
3160 buf[i] = le16_to_cpu(buf[i]);
3161 #endif /* __BIG_ENDIAN */
3162 }
3163
3164 /**
3165 * ata_mmio_data_xfer - Transfer data by MMIO
3166 * @ap: port to read/write
3167 * @buf: data buffer
3168 * @buflen: buffer length
3169 * @write_data: read/write
3170 *
3171 * Transfer data from/to the device data register by MMIO.
3172 *
3173 * LOCKING:
3174 * Inherited from caller.
3175 */
3176
3177 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3178 unsigned int buflen, int write_data)
3179 {
3180 unsigned int i;
3181 unsigned int words = buflen >> 1;
3182 u16 *buf16 = (u16 *) buf;
3183 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3184
3185 /* Transfer multiple of 2 bytes */
3186 if (write_data) {
3187 for (i = 0; i < words; i++)
3188 writew(le16_to_cpu(buf16[i]), mmio);
3189 } else {
3190 for (i = 0; i < words; i++)
3191 buf16[i] = cpu_to_le16(readw(mmio));
3192 }
3193
3194 /* Transfer trailing 1 byte, if any. */
3195 if (unlikely(buflen & 0x01)) {
3196 u16 align_buf[1] = { 0 };
3197 unsigned char *trailing_buf = buf + buflen - 1;
3198
3199 if (write_data) {
3200 memcpy(align_buf, trailing_buf, 1);
3201 writew(le16_to_cpu(align_buf[0]), mmio);
3202 } else {
3203 align_buf[0] = cpu_to_le16(readw(mmio));
3204 memcpy(trailing_buf, align_buf, 1);
3205 }
3206 }
3207 }
3208
3209 /**
3210 * ata_pio_data_xfer - Transfer data by PIO
3211 * @ap: port to read/write
3212 * @buf: data buffer
3213 * @buflen: buffer length
3214 * @write_data: read/write
3215 *
3216 * Transfer data from/to the device data register by PIO.
3217 *
3218 * LOCKING:
3219 * Inherited from caller.
3220 */
3221
3222 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3223 unsigned int buflen, int write_data)
3224 {
3225 unsigned int words = buflen >> 1;
3226
3227 /* Transfer multiple of 2 bytes */
3228 if (write_data)
3229 outsw(ap->ioaddr.data_addr, buf, words);
3230 else
3231 insw(ap->ioaddr.data_addr, buf, words);
3232
3233 /* Transfer trailing 1 byte, if any. */
3234 if (unlikely(buflen & 0x01)) {
3235 u16 align_buf[1] = { 0 };
3236 unsigned char *trailing_buf = buf + buflen - 1;
3237
3238 if (write_data) {
3239 memcpy(align_buf, trailing_buf, 1);
3240 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3241 } else {
3242 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3243 memcpy(trailing_buf, align_buf, 1);
3244 }
3245 }
3246 }
3247
3248 /**
3249 * ata_data_xfer - Transfer data from/to the data register.
3250 * @ap: port to read/write
3251 * @buf: data buffer
3252 * @buflen: buffer length
3253 * @do_write: read/write
3254 *
3255 * Transfer data from/to the device data register.
3256 *
3257 * LOCKING:
3258 * Inherited from caller.
3259 */
3260
3261 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3262 unsigned int buflen, int do_write)
3263 {
3264 /* Make the crap hardware pay the costs not the good stuff */
3265 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3266 unsigned long flags;
3267 local_irq_save(flags);
3268 if (ap->flags & ATA_FLAG_MMIO)
3269 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3270 else
3271 ata_pio_data_xfer(ap, buf, buflen, do_write);
3272 local_irq_restore(flags);
3273 } else {
3274 if (ap->flags & ATA_FLAG_MMIO)
3275 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3276 else
3277 ata_pio_data_xfer(ap, buf, buflen, do_write);
3278 }
3279 }
3280
3281 /**
3282 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3283 * @qc: Command on going
3284 *
3285 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3286 *
3287 * LOCKING:
3288 * Inherited from caller.
3289 */
3290
3291 static void ata_pio_sector(struct ata_queued_cmd *qc)
3292 {
3293 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3294 struct scatterlist *sg = qc->__sg;
3295 struct ata_port *ap = qc->ap;
3296 struct page *page;
3297 unsigned int offset;
3298 unsigned char *buf;
3299
3300 if (qc->cursect == (qc->nsect - 1))
3301 ap->hsm_task_state = HSM_ST_LAST;
3302
3303 page = sg[qc->cursg].page;
3304 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3305
3306 /* get the current page and offset */
3307 page = nth_page(page, (offset >> PAGE_SHIFT));
3308 offset %= PAGE_SIZE;
3309
3310 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3311
3312 if (PageHighMem(page)) {
3313 unsigned long flags;
3314
3315 local_irq_save(flags);
3316 buf = kmap_atomic(page, KM_IRQ0);
3317
3318 /* do the actual data transfer */
3319 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
3320
3321 kunmap_atomic(buf, KM_IRQ0);
3322 local_irq_restore(flags);
3323 } else {
3324 buf = page_address(page);
3325 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
3326 }
3327
3328 qc->cursect++;
3329 qc->cursg_ofs++;
3330
3331 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3332 qc->cursg++;
3333 qc->cursg_ofs = 0;
3334 }
3335 }
3336
3337 /**
3338 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3339 * @qc: Command on going
3340 *
3341 * Transfer one or many ATA_SECT_SIZE of data from/to the
3342 * ATA device for the DRQ request.
3343 *
3344 * LOCKING:
3345 * Inherited from caller.
3346 */
3347
3348 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3349 {
3350 if (is_multi_taskfile(&qc->tf)) {
3351 /* READ/WRITE MULTIPLE */
3352 unsigned int nsect;
3353
3354 WARN_ON(qc->dev->multi_count == 0);
3355
3356 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3357 while (nsect--)
3358 ata_pio_sector(qc);
3359 } else
3360 ata_pio_sector(qc);
3361 }
3362
3363 /**
3364 * atapi_send_cdb - Write CDB bytes to hardware
3365 * @ap: Port to which ATAPI device is attached.
3366 * @qc: Taskfile currently active
3367 *
3368 * When device has indicated its readiness to accept
3369 * a CDB, this function is called. Send the CDB.
3370 *
3371 * LOCKING:
3372 * caller.
3373 */
3374
3375 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3376 {
3377 /* send SCSI cdb */
3378 DPRINTK("send cdb\n");
3379 WARN_ON(qc->dev->cdb_len < 12);
3380
3381 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3382 ata_altstatus(ap); /* flush */
3383
3384 switch (qc->tf.protocol) {
3385 case ATA_PROT_ATAPI:
3386 ap->hsm_task_state = HSM_ST;
3387 break;
3388 case ATA_PROT_ATAPI_NODATA:
3389 ap->hsm_task_state = HSM_ST_LAST;
3390 break;
3391 case ATA_PROT_ATAPI_DMA:
3392 ap->hsm_task_state = HSM_ST_LAST;
3393 /* initiate bmdma */
3394 ap->ops->bmdma_start(qc);
3395 break;
3396 }
3397 }
3398
3399 /**
3400 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3401 * @qc: Command on going
3402 * @bytes: number of bytes
3403 *
3404 * Transfer Transfer data from/to the ATAPI device.
3405 *
3406 * LOCKING:
3407 * Inherited from caller.
3408 *
3409 */
3410
3411 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3412 {
3413 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3414 struct scatterlist *sg = qc->__sg;
3415 struct ata_port *ap = qc->ap;
3416 struct page *page;
3417 unsigned char *buf;
3418 unsigned int offset, count;
3419
3420 if (qc->curbytes + bytes >= qc->nbytes)
3421 ap->hsm_task_state = HSM_ST_LAST;
3422
3423 next_sg:
3424 if (unlikely(qc->cursg >= qc->n_elem)) {
3425 /*
3426 * The end of qc->sg is reached and the device expects
3427 * more data to transfer. In order not to overrun qc->sg
3428 * and fulfill length specified in the byte count register,
3429 * - for read case, discard trailing data from the device
3430 * - for write case, padding zero data to the device
3431 */
3432 u16 pad_buf[1] = { 0 };
3433 unsigned int words = bytes >> 1;
3434 unsigned int i;
3435
3436 if (words) /* warning if bytes > 1 */
3437 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3438 ap->id, bytes);
3439
3440 for (i = 0; i < words; i++)
3441 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3442
3443 ap->hsm_task_state = HSM_ST_LAST;
3444 return;
3445 }
3446
3447 sg = &qc->__sg[qc->cursg];
3448
3449 page = sg->page;
3450 offset = sg->offset + qc->cursg_ofs;
3451
3452 /* get the current page and offset */
3453 page = nth_page(page, (offset >> PAGE_SHIFT));
3454 offset %= PAGE_SIZE;
3455
3456 /* don't overrun current sg */
3457 count = min(sg->length - qc->cursg_ofs, bytes);
3458
3459 /* don't cross page boundaries */
3460 count = min(count, (unsigned int)PAGE_SIZE - offset);
3461
3462 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3463
3464 if (PageHighMem(page)) {
3465 unsigned long flags;
3466
3467 local_irq_save(flags);
3468 buf = kmap_atomic(page, KM_IRQ0);
3469
3470 /* do the actual data transfer */
3471 ata_data_xfer(ap, buf + offset, count, do_write);
3472
3473 kunmap_atomic(buf, KM_IRQ0);
3474 local_irq_restore(flags);
3475 } else {
3476 buf = page_address(page);
3477 ata_data_xfer(ap, buf + offset, count, do_write);
3478 }
3479
3480 bytes -= count;
3481 qc->curbytes += count;
3482 qc->cursg_ofs += count;
3483
3484 if (qc->cursg_ofs == sg->length) {
3485 qc->cursg++;
3486 qc->cursg_ofs = 0;
3487 }
3488
3489 if (bytes)
3490 goto next_sg;
3491 }
3492
3493 /**
3494 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3495 * @qc: Command on going
3496 *
3497 * Transfer Transfer data from/to the ATAPI device.
3498 *
3499 * LOCKING:
3500 * Inherited from caller.
3501 */
3502
3503 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3504 {
3505 struct ata_port *ap = qc->ap;
3506 struct ata_device *dev = qc->dev;
3507 unsigned int ireason, bc_lo, bc_hi, bytes;
3508 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3509
3510 ap->ops->tf_read(ap, &qc->tf);
3511 ireason = qc->tf.nsect;
3512 bc_lo = qc->tf.lbam;
3513 bc_hi = qc->tf.lbah;
3514 bytes = (bc_hi << 8) | bc_lo;
3515
3516 /* shall be cleared to zero, indicating xfer of data */
3517 if (ireason & (1 << 0))
3518 goto err_out;
3519
3520 /* make sure transfer direction matches expected */
3521 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3522 if (do_write != i_write)
3523 goto err_out;
3524
3525 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3526
3527 __atapi_pio_bytes(qc, bytes);
3528
3529 return;
3530
3531 err_out:
3532 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3533 ap->id, dev->devno);
3534 qc->err_mask |= AC_ERR_HSM;
3535 ap->hsm_task_state = HSM_ST_ERR;
3536 }
3537
3538 /**
3539 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
3540 * @ap: the target ata_port
3541 * @qc: qc on going
3542 *
3543 * RETURNS:
3544 * 1 if ok in workqueue, 0 otherwise.
3545 */
3546
3547 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
3548 {
3549 if (qc->tf.flags & ATA_TFLAG_POLLING)
3550 return 1;
3551
3552 if (ap->hsm_task_state == HSM_ST_FIRST) {
3553 if (qc->tf.protocol == ATA_PROT_PIO &&
3554 (qc->tf.flags & ATA_TFLAG_WRITE))
3555 return 1;
3556
3557 if (is_atapi_taskfile(&qc->tf) &&
3558 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
3559 return 1;
3560 }
3561
3562 return 0;
3563 }
3564
3565 /**
3566 * ata_hsm_move - move the HSM to the next state.
3567 * @ap: the target ata_port
3568 * @qc: qc on going
3569 * @status: current device status
3570 * @in_wq: 1 if called from workqueue, 0 otherwise
3571 *
3572 * RETURNS:
3573 * 1 when poll next status needed, 0 otherwise.
3574 */
3575
3576 static int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
3577 u8 status, int in_wq)
3578 {
3579 unsigned long flags = 0;
3580 int poll_next;
3581
3582 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
3583
3584 /* Make sure ata_qc_issue_prot() does not throw things
3585 * like DMA polling into the workqueue. Notice that
3586 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
3587 */
3588 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
3589
3590 /* check error */
3591 if (unlikely(status & (ATA_ERR | ATA_DF))) {
3592 qc->err_mask |= AC_ERR_DEV;
3593 ap->hsm_task_state = HSM_ST_ERR;
3594 }
3595
3596 fsm_start:
3597 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
3598 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
3599
3600 switch (ap->hsm_task_state) {
3601 case HSM_ST_FIRST:
3602 /* Send first data block or PACKET CDB */
3603
3604 /* If polling, we will stay in the work queue after
3605 * sending the data. Otherwise, interrupt handler
3606 * takes over after sending the data.
3607 */
3608 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
3609
3610 /* check device status */
3611 if (unlikely((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)) {
3612 /* Wrong status. Let EH handle this */
3613 qc->err_mask |= AC_ERR_HSM;
3614 ap->hsm_task_state = HSM_ST_ERR;
3615 goto fsm_start;
3616 }
3617
3618 /* Send the CDB (atapi) or the first data block (ata pio out).
3619 * During the state transition, interrupt handler shouldn't
3620 * be invoked before the data transfer is complete and
3621 * hsm_task_state is changed. Hence, the following locking.
3622 */
3623 if (in_wq)
3624 spin_lock_irqsave(&ap->host_set->lock, flags);
3625
3626 if (qc->tf.protocol == ATA_PROT_PIO) {
3627 /* PIO data out protocol.
3628 * send first data block.
3629 */
3630
3631 /* ata_pio_sectors() might change the state
3632 * to HSM_ST_LAST. so, the state is changed here
3633 * before ata_pio_sectors().
3634 */
3635 ap->hsm_task_state = HSM_ST;
3636 ata_pio_sectors(qc);
3637 ata_altstatus(ap); /* flush */
3638 } else
3639 /* send CDB */
3640 atapi_send_cdb(ap, qc);
3641
3642 if (in_wq)
3643 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3644
3645 /* if polling, ata_pio_task() handles the rest.
3646 * otherwise, interrupt handler takes over from here.
3647 */
3648 break;
3649
3650 case HSM_ST:
3651 /* complete command or read/write the data register */
3652 if (qc->tf.protocol == ATA_PROT_ATAPI) {
3653 /* ATAPI PIO protocol */
3654 if ((status & ATA_DRQ) == 0) {
3655 /* no more data to transfer */
3656 ap->hsm_task_state = HSM_ST_LAST;
3657 goto fsm_start;
3658 }
3659
3660 atapi_pio_bytes(qc);
3661
3662 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
3663 /* bad ireason reported by device */
3664 goto fsm_start;
3665
3666 } else {
3667 /* ATA PIO protocol */
3668 if (unlikely((status & ATA_DRQ) == 0)) {
3669 /* handle BSY=0, DRQ=0 as error */
3670 qc->err_mask |= AC_ERR_HSM;
3671 ap->hsm_task_state = HSM_ST_ERR;
3672 goto fsm_start;
3673 }
3674
3675 ata_pio_sectors(qc);
3676
3677 if (ap->hsm_task_state == HSM_ST_LAST &&
3678 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
3679 /* all data read */
3680 ata_altstatus(ap);
3681 status = ata_chk_status(ap);
3682 goto fsm_start;
3683 }
3684 }
3685
3686 ata_altstatus(ap); /* flush */
3687 poll_next = 1;
3688 break;
3689
3690 case HSM_ST_LAST:
3691 if (unlikely(!ata_ok(status))) {
3692 qc->err_mask |= __ac_err_mask(status);
3693 ap->hsm_task_state = HSM_ST_ERR;
3694 goto fsm_start;
3695 }
3696
3697 /* no more data to transfer */
3698 DPRINTK("ata%u: command complete, drv_stat 0x%x\n",
3699 ap->id, status);
3700
3701 WARN_ON(qc->err_mask);
3702
3703 ap->hsm_task_state = HSM_ST_IDLE;
3704
3705 /* complete taskfile transaction */
3706 if (in_wq)
3707 ata_poll_qc_complete(qc);
3708 else
3709 ata_qc_complete(qc);
3710
3711 poll_next = 0;
3712 break;
3713
3714 case HSM_ST_ERR:
3715 if (qc->tf.command != ATA_CMD_PACKET)
3716 printk(KERN_ERR "ata%u: command error, drv_stat 0x%x\n",
3717 ap->id, status);
3718
3719 /* make sure qc->err_mask is available to
3720 * know what's wrong and recover
3721 */
3722 WARN_ON(qc->err_mask == 0);
3723
3724 ap->hsm_task_state = HSM_ST_IDLE;
3725
3726 /* complete taskfile transaction */
3727 if (in_wq)
3728 ata_poll_qc_complete(qc);
3729 else
3730 ata_qc_complete(qc);
3731
3732 poll_next = 0;
3733 break;
3734 default:
3735 poll_next = 0;
3736 BUG();
3737 }
3738
3739 return poll_next;
3740 }
3741
3742 static void ata_pio_task(void *_data)
3743 {
3744 struct ata_port *ap = _data;
3745 struct ata_queued_cmd *qc;
3746 u8 status;
3747 int poll_next;
3748
3749 fsm_start:
3750 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
3751
3752 qc = ata_qc_from_tag(ap, ap->active_tag);
3753 WARN_ON(qc == NULL);
3754
3755 /*
3756 * This is purely heuristic. This is a fast path.
3757 * Sometimes when we enter, BSY will be cleared in
3758 * a chk-status or two. If not, the drive is probably seeking
3759 * or something. Snooze for a couple msecs, then
3760 * chk-status again. If still busy, queue delayed work.
3761 */
3762 status = ata_busy_wait(ap, ATA_BUSY, 5);
3763 if (status & ATA_BUSY) {
3764 msleep(2);
3765 status = ata_busy_wait(ap, ATA_BUSY, 10);
3766 if (status & ATA_BUSY) {
3767 ata_port_queue_task(ap, ata_pio_task, ap, ATA_SHORT_PAUSE);
3768 return;
3769 }
3770 }
3771
3772 /* move the HSM */
3773 poll_next = ata_hsm_move(ap, qc, status, 1);
3774
3775 /* another command or interrupt handler
3776 * may be running at this point.
3777 */
3778 if (poll_next)
3779 goto fsm_start;
3780 }
3781
3782 /**
3783 * ata_qc_timeout - Handle timeout of queued command
3784 * @qc: Command that timed out
3785 *
3786 * Some part of the kernel (currently, only the SCSI layer)
3787 * has noticed that the active command on port @ap has not
3788 * completed after a specified length of time. Handle this
3789 * condition by disabling DMA (if necessary) and completing
3790 * transactions, with error if necessary.
3791 *
3792 * This also handles the case of the "lost interrupt", where
3793 * for some reason (possibly hardware bug, possibly driver bug)
3794 * an interrupt was not delivered to the driver, even though the
3795 * transaction completed successfully.
3796 *
3797 * LOCKING:
3798 * Inherited from SCSI layer (none, can sleep)
3799 */
3800
3801 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3802 {
3803 struct ata_port *ap = qc->ap;
3804 struct ata_host_set *host_set = ap->host_set;
3805 u8 host_stat = 0, drv_stat;
3806 unsigned long flags;
3807
3808 DPRINTK("ENTER\n");
3809
3810 ap->hsm_task_state = HSM_ST_IDLE;
3811
3812 spin_lock_irqsave(&host_set->lock, flags);
3813
3814 switch (qc->tf.protocol) {
3815
3816 case ATA_PROT_DMA:
3817 case ATA_PROT_ATAPI_DMA:
3818 host_stat = ap->ops->bmdma_status(ap);
3819
3820 /* before we do anything else, clear DMA-Start bit */
3821 ap->ops->bmdma_stop(qc);
3822
3823 /* fall through */
3824
3825 default:
3826 ata_altstatus(ap);
3827 drv_stat = ata_chk_status(ap);
3828
3829 /* ack bmdma irq events */
3830 ap->ops->irq_clear(ap);
3831
3832 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3833 ap->id, qc->tf.command, drv_stat, host_stat);
3834
3835 ap->hsm_task_state = HSM_ST_IDLE;
3836
3837 /* complete taskfile transaction */
3838 qc->err_mask |= AC_ERR_TIMEOUT;
3839 break;
3840 }
3841
3842 spin_unlock_irqrestore(&host_set->lock, flags);
3843
3844 ata_eh_qc_complete(qc);
3845
3846 DPRINTK("EXIT\n");
3847 }
3848
3849 /**
3850 * ata_eng_timeout - Handle timeout of queued command
3851 * @ap: Port on which timed-out command is active
3852 *
3853 * Some part of the kernel (currently, only the SCSI layer)
3854 * has noticed that the active command on port @ap has not
3855 * completed after a specified length of time. Handle this
3856 * condition by disabling DMA (if necessary) and completing
3857 * transactions, with error if necessary.
3858 *
3859 * This also handles the case of the "lost interrupt", where
3860 * for some reason (possibly hardware bug, possibly driver bug)
3861 * an interrupt was not delivered to the driver, even though the
3862 * transaction completed successfully.
3863 *
3864 * LOCKING:
3865 * Inherited from SCSI layer (none, can sleep)
3866 */
3867
3868 void ata_eng_timeout(struct ata_port *ap)
3869 {
3870 DPRINTK("ENTER\n");
3871
3872 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
3873
3874 DPRINTK("EXIT\n");
3875 }
3876
3877 /**
3878 * ata_qc_new - Request an available ATA command, for queueing
3879 * @ap: Port associated with device @dev
3880 * @dev: Device from whom we request an available command structure
3881 *
3882 * LOCKING:
3883 * None.
3884 */
3885
3886 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3887 {
3888 struct ata_queued_cmd *qc = NULL;
3889 unsigned int i;
3890
3891 for (i = 0; i < ATA_MAX_QUEUE; i++)
3892 if (!test_and_set_bit(i, &ap->qactive)) {
3893 qc = ata_qc_from_tag(ap, i);
3894 break;
3895 }
3896
3897 if (qc)
3898 qc->tag = i;
3899
3900 return qc;
3901 }
3902
3903 /**
3904 * ata_qc_new_init - Request an available ATA command, and initialize it
3905 * @ap: Port associated with device @dev
3906 * @dev: Device from whom we request an available command structure
3907 *
3908 * LOCKING:
3909 * None.
3910 */
3911
3912 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3913 struct ata_device *dev)
3914 {
3915 struct ata_queued_cmd *qc;
3916
3917 qc = ata_qc_new(ap);
3918 if (qc) {
3919 qc->scsicmd = NULL;
3920 qc->ap = ap;
3921 qc->dev = dev;
3922
3923 ata_qc_reinit(qc);
3924 }
3925
3926 return qc;
3927 }
3928
3929 /**
3930 * ata_qc_free - free unused ata_queued_cmd
3931 * @qc: Command to complete
3932 *
3933 * Designed to free unused ata_queued_cmd object
3934 * in case something prevents using it.
3935 *
3936 * LOCKING:
3937 * spin_lock_irqsave(host_set lock)
3938 */
3939 void ata_qc_free(struct ata_queued_cmd *qc)
3940 {
3941 struct ata_port *ap = qc->ap;
3942 unsigned int tag;
3943
3944 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3945
3946 qc->flags = 0;
3947 tag = qc->tag;
3948 if (likely(ata_tag_valid(tag))) {
3949 if (tag == ap->active_tag)
3950 ap->active_tag = ATA_TAG_POISON;
3951 qc->tag = ATA_TAG_POISON;
3952 clear_bit(tag, &ap->qactive);
3953 }
3954 }
3955
3956 void __ata_qc_complete(struct ata_queued_cmd *qc)
3957 {
3958 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3959 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
3960
3961 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3962 ata_sg_clean(qc);
3963
3964 /* atapi: mark qc as inactive to prevent the interrupt handler
3965 * from completing the command twice later, before the error handler
3966 * is called. (when rc != 0 and atapi request sense is needed)
3967 */
3968 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3969
3970 /* call completion callback */
3971 qc->complete_fn(qc);
3972 }
3973
3974 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3975 {
3976 struct ata_port *ap = qc->ap;
3977
3978 switch (qc->tf.protocol) {
3979 case ATA_PROT_DMA:
3980 case ATA_PROT_ATAPI_DMA:
3981 return 1;
3982
3983 case ATA_PROT_ATAPI:
3984 case ATA_PROT_PIO:
3985 if (ap->flags & ATA_FLAG_PIO_DMA)
3986 return 1;
3987
3988 /* fall through */
3989
3990 default:
3991 return 0;
3992 }
3993
3994 /* never reached */
3995 }
3996
3997 /**
3998 * ata_qc_issue - issue taskfile to device
3999 * @qc: command to issue to device
4000 *
4001 * Prepare an ATA command to submission to device.
4002 * This includes mapping the data into a DMA-able
4003 * area, filling in the S/G table, and finally
4004 * writing the taskfile to hardware, starting the command.
4005 *
4006 * LOCKING:
4007 * spin_lock_irqsave(host_set lock)
4008 *
4009 * RETURNS:
4010 * Zero on success, AC_ERR_* mask on failure
4011 */
4012
4013 unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
4014 {
4015 struct ata_port *ap = qc->ap;
4016
4017 if (ata_should_dma_map(qc)) {
4018 if (qc->flags & ATA_QCFLAG_SG) {
4019 if (ata_sg_setup(qc))
4020 goto sg_err;
4021 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4022 if (ata_sg_setup_one(qc))
4023 goto sg_err;
4024 }
4025 } else {
4026 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4027 }
4028
4029 ap->ops->qc_prep(qc);
4030
4031 qc->ap->active_tag = qc->tag;
4032 qc->flags |= ATA_QCFLAG_ACTIVE;
4033
4034 return ap->ops->qc_issue(qc);
4035
4036 sg_err:
4037 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4038 return AC_ERR_SYSTEM;
4039 }
4040
4041
4042 /**
4043 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4044 * @qc: command to issue to device
4045 *
4046 * Using various libata functions and hooks, this function
4047 * starts an ATA command. ATA commands are grouped into
4048 * classes called "protocols", and issuing each type of protocol
4049 * is slightly different.
4050 *
4051 * May be used as the qc_issue() entry in ata_port_operations.
4052 *
4053 * LOCKING:
4054 * spin_lock_irqsave(host_set lock)
4055 *
4056 * RETURNS:
4057 * Zero on success, AC_ERR_* mask on failure
4058 */
4059
4060 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4061 {
4062 struct ata_port *ap = qc->ap;
4063
4064 /* Use polling pio if the LLD doesn't handle
4065 * interrupt driven pio and atapi CDB interrupt.
4066 */
4067 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4068 switch (qc->tf.protocol) {
4069 case ATA_PROT_PIO:
4070 case ATA_PROT_ATAPI:
4071 case ATA_PROT_ATAPI_NODATA:
4072 qc->tf.flags |= ATA_TFLAG_POLLING;
4073 break;
4074 case ATA_PROT_ATAPI_DMA:
4075 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4076 /* see ata_check_atapi_dma() */
4077 BUG();
4078 break;
4079 default:
4080 break;
4081 }
4082 }
4083
4084 /* select the device */
4085 ata_dev_select(ap, qc->dev->devno, 1, 0);
4086
4087 /* start the command */
4088 switch (qc->tf.protocol) {
4089 case ATA_PROT_NODATA:
4090 if (qc->tf.flags & ATA_TFLAG_POLLING)
4091 ata_qc_set_polling(qc);
4092
4093 ata_tf_to_host(ap, &qc->tf);
4094 ap->hsm_task_state = HSM_ST_LAST;
4095
4096 if (qc->tf.flags & ATA_TFLAG_POLLING)
4097 ata_port_queue_task(ap, ata_pio_task, ap, 0);
4098
4099 break;
4100
4101 case ATA_PROT_DMA:
4102 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4103
4104 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4105 ap->ops->bmdma_setup(qc); /* set up bmdma */
4106 ap->ops->bmdma_start(qc); /* initiate bmdma */
4107 ap->hsm_task_state = HSM_ST_LAST;
4108 break;
4109
4110 case ATA_PROT_PIO:
4111 if (qc->tf.flags & ATA_TFLAG_POLLING)
4112 ata_qc_set_polling(qc);
4113
4114 ata_tf_to_host(ap, &qc->tf);
4115
4116 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4117 /* PIO data out protocol */
4118 ap->hsm_task_state = HSM_ST_FIRST;
4119 ata_port_queue_task(ap, ata_pio_task, ap, 0);
4120
4121 /* always send first data block using
4122 * the ata_pio_task() codepath.
4123 */
4124 } else {
4125 /* PIO data in protocol */
4126 ap->hsm_task_state = HSM_ST;
4127
4128 if (qc->tf.flags & ATA_TFLAG_POLLING)
4129 ata_port_queue_task(ap, ata_pio_task, ap, 0);
4130
4131 /* if polling, ata_pio_task() handles the rest.
4132 * otherwise, interrupt handler takes over from here.
4133 */
4134 }
4135
4136 break;
4137
4138 case ATA_PROT_ATAPI:
4139 case ATA_PROT_ATAPI_NODATA:
4140 if (qc->tf.flags & ATA_TFLAG_POLLING)
4141 ata_qc_set_polling(qc);
4142
4143 ata_tf_to_host(ap, &qc->tf);
4144
4145 ap->hsm_task_state = HSM_ST_FIRST;
4146
4147 /* send cdb by polling if no cdb interrupt */
4148 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4149 (qc->tf.flags & ATA_TFLAG_POLLING))
4150 ata_port_queue_task(ap, ata_pio_task, ap, 0);
4151 break;
4152
4153 case ATA_PROT_ATAPI_DMA:
4154 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4155
4156 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4157 ap->ops->bmdma_setup(qc); /* set up bmdma */
4158 ap->hsm_task_state = HSM_ST_FIRST;
4159
4160 /* send cdb by polling if no cdb interrupt */
4161 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4162 ata_port_queue_task(ap, ata_pio_task, ap, 0);
4163 break;
4164
4165 default:
4166 WARN_ON(1);
4167 return AC_ERR_SYSTEM;
4168 }
4169
4170 return 0;
4171 }
4172
4173 /**
4174 * ata_host_intr - Handle host interrupt for given (port, task)
4175 * @ap: Port on which interrupt arrived (possibly...)
4176 * @qc: Taskfile currently active in engine
4177 *
4178 * Handle host interrupt for given queued command. Currently,
4179 * only DMA interrupts are handled. All other commands are
4180 * handled via polling with interrupts disabled (nIEN bit).
4181 *
4182 * LOCKING:
4183 * spin_lock_irqsave(host_set lock)
4184 *
4185 * RETURNS:
4186 * One if interrupt was handled, zero if not (shared irq).
4187 */
4188
4189 inline unsigned int ata_host_intr (struct ata_port *ap,
4190 struct ata_queued_cmd *qc)
4191 {
4192 u8 status, host_stat = 0;
4193
4194 VPRINTK("ata%u: protocol %d task_state %d\n",
4195 ap->id, qc->tf.protocol, ap->hsm_task_state);
4196
4197 /* Check whether we are expecting interrupt in this state */
4198 switch (ap->hsm_task_state) {
4199 case HSM_ST_FIRST:
4200 /* Some pre-ATAPI-4 devices assert INTRQ
4201 * at this state when ready to receive CDB.
4202 */
4203
4204 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4205 * The flag was turned on only for atapi devices.
4206 * No need to check is_atapi_taskfile(&qc->tf) again.
4207 */
4208 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4209 goto idle_irq;
4210 break;
4211 case HSM_ST_LAST:
4212 if (qc->tf.protocol == ATA_PROT_DMA ||
4213 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4214 /* check status of DMA engine */
4215 host_stat = ap->ops->bmdma_status(ap);
4216 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4217
4218 /* if it's not our irq... */
4219 if (!(host_stat & ATA_DMA_INTR))
4220 goto idle_irq;
4221
4222 /* before we do anything else, clear DMA-Start bit */
4223 ap->ops->bmdma_stop(qc);
4224
4225 if (unlikely(host_stat & ATA_DMA_ERR)) {
4226 /* error when transfering data to/from memory */
4227 qc->err_mask |= AC_ERR_HOST_BUS;
4228 ap->hsm_task_state = HSM_ST_ERR;
4229 }
4230 }
4231 break;
4232 case HSM_ST:
4233 break;
4234 default:
4235 goto idle_irq;
4236 }
4237
4238 /* check altstatus */
4239 status = ata_altstatus(ap);
4240 if (status & ATA_BUSY)
4241 goto idle_irq;
4242
4243 /* check main status, clearing INTRQ */
4244 status = ata_chk_status(ap);
4245 if (unlikely(status & ATA_BUSY))
4246 goto idle_irq;
4247
4248 /* ack bmdma irq events */
4249 ap->ops->irq_clear(ap);
4250
4251 ata_hsm_move(ap, qc, status, 0);
4252 return 1; /* irq handled */
4253
4254 idle_irq:
4255 ap->stats.idle_irq++;
4256
4257 #ifdef ATA_IRQ_TRAP
4258 if ((ap->stats.idle_irq % 1000) == 0) {
4259 ata_irq_ack(ap, 0); /* debug trap */
4260 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4261 return 1;
4262 }
4263 #endif
4264 return 0; /* irq not handled */
4265 }
4266
4267 /**
4268 * ata_interrupt - Default ATA host interrupt handler
4269 * @irq: irq line (unused)
4270 * @dev_instance: pointer to our ata_host_set information structure
4271 * @regs: unused
4272 *
4273 * Default interrupt handler for PCI IDE devices. Calls
4274 * ata_host_intr() for each port that is not disabled.
4275 *
4276 * LOCKING:
4277 * Obtains host_set lock during operation.
4278 *
4279 * RETURNS:
4280 * IRQ_NONE or IRQ_HANDLED.
4281 */
4282
4283 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4284 {
4285 struct ata_host_set *host_set = dev_instance;
4286 unsigned int i;
4287 unsigned int handled = 0;
4288 unsigned long flags;
4289
4290 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4291 spin_lock_irqsave(&host_set->lock, flags);
4292
4293 for (i = 0; i < host_set->n_ports; i++) {
4294 struct ata_port *ap;
4295
4296 ap = host_set->ports[i];
4297 if (ap &&
4298 !(ap->flags & ATA_FLAG_PORT_DISABLED)) {
4299 struct ata_queued_cmd *qc;
4300
4301 qc = ata_qc_from_tag(ap, ap->active_tag);
4302 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
4303 (qc->flags & ATA_QCFLAG_ACTIVE))
4304 handled |= ata_host_intr(ap, qc);
4305 }
4306 }
4307
4308 spin_unlock_irqrestore(&host_set->lock, flags);
4309
4310 return IRQ_RETVAL(handled);
4311 }
4312
4313
4314 /*
4315 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4316 * without filling any other registers
4317 */
4318 static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4319 u8 cmd)
4320 {
4321 struct ata_taskfile tf;
4322 int err;
4323
4324 ata_tf_init(ap, &tf, dev->devno);
4325
4326 tf.command = cmd;
4327 tf.flags |= ATA_TFLAG_DEVICE;
4328 tf.protocol = ATA_PROT_NODATA;
4329
4330 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4331 if (err)
4332 printk(KERN_ERR "%s: ata command failed: %d\n",
4333 __FUNCTION__, err);
4334
4335 return err;
4336 }
4337
4338 static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4339 {
4340 u8 cmd;
4341
4342 if (!ata_try_flush_cache(dev))
4343 return 0;
4344
4345 if (ata_id_has_flush_ext(dev->id))
4346 cmd = ATA_CMD_FLUSH_EXT;
4347 else
4348 cmd = ATA_CMD_FLUSH;
4349
4350 return ata_do_simple_cmd(ap, dev, cmd);
4351 }
4352
4353 static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4354 {
4355 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4356 }
4357
4358 static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4359 {
4360 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4361 }
4362
4363 /**
4364 * ata_device_resume - wakeup a previously suspended devices
4365 * @ap: port the device is connected to
4366 * @dev: the device to resume
4367 *
4368 * Kick the drive back into action, by sending it an idle immediate
4369 * command and making sure its transfer mode matches between drive
4370 * and host.
4371 *
4372 */
4373 int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4374 {
4375 if (ap->flags & ATA_FLAG_SUSPENDED) {
4376 ap->flags &= ~ATA_FLAG_SUSPENDED;
4377 ata_set_mode(ap);
4378 }
4379 if (!ata_dev_present(dev))
4380 return 0;
4381 if (dev->class == ATA_DEV_ATA)
4382 ata_start_drive(ap, dev);
4383
4384 return 0;
4385 }
4386
4387 /**
4388 * ata_device_suspend - prepare a device for suspend
4389 * @ap: port the device is connected to
4390 * @dev: the device to suspend
4391 *
4392 * Flush the cache on the drive, if appropriate, then issue a
4393 * standbynow command.
4394 */
4395 int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
4396 {
4397 if (!ata_dev_present(dev))
4398 return 0;
4399 if (dev->class == ATA_DEV_ATA)
4400 ata_flush_cache(ap, dev);
4401
4402 if (state.event != PM_EVENT_FREEZE)
4403 ata_standby_drive(ap, dev);
4404 ap->flags |= ATA_FLAG_SUSPENDED;
4405 return 0;
4406 }
4407
4408 /**
4409 * ata_port_start - Set port up for dma.
4410 * @ap: Port to initialize
4411 *
4412 * Called just after data structures for each port are
4413 * initialized. Allocates space for PRD table.
4414 *
4415 * May be used as the port_start() entry in ata_port_operations.
4416 *
4417 * LOCKING:
4418 * Inherited from caller.
4419 */
4420
4421 int ata_port_start (struct ata_port *ap)
4422 {
4423 struct device *dev = ap->dev;
4424 int rc;
4425
4426 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4427 if (!ap->prd)
4428 return -ENOMEM;
4429
4430 rc = ata_pad_alloc(ap, dev);
4431 if (rc) {
4432 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4433 return rc;
4434 }
4435
4436 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4437
4438 return 0;
4439 }
4440
4441
4442 /**
4443 * ata_port_stop - Undo ata_port_start()
4444 * @ap: Port to shut down
4445 *
4446 * Frees the PRD table.
4447 *
4448 * May be used as the port_stop() entry in ata_port_operations.
4449 *
4450 * LOCKING:
4451 * Inherited from caller.
4452 */
4453
4454 void ata_port_stop (struct ata_port *ap)
4455 {
4456 struct device *dev = ap->dev;
4457
4458 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4459 ata_pad_free(ap, dev);
4460 }
4461
4462 void ata_host_stop (struct ata_host_set *host_set)
4463 {
4464 if (host_set->mmio_base)
4465 iounmap(host_set->mmio_base);
4466 }
4467
4468
4469 /**
4470 * ata_host_remove - Unregister SCSI host structure with upper layers
4471 * @ap: Port to unregister
4472 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4473 *
4474 * LOCKING:
4475 * Inherited from caller.
4476 */
4477
4478 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4479 {
4480 struct Scsi_Host *sh = ap->host;
4481
4482 DPRINTK("ENTER\n");
4483
4484 if (do_unregister)
4485 scsi_remove_host(sh);
4486
4487 ap->ops->port_stop(ap);
4488 }
4489
4490 /**
4491 * ata_host_init - Initialize an ata_port structure
4492 * @ap: Structure to initialize
4493 * @host: associated SCSI mid-layer structure
4494 * @host_set: Collection of hosts to which @ap belongs
4495 * @ent: Probe information provided by low-level driver
4496 * @port_no: Port number associated with this ata_port
4497 *
4498 * Initialize a new ata_port structure, and its associated
4499 * scsi_host.
4500 *
4501 * LOCKING:
4502 * Inherited from caller.
4503 */
4504
4505 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4506 struct ata_host_set *host_set,
4507 const struct ata_probe_ent *ent, unsigned int port_no)
4508 {
4509 unsigned int i;
4510
4511 host->max_id = 16;
4512 host->max_lun = 1;
4513 host->max_channel = 1;
4514 host->unique_id = ata_unique_id++;
4515 host->max_cmd_len = 12;
4516
4517 ap->flags = ATA_FLAG_PORT_DISABLED;
4518 ap->id = host->unique_id;
4519 ap->host = host;
4520 ap->ctl = ATA_DEVCTL_OBS;
4521 ap->host_set = host_set;
4522 ap->dev = ent->dev;
4523 ap->port_no = port_no;
4524 ap->hard_port_no =
4525 ent->legacy_mode ? ent->hard_port_no : port_no;
4526 ap->pio_mask = ent->pio_mask;
4527 ap->mwdma_mask = ent->mwdma_mask;
4528 ap->udma_mask = ent->udma_mask;
4529 ap->flags |= ent->host_flags;
4530 ap->ops = ent->port_ops;
4531 ap->cbl = ATA_CBL_NONE;
4532 ap->active_tag = ATA_TAG_POISON;
4533 ap->last_ctl = 0xFF;
4534
4535 INIT_WORK(&ap->port_task, NULL, NULL);
4536 INIT_LIST_HEAD(&ap->eh_done_q);
4537
4538 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4539 struct ata_device *dev = &ap->device[i];
4540 dev->devno = i;
4541 dev->pio_mask = UINT_MAX;
4542 dev->mwdma_mask = UINT_MAX;
4543 dev->udma_mask = UINT_MAX;
4544 }
4545
4546 #ifdef ATA_IRQ_TRAP
4547 ap->stats.unhandled_irq = 1;
4548 ap->stats.idle_irq = 1;
4549 #endif
4550
4551 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4552 }
4553
4554 /**
4555 * ata_host_add - Attach low-level ATA driver to system
4556 * @ent: Information provided by low-level driver
4557 * @host_set: Collections of ports to which we add
4558 * @port_no: Port number associated with this host
4559 *
4560 * Attach low-level ATA driver to system.
4561 *
4562 * LOCKING:
4563 * PCI/etc. bus probe sem.
4564 *
4565 * RETURNS:
4566 * New ata_port on success, for NULL on error.
4567 */
4568
4569 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4570 struct ata_host_set *host_set,
4571 unsigned int port_no)
4572 {
4573 struct Scsi_Host *host;
4574 struct ata_port *ap;
4575 int rc;
4576
4577 DPRINTK("ENTER\n");
4578
4579 if (!ent->port_ops->probe_reset &&
4580 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4581 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4582 port_no);
4583 return NULL;
4584 }
4585
4586 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4587 if (!host)
4588 return NULL;
4589
4590 host->transportt = &ata_scsi_transport_template;
4591
4592 ap = (struct ata_port *) &host->hostdata[0];
4593
4594 ata_host_init(ap, host, host_set, ent, port_no);
4595
4596 rc = ap->ops->port_start(ap);
4597 if (rc)
4598 goto err_out;
4599
4600 return ap;
4601
4602 err_out:
4603 scsi_host_put(host);
4604 return NULL;
4605 }
4606
4607 /**
4608 * ata_device_add - Register hardware device with ATA and SCSI layers
4609 * @ent: Probe information describing hardware device to be registered
4610 *
4611 * This function processes the information provided in the probe
4612 * information struct @ent, allocates the necessary ATA and SCSI
4613 * host information structures, initializes them, and registers
4614 * everything with requisite kernel subsystems.
4615 *
4616 * This function requests irqs, probes the ATA bus, and probes
4617 * the SCSI bus.
4618 *
4619 * LOCKING:
4620 * PCI/etc. bus probe sem.
4621 *
4622 * RETURNS:
4623 * Number of ports registered. Zero on error (no ports registered).
4624 */
4625
4626 int ata_device_add(const struct ata_probe_ent *ent)
4627 {
4628 unsigned int count = 0, i;
4629 struct device *dev = ent->dev;
4630 struct ata_host_set *host_set;
4631
4632 DPRINTK("ENTER\n");
4633 /* alloc a container for our list of ATA ports (buses) */
4634 host_set = kzalloc(sizeof(struct ata_host_set) +
4635 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4636 if (!host_set)
4637 return 0;
4638 spin_lock_init(&host_set->lock);
4639
4640 host_set->dev = dev;
4641 host_set->n_ports = ent->n_ports;
4642 host_set->irq = ent->irq;
4643 host_set->mmio_base = ent->mmio_base;
4644 host_set->private_data = ent->private_data;
4645 host_set->ops = ent->port_ops;
4646
4647 /* register each port bound to this device */
4648 for (i = 0; i < ent->n_ports; i++) {
4649 struct ata_port *ap;
4650 unsigned long xfer_mode_mask;
4651
4652 ap = ata_host_add(ent, host_set, i);
4653 if (!ap)
4654 goto err_out;
4655
4656 host_set->ports[i] = ap;
4657 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4658 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4659 (ap->pio_mask << ATA_SHIFT_PIO);
4660
4661 /* print per-port info to dmesg */
4662 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4663 "bmdma 0x%lX irq %lu\n",
4664 ap->id,
4665 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4666 ata_mode_string(xfer_mode_mask),
4667 ap->ioaddr.cmd_addr,
4668 ap->ioaddr.ctl_addr,
4669 ap->ioaddr.bmdma_addr,
4670 ent->irq);
4671
4672 ata_chk_status(ap);
4673 host_set->ops->irq_clear(ap);
4674 count++;
4675 }
4676
4677 if (!count)
4678 goto err_free_ret;
4679
4680 /* obtain irq, that is shared between channels */
4681 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4682 DRV_NAME, host_set))
4683 goto err_out;
4684
4685 /* perform each probe synchronously */
4686 DPRINTK("probe begin\n");
4687 for (i = 0; i < count; i++) {
4688 struct ata_port *ap;
4689 int rc;
4690
4691 ap = host_set->ports[i];
4692
4693 DPRINTK("ata%u: bus probe begin\n", ap->id);
4694 rc = ata_bus_probe(ap);
4695 DPRINTK("ata%u: bus probe end\n", ap->id);
4696
4697 if (rc) {
4698 /* FIXME: do something useful here?
4699 * Current libata behavior will
4700 * tear down everything when
4701 * the module is removed
4702 * or the h/w is unplugged.
4703 */
4704 }
4705
4706 rc = scsi_add_host(ap->host, dev);
4707 if (rc) {
4708 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4709 ap->id);
4710 /* FIXME: do something useful here */
4711 /* FIXME: handle unconditional calls to
4712 * scsi_scan_host and ata_host_remove, below,
4713 * at the very least
4714 */
4715 }
4716 }
4717
4718 /* probes are done, now scan each port's disk(s) */
4719 DPRINTK("host probe begin\n");
4720 for (i = 0; i < count; i++) {
4721 struct ata_port *ap = host_set->ports[i];
4722
4723 ata_scsi_scan_host(ap);
4724 }
4725
4726 dev_set_drvdata(dev, host_set);
4727
4728 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4729 return ent->n_ports; /* success */
4730
4731 err_out:
4732 for (i = 0; i < count; i++) {
4733 ata_host_remove(host_set->ports[i], 1);
4734 scsi_host_put(host_set->ports[i]->host);
4735 }
4736 err_free_ret:
4737 kfree(host_set);
4738 VPRINTK("EXIT, returning 0\n");
4739 return 0;
4740 }
4741
4742 /**
4743 * ata_host_set_remove - PCI layer callback for device removal
4744 * @host_set: ATA host set that was removed
4745 *
4746 * Unregister all objects associated with this host set. Free those
4747 * objects.
4748 *
4749 * LOCKING:
4750 * Inherited from calling layer (may sleep).
4751 */
4752
4753 void ata_host_set_remove(struct ata_host_set *host_set)
4754 {
4755 struct ata_port *ap;
4756 unsigned int i;
4757
4758 for (i = 0; i < host_set->n_ports; i++) {
4759 ap = host_set->ports[i];
4760 scsi_remove_host(ap->host);
4761 }
4762
4763 free_irq(host_set->irq, host_set);
4764
4765 for (i = 0; i < host_set->n_ports; i++) {
4766 ap = host_set->ports[i];
4767
4768 ata_scsi_release(ap->host);
4769
4770 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4771 struct ata_ioports *ioaddr = &ap->ioaddr;
4772
4773 if (ioaddr->cmd_addr == 0x1f0)
4774 release_region(0x1f0, 8);
4775 else if (ioaddr->cmd_addr == 0x170)
4776 release_region(0x170, 8);
4777 }
4778
4779 scsi_host_put(ap->host);
4780 }
4781
4782 if (host_set->ops->host_stop)
4783 host_set->ops->host_stop(host_set);
4784
4785 kfree(host_set);
4786 }
4787
4788 /**
4789 * ata_scsi_release - SCSI layer callback hook for host unload
4790 * @host: libata host to be unloaded
4791 *
4792 * Performs all duties necessary to shut down a libata port...
4793 * Kill port kthread, disable port, and release resources.
4794 *
4795 * LOCKING:
4796 * Inherited from SCSI layer.
4797 *
4798 * RETURNS:
4799 * One.
4800 */
4801
4802 int ata_scsi_release(struct Scsi_Host *host)
4803 {
4804 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4805 int i;
4806
4807 DPRINTK("ENTER\n");
4808
4809 ap->ops->port_disable(ap);
4810 ata_host_remove(ap, 0);
4811 for (i = 0; i < ATA_MAX_DEVICES; i++)
4812 kfree(ap->device[i].id);
4813
4814 DPRINTK("EXIT\n");
4815 return 1;
4816 }
4817
4818 /**
4819 * ata_std_ports - initialize ioaddr with standard port offsets.
4820 * @ioaddr: IO address structure to be initialized
4821 *
4822 * Utility function which initializes data_addr, error_addr,
4823 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4824 * device_addr, status_addr, and command_addr to standard offsets
4825 * relative to cmd_addr.
4826 *
4827 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4828 */
4829
4830 void ata_std_ports(struct ata_ioports *ioaddr)
4831 {
4832 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4833 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4834 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4835 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4836 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4837 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4838 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4839 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4840 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4841 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4842 }
4843
4844
4845 #ifdef CONFIG_PCI
4846
4847 void ata_pci_host_stop (struct ata_host_set *host_set)
4848 {
4849 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4850
4851 pci_iounmap(pdev, host_set->mmio_base);
4852 }
4853
4854 /**
4855 * ata_pci_remove_one - PCI layer callback for device removal
4856 * @pdev: PCI device that was removed
4857 *
4858 * PCI layer indicates to libata via this hook that
4859 * hot-unplug or module unload event has occurred.
4860 * Handle this by unregistering all objects associated
4861 * with this PCI device. Free those objects. Then finally
4862 * release PCI resources and disable device.
4863 *
4864 * LOCKING:
4865 * Inherited from PCI layer (may sleep).
4866 */
4867
4868 void ata_pci_remove_one (struct pci_dev *pdev)
4869 {
4870 struct device *dev = pci_dev_to_dev(pdev);
4871 struct ata_host_set *host_set = dev_get_drvdata(dev);
4872
4873 ata_host_set_remove(host_set);
4874 pci_release_regions(pdev);
4875 pci_disable_device(pdev);
4876 dev_set_drvdata(dev, NULL);
4877 }
4878
4879 /* move to PCI subsystem */
4880 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
4881 {
4882 unsigned long tmp = 0;
4883
4884 switch (bits->width) {
4885 case 1: {
4886 u8 tmp8 = 0;
4887 pci_read_config_byte(pdev, bits->reg, &tmp8);
4888 tmp = tmp8;
4889 break;
4890 }
4891 case 2: {
4892 u16 tmp16 = 0;
4893 pci_read_config_word(pdev, bits->reg, &tmp16);
4894 tmp = tmp16;
4895 break;
4896 }
4897 case 4: {
4898 u32 tmp32 = 0;
4899 pci_read_config_dword(pdev, bits->reg, &tmp32);
4900 tmp = tmp32;
4901 break;
4902 }
4903
4904 default:
4905 return -EINVAL;
4906 }
4907
4908 tmp &= bits->mask;
4909
4910 return (tmp == bits->val) ? 1 : 0;
4911 }
4912
4913 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4914 {
4915 pci_save_state(pdev);
4916 pci_disable_device(pdev);
4917 pci_set_power_state(pdev, PCI_D3hot);
4918 return 0;
4919 }
4920
4921 int ata_pci_device_resume(struct pci_dev *pdev)
4922 {
4923 pci_set_power_state(pdev, PCI_D0);
4924 pci_restore_state(pdev);
4925 pci_enable_device(pdev);
4926 pci_set_master(pdev);
4927 return 0;
4928 }
4929 #endif /* CONFIG_PCI */
4930
4931
4932 static int __init ata_init(void)
4933 {
4934 ata_wq = create_workqueue("ata");
4935 if (!ata_wq)
4936 return -ENOMEM;
4937
4938 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4939 return 0;
4940 }
4941
4942 static void __exit ata_exit(void)
4943 {
4944 destroy_workqueue(ata_wq);
4945 }
4946
4947 module_init(ata_init);
4948 module_exit(ata_exit);
4949
4950 static unsigned long ratelimit_time;
4951 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4952
4953 int ata_ratelimit(void)
4954 {
4955 int rc;
4956 unsigned long flags;
4957
4958 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4959
4960 if (time_after(jiffies, ratelimit_time)) {
4961 rc = 1;
4962 ratelimit_time = jiffies + (HZ/5);
4963 } else
4964 rc = 0;
4965
4966 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4967
4968 return rc;
4969 }
4970
4971 /*
4972 * libata is essentially a library of internal helper functions for
4973 * low-level ATA host controller drivers. As such, the API/ABI is
4974 * likely to change as new drivers are added and updated.
4975 * Do not depend on ABI/API stability.
4976 */
4977
4978 EXPORT_SYMBOL_GPL(ata_std_bios_param);
4979 EXPORT_SYMBOL_GPL(ata_std_ports);
4980 EXPORT_SYMBOL_GPL(ata_device_add);
4981 EXPORT_SYMBOL_GPL(ata_host_set_remove);
4982 EXPORT_SYMBOL_GPL(ata_sg_init);
4983 EXPORT_SYMBOL_GPL(ata_sg_init_one);
4984 EXPORT_SYMBOL_GPL(__ata_qc_complete);
4985 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4986 EXPORT_SYMBOL_GPL(ata_eng_timeout);
4987 EXPORT_SYMBOL_GPL(ata_tf_load);
4988 EXPORT_SYMBOL_GPL(ata_tf_read);
4989 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4990 EXPORT_SYMBOL_GPL(ata_std_dev_select);
4991 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4992 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4993 EXPORT_SYMBOL_GPL(ata_check_status);
4994 EXPORT_SYMBOL_GPL(ata_altstatus);
4995 EXPORT_SYMBOL_GPL(ata_exec_command);
4996 EXPORT_SYMBOL_GPL(ata_port_start);
4997 EXPORT_SYMBOL_GPL(ata_port_stop);
4998 EXPORT_SYMBOL_GPL(ata_host_stop);
4999 EXPORT_SYMBOL_GPL(ata_interrupt);
5000 EXPORT_SYMBOL_GPL(ata_qc_prep);
5001 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
5002 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5003 EXPORT_SYMBOL_GPL(ata_bmdma_start);
5004 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5005 EXPORT_SYMBOL_GPL(ata_bmdma_status);
5006 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5007 EXPORT_SYMBOL_GPL(ata_port_probe);
5008 EXPORT_SYMBOL_GPL(sata_phy_reset);
5009 EXPORT_SYMBOL_GPL(__sata_phy_reset);
5010 EXPORT_SYMBOL_GPL(ata_bus_reset);
5011 EXPORT_SYMBOL_GPL(ata_std_probeinit);
5012 EXPORT_SYMBOL_GPL(ata_std_softreset);
5013 EXPORT_SYMBOL_GPL(sata_std_hardreset);
5014 EXPORT_SYMBOL_GPL(ata_std_postreset);
5015 EXPORT_SYMBOL_GPL(ata_std_probe_reset);
5016 EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
5017 EXPORT_SYMBOL_GPL(ata_dev_revalidate);
5018 EXPORT_SYMBOL_GPL(ata_dev_classify);
5019 EXPORT_SYMBOL_GPL(ata_dev_pair);
5020 EXPORT_SYMBOL_GPL(ata_port_disable);
5021 EXPORT_SYMBOL_GPL(ata_ratelimit);
5022 EXPORT_SYMBOL_GPL(ata_busy_sleep);
5023 EXPORT_SYMBOL_GPL(ata_port_queue_task);
5024 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5025 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5026 EXPORT_SYMBOL_GPL(ata_scsi_error);
5027 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5028 EXPORT_SYMBOL_GPL(ata_scsi_release);
5029 EXPORT_SYMBOL_GPL(ata_host_intr);
5030 EXPORT_SYMBOL_GPL(ata_id_string);
5031 EXPORT_SYMBOL_GPL(ata_id_c_string);
5032 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5033 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5034 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
5035
5036 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
5037 EXPORT_SYMBOL_GPL(ata_timing_compute);
5038 EXPORT_SYMBOL_GPL(ata_timing_merge);
5039
5040 #ifdef CONFIG_PCI
5041 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5042 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5043 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5044 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5045 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5046 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5047 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
5048 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5049 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
5050 #endif /* CONFIG_PCI */
5051
5052 EXPORT_SYMBOL_GPL(ata_device_suspend);
5053 EXPORT_SYMBOL_GPL(ata_device_resume);
5054 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5055 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);