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[mirror_ubuntu-artful-kernel.git] / drivers / scsi / lpfc / lpfc.h
1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
8 * www.broadcom.com *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
10 * *
11 * This program is free software; you can redistribute it and/or *
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
22 *******************************************************************/
23
24 #include <scsi/scsi_host.h>
25 #include <linux/ktime.h>
26
27 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS)
28 #define CONFIG_SCSI_LPFC_DEBUG_FS
29 #endif
30
31 struct lpfc_sli2_slim;
32
33 #define ELX_MODEL_NAME_SIZE 80
34
35 #define LPFC_PCI_DEV_LP 0x1
36 #define LPFC_PCI_DEV_OC 0x2
37
38 #define LPFC_SLI_REV2 2
39 #define LPFC_SLI_REV3 3
40 #define LPFC_SLI_REV4 4
41
42 #define LPFC_MAX_TARGET 4096 /* max number of targets supported */
43 #define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els
44 requests */
45 #define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact
46 the NameServer before giving up. */
47 #define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */
48 #define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */
49 #define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi
50 cmnd for menlo needs nearly twice as for firmware
51 downloads using bsg */
52
53 #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */
54 #define LPFC_MAX_SG_SLI4_SEG_CNT_DIF 128 /* sg element count per scsi cmnd */
55 #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */
56 #define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */
57 #define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */
58 #define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */
59 #define LPFC_MAX_NVME_SEG_CNT 128 /* max SGL element cnt per NVME cmnd */
60
61 #define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */
62 #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
63 #define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */
64 #define LPFC_VNAME_LEN 100 /* vport symbolic name length */
65 #define LPFC_TGTQ_INTERVAL 40000 /* Min amount of time between tgt
66 queue depth change in millisecs */
67 #define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */
68 #define LPFC_MIN_TGT_QDEPTH 10
69 #define LPFC_MAX_TGT_QDEPTH 0xFFFF
70
71 #define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data
72 collection. */
73 /*
74 * Following time intervals are used of adjusting SCSI device
75 * queue depths when there are driver resource error or Firmware
76 * resource error.
77 */
78 /* 1 Second */
79 #define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1))
80
81 /* Number of exchanges reserved for discovery to complete */
82 #define LPFC_DISC_IOCB_BUFF_COUNT 20
83
84 #define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */
85 #define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */
86
87 #define LPFC_LOOK_AHEAD_OFF 0 /* Look ahead logic is turned off */
88
89 /* Error Attention event polling interval */
90 #define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */
91
92 /* Define macros for 64 bit support */
93 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
94 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
95 #define getPaddr(high, low) ((dma_addr_t)( \
96 (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
97 /* Provide maximum configuration definitions. */
98 #define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */
99 #define FC_MAX_ADPTMSG 64
100
101 #define MAX_HBAEVT 32
102 #define MAX_HBAS_NO_RESET 16
103
104 /* Number of MSI-X vectors the driver uses */
105 #define LPFC_MSIX_VECTORS 2
106
107 /* lpfc wait event data ready flag */
108 #define LPFC_DATA_READY 0 /* bit 0 */
109
110 /* queue dump line buffer size */
111 #define LPFC_LBUF_SZ 128
112
113 /* mailbox system shutdown options */
114 #define LPFC_MBX_NO_WAIT 0
115 #define LPFC_MBX_WAIT 1
116
117 enum lpfc_polling_flags {
118 ENABLE_FCP_RING_POLLING = 0x1,
119 DISABLE_FCP_RING_INT = 0x2
120 };
121
122 struct perf_prof {
123 uint16_t cmd_cpu[40];
124 uint16_t rsp_cpu[40];
125 uint16_t qh_cpu[40];
126 uint16_t wqidx[40];
127 };
128
129 /*
130 * Provide for FC4 TYPE x28 - NVME. The
131 * bit mask for FCP and NVME is 0x8 identically
132 * because they are 32 bit positions distance.
133 */
134 #define LPFC_FC4_TYPE_BITMASK 0x00000100
135
136 /* Provide DMA memory definitions the driver uses per port instance. */
137 struct lpfc_dmabuf {
138 struct list_head list;
139 void *virt; /* virtual address ptr */
140 dma_addr_t phys; /* mapped address */
141 uint32_t buffer_tag; /* used for tagged queue ring */
142 };
143
144 struct lpfc_dma_pool {
145 struct lpfc_dmabuf *elements;
146 uint32_t max_count;
147 uint32_t current_count;
148 };
149
150 struct hbq_dmabuf {
151 struct lpfc_dmabuf hbuf;
152 struct lpfc_dmabuf dbuf;
153 uint16_t total_size;
154 uint16_t bytes_recv;
155 uint32_t tag;
156 struct lpfc_cq_event cq_event;
157 unsigned long time_stamp;
158 void *context;
159 };
160
161 struct rqb_dmabuf {
162 struct lpfc_dmabuf hbuf;
163 struct lpfc_dmabuf dbuf;
164 uint16_t total_size;
165 uint16_t bytes_recv;
166 void *context;
167 struct lpfc_iocbq *iocbq;
168 struct lpfc_sglq *sglq;
169 struct lpfc_queue *hrq; /* ptr to associated Header RQ */
170 struct lpfc_queue *drq; /* ptr to associated Data RQ */
171 };
172
173 /* Priority bit. Set value to exceed low water mark in lpfc_mem. */
174 #define MEM_PRI 0x100
175
176
177 /****************************************************************************/
178 /* Device VPD save area */
179 /****************************************************************************/
180 typedef struct lpfc_vpd {
181 uint32_t status; /* vpd status value */
182 uint32_t length; /* number of bytes actually returned */
183 struct {
184 uint32_t rsvd1; /* Revision numbers */
185 uint32_t biuRev;
186 uint32_t smRev;
187 uint32_t smFwRev;
188 uint32_t endecRev;
189 uint16_t rBit;
190 uint8_t fcphHigh;
191 uint8_t fcphLow;
192 uint8_t feaLevelHigh;
193 uint8_t feaLevelLow;
194 uint32_t postKernRev;
195 uint32_t opFwRev;
196 uint8_t opFwName[16];
197 uint32_t sli1FwRev;
198 uint8_t sli1FwName[16];
199 uint32_t sli2FwRev;
200 uint8_t sli2FwName[16];
201 } rev;
202 struct {
203 #ifdef __BIG_ENDIAN_BITFIELD
204 uint32_t rsvd3 :19; /* Reserved */
205 uint32_t cdss : 1; /* Configure Data Security SLI */
206 uint32_t rsvd2 : 3; /* Reserved */
207 uint32_t cbg : 1; /* Configure BlockGuard */
208 uint32_t cmv : 1; /* Configure Max VPIs */
209 uint32_t ccrp : 1; /* Config Command Ring Polling */
210 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
211 uint32_t chbs : 1; /* Cofigure Host Backing store */
212 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
213 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
214 uint32_t cmx : 1; /* Configure Max XRIs */
215 uint32_t cmr : 1; /* Configure Max RPIs */
216 #else /* __LITTLE_ENDIAN */
217 uint32_t cmr : 1; /* Configure Max RPIs */
218 uint32_t cmx : 1; /* Configure Max XRIs */
219 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
220 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
221 uint32_t chbs : 1; /* Cofigure Host Backing store */
222 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
223 uint32_t ccrp : 1; /* Config Command Ring Polling */
224 uint32_t cmv : 1; /* Configure Max VPIs */
225 uint32_t cbg : 1; /* Configure BlockGuard */
226 uint32_t rsvd2 : 3; /* Reserved */
227 uint32_t cdss : 1; /* Configure Data Security SLI */
228 uint32_t rsvd3 :19; /* Reserved */
229 #endif
230 } sli3Feat;
231 } lpfc_vpd_t;
232
233 struct lpfc_scsi_buf;
234
235
236 /*
237 * lpfc stat counters
238 */
239 struct lpfc_stats {
240 /* Statistics for ELS commands */
241 uint32_t elsLogiCol;
242 uint32_t elsRetryExceeded;
243 uint32_t elsXmitRetry;
244 uint32_t elsDelayRetry;
245 uint32_t elsRcvDrop;
246 uint32_t elsRcvFrame;
247 uint32_t elsRcvRSCN;
248 uint32_t elsRcvRNID;
249 uint32_t elsRcvFARP;
250 uint32_t elsRcvFARPR;
251 uint32_t elsRcvFLOGI;
252 uint32_t elsRcvPLOGI;
253 uint32_t elsRcvADISC;
254 uint32_t elsRcvPDISC;
255 uint32_t elsRcvFAN;
256 uint32_t elsRcvLOGO;
257 uint32_t elsRcvPRLO;
258 uint32_t elsRcvPRLI;
259 uint32_t elsRcvLIRR;
260 uint32_t elsRcvRLS;
261 uint32_t elsRcvRPS;
262 uint32_t elsRcvRPL;
263 uint32_t elsRcvRRQ;
264 uint32_t elsRcvRTV;
265 uint32_t elsRcvECHO;
266 uint32_t elsRcvLCB;
267 uint32_t elsRcvRDP;
268 uint32_t elsXmitFLOGI;
269 uint32_t elsXmitFDISC;
270 uint32_t elsXmitPLOGI;
271 uint32_t elsXmitPRLI;
272 uint32_t elsXmitADISC;
273 uint32_t elsXmitLOGO;
274 uint32_t elsXmitSCR;
275 uint32_t elsXmitRNID;
276 uint32_t elsXmitFARP;
277 uint32_t elsXmitFARPR;
278 uint32_t elsXmitACC;
279 uint32_t elsXmitLSRJT;
280
281 uint32_t frameRcvBcast;
282 uint32_t frameRcvMulti;
283 uint32_t strayXmitCmpl;
284 uint32_t frameXmitDelay;
285 uint32_t xriCmdCmpl;
286 uint32_t xriStatErr;
287 uint32_t LinkUp;
288 uint32_t LinkDown;
289 uint32_t LinkMultiEvent;
290 uint32_t NoRcvBuf;
291 uint32_t fcpCmd;
292 uint32_t fcpCmpl;
293 uint32_t fcpRspErr;
294 uint32_t fcpRemoteStop;
295 uint32_t fcpPortRjt;
296 uint32_t fcpPortBusy;
297 uint32_t fcpError;
298 uint32_t fcpLocalErr;
299 };
300
301 struct lpfc_hba;
302
303
304 enum discovery_state {
305 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */
306 LPFC_VPORT_FAILED = 1, /* vport has failed */
307 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */
308 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */
309 LPFC_FDISC = 8, /* FDISC sent for vport */
310 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id
311 * configured */
312 LPFC_NS_REG = 10, /* Register with NameServer */
313 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */
314 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for
315 * device authentication / discovery */
316 LPFC_DISC_AUTH = 13, /* Processing ADISC list */
317 LPFC_VPORT_READY = 32,
318 };
319
320 enum hba_state {
321 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */
322 LPFC_WARM_START = 1, /* HBA state after selective reset */
323 LPFC_INIT_START = 2, /* Initial state after board reset */
324 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */
325 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */
326 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */
327 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue
328 * CLEAR_LA */
329 LPFC_HBA_READY = 32,
330 LPFC_HBA_ERROR = -1
331 };
332
333 struct lpfc_vport {
334 struct lpfc_hba *phba;
335 struct list_head listentry;
336 uint8_t port_type;
337 #define LPFC_PHYSICAL_PORT 1
338 #define LPFC_NPIV_PORT 2
339 #define LPFC_FABRIC_PORT 3
340 enum discovery_state port_state;
341
342 uint16_t vpi;
343 uint16_t vfi;
344 uint8_t vpi_state;
345 #define LPFC_VPI_REGISTERED 0x1
346
347 uint32_t fc_flag; /* FC flags */
348 /* Several of these flags are HBA centric and should be moved to
349 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
350 */
351 #define FC_PT2PT 0x1 /* pt2pt with no fabric */
352 #define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */
353 #define FC_DISC_TMO 0x4 /* Discovery timer running */
354 #define FC_PUBLIC_LOOP 0x8 /* Public loop */
355 #define FC_LBIT 0x10 /* LOGIN bit in loopinit set */
356 #define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */
357 #define FC_NLP_MORE 0x40 /* More node to process in node tbl */
358 #define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */
359 #define FC_FABRIC 0x100 /* We are fabric attached */
360 #define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */
361 #define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */
362 #define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/
363 #define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */
364 #define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */
365 #define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */
366 #define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */
367 #define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */
368 #define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */
369 #define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
370 #define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */
371 #define FC_VFI_REGISTERED 0x800000 /* VFI is registered */
372 #define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */
373 #define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */
374
375 uint32_t ct_flags;
376 #define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */
377 #define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */
378 #define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */
379 #define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */
380 #define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */
381
382 struct list_head fc_nodes;
383
384 /* Keep counters for the number of entries in each list. */
385 uint16_t fc_plogi_cnt;
386 uint16_t fc_adisc_cnt;
387 uint16_t fc_reglogin_cnt;
388 uint16_t fc_prli_cnt;
389 uint16_t fc_unmap_cnt;
390 uint16_t fc_map_cnt;
391 uint16_t fc_npr_cnt;
392 uint16_t fc_unused_cnt;
393 struct serv_parm fc_sparam; /* buffer for our service parameters */
394
395 uint32_t fc_myDID; /* fibre channel S_ID */
396 uint32_t fc_prevDID; /* previous fibre channel S_ID */
397 struct lpfc_name fabric_portname;
398 struct lpfc_name fabric_nodename;
399
400 int32_t stopped; /* HBA has not been restarted since last ERATT */
401 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
402
403 uint32_t num_disc_nodes; /* in addition to hba_state */
404 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */
405
406 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */
407 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */
408 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */
409 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
410 struct lpfc_name fc_nodename; /* fc nodename */
411 struct lpfc_name fc_portname; /* fc portname */
412
413 struct lpfc_work_evt disc_timeout_evt;
414
415 struct timer_list fc_disctmo; /* Discovery rescue timer */
416 uint8_t fc_ns_retry; /* retries for fabric nameserver */
417 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */
418
419 spinlock_t work_port_lock;
420 uint32_t work_port_events; /* Timeout to be handled */
421 #define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */
422 #define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */
423 #define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */
424
425 #define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */
426 #define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */
427 #define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */
428 #define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */
429 #define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */
430 #define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */
431
432 struct timer_list els_tmofunc;
433 struct timer_list delayed_disc_tmo;
434
435 int unreg_vpi_cmpl;
436
437 uint8_t load_flag;
438 #define FC_LOADING 0x1 /* HBA in process of loading drvr */
439 #define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */
440 #define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */
441 /* Vport Config Parameters */
442 uint32_t cfg_scan_down;
443 uint32_t cfg_lun_queue_depth;
444 uint32_t cfg_nodev_tmo;
445 uint32_t cfg_devloss_tmo;
446 uint32_t cfg_restrict_login;
447 uint32_t cfg_peer_port_login;
448 uint32_t cfg_fcp_class;
449 uint32_t cfg_use_adisc;
450 uint32_t cfg_discovery_threads;
451 uint32_t cfg_log_verbose;
452 uint32_t cfg_max_luns;
453 uint32_t cfg_enable_da_id;
454 uint32_t cfg_max_scsicmpl_time;
455 uint32_t cfg_tgt_queue_depth;
456 uint32_t cfg_first_burst_size;
457 uint32_t dev_loss_tmo_changed;
458
459 struct fc_vport *fc_vport;
460
461 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
462 struct dentry *debug_disc_trc;
463 struct dentry *debug_nodelist;
464 struct dentry *debug_nvmestat;
465 struct dentry *debug_nvmektime;
466 struct dentry *debug_cpucheck;
467 struct dentry *vport_debugfs_root;
468 struct lpfc_debugfs_trc *disc_trc;
469 atomic_t disc_trc_cnt;
470 #endif
471 uint8_t stat_data_enabled;
472 uint8_t stat_data_blocked;
473 struct list_head rcv_buffer_list;
474 unsigned long rcv_buffer_time_stamp;
475 uint32_t vport_flag;
476 #define STATIC_VPORT 1
477 #define FAWWPN_SET 2
478 #define FAWWPN_PARAM_CHG 4
479
480 uint16_t fdmi_num_disc;
481 uint32_t fdmi_hba_mask;
482 uint32_t fdmi_port_mask;
483
484 /* There is a single nvme instance per vport. */
485 struct nvme_fc_local_port *localport;
486 uint8_t nvmei_support; /* driver supports NVME Initiator */
487 uint32_t last_fcp_wqidx;
488 };
489
490 struct hbq_s {
491 uint16_t entry_count; /* Current number of HBQ slots */
492 uint16_t buffer_count; /* Current number of buffers posted */
493 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */
494 uint32_t hbqPutIdx; /* HBQ slot to use */
495 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
496 void *hbq_virt; /* Virtual ptr to this hbq */
497 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */
498 /* Callback for HBQ buffer allocation */
499 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *);
500 /* Callback for HBQ buffer free */
501 void (*hbq_free_buffer) (struct lpfc_hba *,
502 struct hbq_dmabuf *);
503 };
504
505 /* this matches the position in the lpfc_hbq_defs array */
506 #define LPFC_ELS_HBQ 0
507 #define LPFC_MAX_HBQS 1
508
509 enum hba_temp_state {
510 HBA_NORMAL_TEMP,
511 HBA_OVER_TEMP
512 };
513
514 enum intr_type_t {
515 NONE = 0,
516 INTx,
517 MSI,
518 MSIX,
519 };
520
521 #define LPFC_CT_CTX_MAX 64
522 struct unsol_rcv_ct_ctx {
523 uint32_t ctxt_id;
524 uint32_t SID;
525 uint32_t valid;
526 #define UNSOL_INVALID 0
527 #define UNSOL_VALID 1
528 uint16_t oxid;
529 uint16_t rxid;
530 };
531
532 #define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/
533 #define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */
534 #define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */
535 #define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */
536 #define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */
537 #define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */
538 #define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */
539 #define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */
540 #define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_32G
541 #define LPFC_USER_LINK_SPEED_BITMAP ((1ULL << LPFC_USER_LINK_SPEED_32G) | \
542 (1 << LPFC_USER_LINK_SPEED_16G) | \
543 (1 << LPFC_USER_LINK_SPEED_10G) | \
544 (1 << LPFC_USER_LINK_SPEED_8G) | \
545 (1 << LPFC_USER_LINK_SPEED_4G) | \
546 (1 << LPFC_USER_LINK_SPEED_2G) | \
547 (1 << LPFC_USER_LINK_SPEED_1G) | \
548 (1 << LPFC_USER_LINK_SPEED_AUTO))
549 #define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32"
550
551 enum nemb_type {
552 nemb_mse = 1,
553 nemb_hbd
554 };
555
556 enum mbox_type {
557 mbox_rd = 1,
558 mbox_wr
559 };
560
561 enum dma_type {
562 dma_mbox = 1,
563 dma_ebuf
564 };
565
566 enum sta_type {
567 sta_pre_addr = 1,
568 sta_pos_addr
569 };
570
571 struct lpfc_mbox_ext_buf_ctx {
572 uint32_t state;
573 #define LPFC_BSG_MBOX_IDLE 0
574 #define LPFC_BSG_MBOX_HOST 1
575 #define LPFC_BSG_MBOX_PORT 2
576 #define LPFC_BSG_MBOX_DONE 3
577 #define LPFC_BSG_MBOX_ABTS 4
578 enum nemb_type nembType;
579 enum mbox_type mboxType;
580 uint32_t numBuf;
581 uint32_t mbxTag;
582 uint32_t seqNum;
583 struct lpfc_dmabuf *mbx_dmabuf;
584 struct list_head ext_dmabuf_list;
585 };
586
587 struct lpfc_hba {
588 /* SCSI interface function jump table entries */
589 int (*lpfc_new_scsi_buf)
590 (struct lpfc_vport *, int);
591 struct lpfc_scsi_buf * (*lpfc_get_scsi_buf)
592 (struct lpfc_hba *, struct lpfc_nodelist *);
593 int (*lpfc_scsi_prep_dma_buf)
594 (struct lpfc_hba *, struct lpfc_scsi_buf *);
595 void (*lpfc_scsi_unprep_dma_buf)
596 (struct lpfc_hba *, struct lpfc_scsi_buf *);
597 void (*lpfc_release_scsi_buf)
598 (struct lpfc_hba *, struct lpfc_scsi_buf *);
599 void (*lpfc_rampdown_queue_depth)
600 (struct lpfc_hba *);
601 void (*lpfc_scsi_prep_cmnd)
602 (struct lpfc_vport *, struct lpfc_scsi_buf *,
603 struct lpfc_nodelist *);
604
605 /* IOCB interface function jump table entries */
606 int (*__lpfc_sli_issue_iocb)
607 (struct lpfc_hba *, uint32_t,
608 struct lpfc_iocbq *, uint32_t);
609 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *,
610 struct lpfc_iocbq *);
611 int (*lpfc_hba_down_post)(struct lpfc_hba *phba);
612 IOCB_t * (*lpfc_get_iocb_from_iocbq)
613 (struct lpfc_iocbq *);
614 void (*lpfc_scsi_cmd_iocb_cmpl)
615 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *);
616
617 /* MBOX interface function jump table entries */
618 int (*lpfc_sli_issue_mbox)
619 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
620
621 /* Slow-path IOCB process function jump table entries */
622 void (*lpfc_sli_handle_slow_ring_event)
623 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
624 uint32_t mask);
625
626 /* INIT device interface function jump table entries */
627 int (*lpfc_sli_hbq_to_firmware)
628 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
629 int (*lpfc_sli_brdrestart)
630 (struct lpfc_hba *);
631 int (*lpfc_sli_brdready)
632 (struct lpfc_hba *, uint32_t);
633 void (*lpfc_handle_eratt)
634 (struct lpfc_hba *);
635 void (*lpfc_stop_port)
636 (struct lpfc_hba *);
637 int (*lpfc_hba_init_link)
638 (struct lpfc_hba *, uint32_t);
639 int (*lpfc_hba_down_link)
640 (struct lpfc_hba *, uint32_t);
641 int (*lpfc_selective_reset)
642 (struct lpfc_hba *);
643
644 int (*lpfc_bg_scsi_prep_dma_buf)
645 (struct lpfc_hba *, struct lpfc_scsi_buf *);
646 /* Add new entries here */
647
648 /* SLI4 specific HBA data structure */
649 struct lpfc_sli4_hba sli4_hba;
650
651 struct lpfc_sli sli;
652 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
653 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */
654 uint32_t sli3_options; /* Mask of enabled SLI3 options */
655 #define LPFC_SLI3_HBQ_ENABLED 0x01
656 #define LPFC_SLI3_NPIV_ENABLED 0x02
657 #define LPFC_SLI3_VPORT_TEARDOWN 0x04
658 #define LPFC_SLI3_CRP_ENABLED 0x08
659 #define LPFC_SLI3_BG_ENABLED 0x20
660 #define LPFC_SLI3_DSS_ENABLED 0x40
661 #define LPFC_SLI4_PERFH_ENABLED 0x80
662 #define LPFC_SLI4_PHWQ_ENABLED 0x100
663 uint32_t iocb_cmd_size;
664 uint32_t iocb_rsp_size;
665
666 enum hba_state link_state;
667 uint32_t link_flag; /* link state flags */
668 #define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */
669 /* This flag is set while issuing */
670 /* INIT_LINK mailbox command */
671 #define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */
672 #define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */
673
674 uint32_t hba_flag; /* hba generic flags */
675 #define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */
676 #define DEFER_ERATT 0x2 /* Deferred error attention in progress */
677 #define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */
678 #define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/
679 #define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */
680 #define FCP_XRI_ABORT_EVENT 0x20
681 #define ELS_XRI_ABORT_EVENT 0x40
682 #define ASYNC_EVENT 0x80
683 #define LINK_DISABLED 0x100 /* Link disabled by user */
684 #define FCF_TS_INPROG 0x200 /* FCF table scan in progress */
685 #define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */
686 #define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */
687 #define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */
688 #define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */
689 #define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */
690 #define HBA_FCP_IOQ_FLUSH 0x8000 /* FCP I/O queues being flushed */
691 #define HBA_FW_DUMP_OP 0x10000 /* Skips fn reset before FW dump */
692 #define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */
693 #define HBA_FORCED_LINK_SPEED 0x40000 /*
694 * Firmware supports Forced Link Speed
695 * capability
696 */
697 #define HBA_NVME_IOQ_FLUSH 0x80000 /* NVME IO queues flushed. */
698 #define NVME_XRI_ABORT_EVENT 0x100000
699
700 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
701 struct lpfc_dmabuf slim2p;
702
703 MAILBOX_t *mbox;
704 uint32_t *mbox_ext;
705 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx;
706 uint32_t ha_copy;
707 struct _PCB *pcb;
708 struct _IOCB *IOCBs;
709
710 struct lpfc_dmabuf hbqslimp;
711
712 uint16_t pci_cfg_value;
713
714 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
715
716 uint32_t fc_eventTag; /* event tag for link attention */
717 uint32_t link_events;
718
719 /* These fields used to be binfo */
720 uint32_t fc_pref_DID; /* preferred D_ID */
721 uint8_t fc_pref_ALPA; /* preferred AL_PA */
722 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */
723 uint32_t fc_edtov; /* E_D_TOV timer value */
724 uint32_t fc_arbtov; /* ARB_TOV timer value */
725 uint32_t fc_ratov; /* R_A_TOV timer value */
726 uint32_t fc_rttov; /* R_T_TOV timer value */
727 uint32_t fc_altov; /* AL_TOV timer value */
728 uint32_t fc_crtov; /* C_R_TOV timer value */
729 uint32_t fc_citov; /* C_I_TOV timer value */
730
731 struct serv_parm fc_fabparam; /* fabric service parameters buffer */
732 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */
733
734 uint32_t lmt;
735
736 uint32_t fc_topology; /* link topology, from LINK INIT */
737 uint32_t fc_topology_changed; /* link topology, from LINK INIT */
738
739 struct lpfc_stats fc_stat;
740
741 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
742 uint32_t nport_event_cnt; /* timestamp for nlplist entry */
743
744 uint8_t wwnn[8];
745 uint8_t wwpn[8];
746 uint32_t RandomData[7];
747 uint8_t fcp_embed_io;
748 uint8_t nvme_support; /* Firmware supports NVME */
749 uint8_t nvmet_support; /* driver supports NVMET */
750 #define LPFC_NVMET_MAX_PORTS 32
751 uint8_t mds_diags_support;
752
753 /* HBA Config Parameters */
754 uint32_t cfg_ack0;
755 uint32_t cfg_enable_npiv;
756 uint32_t cfg_enable_rrq;
757 uint32_t cfg_topology;
758 uint32_t cfg_link_speed;
759 #define LPFC_FCF_FOV 1 /* Fast fcf failover */
760 #define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */
761 uint32_t cfg_fcf_failover_policy;
762 uint32_t cfg_fcp_io_sched;
763 uint32_t cfg_fcp2_no_tgt_reset;
764 uint32_t cfg_cr_delay;
765 uint32_t cfg_cr_count;
766 uint32_t cfg_multi_ring_support;
767 uint32_t cfg_multi_ring_rctl;
768 uint32_t cfg_multi_ring_type;
769 uint32_t cfg_poll;
770 uint32_t cfg_poll_tmo;
771 uint32_t cfg_task_mgmt_tmo;
772 uint32_t cfg_use_msi;
773 uint32_t cfg_fcp_imax;
774 uint32_t cfg_fcp_cpu_map;
775 uint32_t cfg_fcp_io_channel;
776 uint32_t cfg_suppress_rsp;
777 uint32_t cfg_nvme_oas;
778 uint32_t cfg_nvme_io_channel;
779 uint32_t cfg_nvmet_mrq;
780 uint32_t cfg_nvmet_mrq_post;
781 uint32_t cfg_enable_nvmet;
782 uint32_t cfg_nvme_enable_fb;
783 uint32_t cfg_nvmet_fb_size;
784 uint32_t cfg_total_seg_cnt;
785 uint32_t cfg_sg_seg_cnt;
786 uint32_t cfg_nvme_seg_cnt;
787 uint32_t cfg_sg_dma_buf_size;
788 uint64_t cfg_soft_wwnn;
789 uint64_t cfg_soft_wwpn;
790 uint32_t cfg_hba_queue_depth;
791 uint32_t cfg_enable_hba_reset;
792 uint32_t cfg_enable_hba_heartbeat;
793 uint32_t cfg_fof;
794 uint32_t cfg_EnableXLane;
795 uint8_t cfg_oas_tgt_wwpn[8];
796 uint8_t cfg_oas_vpt_wwpn[8];
797 uint32_t cfg_oas_lun_state;
798 #define OAS_LUN_ENABLE 1
799 #define OAS_LUN_DISABLE 0
800 uint32_t cfg_oas_lun_status;
801 #define OAS_LUN_STATUS_EXISTS 0x01
802 uint32_t cfg_oas_flags;
803 #define OAS_FIND_ANY_VPORT 0x01
804 #define OAS_FIND_ANY_TARGET 0x02
805 #define OAS_LUN_VALID 0x04
806 uint32_t cfg_oas_priority;
807 uint32_t cfg_XLanePriority;
808 uint32_t cfg_enable_bg;
809 uint32_t cfg_prot_mask;
810 uint32_t cfg_prot_guard;
811 uint32_t cfg_hostmem_hgp;
812 uint32_t cfg_log_verbose;
813 uint32_t cfg_aer_support;
814 uint32_t cfg_sriov_nr_virtfn;
815 uint32_t cfg_request_firmware_upgrade;
816 uint32_t cfg_iocb_cnt;
817 uint32_t cfg_suppress_link_up;
818 uint32_t cfg_rrq_xri_bitmap_sz;
819 uint32_t cfg_delay_discovery;
820 uint32_t cfg_sli_mode;
821 #define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */
822 #define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */
823 #define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */
824 uint32_t cfg_enable_dss;
825 uint32_t cfg_fdmi_on;
826 #define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */
827 #define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */
828 uint32_t cfg_enable_SmartSAN;
829 uint32_t cfg_enable_mds_diags;
830 uint32_t cfg_enable_fc4_type;
831 uint32_t cfg_xri_split;
832 #define LPFC_ENABLE_FCP 1
833 #define LPFC_ENABLE_NVME 2
834 #define LPFC_ENABLE_BOTH 3
835 uint32_t io_channel_irqs; /* number of irqs for io channels */
836 struct nvmet_fc_target_port *targetport;
837 lpfc_vpd_t vpd; /* vital product data */
838
839 struct pci_dev *pcidev;
840 struct list_head work_list;
841 uint32_t work_ha; /* Host Attention Bits for WT */
842 uint32_t work_ha_mask; /* HA Bits owned by WT */
843 uint32_t work_hs; /* HS stored in case of ERRAT */
844 uint32_t work_status[2]; /* Extra status from SLIM */
845
846 wait_queue_head_t work_waitq;
847 struct task_struct *worker_thread;
848 unsigned long data_flags;
849
850 uint32_t hbq_in_use; /* HBQs in use flag */
851 uint32_t hbq_count; /* Count of configured HBQs */
852 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */
853
854 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */
855 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */
856
857 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */
858 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */
859 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */
860 void __iomem *slim_memmap_p; /* Kernel memory mapped address for
861 PCI BAR0 */
862 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
863 PCI BAR2 */
864
865 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for
866 PCI BAR0 with dual-ULP support */
867 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for
868 PCI BAR2 with dual-ULP support */
869 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for
870 PCI BAR4 with dual-ULP support */
871 #define PCI_64BIT_BAR0 0
872 #define PCI_64BIT_BAR2 2
873 #define PCI_64BIT_BAR4 4
874 void __iomem *MBslimaddr; /* virtual address for mbox cmds */
875 void __iomem *HAregaddr; /* virtual address for host attn reg */
876 void __iomem *CAregaddr; /* virtual address for chip attn reg */
877 void __iomem *HSregaddr; /* virtual address for host status
878 reg */
879 void __iomem *HCregaddr; /* virtual address for host ctl reg */
880
881 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */
882 struct lpfc_pgp *port_gp;
883 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */
884 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */
885
886 int brd_no; /* FC board number */
887 char SerialNumber[32]; /* adapter Serial Number */
888 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */
889 char ModelDesc[256]; /* Model Description */
890 char ModelName[80]; /* Model Name */
891 char ProgramType[256]; /* Program Type */
892 char Port[20]; /* Port No */
893 uint8_t vpd_flag; /* VPD data flag */
894
895 #define VPD_MODEL_DESC 0x1 /* valid vpd model description */
896 #define VPD_MODEL_NAME 0x2 /* valid vpd model name */
897 #define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */
898 #define VPD_PORT 0x8 /* valid vpd port data */
899 #define VPD_MASK 0xf /* mask for any vpd data */
900
901 uint8_t soft_wwn_enable;
902
903 struct timer_list fcp_poll_timer;
904 struct timer_list eratt_poll;
905 uint32_t eratt_poll_interval;
906
907 /*
908 * stat counters
909 */
910 uint64_t fc4ScsiInputRequests;
911 uint64_t fc4ScsiOutputRequests;
912 uint64_t fc4ScsiControlRequests;
913 uint64_t fc4ScsiIoCmpls;
914 uint64_t fc4NvmeInputRequests;
915 uint64_t fc4NvmeOutputRequests;
916 uint64_t fc4NvmeControlRequests;
917 uint64_t fc4NvmeIoCmpls;
918 uint64_t fc4NvmeLsRequests;
919 uint64_t fc4NvmeLsCmpls;
920
921 uint64_t bg_guard_err_cnt;
922 uint64_t bg_apptag_err_cnt;
923 uint64_t bg_reftag_err_cnt;
924
925 /* fastpath list. */
926 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */
927 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */
928 struct list_head lpfc_scsi_buf_list_get;
929 struct list_head lpfc_scsi_buf_list_put;
930 uint32_t total_scsi_bufs;
931 spinlock_t nvme_buf_list_get_lock; /* NVME buf alloc list lock */
932 spinlock_t nvme_buf_list_put_lock; /* NVME buf free list lock */
933 struct list_head lpfc_nvme_buf_list_get;
934 struct list_head lpfc_nvme_buf_list_put;
935 uint32_t total_nvme_bufs;
936 struct list_head lpfc_iocb_list;
937 uint32_t total_iocbq_bufs;
938 struct list_head active_rrq_list;
939 spinlock_t hbalock;
940
941 /* pci_mem_pools */
942 struct pci_pool *lpfc_sg_dma_buf_pool;
943 struct pci_pool *lpfc_mbuf_pool;
944 struct pci_pool *lpfc_hrb_pool; /* header receive buffer pool */
945 struct pci_pool *lpfc_drb_pool; /* data receive buffer pool */
946 struct pci_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
947 struct pci_pool *txrdy_payload_pool;
948 struct lpfc_dma_pool lpfc_mbuf_safety_pool;
949
950 mempool_t *mbox_mem_pool;
951 mempool_t *nlp_mem_pool;
952 mempool_t *rrq_pool;
953 mempool_t *active_rrq_pool;
954
955 struct fc_host_statistics link_stats;
956 enum intr_type_t intr_type;
957 uint32_t intr_mode;
958 #define LPFC_INTR_ERROR 0xFFFFFFFF
959 struct list_head port_list;
960 struct lpfc_vport *pport; /* physical lpfc_vport pointer */
961 uint16_t max_vpi; /* Maximum virtual nports */
962 #define LPFC_MAX_VPI 0xFFFF /* Max number of VPI supported */
963 uint16_t max_vports; /*
964 * For IOV HBAs max_vpi can change
965 * after a reset. max_vports is max
966 * number of vports present. This can
967 * be greater than max_vpi.
968 */
969 uint16_t vpi_base;
970 uint16_t vfi_base;
971 unsigned long *vpi_bmask; /* vpi allocation table */
972 uint16_t *vpi_ids;
973 uint16_t vpi_count;
974 struct list_head lpfc_vpi_blk_list;
975
976 /* Data structure used by fabric iocb scheduler */
977 struct list_head fabric_iocb_list;
978 atomic_t fabric_iocb_count;
979 struct timer_list fabric_block_timer;
980 unsigned long bit_flags;
981 #define FABRIC_COMANDS_BLOCKED 0
982 atomic_t num_rsrc_err;
983 atomic_t num_cmd_success;
984 unsigned long last_rsrc_error_time;
985 unsigned long last_ramp_down_time;
986 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
987 struct dentry *hba_debugfs_root;
988 atomic_t debugfs_vport_count;
989 struct dentry *debug_hbqinfo;
990 struct dentry *debug_dumpHostSlim;
991 struct dentry *debug_dumpHBASlim;
992 struct dentry *debug_dumpData; /* BlockGuard BPL */
993 struct dentry *debug_dumpDif; /* BlockGuard BPL */
994 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */
995 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */
996 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */
997 struct dentry *debug_writeGuard; /* inject write guard_tag errors */
998 struct dentry *debug_writeApp; /* inject write app_tag errors */
999 struct dentry *debug_writeRef; /* inject write ref_tag errors */
1000 struct dentry *debug_readGuard; /* inject read guard_tag errors */
1001 struct dentry *debug_readApp; /* inject read app_tag errors */
1002 struct dentry *debug_readRef; /* inject read ref_tag errors */
1003
1004 struct dentry *debug_nvmeio_trc;
1005 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc;
1006 atomic_t nvmeio_trc_cnt;
1007 uint32_t nvmeio_trc_size;
1008 uint32_t nvmeio_trc_output_idx;
1009
1010 /* T10 DIF error injection */
1011 uint32_t lpfc_injerr_wgrd_cnt;
1012 uint32_t lpfc_injerr_wapp_cnt;
1013 uint32_t lpfc_injerr_wref_cnt;
1014 uint32_t lpfc_injerr_rgrd_cnt;
1015 uint32_t lpfc_injerr_rapp_cnt;
1016 uint32_t lpfc_injerr_rref_cnt;
1017 uint32_t lpfc_injerr_nportid;
1018 struct lpfc_name lpfc_injerr_wwpn;
1019 sector_t lpfc_injerr_lba;
1020 #define LPFC_INJERR_LBA_OFF (sector_t)(-1)
1021
1022 struct dentry *debug_slow_ring_trc;
1023 struct lpfc_debugfs_trc *slow_ring_trc;
1024 atomic_t slow_ring_trc_cnt;
1025 /* iDiag debugfs sub-directory */
1026 struct dentry *idiag_root;
1027 struct dentry *idiag_pci_cfg;
1028 struct dentry *idiag_bar_acc;
1029 struct dentry *idiag_que_info;
1030 struct dentry *idiag_que_acc;
1031 struct dentry *idiag_drb_acc;
1032 struct dentry *idiag_ctl_acc;
1033 struct dentry *idiag_mbx_acc;
1034 struct dentry *idiag_ext_acc;
1035 uint8_t lpfc_idiag_last_eq;
1036 #endif
1037 uint16_t nvmeio_trc_on;
1038
1039 /* Used for deferred freeing of ELS data buffers */
1040 struct list_head elsbuf;
1041 int elsbuf_cnt;
1042 int elsbuf_prev_cnt;
1043
1044 uint8_t temp_sensor_support;
1045 /* Fields used for heart beat. */
1046 unsigned long last_completion_time;
1047 unsigned long skipped_hb;
1048 struct timer_list hb_tmofunc;
1049 uint8_t hb_outstanding;
1050 struct timer_list rrq_tmr;
1051 enum hba_temp_state over_temp_state;
1052 /* ndlp reference management */
1053 spinlock_t ndlp_lock;
1054 /*
1055 * Following bit will be set for all buffer tags which are not
1056 * associated with any HBQ.
1057 */
1058 #define QUE_BUFTAG_BIT (1<<31)
1059 uint32_t buffer_tag_count;
1060 int wait_4_mlo_maint_flg;
1061 wait_queue_head_t wait_4_mlo_m_q;
1062 /* data structure used for latency data collection */
1063 #define LPFC_NO_BUCKET 0
1064 #define LPFC_LINEAR_BUCKET 1
1065 #define LPFC_POWER2_BUCKET 2
1066 uint8_t bucket_type;
1067 uint32_t bucket_base;
1068 uint32_t bucket_step;
1069
1070 /* Maximum number of events that can be outstanding at any time*/
1071 #define LPFC_MAX_EVT_COUNT 512
1072 atomic_t fast_event_count;
1073 uint32_t fcoe_eventtag;
1074 uint32_t fcoe_eventtag_at_fcf_scan;
1075 uint32_t fcoe_cvl_eventtag;
1076 uint32_t fcoe_cvl_eventtag_attn;
1077 struct lpfc_fcf fcf;
1078 uint8_t fc_map[3];
1079 uint8_t valid_vlan;
1080 uint16_t vlan_id;
1081 struct list_head fcf_conn_rec_list;
1082
1083 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
1084 struct list_head ct_ev_waiters;
1085 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX];
1086 uint32_t ctx_idx;
1087
1088 uint8_t menlo_flag; /* menlo generic flags */
1089 #define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */
1090 uint32_t iocb_cnt;
1091 uint32_t iocb_max;
1092 atomic_t sdev_cnt;
1093 uint8_t fips_spec_rev;
1094 uint8_t fips_level;
1095 spinlock_t devicelock; /* lock for luns list */
1096 mempool_t *device_data_mem_pool;
1097 struct list_head luns;
1098 #define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080
1099 #define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040
1100 #define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020
1101 #define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010
1102 #define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008
1103 #define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004
1104 #define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002
1105 #define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001
1106 #define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000
1107 #define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000
1108 uint16_t sfp_alarm;
1109 uint16_t sfp_warning;
1110
1111 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1112 #define LPFC_CHECK_CPU_CNT 32
1113 uint32_t cpucheck_rcv_io[LPFC_CHECK_CPU_CNT];
1114 uint32_t cpucheck_xmt_io[LPFC_CHECK_CPU_CNT];
1115 uint32_t cpucheck_cmpl_io[LPFC_CHECK_CPU_CNT];
1116 uint32_t cpucheck_ccmpl_io[LPFC_CHECK_CPU_CNT];
1117 uint16_t cpucheck_on;
1118 #define LPFC_CHECK_OFF 0
1119 #define LPFC_CHECK_NVME_IO 1
1120 #define LPFC_CHECK_NVMET_RCV 2
1121 #define LPFC_CHECK_NVMET_IO 4
1122 uint16_t ktime_on;
1123 uint64_t ktime_data_samples;
1124 uint64_t ktime_status_samples;
1125 uint64_t ktime_last_cmd;
1126 uint64_t ktime_seg1_total;
1127 uint64_t ktime_seg1_min;
1128 uint64_t ktime_seg1_max;
1129 uint64_t ktime_seg2_total;
1130 uint64_t ktime_seg2_min;
1131 uint64_t ktime_seg2_max;
1132 uint64_t ktime_seg3_total;
1133 uint64_t ktime_seg3_min;
1134 uint64_t ktime_seg3_max;
1135 uint64_t ktime_seg4_total;
1136 uint64_t ktime_seg4_min;
1137 uint64_t ktime_seg4_max;
1138 uint64_t ktime_seg5_total;
1139 uint64_t ktime_seg5_min;
1140 uint64_t ktime_seg5_max;
1141 uint64_t ktime_seg6_total;
1142 uint64_t ktime_seg6_min;
1143 uint64_t ktime_seg6_max;
1144 uint64_t ktime_seg7_total;
1145 uint64_t ktime_seg7_min;
1146 uint64_t ktime_seg7_max;
1147 uint64_t ktime_seg8_total;
1148 uint64_t ktime_seg8_min;
1149 uint64_t ktime_seg8_max;
1150 uint64_t ktime_seg9_total;
1151 uint64_t ktime_seg9_min;
1152 uint64_t ktime_seg9_max;
1153 uint64_t ktime_seg10_total;
1154 uint64_t ktime_seg10_min;
1155 uint64_t ktime_seg10_max;
1156 #endif
1157 };
1158
1159 static inline struct Scsi_Host *
1160 lpfc_shost_from_vport(struct lpfc_vport *vport)
1161 {
1162 return container_of((void *) vport, struct Scsi_Host, hostdata[0]);
1163 }
1164
1165 static inline void
1166 lpfc_set_loopback_flag(struct lpfc_hba *phba)
1167 {
1168 if (phba->cfg_topology == FLAGS_LOCAL_LB)
1169 phba->link_flag |= LS_LOOPBACK_MODE;
1170 else
1171 phba->link_flag &= ~LS_LOOPBACK_MODE;
1172 }
1173
1174 static inline int
1175 lpfc_is_link_up(struct lpfc_hba *phba)
1176 {
1177 return phba->link_state == LPFC_LINK_UP ||
1178 phba->link_state == LPFC_CLEAR_LA ||
1179 phba->link_state == LPFC_HBA_READY;
1180 }
1181
1182 static inline void
1183 lpfc_worker_wake_up(struct lpfc_hba *phba)
1184 {
1185 /* Set the lpfc data pending flag */
1186 set_bit(LPFC_DATA_READY, &phba->data_flags);
1187
1188 /* Wake up worker thread */
1189 wake_up(&phba->work_waitq);
1190 return;
1191 }
1192
1193 static inline int
1194 lpfc_readl(void __iomem *addr, uint32_t *data)
1195 {
1196 uint32_t temp;
1197 temp = readl(addr);
1198 if (temp == 0xffffffff)
1199 return -EIO;
1200 *data = temp;
1201 return 0;
1202 }
1203
1204 static inline int
1205 lpfc_sli_read_hs(struct lpfc_hba *phba)
1206 {
1207 /*
1208 * There was a link/board error. Read the status register to retrieve
1209 * the error event and process it.
1210 */
1211 phba->sli.slistat.err_attn_event++;
1212
1213 /* Save status info and check for unplug error */
1214 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) ||
1215 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) ||
1216 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) {
1217 return -EIO;
1218 }
1219
1220 /* Clear chip Host Attention error bit */
1221 writel(HA_ERATT, phba->HAregaddr);
1222 readl(phba->HAregaddr); /* flush */
1223 phba->pport->stopped = 1;
1224
1225 return 0;
1226 }
1227
1228 static inline struct lpfc_sli_ring *
1229 lpfc_phba_elsring(struct lpfc_hba *phba)
1230 {
1231 if (phba->sli_rev == LPFC_SLI_REV4)
1232 return phba->sli4_hba.els_wq->pring;
1233 return &phba->sli.sli3_ring[LPFC_ELS_RING];
1234 }
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