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1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2009-2016 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com *
7 * *
8 * This program is free software; you can redistribute it and/or *
9 * modify it under the terms of version 2 of the GNU General *
10 * Public License as published by the Free Software Foundation. *
11 * This program is distributed in the hope that it will be useful. *
12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
16 * TO BE LEGALLY INVALID. See the GNU General Public License for *
17 * more details, a copy of which can be found in the file COPYING *
18 * included with this package. *
19 *******************************************************************/
20
21 #define LPFC_ACTIVE_MBOX_WAIT_CNT 100
22 #define LPFC_XRI_EXCH_BUSY_WAIT_TMO 10000
23 #define LPFC_XRI_EXCH_BUSY_WAIT_T1 10
24 #define LPFC_XRI_EXCH_BUSY_WAIT_T2 30000
25 #define LPFC_RELEASE_NOTIFICATION_INTERVAL 32
26 #define LPFC_RPI_LOW_WATER_MARK 10
27
28 #define LPFC_UNREG_FCF 1
29 #define LPFC_SKIP_UNREG_FCF 0
30
31 /* Amount of time in seconds for waiting FCF rediscovery to complete */
32 #define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */
33
34 /* Number of SGL entries can be posted in a 4KB nonembedded mbox command */
35 #define LPFC_NEMBED_MBOX_SGL_CNT 254
36
37 /* Multi-queue arrangement for FCP EQ/CQ/WQ tuples */
38 #define LPFC_FCP_IO_CHAN_DEF 4
39 #define LPFC_FCP_IO_CHAN_MIN 1
40 #define LPFC_FCP_IO_CHAN_MAX 16
41
42 /* Number of channels used for Flash Optimized Fabric (FOF) operations */
43
44 #define LPFC_FOF_IO_CHAN_NUM 1
45
46 /*
47 * Provide the default FCF Record attributes used by the driver
48 * when nonFIP mode is configured and there is no other default
49 * FCF Record attributes.
50 */
51 #define LPFC_FCOE_FCF_DEF_INDEX 0
52 #define LPFC_FCOE_FCF_GET_FIRST 0xFFFF
53 #define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF
54
55 #define LPFC_FCOE_NULL_VID 0xFFF
56 #define LPFC_FCOE_IGNORE_VID 0xFFFF
57
58 /* First 3 bytes of default FCF MAC is specified by FC_MAP */
59 #define LPFC_FCOE_FCF_MAC3 0xFF
60 #define LPFC_FCOE_FCF_MAC4 0xFF
61 #define LPFC_FCOE_FCF_MAC5 0xFE
62 #define LPFC_FCOE_FCF_MAP0 0x0E
63 #define LPFC_FCOE_FCF_MAP1 0xFC
64 #define LPFC_FCOE_FCF_MAP2 0x00
65 #define LPFC_FCOE_MAX_RCV_SIZE 0x800
66 #define LPFC_FCOE_FKA_ADV_PER 0
67 #define LPFC_FCOE_FIP_PRIORITY 0x80
68
69 #define sli4_sid_from_fc_hdr(fc_hdr) \
70 ((fc_hdr)->fh_s_id[0] << 16 | \
71 (fc_hdr)->fh_s_id[1] << 8 | \
72 (fc_hdr)->fh_s_id[2])
73
74 #define sli4_did_from_fc_hdr(fc_hdr) \
75 ((fc_hdr)->fh_d_id[0] << 16 | \
76 (fc_hdr)->fh_d_id[1] << 8 | \
77 (fc_hdr)->fh_d_id[2])
78
79 #define sli4_fctl_from_fc_hdr(fc_hdr) \
80 ((fc_hdr)->fh_f_ctl[0] << 16 | \
81 (fc_hdr)->fh_f_ctl[1] << 8 | \
82 (fc_hdr)->fh_f_ctl[2])
83
84 #define sli4_type_from_fc_hdr(fc_hdr) \
85 ((fc_hdr)->fh_type)
86
87 #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000
88
89 #define INT_FW_UPGRADE 0
90 #define RUN_FW_UPGRADE 1
91
92 enum lpfc_sli4_queue_type {
93 LPFC_EQ,
94 LPFC_GCQ,
95 LPFC_MCQ,
96 LPFC_WCQ,
97 LPFC_RCQ,
98 LPFC_MQ,
99 LPFC_WQ,
100 LPFC_HRQ,
101 LPFC_DRQ
102 };
103
104 /* The queue sub-type defines the functional purpose of the queue */
105 enum lpfc_sli4_queue_subtype {
106 LPFC_NONE,
107 LPFC_MBOX,
108 LPFC_FCP,
109 LPFC_ELS,
110 LPFC_USOL
111 };
112
113 union sli4_qe {
114 void *address;
115 struct lpfc_eqe *eqe;
116 struct lpfc_cqe *cqe;
117 struct lpfc_mcqe *mcqe;
118 struct lpfc_wcqe_complete *wcqe_complete;
119 struct lpfc_wcqe_release *wcqe_release;
120 struct sli4_wcqe_xri_aborted *wcqe_xri_aborted;
121 struct lpfc_rcqe_complete *rcqe_complete;
122 struct lpfc_mqe *mqe;
123 union lpfc_wqe *wqe;
124 union lpfc_wqe128 *wqe128;
125 struct lpfc_rqe *rqe;
126 };
127
128 struct lpfc_queue {
129 struct list_head list;
130 enum lpfc_sli4_queue_type type;
131 enum lpfc_sli4_queue_subtype subtype;
132 struct lpfc_hba *phba;
133 struct list_head child_list;
134 uint32_t entry_count; /* Number of entries to support on the queue */
135 uint32_t entry_size; /* Size of each queue entry. */
136 uint32_t entry_repost; /* Count of entries before doorbell is rung */
137 #define LPFC_QUEUE_MIN_REPOST 8
138 uint32_t queue_id; /* Queue ID assigned by the hardware */
139 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */
140 struct list_head page_list;
141 uint32_t page_count; /* Number of pages allocated for this queue */
142 uint32_t host_index; /* The host's index for putting or getting */
143 uint32_t hba_index; /* The last known hba index for get or put */
144
145 struct lpfc_sli_ring *pring; /* ptr to io ring associated with q */
146
147 uint16_t db_format;
148 #define LPFC_DB_RING_FORMAT 0x01
149 #define LPFC_DB_LIST_FORMAT 0x02
150 void __iomem *db_regaddr;
151 /* For q stats */
152 uint32_t q_cnt_1;
153 uint32_t q_cnt_2;
154 uint32_t q_cnt_3;
155 uint64_t q_cnt_4;
156 /* defines for EQ stats */
157 #define EQ_max_eqe q_cnt_1
158 #define EQ_no_entry q_cnt_2
159 #define EQ_badstate q_cnt_3
160 #define EQ_processed q_cnt_4
161
162 /* defines for CQ stats */
163 #define CQ_mbox q_cnt_1
164 #define CQ_max_cqe q_cnt_1
165 #define CQ_release_wqe q_cnt_2
166 #define CQ_xri_aborted q_cnt_3
167 #define CQ_wq q_cnt_4
168
169 /* defines for WQ stats */
170 #define WQ_overflow q_cnt_1
171 #define WQ_posted q_cnt_4
172
173 /* defines for RQ stats */
174 #define RQ_no_posted_buf q_cnt_1
175 #define RQ_no_buf_found q_cnt_2
176 #define RQ_buf_trunc q_cnt_3
177 #define RQ_rcv_buf q_cnt_4
178
179 union sli4_qe qe[1]; /* array to index entries (must be last) */
180 };
181
182 struct lpfc_sli4_link {
183 uint16_t speed;
184 uint8_t duplex;
185 uint8_t status;
186 uint8_t type;
187 uint8_t number;
188 uint8_t fault;
189 uint16_t logical_speed;
190 uint16_t topology;
191 };
192
193 struct lpfc_fcf_rec {
194 uint8_t fabric_name[8];
195 uint8_t switch_name[8];
196 uint8_t mac_addr[6];
197 uint16_t fcf_indx;
198 uint32_t priority;
199 uint16_t vlan_id;
200 uint32_t addr_mode;
201 uint32_t flag;
202 #define BOOT_ENABLE 0x01
203 #define RECORD_VALID 0x02
204 };
205
206 struct lpfc_fcf_pri_rec {
207 uint16_t fcf_index;
208 #define LPFC_FCF_ON_PRI_LIST 0x0001
209 #define LPFC_FCF_FLOGI_FAILED 0x0002
210 uint16_t flag;
211 uint32_t priority;
212 };
213
214 struct lpfc_fcf_pri {
215 struct list_head list;
216 struct lpfc_fcf_pri_rec fcf_rec;
217 };
218
219 /*
220 * Maximum FCF table index, it is for driver internal book keeping, it
221 * just needs to be no less than the supported HBA's FCF table size.
222 */
223 #define LPFC_SLI4_FCF_TBL_INDX_MAX 32
224
225 struct lpfc_fcf {
226 uint16_t fcfi;
227 uint32_t fcf_flag;
228 #define FCF_AVAILABLE 0x01 /* FCF available for discovery */
229 #define FCF_REGISTERED 0x02 /* FCF registered with FW */
230 #define FCF_SCAN_DONE 0x04 /* FCF table scan done */
231 #define FCF_IN_USE 0x08 /* Atleast one discovery completed */
232 #define FCF_INIT_DISC 0x10 /* Initial FCF discovery */
233 #define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */
234 #define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */
235 #define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC)
236 #define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */
237 #define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */
238 #define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */
239 #define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT)
240 uint32_t addr_mode;
241 uint32_t eligible_fcf_cnt;
242 struct lpfc_fcf_rec current_rec;
243 struct lpfc_fcf_rec failover_rec;
244 struct list_head fcf_pri_list;
245 struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX];
246 uint32_t current_fcf_scan_pri;
247 struct timer_list redisc_wait;
248 unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */
249 };
250
251
252 #define LPFC_REGION23_SIGNATURE "RG23"
253 #define LPFC_REGION23_VERSION 1
254 #define LPFC_REGION23_LAST_REC 0xff
255 #define DRIVER_SPECIFIC_TYPE 0xA2
256 #define LINUX_DRIVER_ID 0x20
257 #define PORT_STE_TYPE 0x1
258
259 struct lpfc_fip_param_hdr {
260 uint8_t type;
261 #define FCOE_PARAM_TYPE 0xA0
262 uint8_t length;
263 #define FCOE_PARAM_LENGTH 2
264 uint8_t parm_version;
265 #define FIPP_VERSION 0x01
266 uint8_t parm_flags;
267 #define lpfc_fip_param_hdr_fipp_mode_SHIFT 6
268 #define lpfc_fip_param_hdr_fipp_mode_MASK 0x3
269 #define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags
270 #define FIPP_MODE_ON 0x1
271 #define FIPP_MODE_OFF 0x0
272 #define FIPP_VLAN_VALID 0x1
273 };
274
275 struct lpfc_fcoe_params {
276 uint8_t fc_map[3];
277 uint8_t reserved1;
278 uint16_t vlan_tag;
279 uint8_t reserved[2];
280 };
281
282 struct lpfc_fcf_conn_hdr {
283 uint8_t type;
284 #define FCOE_CONN_TBL_TYPE 0xA1
285 uint8_t length; /* words */
286 uint8_t reserved[2];
287 };
288
289 struct lpfc_fcf_conn_rec {
290 uint16_t flags;
291 #define FCFCNCT_VALID 0x0001
292 #define FCFCNCT_BOOT 0x0002
293 #define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */
294 #define FCFCNCT_FBNM_VALID 0x0008
295 #define FCFCNCT_SWNM_VALID 0x0010
296 #define FCFCNCT_VLAN_VALID 0x0020
297 #define FCFCNCT_AM_VALID 0x0040
298 #define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */
299 #define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */
300
301 uint16_t vlan_tag;
302 uint8_t fabric_name[8];
303 uint8_t switch_name[8];
304 };
305
306 struct lpfc_fcf_conn_entry {
307 struct list_head list;
308 struct lpfc_fcf_conn_rec conn_rec;
309 };
310
311 /*
312 * Define the host's bootstrap mailbox. This structure contains
313 * the member attributes needed to create, use, and destroy the
314 * bootstrap mailbox region.
315 *
316 * The macro definitions for the bmbx data structure are defined
317 * in lpfc_hw4.h with the register definition.
318 */
319 struct lpfc_bmbx {
320 struct lpfc_dmabuf *dmabuf;
321 struct dma_address dma_address;
322 void *avirt;
323 dma_addr_t aphys;
324 uint32_t bmbx_size;
325 };
326
327 #define LPFC_EQE_SIZE LPFC_EQE_SIZE_4
328
329 #define LPFC_EQE_SIZE_4B 4
330 #define LPFC_EQE_SIZE_16B 16
331 #define LPFC_CQE_SIZE 16
332 #define LPFC_WQE_SIZE 64
333 #define LPFC_WQE128_SIZE 128
334 #define LPFC_MQE_SIZE 256
335 #define LPFC_RQE_SIZE 8
336
337 #define LPFC_EQE_DEF_COUNT 1024
338 #define LPFC_CQE_DEF_COUNT 1024
339 #define LPFC_WQE_DEF_COUNT 256
340 #define LPFC_WQE128_DEF_COUNT 128
341 #define LPFC_MQE_DEF_COUNT 16
342 #define LPFC_RQE_DEF_COUNT 512
343
344 #define LPFC_QUEUE_NOARM false
345 #define LPFC_QUEUE_REARM true
346
347
348 /*
349 * SLI4 CT field defines
350 */
351 #define SLI4_CT_RPI 0
352 #define SLI4_CT_VPI 1
353 #define SLI4_CT_VFI 2
354 #define SLI4_CT_FCFI 3
355
356 /*
357 * SLI4 specific data structures
358 */
359 struct lpfc_max_cfg_param {
360 uint16_t max_xri;
361 uint16_t xri_base;
362 uint16_t xri_used;
363 uint16_t max_rpi;
364 uint16_t rpi_base;
365 uint16_t rpi_used;
366 uint16_t max_vpi;
367 uint16_t vpi_base;
368 uint16_t vpi_used;
369 uint16_t max_vfi;
370 uint16_t vfi_base;
371 uint16_t vfi_used;
372 uint16_t max_fcfi;
373 uint16_t fcfi_used;
374 uint16_t max_eq;
375 uint16_t max_rq;
376 uint16_t max_cq;
377 uint16_t max_wq;
378 };
379
380 struct lpfc_hba;
381 /* SLI4 HBA multi-fcp queue handler struct */
382 struct lpfc_fcp_eq_hdl {
383 uint32_t idx;
384 struct lpfc_hba *phba;
385 atomic_t fcp_eq_in_use;
386 };
387
388 /* Port Capabilities for SLI4 Parameters */
389 struct lpfc_pc_sli4_params {
390 uint32_t supported;
391 uint32_t if_type;
392 uint32_t sli_rev;
393 uint32_t sli_family;
394 uint32_t featurelevel_1;
395 uint32_t featurelevel_2;
396 uint32_t proto_types;
397 #define LPFC_SLI4_PROTO_FCOE 0x0000001
398 #define LPFC_SLI4_PROTO_FC 0x0000002
399 #define LPFC_SLI4_PROTO_NIC 0x0000004
400 #define LPFC_SLI4_PROTO_ISCSI 0x0000008
401 #define LPFC_SLI4_PROTO_RDMA 0x0000010
402 uint32_t sge_supp_len;
403 uint32_t if_page_sz;
404 uint32_t rq_db_window;
405 uint32_t loopbk_scope;
406 uint32_t oas_supported;
407 uint32_t eq_pages_max;
408 uint32_t eqe_size;
409 uint32_t cq_pages_max;
410 uint32_t cqe_size;
411 uint32_t mq_pages_max;
412 uint32_t mqe_size;
413 uint32_t mq_elem_cnt;
414 uint32_t wq_pages_max;
415 uint32_t wqe_size;
416 uint32_t rq_pages_max;
417 uint32_t rqe_size;
418 uint32_t hdr_pages_max;
419 uint32_t hdr_size;
420 uint32_t hdr_pp_align;
421 uint32_t sgl_pages_max;
422 uint32_t sgl_pp_align;
423 uint8_t cqv;
424 uint8_t mqv;
425 uint8_t wqv;
426 uint8_t rqv;
427 uint8_t wqsize;
428 #define LPFC_WQ_SZ64_SUPPORT 1
429 #define LPFC_WQ_SZ128_SUPPORT 2
430 };
431
432 struct lpfc_iov {
433 uint32_t pf_number;
434 uint32_t vf_number;
435 };
436
437 struct lpfc_sli4_lnk_info {
438 uint8_t lnk_dv;
439 #define LPFC_LNK_DAT_INVAL 0
440 #define LPFC_LNK_DAT_VAL 1
441 uint8_t lnk_tp;
442 #define LPFC_LNK_GE 0x0 /* FCoE */
443 #define LPFC_LNK_FC 0x1 /* FC */
444 uint8_t lnk_no;
445 uint8_t optic_state;
446 };
447
448 #define LPFC_SLI4_HANDLER_CNT (LPFC_FCP_IO_CHAN_MAX+ \
449 LPFC_FOF_IO_CHAN_NUM)
450 #define LPFC_SLI4_HANDLER_NAME_SZ 16
451
452 /* Used for IRQ vector to CPU mapping */
453 struct lpfc_vector_map_info {
454 uint16_t phys_id;
455 uint16_t core_id;
456 uint16_t irq;
457 uint16_t channel_id;
458 };
459 #define LPFC_VECTOR_MAP_EMPTY 0xffff
460
461 /* SLI4 HBA data structure entries */
462 struct lpfc_sli4_hba {
463 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for
464 PCI BAR0, config space registers */
465 void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for
466 PCI BAR1, control registers */
467 void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for
468 PCI BAR2, doorbell registers */
469 union {
470 struct {
471 /* IF Type 0, BAR 0 PCI cfg space reg mem map */
472 void __iomem *UERRLOregaddr;
473 void __iomem *UERRHIregaddr;
474 void __iomem *UEMASKLOregaddr;
475 void __iomem *UEMASKHIregaddr;
476 } if_type0;
477 struct {
478 /* IF Type 2, BAR 0 PCI cfg space reg mem map. */
479 void __iomem *STATUSregaddr;
480 void __iomem *CTRLregaddr;
481 void __iomem *ERR1regaddr;
482 #define SLIPORT_ERR1_REG_ERR_CODE_1 0x1
483 #define SLIPORT_ERR1_REG_ERR_CODE_2 0x2
484 void __iomem *ERR2regaddr;
485 #define SLIPORT_ERR2_REG_FW_RESTART 0x0
486 #define SLIPORT_ERR2_REG_FUNC_PROVISON 0x1
487 #define SLIPORT_ERR2_REG_FORCED_DUMP 0x2
488 #define SLIPORT_ERR2_REG_FAILURE_EQ 0x3
489 #define SLIPORT_ERR2_REG_FAILURE_CQ 0x4
490 #define SLIPORT_ERR2_REG_FAILURE_BUS 0x5
491 #define SLIPORT_ERR2_REG_FAILURE_RQ 0x6
492 } if_type2;
493 } u;
494
495 /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */
496 void __iomem *PSMPHRregaddr;
497
498 /* Well-known SLI INTF register memory map. */
499 void __iomem *SLIINTFregaddr;
500
501 /* IF type 0, BAR 1 function CSR register memory map */
502 void __iomem *ISRregaddr; /* HST_ISR register */
503 void __iomem *IMRregaddr; /* HST_IMR register */
504 void __iomem *ISCRregaddr; /* HST_ISCR register */
505 /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */
506 void __iomem *RQDBregaddr; /* RQ_DOORBELL register */
507 void __iomem *WQDBregaddr; /* WQ_DOORBELL register */
508 void __iomem *EQCQDBregaddr; /* EQCQ_DOORBELL register */
509 void __iomem *MQDBregaddr; /* MQ_DOORBELL register */
510 void __iomem *BMBXregaddr; /* BootStrap MBX register */
511
512 uint32_t ue_mask_lo;
513 uint32_t ue_mask_hi;
514 uint32_t ue_to_sr;
515 uint32_t ue_to_rp;
516 struct lpfc_register sli_intf;
517 struct lpfc_pc_sli4_params pc_sli4_params;
518 struct msix_entry *msix_entries;
519 uint8_t handler_name[LPFC_SLI4_HANDLER_CNT][LPFC_SLI4_HANDLER_NAME_SZ];
520 struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */
521
522 /* Pointers to the constructed SLI4 queues */
523 struct lpfc_queue **hba_eq;/* Event queues for HBA */
524 struct lpfc_queue **fcp_cq;/* Fast-path FCP compl queue */
525 struct lpfc_queue **fcp_wq;/* Fast-path FCP work queue */
526 uint16_t *fcp_cq_map;
527
528 struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */
529 struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */
530 struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */
531 struct lpfc_queue *els_wq; /* Slow-path ELS work queue */
532 struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */
533 struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */
534
535 uint32_t fw_func_mode; /* FW function protocol mode */
536 uint32_t ulp0_mode; /* ULP0 protocol mode */
537 uint32_t ulp1_mode; /* ULP1 protocol mode */
538
539 struct lpfc_queue *fof_eq; /* Flash Optimized Fabric Event queue */
540
541 /* Optimized Access Storage specific queues/structures */
542
543 struct lpfc_queue *oas_cq; /* OAS completion queue */
544 struct lpfc_queue *oas_wq; /* OAS Work queue */
545 struct lpfc_sli_ring *oas_ring;
546 uint64_t oas_next_lun;
547 uint8_t oas_next_tgt_wwpn[8];
548 uint8_t oas_next_vpt_wwpn[8];
549
550 /* Setup information for various queue parameters */
551 int eq_esize;
552 int eq_ecount;
553 int cq_esize;
554 int cq_ecount;
555 int wq_esize;
556 int wq_ecount;
557 int mq_esize;
558 int mq_ecount;
559 int rq_esize;
560 int rq_ecount;
561 #define LPFC_SP_EQ_MAX_INTR_SEC 10000
562 #define LPFC_FP_EQ_MAX_INTR_SEC 10000
563
564 uint32_t intr_enable;
565 struct lpfc_bmbx bmbx;
566 struct lpfc_max_cfg_param max_cfg_param;
567 uint16_t extents_in_use; /* must allocate resource extents. */
568 uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */
569 uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */
570 uint16_t next_rpi;
571 uint16_t scsi_xri_max;
572 uint16_t scsi_xri_cnt;
573 uint16_t els_xri_cnt;
574 uint16_t scsi_xri_start;
575 struct list_head lpfc_free_sgl_list;
576 struct list_head lpfc_sgl_list;
577 struct list_head lpfc_abts_els_sgl_list;
578 struct list_head lpfc_abts_scsi_buf_list;
579 struct lpfc_sglq **lpfc_sglq_active_list;
580 struct list_head lpfc_rpi_hdr_list;
581 unsigned long *rpi_bmask;
582 uint16_t *rpi_ids;
583 uint16_t rpi_count;
584 struct list_head lpfc_rpi_blk_list;
585 unsigned long *xri_bmask;
586 uint16_t *xri_ids;
587 struct list_head lpfc_xri_blk_list;
588 unsigned long *vfi_bmask;
589 uint16_t *vfi_ids;
590 uint16_t vfi_count;
591 struct list_head lpfc_vfi_blk_list;
592 struct lpfc_sli4_flags sli4_flags;
593 struct list_head sp_queue_event;
594 struct list_head sp_cqe_event_pool;
595 struct list_head sp_asynce_work_queue;
596 struct list_head sp_fcp_xri_aborted_work_queue;
597 struct list_head sp_els_xri_aborted_work_queue;
598 struct list_head sp_unsol_work_queue;
599 struct lpfc_sli4_link link_state;
600 struct lpfc_sli4_lnk_info lnk_info;
601 uint32_t pport_name_sta;
602 #define LPFC_SLI4_PPNAME_NON 0
603 #define LPFC_SLI4_PPNAME_GET 1
604 struct lpfc_iov iov;
605 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */
606 spinlock_t abts_sgl_list_lock; /* list of aborted els IOs */
607 uint32_t physical_port;
608
609 /* CPU to vector mapping information */
610 struct lpfc_vector_map_info *cpu_map;
611 uint16_t num_online_cpu;
612 uint16_t num_present_cpu;
613 uint16_t curr_disp_cpu;
614 };
615
616 enum lpfc_sge_type {
617 GEN_BUFF_TYPE,
618 SCSI_BUFF_TYPE
619 };
620
621 enum lpfc_sgl_state {
622 SGL_FREED,
623 SGL_ALLOCATED,
624 SGL_XRI_ABORTED
625 };
626
627 struct lpfc_sglq {
628 /* lpfc_sglqs are used in double linked lists */
629 struct list_head list;
630 struct list_head clist;
631 enum lpfc_sge_type buff_type; /* is this a scsi sgl */
632 enum lpfc_sgl_state state;
633 struct lpfc_nodelist *ndlp; /* ndlp associated with IO */
634 uint16_t iotag; /* pre-assigned IO tag */
635 uint16_t sli4_lxritag; /* logical pre-assigned xri. */
636 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */
637 struct sli4_sge *sgl; /* pre-assigned SGL */
638 void *virt; /* virtual address. */
639 dma_addr_t phys; /* physical address */
640 };
641
642 struct lpfc_rpi_hdr {
643 struct list_head list;
644 uint32_t len;
645 struct lpfc_dmabuf *dmabuf;
646 uint32_t page_count;
647 uint32_t start_rpi;
648 };
649
650 struct lpfc_rsrc_blks {
651 struct list_head list;
652 uint16_t rsrc_start;
653 uint16_t rsrc_size;
654 uint16_t rsrc_used;
655 };
656
657 struct lpfc_rdp_context {
658 struct lpfc_nodelist *ndlp;
659 uint16_t ox_id;
660 uint16_t rx_id;
661 READ_LNK_VAR link_stat;
662 uint8_t page_a0[DMP_SFF_PAGE_A0_SIZE];
663 uint8_t page_a2[DMP_SFF_PAGE_A2_SIZE];
664 void (*cmpl)(struct lpfc_hba *, struct lpfc_rdp_context*, int);
665 };
666
667 struct lpfc_lcb_context {
668 uint8_t sub_command;
669 uint8_t type;
670 uint8_t frequency;
671 uint16_t ox_id;
672 uint16_t rx_id;
673 struct lpfc_nodelist *ndlp;
674 };
675
676
677 /*
678 * SLI4 specific function prototypes
679 */
680 int lpfc_pci_function_reset(struct lpfc_hba *);
681 int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *);
682 int lpfc_sli4_hba_setup(struct lpfc_hba *);
683 int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t,
684 uint8_t, uint32_t, bool);
685 void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *);
686 void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t);
687 void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t,
688 struct lpfc_mbx_sge *);
689 int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *,
690 uint16_t);
691
692 void lpfc_sli4_hba_reset(struct lpfc_hba *);
693 struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t,
694 uint32_t);
695 void lpfc_sli4_queue_free(struct lpfc_queue *);
696 int lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t);
697 int lpfc_modify_fcp_eq_delay(struct lpfc_hba *, uint32_t);
698 int lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *,
699 struct lpfc_queue *, uint32_t, uint32_t);
700 int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *,
701 struct lpfc_queue *, uint32_t);
702 int lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *,
703 struct lpfc_queue *, uint32_t);
704 int lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *,
705 struct lpfc_queue *, struct lpfc_queue *, uint32_t);
706 void lpfc_rq_adjust_repost(struct lpfc_hba *, struct lpfc_queue *, int);
707 int lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *);
708 int lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *);
709 int lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *);
710 int lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *);
711 int lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *,
712 struct lpfc_queue *);
713 int lpfc_sli4_queue_setup(struct lpfc_hba *);
714 void lpfc_sli4_queue_unset(struct lpfc_hba *);
715 int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t);
716 int lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *);
717 uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *);
718 void lpfc_sli4_free_xri(struct lpfc_hba *, int);
719 int lpfc_sli4_post_async_mbox(struct lpfc_hba *);
720 int lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *, struct list_head *, int);
721 struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
722 struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
723 void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
724 void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
725 int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *);
726 int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *);
727 int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *);
728 struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *);
729 void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *);
730 int lpfc_sli4_alloc_rpi(struct lpfc_hba *);
731 void lpfc_sli4_free_rpi(struct lpfc_hba *, int);
732 void lpfc_sli4_remove_rpis(struct lpfc_hba *);
733 void lpfc_sli4_async_event_proc(struct lpfc_hba *);
734 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *);
735 int lpfc_sli4_resume_rpi(struct lpfc_nodelist *,
736 void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *);
737 void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *);
738 void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *);
739 void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *,
740 struct sli4_wcqe_xri_aborted *);
741 void lpfc_sli4_els_xri_aborted(struct lpfc_hba *,
742 struct sli4_wcqe_xri_aborted *);
743 void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *);
744 void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *);
745 int lpfc_sli4_brdreset(struct lpfc_hba *);
746 int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *);
747 void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *);
748 int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *);
749 int lpfc_sli4_init_vpi(struct lpfc_vport *);
750 uint32_t lpfc_sli4_cq_release(struct lpfc_queue *, bool);
751 uint32_t lpfc_sli4_eq_release(struct lpfc_queue *, bool);
752 void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t);
753 int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t);
754 int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t);
755 int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t);
756 void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
757 void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
758 void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
759 int lpfc_sli4_unregister_fcf(struct lpfc_hba *);
760 int lpfc_sli4_post_status_check(struct lpfc_hba *);
761 uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *);
762 uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *);