2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
5 * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.c
6 * Copyright (C) 2012-2014 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
45 #include <linux/kernel.h>
46 #include <linux/module.h>
47 #include <linux/errno.h>
48 #include <linux/init.h>
49 #include <linux/slab.h>
50 #include <linux/types.h>
51 #include <linux/pci.h>
52 #include <linux/kdev_t.h>
53 #include <linux/blkdev.h>
54 #include <linux/delay.h>
55 #include <linux/interrupt.h>
56 #include <linux/dma-mapping.h>
58 #include <linux/time.h>
59 #include <linux/kthread.h>
60 #include <linux/aer.h>
63 #include "mpt3sas_base.h"
65 static MPT_CALLBACK mpt_callbacks
[MPT_MAX_CALLBACKS
];
68 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
70 /* maximum controller queue depth */
71 #define MAX_HBA_QUEUE_DEPTH 30000
72 #define MAX_CHAIN_DEPTH 100000
73 static int max_queue_depth
= -1;
74 module_param(max_queue_depth
, int, 0);
75 MODULE_PARM_DESC(max_queue_depth
, " max controller queue depth ");
77 static int max_sgl_entries
= -1;
78 module_param(max_sgl_entries
, int, 0);
79 MODULE_PARM_DESC(max_sgl_entries
, " max sg entries ");
81 static int msix_disable
= -1;
82 module_param(msix_disable
, int, 0);
83 MODULE_PARM_DESC(msix_disable
, " disable msix routed interrupts (default=0)");
85 static int max_msix_vectors
= 8;
86 module_param(max_msix_vectors
, int, 0);
87 MODULE_PARM_DESC(max_msix_vectors
,
88 " max msix vectors - (default=8)");
90 static int mpt3sas_fwfault_debug
;
91 MODULE_PARM_DESC(mpt3sas_fwfault_debug
,
92 " enable detection of firmware fault and halt firmware - (default=0)");
95 _base_get_ioc_facts(struct MPT3SAS_ADAPTER
*ioc
, int sleep_flag
);
98 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
102 _scsih_set_fwfault_debug(const char *val
, struct kernel_param
*kp
)
104 int ret
= param_set_int(val
, kp
);
105 struct MPT3SAS_ADAPTER
*ioc
;
110 pr_info("setting fwfault_debug(%d)\n", mpt3sas_fwfault_debug
);
111 list_for_each_entry(ioc
, &mpt3sas_ioc_list
, list
)
112 ioc
->fwfault_debug
= mpt3sas_fwfault_debug
;
115 module_param_call(mpt3sas_fwfault_debug
, _scsih_set_fwfault_debug
,
116 param_get_int
, &mpt3sas_fwfault_debug
, 0644);
119 * mpt3sas_remove_dead_ioc_func - kthread context to remove dead ioc
120 * @arg: input argument, used to derive ioc
122 * Return 0 if controller is removed from pci subsystem.
123 * Return -1 for other case.
125 static int mpt3sas_remove_dead_ioc_func(void *arg
)
127 struct MPT3SAS_ADAPTER
*ioc
= (struct MPT3SAS_ADAPTER
*)arg
;
128 struct pci_dev
*pdev
;
136 pci_stop_and_remove_bus_device_locked(pdev
);
141 * _base_fault_reset_work - workq handling ioc fault conditions
142 * @work: input argument, used to derive ioc
148 _base_fault_reset_work(struct work_struct
*work
)
150 struct MPT3SAS_ADAPTER
*ioc
=
151 container_of(work
, struct MPT3SAS_ADAPTER
, fault_reset_work
.work
);
155 struct task_struct
*p
;
158 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
159 if (ioc
->shost_recovery
)
161 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
163 doorbell
= mpt3sas_base_get_iocstate(ioc
, 0);
164 if ((doorbell
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_MASK
) {
165 pr_err(MPT3SAS_FMT
"SAS host is non-operational !!!!\n",
169 * Call _scsih_flush_pending_cmds callback so that we flush all
170 * pending commands back to OS. This call is required to aovid
171 * deadlock at block layer. Dead IOC will fail to do diag reset,
172 * and this call is safe since dead ioc will never return any
173 * command back from HW.
175 ioc
->schedule_dead_ioc_flush_running_cmds(ioc
);
177 * Set remove_host flag early since kernel thread will
178 * take some time to execute.
180 ioc
->remove_host
= 1;
181 /*Remove the Dead Host */
182 p
= kthread_run(mpt3sas_remove_dead_ioc_func
, ioc
,
183 "mpt3sas_dead_ioc_%d", ioc
->id
);
186 "%s: Running mpt3sas_dead_ioc thread failed !!!!\n",
187 ioc
->name
, __func__
);
190 "%s: Running mpt3sas_dead_ioc thread success !!!!\n",
191 ioc
->name
, __func__
);
192 return; /* don't rearm timer */
195 if ((doorbell
& MPI2_IOC_STATE_MASK
) != MPI2_IOC_STATE_OPERATIONAL
) {
196 rc
= mpt3sas_base_hard_reset_handler(ioc
, CAN_SLEEP
,
198 pr_warn(MPT3SAS_FMT
"%s: hard reset: %s\n", ioc
->name
,
199 __func__
, (rc
== 0) ? "success" : "failed");
200 doorbell
= mpt3sas_base_get_iocstate(ioc
, 0);
201 if ((doorbell
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_FAULT
)
202 mpt3sas_base_fault_info(ioc
, doorbell
&
203 MPI2_DOORBELL_DATA_MASK
);
204 if (rc
&& (doorbell
& MPI2_IOC_STATE_MASK
) !=
205 MPI2_IOC_STATE_OPERATIONAL
)
206 return; /* don't rearm timer */
209 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
211 if (ioc
->fault_reset_work_q
)
212 queue_delayed_work(ioc
->fault_reset_work_q
,
213 &ioc
->fault_reset_work
,
214 msecs_to_jiffies(FAULT_POLLING_INTERVAL
));
215 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
219 * mpt3sas_base_start_watchdog - start the fault_reset_work_q
220 * @ioc: per adapter object
226 mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER
*ioc
)
230 if (ioc
->fault_reset_work_q
)
233 /* initialize fault polling */
235 INIT_DELAYED_WORK(&ioc
->fault_reset_work
, _base_fault_reset_work
);
236 snprintf(ioc
->fault_reset_work_q_name
,
237 sizeof(ioc
->fault_reset_work_q_name
), "poll_%d_status", ioc
->id
);
238 ioc
->fault_reset_work_q
=
239 create_singlethread_workqueue(ioc
->fault_reset_work_q_name
);
240 if (!ioc
->fault_reset_work_q
) {
241 pr_err(MPT3SAS_FMT
"%s: failed (line=%d)\n",
242 ioc
->name
, __func__
, __LINE__
);
245 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
246 if (ioc
->fault_reset_work_q
)
247 queue_delayed_work(ioc
->fault_reset_work_q
,
248 &ioc
->fault_reset_work
,
249 msecs_to_jiffies(FAULT_POLLING_INTERVAL
));
250 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
254 * mpt3sas_base_stop_watchdog - stop the fault_reset_work_q
255 * @ioc: per adapter object
261 mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER
*ioc
)
264 struct workqueue_struct
*wq
;
266 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
267 wq
= ioc
->fault_reset_work_q
;
268 ioc
->fault_reset_work_q
= NULL
;
269 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
271 if (!cancel_delayed_work_sync(&ioc
->fault_reset_work
))
273 destroy_workqueue(wq
);
278 * mpt3sas_base_fault_info - verbose translation of firmware FAULT code
279 * @ioc: per adapter object
280 * @fault_code: fault code
285 mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER
*ioc
, u16 fault_code
)
287 pr_err(MPT3SAS_FMT
"fault_state(0x%04x)!\n",
288 ioc
->name
, fault_code
);
292 * mpt3sas_halt_firmware - halt's mpt controller firmware
293 * @ioc: per adapter object
295 * For debugging timeout related issues. Writing 0xCOFFEE00
296 * to the doorbell register will halt controller firmware. With
297 * the purpose to stop both driver and firmware, the enduser can
298 * obtain a ring buffer from controller UART.
301 mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER
*ioc
)
305 if (!ioc
->fwfault_debug
)
310 doorbell
= readl(&ioc
->chip
->Doorbell
);
311 if ((doorbell
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_FAULT
)
312 mpt3sas_base_fault_info(ioc
, doorbell
);
314 writel(0xC0FFEE00, &ioc
->chip
->Doorbell
);
315 pr_err(MPT3SAS_FMT
"Firmware is halted due to command timeout\n",
319 if (ioc
->fwfault_debug
== 2)
323 panic("panic in %s\n", __func__
);
326 #ifdef CONFIG_SCSI_MPT3SAS_LOGGING
328 * _base_sas_ioc_info - verbose translation of the ioc status
329 * @ioc: per adapter object
330 * @mpi_reply: reply mf payload returned from firmware
331 * @request_hdr: request mf
336 _base_sas_ioc_info(struct MPT3SAS_ADAPTER
*ioc
, MPI2DefaultReply_t
*mpi_reply
,
337 MPI2RequestHeader_t
*request_hdr
)
339 u16 ioc_status
= le16_to_cpu(mpi_reply
->IOCStatus
) &
343 char *func_str
= NULL
;
345 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
346 if (request_hdr
->Function
== MPI2_FUNCTION_SCSI_IO_REQUEST
||
347 request_hdr
->Function
== MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH
||
348 request_hdr
->Function
== MPI2_FUNCTION_EVENT_NOTIFICATION
)
351 if (ioc_status
== MPI2_IOCSTATUS_CONFIG_INVALID_PAGE
)
354 switch (ioc_status
) {
356 /****************************************************************************
357 * Common IOCStatus values for all replies
358 ****************************************************************************/
360 case MPI2_IOCSTATUS_INVALID_FUNCTION
:
361 desc
= "invalid function";
363 case MPI2_IOCSTATUS_BUSY
:
366 case MPI2_IOCSTATUS_INVALID_SGL
:
367 desc
= "invalid sgl";
369 case MPI2_IOCSTATUS_INTERNAL_ERROR
:
370 desc
= "internal error";
372 case MPI2_IOCSTATUS_INVALID_VPID
:
373 desc
= "invalid vpid";
375 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES
:
376 desc
= "insufficient resources";
378 case MPI2_IOCSTATUS_INVALID_FIELD
:
379 desc
= "invalid field";
381 case MPI2_IOCSTATUS_INVALID_STATE
:
382 desc
= "invalid state";
384 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED
:
385 desc
= "op state not supported";
388 /****************************************************************************
389 * Config IOCStatus values
390 ****************************************************************************/
392 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION
:
393 desc
= "config invalid action";
395 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE
:
396 desc
= "config invalid type";
398 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE
:
399 desc
= "config invalid page";
401 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA
:
402 desc
= "config invalid data";
404 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS
:
405 desc
= "config no defaults";
407 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT
:
408 desc
= "config cant commit";
411 /****************************************************************************
413 ****************************************************************************/
415 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR
:
416 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE
:
417 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE
:
418 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN
:
419 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN
:
420 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR
:
421 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR
:
422 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED
:
423 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH
:
424 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED
:
425 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED
:
426 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED
:
429 /****************************************************************************
430 * For use by SCSI Initiator and SCSI Target end-to-end data protection
431 ****************************************************************************/
433 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR
:
434 desc
= "eedp guard error";
436 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR
:
437 desc
= "eedp ref tag error";
439 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR
:
440 desc
= "eedp app tag error";
443 /****************************************************************************
445 ****************************************************************************/
447 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX
:
448 desc
= "target invalid io index";
450 case MPI2_IOCSTATUS_TARGET_ABORTED
:
451 desc
= "target aborted";
453 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE
:
454 desc
= "target no conn retryable";
456 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION
:
457 desc
= "target no connection";
459 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH
:
460 desc
= "target xfer count mismatch";
462 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR
:
463 desc
= "target data offset error";
465 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA
:
466 desc
= "target too much write data";
468 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT
:
469 desc
= "target iu too short";
471 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT
:
472 desc
= "target ack nak timeout";
474 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED
:
475 desc
= "target nak received";
478 /****************************************************************************
479 * Serial Attached SCSI values
480 ****************************************************************************/
482 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED
:
483 desc
= "smp request failed";
485 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN
:
486 desc
= "smp data overrun";
489 /****************************************************************************
490 * Diagnostic Buffer Post / Diagnostic Release values
491 ****************************************************************************/
493 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED
:
494 desc
= "diagnostic released";
503 switch (request_hdr
->Function
) {
504 case MPI2_FUNCTION_CONFIG
:
505 frame_sz
= sizeof(Mpi2ConfigRequest_t
) + ioc
->sge_size
;
506 func_str
= "config_page";
508 case MPI2_FUNCTION_SCSI_TASK_MGMT
:
509 frame_sz
= sizeof(Mpi2SCSITaskManagementRequest_t
);
510 func_str
= "task_mgmt";
512 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL
:
513 frame_sz
= sizeof(Mpi2SasIoUnitControlRequest_t
);
514 func_str
= "sas_iounit_ctl";
516 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR
:
517 frame_sz
= sizeof(Mpi2SepRequest_t
);
518 func_str
= "enclosure";
520 case MPI2_FUNCTION_IOC_INIT
:
521 frame_sz
= sizeof(Mpi2IOCInitRequest_t
);
522 func_str
= "ioc_init";
524 case MPI2_FUNCTION_PORT_ENABLE
:
525 frame_sz
= sizeof(Mpi2PortEnableRequest_t
);
526 func_str
= "port_enable";
528 case MPI2_FUNCTION_SMP_PASSTHROUGH
:
529 frame_sz
= sizeof(Mpi2SmpPassthroughRequest_t
) + ioc
->sge_size
;
530 func_str
= "smp_passthru";
534 func_str
= "unknown";
538 pr_warn(MPT3SAS_FMT
"ioc_status: %s(0x%04x), request(0x%p),(%s)\n",
539 ioc
->name
, desc
, ioc_status
, request_hdr
, func_str
);
541 _debug_dump_mf(request_hdr
, frame_sz
/4);
545 * _base_display_event_data - verbose translation of firmware asyn events
546 * @ioc: per adapter object
547 * @mpi_reply: reply mf payload returned from firmware
552 _base_display_event_data(struct MPT3SAS_ADAPTER
*ioc
,
553 Mpi2EventNotificationReply_t
*mpi_reply
)
558 if (!(ioc
->logging_level
& MPT_DEBUG_EVENTS
))
561 event
= le16_to_cpu(mpi_reply
->Event
);
564 case MPI2_EVENT_LOG_DATA
:
567 case MPI2_EVENT_STATE_CHANGE
:
568 desc
= "Status Change";
570 case MPI2_EVENT_HARD_RESET_RECEIVED
:
571 desc
= "Hard Reset Received";
573 case MPI2_EVENT_EVENT_CHANGE
:
574 desc
= "Event Change";
576 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE
:
577 desc
= "Device Status Change";
579 case MPI2_EVENT_IR_OPERATION_STATUS
:
580 desc
= "IR Operation Status";
582 case MPI2_EVENT_SAS_DISCOVERY
:
584 Mpi2EventDataSasDiscovery_t
*event_data
=
585 (Mpi2EventDataSasDiscovery_t
*)mpi_reply
->EventData
;
586 pr_info(MPT3SAS_FMT
"Discovery: (%s)", ioc
->name
,
587 (event_data
->ReasonCode
== MPI2_EVENT_SAS_DISC_RC_STARTED
) ?
589 if (event_data
->DiscoveryStatus
)
590 pr_info("discovery_status(0x%08x)",
591 le32_to_cpu(event_data
->DiscoveryStatus
));
595 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE
:
596 desc
= "SAS Broadcast Primitive";
598 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE
:
599 desc
= "SAS Init Device Status Change";
601 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW
:
602 desc
= "SAS Init Table Overflow";
604 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST
:
605 desc
= "SAS Topology Change List";
607 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE
:
608 desc
= "SAS Enclosure Device Status Change";
610 case MPI2_EVENT_IR_VOLUME
:
613 case MPI2_EVENT_IR_PHYSICAL_DISK
:
614 desc
= "IR Physical Disk";
616 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST
:
617 desc
= "IR Configuration Change List";
619 case MPI2_EVENT_LOG_ENTRY_ADDED
:
620 desc
= "Log Entry Added";
622 case MPI2_EVENT_TEMP_THRESHOLD
:
623 desc
= "Temperature Threshold";
630 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
, desc
);
635 * _base_sas_log_info - verbose translation of firmware log info
636 * @ioc: per adapter object
637 * @log_info: log info
642 _base_sas_log_info(struct MPT3SAS_ADAPTER
*ioc
, u32 log_info
)
653 union loginfo_type sas_loginfo
;
654 char *originator_str
= NULL
;
656 sas_loginfo
.loginfo
= log_info
;
657 if (sas_loginfo
.dw
.bus_type
!= 3 /*SAS*/)
660 /* each nexus loss loginfo */
661 if (log_info
== 0x31170000)
664 /* eat the loginfos associated with task aborts */
665 if (ioc
->ignore_loginfos
&& (log_info
== 0x30050000 || log_info
==
666 0x31140000 || log_info
== 0x31130000))
669 switch (sas_loginfo
.dw
.originator
) {
671 originator_str
= "IOP";
674 originator_str
= "PL";
677 originator_str
= "IR";
682 "log_info(0x%08x): originator(%s), code(0x%02x), sub_code(0x%04x)\n",
684 originator_str
, sas_loginfo
.dw
.code
,
685 sas_loginfo
.dw
.subcode
);
689 * _base_display_reply_info -
690 * @ioc: per adapter object
691 * @smid: system request message index
692 * @msix_index: MSIX table index supplied by the OS
693 * @reply: reply message frame(lower 32bit addr)
698 _base_display_reply_info(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
, u8 msix_index
,
701 MPI2DefaultReply_t
*mpi_reply
;
705 mpi_reply
= mpt3sas_base_get_reply_virt_addr(ioc
, reply
);
706 if (unlikely(!mpi_reply
)) {
707 pr_err(MPT3SAS_FMT
"mpi_reply not valid at %s:%d/%s()!\n",
708 ioc
->name
, __FILE__
, __LINE__
, __func__
);
711 ioc_status
= le16_to_cpu(mpi_reply
->IOCStatus
);
712 #ifdef CONFIG_SCSI_MPT3SAS_LOGGING
713 if ((ioc_status
& MPI2_IOCSTATUS_MASK
) &&
714 (ioc
->logging_level
& MPT_DEBUG_REPLY
)) {
715 _base_sas_ioc_info(ioc
, mpi_reply
,
716 mpt3sas_base_get_msg_frame(ioc
, smid
));
719 if (ioc_status
& MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE
) {
720 loginfo
= le32_to_cpu(mpi_reply
->IOCLogInfo
);
721 _base_sas_log_info(ioc
, loginfo
);
724 if (ioc_status
|| loginfo
) {
725 ioc_status
&= MPI2_IOCSTATUS_MASK
;
726 mpt3sas_trigger_mpi(ioc
, ioc_status
, loginfo
);
731 * mpt3sas_base_done - base internal command completion routine
732 * @ioc: per adapter object
733 * @smid: system request message index
734 * @msix_index: MSIX table index supplied by the OS
735 * @reply: reply message frame(lower 32bit addr)
737 * Return 1 meaning mf should be freed from _base_interrupt
738 * 0 means the mf is freed from this function.
741 mpt3sas_base_done(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
, u8 msix_index
,
744 MPI2DefaultReply_t
*mpi_reply
;
746 mpi_reply
= mpt3sas_base_get_reply_virt_addr(ioc
, reply
);
747 if (mpi_reply
&& mpi_reply
->Function
== MPI2_FUNCTION_EVENT_ACK
)
750 if (ioc
->base_cmds
.status
== MPT3_CMD_NOT_USED
)
753 ioc
->base_cmds
.status
|= MPT3_CMD_COMPLETE
;
755 ioc
->base_cmds
.status
|= MPT3_CMD_REPLY_VALID
;
756 memcpy(ioc
->base_cmds
.reply
, mpi_reply
, mpi_reply
->MsgLength
*4);
758 ioc
->base_cmds
.status
&= ~MPT3_CMD_PENDING
;
760 complete(&ioc
->base_cmds
.done
);
765 * _base_async_event - main callback handler for firmware asyn events
766 * @ioc: per adapter object
767 * @msix_index: MSIX table index supplied by the OS
768 * @reply: reply message frame(lower 32bit addr)
770 * Return 1 meaning mf should be freed from _base_interrupt
771 * 0 means the mf is freed from this function.
774 _base_async_event(struct MPT3SAS_ADAPTER
*ioc
, u8 msix_index
, u32 reply
)
776 Mpi2EventNotificationReply_t
*mpi_reply
;
777 Mpi2EventAckRequest_t
*ack_request
;
780 mpi_reply
= mpt3sas_base_get_reply_virt_addr(ioc
, reply
);
783 if (mpi_reply
->Function
!= MPI2_FUNCTION_EVENT_NOTIFICATION
)
785 #ifdef CONFIG_SCSI_MPT3SAS_LOGGING
786 _base_display_event_data(ioc
, mpi_reply
);
788 if (!(mpi_reply
->AckRequired
& MPI2_EVENT_NOTIFICATION_ACK_REQUIRED
))
790 smid
= mpt3sas_base_get_smid(ioc
, ioc
->base_cb_idx
);
792 pr_err(MPT3SAS_FMT
"%s: failed obtaining a smid\n",
793 ioc
->name
, __func__
);
797 ack_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
798 memset(ack_request
, 0, sizeof(Mpi2EventAckRequest_t
));
799 ack_request
->Function
= MPI2_FUNCTION_EVENT_ACK
;
800 ack_request
->Event
= mpi_reply
->Event
;
801 ack_request
->EventContext
= mpi_reply
->EventContext
;
802 ack_request
->VF_ID
= 0; /* TODO */
803 ack_request
->VP_ID
= 0;
804 mpt3sas_base_put_smid_default(ioc
, smid
);
808 /* scsih callback handler */
809 mpt3sas_scsih_event_callback(ioc
, msix_index
, reply
);
811 /* ctl callback handler */
812 mpt3sas_ctl_event_callback(ioc
, msix_index
, reply
);
818 * _base_get_cb_idx - obtain the callback index
819 * @ioc: per adapter object
820 * @smid: system request message index
822 * Return callback index.
825 _base_get_cb_idx(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
830 if (smid
< ioc
->hi_priority_smid
) {
832 cb_idx
= ioc
->scsi_lookup
[i
].cb_idx
;
833 } else if (smid
< ioc
->internal_smid
) {
834 i
= smid
- ioc
->hi_priority_smid
;
835 cb_idx
= ioc
->hpr_lookup
[i
].cb_idx
;
836 } else if (smid
<= ioc
->hba_queue_depth
) {
837 i
= smid
- ioc
->internal_smid
;
838 cb_idx
= ioc
->internal_lookup
[i
].cb_idx
;
845 * _base_mask_interrupts - disable interrupts
846 * @ioc: per adapter object
848 * Disabling ResetIRQ, Reply and Doorbell Interrupts
853 _base_mask_interrupts(struct MPT3SAS_ADAPTER
*ioc
)
857 ioc
->mask_interrupts
= 1;
858 him_register
= readl(&ioc
->chip
->HostInterruptMask
);
859 him_register
|= MPI2_HIM_DIM
+ MPI2_HIM_RIM
+ MPI2_HIM_RESET_IRQ_MASK
;
860 writel(him_register
, &ioc
->chip
->HostInterruptMask
);
861 readl(&ioc
->chip
->HostInterruptMask
);
865 * _base_unmask_interrupts - enable interrupts
866 * @ioc: per adapter object
868 * Enabling only Reply Interrupts
873 _base_unmask_interrupts(struct MPT3SAS_ADAPTER
*ioc
)
877 him_register
= readl(&ioc
->chip
->HostInterruptMask
);
878 him_register
&= ~MPI2_HIM_RIM
;
879 writel(him_register
, &ioc
->chip
->HostInterruptMask
);
880 ioc
->mask_interrupts
= 0;
883 union reply_descriptor
{
892 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
893 * @irq: irq number (not used)
894 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
895 * @r: pt_regs pointer (not used)
897 * Return IRQ_HANDLE if processed, else IRQ_NONE.
900 _base_interrupt(int irq
, void *bus_id
)
902 struct adapter_reply_queue
*reply_q
= bus_id
;
903 union reply_descriptor rd
;
905 u8 request_desript_type
;
909 u8 msix_index
= reply_q
->msix_index
;
910 struct MPT3SAS_ADAPTER
*ioc
= reply_q
->ioc
;
911 Mpi2ReplyDescriptorsUnion_t
*rpf
;
914 if (ioc
->mask_interrupts
)
917 if (!atomic_add_unless(&reply_q
->busy
, 1, 1))
920 rpf
= &reply_q
->reply_post_free
[reply_q
->reply_post_host_index
];
921 request_desript_type
= rpf
->Default
.ReplyFlags
922 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK
;
923 if (request_desript_type
== MPI2_RPY_DESCRIPT_FLAGS_UNUSED
) {
924 atomic_dec(&reply_q
->busy
);
931 rd
.word
= le64_to_cpu(rpf
->Words
);
932 if (rd
.u
.low
== UINT_MAX
|| rd
.u
.high
== UINT_MAX
)
935 smid
= le16_to_cpu(rpf
->Default
.DescriptorTypeDependent1
);
936 if (request_desript_type
==
937 MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS
||
938 request_desript_type
==
939 MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS
) {
940 cb_idx
= _base_get_cb_idx(ioc
, smid
);
941 if ((likely(cb_idx
< MPT_MAX_CALLBACKS
)) &&
942 (likely(mpt_callbacks
[cb_idx
] != NULL
))) {
943 rc
= mpt_callbacks
[cb_idx
](ioc
, smid
,
946 mpt3sas_base_free_smid(ioc
, smid
);
948 } else if (request_desript_type
==
949 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY
) {
951 rpf
->AddressReply
.ReplyFrameAddress
);
952 if (reply
> ioc
->reply_dma_max_address
||
953 reply
< ioc
->reply_dma_min_address
)
956 cb_idx
= _base_get_cb_idx(ioc
, smid
);
957 if ((likely(cb_idx
< MPT_MAX_CALLBACKS
)) &&
958 (likely(mpt_callbacks
[cb_idx
] != NULL
))) {
959 rc
= mpt_callbacks
[cb_idx
](ioc
, smid
,
962 _base_display_reply_info(ioc
,
963 smid
, msix_index
, reply
);
965 mpt3sas_base_free_smid(ioc
,
969 _base_async_event(ioc
, msix_index
, reply
);
972 /* reply free queue handling */
974 ioc
->reply_free_host_index
=
975 (ioc
->reply_free_host_index
==
976 (ioc
->reply_free_queue_depth
- 1)) ?
977 0 : ioc
->reply_free_host_index
+ 1;
978 ioc
->reply_free
[ioc
->reply_free_host_index
] =
981 writel(ioc
->reply_free_host_index
,
982 &ioc
->chip
->ReplyFreeHostIndex
);
986 rpf
->Words
= cpu_to_le64(ULLONG_MAX
);
987 reply_q
->reply_post_host_index
=
988 (reply_q
->reply_post_host_index
==
989 (ioc
->reply_post_queue_depth
- 1)) ? 0 :
990 reply_q
->reply_post_host_index
+ 1;
991 request_desript_type
=
992 reply_q
->reply_post_free
[reply_q
->reply_post_host_index
].
993 Default
.ReplyFlags
& MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK
;
995 if (request_desript_type
== MPI2_RPY_DESCRIPT_FLAGS_UNUSED
)
997 if (!reply_q
->reply_post_host_index
)
998 rpf
= reply_q
->reply_post_free
;
1005 if (!completed_cmds
) {
1006 atomic_dec(&reply_q
->busy
);
1011 writel(reply_q
->reply_post_host_index
| (msix_index
<<
1012 MPI2_RPHI_MSIX_INDEX_SHIFT
), &ioc
->chip
->ReplyPostHostIndex
);
1013 atomic_dec(&reply_q
->busy
);
1018 * _base_is_controller_msix_enabled - is controller support muli-reply queues
1019 * @ioc: per adapter object
1023 _base_is_controller_msix_enabled(struct MPT3SAS_ADAPTER
*ioc
)
1025 return (ioc
->facts
.IOCCapabilities
&
1026 MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX
) && ioc
->msix_enable
;
1030 * mpt3sas_base_flush_reply_queues - flushing the MSIX reply queues
1031 * @ioc: per adapter object
1032 * Context: ISR conext
1034 * Called when a Task Management request has completed. We want
1035 * to flush the other reply queues so all the outstanding IO has been
1036 * completed back to OS before we process the TM completetion.
1041 mpt3sas_base_flush_reply_queues(struct MPT3SAS_ADAPTER
*ioc
)
1043 struct adapter_reply_queue
*reply_q
;
1045 /* If MSIX capability is turned off
1046 * then multi-queues are not enabled
1048 if (!_base_is_controller_msix_enabled(ioc
))
1051 list_for_each_entry(reply_q
, &ioc
->reply_queue_list
, list
) {
1052 if (ioc
->shost_recovery
)
1054 /* TMs are on msix_index == 0 */
1055 if (reply_q
->msix_index
== 0)
1057 _base_interrupt(reply_q
->vector
, (void *)reply_q
);
1062 * mpt3sas_base_release_callback_handler - clear interrupt callback handler
1063 * @cb_idx: callback index
1068 mpt3sas_base_release_callback_handler(u8 cb_idx
)
1070 mpt_callbacks
[cb_idx
] = NULL
;
1074 * mpt3sas_base_register_callback_handler - obtain index for the interrupt callback handler
1075 * @cb_func: callback function
1080 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func
)
1084 for (cb_idx
= MPT_MAX_CALLBACKS
-1; cb_idx
; cb_idx
--)
1085 if (mpt_callbacks
[cb_idx
] == NULL
)
1088 mpt_callbacks
[cb_idx
] = cb_func
;
1093 * mpt3sas_base_initialize_callback_handler - initialize the interrupt callback handler
1098 mpt3sas_base_initialize_callback_handler(void)
1102 for (cb_idx
= 0; cb_idx
< MPT_MAX_CALLBACKS
; cb_idx
++)
1103 mpt3sas_base_release_callback_handler(cb_idx
);
1108 * _base_build_zero_len_sge - build zero length sg entry
1109 * @ioc: per adapter object
1110 * @paddr: virtual address for SGE
1112 * Create a zero length scatter gather entry to insure the IOCs hardware has
1113 * something to use if the target device goes brain dead and tries
1114 * to send data even when none is asked for.
1119 _base_build_zero_len_sge(struct MPT3SAS_ADAPTER
*ioc
, void *paddr
)
1121 u32 flags_length
= (u32
)((MPI2_SGE_FLAGS_LAST_ELEMENT
|
1122 MPI2_SGE_FLAGS_END_OF_BUFFER
| MPI2_SGE_FLAGS_END_OF_LIST
|
1123 MPI2_SGE_FLAGS_SIMPLE_ELEMENT
) <<
1124 MPI2_SGE_FLAGS_SHIFT
);
1125 ioc
->base_add_sg_single(paddr
, flags_length
, -1);
1129 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
1130 * @paddr: virtual address for SGE
1131 * @flags_length: SGE flags and data transfer length
1132 * @dma_addr: Physical address
1137 _base_add_sg_single_32(void *paddr
, u32 flags_length
, dma_addr_t dma_addr
)
1139 Mpi2SGESimple32_t
*sgel
= paddr
;
1141 flags_length
|= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING
|
1142 MPI2_SGE_FLAGS_SYSTEM_ADDRESS
) << MPI2_SGE_FLAGS_SHIFT
;
1143 sgel
->FlagsLength
= cpu_to_le32(flags_length
);
1144 sgel
->Address
= cpu_to_le32(dma_addr
);
1149 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1150 * @paddr: virtual address for SGE
1151 * @flags_length: SGE flags and data transfer length
1152 * @dma_addr: Physical address
1157 _base_add_sg_single_64(void *paddr
, u32 flags_length
, dma_addr_t dma_addr
)
1159 Mpi2SGESimple64_t
*sgel
= paddr
;
1161 flags_length
|= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING
|
1162 MPI2_SGE_FLAGS_SYSTEM_ADDRESS
) << MPI2_SGE_FLAGS_SHIFT
;
1163 sgel
->FlagsLength
= cpu_to_le32(flags_length
);
1164 sgel
->Address
= cpu_to_le64(dma_addr
);
1168 * _base_get_chain_buffer_tracker - obtain chain tracker
1169 * @ioc: per adapter object
1170 * @smid: smid associated to an IO request
1172 * Returns chain tracker(from ioc->free_chain_list)
1174 static struct chain_tracker
*
1175 _base_get_chain_buffer_tracker(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
1177 struct chain_tracker
*chain_req
;
1178 unsigned long flags
;
1180 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
1181 if (list_empty(&ioc
->free_chain_list
)) {
1182 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
1183 dfailprintk(ioc
, pr_warn(MPT3SAS_FMT
1184 "chain buffers not available\n", ioc
->name
));
1187 chain_req
= list_entry(ioc
->free_chain_list
.next
,
1188 struct chain_tracker
, tracker_list
);
1189 list_del_init(&chain_req
->tracker_list
);
1190 list_add_tail(&chain_req
->tracker_list
,
1191 &ioc
->scsi_lookup
[smid
- 1].chain_list
);
1192 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
1198 * _base_build_sg - build generic sg
1199 * @ioc: per adapter object
1200 * @psge: virtual address for SGE
1201 * @data_out_dma: physical address for WRITES
1202 * @data_out_sz: data xfer size for WRITES
1203 * @data_in_dma: physical address for READS
1204 * @data_in_sz: data xfer size for READS
1209 _base_build_sg(struct MPT3SAS_ADAPTER
*ioc
, void *psge
,
1210 dma_addr_t data_out_dma
, size_t data_out_sz
, dma_addr_t data_in_dma
,
1215 if (!data_out_sz
&& !data_in_sz
) {
1216 _base_build_zero_len_sge(ioc
, psge
);
1220 if (data_out_sz
&& data_in_sz
) {
1221 /* WRITE sgel first */
1222 sgl_flags
= (MPI2_SGE_FLAGS_SIMPLE_ELEMENT
|
1223 MPI2_SGE_FLAGS_END_OF_BUFFER
| MPI2_SGE_FLAGS_HOST_TO_IOC
);
1224 sgl_flags
= sgl_flags
<< MPI2_SGE_FLAGS_SHIFT
;
1225 ioc
->base_add_sg_single(psge
, sgl_flags
|
1226 data_out_sz
, data_out_dma
);
1229 psge
+= ioc
->sge_size
;
1231 /* READ sgel last */
1232 sgl_flags
= (MPI2_SGE_FLAGS_SIMPLE_ELEMENT
|
1233 MPI2_SGE_FLAGS_LAST_ELEMENT
| MPI2_SGE_FLAGS_END_OF_BUFFER
|
1234 MPI2_SGE_FLAGS_END_OF_LIST
);
1235 sgl_flags
= sgl_flags
<< MPI2_SGE_FLAGS_SHIFT
;
1236 ioc
->base_add_sg_single(psge
, sgl_flags
|
1237 data_in_sz
, data_in_dma
);
1238 } else if (data_out_sz
) /* WRITE */ {
1239 sgl_flags
= (MPI2_SGE_FLAGS_SIMPLE_ELEMENT
|
1240 MPI2_SGE_FLAGS_LAST_ELEMENT
| MPI2_SGE_FLAGS_END_OF_BUFFER
|
1241 MPI2_SGE_FLAGS_END_OF_LIST
| MPI2_SGE_FLAGS_HOST_TO_IOC
);
1242 sgl_flags
= sgl_flags
<< MPI2_SGE_FLAGS_SHIFT
;
1243 ioc
->base_add_sg_single(psge
, sgl_flags
|
1244 data_out_sz
, data_out_dma
);
1245 } else if (data_in_sz
) /* READ */ {
1246 sgl_flags
= (MPI2_SGE_FLAGS_SIMPLE_ELEMENT
|
1247 MPI2_SGE_FLAGS_LAST_ELEMENT
| MPI2_SGE_FLAGS_END_OF_BUFFER
|
1248 MPI2_SGE_FLAGS_END_OF_LIST
);
1249 sgl_flags
= sgl_flags
<< MPI2_SGE_FLAGS_SHIFT
;
1250 ioc
->base_add_sg_single(psge
, sgl_flags
|
1251 data_in_sz
, data_in_dma
);
1255 /* IEEE format sgls */
1258 * _base_add_sg_single_ieee - add sg element for IEEE format
1259 * @paddr: virtual address for SGE
1261 * @chain_offset: number of 128 byte elements from start of segment
1262 * @length: data transfer length
1263 * @dma_addr: Physical address
1268 _base_add_sg_single_ieee(void *paddr
, u8 flags
, u8 chain_offset
, u32 length
,
1269 dma_addr_t dma_addr
)
1271 Mpi25IeeeSgeChain64_t
*sgel
= paddr
;
1273 sgel
->Flags
= flags
;
1274 sgel
->NextChainOffset
= chain_offset
;
1275 sgel
->Length
= cpu_to_le32(length
);
1276 sgel
->Address
= cpu_to_le64(dma_addr
);
1280 * _base_build_zero_len_sge_ieee - build zero length sg entry for IEEE format
1281 * @ioc: per adapter object
1282 * @paddr: virtual address for SGE
1284 * Create a zero length scatter gather entry to insure the IOCs hardware has
1285 * something to use if the target device goes brain dead and tries
1286 * to send data even when none is asked for.
1291 _base_build_zero_len_sge_ieee(struct MPT3SAS_ADAPTER
*ioc
, void *paddr
)
1293 u8 sgl_flags
= (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT
|
1294 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
|
1295 MPI25_IEEE_SGE_FLAGS_END_OF_LIST
);
1296 _base_add_sg_single_ieee(paddr
, sgl_flags
, 0, 0, -1);
1300 * _base_build_sg_scmd_ieee - main sg creation routine for IEEE format
1301 * @ioc: per adapter object
1302 * @scmd: scsi command
1303 * @smid: system request message index
1306 * The main routine that builds scatter gather table from a given
1307 * scsi request sent via the .queuecommand main handler.
1309 * Returns 0 success, anything else error
1312 _base_build_sg_scmd_ieee(struct MPT3SAS_ADAPTER
*ioc
,
1313 struct scsi_cmnd
*scmd
, u16 smid
)
1315 Mpi2SCSIIORequest_t
*mpi_request
;
1316 dma_addr_t chain_dma
;
1317 struct scatterlist
*sg_scmd
;
1318 void *sg_local
, *chain
;
1322 u32 sges_in_segment
;
1323 u8 simple_sgl_flags
;
1324 u8 simple_sgl_flags_last
;
1326 struct chain_tracker
*chain_req
;
1328 mpi_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
1330 /* init scatter gather flags */
1331 simple_sgl_flags
= MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT
|
1332 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
;
1333 simple_sgl_flags_last
= simple_sgl_flags
|
1334 MPI25_IEEE_SGE_FLAGS_END_OF_LIST
;
1335 chain_sgl_flags
= MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT
|
1336 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
;
1338 sg_scmd
= scsi_sglist(scmd
);
1339 sges_left
= scsi_dma_map(scmd
);
1341 sdev_printk(KERN_ERR
, scmd
->device
,
1342 "pci_map_sg failed: request for %d bytes!\n",
1343 scsi_bufflen(scmd
));
1347 sg_local
= &mpi_request
->SGL
;
1348 sges_in_segment
= (ioc
->request_sz
-
1349 offsetof(Mpi2SCSIIORequest_t
, SGL
))/ioc
->sge_size_ieee
;
1350 if (sges_left
<= sges_in_segment
)
1351 goto fill_in_last_segment
;
1353 mpi_request
->ChainOffset
= (sges_in_segment
- 1 /* chain element */) +
1354 (offsetof(Mpi2SCSIIORequest_t
, SGL
)/ioc
->sge_size_ieee
);
1356 /* fill in main message segment when there is a chain following */
1357 while (sges_in_segment
> 1) {
1358 _base_add_sg_single_ieee(sg_local
, simple_sgl_flags
, 0,
1359 sg_dma_len(sg_scmd
), sg_dma_address(sg_scmd
));
1360 sg_scmd
= sg_next(sg_scmd
);
1361 sg_local
+= ioc
->sge_size_ieee
;
1366 /* initializing the pointers */
1367 chain_req
= _base_get_chain_buffer_tracker(ioc
, smid
);
1370 chain
= chain_req
->chain_buffer
;
1371 chain_dma
= chain_req
->chain_buffer_dma
;
1373 sges_in_segment
= (sges_left
<=
1374 ioc
->max_sges_in_chain_message
) ? sges_left
:
1375 ioc
->max_sges_in_chain_message
;
1376 chain_offset
= (sges_left
== sges_in_segment
) ?
1377 0 : sges_in_segment
;
1378 chain_length
= sges_in_segment
* ioc
->sge_size_ieee
;
1380 chain_length
+= ioc
->sge_size_ieee
;
1381 _base_add_sg_single_ieee(sg_local
, chain_sgl_flags
,
1382 chain_offset
, chain_length
, chain_dma
);
1386 goto fill_in_last_segment
;
1388 /* fill in chain segments */
1389 while (sges_in_segment
) {
1390 _base_add_sg_single_ieee(sg_local
, simple_sgl_flags
, 0,
1391 sg_dma_len(sg_scmd
), sg_dma_address(sg_scmd
));
1392 sg_scmd
= sg_next(sg_scmd
);
1393 sg_local
+= ioc
->sge_size_ieee
;
1398 chain_req
= _base_get_chain_buffer_tracker(ioc
, smid
);
1401 chain
= chain_req
->chain_buffer
;
1402 chain_dma
= chain_req
->chain_buffer_dma
;
1406 fill_in_last_segment
:
1408 /* fill the last segment */
1411 _base_add_sg_single_ieee(sg_local
,
1412 simple_sgl_flags_last
, 0, sg_dma_len(sg_scmd
),
1413 sg_dma_address(sg_scmd
));
1415 _base_add_sg_single_ieee(sg_local
, simple_sgl_flags
, 0,
1416 sg_dma_len(sg_scmd
), sg_dma_address(sg_scmd
));
1417 sg_scmd
= sg_next(sg_scmd
);
1418 sg_local
+= ioc
->sge_size_ieee
;
1426 * _base_build_sg_ieee - build generic sg for IEEE format
1427 * @ioc: per adapter object
1428 * @psge: virtual address for SGE
1429 * @data_out_dma: physical address for WRITES
1430 * @data_out_sz: data xfer size for WRITES
1431 * @data_in_dma: physical address for READS
1432 * @data_in_sz: data xfer size for READS
1437 _base_build_sg_ieee(struct MPT3SAS_ADAPTER
*ioc
, void *psge
,
1438 dma_addr_t data_out_dma
, size_t data_out_sz
, dma_addr_t data_in_dma
,
1443 if (!data_out_sz
&& !data_in_sz
) {
1444 _base_build_zero_len_sge_ieee(ioc
, psge
);
1448 if (data_out_sz
&& data_in_sz
) {
1449 /* WRITE sgel first */
1450 sgl_flags
= MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT
|
1451 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
;
1452 _base_add_sg_single_ieee(psge
, sgl_flags
, 0, data_out_sz
,
1456 psge
+= ioc
->sge_size_ieee
;
1458 /* READ sgel last */
1459 sgl_flags
|= MPI25_IEEE_SGE_FLAGS_END_OF_LIST
;
1460 _base_add_sg_single_ieee(psge
, sgl_flags
, 0, data_in_sz
,
1462 } else if (data_out_sz
) /* WRITE */ {
1463 sgl_flags
= MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT
|
1464 MPI25_IEEE_SGE_FLAGS_END_OF_LIST
|
1465 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
;
1466 _base_add_sg_single_ieee(psge
, sgl_flags
, 0, data_out_sz
,
1468 } else if (data_in_sz
) /* READ */ {
1469 sgl_flags
= MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT
|
1470 MPI25_IEEE_SGE_FLAGS_END_OF_LIST
|
1471 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
;
1472 _base_add_sg_single_ieee(psge
, sgl_flags
, 0, data_in_sz
,
1477 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1480 * _base_config_dma_addressing - set dma addressing
1481 * @ioc: per adapter object
1482 * @pdev: PCI device struct
1484 * Returns 0 for success, non-zero for failure.
1487 _base_config_dma_addressing(struct MPT3SAS_ADAPTER
*ioc
, struct pci_dev
*pdev
)
1490 u64 consistent_dma_mask
;
1493 consistent_dma_mask
= DMA_BIT_MASK(64);
1495 consistent_dma_mask
= DMA_BIT_MASK(32);
1497 if (sizeof(dma_addr_t
) > 4) {
1498 const uint64_t required_mask
=
1499 dma_get_required_mask(&pdev
->dev
);
1500 if ((required_mask
> DMA_BIT_MASK(32)) &&
1501 !pci_set_dma_mask(pdev
, DMA_BIT_MASK(64)) &&
1502 !pci_set_consistent_dma_mask(pdev
, consistent_dma_mask
)) {
1503 ioc
->base_add_sg_single
= &_base_add_sg_single_64
;
1504 ioc
->sge_size
= sizeof(Mpi2SGESimple64_t
);
1510 if (!pci_set_dma_mask(pdev
, DMA_BIT_MASK(32))
1511 && !pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32))) {
1512 ioc
->base_add_sg_single
= &_base_add_sg_single_32
;
1513 ioc
->sge_size
= sizeof(Mpi2SGESimple32_t
);
1521 "%d BIT PCI BUS DMA ADDRESSING SUPPORTED, total mem (%ld kB)\n",
1522 ioc
->name
, ioc
->dma_mask
, convert_to_kb(s
.totalram
));
1528 _base_change_consistent_dma_mask(struct MPT3SAS_ADAPTER
*ioc
,
1529 struct pci_dev
*pdev
)
1531 if (pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64))) {
1532 if (pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32)))
1539 * _base_check_enable_msix - checks MSIX capabable.
1540 * @ioc: per adapter object
1542 * Check to see if card is capable of MSIX, and set number
1543 * of available msix vectors
1546 _base_check_enable_msix(struct MPT3SAS_ADAPTER
*ioc
)
1549 u16 message_control
;
1551 base
= pci_find_capability(ioc
->pdev
, PCI_CAP_ID_MSIX
);
1553 dfailprintk(ioc
, pr_info(MPT3SAS_FMT
"msix not supported\n",
1558 /* get msix vector count */
1560 pci_read_config_word(ioc
->pdev
, base
+ 2, &message_control
);
1561 ioc
->msix_vector_count
= (message_control
& 0x3FF) + 1;
1562 if (ioc
->msix_vector_count
> 8)
1563 ioc
->msix_vector_count
= 8;
1564 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
1565 "msix is supported, vector_count(%d)\n",
1566 ioc
->name
, ioc
->msix_vector_count
));
1571 * _base_free_irq - free irq
1572 * @ioc: per adapter object
1574 * Freeing respective reply_queue from the list.
1577 _base_free_irq(struct MPT3SAS_ADAPTER
*ioc
)
1579 struct adapter_reply_queue
*reply_q
, *next
;
1581 if (list_empty(&ioc
->reply_queue_list
))
1584 list_for_each_entry_safe(reply_q
, next
, &ioc
->reply_queue_list
, list
) {
1585 list_del(&reply_q
->list
);
1586 synchronize_irq(reply_q
->vector
);
1587 free_irq(reply_q
->vector
, reply_q
);
1593 * _base_request_irq - request irq
1594 * @ioc: per adapter object
1595 * @index: msix index into vector table
1596 * @vector: irq vector
1598 * Inserting respective reply_queue into the list.
1601 _base_request_irq(struct MPT3SAS_ADAPTER
*ioc
, u8 index
, u32 vector
)
1603 struct adapter_reply_queue
*reply_q
;
1606 reply_q
= kzalloc(sizeof(struct adapter_reply_queue
), GFP_KERNEL
);
1608 pr_err(MPT3SAS_FMT
"unable to allocate memory %d!\n",
1609 ioc
->name
, (int)sizeof(struct adapter_reply_queue
));
1613 reply_q
->msix_index
= index
;
1614 reply_q
->vector
= vector
;
1615 atomic_set(&reply_q
->busy
, 0);
1616 if (ioc
->msix_enable
)
1617 snprintf(reply_q
->name
, MPT_NAME_LENGTH
, "%s%d-msix%d",
1618 MPT3SAS_DRIVER_NAME
, ioc
->id
, index
);
1620 snprintf(reply_q
->name
, MPT_NAME_LENGTH
, "%s%d",
1621 MPT3SAS_DRIVER_NAME
, ioc
->id
);
1622 r
= request_irq(vector
, _base_interrupt
, IRQF_SHARED
, reply_q
->name
,
1625 pr_err(MPT3SAS_FMT
"unable to allocate interrupt %d!\n",
1626 reply_q
->name
, vector
);
1631 INIT_LIST_HEAD(&reply_q
->list
);
1632 list_add_tail(&reply_q
->list
, &ioc
->reply_queue_list
);
1637 * _base_assign_reply_queues - assigning msix index for each cpu
1638 * @ioc: per adapter object
1640 * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
1642 * It would nice if we could call irq_set_affinity, however it is not
1643 * an exported symbol
1646 _base_assign_reply_queues(struct MPT3SAS_ADAPTER
*ioc
)
1648 unsigned int cpu
, nr_cpus
, nr_msix
, index
= 0;
1650 if (!_base_is_controller_msix_enabled(ioc
))
1653 memset(ioc
->cpu_msix_table
, 0, ioc
->cpu_msix_table_sz
);
1655 nr_cpus
= num_online_cpus();
1656 nr_msix
= ioc
->reply_queue_count
= min(ioc
->reply_queue_count
,
1657 ioc
->facts
.MaxMSIxVectors
);
1661 cpu
= cpumask_first(cpu_online_mask
);
1664 unsigned int i
, group
= nr_cpus
/ nr_msix
;
1666 if (index
< nr_cpus
% nr_msix
)
1669 for (i
= 0 ; i
< group
; i
++) {
1670 ioc
->cpu_msix_table
[cpu
] = index
;
1671 cpu
= cpumask_next(cpu
, cpu_online_mask
);
1676 } while (cpu
< nr_cpus
);
1680 * _base_disable_msix - disables msix
1681 * @ioc: per adapter object
1685 _base_disable_msix(struct MPT3SAS_ADAPTER
*ioc
)
1687 if (!ioc
->msix_enable
)
1689 pci_disable_msix(ioc
->pdev
);
1690 ioc
->msix_enable
= 0;
1694 * _base_enable_msix - enables msix, failback to io_apic
1695 * @ioc: per adapter object
1699 _base_enable_msix(struct MPT3SAS_ADAPTER
*ioc
)
1701 struct msix_entry
*entries
, *a
;
1706 if (msix_disable
== -1 || msix_disable
== 0)
1712 if (_base_check_enable_msix(ioc
) != 0)
1715 ioc
->reply_queue_count
= min_t(int, ioc
->cpu_count
,
1716 ioc
->msix_vector_count
);
1718 printk(MPT3SAS_FMT
"MSI-X vectors supported: %d, no of cores"
1719 ": %d, max_msix_vectors: %d\n", ioc
->name
, ioc
->msix_vector_count
,
1720 ioc
->cpu_count
, max_msix_vectors
);
1722 if (!ioc
->rdpq_array_enable
&& max_msix_vectors
== -1)
1723 max_msix_vectors
= 8;
1725 if (max_msix_vectors
> 0) {
1726 ioc
->reply_queue_count
= min_t(int, max_msix_vectors
,
1727 ioc
->reply_queue_count
);
1728 ioc
->msix_vector_count
= ioc
->reply_queue_count
;
1729 } else if (max_msix_vectors
== 0)
1732 entries
= kcalloc(ioc
->reply_queue_count
, sizeof(struct msix_entry
),
1735 dfailprintk(ioc
, pr_info(MPT3SAS_FMT
1736 "kcalloc failed @ at %s:%d/%s() !!!\n",
1737 ioc
->name
, __FILE__
, __LINE__
, __func__
));
1741 for (i
= 0, a
= entries
; i
< ioc
->reply_queue_count
; i
++, a
++)
1744 r
= pci_enable_msix_exact(ioc
->pdev
, entries
, ioc
->reply_queue_count
);
1746 dfailprintk(ioc
, pr_info(MPT3SAS_FMT
1747 "pci_enable_msix_exact failed (r=%d) !!!\n",
1753 ioc
->msix_enable
= 1;
1754 for (i
= 0, a
= entries
; i
< ioc
->reply_queue_count
; i
++, a
++) {
1755 r
= _base_request_irq(ioc
, i
, a
->vector
);
1757 _base_free_irq(ioc
);
1758 _base_disable_msix(ioc
);
1767 /* failback to io_apic interrupt routing */
1770 ioc
->reply_queue_count
= 1;
1771 r
= _base_request_irq(ioc
, 0, ioc
->pdev
->irq
);
1777 * mpt3sas_base_map_resources - map in controller resources (io/irq/memap)
1778 * @ioc: per adapter object
1780 * Returns 0 for success, non-zero for failure.
1783 mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER
*ioc
)
1785 struct pci_dev
*pdev
= ioc
->pdev
;
1791 struct adapter_reply_queue
*reply_q
;
1793 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n",
1794 ioc
->name
, __func__
));
1796 ioc
->bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
1797 if (pci_enable_device_mem(pdev
)) {
1798 pr_warn(MPT3SAS_FMT
"pci_enable_device_mem: failed\n",
1805 if (pci_request_selected_regions(pdev
, ioc
->bars
,
1806 MPT3SAS_DRIVER_NAME
)) {
1807 pr_warn(MPT3SAS_FMT
"pci_request_selected_regions: failed\n",
1814 /* AER (Advanced Error Reporting) hooks */
1815 pci_enable_pcie_error_reporting(pdev
);
1817 pci_set_master(pdev
);
1820 if (_base_config_dma_addressing(ioc
, pdev
) != 0) {
1821 pr_warn(MPT3SAS_FMT
"no suitable DMA mask for %s\n",
1822 ioc
->name
, pci_name(pdev
));
1827 for (i
= 0, memap_sz
= 0, pio_sz
= 0 ; i
< DEVICE_COUNT_RESOURCE
; i
++) {
1828 if (pci_resource_flags(pdev
, i
) & IORESOURCE_IO
) {
1831 pio_chip
= (u64
)pci_resource_start(pdev
, i
);
1832 pio_sz
= pci_resource_len(pdev
, i
);
1833 } else if (pci_resource_flags(pdev
, i
) & IORESOURCE_MEM
) {
1836 ioc
->chip_phys
= pci_resource_start(pdev
, i
);
1837 chip_phys
= (u64
)ioc
->chip_phys
;
1838 memap_sz
= pci_resource_len(pdev
, i
);
1839 ioc
->chip
= ioremap(ioc
->chip_phys
, memap_sz
);
1840 if (ioc
->chip
== NULL
) {
1841 pr_err(MPT3SAS_FMT
"unable to map adapter memory!\n",
1849 _base_mask_interrupts(ioc
);
1851 r
= _base_get_ioc_facts(ioc
, CAN_SLEEP
);
1855 if (!ioc
->rdpq_array_enable_assigned
) {
1856 ioc
->rdpq_array_enable
= ioc
->rdpq_array_capable
;
1857 ioc
->rdpq_array_enable_assigned
= 1;
1860 r
= _base_enable_msix(ioc
);
1864 list_for_each_entry(reply_q
, &ioc
->reply_queue_list
, list
)
1865 pr_info(MPT3SAS_FMT
"%s: IRQ %d\n",
1866 reply_q
->name
, ((ioc
->msix_enable
) ? "PCI-MSI-X enabled" :
1867 "IO-APIC enabled"), reply_q
->vector
);
1869 pr_info(MPT3SAS_FMT
"iomem(0x%016llx), mapped(0x%p), size(%d)\n",
1870 ioc
->name
, (unsigned long long)chip_phys
, ioc
->chip
, memap_sz
);
1871 pr_info(MPT3SAS_FMT
"ioport(0x%016llx), size(%d)\n",
1872 ioc
->name
, (unsigned long long)pio_chip
, pio_sz
);
1874 /* Save PCI configuration state for recovery from PCI AER/EEH errors */
1875 pci_save_state(pdev
);
1882 pci_release_selected_regions(ioc
->pdev
, ioc
->bars
);
1883 pci_disable_pcie_error_reporting(pdev
);
1884 pci_disable_device(pdev
);
1889 * mpt3sas_base_get_msg_frame - obtain request mf pointer
1890 * @ioc: per adapter object
1891 * @smid: system request message index(smid zero is invalid)
1893 * Returns virt pointer to message frame.
1896 mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
1898 return (void *)(ioc
->request
+ (smid
* ioc
->request_sz
));
1902 * mpt3sas_base_get_sense_buffer - obtain a sense buffer virt addr
1903 * @ioc: per adapter object
1904 * @smid: system request message index
1906 * Returns virt pointer to sense buffer.
1909 mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
1911 return (void *)(ioc
->sense
+ ((smid
- 1) * SCSI_SENSE_BUFFERSIZE
));
1915 * mpt3sas_base_get_sense_buffer_dma - obtain a sense buffer dma addr
1916 * @ioc: per adapter object
1917 * @smid: system request message index
1919 * Returns phys pointer to the low 32bit address of the sense buffer.
1922 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
1924 return cpu_to_le32(ioc
->sense_dma
+ ((smid
- 1) *
1925 SCSI_SENSE_BUFFERSIZE
));
1929 * mpt3sas_base_get_reply_virt_addr - obtain reply frames virt address
1930 * @ioc: per adapter object
1931 * @phys_addr: lower 32 physical addr of the reply
1933 * Converts 32bit lower physical addr into a virt address.
1936 mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER
*ioc
, u32 phys_addr
)
1940 return ioc
->reply
+ (phys_addr
- (u32
)ioc
->reply_dma
);
1944 * mpt3sas_base_get_smid - obtain a free smid from internal queue
1945 * @ioc: per adapter object
1946 * @cb_idx: callback index
1948 * Returns smid (zero is invalid)
1951 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER
*ioc
, u8 cb_idx
)
1953 unsigned long flags
;
1954 struct request_tracker
*request
;
1957 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
1958 if (list_empty(&ioc
->internal_free_list
)) {
1959 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
1960 pr_err(MPT3SAS_FMT
"%s: smid not available\n",
1961 ioc
->name
, __func__
);
1965 request
= list_entry(ioc
->internal_free_list
.next
,
1966 struct request_tracker
, tracker_list
);
1967 request
->cb_idx
= cb_idx
;
1968 smid
= request
->smid
;
1969 list_del(&request
->tracker_list
);
1970 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
1975 * mpt3sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
1976 * @ioc: per adapter object
1977 * @cb_idx: callback index
1978 * @scmd: pointer to scsi command object
1980 * Returns smid (zero is invalid)
1983 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER
*ioc
, u8 cb_idx
,
1984 struct scsi_cmnd
*scmd
)
1986 unsigned long flags
;
1987 struct scsiio_tracker
*request
;
1990 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
1991 if (list_empty(&ioc
->free_list
)) {
1992 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
1993 pr_err(MPT3SAS_FMT
"%s: smid not available\n",
1994 ioc
->name
, __func__
);
1998 request
= list_entry(ioc
->free_list
.next
,
1999 struct scsiio_tracker
, tracker_list
);
2000 request
->scmd
= scmd
;
2001 request
->cb_idx
= cb_idx
;
2002 smid
= request
->smid
;
2003 list_del(&request
->tracker_list
);
2004 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2009 * mpt3sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
2010 * @ioc: per adapter object
2011 * @cb_idx: callback index
2013 * Returns smid (zero is invalid)
2016 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER
*ioc
, u8 cb_idx
)
2018 unsigned long flags
;
2019 struct request_tracker
*request
;
2022 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
2023 if (list_empty(&ioc
->hpr_free_list
)) {
2024 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2028 request
= list_entry(ioc
->hpr_free_list
.next
,
2029 struct request_tracker
, tracker_list
);
2030 request
->cb_idx
= cb_idx
;
2031 smid
= request
->smid
;
2032 list_del(&request
->tracker_list
);
2033 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2038 * mpt3sas_base_free_smid - put smid back on free_list
2039 * @ioc: per adapter object
2040 * @smid: system request message index
2045 mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
2047 unsigned long flags
;
2049 struct chain_tracker
*chain_req
, *next
;
2051 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
2052 if (smid
< ioc
->hi_priority_smid
) {
2055 if (!list_empty(&ioc
->scsi_lookup
[i
].chain_list
)) {
2056 list_for_each_entry_safe(chain_req
, next
,
2057 &ioc
->scsi_lookup
[i
].chain_list
, tracker_list
) {
2058 list_del_init(&chain_req
->tracker_list
);
2059 list_add(&chain_req
->tracker_list
,
2060 &ioc
->free_chain_list
);
2063 ioc
->scsi_lookup
[i
].cb_idx
= 0xFF;
2064 ioc
->scsi_lookup
[i
].scmd
= NULL
;
2065 list_add(&ioc
->scsi_lookup
[i
].tracker_list
, &ioc
->free_list
);
2066 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2069 * See _wait_for_commands_to_complete() call with regards
2072 if (ioc
->shost_recovery
&& ioc
->pending_io_count
) {
2073 if (ioc
->pending_io_count
== 1)
2074 wake_up(&ioc
->reset_wq
);
2075 ioc
->pending_io_count
--;
2078 } else if (smid
< ioc
->internal_smid
) {
2080 i
= smid
- ioc
->hi_priority_smid
;
2081 ioc
->hpr_lookup
[i
].cb_idx
= 0xFF;
2082 list_add(&ioc
->hpr_lookup
[i
].tracker_list
, &ioc
->hpr_free_list
);
2083 } else if (smid
<= ioc
->hba_queue_depth
) {
2084 /* internal queue */
2085 i
= smid
- ioc
->internal_smid
;
2086 ioc
->internal_lookup
[i
].cb_idx
= 0xFF;
2087 list_add(&ioc
->internal_lookup
[i
].tracker_list
,
2088 &ioc
->internal_free_list
);
2090 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2094 * _base_writeq - 64 bit write to MMIO
2095 * @ioc: per adapter object
2097 * @addr: address in MMIO space
2098 * @writeq_lock: spin lock
2100 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
2101 * care of 32 bit environment where its not quarenteed to send the entire word
2104 #if defined(writeq) && defined(CONFIG_64BIT)
2106 _base_writeq(__u64 b
, volatile void __iomem
*addr
, spinlock_t
*writeq_lock
)
2108 writeq(cpu_to_le64(b
), addr
);
2112 _base_writeq(__u64 b
, volatile void __iomem
*addr
, spinlock_t
*writeq_lock
)
2114 unsigned long flags
;
2115 __u64 data_out
= cpu_to_le64(b
);
2117 spin_lock_irqsave(writeq_lock
, flags
);
2118 writel((u32
)(data_out
), addr
);
2119 writel((u32
)(data_out
>> 32), (addr
+ 4));
2120 spin_unlock_irqrestore(writeq_lock
, flags
);
2125 _base_get_msix_index(struct MPT3SAS_ADAPTER
*ioc
)
2127 return ioc
->cpu_msix_table
[raw_smp_processor_id()];
2131 * mpt3sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
2132 * @ioc: per adapter object
2133 * @smid: system request message index
2134 * @handle: device handle
2139 mpt3sas_base_put_smid_scsi_io(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
, u16 handle
)
2141 Mpi2RequestDescriptorUnion_t descriptor
;
2142 u64
*request
= (u64
*)&descriptor
;
2145 descriptor
.SCSIIO
.RequestFlags
= MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO
;
2146 descriptor
.SCSIIO
.MSIxIndex
= _base_get_msix_index(ioc
);
2147 descriptor
.SCSIIO
.SMID
= cpu_to_le16(smid
);
2148 descriptor
.SCSIIO
.DevHandle
= cpu_to_le16(handle
);
2149 descriptor
.SCSIIO
.LMID
= 0;
2150 _base_writeq(*request
, &ioc
->chip
->RequestDescriptorPostLow
,
2151 &ioc
->scsi_lookup_lock
);
2155 * mpt3sas_base_put_smid_fast_path - send fast path request to firmware
2156 * @ioc: per adapter object
2157 * @smid: system request message index
2158 * @handle: device handle
2163 mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
,
2166 Mpi2RequestDescriptorUnion_t descriptor
;
2167 u64
*request
= (u64
*)&descriptor
;
2169 descriptor
.SCSIIO
.RequestFlags
=
2170 MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO
;
2171 descriptor
.SCSIIO
.MSIxIndex
= _base_get_msix_index(ioc
);
2172 descriptor
.SCSIIO
.SMID
= cpu_to_le16(smid
);
2173 descriptor
.SCSIIO
.DevHandle
= cpu_to_le16(handle
);
2174 descriptor
.SCSIIO
.LMID
= 0;
2175 _base_writeq(*request
, &ioc
->chip
->RequestDescriptorPostLow
,
2176 &ioc
->scsi_lookup_lock
);
2180 * mpt3sas_base_put_smid_hi_priority - send Task Managment request to firmware
2181 * @ioc: per adapter object
2182 * @smid: system request message index
2187 mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
2189 Mpi2RequestDescriptorUnion_t descriptor
;
2190 u64
*request
= (u64
*)&descriptor
;
2192 descriptor
.HighPriority
.RequestFlags
=
2193 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY
;
2194 descriptor
.HighPriority
.MSIxIndex
= 0;
2195 descriptor
.HighPriority
.SMID
= cpu_to_le16(smid
);
2196 descriptor
.HighPriority
.LMID
= 0;
2197 descriptor
.HighPriority
.Reserved1
= 0;
2198 _base_writeq(*request
, &ioc
->chip
->RequestDescriptorPostLow
,
2199 &ioc
->scsi_lookup_lock
);
2203 * mpt3sas_base_put_smid_default - Default, primarily used for config pages
2204 * @ioc: per adapter object
2205 * @smid: system request message index
2210 mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
2212 Mpi2RequestDescriptorUnion_t descriptor
;
2213 u64
*request
= (u64
*)&descriptor
;
2215 descriptor
.Default
.RequestFlags
= MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE
;
2216 descriptor
.Default
.MSIxIndex
= _base_get_msix_index(ioc
);
2217 descriptor
.Default
.SMID
= cpu_to_le16(smid
);
2218 descriptor
.Default
.LMID
= 0;
2219 descriptor
.Default
.DescriptorTypeDependent
= 0;
2220 _base_writeq(*request
, &ioc
->chip
->RequestDescriptorPostLow
,
2221 &ioc
->scsi_lookup_lock
);
2225 * _base_display_intel_branding - Display branding string
2226 * @ioc: per adapter object
2231 _base_display_intel_branding(struct MPT3SAS_ADAPTER
*ioc
)
2233 if (ioc
->pdev
->subsystem_vendor
!= PCI_VENDOR_ID_INTEL
)
2236 switch (ioc
->pdev
->device
) {
2237 case MPI25_MFGPAGE_DEVID_SAS3008
:
2238 switch (ioc
->pdev
->subsystem_device
) {
2239 case MPT3SAS_INTEL_RMS3JC080_SSDID
:
2240 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2241 MPT3SAS_INTEL_RMS3JC080_BRANDING
);
2244 case MPT3SAS_INTEL_RS3GC008_SSDID
:
2245 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2246 MPT3SAS_INTEL_RS3GC008_BRANDING
);
2248 case MPT3SAS_INTEL_RS3FC044_SSDID
:
2249 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2250 MPT3SAS_INTEL_RS3FC044_BRANDING
);
2252 case MPT3SAS_INTEL_RS3UC080_SSDID
:
2253 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2254 MPT3SAS_INTEL_RS3UC080_BRANDING
);
2258 "Intel(R) Controller: Subsystem ID: 0x%X\n",
2259 ioc
->name
, ioc
->pdev
->subsystem_device
);
2265 "Intel(R) Controller: Subsystem ID: 0x%X\n",
2266 ioc
->name
, ioc
->pdev
->subsystem_device
);
2274 * _base_display_ioc_capabilities - Disply IOC's capabilities.
2275 * @ioc: per adapter object
2280 _base_display_ioc_capabilities(struct MPT3SAS_ADAPTER
*ioc
)
2284 u32 iounit_pg1_flags
;
2287 bios_version
= le32_to_cpu(ioc
->bios_pg3
.BiosVersion
);
2288 strncpy(desc
, ioc
->manu_pg0
.ChipName
, 16);
2289 pr_info(MPT3SAS_FMT
"%s: FWVersion(%02d.%02d.%02d.%02d), "\
2290 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
2292 (ioc
->facts
.FWVersion
.Word
& 0xFF000000) >> 24,
2293 (ioc
->facts
.FWVersion
.Word
& 0x00FF0000) >> 16,
2294 (ioc
->facts
.FWVersion
.Word
& 0x0000FF00) >> 8,
2295 ioc
->facts
.FWVersion
.Word
& 0x000000FF,
2296 ioc
->pdev
->revision
,
2297 (bios_version
& 0xFF000000) >> 24,
2298 (bios_version
& 0x00FF0000) >> 16,
2299 (bios_version
& 0x0000FF00) >> 8,
2300 bios_version
& 0x000000FF);
2302 _base_display_intel_branding(ioc
);
2304 pr_info(MPT3SAS_FMT
"Protocol=(", ioc
->name
);
2306 if (ioc
->facts
.ProtocolFlags
& MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR
) {
2307 pr_info("Initiator");
2311 if (ioc
->facts
.ProtocolFlags
& MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET
) {
2312 pr_info("%sTarget", i
? "," : "");
2318 pr_info("Capabilities=(");
2320 if (ioc
->facts
.IOCCapabilities
&
2321 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID
) {
2326 if (ioc
->facts
.IOCCapabilities
& MPI2_IOCFACTS_CAPABILITY_TLR
) {
2327 pr_info("%sTLR", i
? "," : "");
2331 if (ioc
->facts
.IOCCapabilities
& MPI2_IOCFACTS_CAPABILITY_MULTICAST
) {
2332 pr_info("%sMulticast", i
? "," : "");
2336 if (ioc
->facts
.IOCCapabilities
&
2337 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET
) {
2338 pr_info("%sBIDI Target", i
? "," : "");
2342 if (ioc
->facts
.IOCCapabilities
& MPI2_IOCFACTS_CAPABILITY_EEDP
) {
2343 pr_info("%sEEDP", i
? "," : "");
2347 if (ioc
->facts
.IOCCapabilities
&
2348 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER
) {
2349 pr_info("%sSnapshot Buffer", i
? "," : "");
2353 if (ioc
->facts
.IOCCapabilities
&
2354 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER
) {
2355 pr_info("%sDiag Trace Buffer", i
? "," : "");
2359 if (ioc
->facts
.IOCCapabilities
&
2360 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER
) {
2361 pr_info("%sDiag Extended Buffer", i
? "," : "");
2365 if (ioc
->facts
.IOCCapabilities
&
2366 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING
) {
2367 pr_info("%sTask Set Full", i
? "," : "");
2371 iounit_pg1_flags
= le32_to_cpu(ioc
->iounit_pg1
.Flags
);
2372 if (!(iounit_pg1_flags
& MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE
)) {
2373 pr_info("%sNCQ", i
? "," : "");
2381 * mpt3sas_base_update_missing_delay - change the missing delay timers
2382 * @ioc: per adapter object
2383 * @device_missing_delay: amount of time till device is reported missing
2384 * @io_missing_delay: interval IO is returned when there is a missing device
2388 * Passed on the command line, this function will modify the device missing
2389 * delay, as well as the io missing delay. This should be called at driver
2393 mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER
*ioc
,
2394 u16 device_missing_delay
, u8 io_missing_delay
)
2396 u16 dmd
, dmd_new
, dmd_orignal
;
2397 u8 io_missing_delay_original
;
2399 Mpi2SasIOUnitPage1_t
*sas_iounit_pg1
= NULL
;
2400 Mpi2ConfigReply_t mpi_reply
;
2404 mpt3sas_config_get_number_hba_phys(ioc
, &num_phys
);
2408 sz
= offsetof(Mpi2SasIOUnitPage1_t
, PhyData
) + (num_phys
*
2409 sizeof(Mpi2SasIOUnit1PhyData_t
));
2410 sas_iounit_pg1
= kzalloc(sz
, GFP_KERNEL
);
2411 if (!sas_iounit_pg1
) {
2412 pr_err(MPT3SAS_FMT
"failure at %s:%d/%s()!\n",
2413 ioc
->name
, __FILE__
, __LINE__
, __func__
);
2416 if ((mpt3sas_config_get_sas_iounit_pg1(ioc
, &mpi_reply
,
2417 sas_iounit_pg1
, sz
))) {
2418 pr_err(MPT3SAS_FMT
"failure at %s:%d/%s()!\n",
2419 ioc
->name
, __FILE__
, __LINE__
, __func__
);
2422 ioc_status
= le16_to_cpu(mpi_reply
.IOCStatus
) &
2423 MPI2_IOCSTATUS_MASK
;
2424 if (ioc_status
!= MPI2_IOCSTATUS_SUCCESS
) {
2425 pr_err(MPT3SAS_FMT
"failure at %s:%d/%s()!\n",
2426 ioc
->name
, __FILE__
, __LINE__
, __func__
);
2430 /* device missing delay */
2431 dmd
= sas_iounit_pg1
->ReportDeviceMissingDelay
;
2432 if (dmd
& MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16
)
2433 dmd
= (dmd
& MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK
) * 16;
2435 dmd
= dmd
& MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK
;
2437 if (device_missing_delay
> 0x7F) {
2438 dmd
= (device_missing_delay
> 0x7F0) ? 0x7F0 :
2439 device_missing_delay
;
2441 dmd
|= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16
;
2443 dmd
= device_missing_delay
;
2444 sas_iounit_pg1
->ReportDeviceMissingDelay
= dmd
;
2446 /* io missing delay */
2447 io_missing_delay_original
= sas_iounit_pg1
->IODeviceMissingDelay
;
2448 sas_iounit_pg1
->IODeviceMissingDelay
= io_missing_delay
;
2450 if (!mpt3sas_config_set_sas_iounit_pg1(ioc
, &mpi_reply
, sas_iounit_pg1
,
2452 if (dmd
& MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16
)
2454 MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK
) * 16;
2457 dmd
& MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK
;
2458 pr_info(MPT3SAS_FMT
"device_missing_delay: old(%d), new(%d)\n",
2459 ioc
->name
, dmd_orignal
, dmd_new
);
2460 pr_info(MPT3SAS_FMT
"ioc_missing_delay: old(%d), new(%d)\n",
2461 ioc
->name
, io_missing_delay_original
,
2463 ioc
->device_missing_delay
= dmd_new
;
2464 ioc
->io_missing_delay
= io_missing_delay
;
2468 kfree(sas_iounit_pg1
);
2471 * _base_static_config_pages - static start of day config pages
2472 * @ioc: per adapter object
2477 _base_static_config_pages(struct MPT3SAS_ADAPTER
*ioc
)
2479 Mpi2ConfigReply_t mpi_reply
;
2480 u32 iounit_pg1_flags
;
2482 mpt3sas_config_get_manufacturing_pg0(ioc
, &mpi_reply
, &ioc
->manu_pg0
);
2483 if (ioc
->ir_firmware
)
2484 mpt3sas_config_get_manufacturing_pg10(ioc
, &mpi_reply
,
2488 * Ensure correct T10 PI operation if vendor left EEDPTagMode
2489 * flag unset in NVDATA.
2491 mpt3sas_config_get_manufacturing_pg11(ioc
, &mpi_reply
, &ioc
->manu_pg11
);
2492 if (ioc
->manu_pg11
.EEDPTagMode
== 0) {
2493 pr_err("%s: overriding NVDATA EEDPTagMode setting\n",
2495 ioc
->manu_pg11
.EEDPTagMode
&= ~0x3;
2496 ioc
->manu_pg11
.EEDPTagMode
|= 0x1;
2497 mpt3sas_config_set_manufacturing_pg11(ioc
, &mpi_reply
,
2501 mpt3sas_config_get_bios_pg2(ioc
, &mpi_reply
, &ioc
->bios_pg2
);
2502 mpt3sas_config_get_bios_pg3(ioc
, &mpi_reply
, &ioc
->bios_pg3
);
2503 mpt3sas_config_get_ioc_pg8(ioc
, &mpi_reply
, &ioc
->ioc_pg8
);
2504 mpt3sas_config_get_iounit_pg0(ioc
, &mpi_reply
, &ioc
->iounit_pg0
);
2505 mpt3sas_config_get_iounit_pg1(ioc
, &mpi_reply
, &ioc
->iounit_pg1
);
2506 mpt3sas_config_get_iounit_pg8(ioc
, &mpi_reply
, &ioc
->iounit_pg8
);
2507 _base_display_ioc_capabilities(ioc
);
2510 * Enable task_set_full handling in iounit_pg1 when the
2511 * facts capabilities indicate that its supported.
2513 iounit_pg1_flags
= le32_to_cpu(ioc
->iounit_pg1
.Flags
);
2514 if ((ioc
->facts
.IOCCapabilities
&
2515 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING
))
2517 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING
;
2520 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING
;
2521 ioc
->iounit_pg1
.Flags
= cpu_to_le32(iounit_pg1_flags
);
2522 mpt3sas_config_set_iounit_pg1(ioc
, &mpi_reply
, &ioc
->iounit_pg1
);
2524 if (ioc
->iounit_pg8
.NumSensors
)
2525 ioc
->temp_sensors_count
= ioc
->iounit_pg8
.NumSensors
;
2529 * _base_release_memory_pools - release memory
2530 * @ioc: per adapter object
2532 * Free memory allocated from _base_allocate_memory_pools.
2537 _base_release_memory_pools(struct MPT3SAS_ADAPTER
*ioc
)
2540 struct reply_post_struct
*rps
;
2542 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2546 pci_free_consistent(ioc
->pdev
, ioc
->request_dma_sz
,
2547 ioc
->request
, ioc
->request_dma
);
2548 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
2549 "request_pool(0x%p): free\n",
2550 ioc
->name
, ioc
->request
));
2551 ioc
->request
= NULL
;
2555 pci_pool_free(ioc
->sense_dma_pool
, ioc
->sense
, ioc
->sense_dma
);
2556 if (ioc
->sense_dma_pool
)
2557 pci_pool_destroy(ioc
->sense_dma_pool
);
2558 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
2559 "sense_pool(0x%p): free\n",
2560 ioc
->name
, ioc
->sense
));
2565 pci_pool_free(ioc
->reply_dma_pool
, ioc
->reply
, ioc
->reply_dma
);
2566 if (ioc
->reply_dma_pool
)
2567 pci_pool_destroy(ioc
->reply_dma_pool
);
2568 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
2569 "reply_pool(0x%p): free\n",
2570 ioc
->name
, ioc
->reply
));
2574 if (ioc
->reply_free
) {
2575 pci_pool_free(ioc
->reply_free_dma_pool
, ioc
->reply_free
,
2576 ioc
->reply_free_dma
);
2577 if (ioc
->reply_free_dma_pool
)
2578 pci_pool_destroy(ioc
->reply_free_dma_pool
);
2579 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
2580 "reply_free_pool(0x%p): free\n",
2581 ioc
->name
, ioc
->reply_free
));
2582 ioc
->reply_free
= NULL
;
2585 if (ioc
->reply_post
) {
2587 rps
= &ioc
->reply_post
[i
];
2588 if (rps
->reply_post_free
) {
2590 ioc
->reply_post_free_dma_pool
,
2591 rps
->reply_post_free
,
2592 rps
->reply_post_free_dma
);
2593 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
2594 "reply_post_free_pool(0x%p): free\n",
2595 ioc
->name
, rps
->reply_post_free
));
2596 rps
->reply_post_free
= NULL
;
2598 } while (ioc
->rdpq_array_enable
&&
2599 (++i
< ioc
->reply_queue_count
));
2601 if (ioc
->reply_post_free_dma_pool
)
2602 pci_pool_destroy(ioc
->reply_post_free_dma_pool
);
2603 kfree(ioc
->reply_post
);
2606 if (ioc
->config_page
) {
2607 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
2608 "config_page(0x%p): free\n", ioc
->name
,
2610 pci_free_consistent(ioc
->pdev
, ioc
->config_page_sz
,
2611 ioc
->config_page
, ioc
->config_page_dma
);
2614 if (ioc
->scsi_lookup
) {
2615 free_pages((ulong
)ioc
->scsi_lookup
, ioc
->scsi_lookup_pages
);
2616 ioc
->scsi_lookup
= NULL
;
2618 kfree(ioc
->hpr_lookup
);
2619 kfree(ioc
->internal_lookup
);
2620 if (ioc
->chain_lookup
) {
2621 for (i
= 0; i
< ioc
->chain_depth
; i
++) {
2622 if (ioc
->chain_lookup
[i
].chain_buffer
)
2623 pci_pool_free(ioc
->chain_dma_pool
,
2624 ioc
->chain_lookup
[i
].chain_buffer
,
2625 ioc
->chain_lookup
[i
].chain_buffer_dma
);
2627 if (ioc
->chain_dma_pool
)
2628 pci_pool_destroy(ioc
->chain_dma_pool
);
2629 free_pages((ulong
)ioc
->chain_lookup
, ioc
->chain_pages
);
2630 ioc
->chain_lookup
= NULL
;
2635 * _base_allocate_memory_pools - allocate start of day memory pools
2636 * @ioc: per adapter object
2637 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2639 * Returns 0 success, anything else error
2642 _base_allocate_memory_pools(struct MPT3SAS_ADAPTER
*ioc
, int sleep_flag
)
2644 struct mpt3sas_facts
*facts
;
2645 u16 max_sge_elements
;
2646 u16 chains_needed_per_io
;
2647 u32 sz
, total_sz
, reply_post_free_sz
;
2649 u16 max_request_credit
;
2650 unsigned short sg_tablesize
;
2654 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2659 facts
= &ioc
->facts
;
2661 /* command line tunables for max sgl entries */
2662 if (max_sgl_entries
!= -1)
2663 sg_tablesize
= max_sgl_entries
;
2665 sg_tablesize
= MPT3SAS_SG_DEPTH
;
2667 if (sg_tablesize
< MPT3SAS_MIN_PHYS_SEGMENTS
)
2668 sg_tablesize
= MPT3SAS_MIN_PHYS_SEGMENTS
;
2669 else if (sg_tablesize
> MPT3SAS_MAX_PHYS_SEGMENTS
)
2670 sg_tablesize
= MPT3SAS_MAX_PHYS_SEGMENTS
;
2671 ioc
->shost
->sg_tablesize
= sg_tablesize
;
2673 ioc
->hi_priority_depth
= facts
->HighPriorityCredit
;
2674 ioc
->internal_depth
= ioc
->hi_priority_depth
+ (5);
2675 /* command line tunables for max controller queue depth */
2676 if (max_queue_depth
!= -1 && max_queue_depth
!= 0) {
2677 max_request_credit
= min_t(u16
, max_queue_depth
+
2678 ioc
->hi_priority_depth
+ ioc
->internal_depth
,
2679 facts
->RequestCredit
);
2680 if (max_request_credit
> MAX_HBA_QUEUE_DEPTH
)
2681 max_request_credit
= MAX_HBA_QUEUE_DEPTH
;
2683 max_request_credit
= min_t(u16
, facts
->RequestCredit
,
2684 MAX_HBA_QUEUE_DEPTH
);
2686 ioc
->hba_queue_depth
= max_request_credit
;
2688 /* request frame size */
2689 ioc
->request_sz
= facts
->IOCRequestFrameSize
* 4;
2691 /* reply frame size */
2692 ioc
->reply_sz
= facts
->ReplyFrameSize
* 4;
2694 /* calculate the max scatter element size */
2695 sge_size
= max_t(u16
, ioc
->sge_size
, ioc
->sge_size_ieee
);
2699 /* calculate number of sg elements left over in the 1st frame */
2700 max_sge_elements
= ioc
->request_sz
- ((sizeof(Mpi2SCSIIORequest_t
) -
2701 sizeof(Mpi2SGEIOUnion_t
)) + sge_size
);
2702 ioc
->max_sges_in_main_message
= max_sge_elements
/sge_size
;
2704 /* now do the same for a chain buffer */
2705 max_sge_elements
= ioc
->request_sz
- sge_size
;
2706 ioc
->max_sges_in_chain_message
= max_sge_elements
/sge_size
;
2709 * MPT3SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
2711 chains_needed_per_io
= ((ioc
->shost
->sg_tablesize
-
2712 ioc
->max_sges_in_main_message
)/ioc
->max_sges_in_chain_message
)
2714 if (chains_needed_per_io
> facts
->MaxChainDepth
) {
2715 chains_needed_per_io
= facts
->MaxChainDepth
;
2716 ioc
->shost
->sg_tablesize
= min_t(u16
,
2717 ioc
->max_sges_in_main_message
+ (ioc
->max_sges_in_chain_message
2718 * chains_needed_per_io
), ioc
->shost
->sg_tablesize
);
2720 ioc
->chains_needed_per_io
= chains_needed_per_io
;
2722 /* reply free queue sizing - taking into account for 64 FW events */
2723 ioc
->reply_free_queue_depth
= ioc
->hba_queue_depth
+ 64;
2725 /* calculate reply descriptor post queue depth */
2726 ioc
->reply_post_queue_depth
= ioc
->hba_queue_depth
+
2727 ioc
->reply_free_queue_depth
+ 1 ;
2728 /* align the reply post queue on the next 16 count boundary */
2729 if (ioc
->reply_post_queue_depth
% 16)
2730 ioc
->reply_post_queue_depth
+= 16 -
2731 (ioc
->reply_post_queue_depth
% 16);
2734 if (ioc
->reply_post_queue_depth
>
2735 facts
->MaxReplyDescriptorPostQueueDepth
) {
2736 ioc
->reply_post_queue_depth
=
2737 facts
->MaxReplyDescriptorPostQueueDepth
-
2738 (facts
->MaxReplyDescriptorPostQueueDepth
% 16);
2739 ioc
->hba_queue_depth
=
2740 ((ioc
->reply_post_queue_depth
- 64) / 2) - 1;
2741 ioc
->reply_free_queue_depth
= ioc
->hba_queue_depth
+ 64;
2744 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"scatter gather: " \
2745 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
2746 "chains_per_io(%d)\n", ioc
->name
, ioc
->max_sges_in_main_message
,
2747 ioc
->max_sges_in_chain_message
, ioc
->shost
->sg_tablesize
,
2748 ioc
->chains_needed_per_io
));
2750 /* reply post queue, 16 byte align */
2751 reply_post_free_sz
= ioc
->reply_post_queue_depth
*
2752 sizeof(Mpi2DefaultReplyDescriptor_t
);
2754 sz
= reply_post_free_sz
;
2755 if (_base_is_controller_msix_enabled(ioc
) && !ioc
->rdpq_array_enable
)
2756 sz
*= ioc
->reply_queue_count
;
2758 ioc
->reply_post
= kcalloc((ioc
->rdpq_array_enable
) ?
2759 (ioc
->reply_queue_count
):1,
2760 sizeof(struct reply_post_struct
), GFP_KERNEL
);
2762 if (!ioc
->reply_post
) {
2763 pr_err(MPT3SAS_FMT
"reply_post_free pool: kcalloc failed\n",
2767 ioc
->reply_post_free_dma_pool
= pci_pool_create("reply_post_free pool",
2768 ioc
->pdev
, sz
, 16, 0);
2769 if (!ioc
->reply_post_free_dma_pool
) {
2771 "reply_post_free pool: pci_pool_create failed\n",
2777 ioc
->reply_post
[i
].reply_post_free
=
2778 pci_pool_alloc(ioc
->reply_post_free_dma_pool
,
2780 &ioc
->reply_post
[i
].reply_post_free_dma
);
2781 if (!ioc
->reply_post
[i
].reply_post_free
) {
2783 "reply_post_free pool: pci_pool_alloc failed\n",
2787 memset(ioc
->reply_post
[i
].reply_post_free
, 0, sz
);
2788 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
2789 "reply post free pool (0x%p): depth(%d),"
2790 "element_size(%d), pool_size(%d kB)\n", ioc
->name
,
2791 ioc
->reply_post
[i
].reply_post_free
,
2792 ioc
->reply_post_queue_depth
, 8, sz
/1024));
2793 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
2794 "reply_post_free_dma = (0x%llx)\n", ioc
->name
,
2795 (unsigned long long)
2796 ioc
->reply_post
[i
].reply_post_free_dma
));
2798 } while (ioc
->rdpq_array_enable
&& (++i
< ioc
->reply_queue_count
));
2800 if (ioc
->dma_mask
== 64) {
2801 if (_base_change_consistent_dma_mask(ioc
, ioc
->pdev
) != 0) {
2803 "no suitable consistent DMA mask for %s\n",
2804 ioc
->name
, pci_name(ioc
->pdev
));
2809 ioc
->scsiio_depth
= ioc
->hba_queue_depth
-
2810 ioc
->hi_priority_depth
- ioc
->internal_depth
;
2812 /* set the scsi host can_queue depth
2813 * with some internal commands that could be outstanding
2815 ioc
->shost
->can_queue
= ioc
->scsiio_depth
;
2816 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
2817 "scsi host: can_queue depth (%d)\n",
2818 ioc
->name
, ioc
->shost
->can_queue
));
2821 /* contiguous pool for request and chains, 16 byte align, one extra "
2824 ioc
->chain_depth
= ioc
->chains_needed_per_io
* ioc
->scsiio_depth
;
2825 sz
= ((ioc
->scsiio_depth
+ 1) * ioc
->request_sz
);
2827 /* hi-priority queue */
2828 sz
+= (ioc
->hi_priority_depth
* ioc
->request_sz
);
2830 /* internal queue */
2831 sz
+= (ioc
->internal_depth
* ioc
->request_sz
);
2833 ioc
->request_dma_sz
= sz
;
2834 ioc
->request
= pci_alloc_consistent(ioc
->pdev
, sz
, &ioc
->request_dma
);
2835 if (!ioc
->request
) {
2836 pr_err(MPT3SAS_FMT
"request pool: pci_alloc_consistent " \
2837 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2838 "total(%d kB)\n", ioc
->name
, ioc
->hba_queue_depth
,
2839 ioc
->chains_needed_per_io
, ioc
->request_sz
, sz
/1024);
2840 if (ioc
->scsiio_depth
< MPT3SAS_SAS_QUEUE_DEPTH
)
2843 ioc
->hba_queue_depth
= max_request_credit
- retry_sz
;
2844 goto retry_allocation
;
2848 pr_err(MPT3SAS_FMT
"request pool: pci_alloc_consistent " \
2849 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2850 "total(%d kb)\n", ioc
->name
, ioc
->hba_queue_depth
,
2851 ioc
->chains_needed_per_io
, ioc
->request_sz
, sz
/1024);
2853 /* hi-priority queue */
2854 ioc
->hi_priority
= ioc
->request
+ ((ioc
->scsiio_depth
+ 1) *
2856 ioc
->hi_priority_dma
= ioc
->request_dma
+ ((ioc
->scsiio_depth
+ 1) *
2859 /* internal queue */
2860 ioc
->internal
= ioc
->hi_priority
+ (ioc
->hi_priority_depth
*
2862 ioc
->internal_dma
= ioc
->hi_priority_dma
+ (ioc
->hi_priority_depth
*
2865 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
2866 "request pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n",
2867 ioc
->name
, ioc
->request
, ioc
->hba_queue_depth
, ioc
->request_sz
,
2868 (ioc
->hba_queue_depth
* ioc
->request_sz
)/1024));
2870 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"request pool: dma(0x%llx)\n",
2871 ioc
->name
, (unsigned long long) ioc
->request_dma
));
2874 sz
= ioc
->scsiio_depth
* sizeof(struct scsiio_tracker
);
2875 ioc
->scsi_lookup_pages
= get_order(sz
);
2876 ioc
->scsi_lookup
= (struct scsiio_tracker
*)__get_free_pages(
2877 GFP_KERNEL
, ioc
->scsi_lookup_pages
);
2878 if (!ioc
->scsi_lookup
) {
2879 pr_err(MPT3SAS_FMT
"scsi_lookup: get_free_pages failed, sz(%d)\n",
2880 ioc
->name
, (int)sz
);
2884 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"scsiio(0x%p): depth(%d)\n",
2885 ioc
->name
, ioc
->request
, ioc
->scsiio_depth
));
2887 ioc
->chain_depth
= min_t(u32
, ioc
->chain_depth
, MAX_CHAIN_DEPTH
);
2888 sz
= ioc
->chain_depth
* sizeof(struct chain_tracker
);
2889 ioc
->chain_pages
= get_order(sz
);
2890 ioc
->chain_lookup
= (struct chain_tracker
*)__get_free_pages(
2891 GFP_KERNEL
, ioc
->chain_pages
);
2892 if (!ioc
->chain_lookup
) {
2893 pr_err(MPT3SAS_FMT
"chain_lookup: __get_free_pages failed\n",
2897 ioc
->chain_dma_pool
= pci_pool_create("chain pool", ioc
->pdev
,
2898 ioc
->request_sz
, 16, 0);
2899 if (!ioc
->chain_dma_pool
) {
2900 pr_err(MPT3SAS_FMT
"chain_dma_pool: pci_pool_create failed\n",
2904 for (i
= 0; i
< ioc
->chain_depth
; i
++) {
2905 ioc
->chain_lookup
[i
].chain_buffer
= pci_pool_alloc(
2906 ioc
->chain_dma_pool
, GFP_KERNEL
,
2907 &ioc
->chain_lookup
[i
].chain_buffer_dma
);
2908 if (!ioc
->chain_lookup
[i
].chain_buffer
) {
2909 ioc
->chain_depth
= i
;
2912 total_sz
+= ioc
->request_sz
;
2915 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
2916 "chain pool depth(%d), frame_size(%d), pool_size(%d kB)\n",
2917 ioc
->name
, ioc
->chain_depth
, ioc
->request_sz
,
2918 ((ioc
->chain_depth
* ioc
->request_sz
))/1024));
2920 /* initialize hi-priority queue smid's */
2921 ioc
->hpr_lookup
= kcalloc(ioc
->hi_priority_depth
,
2922 sizeof(struct request_tracker
), GFP_KERNEL
);
2923 if (!ioc
->hpr_lookup
) {
2924 pr_err(MPT3SAS_FMT
"hpr_lookup: kcalloc failed\n",
2928 ioc
->hi_priority_smid
= ioc
->scsiio_depth
+ 1;
2929 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
2930 "hi_priority(0x%p): depth(%d), start smid(%d)\n",
2931 ioc
->name
, ioc
->hi_priority
,
2932 ioc
->hi_priority_depth
, ioc
->hi_priority_smid
));
2934 /* initialize internal queue smid's */
2935 ioc
->internal_lookup
= kcalloc(ioc
->internal_depth
,
2936 sizeof(struct request_tracker
), GFP_KERNEL
);
2937 if (!ioc
->internal_lookup
) {
2938 pr_err(MPT3SAS_FMT
"internal_lookup: kcalloc failed\n",
2942 ioc
->internal_smid
= ioc
->hi_priority_smid
+ ioc
->hi_priority_depth
;
2943 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
2944 "internal(0x%p): depth(%d), start smid(%d)\n",
2945 ioc
->name
, ioc
->internal
,
2946 ioc
->internal_depth
, ioc
->internal_smid
));
2948 /* sense buffers, 4 byte align */
2949 sz
= ioc
->scsiio_depth
* SCSI_SENSE_BUFFERSIZE
;
2950 ioc
->sense_dma_pool
= pci_pool_create("sense pool", ioc
->pdev
, sz
, 4,
2952 if (!ioc
->sense_dma_pool
) {
2953 pr_err(MPT3SAS_FMT
"sense pool: pci_pool_create failed\n",
2957 ioc
->sense
= pci_pool_alloc(ioc
->sense_dma_pool
, GFP_KERNEL
,
2960 pr_err(MPT3SAS_FMT
"sense pool: pci_pool_alloc failed\n",
2964 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
2965 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
2966 "(%d kB)\n", ioc
->name
, ioc
->sense
, ioc
->scsiio_depth
,
2967 SCSI_SENSE_BUFFERSIZE
, sz
/1024));
2968 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"sense_dma(0x%llx)\n",
2969 ioc
->name
, (unsigned long long)ioc
->sense_dma
));
2972 /* reply pool, 4 byte align */
2973 sz
= ioc
->reply_free_queue_depth
* ioc
->reply_sz
;
2974 ioc
->reply_dma_pool
= pci_pool_create("reply pool", ioc
->pdev
, sz
, 4,
2976 if (!ioc
->reply_dma_pool
) {
2977 pr_err(MPT3SAS_FMT
"reply pool: pci_pool_create failed\n",
2981 ioc
->reply
= pci_pool_alloc(ioc
->reply_dma_pool
, GFP_KERNEL
,
2984 pr_err(MPT3SAS_FMT
"reply pool: pci_pool_alloc failed\n",
2988 ioc
->reply_dma_min_address
= (u32
)(ioc
->reply_dma
);
2989 ioc
->reply_dma_max_address
= (u32
)(ioc
->reply_dma
) + sz
;
2990 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
2991 "reply pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n",
2992 ioc
->name
, ioc
->reply
,
2993 ioc
->reply_free_queue_depth
, ioc
->reply_sz
, sz
/1024));
2994 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"reply_dma(0x%llx)\n",
2995 ioc
->name
, (unsigned long long)ioc
->reply_dma
));
2998 /* reply free queue, 16 byte align */
2999 sz
= ioc
->reply_free_queue_depth
* 4;
3000 ioc
->reply_free_dma_pool
= pci_pool_create("reply_free pool",
3001 ioc
->pdev
, sz
, 16, 0);
3002 if (!ioc
->reply_free_dma_pool
) {
3003 pr_err(MPT3SAS_FMT
"reply_free pool: pci_pool_create failed\n",
3007 ioc
->reply_free
= pci_pool_alloc(ioc
->reply_free_dma_pool
, GFP_KERNEL
,
3008 &ioc
->reply_free_dma
);
3009 if (!ioc
->reply_free
) {
3010 pr_err(MPT3SAS_FMT
"reply_free pool: pci_pool_alloc failed\n",
3014 memset(ioc
->reply_free
, 0, sz
);
3015 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"reply_free pool(0x%p): " \
3016 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc
->name
,
3017 ioc
->reply_free
, ioc
->reply_free_queue_depth
, 4, sz
/1024));
3018 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3019 "reply_free_dma (0x%llx)\n",
3020 ioc
->name
, (unsigned long long)ioc
->reply_free_dma
));
3023 ioc
->config_page_sz
= 512;
3024 ioc
->config_page
= pci_alloc_consistent(ioc
->pdev
,
3025 ioc
->config_page_sz
, &ioc
->config_page_dma
);
3026 if (!ioc
->config_page
) {
3028 "config page: pci_pool_alloc failed\n",
3032 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3033 "config page(0x%p): size(%d)\n",
3034 ioc
->name
, ioc
->config_page
, ioc
->config_page_sz
));
3035 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"config_page_dma(0x%llx)\n",
3036 ioc
->name
, (unsigned long long)ioc
->config_page_dma
));
3037 total_sz
+= ioc
->config_page_sz
;
3039 pr_info(MPT3SAS_FMT
"Allocated physical memory: size(%d kB)\n",
3040 ioc
->name
, total_sz
/1024);
3042 "Current Controller Queue Depth(%d),Max Controller Queue Depth(%d)\n",
3043 ioc
->name
, ioc
->shost
->can_queue
, facts
->RequestCredit
);
3044 pr_info(MPT3SAS_FMT
"Scatter Gather Elements per IO(%d)\n",
3045 ioc
->name
, ioc
->shost
->sg_tablesize
);
3053 * mpt3sas_base_get_iocstate - Get the current state of a MPT adapter.
3054 * @ioc: Pointer to MPT_ADAPTER structure
3055 * @cooked: Request raw or cooked IOC state
3057 * Returns all IOC Doorbell register bits if cooked==0, else just the
3058 * Doorbell bits in MPI_IOC_STATE_MASK.
3061 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER
*ioc
, int cooked
)
3065 s
= readl(&ioc
->chip
->Doorbell
);
3066 sc
= s
& MPI2_IOC_STATE_MASK
;
3067 return cooked
? sc
: s
;
3071 * _base_wait_on_iocstate - waiting on a particular ioc state
3072 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
3073 * @timeout: timeout in second
3074 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3076 * Returns 0 for success, non-zero for failure.
3079 _base_wait_on_iocstate(struct MPT3SAS_ADAPTER
*ioc
, u32 ioc_state
, int timeout
,
3086 cntdn
= (sleep_flag
== CAN_SLEEP
) ? 1000*timeout
: 2000*timeout
;
3088 current_state
= mpt3sas_base_get_iocstate(ioc
, 1);
3089 if (current_state
== ioc_state
)
3091 if (count
&& current_state
== MPI2_IOC_STATE_FAULT
)
3093 if (sleep_flag
== CAN_SLEEP
)
3094 usleep_range(1000, 1500);
3100 return current_state
;
3104 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
3105 * a write to the doorbell)
3106 * @ioc: per adapter object
3107 * @timeout: timeout in second
3108 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3110 * Returns 0 for success, non-zero for failure.
3112 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
3115 _base_wait_for_doorbell_int(struct MPT3SAS_ADAPTER
*ioc
, int timeout
,
3122 cntdn
= (sleep_flag
== CAN_SLEEP
) ? 1000*timeout
: 2000*timeout
;
3124 int_status
= readl(&ioc
->chip
->HostInterruptStatus
);
3125 if (int_status
& MPI2_HIS_IOC2SYS_DB_STATUS
) {
3126 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
3127 "%s: successful count(%d), timeout(%d)\n",
3128 ioc
->name
, __func__
, count
, timeout
));
3131 if (sleep_flag
== CAN_SLEEP
)
3132 usleep_range(1000, 1500);
3139 "%s: failed due to timeout count(%d), int_status(%x)!\n",
3140 ioc
->name
, __func__
, count
, int_status
);
3145 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
3146 * @ioc: per adapter object
3147 * @timeout: timeout in second
3148 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3150 * Returns 0 for success, non-zero for failure.
3152 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
3156 _base_wait_for_doorbell_ack(struct MPT3SAS_ADAPTER
*ioc
, int timeout
,
3164 cntdn
= (sleep_flag
== CAN_SLEEP
) ? 1000*timeout
: 2000*timeout
;
3166 int_status
= readl(&ioc
->chip
->HostInterruptStatus
);
3167 if (!(int_status
& MPI2_HIS_SYS2IOC_DB_STATUS
)) {
3168 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
3169 "%s: successful count(%d), timeout(%d)\n",
3170 ioc
->name
, __func__
, count
, timeout
));
3172 } else if (int_status
& MPI2_HIS_IOC2SYS_DB_STATUS
) {
3173 doorbell
= readl(&ioc
->chip
->Doorbell
);
3174 if ((doorbell
& MPI2_IOC_STATE_MASK
) ==
3175 MPI2_IOC_STATE_FAULT
) {
3176 mpt3sas_base_fault_info(ioc
, doorbell
);
3179 } else if (int_status
== 0xFFFFFFFF)
3182 if (sleep_flag
== CAN_SLEEP
)
3183 usleep_range(1000, 1500);
3191 "%s: failed due to timeout count(%d), int_status(%x)!\n",
3192 ioc
->name
, __func__
, count
, int_status
);
3197 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
3198 * @ioc: per adapter object
3199 * @timeout: timeout in second
3200 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3202 * Returns 0 for success, non-zero for failure.
3206 _base_wait_for_doorbell_not_used(struct MPT3SAS_ADAPTER
*ioc
, int timeout
,
3213 cntdn
= (sleep_flag
== CAN_SLEEP
) ? 1000*timeout
: 2000*timeout
;
3215 doorbell_reg
= readl(&ioc
->chip
->Doorbell
);
3216 if (!(doorbell_reg
& MPI2_DOORBELL_USED
)) {
3217 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
3218 "%s: successful count(%d), timeout(%d)\n",
3219 ioc
->name
, __func__
, count
, timeout
));
3222 if (sleep_flag
== CAN_SLEEP
)
3223 usleep_range(1000, 1500);
3230 "%s: failed due to timeout count(%d), doorbell_reg(%x)!\n",
3231 ioc
->name
, __func__
, count
, doorbell_reg
);
3236 * _base_send_ioc_reset - send doorbell reset
3237 * @ioc: per adapter object
3238 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
3239 * @timeout: timeout in second
3240 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3242 * Returns 0 for success, non-zero for failure.
3245 _base_send_ioc_reset(struct MPT3SAS_ADAPTER
*ioc
, u8 reset_type
, int timeout
,
3251 if (reset_type
!= MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
) {
3252 pr_err(MPT3SAS_FMT
"%s: unknown reset_type\n",
3253 ioc
->name
, __func__
);
3257 if (!(ioc
->facts
.IOCCapabilities
&
3258 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY
))
3261 pr_info(MPT3SAS_FMT
"sending message unit reset !!\n", ioc
->name
);
3263 writel(reset_type
<< MPI2_DOORBELL_FUNCTION_SHIFT
,
3264 &ioc
->chip
->Doorbell
);
3265 if ((_base_wait_for_doorbell_ack(ioc
, 15, sleep_flag
))) {
3269 ioc_state
= _base_wait_on_iocstate(ioc
, MPI2_IOC_STATE_READY
,
3270 timeout
, sleep_flag
);
3273 "%s: failed going to ready state (ioc_state=0x%x)\n",
3274 ioc
->name
, __func__
, ioc_state
);
3279 pr_info(MPT3SAS_FMT
"message unit reset: %s\n",
3280 ioc
->name
, ((r
== 0) ? "SUCCESS" : "FAILED"));
3285 * _base_handshake_req_reply_wait - send request thru doorbell interface
3286 * @ioc: per adapter object
3287 * @request_bytes: request length
3288 * @request: pointer having request payload
3289 * @reply_bytes: reply length
3290 * @reply: pointer to reply payload
3291 * @timeout: timeout in second
3292 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3294 * Returns 0 for success, non-zero for failure.
3297 _base_handshake_req_reply_wait(struct MPT3SAS_ADAPTER
*ioc
, int request_bytes
,
3298 u32
*request
, int reply_bytes
, u16
*reply
, int timeout
, int sleep_flag
)
3300 MPI2DefaultReply_t
*default_reply
= (MPI2DefaultReply_t
*)reply
;
3306 /* make sure doorbell is not in use */
3307 if ((readl(&ioc
->chip
->Doorbell
) & MPI2_DOORBELL_USED
)) {
3309 "doorbell is in use (line=%d)\n",
3310 ioc
->name
, __LINE__
);
3314 /* clear pending doorbell interrupts from previous state changes */
3315 if (readl(&ioc
->chip
->HostInterruptStatus
) &
3316 MPI2_HIS_IOC2SYS_DB_STATUS
)
3317 writel(0, &ioc
->chip
->HostInterruptStatus
);
3319 /* send message to ioc */
3320 writel(((MPI2_FUNCTION_HANDSHAKE
<<MPI2_DOORBELL_FUNCTION_SHIFT
) |
3321 ((request_bytes
/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT
)),
3322 &ioc
->chip
->Doorbell
);
3324 if ((_base_wait_for_doorbell_int(ioc
, 5, NO_SLEEP
))) {
3326 "doorbell handshake int failed (line=%d)\n",
3327 ioc
->name
, __LINE__
);
3330 writel(0, &ioc
->chip
->HostInterruptStatus
);
3332 if ((_base_wait_for_doorbell_ack(ioc
, 5, sleep_flag
))) {
3334 "doorbell handshake ack failed (line=%d)\n",
3335 ioc
->name
, __LINE__
);
3339 /* send message 32-bits at a time */
3340 for (i
= 0, failed
= 0; i
< request_bytes
/4 && !failed
; i
++) {
3341 writel(cpu_to_le32(request
[i
]), &ioc
->chip
->Doorbell
);
3342 if ((_base_wait_for_doorbell_ack(ioc
, 5, sleep_flag
)))
3348 "doorbell handshake sending request failed (line=%d)\n",
3349 ioc
->name
, __LINE__
);
3353 /* now wait for the reply */
3354 if ((_base_wait_for_doorbell_int(ioc
, timeout
, sleep_flag
))) {
3356 "doorbell handshake int failed (line=%d)\n",
3357 ioc
->name
, __LINE__
);
3361 /* read the first two 16-bits, it gives the total length of the reply */
3362 reply
[0] = le16_to_cpu(readl(&ioc
->chip
->Doorbell
)
3363 & MPI2_DOORBELL_DATA_MASK
);
3364 writel(0, &ioc
->chip
->HostInterruptStatus
);
3365 if ((_base_wait_for_doorbell_int(ioc
, 5, sleep_flag
))) {
3367 "doorbell handshake int failed (line=%d)\n",
3368 ioc
->name
, __LINE__
);
3371 reply
[1] = le16_to_cpu(readl(&ioc
->chip
->Doorbell
)
3372 & MPI2_DOORBELL_DATA_MASK
);
3373 writel(0, &ioc
->chip
->HostInterruptStatus
);
3375 for (i
= 2; i
< default_reply
->MsgLength
* 2; i
++) {
3376 if ((_base_wait_for_doorbell_int(ioc
, 5, sleep_flag
))) {
3378 "doorbell handshake int failed (line=%d)\n",
3379 ioc
->name
, __LINE__
);
3382 if (i
>= reply_bytes
/2) /* overflow case */
3383 dummy
= readl(&ioc
->chip
->Doorbell
);
3385 reply
[i
] = le16_to_cpu(readl(&ioc
->chip
->Doorbell
)
3386 & MPI2_DOORBELL_DATA_MASK
);
3387 writel(0, &ioc
->chip
->HostInterruptStatus
);
3390 _base_wait_for_doorbell_int(ioc
, 5, sleep_flag
);
3391 if (_base_wait_for_doorbell_not_used(ioc
, 5, sleep_flag
) != 0) {
3392 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
3393 "doorbell is in use (line=%d)\n", ioc
->name
, __LINE__
));
3395 writel(0, &ioc
->chip
->HostInterruptStatus
);
3397 if (ioc
->logging_level
& MPT_DEBUG_INIT
) {
3398 mfp
= (__le32
*)reply
;
3399 pr_info("\toffset:data\n");
3400 for (i
= 0; i
< reply_bytes
/4; i
++)
3401 pr_info("\t[0x%02x]:%08x\n", i
*4,
3402 le32_to_cpu(mfp
[i
]));
3408 * mpt3sas_base_sas_iounit_control - send sas iounit control to FW
3409 * @ioc: per adapter object
3410 * @mpi_reply: the reply payload from FW
3411 * @mpi_request: the request payload sent to FW
3413 * The SAS IO Unit Control Request message allows the host to perform low-level
3414 * operations, such as resets on the PHYs of the IO Unit, also allows the host
3415 * to obtain the IOC assigned device handles for a device if it has other
3416 * identifying information about the device, in addition allows the host to
3417 * remove IOC resources associated with the device.
3419 * Returns 0 for success, non-zero for failure.
3422 mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER
*ioc
,
3423 Mpi2SasIoUnitControlReply_t
*mpi_reply
,
3424 Mpi2SasIoUnitControlRequest_t
*mpi_request
)
3428 unsigned long timeleft
;
3429 bool issue_reset
= false;
3432 u16 wait_state_count
;
3434 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
3437 mutex_lock(&ioc
->base_cmds
.mutex
);
3439 if (ioc
->base_cmds
.status
!= MPT3_CMD_NOT_USED
) {
3440 pr_err(MPT3SAS_FMT
"%s: base_cmd in use\n",
3441 ioc
->name
, __func__
);
3446 wait_state_count
= 0;
3447 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 1);
3448 while (ioc_state
!= MPI2_IOC_STATE_OPERATIONAL
) {
3449 if (wait_state_count
++ == 10) {
3451 "%s: failed due to ioc not operational\n",
3452 ioc
->name
, __func__
);
3457 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 1);
3459 "%s: waiting for operational state(count=%d)\n",
3460 ioc
->name
, __func__
, wait_state_count
);
3463 smid
= mpt3sas_base_get_smid(ioc
, ioc
->base_cb_idx
);
3465 pr_err(MPT3SAS_FMT
"%s: failed obtaining a smid\n",
3466 ioc
->name
, __func__
);
3472 ioc
->base_cmds
.status
= MPT3_CMD_PENDING
;
3473 request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
3474 ioc
->base_cmds
.smid
= smid
;
3475 memcpy(request
, mpi_request
, sizeof(Mpi2SasIoUnitControlRequest_t
));
3476 if (mpi_request
->Operation
== MPI2_SAS_OP_PHY_HARD_RESET
||
3477 mpi_request
->Operation
== MPI2_SAS_OP_PHY_LINK_RESET
)
3478 ioc
->ioc_link_reset_in_progress
= 1;
3479 init_completion(&ioc
->base_cmds
.done
);
3480 mpt3sas_base_put_smid_default(ioc
, smid
);
3481 timeleft
= wait_for_completion_timeout(&ioc
->base_cmds
.done
,
3482 msecs_to_jiffies(10000));
3483 if ((mpi_request
->Operation
== MPI2_SAS_OP_PHY_HARD_RESET
||
3484 mpi_request
->Operation
== MPI2_SAS_OP_PHY_LINK_RESET
) &&
3485 ioc
->ioc_link_reset_in_progress
)
3486 ioc
->ioc_link_reset_in_progress
= 0;
3487 if (!(ioc
->base_cmds
.status
& MPT3_CMD_COMPLETE
)) {
3488 pr_err(MPT3SAS_FMT
"%s: timeout\n",
3489 ioc
->name
, __func__
);
3490 _debug_dump_mf(mpi_request
,
3491 sizeof(Mpi2SasIoUnitControlRequest_t
)/4);
3492 if (!(ioc
->base_cmds
.status
& MPT3_CMD_RESET
))
3494 goto issue_host_reset
;
3496 if (ioc
->base_cmds
.status
& MPT3_CMD_REPLY_VALID
)
3497 memcpy(mpi_reply
, ioc
->base_cmds
.reply
,
3498 sizeof(Mpi2SasIoUnitControlReply_t
));
3500 memset(mpi_reply
, 0, sizeof(Mpi2SasIoUnitControlReply_t
));
3501 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
3506 mpt3sas_base_hard_reset_handler(ioc
, CAN_SLEEP
,
3508 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
3511 mutex_unlock(&ioc
->base_cmds
.mutex
);
3516 * mpt3sas_base_scsi_enclosure_processor - sending request to sep device
3517 * @ioc: per adapter object
3518 * @mpi_reply: the reply payload from FW
3519 * @mpi_request: the request payload sent to FW
3521 * The SCSI Enclosure Processor request message causes the IOC to
3522 * communicate with SES devices to control LED status signals.
3524 * Returns 0 for success, non-zero for failure.
3527 mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER
*ioc
,
3528 Mpi2SepReply_t
*mpi_reply
, Mpi2SepRequest_t
*mpi_request
)
3532 unsigned long timeleft
;
3533 bool issue_reset
= false;
3536 u16 wait_state_count
;
3538 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
3541 mutex_lock(&ioc
->base_cmds
.mutex
);
3543 if (ioc
->base_cmds
.status
!= MPT3_CMD_NOT_USED
) {
3544 pr_err(MPT3SAS_FMT
"%s: base_cmd in use\n",
3545 ioc
->name
, __func__
);
3550 wait_state_count
= 0;
3551 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 1);
3552 while (ioc_state
!= MPI2_IOC_STATE_OPERATIONAL
) {
3553 if (wait_state_count
++ == 10) {
3555 "%s: failed due to ioc not operational\n",
3556 ioc
->name
, __func__
);
3561 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 1);
3563 "%s: waiting for operational state(count=%d)\n",
3565 __func__
, wait_state_count
);
3568 smid
= mpt3sas_base_get_smid(ioc
, ioc
->base_cb_idx
);
3570 pr_err(MPT3SAS_FMT
"%s: failed obtaining a smid\n",
3571 ioc
->name
, __func__
);
3577 ioc
->base_cmds
.status
= MPT3_CMD_PENDING
;
3578 request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
3579 ioc
->base_cmds
.smid
= smid
;
3580 memcpy(request
, mpi_request
, sizeof(Mpi2SepReply_t
));
3581 init_completion(&ioc
->base_cmds
.done
);
3582 mpt3sas_base_put_smid_default(ioc
, smid
);
3583 timeleft
= wait_for_completion_timeout(&ioc
->base_cmds
.done
,
3584 msecs_to_jiffies(10000));
3585 if (!(ioc
->base_cmds
.status
& MPT3_CMD_COMPLETE
)) {
3586 pr_err(MPT3SAS_FMT
"%s: timeout\n",
3587 ioc
->name
, __func__
);
3588 _debug_dump_mf(mpi_request
,
3589 sizeof(Mpi2SepRequest_t
)/4);
3590 if (!(ioc
->base_cmds
.status
& MPT3_CMD_RESET
))
3591 issue_reset
= false;
3592 goto issue_host_reset
;
3594 if (ioc
->base_cmds
.status
& MPT3_CMD_REPLY_VALID
)
3595 memcpy(mpi_reply
, ioc
->base_cmds
.reply
,
3596 sizeof(Mpi2SepReply_t
));
3598 memset(mpi_reply
, 0, sizeof(Mpi2SepReply_t
));
3599 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
3604 mpt3sas_base_hard_reset_handler(ioc
, CAN_SLEEP
,
3606 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
3609 mutex_unlock(&ioc
->base_cmds
.mutex
);
3614 * _base_get_port_facts - obtain port facts reply and save in ioc
3615 * @ioc: per adapter object
3616 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3618 * Returns 0 for success, non-zero for failure.
3621 _base_get_port_facts(struct MPT3SAS_ADAPTER
*ioc
, int port
, int sleep_flag
)
3623 Mpi2PortFactsRequest_t mpi_request
;
3624 Mpi2PortFactsReply_t mpi_reply
;
3625 struct mpt3sas_port_facts
*pfacts
;
3626 int mpi_reply_sz
, mpi_request_sz
, r
;
3628 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
3631 mpi_reply_sz
= sizeof(Mpi2PortFactsReply_t
);
3632 mpi_request_sz
= sizeof(Mpi2PortFactsRequest_t
);
3633 memset(&mpi_request
, 0, mpi_request_sz
);
3634 mpi_request
.Function
= MPI2_FUNCTION_PORT_FACTS
;
3635 mpi_request
.PortNumber
= port
;
3636 r
= _base_handshake_req_reply_wait(ioc
, mpi_request_sz
,
3637 (u32
*)&mpi_request
, mpi_reply_sz
, (u16
*)&mpi_reply
, 5, CAN_SLEEP
);
3640 pr_err(MPT3SAS_FMT
"%s: handshake failed (r=%d)\n",
3641 ioc
->name
, __func__
, r
);
3645 pfacts
= &ioc
->pfacts
[port
];
3646 memset(pfacts
, 0, sizeof(struct mpt3sas_port_facts
));
3647 pfacts
->PortNumber
= mpi_reply
.PortNumber
;
3648 pfacts
->VP_ID
= mpi_reply
.VP_ID
;
3649 pfacts
->VF_ID
= mpi_reply
.VF_ID
;
3650 pfacts
->MaxPostedCmdBuffers
=
3651 le16_to_cpu(mpi_reply
.MaxPostedCmdBuffers
);
3657 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
3658 * @ioc: per adapter object
3659 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3661 * Returns 0 for success, non-zero for failure.
3664 _base_get_ioc_facts(struct MPT3SAS_ADAPTER
*ioc
, int sleep_flag
)
3666 Mpi2IOCFactsRequest_t mpi_request
;
3667 Mpi2IOCFactsReply_t mpi_reply
;
3668 struct mpt3sas_facts
*facts
;
3669 int mpi_reply_sz
, mpi_request_sz
, r
;
3671 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
3674 mpi_reply_sz
= sizeof(Mpi2IOCFactsReply_t
);
3675 mpi_request_sz
= sizeof(Mpi2IOCFactsRequest_t
);
3676 memset(&mpi_request
, 0, mpi_request_sz
);
3677 mpi_request
.Function
= MPI2_FUNCTION_IOC_FACTS
;
3678 r
= _base_handshake_req_reply_wait(ioc
, mpi_request_sz
,
3679 (u32
*)&mpi_request
, mpi_reply_sz
, (u16
*)&mpi_reply
, 5, CAN_SLEEP
);
3682 pr_err(MPT3SAS_FMT
"%s: handshake failed (r=%d)\n",
3683 ioc
->name
, __func__
, r
);
3687 facts
= &ioc
->facts
;
3688 memset(facts
, 0, sizeof(struct mpt3sas_facts
));
3689 facts
->MsgVersion
= le16_to_cpu(mpi_reply
.MsgVersion
);
3690 facts
->HeaderVersion
= le16_to_cpu(mpi_reply
.HeaderVersion
);
3691 facts
->VP_ID
= mpi_reply
.VP_ID
;
3692 facts
->VF_ID
= mpi_reply
.VF_ID
;
3693 facts
->IOCExceptions
= le16_to_cpu(mpi_reply
.IOCExceptions
);
3694 facts
->MaxChainDepth
= mpi_reply
.MaxChainDepth
;
3695 facts
->WhoInit
= mpi_reply
.WhoInit
;
3696 facts
->NumberOfPorts
= mpi_reply
.NumberOfPorts
;
3697 facts
->MaxMSIxVectors
= mpi_reply
.MaxMSIxVectors
;
3698 facts
->RequestCredit
= le16_to_cpu(mpi_reply
.RequestCredit
);
3699 facts
->MaxReplyDescriptorPostQueueDepth
=
3700 le16_to_cpu(mpi_reply
.MaxReplyDescriptorPostQueueDepth
);
3701 facts
->ProductID
= le16_to_cpu(mpi_reply
.ProductID
);
3702 facts
->IOCCapabilities
= le32_to_cpu(mpi_reply
.IOCCapabilities
);
3703 if ((facts
->IOCCapabilities
& MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID
))
3704 ioc
->ir_firmware
= 1;
3705 if ((facts
->IOCCapabilities
&
3706 MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE
))
3707 ioc
->rdpq_array_capable
= 1;
3708 facts
->FWVersion
.Word
= le32_to_cpu(mpi_reply
.FWVersion
.Word
);
3709 facts
->IOCRequestFrameSize
=
3710 le16_to_cpu(mpi_reply
.IOCRequestFrameSize
);
3711 facts
->MaxInitiators
= le16_to_cpu(mpi_reply
.MaxInitiators
);
3712 facts
->MaxTargets
= le16_to_cpu(mpi_reply
.MaxTargets
);
3713 ioc
->shost
->max_id
= -1;
3714 facts
->MaxSasExpanders
= le16_to_cpu(mpi_reply
.MaxSasExpanders
);
3715 facts
->MaxEnclosures
= le16_to_cpu(mpi_reply
.MaxEnclosures
);
3716 facts
->ProtocolFlags
= le16_to_cpu(mpi_reply
.ProtocolFlags
);
3717 facts
->HighPriorityCredit
=
3718 le16_to_cpu(mpi_reply
.HighPriorityCredit
);
3719 facts
->ReplyFrameSize
= mpi_reply
.ReplyFrameSize
;
3720 facts
->MaxDevHandle
= le16_to_cpu(mpi_reply
.MaxDevHandle
);
3722 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3723 "hba queue depth(%d), max chains per io(%d)\n",
3724 ioc
->name
, facts
->RequestCredit
,
3725 facts
->MaxChainDepth
));
3726 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3727 "request frame size(%d), reply frame size(%d)\n", ioc
->name
,
3728 facts
->IOCRequestFrameSize
* 4, facts
->ReplyFrameSize
* 4));
3733 * _base_send_ioc_init - send ioc_init to firmware
3734 * @ioc: per adapter object
3735 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3737 * Returns 0 for success, non-zero for failure.
3740 _base_send_ioc_init(struct MPT3SAS_ADAPTER
*ioc
, int sleep_flag
)
3742 Mpi2IOCInitRequest_t mpi_request
;
3743 Mpi2IOCInitReply_t mpi_reply
;
3745 struct timeval current_time
;
3747 u32 reply_post_free_array_sz
= 0;
3748 Mpi2IOCInitRDPQArrayEntry
*reply_post_free_array
= NULL
;
3749 dma_addr_t reply_post_free_array_dma
;
3751 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
3754 memset(&mpi_request
, 0, sizeof(Mpi2IOCInitRequest_t
));
3755 mpi_request
.Function
= MPI2_FUNCTION_IOC_INIT
;
3756 mpi_request
.WhoInit
= MPI2_WHOINIT_HOST_DRIVER
;
3757 mpi_request
.VF_ID
= 0; /* TODO */
3758 mpi_request
.VP_ID
= 0;
3759 mpi_request
.MsgVersion
= cpu_to_le16(MPI2_VERSION
);
3760 mpi_request
.HeaderVersion
= cpu_to_le16(MPI2_HEADER_VERSION
);
3762 if (_base_is_controller_msix_enabled(ioc
))
3763 mpi_request
.HostMSIxVectors
= ioc
->reply_queue_count
;
3764 mpi_request
.SystemRequestFrameSize
= cpu_to_le16(ioc
->request_sz
/4);
3765 mpi_request
.ReplyDescriptorPostQueueDepth
=
3766 cpu_to_le16(ioc
->reply_post_queue_depth
);
3767 mpi_request
.ReplyFreeQueueDepth
=
3768 cpu_to_le16(ioc
->reply_free_queue_depth
);
3770 mpi_request
.SenseBufferAddressHigh
=
3771 cpu_to_le32((u64
)ioc
->sense_dma
>> 32);
3772 mpi_request
.SystemReplyAddressHigh
=
3773 cpu_to_le32((u64
)ioc
->reply_dma
>> 32);
3774 mpi_request
.SystemRequestFrameBaseAddress
=
3775 cpu_to_le64((u64
)ioc
->request_dma
);
3776 mpi_request
.ReplyFreeQueueAddress
=
3777 cpu_to_le64((u64
)ioc
->reply_free_dma
);
3779 if (ioc
->rdpq_array_enable
) {
3780 reply_post_free_array_sz
= ioc
->reply_queue_count
*
3781 sizeof(Mpi2IOCInitRDPQArrayEntry
);
3782 reply_post_free_array
= pci_alloc_consistent(ioc
->pdev
,
3783 reply_post_free_array_sz
, &reply_post_free_array_dma
);
3784 if (!reply_post_free_array
) {
3786 "reply_post_free_array: pci_alloc_consistent failed\n",
3791 memset(reply_post_free_array
, 0, reply_post_free_array_sz
);
3792 for (i
= 0; i
< ioc
->reply_queue_count
; i
++)
3793 reply_post_free_array
[i
].RDPQBaseAddress
=
3795 (u64
)ioc
->reply_post
[i
].reply_post_free_dma
);
3796 mpi_request
.MsgFlags
= MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE
;
3797 mpi_request
.ReplyDescriptorPostQueueAddress
=
3798 cpu_to_le64((u64
)reply_post_free_array_dma
);
3800 mpi_request
.ReplyDescriptorPostQueueAddress
=
3801 cpu_to_le64((u64
)ioc
->reply_post
[0].reply_post_free_dma
);
3804 /* This time stamp specifies number of milliseconds
3805 * since epoch ~ midnight January 1, 1970.
3807 do_gettimeofday(¤t_time
);
3808 mpi_request
.TimeStamp
= cpu_to_le64((u64
)current_time
.tv_sec
* 1000 +
3809 (current_time
.tv_usec
/ 1000));
3811 if (ioc
->logging_level
& MPT_DEBUG_INIT
) {
3815 mfp
= (__le32
*)&mpi_request
;
3816 pr_info("\toffset:data\n");
3817 for (i
= 0; i
< sizeof(Mpi2IOCInitRequest_t
)/4; i
++)
3818 pr_info("\t[0x%02x]:%08x\n", i
*4,
3819 le32_to_cpu(mfp
[i
]));
3822 r
= _base_handshake_req_reply_wait(ioc
,
3823 sizeof(Mpi2IOCInitRequest_t
), (u32
*)&mpi_request
,
3824 sizeof(Mpi2IOCInitReply_t
), (u16
*)&mpi_reply
, 10,
3828 pr_err(MPT3SAS_FMT
"%s: handshake failed (r=%d)\n",
3829 ioc
->name
, __func__
, r
);
3833 ioc_status
= le16_to_cpu(mpi_reply
.IOCStatus
) & MPI2_IOCSTATUS_MASK
;
3834 if (ioc_status
!= MPI2_IOCSTATUS_SUCCESS
||
3835 mpi_reply
.IOCLogInfo
) {
3836 pr_err(MPT3SAS_FMT
"%s: failed\n", ioc
->name
, __func__
);
3841 if (reply_post_free_array
)
3842 pci_free_consistent(ioc
->pdev
, reply_post_free_array_sz
,
3843 reply_post_free_array
,
3844 reply_post_free_array_dma
);
3849 * mpt3sas_port_enable_done - command completion routine for port enable
3850 * @ioc: per adapter object
3851 * @smid: system request message index
3852 * @msix_index: MSIX table index supplied by the OS
3853 * @reply: reply message frame(lower 32bit addr)
3855 * Return 1 meaning mf should be freed from _base_interrupt
3856 * 0 means the mf is freed from this function.
3859 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
, u8 msix_index
,
3862 MPI2DefaultReply_t
*mpi_reply
;
3865 if (ioc
->port_enable_cmds
.status
== MPT3_CMD_NOT_USED
)
3868 mpi_reply
= mpt3sas_base_get_reply_virt_addr(ioc
, reply
);
3872 if (mpi_reply
->Function
!= MPI2_FUNCTION_PORT_ENABLE
)
3875 ioc
->port_enable_cmds
.status
&= ~MPT3_CMD_PENDING
;
3876 ioc
->port_enable_cmds
.status
|= MPT3_CMD_COMPLETE
;
3877 ioc
->port_enable_cmds
.status
|= MPT3_CMD_REPLY_VALID
;
3878 memcpy(ioc
->port_enable_cmds
.reply
, mpi_reply
, mpi_reply
->MsgLength
*4);
3879 ioc_status
= le16_to_cpu(mpi_reply
->IOCStatus
) & MPI2_IOCSTATUS_MASK
;
3880 if (ioc_status
!= MPI2_IOCSTATUS_SUCCESS
)
3881 ioc
->port_enable_failed
= 1;
3883 if (ioc
->is_driver_loading
) {
3884 if (ioc_status
== MPI2_IOCSTATUS_SUCCESS
) {
3885 mpt3sas_port_enable_complete(ioc
);
3888 ioc
->start_scan_failed
= ioc_status
;
3889 ioc
->start_scan
= 0;
3893 complete(&ioc
->port_enable_cmds
.done
);
3898 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
3899 * @ioc: per adapter object
3900 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3902 * Returns 0 for success, non-zero for failure.
3905 _base_send_port_enable(struct MPT3SAS_ADAPTER
*ioc
, int sleep_flag
)
3907 Mpi2PortEnableRequest_t
*mpi_request
;
3908 Mpi2PortEnableReply_t
*mpi_reply
;
3909 unsigned long timeleft
;
3914 pr_info(MPT3SAS_FMT
"sending port enable !!\n", ioc
->name
);
3916 if (ioc
->port_enable_cmds
.status
& MPT3_CMD_PENDING
) {
3917 pr_err(MPT3SAS_FMT
"%s: internal command already in use\n",
3918 ioc
->name
, __func__
);
3922 smid
= mpt3sas_base_get_smid(ioc
, ioc
->port_enable_cb_idx
);
3924 pr_err(MPT3SAS_FMT
"%s: failed obtaining a smid\n",
3925 ioc
->name
, __func__
);
3929 ioc
->port_enable_cmds
.status
= MPT3_CMD_PENDING
;
3930 mpi_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
3931 ioc
->port_enable_cmds
.smid
= smid
;
3932 memset(mpi_request
, 0, sizeof(Mpi2PortEnableRequest_t
));
3933 mpi_request
->Function
= MPI2_FUNCTION_PORT_ENABLE
;
3935 init_completion(&ioc
->port_enable_cmds
.done
);
3936 mpt3sas_base_put_smid_default(ioc
, smid
);
3937 timeleft
= wait_for_completion_timeout(&ioc
->port_enable_cmds
.done
,
3939 if (!(ioc
->port_enable_cmds
.status
& MPT3_CMD_COMPLETE
)) {
3940 pr_err(MPT3SAS_FMT
"%s: timeout\n",
3941 ioc
->name
, __func__
);
3942 _debug_dump_mf(mpi_request
,
3943 sizeof(Mpi2PortEnableRequest_t
)/4);
3944 if (ioc
->port_enable_cmds
.status
& MPT3_CMD_RESET
)
3951 mpi_reply
= ioc
->port_enable_cmds
.reply
;
3952 ioc_status
= le16_to_cpu(mpi_reply
->IOCStatus
) & MPI2_IOCSTATUS_MASK
;
3953 if (ioc_status
!= MPI2_IOCSTATUS_SUCCESS
) {
3954 pr_err(MPT3SAS_FMT
"%s: failed with (ioc_status=0x%08x)\n",
3955 ioc
->name
, __func__
, ioc_status
);
3961 ioc
->port_enable_cmds
.status
= MPT3_CMD_NOT_USED
;
3962 pr_info(MPT3SAS_FMT
"port enable: %s\n", ioc
->name
, ((r
== 0) ?
3963 "SUCCESS" : "FAILED"));
3968 * mpt3sas_port_enable - initiate firmware discovery (don't wait for reply)
3969 * @ioc: per adapter object
3971 * Returns 0 for success, non-zero for failure.
3974 mpt3sas_port_enable(struct MPT3SAS_ADAPTER
*ioc
)
3976 Mpi2PortEnableRequest_t
*mpi_request
;
3979 pr_info(MPT3SAS_FMT
"sending port enable !!\n", ioc
->name
);
3981 if (ioc
->port_enable_cmds
.status
& MPT3_CMD_PENDING
) {
3982 pr_err(MPT3SAS_FMT
"%s: internal command already in use\n",
3983 ioc
->name
, __func__
);
3987 smid
= mpt3sas_base_get_smid(ioc
, ioc
->port_enable_cb_idx
);
3989 pr_err(MPT3SAS_FMT
"%s: failed obtaining a smid\n",
3990 ioc
->name
, __func__
);
3994 ioc
->port_enable_cmds
.status
= MPT3_CMD_PENDING
;
3995 mpi_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
3996 ioc
->port_enable_cmds
.smid
= smid
;
3997 memset(mpi_request
, 0, sizeof(Mpi2PortEnableRequest_t
));
3998 mpi_request
->Function
= MPI2_FUNCTION_PORT_ENABLE
;
4000 mpt3sas_base_put_smid_default(ioc
, smid
);
4005 * _base_determine_wait_on_discovery - desposition
4006 * @ioc: per adapter object
4008 * Decide whether to wait on discovery to complete. Used to either
4009 * locate boot device, or report volumes ahead of physical devices.
4011 * Returns 1 for wait, 0 for don't wait
4014 _base_determine_wait_on_discovery(struct MPT3SAS_ADAPTER
*ioc
)
4016 /* We wait for discovery to complete if IR firmware is loaded.
4017 * The sas topology events arrive before PD events, so we need time to
4018 * turn on the bit in ioc->pd_handles to indicate PD
4019 * Also, it maybe required to report Volumes ahead of physical
4020 * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
4022 if (ioc
->ir_firmware
)
4025 /* if no Bios, then we don't need to wait */
4026 if (!ioc
->bios_pg3
.BiosVersion
)
4029 /* Bios is present, then we drop down here.
4031 * If there any entries in the Bios Page 2, then we wait
4032 * for discovery to complete.
4035 /* Current Boot Device */
4036 if ((ioc
->bios_pg2
.CurrentBootDeviceForm
&
4037 MPI2_BIOSPAGE2_FORM_MASK
) ==
4038 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED
&&
4039 /* Request Boot Device */
4040 (ioc
->bios_pg2
.ReqBootDeviceForm
&
4041 MPI2_BIOSPAGE2_FORM_MASK
) ==
4042 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED
&&
4043 /* Alternate Request Boot Device */
4044 (ioc
->bios_pg2
.ReqAltBootDeviceForm
&
4045 MPI2_BIOSPAGE2_FORM_MASK
) ==
4046 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED
)
4053 * _base_unmask_events - turn on notification for this event
4054 * @ioc: per adapter object
4055 * @event: firmware event
4057 * The mask is stored in ioc->event_masks.
4060 _base_unmask_events(struct MPT3SAS_ADAPTER
*ioc
, u16 event
)
4067 desired_event
= (1 << (event
% 32));
4070 ioc
->event_masks
[0] &= ~desired_event
;
4071 else if (event
< 64)
4072 ioc
->event_masks
[1] &= ~desired_event
;
4073 else if (event
< 96)
4074 ioc
->event_masks
[2] &= ~desired_event
;
4075 else if (event
< 128)
4076 ioc
->event_masks
[3] &= ~desired_event
;
4080 * _base_event_notification - send event notification
4081 * @ioc: per adapter object
4082 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4084 * Returns 0 for success, non-zero for failure.
4087 _base_event_notification(struct MPT3SAS_ADAPTER
*ioc
, int sleep_flag
)
4089 Mpi2EventNotificationRequest_t
*mpi_request
;
4090 unsigned long timeleft
;
4095 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4098 if (ioc
->base_cmds
.status
& MPT3_CMD_PENDING
) {
4099 pr_err(MPT3SAS_FMT
"%s: internal command already in use\n",
4100 ioc
->name
, __func__
);
4104 smid
= mpt3sas_base_get_smid(ioc
, ioc
->base_cb_idx
);
4106 pr_err(MPT3SAS_FMT
"%s: failed obtaining a smid\n",
4107 ioc
->name
, __func__
);
4110 ioc
->base_cmds
.status
= MPT3_CMD_PENDING
;
4111 mpi_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
4112 ioc
->base_cmds
.smid
= smid
;
4113 memset(mpi_request
, 0, sizeof(Mpi2EventNotificationRequest_t
));
4114 mpi_request
->Function
= MPI2_FUNCTION_EVENT_NOTIFICATION
;
4115 mpi_request
->VF_ID
= 0; /* TODO */
4116 mpi_request
->VP_ID
= 0;
4117 for (i
= 0; i
< MPI2_EVENT_NOTIFY_EVENTMASK_WORDS
; i
++)
4118 mpi_request
->EventMasks
[i
] =
4119 cpu_to_le32(ioc
->event_masks
[i
]);
4120 init_completion(&ioc
->base_cmds
.done
);
4121 mpt3sas_base_put_smid_default(ioc
, smid
);
4122 timeleft
= wait_for_completion_timeout(&ioc
->base_cmds
.done
, 30*HZ
);
4123 if (!(ioc
->base_cmds
.status
& MPT3_CMD_COMPLETE
)) {
4124 pr_err(MPT3SAS_FMT
"%s: timeout\n",
4125 ioc
->name
, __func__
);
4126 _debug_dump_mf(mpi_request
,
4127 sizeof(Mpi2EventNotificationRequest_t
)/4);
4128 if (ioc
->base_cmds
.status
& MPT3_CMD_RESET
)
4133 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: complete\n",
4134 ioc
->name
, __func__
));
4135 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
4140 * mpt3sas_base_validate_event_type - validating event types
4141 * @ioc: per adapter object
4142 * @event: firmware event
4144 * This will turn on firmware event notification when application
4145 * ask for that event. We don't mask events that are already enabled.
4148 mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER
*ioc
, u32
*event_type
)
4151 u32 event_mask
, desired_event
;
4152 u8 send_update_to_fw
;
4154 for (i
= 0, send_update_to_fw
= 0; i
<
4155 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS
; i
++) {
4156 event_mask
= ~event_type
[i
];
4158 for (j
= 0; j
< 32; j
++) {
4159 if (!(event_mask
& desired_event
) &&
4160 (ioc
->event_masks
[i
] & desired_event
)) {
4161 ioc
->event_masks
[i
] &= ~desired_event
;
4162 send_update_to_fw
= 1;
4164 desired_event
= (desired_event
<< 1);
4168 if (!send_update_to_fw
)
4171 mutex_lock(&ioc
->base_cmds
.mutex
);
4172 _base_event_notification(ioc
, CAN_SLEEP
);
4173 mutex_unlock(&ioc
->base_cmds
.mutex
);
4177 * _base_diag_reset - the "big hammer" start of day reset
4178 * @ioc: per adapter object
4179 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4181 * Returns 0 for success, non-zero for failure.
4184 _base_diag_reset(struct MPT3SAS_ADAPTER
*ioc
, int sleep_flag
)
4186 u32 host_diagnostic
;
4191 pr_info(MPT3SAS_FMT
"sending diag reset !!\n", ioc
->name
);
4193 drsprintk(ioc
, pr_info(MPT3SAS_FMT
"clear interrupts\n",
4198 /* Write magic sequence to WriteSequence register
4199 * Loop until in diagnostic mode
4201 drsprintk(ioc
, pr_info(MPT3SAS_FMT
4202 "write magic sequence\n", ioc
->name
));
4203 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4204 writel(MPI2_WRSEQ_1ST_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4205 writel(MPI2_WRSEQ_2ND_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4206 writel(MPI2_WRSEQ_3RD_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4207 writel(MPI2_WRSEQ_4TH_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4208 writel(MPI2_WRSEQ_5TH_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4209 writel(MPI2_WRSEQ_6TH_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4212 if (sleep_flag
== CAN_SLEEP
)
4220 host_diagnostic
= readl(&ioc
->chip
->HostDiagnostic
);
4221 drsprintk(ioc
, pr_info(MPT3SAS_FMT
4222 "wrote magic sequence: count(%d), host_diagnostic(0x%08x)\n",
4223 ioc
->name
, count
, host_diagnostic
));
4225 } while ((host_diagnostic
& MPI2_DIAG_DIAG_WRITE_ENABLE
) == 0);
4227 hcb_size
= readl(&ioc
->chip
->HCBSize
);
4229 drsprintk(ioc
, pr_info(MPT3SAS_FMT
"diag reset: issued\n",
4231 writel(host_diagnostic
| MPI2_DIAG_RESET_ADAPTER
,
4232 &ioc
->chip
->HostDiagnostic
);
4234 /*This delay allows the chip PCIe hardware time to finish reset tasks*/
4235 if (sleep_flag
== CAN_SLEEP
)
4236 msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC
/1000);
4238 mdelay(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC
/1000);
4240 /* Approximately 300 second max wait */
4241 for (count
= 0; count
< (300000000 /
4242 MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
); count
++) {
4244 host_diagnostic
= readl(&ioc
->chip
->HostDiagnostic
);
4246 if (host_diagnostic
== 0xFFFFFFFF)
4248 if (!(host_diagnostic
& MPI2_DIAG_RESET_ADAPTER
))
4251 /* Wait to pass the second read delay window */
4252 if (sleep_flag
== CAN_SLEEP
)
4253 msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
4256 mdelay(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
4260 if (host_diagnostic
& MPI2_DIAG_HCB_MODE
) {
4262 drsprintk(ioc
, pr_info(MPT3SAS_FMT
4263 "restart the adapter assuming the HCB Address points to good F/W\n",
4265 host_diagnostic
&= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK
;
4266 host_diagnostic
|= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW
;
4267 writel(host_diagnostic
, &ioc
->chip
->HostDiagnostic
);
4269 drsprintk(ioc
, pr_info(MPT3SAS_FMT
4270 "re-enable the HCDW\n", ioc
->name
));
4271 writel(hcb_size
| MPI2_HCB_SIZE_HCB_ENABLE
,
4272 &ioc
->chip
->HCBSize
);
4275 drsprintk(ioc
, pr_info(MPT3SAS_FMT
"restart the adapter\n",
4277 writel(host_diagnostic
& ~MPI2_DIAG_HOLD_IOC_RESET
,
4278 &ioc
->chip
->HostDiagnostic
);
4280 drsprintk(ioc
, pr_info(MPT3SAS_FMT
4281 "disable writes to the diagnostic register\n", ioc
->name
));
4282 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4284 drsprintk(ioc
, pr_info(MPT3SAS_FMT
4285 "Wait for FW to go to the READY state\n", ioc
->name
));
4286 ioc_state
= _base_wait_on_iocstate(ioc
, MPI2_IOC_STATE_READY
, 20,
4290 "%s: failed going to ready state (ioc_state=0x%x)\n",
4291 ioc
->name
, __func__
, ioc_state
);
4295 pr_info(MPT3SAS_FMT
"diag reset: SUCCESS\n", ioc
->name
);
4299 pr_err(MPT3SAS_FMT
"diag reset: FAILED\n", ioc
->name
);
4304 * _base_make_ioc_ready - put controller in READY state
4305 * @ioc: per adapter object
4306 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4307 * @type: FORCE_BIG_HAMMER or SOFT_RESET
4309 * Returns 0 for success, non-zero for failure.
4312 _base_make_ioc_ready(struct MPT3SAS_ADAPTER
*ioc
, int sleep_flag
,
4313 enum reset_type type
)
4319 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4322 if (ioc
->pci_error_recovery
)
4325 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 0);
4326 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: ioc_state(0x%08x)\n",
4327 ioc
->name
, __func__
, ioc_state
));
4329 /* if in RESET state, it should move to READY state shortly */
4331 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_RESET
) {
4332 while ((ioc_state
& MPI2_IOC_STATE_MASK
) !=
4333 MPI2_IOC_STATE_READY
) {
4334 if (count
++ == 10) {
4336 "%s: failed going to ready state (ioc_state=0x%x)\n",
4337 ioc
->name
, __func__
, ioc_state
);
4340 if (sleep_flag
== CAN_SLEEP
)
4344 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 0);
4348 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_READY
)
4351 if (ioc_state
& MPI2_DOORBELL_USED
) {
4352 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
4353 "unexpected doorbell active!\n",
4355 goto issue_diag_reset
;
4358 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_FAULT
) {
4359 mpt3sas_base_fault_info(ioc
, ioc_state
&
4360 MPI2_DOORBELL_DATA_MASK
);
4361 goto issue_diag_reset
;
4364 if (type
== FORCE_BIG_HAMMER
)
4365 goto issue_diag_reset
;
4367 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_OPERATIONAL
)
4368 if (!(_base_send_ioc_reset(ioc
,
4369 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
, 15, CAN_SLEEP
))) {
4374 rc
= _base_diag_reset(ioc
, CAN_SLEEP
);
4379 * _base_make_ioc_operational - put controller in OPERATIONAL state
4380 * @ioc: per adapter object
4381 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4383 * Returns 0 for success, non-zero for failure.
4386 _base_make_ioc_operational(struct MPT3SAS_ADAPTER
*ioc
, int sleep_flag
)
4389 unsigned long flags
;
4392 struct _tr_list
*delayed_tr
, *delayed_tr_next
;
4393 struct adapter_reply_queue
*reply_q
;
4394 long reply_post_free
;
4395 u32 reply_post_free_sz
, index
= 0;
4397 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4400 /* clean the delayed target reset list */
4401 list_for_each_entry_safe(delayed_tr
, delayed_tr_next
,
4402 &ioc
->delayed_tr_list
, list
) {
4403 list_del(&delayed_tr
->list
);
4408 list_for_each_entry_safe(delayed_tr
, delayed_tr_next
,
4409 &ioc
->delayed_tr_volume_list
, list
) {
4410 list_del(&delayed_tr
->list
);
4414 /* initialize the scsi lookup free list */
4415 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
4416 INIT_LIST_HEAD(&ioc
->free_list
);
4418 for (i
= 0; i
< ioc
->scsiio_depth
; i
++, smid
++) {
4419 INIT_LIST_HEAD(&ioc
->scsi_lookup
[i
].chain_list
);
4420 ioc
->scsi_lookup
[i
].cb_idx
= 0xFF;
4421 ioc
->scsi_lookup
[i
].smid
= smid
;
4422 ioc
->scsi_lookup
[i
].scmd
= NULL
;
4423 list_add_tail(&ioc
->scsi_lookup
[i
].tracker_list
,
4427 /* hi-priority queue */
4428 INIT_LIST_HEAD(&ioc
->hpr_free_list
);
4429 smid
= ioc
->hi_priority_smid
;
4430 for (i
= 0; i
< ioc
->hi_priority_depth
; i
++, smid
++) {
4431 ioc
->hpr_lookup
[i
].cb_idx
= 0xFF;
4432 ioc
->hpr_lookup
[i
].smid
= smid
;
4433 list_add_tail(&ioc
->hpr_lookup
[i
].tracker_list
,
4434 &ioc
->hpr_free_list
);
4437 /* internal queue */
4438 INIT_LIST_HEAD(&ioc
->internal_free_list
);
4439 smid
= ioc
->internal_smid
;
4440 for (i
= 0; i
< ioc
->internal_depth
; i
++, smid
++) {
4441 ioc
->internal_lookup
[i
].cb_idx
= 0xFF;
4442 ioc
->internal_lookup
[i
].smid
= smid
;
4443 list_add_tail(&ioc
->internal_lookup
[i
].tracker_list
,
4444 &ioc
->internal_free_list
);
4448 INIT_LIST_HEAD(&ioc
->free_chain_list
);
4449 for (i
= 0; i
< ioc
->chain_depth
; i
++)
4450 list_add_tail(&ioc
->chain_lookup
[i
].tracker_list
,
4451 &ioc
->free_chain_list
);
4453 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
4455 /* initialize Reply Free Queue */
4456 for (i
= 0, reply_address
= (u32
)ioc
->reply_dma
;
4457 i
< ioc
->reply_free_queue_depth
; i
++, reply_address
+=
4459 ioc
->reply_free
[i
] = cpu_to_le32(reply_address
);
4461 /* initialize reply queues */
4462 if (ioc
->is_driver_loading
)
4463 _base_assign_reply_queues(ioc
);
4465 /* initialize Reply Post Free Queue */
4466 reply_post_free_sz
= ioc
->reply_post_queue_depth
*
4467 sizeof(Mpi2DefaultReplyDescriptor_t
);
4468 reply_post_free
= (long)ioc
->reply_post
[index
].reply_post_free
;
4469 list_for_each_entry(reply_q
, &ioc
->reply_queue_list
, list
) {
4470 reply_q
->reply_post_host_index
= 0;
4471 reply_q
->reply_post_free
= (Mpi2ReplyDescriptorsUnion_t
*)
4473 for (i
= 0; i
< ioc
->reply_post_queue_depth
; i
++)
4474 reply_q
->reply_post_free
[i
].Words
=
4475 cpu_to_le64(ULLONG_MAX
);
4476 if (!_base_is_controller_msix_enabled(ioc
))
4477 goto skip_init_reply_post_free_queue
;
4479 * If RDPQ is enabled, switch to the next allocation.
4480 * Otherwise advance within the contiguous region.
4482 if (ioc
->rdpq_array_enable
)
4483 reply_post_free
= (long)
4484 ioc
->reply_post
[++index
].reply_post_free
;
4486 reply_post_free
+= reply_post_free_sz
;
4488 skip_init_reply_post_free_queue
:
4490 r
= _base_send_ioc_init(ioc
, sleep_flag
);
4494 /* initialize reply free host index */
4495 ioc
->reply_free_host_index
= ioc
->reply_free_queue_depth
- 1;
4496 writel(ioc
->reply_free_host_index
, &ioc
->chip
->ReplyFreeHostIndex
);
4498 /* initialize reply post host index */
4499 list_for_each_entry(reply_q
, &ioc
->reply_queue_list
, list
) {
4500 writel(reply_q
->msix_index
<< MPI2_RPHI_MSIX_INDEX_SHIFT
,
4501 &ioc
->chip
->ReplyPostHostIndex
);
4502 if (!_base_is_controller_msix_enabled(ioc
))
4503 goto skip_init_reply_post_host_index
;
4506 skip_init_reply_post_host_index
:
4508 _base_unmask_interrupts(ioc
);
4509 r
= _base_event_notification(ioc
, sleep_flag
);
4513 if (sleep_flag
== CAN_SLEEP
)
4514 _base_static_config_pages(ioc
);
4517 if (ioc
->is_driver_loading
) {
4518 ioc
->wait_for_discovery_to_complete
=
4519 _base_determine_wait_on_discovery(ioc
);
4521 return r
; /* scan_start and scan_finished support */
4524 r
= _base_send_port_enable(ioc
, sleep_flag
);
4532 * mpt3sas_base_free_resources - free resources controller resources
4533 * @ioc: per adapter object
4538 mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER
*ioc
)
4540 struct pci_dev
*pdev
= ioc
->pdev
;
4542 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4545 if (ioc
->chip_phys
&& ioc
->chip
) {
4546 _base_mask_interrupts(ioc
);
4547 ioc
->shost_recovery
= 1;
4548 _base_make_ioc_ready(ioc
, CAN_SLEEP
, SOFT_RESET
);
4549 ioc
->shost_recovery
= 0;
4552 _base_free_irq(ioc
);
4553 _base_disable_msix(ioc
);
4555 if (ioc
->chip_phys
&& ioc
->chip
)
4559 if (pci_is_enabled(pdev
)) {
4560 pci_release_selected_regions(ioc
->pdev
, ioc
->bars
);
4561 pci_disable_pcie_error_reporting(pdev
);
4562 pci_disable_device(pdev
);
4568 * mpt3sas_base_attach - attach controller instance
4569 * @ioc: per adapter object
4571 * Returns 0 for success, non-zero for failure.
4574 mpt3sas_base_attach(struct MPT3SAS_ADAPTER
*ioc
)
4577 int cpu_id
, last_cpu_id
= 0;
4579 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4582 /* setup cpu_msix_table */
4583 ioc
->cpu_count
= num_online_cpus();
4584 for_each_online_cpu(cpu_id
)
4585 last_cpu_id
= cpu_id
;
4586 ioc
->cpu_msix_table_sz
= last_cpu_id
+ 1;
4587 ioc
->cpu_msix_table
= kzalloc(ioc
->cpu_msix_table_sz
, GFP_KERNEL
);
4588 ioc
->reply_queue_count
= 1;
4589 if (!ioc
->cpu_msix_table
) {
4590 dfailprintk(ioc
, pr_info(MPT3SAS_FMT
4591 "allocation for cpu_msix_table failed!!!\n",
4594 goto out_free_resources
;
4597 ioc
->rdpq_array_enable_assigned
= 0;
4599 r
= mpt3sas_base_map_resources(ioc
);
4601 goto out_free_resources
;
4604 pci_set_drvdata(ioc
->pdev
, ioc
->shost
);
4605 r
= _base_get_ioc_facts(ioc
, CAN_SLEEP
);
4607 goto out_free_resources
;
4611 * SCSI_IO, SMP_PASSTHRU, SATA_PASSTHRU, Target Assist, and
4612 * Target Status - all require the IEEE formated scatter gather
4616 ioc
->build_sg_scmd
= &_base_build_sg_scmd_ieee
;
4617 ioc
->build_sg
= &_base_build_sg_ieee
;
4618 ioc
->build_zero_len_sge
= &_base_build_zero_len_sge_ieee
;
4620 ioc
->sge_size_ieee
= sizeof(Mpi2IeeeSgeSimple64_t
);
4623 * These function pointers for other requests that don't
4624 * the require IEEE scatter gather elements.
4626 * For example Configuration Pages and SAS IOUNIT Control don't.
4628 ioc
->build_sg_mpi
= &_base_build_sg
;
4629 ioc
->build_zero_len_sge_mpi
= &_base_build_zero_len_sge
;
4631 r
= _base_make_ioc_ready(ioc
, CAN_SLEEP
, SOFT_RESET
);
4633 goto out_free_resources
;
4635 ioc
->pfacts
= kcalloc(ioc
->facts
.NumberOfPorts
,
4636 sizeof(struct mpt3sas_port_facts
), GFP_KERNEL
);
4639 goto out_free_resources
;
4642 for (i
= 0 ; i
< ioc
->facts
.NumberOfPorts
; i
++) {
4643 r
= _base_get_port_facts(ioc
, i
, CAN_SLEEP
);
4645 goto out_free_resources
;
4648 r
= _base_allocate_memory_pools(ioc
, CAN_SLEEP
);
4650 goto out_free_resources
;
4652 init_waitqueue_head(&ioc
->reset_wq
);
4654 /* allocate memory pd handle bitmask list */
4655 ioc
->pd_handles_sz
= (ioc
->facts
.MaxDevHandle
/ 8);
4656 if (ioc
->facts
.MaxDevHandle
% 8)
4657 ioc
->pd_handles_sz
++;
4658 ioc
->pd_handles
= kzalloc(ioc
->pd_handles_sz
,
4660 if (!ioc
->pd_handles
) {
4662 goto out_free_resources
;
4664 ioc
->blocking_handles
= kzalloc(ioc
->pd_handles_sz
,
4666 if (!ioc
->blocking_handles
) {
4668 goto out_free_resources
;
4671 ioc
->fwfault_debug
= mpt3sas_fwfault_debug
;
4673 /* base internal command bits */
4674 mutex_init(&ioc
->base_cmds
.mutex
);
4675 ioc
->base_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
4676 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
4678 /* port_enable command bits */
4679 ioc
->port_enable_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
4680 ioc
->port_enable_cmds
.status
= MPT3_CMD_NOT_USED
;
4682 /* transport internal command bits */
4683 ioc
->transport_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
4684 ioc
->transport_cmds
.status
= MPT3_CMD_NOT_USED
;
4685 mutex_init(&ioc
->transport_cmds
.mutex
);
4687 /* scsih internal command bits */
4688 ioc
->scsih_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
4689 ioc
->scsih_cmds
.status
= MPT3_CMD_NOT_USED
;
4690 mutex_init(&ioc
->scsih_cmds
.mutex
);
4692 /* task management internal command bits */
4693 ioc
->tm_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
4694 ioc
->tm_cmds
.status
= MPT3_CMD_NOT_USED
;
4695 mutex_init(&ioc
->tm_cmds
.mutex
);
4697 /* config page internal command bits */
4698 ioc
->config_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
4699 ioc
->config_cmds
.status
= MPT3_CMD_NOT_USED
;
4700 mutex_init(&ioc
->config_cmds
.mutex
);
4702 /* ctl module internal command bits */
4703 ioc
->ctl_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
4704 ioc
->ctl_cmds
.sense
= kzalloc(SCSI_SENSE_BUFFERSIZE
, GFP_KERNEL
);
4705 ioc
->ctl_cmds
.status
= MPT3_CMD_NOT_USED
;
4706 mutex_init(&ioc
->ctl_cmds
.mutex
);
4708 if (!ioc
->base_cmds
.reply
|| !ioc
->transport_cmds
.reply
||
4709 !ioc
->scsih_cmds
.reply
|| !ioc
->tm_cmds
.reply
||
4710 !ioc
->config_cmds
.reply
|| !ioc
->ctl_cmds
.reply
||
4711 !ioc
->ctl_cmds
.sense
) {
4713 goto out_free_resources
;
4716 for (i
= 0; i
< MPI2_EVENT_NOTIFY_EVENTMASK_WORDS
; i
++)
4717 ioc
->event_masks
[i
] = -1;
4719 /* here we enable the events we care about */
4720 _base_unmask_events(ioc
, MPI2_EVENT_SAS_DISCOVERY
);
4721 _base_unmask_events(ioc
, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE
);
4722 _base_unmask_events(ioc
, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST
);
4723 _base_unmask_events(ioc
, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE
);
4724 _base_unmask_events(ioc
, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE
);
4725 _base_unmask_events(ioc
, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST
);
4726 _base_unmask_events(ioc
, MPI2_EVENT_IR_VOLUME
);
4727 _base_unmask_events(ioc
, MPI2_EVENT_IR_PHYSICAL_DISK
);
4728 _base_unmask_events(ioc
, MPI2_EVENT_IR_OPERATION_STATUS
);
4729 _base_unmask_events(ioc
, MPI2_EVENT_LOG_ENTRY_ADDED
);
4730 _base_unmask_events(ioc
, MPI2_EVENT_TEMP_THRESHOLD
);
4732 r
= _base_make_ioc_operational(ioc
, CAN_SLEEP
);
4734 goto out_free_resources
;
4740 ioc
->remove_host
= 1;
4742 mpt3sas_base_free_resources(ioc
);
4743 _base_release_memory_pools(ioc
);
4744 pci_set_drvdata(ioc
->pdev
, NULL
);
4745 kfree(ioc
->cpu_msix_table
);
4746 kfree(ioc
->pd_handles
);
4747 kfree(ioc
->blocking_handles
);
4748 kfree(ioc
->tm_cmds
.reply
);
4749 kfree(ioc
->transport_cmds
.reply
);
4750 kfree(ioc
->scsih_cmds
.reply
);
4751 kfree(ioc
->config_cmds
.reply
);
4752 kfree(ioc
->base_cmds
.reply
);
4753 kfree(ioc
->port_enable_cmds
.reply
);
4754 kfree(ioc
->ctl_cmds
.reply
);
4755 kfree(ioc
->ctl_cmds
.sense
);
4757 ioc
->ctl_cmds
.reply
= NULL
;
4758 ioc
->base_cmds
.reply
= NULL
;
4759 ioc
->tm_cmds
.reply
= NULL
;
4760 ioc
->scsih_cmds
.reply
= NULL
;
4761 ioc
->transport_cmds
.reply
= NULL
;
4762 ioc
->config_cmds
.reply
= NULL
;
4769 * mpt3sas_base_detach - remove controller instance
4770 * @ioc: per adapter object
4775 mpt3sas_base_detach(struct MPT3SAS_ADAPTER
*ioc
)
4777 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4780 mpt3sas_base_stop_watchdog(ioc
);
4781 mpt3sas_base_free_resources(ioc
);
4782 _base_release_memory_pools(ioc
);
4783 pci_set_drvdata(ioc
->pdev
, NULL
);
4784 kfree(ioc
->cpu_msix_table
);
4785 kfree(ioc
->pd_handles
);
4786 kfree(ioc
->blocking_handles
);
4788 kfree(ioc
->ctl_cmds
.reply
);
4789 kfree(ioc
->ctl_cmds
.sense
);
4790 kfree(ioc
->base_cmds
.reply
);
4791 kfree(ioc
->port_enable_cmds
.reply
);
4792 kfree(ioc
->tm_cmds
.reply
);
4793 kfree(ioc
->transport_cmds
.reply
);
4794 kfree(ioc
->scsih_cmds
.reply
);
4795 kfree(ioc
->config_cmds
.reply
);
4799 * _base_reset_handler - reset callback handler (for base)
4800 * @ioc: per adapter object
4801 * @reset_phase: phase
4803 * The handler for doing any required cleanup or initialization.
4805 * The reset phase can be MPT3_IOC_PRE_RESET, MPT3_IOC_AFTER_RESET,
4806 * MPT3_IOC_DONE_RESET
4811 _base_reset_handler(struct MPT3SAS_ADAPTER
*ioc
, int reset_phase
)
4813 mpt3sas_scsih_reset_handler(ioc
, reset_phase
);
4814 mpt3sas_ctl_reset_handler(ioc
, reset_phase
);
4815 switch (reset_phase
) {
4816 case MPT3_IOC_PRE_RESET
:
4817 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
4818 "%s: MPT3_IOC_PRE_RESET\n", ioc
->name
, __func__
));
4820 case MPT3_IOC_AFTER_RESET
:
4821 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
4822 "%s: MPT3_IOC_AFTER_RESET\n", ioc
->name
, __func__
));
4823 if (ioc
->transport_cmds
.status
& MPT3_CMD_PENDING
) {
4824 ioc
->transport_cmds
.status
|= MPT3_CMD_RESET
;
4825 mpt3sas_base_free_smid(ioc
, ioc
->transport_cmds
.smid
);
4826 complete(&ioc
->transport_cmds
.done
);
4828 if (ioc
->base_cmds
.status
& MPT3_CMD_PENDING
) {
4829 ioc
->base_cmds
.status
|= MPT3_CMD_RESET
;
4830 mpt3sas_base_free_smid(ioc
, ioc
->base_cmds
.smid
);
4831 complete(&ioc
->base_cmds
.done
);
4833 if (ioc
->port_enable_cmds
.status
& MPT3_CMD_PENDING
) {
4834 ioc
->port_enable_failed
= 1;
4835 ioc
->port_enable_cmds
.status
|= MPT3_CMD_RESET
;
4836 mpt3sas_base_free_smid(ioc
, ioc
->port_enable_cmds
.smid
);
4837 if (ioc
->is_driver_loading
) {
4838 ioc
->start_scan_failed
=
4839 MPI2_IOCSTATUS_INTERNAL_ERROR
;
4840 ioc
->start_scan
= 0;
4841 ioc
->port_enable_cmds
.status
=
4844 complete(&ioc
->port_enable_cmds
.done
);
4846 if (ioc
->config_cmds
.status
& MPT3_CMD_PENDING
) {
4847 ioc
->config_cmds
.status
|= MPT3_CMD_RESET
;
4848 mpt3sas_base_free_smid(ioc
, ioc
->config_cmds
.smid
);
4849 ioc
->config_cmds
.smid
= USHRT_MAX
;
4850 complete(&ioc
->config_cmds
.done
);
4853 case MPT3_IOC_DONE_RESET
:
4854 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
4855 "%s: MPT3_IOC_DONE_RESET\n", ioc
->name
, __func__
));
4861 * _wait_for_commands_to_complete - reset controller
4862 * @ioc: Pointer to MPT_ADAPTER structure
4863 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4865 * This function waiting(3s) for all pending commands to complete
4866 * prior to putting controller in reset.
4869 _wait_for_commands_to_complete(struct MPT3SAS_ADAPTER
*ioc
, int sleep_flag
)
4872 unsigned long flags
;
4875 ioc
->pending_io_count
= 0;
4876 if (sleep_flag
!= CAN_SLEEP
)
4879 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 0);
4880 if ((ioc_state
& MPI2_IOC_STATE_MASK
) != MPI2_IOC_STATE_OPERATIONAL
)
4883 /* pending command count */
4884 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
4885 for (i
= 0; i
< ioc
->scsiio_depth
; i
++)
4886 if (ioc
->scsi_lookup
[i
].cb_idx
!= 0xFF)
4887 ioc
->pending_io_count
++;
4888 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
4890 if (!ioc
->pending_io_count
)
4893 /* wait for pending commands to complete */
4894 wait_event_timeout(ioc
->reset_wq
, ioc
->pending_io_count
== 0, 10 * HZ
);
4898 * mpt3sas_base_hard_reset_handler - reset controller
4899 * @ioc: Pointer to MPT_ADAPTER structure
4900 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4901 * @type: FORCE_BIG_HAMMER or SOFT_RESET
4903 * Returns 0 for success, non-zero for failure.
4906 mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER
*ioc
, int sleep_flag
,
4907 enum reset_type type
)
4910 unsigned long flags
;
4912 u8 is_fault
= 0, is_trigger
= 0;
4914 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: enter\n", ioc
->name
,
4917 if (ioc
->pci_error_recovery
) {
4918 pr_err(MPT3SAS_FMT
"%s: pci error recovery reset\n",
4919 ioc
->name
, __func__
);
4924 if (mpt3sas_fwfault_debug
)
4925 mpt3sas_halt_firmware(ioc
);
4927 /* TODO - What we really should be doing is pulling
4928 * out all the code associated with NO_SLEEP; its never used.
4929 * That is legacy code from mpt fusion driver, ported over.
4930 * I will leave this BUG_ON here for now till its been resolved.
4932 BUG_ON(sleep_flag
== NO_SLEEP
);
4934 /* wait for an active reset in progress to complete */
4935 if (!mutex_trylock(&ioc
->reset_in_progress_mutex
)) {
4938 } while (ioc
->shost_recovery
== 1);
4939 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: exit\n", ioc
->name
,
4941 return ioc
->ioc_reset_in_progress_status
;
4944 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
4945 ioc
->shost_recovery
= 1;
4946 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
4948 if ((ioc
->diag_buffer_status
[MPI2_DIAG_BUF_TYPE_TRACE
] &
4949 MPT3_DIAG_BUFFER_IS_REGISTERED
) &&
4950 (!(ioc
->diag_buffer_status
[MPI2_DIAG_BUF_TYPE_TRACE
] &
4951 MPT3_DIAG_BUFFER_IS_RELEASED
))) {
4953 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 0);
4954 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_FAULT
)
4957 _base_reset_handler(ioc
, MPT3_IOC_PRE_RESET
);
4958 _wait_for_commands_to_complete(ioc
, sleep_flag
);
4959 _base_mask_interrupts(ioc
);
4960 r
= _base_make_ioc_ready(ioc
, sleep_flag
, type
);
4963 _base_reset_handler(ioc
, MPT3_IOC_AFTER_RESET
);
4965 /* If this hard reset is called while port enable is active, then
4966 * there is no reason to call make_ioc_operational
4968 if (ioc
->is_driver_loading
&& ioc
->port_enable_failed
) {
4969 ioc
->remove_host
= 1;
4973 r
= _base_get_ioc_facts(ioc
, CAN_SLEEP
);
4977 if (ioc
->rdpq_array_enable
&& !ioc
->rdpq_array_capable
)
4978 panic("%s: Issue occurred with flashing controller firmware."
4979 "Please reboot the system and ensure that the correct"
4980 " firmware version is running\n", ioc
->name
);
4982 r
= _base_make_ioc_operational(ioc
, sleep_flag
);
4984 _base_reset_handler(ioc
, MPT3_IOC_DONE_RESET
);
4987 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: %s\n",
4988 ioc
->name
, __func__
, ((r
== 0) ? "SUCCESS" : "FAILED")));
4990 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
4991 ioc
->ioc_reset_in_progress_status
= r
;
4992 ioc
->shost_recovery
= 0;
4993 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
4994 ioc
->ioc_reset_count
++;
4995 mutex_unlock(&ioc
->reset_in_progress_mutex
);
4998 if ((r
== 0) && is_trigger
) {
5000 mpt3sas_trigger_master(ioc
, MASTER_TRIGGER_FW_FAULT
);
5002 mpt3sas_trigger_master(ioc
,
5003 MASTER_TRIGGER_ADAPTER_RESET
);
5005 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: exit\n", ioc
->name
,