2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
5 * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.c
6 * Copyright (C) 2012-2014 LSI Corporation
7 * Copyright (C) 2013-2014 Avago Technologies
8 * (mailto: MPT-FusionLinux.pdl@avagotech.com)
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
21 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
22 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
24 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
25 * solely responsible for determining the appropriateness of using and
26 * distributing the Program and assumes all risks associated with its
27 * exercise of rights under this Agreement, including but not limited to
28 * the risks and costs of program errors, damage to or loss of data,
29 * programs or equipment, and unavailability or interruption of operations.
31 * DISCLAIMER OF LIABILITY
32 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
36 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
37 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
38 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
40 * You should have received a copy of the GNU General Public License
41 * along with this program; if not, write to the Free Software
42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
46 #include <linux/kernel.h>
47 #include <linux/module.h>
48 #include <linux/errno.h>
49 #include <linux/init.h>
50 #include <linux/slab.h>
51 #include <linux/types.h>
52 #include <linux/pci.h>
53 #include <linux/kdev_t.h>
54 #include <linux/blkdev.h>
55 #include <linux/delay.h>
56 #include <linux/interrupt.h>
57 #include <linux/dma-mapping.h>
59 #include <linux/time.h>
60 #include <linux/ktime.h>
61 #include <linux/kthread.h>
62 #include <linux/aer.h>
65 #include "mpt3sas_base.h"
67 static MPT_CALLBACK mpt_callbacks
[MPT_MAX_CALLBACKS
];
70 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
72 /* maximum controller queue depth */
73 #define MAX_HBA_QUEUE_DEPTH 30000
74 #define MAX_CHAIN_DEPTH 100000
75 static int max_queue_depth
= -1;
76 module_param(max_queue_depth
, int, 0);
77 MODULE_PARM_DESC(max_queue_depth
, " max controller queue depth ");
79 static int max_sgl_entries
= -1;
80 module_param(max_sgl_entries
, int, 0);
81 MODULE_PARM_DESC(max_sgl_entries
, " max sg entries ");
83 static int msix_disable
= -1;
84 module_param(msix_disable
, int, 0);
85 MODULE_PARM_DESC(msix_disable
, " disable msix routed interrupts (default=0)");
87 static int smp_affinity_enable
= 1;
88 module_param(smp_affinity_enable
, int, S_IRUGO
);
89 MODULE_PARM_DESC(smp_affinity_enable
, "SMP affinity feature enable/disbale Default: enable(1)");
91 static int max_msix_vectors
= -1;
92 module_param(max_msix_vectors
, int, 0);
93 MODULE_PARM_DESC(max_msix_vectors
,
96 static int mpt3sas_fwfault_debug
;
97 MODULE_PARM_DESC(mpt3sas_fwfault_debug
,
98 " enable detection of firmware fault and halt firmware - (default=0)");
101 _base_get_ioc_facts(struct MPT3SAS_ADAPTER
*ioc
);
104 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
108 _scsih_set_fwfault_debug(const char *val
, struct kernel_param
*kp
)
110 int ret
= param_set_int(val
, kp
);
111 struct MPT3SAS_ADAPTER
*ioc
;
116 /* global ioc spinlock to protect controller list on list operations */
117 pr_info("setting fwfault_debug(%d)\n", mpt3sas_fwfault_debug
);
118 spin_lock(&gioc_lock
);
119 list_for_each_entry(ioc
, &mpt3sas_ioc_list
, list
)
120 ioc
->fwfault_debug
= mpt3sas_fwfault_debug
;
121 spin_unlock(&gioc_lock
);
124 module_param_call(mpt3sas_fwfault_debug
, _scsih_set_fwfault_debug
,
125 param_get_int
, &mpt3sas_fwfault_debug
, 0644);
128 * mpt3sas_remove_dead_ioc_func - kthread context to remove dead ioc
129 * @arg: input argument, used to derive ioc
131 * Return 0 if controller is removed from pci subsystem.
132 * Return -1 for other case.
134 static int mpt3sas_remove_dead_ioc_func(void *arg
)
136 struct MPT3SAS_ADAPTER
*ioc
= (struct MPT3SAS_ADAPTER
*)arg
;
137 struct pci_dev
*pdev
;
145 pci_stop_and_remove_bus_device_locked(pdev
);
150 * _base_fault_reset_work - workq handling ioc fault conditions
151 * @work: input argument, used to derive ioc
157 _base_fault_reset_work(struct work_struct
*work
)
159 struct MPT3SAS_ADAPTER
*ioc
=
160 container_of(work
, struct MPT3SAS_ADAPTER
, fault_reset_work
.work
);
164 struct task_struct
*p
;
167 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
168 if (ioc
->shost_recovery
|| ioc
->pci_error_recovery
)
170 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
172 doorbell
= mpt3sas_base_get_iocstate(ioc
, 0);
173 if ((doorbell
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_MASK
) {
174 pr_err(MPT3SAS_FMT
"SAS host is non-operational !!!!\n",
177 /* It may be possible that EEH recovery can resolve some of
178 * pci bus failure issues rather removing the dead ioc function
179 * by considering controller is in a non-operational state. So
180 * here priority is given to the EEH recovery. If it doesn't
181 * not resolve this issue, mpt3sas driver will consider this
182 * controller to non-operational state and remove the dead ioc
185 if (ioc
->non_operational_loop
++ < 5) {
186 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
,
192 * Call _scsih_flush_pending_cmds callback so that we flush all
193 * pending commands back to OS. This call is required to aovid
194 * deadlock at block layer. Dead IOC will fail to do diag reset,
195 * and this call is safe since dead ioc will never return any
196 * command back from HW.
198 ioc
->schedule_dead_ioc_flush_running_cmds(ioc
);
200 * Set remove_host flag early since kernel thread will
201 * take some time to execute.
203 ioc
->remove_host
= 1;
204 /*Remove the Dead Host */
205 p
= kthread_run(mpt3sas_remove_dead_ioc_func
, ioc
,
206 "%s_dead_ioc_%d", ioc
->driver_name
, ioc
->id
);
209 "%s: Running mpt3sas_dead_ioc thread failed !!!!\n",
210 ioc
->name
, __func__
);
213 "%s: Running mpt3sas_dead_ioc thread success !!!!\n",
214 ioc
->name
, __func__
);
215 return; /* don't rearm timer */
218 ioc
->non_operational_loop
= 0;
220 if ((doorbell
& MPI2_IOC_STATE_MASK
) != MPI2_IOC_STATE_OPERATIONAL
) {
221 rc
= mpt3sas_base_hard_reset_handler(ioc
, FORCE_BIG_HAMMER
);
222 pr_warn(MPT3SAS_FMT
"%s: hard reset: %s\n", ioc
->name
,
223 __func__
, (rc
== 0) ? "success" : "failed");
224 doorbell
= mpt3sas_base_get_iocstate(ioc
, 0);
225 if ((doorbell
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_FAULT
)
226 mpt3sas_base_fault_info(ioc
, doorbell
&
227 MPI2_DOORBELL_DATA_MASK
);
228 if (rc
&& (doorbell
& MPI2_IOC_STATE_MASK
) !=
229 MPI2_IOC_STATE_OPERATIONAL
)
230 return; /* don't rearm timer */
233 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
235 if (ioc
->fault_reset_work_q
)
236 queue_delayed_work(ioc
->fault_reset_work_q
,
237 &ioc
->fault_reset_work
,
238 msecs_to_jiffies(FAULT_POLLING_INTERVAL
));
239 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
243 * mpt3sas_base_start_watchdog - start the fault_reset_work_q
244 * @ioc: per adapter object
250 mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER
*ioc
)
254 if (ioc
->fault_reset_work_q
)
257 /* initialize fault polling */
259 INIT_DELAYED_WORK(&ioc
->fault_reset_work
, _base_fault_reset_work
);
260 snprintf(ioc
->fault_reset_work_q_name
,
261 sizeof(ioc
->fault_reset_work_q_name
), "poll_%s%d_status",
262 ioc
->driver_name
, ioc
->id
);
263 ioc
->fault_reset_work_q
=
264 create_singlethread_workqueue(ioc
->fault_reset_work_q_name
);
265 if (!ioc
->fault_reset_work_q
) {
266 pr_err(MPT3SAS_FMT
"%s: failed (line=%d)\n",
267 ioc
->name
, __func__
, __LINE__
);
270 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
271 if (ioc
->fault_reset_work_q
)
272 queue_delayed_work(ioc
->fault_reset_work_q
,
273 &ioc
->fault_reset_work
,
274 msecs_to_jiffies(FAULT_POLLING_INTERVAL
));
275 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
279 * mpt3sas_base_stop_watchdog - stop the fault_reset_work_q
280 * @ioc: per adapter object
286 mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER
*ioc
)
289 struct workqueue_struct
*wq
;
291 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
292 wq
= ioc
->fault_reset_work_q
;
293 ioc
->fault_reset_work_q
= NULL
;
294 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
296 if (!cancel_delayed_work_sync(&ioc
->fault_reset_work
))
298 destroy_workqueue(wq
);
303 * mpt3sas_base_fault_info - verbose translation of firmware FAULT code
304 * @ioc: per adapter object
305 * @fault_code: fault code
310 mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER
*ioc
, u16 fault_code
)
312 pr_err(MPT3SAS_FMT
"fault_state(0x%04x)!\n",
313 ioc
->name
, fault_code
);
317 * mpt3sas_halt_firmware - halt's mpt controller firmware
318 * @ioc: per adapter object
320 * For debugging timeout related issues. Writing 0xCOFFEE00
321 * to the doorbell register will halt controller firmware. With
322 * the purpose to stop both driver and firmware, the enduser can
323 * obtain a ring buffer from controller UART.
326 mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER
*ioc
)
330 if (!ioc
->fwfault_debug
)
335 doorbell
= readl(&ioc
->chip
->Doorbell
);
336 if ((doorbell
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_FAULT
)
337 mpt3sas_base_fault_info(ioc
, doorbell
);
339 writel(0xC0FFEE00, &ioc
->chip
->Doorbell
);
340 pr_err(MPT3SAS_FMT
"Firmware is halted due to command timeout\n",
344 if (ioc
->fwfault_debug
== 2)
348 panic("panic in %s\n", __func__
);
352 * _base_sas_ioc_info - verbose translation of the ioc status
353 * @ioc: per adapter object
354 * @mpi_reply: reply mf payload returned from firmware
355 * @request_hdr: request mf
360 _base_sas_ioc_info(struct MPT3SAS_ADAPTER
*ioc
, MPI2DefaultReply_t
*mpi_reply
,
361 MPI2RequestHeader_t
*request_hdr
)
363 u16 ioc_status
= le16_to_cpu(mpi_reply
->IOCStatus
) &
367 char *func_str
= NULL
;
369 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
370 if (request_hdr
->Function
== MPI2_FUNCTION_SCSI_IO_REQUEST
||
371 request_hdr
->Function
== MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH
||
372 request_hdr
->Function
== MPI2_FUNCTION_EVENT_NOTIFICATION
)
375 if (ioc_status
== MPI2_IOCSTATUS_CONFIG_INVALID_PAGE
)
378 switch (ioc_status
) {
380 /****************************************************************************
381 * Common IOCStatus values for all replies
382 ****************************************************************************/
384 case MPI2_IOCSTATUS_INVALID_FUNCTION
:
385 desc
= "invalid function";
387 case MPI2_IOCSTATUS_BUSY
:
390 case MPI2_IOCSTATUS_INVALID_SGL
:
391 desc
= "invalid sgl";
393 case MPI2_IOCSTATUS_INTERNAL_ERROR
:
394 desc
= "internal error";
396 case MPI2_IOCSTATUS_INVALID_VPID
:
397 desc
= "invalid vpid";
399 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES
:
400 desc
= "insufficient resources";
402 case MPI2_IOCSTATUS_INSUFFICIENT_POWER
:
403 desc
= "insufficient power";
405 case MPI2_IOCSTATUS_INVALID_FIELD
:
406 desc
= "invalid field";
408 case MPI2_IOCSTATUS_INVALID_STATE
:
409 desc
= "invalid state";
411 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED
:
412 desc
= "op state not supported";
415 /****************************************************************************
416 * Config IOCStatus values
417 ****************************************************************************/
419 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION
:
420 desc
= "config invalid action";
422 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE
:
423 desc
= "config invalid type";
425 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE
:
426 desc
= "config invalid page";
428 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA
:
429 desc
= "config invalid data";
431 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS
:
432 desc
= "config no defaults";
434 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT
:
435 desc
= "config cant commit";
438 /****************************************************************************
440 ****************************************************************************/
442 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR
:
443 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE
:
444 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE
:
445 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN
:
446 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN
:
447 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR
:
448 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR
:
449 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED
:
450 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH
:
451 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED
:
452 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED
:
453 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED
:
456 /****************************************************************************
457 * For use by SCSI Initiator and SCSI Target end-to-end data protection
458 ****************************************************************************/
460 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR
:
461 desc
= "eedp guard error";
463 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR
:
464 desc
= "eedp ref tag error";
466 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR
:
467 desc
= "eedp app tag error";
470 /****************************************************************************
472 ****************************************************************************/
474 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX
:
475 desc
= "target invalid io index";
477 case MPI2_IOCSTATUS_TARGET_ABORTED
:
478 desc
= "target aborted";
480 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE
:
481 desc
= "target no conn retryable";
483 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION
:
484 desc
= "target no connection";
486 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH
:
487 desc
= "target xfer count mismatch";
489 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR
:
490 desc
= "target data offset error";
492 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA
:
493 desc
= "target too much write data";
495 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT
:
496 desc
= "target iu too short";
498 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT
:
499 desc
= "target ack nak timeout";
501 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED
:
502 desc
= "target nak received";
505 /****************************************************************************
506 * Serial Attached SCSI values
507 ****************************************************************************/
509 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED
:
510 desc
= "smp request failed";
512 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN
:
513 desc
= "smp data overrun";
516 /****************************************************************************
517 * Diagnostic Buffer Post / Diagnostic Release values
518 ****************************************************************************/
520 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED
:
521 desc
= "diagnostic released";
530 switch (request_hdr
->Function
) {
531 case MPI2_FUNCTION_CONFIG
:
532 frame_sz
= sizeof(Mpi2ConfigRequest_t
) + ioc
->sge_size
;
533 func_str
= "config_page";
535 case MPI2_FUNCTION_SCSI_TASK_MGMT
:
536 frame_sz
= sizeof(Mpi2SCSITaskManagementRequest_t
);
537 func_str
= "task_mgmt";
539 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL
:
540 frame_sz
= sizeof(Mpi2SasIoUnitControlRequest_t
);
541 func_str
= "sas_iounit_ctl";
543 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR
:
544 frame_sz
= sizeof(Mpi2SepRequest_t
);
545 func_str
= "enclosure";
547 case MPI2_FUNCTION_IOC_INIT
:
548 frame_sz
= sizeof(Mpi2IOCInitRequest_t
);
549 func_str
= "ioc_init";
551 case MPI2_FUNCTION_PORT_ENABLE
:
552 frame_sz
= sizeof(Mpi2PortEnableRequest_t
);
553 func_str
= "port_enable";
555 case MPI2_FUNCTION_SMP_PASSTHROUGH
:
556 frame_sz
= sizeof(Mpi2SmpPassthroughRequest_t
) + ioc
->sge_size
;
557 func_str
= "smp_passthru";
561 func_str
= "unknown";
565 pr_warn(MPT3SAS_FMT
"ioc_status: %s(0x%04x), request(0x%p),(%s)\n",
566 ioc
->name
, desc
, ioc_status
, request_hdr
, func_str
);
568 _debug_dump_mf(request_hdr
, frame_sz
/4);
572 * _base_display_event_data - verbose translation of firmware asyn events
573 * @ioc: per adapter object
574 * @mpi_reply: reply mf payload returned from firmware
579 _base_display_event_data(struct MPT3SAS_ADAPTER
*ioc
,
580 Mpi2EventNotificationReply_t
*mpi_reply
)
585 if (!(ioc
->logging_level
& MPT_DEBUG_EVENTS
))
588 event
= le16_to_cpu(mpi_reply
->Event
);
591 case MPI2_EVENT_LOG_DATA
:
594 case MPI2_EVENT_STATE_CHANGE
:
595 desc
= "Status Change";
597 case MPI2_EVENT_HARD_RESET_RECEIVED
:
598 desc
= "Hard Reset Received";
600 case MPI2_EVENT_EVENT_CHANGE
:
601 desc
= "Event Change";
603 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE
:
604 desc
= "Device Status Change";
606 case MPI2_EVENT_IR_OPERATION_STATUS
:
607 if (!ioc
->hide_ir_msg
)
608 desc
= "IR Operation Status";
610 case MPI2_EVENT_SAS_DISCOVERY
:
612 Mpi2EventDataSasDiscovery_t
*event_data
=
613 (Mpi2EventDataSasDiscovery_t
*)mpi_reply
->EventData
;
614 pr_info(MPT3SAS_FMT
"Discovery: (%s)", ioc
->name
,
615 (event_data
->ReasonCode
== MPI2_EVENT_SAS_DISC_RC_STARTED
) ?
617 if (event_data
->DiscoveryStatus
)
618 pr_info("discovery_status(0x%08x)",
619 le32_to_cpu(event_data
->DiscoveryStatus
));
623 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE
:
624 desc
= "SAS Broadcast Primitive";
626 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE
:
627 desc
= "SAS Init Device Status Change";
629 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW
:
630 desc
= "SAS Init Table Overflow";
632 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST
:
633 desc
= "SAS Topology Change List";
635 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE
:
636 desc
= "SAS Enclosure Device Status Change";
638 case MPI2_EVENT_IR_VOLUME
:
639 if (!ioc
->hide_ir_msg
)
642 case MPI2_EVENT_IR_PHYSICAL_DISK
:
643 if (!ioc
->hide_ir_msg
)
644 desc
= "IR Physical Disk";
646 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST
:
647 if (!ioc
->hide_ir_msg
)
648 desc
= "IR Configuration Change List";
650 case MPI2_EVENT_LOG_ENTRY_ADDED
:
651 if (!ioc
->hide_ir_msg
)
652 desc
= "Log Entry Added";
654 case MPI2_EVENT_TEMP_THRESHOLD
:
655 desc
= "Temperature Threshold";
657 case MPI2_EVENT_ACTIVE_CABLE_EXCEPTION
:
658 desc
= "Active cable exception";
665 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
, desc
);
669 * _base_sas_log_info - verbose translation of firmware log info
670 * @ioc: per adapter object
671 * @log_info: log info
676 _base_sas_log_info(struct MPT3SAS_ADAPTER
*ioc
, u32 log_info
)
687 union loginfo_type sas_loginfo
;
688 char *originator_str
= NULL
;
690 sas_loginfo
.loginfo
= log_info
;
691 if (sas_loginfo
.dw
.bus_type
!= 3 /*SAS*/)
694 /* each nexus loss loginfo */
695 if (log_info
== 0x31170000)
698 /* eat the loginfos associated with task aborts */
699 if (ioc
->ignore_loginfos
&& (log_info
== 0x30050000 || log_info
==
700 0x31140000 || log_info
== 0x31130000))
703 switch (sas_loginfo
.dw
.originator
) {
705 originator_str
= "IOP";
708 originator_str
= "PL";
711 if (!ioc
->hide_ir_msg
)
712 originator_str
= "IR";
714 originator_str
= "WarpDrive";
719 "log_info(0x%08x): originator(%s), code(0x%02x), sub_code(0x%04x)\n",
721 originator_str
, sas_loginfo
.dw
.code
,
722 sas_loginfo
.dw
.subcode
);
726 * _base_display_reply_info -
727 * @ioc: per adapter object
728 * @smid: system request message index
729 * @msix_index: MSIX table index supplied by the OS
730 * @reply: reply message frame(lower 32bit addr)
735 _base_display_reply_info(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
, u8 msix_index
,
738 MPI2DefaultReply_t
*mpi_reply
;
742 mpi_reply
= mpt3sas_base_get_reply_virt_addr(ioc
, reply
);
743 if (unlikely(!mpi_reply
)) {
744 pr_err(MPT3SAS_FMT
"mpi_reply not valid at %s:%d/%s()!\n",
745 ioc
->name
, __FILE__
, __LINE__
, __func__
);
748 ioc_status
= le16_to_cpu(mpi_reply
->IOCStatus
);
750 if ((ioc_status
& MPI2_IOCSTATUS_MASK
) &&
751 (ioc
->logging_level
& MPT_DEBUG_REPLY
)) {
752 _base_sas_ioc_info(ioc
, mpi_reply
,
753 mpt3sas_base_get_msg_frame(ioc
, smid
));
756 if (ioc_status
& MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE
) {
757 loginfo
= le32_to_cpu(mpi_reply
->IOCLogInfo
);
758 _base_sas_log_info(ioc
, loginfo
);
761 if (ioc_status
|| loginfo
) {
762 ioc_status
&= MPI2_IOCSTATUS_MASK
;
763 mpt3sas_trigger_mpi(ioc
, ioc_status
, loginfo
);
768 * mpt3sas_base_done - base internal command completion routine
769 * @ioc: per adapter object
770 * @smid: system request message index
771 * @msix_index: MSIX table index supplied by the OS
772 * @reply: reply message frame(lower 32bit addr)
774 * Return 1 meaning mf should be freed from _base_interrupt
775 * 0 means the mf is freed from this function.
778 mpt3sas_base_done(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
, u8 msix_index
,
781 MPI2DefaultReply_t
*mpi_reply
;
783 mpi_reply
= mpt3sas_base_get_reply_virt_addr(ioc
, reply
);
784 if (mpi_reply
&& mpi_reply
->Function
== MPI2_FUNCTION_EVENT_ACK
)
785 return mpt3sas_check_for_pending_internal_cmds(ioc
, smid
);
787 if (ioc
->base_cmds
.status
== MPT3_CMD_NOT_USED
)
790 ioc
->base_cmds
.status
|= MPT3_CMD_COMPLETE
;
792 ioc
->base_cmds
.status
|= MPT3_CMD_REPLY_VALID
;
793 memcpy(ioc
->base_cmds
.reply
, mpi_reply
, mpi_reply
->MsgLength
*4);
795 ioc
->base_cmds
.status
&= ~MPT3_CMD_PENDING
;
797 complete(&ioc
->base_cmds
.done
);
802 * _base_async_event - main callback handler for firmware asyn events
803 * @ioc: per adapter object
804 * @msix_index: MSIX table index supplied by the OS
805 * @reply: reply message frame(lower 32bit addr)
807 * Return 1 meaning mf should be freed from _base_interrupt
808 * 0 means the mf is freed from this function.
811 _base_async_event(struct MPT3SAS_ADAPTER
*ioc
, u8 msix_index
, u32 reply
)
813 Mpi2EventNotificationReply_t
*mpi_reply
;
814 Mpi2EventAckRequest_t
*ack_request
;
816 struct _event_ack_list
*delayed_event_ack
;
818 mpi_reply
= mpt3sas_base_get_reply_virt_addr(ioc
, reply
);
821 if (mpi_reply
->Function
!= MPI2_FUNCTION_EVENT_NOTIFICATION
)
824 _base_display_event_data(ioc
, mpi_reply
);
826 if (!(mpi_reply
->AckRequired
& MPI2_EVENT_NOTIFICATION_ACK_REQUIRED
))
828 smid
= mpt3sas_base_get_smid(ioc
, ioc
->base_cb_idx
);
830 delayed_event_ack
= kzalloc(sizeof(*delayed_event_ack
),
832 if (!delayed_event_ack
)
834 INIT_LIST_HEAD(&delayed_event_ack
->list
);
835 delayed_event_ack
->Event
= mpi_reply
->Event
;
836 delayed_event_ack
->EventContext
= mpi_reply
->EventContext
;
837 list_add_tail(&delayed_event_ack
->list
,
838 &ioc
->delayed_event_ack_list
);
839 dewtprintk(ioc
, pr_info(MPT3SAS_FMT
840 "DELAYED: EVENT ACK: event (0x%04x)\n",
841 ioc
->name
, le16_to_cpu(mpi_reply
->Event
)));
845 ack_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
846 memset(ack_request
, 0, sizeof(Mpi2EventAckRequest_t
));
847 ack_request
->Function
= MPI2_FUNCTION_EVENT_ACK
;
848 ack_request
->Event
= mpi_reply
->Event
;
849 ack_request
->EventContext
= mpi_reply
->EventContext
;
850 ack_request
->VF_ID
= 0; /* TODO */
851 ack_request
->VP_ID
= 0;
852 ioc
->put_smid_default(ioc
, smid
);
856 /* scsih callback handler */
857 mpt3sas_scsih_event_callback(ioc
, msix_index
, reply
);
859 /* ctl callback handler */
860 mpt3sas_ctl_event_callback(ioc
, msix_index
, reply
);
866 * _base_get_cb_idx - obtain the callback index
867 * @ioc: per adapter object
868 * @smid: system request message index
870 * Return callback index.
873 _base_get_cb_idx(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
878 if (smid
< ioc
->hi_priority_smid
) {
880 cb_idx
= ioc
->scsi_lookup
[i
].cb_idx
;
881 } else if (smid
< ioc
->internal_smid
) {
882 i
= smid
- ioc
->hi_priority_smid
;
883 cb_idx
= ioc
->hpr_lookup
[i
].cb_idx
;
884 } else if (smid
<= ioc
->hba_queue_depth
) {
885 i
= smid
- ioc
->internal_smid
;
886 cb_idx
= ioc
->internal_lookup
[i
].cb_idx
;
893 * _base_mask_interrupts - disable interrupts
894 * @ioc: per adapter object
896 * Disabling ResetIRQ, Reply and Doorbell Interrupts
901 _base_mask_interrupts(struct MPT3SAS_ADAPTER
*ioc
)
905 ioc
->mask_interrupts
= 1;
906 him_register
= readl(&ioc
->chip
->HostInterruptMask
);
907 him_register
|= MPI2_HIM_DIM
+ MPI2_HIM_RIM
+ MPI2_HIM_RESET_IRQ_MASK
;
908 writel(him_register
, &ioc
->chip
->HostInterruptMask
);
909 readl(&ioc
->chip
->HostInterruptMask
);
913 * _base_unmask_interrupts - enable interrupts
914 * @ioc: per adapter object
916 * Enabling only Reply Interrupts
921 _base_unmask_interrupts(struct MPT3SAS_ADAPTER
*ioc
)
925 him_register
= readl(&ioc
->chip
->HostInterruptMask
);
926 him_register
&= ~MPI2_HIM_RIM
;
927 writel(him_register
, &ioc
->chip
->HostInterruptMask
);
928 ioc
->mask_interrupts
= 0;
931 union reply_descriptor
{
940 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
941 * @irq: irq number (not used)
942 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
943 * @r: pt_regs pointer (not used)
945 * Return IRQ_HANDLE if processed, else IRQ_NONE.
948 _base_interrupt(int irq
, void *bus_id
)
950 struct adapter_reply_queue
*reply_q
= bus_id
;
951 union reply_descriptor rd
;
953 u8 request_desript_type
;
957 u8 msix_index
= reply_q
->msix_index
;
958 struct MPT3SAS_ADAPTER
*ioc
= reply_q
->ioc
;
959 Mpi2ReplyDescriptorsUnion_t
*rpf
;
962 if (ioc
->mask_interrupts
)
965 if (!atomic_add_unless(&reply_q
->busy
, 1, 1))
968 rpf
= &reply_q
->reply_post_free
[reply_q
->reply_post_host_index
];
969 request_desript_type
= rpf
->Default
.ReplyFlags
970 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK
;
971 if (request_desript_type
== MPI2_RPY_DESCRIPT_FLAGS_UNUSED
) {
972 atomic_dec(&reply_q
->busy
);
979 rd
.word
= le64_to_cpu(rpf
->Words
);
980 if (rd
.u
.low
== UINT_MAX
|| rd
.u
.high
== UINT_MAX
)
983 smid
= le16_to_cpu(rpf
->Default
.DescriptorTypeDependent1
);
984 if (request_desript_type
==
985 MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS
||
986 request_desript_type
==
987 MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS
) {
988 cb_idx
= _base_get_cb_idx(ioc
, smid
);
989 if ((likely(cb_idx
< MPT_MAX_CALLBACKS
)) &&
990 (likely(mpt_callbacks
[cb_idx
] != NULL
))) {
991 rc
= mpt_callbacks
[cb_idx
](ioc
, smid
,
994 mpt3sas_base_free_smid(ioc
, smid
);
996 } else if (request_desript_type
==
997 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY
) {
999 rpf
->AddressReply
.ReplyFrameAddress
);
1000 if (reply
> ioc
->reply_dma_max_address
||
1001 reply
< ioc
->reply_dma_min_address
)
1004 cb_idx
= _base_get_cb_idx(ioc
, smid
);
1005 if ((likely(cb_idx
< MPT_MAX_CALLBACKS
)) &&
1006 (likely(mpt_callbacks
[cb_idx
] != NULL
))) {
1007 rc
= mpt_callbacks
[cb_idx
](ioc
, smid
,
1010 _base_display_reply_info(ioc
,
1011 smid
, msix_index
, reply
);
1013 mpt3sas_base_free_smid(ioc
,
1017 _base_async_event(ioc
, msix_index
, reply
);
1020 /* reply free queue handling */
1022 ioc
->reply_free_host_index
=
1023 (ioc
->reply_free_host_index
==
1024 (ioc
->reply_free_queue_depth
- 1)) ?
1025 0 : ioc
->reply_free_host_index
+ 1;
1026 ioc
->reply_free
[ioc
->reply_free_host_index
] =
1029 writel(ioc
->reply_free_host_index
,
1030 &ioc
->chip
->ReplyFreeHostIndex
);
1034 rpf
->Words
= cpu_to_le64(ULLONG_MAX
);
1035 reply_q
->reply_post_host_index
=
1036 (reply_q
->reply_post_host_index
==
1037 (ioc
->reply_post_queue_depth
- 1)) ? 0 :
1038 reply_q
->reply_post_host_index
+ 1;
1039 request_desript_type
=
1040 reply_q
->reply_post_free
[reply_q
->reply_post_host_index
].
1041 Default
.ReplyFlags
& MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK
;
1043 if (request_desript_type
== MPI2_RPY_DESCRIPT_FLAGS_UNUSED
)
1045 if (!reply_q
->reply_post_host_index
)
1046 rpf
= reply_q
->reply_post_free
;
1053 if (!completed_cmds
) {
1054 atomic_dec(&reply_q
->busy
);
1059 if (ioc
->is_warpdrive
) {
1060 writel(reply_q
->reply_post_host_index
,
1061 ioc
->reply_post_host_index
[msix_index
]);
1062 atomic_dec(&reply_q
->busy
);
1066 /* Update Reply Post Host Index.
1067 * For those HBA's which support combined reply queue feature
1068 * 1. Get the correct Supplemental Reply Post Host Index Register.
1069 * i.e. (msix_index / 8)th entry from Supplemental Reply Post Host
1070 * Index Register address bank i.e replyPostRegisterIndex[],
1071 * 2. Then update this register with new reply host index value
1072 * in ReplyPostIndex field and the MSIxIndex field with
1073 * msix_index value reduced to a value between 0 and 7,
1074 * using a modulo 8 operation. Since each Supplemental Reply Post
1075 * Host Index Register supports 8 MSI-X vectors.
1077 * For other HBA's just update the Reply Post Host Index register with
1078 * new reply host index value in ReplyPostIndex Field and msix_index
1079 * value in MSIxIndex field.
1081 if (ioc
->combined_reply_queue
)
1082 writel(reply_q
->reply_post_host_index
| ((msix_index
& 7) <<
1083 MPI2_RPHI_MSIX_INDEX_SHIFT
),
1084 ioc
->replyPostRegisterIndex
[msix_index
/8]);
1086 writel(reply_q
->reply_post_host_index
| (msix_index
<<
1087 MPI2_RPHI_MSIX_INDEX_SHIFT
),
1088 &ioc
->chip
->ReplyPostHostIndex
);
1089 atomic_dec(&reply_q
->busy
);
1094 * _base_is_controller_msix_enabled - is controller support muli-reply queues
1095 * @ioc: per adapter object
1099 _base_is_controller_msix_enabled(struct MPT3SAS_ADAPTER
*ioc
)
1101 return (ioc
->facts
.IOCCapabilities
&
1102 MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX
) && ioc
->msix_enable
;
1106 * mpt3sas_base_sync_reply_irqs - flush pending MSIX interrupts
1107 * @ioc: per adapter object
1108 * Context: non ISR conext
1110 * Called when a Task Management request has completed.
1115 mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER
*ioc
)
1117 struct adapter_reply_queue
*reply_q
;
1119 /* If MSIX capability is turned off
1120 * then multi-queues are not enabled
1122 if (!_base_is_controller_msix_enabled(ioc
))
1125 list_for_each_entry(reply_q
, &ioc
->reply_queue_list
, list
) {
1126 if (ioc
->shost_recovery
|| ioc
->remove_host
||
1127 ioc
->pci_error_recovery
)
1129 /* TMs are on msix_index == 0 */
1130 if (reply_q
->msix_index
== 0)
1132 synchronize_irq(reply_q
->vector
);
1137 * mpt3sas_base_release_callback_handler - clear interrupt callback handler
1138 * @cb_idx: callback index
1143 mpt3sas_base_release_callback_handler(u8 cb_idx
)
1145 mpt_callbacks
[cb_idx
] = NULL
;
1149 * mpt3sas_base_register_callback_handler - obtain index for the interrupt callback handler
1150 * @cb_func: callback function
1155 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func
)
1159 for (cb_idx
= MPT_MAX_CALLBACKS
-1; cb_idx
; cb_idx
--)
1160 if (mpt_callbacks
[cb_idx
] == NULL
)
1163 mpt_callbacks
[cb_idx
] = cb_func
;
1168 * mpt3sas_base_initialize_callback_handler - initialize the interrupt callback handler
1173 mpt3sas_base_initialize_callback_handler(void)
1177 for (cb_idx
= 0; cb_idx
< MPT_MAX_CALLBACKS
; cb_idx
++)
1178 mpt3sas_base_release_callback_handler(cb_idx
);
1183 * _base_build_zero_len_sge - build zero length sg entry
1184 * @ioc: per adapter object
1185 * @paddr: virtual address for SGE
1187 * Create a zero length scatter gather entry to insure the IOCs hardware has
1188 * something to use if the target device goes brain dead and tries
1189 * to send data even when none is asked for.
1194 _base_build_zero_len_sge(struct MPT3SAS_ADAPTER
*ioc
, void *paddr
)
1196 u32 flags_length
= (u32
)((MPI2_SGE_FLAGS_LAST_ELEMENT
|
1197 MPI2_SGE_FLAGS_END_OF_BUFFER
| MPI2_SGE_FLAGS_END_OF_LIST
|
1198 MPI2_SGE_FLAGS_SIMPLE_ELEMENT
) <<
1199 MPI2_SGE_FLAGS_SHIFT
);
1200 ioc
->base_add_sg_single(paddr
, flags_length
, -1);
1204 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
1205 * @paddr: virtual address for SGE
1206 * @flags_length: SGE flags and data transfer length
1207 * @dma_addr: Physical address
1212 _base_add_sg_single_32(void *paddr
, u32 flags_length
, dma_addr_t dma_addr
)
1214 Mpi2SGESimple32_t
*sgel
= paddr
;
1216 flags_length
|= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING
|
1217 MPI2_SGE_FLAGS_SYSTEM_ADDRESS
) << MPI2_SGE_FLAGS_SHIFT
;
1218 sgel
->FlagsLength
= cpu_to_le32(flags_length
);
1219 sgel
->Address
= cpu_to_le32(dma_addr
);
1224 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1225 * @paddr: virtual address for SGE
1226 * @flags_length: SGE flags and data transfer length
1227 * @dma_addr: Physical address
1232 _base_add_sg_single_64(void *paddr
, u32 flags_length
, dma_addr_t dma_addr
)
1234 Mpi2SGESimple64_t
*sgel
= paddr
;
1236 flags_length
|= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING
|
1237 MPI2_SGE_FLAGS_SYSTEM_ADDRESS
) << MPI2_SGE_FLAGS_SHIFT
;
1238 sgel
->FlagsLength
= cpu_to_le32(flags_length
);
1239 sgel
->Address
= cpu_to_le64(dma_addr
);
1243 * _base_get_chain_buffer_tracker - obtain chain tracker
1244 * @ioc: per adapter object
1245 * @smid: smid associated to an IO request
1247 * Returns chain tracker(from ioc->free_chain_list)
1249 static struct chain_tracker
*
1250 _base_get_chain_buffer_tracker(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
1252 struct chain_tracker
*chain_req
;
1253 unsigned long flags
;
1255 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
1256 if (list_empty(&ioc
->free_chain_list
)) {
1257 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
1258 dfailprintk(ioc
, pr_warn(MPT3SAS_FMT
1259 "chain buffers not available\n", ioc
->name
));
1262 chain_req
= list_entry(ioc
->free_chain_list
.next
,
1263 struct chain_tracker
, tracker_list
);
1264 list_del_init(&chain_req
->tracker_list
);
1265 list_add_tail(&chain_req
->tracker_list
,
1266 &ioc
->scsi_lookup
[smid
- 1].chain_list
);
1267 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
1273 * _base_build_sg - build generic sg
1274 * @ioc: per adapter object
1275 * @psge: virtual address for SGE
1276 * @data_out_dma: physical address for WRITES
1277 * @data_out_sz: data xfer size for WRITES
1278 * @data_in_dma: physical address for READS
1279 * @data_in_sz: data xfer size for READS
1284 _base_build_sg(struct MPT3SAS_ADAPTER
*ioc
, void *psge
,
1285 dma_addr_t data_out_dma
, size_t data_out_sz
, dma_addr_t data_in_dma
,
1290 if (!data_out_sz
&& !data_in_sz
) {
1291 _base_build_zero_len_sge(ioc
, psge
);
1295 if (data_out_sz
&& data_in_sz
) {
1296 /* WRITE sgel first */
1297 sgl_flags
= (MPI2_SGE_FLAGS_SIMPLE_ELEMENT
|
1298 MPI2_SGE_FLAGS_END_OF_BUFFER
| MPI2_SGE_FLAGS_HOST_TO_IOC
);
1299 sgl_flags
= sgl_flags
<< MPI2_SGE_FLAGS_SHIFT
;
1300 ioc
->base_add_sg_single(psge
, sgl_flags
|
1301 data_out_sz
, data_out_dma
);
1304 psge
+= ioc
->sge_size
;
1306 /* READ sgel last */
1307 sgl_flags
= (MPI2_SGE_FLAGS_SIMPLE_ELEMENT
|
1308 MPI2_SGE_FLAGS_LAST_ELEMENT
| MPI2_SGE_FLAGS_END_OF_BUFFER
|
1309 MPI2_SGE_FLAGS_END_OF_LIST
);
1310 sgl_flags
= sgl_flags
<< MPI2_SGE_FLAGS_SHIFT
;
1311 ioc
->base_add_sg_single(psge
, sgl_flags
|
1312 data_in_sz
, data_in_dma
);
1313 } else if (data_out_sz
) /* WRITE */ {
1314 sgl_flags
= (MPI2_SGE_FLAGS_SIMPLE_ELEMENT
|
1315 MPI2_SGE_FLAGS_LAST_ELEMENT
| MPI2_SGE_FLAGS_END_OF_BUFFER
|
1316 MPI2_SGE_FLAGS_END_OF_LIST
| MPI2_SGE_FLAGS_HOST_TO_IOC
);
1317 sgl_flags
= sgl_flags
<< MPI2_SGE_FLAGS_SHIFT
;
1318 ioc
->base_add_sg_single(psge
, sgl_flags
|
1319 data_out_sz
, data_out_dma
);
1320 } else if (data_in_sz
) /* READ */ {
1321 sgl_flags
= (MPI2_SGE_FLAGS_SIMPLE_ELEMENT
|
1322 MPI2_SGE_FLAGS_LAST_ELEMENT
| MPI2_SGE_FLAGS_END_OF_BUFFER
|
1323 MPI2_SGE_FLAGS_END_OF_LIST
);
1324 sgl_flags
= sgl_flags
<< MPI2_SGE_FLAGS_SHIFT
;
1325 ioc
->base_add_sg_single(psge
, sgl_flags
|
1326 data_in_sz
, data_in_dma
);
1330 /* IEEE format sgls */
1333 * _base_add_sg_single_ieee - add sg element for IEEE format
1334 * @paddr: virtual address for SGE
1336 * @chain_offset: number of 128 byte elements from start of segment
1337 * @length: data transfer length
1338 * @dma_addr: Physical address
1343 _base_add_sg_single_ieee(void *paddr
, u8 flags
, u8 chain_offset
, u32 length
,
1344 dma_addr_t dma_addr
)
1346 Mpi25IeeeSgeChain64_t
*sgel
= paddr
;
1348 sgel
->Flags
= flags
;
1349 sgel
->NextChainOffset
= chain_offset
;
1350 sgel
->Length
= cpu_to_le32(length
);
1351 sgel
->Address
= cpu_to_le64(dma_addr
);
1355 * _base_build_zero_len_sge_ieee - build zero length sg entry for IEEE format
1356 * @ioc: per adapter object
1357 * @paddr: virtual address for SGE
1359 * Create a zero length scatter gather entry to insure the IOCs hardware has
1360 * something to use if the target device goes brain dead and tries
1361 * to send data even when none is asked for.
1366 _base_build_zero_len_sge_ieee(struct MPT3SAS_ADAPTER
*ioc
, void *paddr
)
1368 u8 sgl_flags
= (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT
|
1369 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
|
1370 MPI25_IEEE_SGE_FLAGS_END_OF_LIST
);
1372 _base_add_sg_single_ieee(paddr
, sgl_flags
, 0, 0, -1);
1376 * _base_build_sg_scmd - main sg creation routine
1377 * @ioc: per adapter object
1378 * @scmd: scsi command
1379 * @smid: system request message index
1382 * The main routine that builds scatter gather table from a given
1383 * scsi request sent via the .queuecommand main handler.
1385 * Returns 0 success, anything else error
1388 _base_build_sg_scmd(struct MPT3SAS_ADAPTER
*ioc
,
1389 struct scsi_cmnd
*scmd
, u16 smid
)
1391 Mpi2SCSIIORequest_t
*mpi_request
;
1392 dma_addr_t chain_dma
;
1393 struct scatterlist
*sg_scmd
;
1394 void *sg_local
, *chain
;
1399 u32 sges_in_segment
;
1401 u32 sgl_flags_last_element
;
1402 u32 sgl_flags_end_buffer
;
1403 struct chain_tracker
*chain_req
;
1405 mpi_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
1407 /* init scatter gather flags */
1408 sgl_flags
= MPI2_SGE_FLAGS_SIMPLE_ELEMENT
;
1409 if (scmd
->sc_data_direction
== DMA_TO_DEVICE
)
1410 sgl_flags
|= MPI2_SGE_FLAGS_HOST_TO_IOC
;
1411 sgl_flags_last_element
= (sgl_flags
| MPI2_SGE_FLAGS_LAST_ELEMENT
)
1412 << MPI2_SGE_FLAGS_SHIFT
;
1413 sgl_flags_end_buffer
= (sgl_flags
| MPI2_SGE_FLAGS_LAST_ELEMENT
|
1414 MPI2_SGE_FLAGS_END_OF_BUFFER
| MPI2_SGE_FLAGS_END_OF_LIST
)
1415 << MPI2_SGE_FLAGS_SHIFT
;
1416 sgl_flags
= sgl_flags
<< MPI2_SGE_FLAGS_SHIFT
;
1418 sg_scmd
= scsi_sglist(scmd
);
1419 sges_left
= scsi_dma_map(scmd
);
1420 if (sges_left
< 0) {
1421 sdev_printk(KERN_ERR
, scmd
->device
,
1422 "pci_map_sg failed: request for %d bytes!\n",
1423 scsi_bufflen(scmd
));
1427 sg_local
= &mpi_request
->SGL
;
1428 sges_in_segment
= ioc
->max_sges_in_main_message
;
1429 if (sges_left
<= sges_in_segment
)
1430 goto fill_in_last_segment
;
1432 mpi_request
->ChainOffset
= (offsetof(Mpi2SCSIIORequest_t
, SGL
) +
1433 (sges_in_segment
* ioc
->sge_size
))/4;
1435 /* fill in main message segment when there is a chain following */
1436 while (sges_in_segment
) {
1437 if (sges_in_segment
== 1)
1438 ioc
->base_add_sg_single(sg_local
,
1439 sgl_flags_last_element
| sg_dma_len(sg_scmd
),
1440 sg_dma_address(sg_scmd
));
1442 ioc
->base_add_sg_single(sg_local
, sgl_flags
|
1443 sg_dma_len(sg_scmd
), sg_dma_address(sg_scmd
));
1444 sg_scmd
= sg_next(sg_scmd
);
1445 sg_local
+= ioc
->sge_size
;
1450 /* initializing the chain flags and pointers */
1451 chain_flags
= MPI2_SGE_FLAGS_CHAIN_ELEMENT
<< MPI2_SGE_FLAGS_SHIFT
;
1452 chain_req
= _base_get_chain_buffer_tracker(ioc
, smid
);
1455 chain
= chain_req
->chain_buffer
;
1456 chain_dma
= chain_req
->chain_buffer_dma
;
1458 sges_in_segment
= (sges_left
<=
1459 ioc
->max_sges_in_chain_message
) ? sges_left
:
1460 ioc
->max_sges_in_chain_message
;
1461 chain_offset
= (sges_left
== sges_in_segment
) ?
1462 0 : (sges_in_segment
* ioc
->sge_size
)/4;
1463 chain_length
= sges_in_segment
* ioc
->sge_size
;
1465 chain_offset
= chain_offset
<<
1466 MPI2_SGE_CHAIN_OFFSET_SHIFT
;
1467 chain_length
+= ioc
->sge_size
;
1469 ioc
->base_add_sg_single(sg_local
, chain_flags
| chain_offset
|
1470 chain_length
, chain_dma
);
1473 goto fill_in_last_segment
;
1475 /* fill in chain segments */
1476 while (sges_in_segment
) {
1477 if (sges_in_segment
== 1)
1478 ioc
->base_add_sg_single(sg_local
,
1479 sgl_flags_last_element
|
1480 sg_dma_len(sg_scmd
),
1481 sg_dma_address(sg_scmd
));
1483 ioc
->base_add_sg_single(sg_local
, sgl_flags
|
1484 sg_dma_len(sg_scmd
),
1485 sg_dma_address(sg_scmd
));
1486 sg_scmd
= sg_next(sg_scmd
);
1487 sg_local
+= ioc
->sge_size
;
1492 chain_req
= _base_get_chain_buffer_tracker(ioc
, smid
);
1495 chain
= chain_req
->chain_buffer
;
1496 chain_dma
= chain_req
->chain_buffer_dma
;
1500 fill_in_last_segment
:
1502 /* fill the last segment */
1505 ioc
->base_add_sg_single(sg_local
, sgl_flags_end_buffer
|
1506 sg_dma_len(sg_scmd
), sg_dma_address(sg_scmd
));
1508 ioc
->base_add_sg_single(sg_local
, sgl_flags
|
1509 sg_dma_len(sg_scmd
), sg_dma_address(sg_scmd
));
1510 sg_scmd
= sg_next(sg_scmd
);
1511 sg_local
+= ioc
->sge_size
;
1519 * _base_build_sg_scmd_ieee - main sg creation routine for IEEE format
1520 * @ioc: per adapter object
1521 * @scmd: scsi command
1522 * @smid: system request message index
1525 * The main routine that builds scatter gather table from a given
1526 * scsi request sent via the .queuecommand main handler.
1528 * Returns 0 success, anything else error
1531 _base_build_sg_scmd_ieee(struct MPT3SAS_ADAPTER
*ioc
,
1532 struct scsi_cmnd
*scmd
, u16 smid
)
1534 Mpi2SCSIIORequest_t
*mpi_request
;
1535 dma_addr_t chain_dma
;
1536 struct scatterlist
*sg_scmd
;
1537 void *sg_local
, *chain
;
1541 u32 sges_in_segment
;
1542 u8 simple_sgl_flags
;
1543 u8 simple_sgl_flags_last
;
1545 struct chain_tracker
*chain_req
;
1547 mpi_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
1549 /* init scatter gather flags */
1550 simple_sgl_flags
= MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT
|
1551 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
;
1552 simple_sgl_flags_last
= simple_sgl_flags
|
1553 MPI25_IEEE_SGE_FLAGS_END_OF_LIST
;
1554 chain_sgl_flags
= MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT
|
1555 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
;
1557 sg_scmd
= scsi_sglist(scmd
);
1558 sges_left
= scsi_dma_map(scmd
);
1559 if (sges_left
< 0) {
1560 sdev_printk(KERN_ERR
, scmd
->device
,
1561 "pci_map_sg failed: request for %d bytes!\n",
1562 scsi_bufflen(scmd
));
1566 sg_local
= &mpi_request
->SGL
;
1567 sges_in_segment
= (ioc
->request_sz
-
1568 offsetof(Mpi2SCSIIORequest_t
, SGL
))/ioc
->sge_size_ieee
;
1569 if (sges_left
<= sges_in_segment
)
1570 goto fill_in_last_segment
;
1572 mpi_request
->ChainOffset
= (sges_in_segment
- 1 /* chain element */) +
1573 (offsetof(Mpi2SCSIIORequest_t
, SGL
)/ioc
->sge_size_ieee
);
1575 /* fill in main message segment when there is a chain following */
1576 while (sges_in_segment
> 1) {
1577 _base_add_sg_single_ieee(sg_local
, simple_sgl_flags
, 0,
1578 sg_dma_len(sg_scmd
), sg_dma_address(sg_scmd
));
1579 sg_scmd
= sg_next(sg_scmd
);
1580 sg_local
+= ioc
->sge_size_ieee
;
1585 /* initializing the pointers */
1586 chain_req
= _base_get_chain_buffer_tracker(ioc
, smid
);
1589 chain
= chain_req
->chain_buffer
;
1590 chain_dma
= chain_req
->chain_buffer_dma
;
1592 sges_in_segment
= (sges_left
<=
1593 ioc
->max_sges_in_chain_message
) ? sges_left
:
1594 ioc
->max_sges_in_chain_message
;
1595 chain_offset
= (sges_left
== sges_in_segment
) ?
1596 0 : sges_in_segment
;
1597 chain_length
= sges_in_segment
* ioc
->sge_size_ieee
;
1599 chain_length
+= ioc
->sge_size_ieee
;
1600 _base_add_sg_single_ieee(sg_local
, chain_sgl_flags
,
1601 chain_offset
, chain_length
, chain_dma
);
1605 goto fill_in_last_segment
;
1607 /* fill in chain segments */
1608 while (sges_in_segment
) {
1609 _base_add_sg_single_ieee(sg_local
, simple_sgl_flags
, 0,
1610 sg_dma_len(sg_scmd
), sg_dma_address(sg_scmd
));
1611 sg_scmd
= sg_next(sg_scmd
);
1612 sg_local
+= ioc
->sge_size_ieee
;
1617 chain_req
= _base_get_chain_buffer_tracker(ioc
, smid
);
1620 chain
= chain_req
->chain_buffer
;
1621 chain_dma
= chain_req
->chain_buffer_dma
;
1625 fill_in_last_segment
:
1627 /* fill the last segment */
1628 while (sges_left
> 0) {
1630 _base_add_sg_single_ieee(sg_local
,
1631 simple_sgl_flags_last
, 0, sg_dma_len(sg_scmd
),
1632 sg_dma_address(sg_scmd
));
1634 _base_add_sg_single_ieee(sg_local
, simple_sgl_flags
, 0,
1635 sg_dma_len(sg_scmd
), sg_dma_address(sg_scmd
));
1636 sg_scmd
= sg_next(sg_scmd
);
1637 sg_local
+= ioc
->sge_size_ieee
;
1645 * _base_build_sg_ieee - build generic sg for IEEE format
1646 * @ioc: per adapter object
1647 * @psge: virtual address for SGE
1648 * @data_out_dma: physical address for WRITES
1649 * @data_out_sz: data xfer size for WRITES
1650 * @data_in_dma: physical address for READS
1651 * @data_in_sz: data xfer size for READS
1656 _base_build_sg_ieee(struct MPT3SAS_ADAPTER
*ioc
, void *psge
,
1657 dma_addr_t data_out_dma
, size_t data_out_sz
, dma_addr_t data_in_dma
,
1662 if (!data_out_sz
&& !data_in_sz
) {
1663 _base_build_zero_len_sge_ieee(ioc
, psge
);
1667 if (data_out_sz
&& data_in_sz
) {
1668 /* WRITE sgel first */
1669 sgl_flags
= MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT
|
1670 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
;
1671 _base_add_sg_single_ieee(psge
, sgl_flags
, 0, data_out_sz
,
1675 psge
+= ioc
->sge_size_ieee
;
1677 /* READ sgel last */
1678 sgl_flags
|= MPI25_IEEE_SGE_FLAGS_END_OF_LIST
;
1679 _base_add_sg_single_ieee(psge
, sgl_flags
, 0, data_in_sz
,
1681 } else if (data_out_sz
) /* WRITE */ {
1682 sgl_flags
= MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT
|
1683 MPI25_IEEE_SGE_FLAGS_END_OF_LIST
|
1684 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
;
1685 _base_add_sg_single_ieee(psge
, sgl_flags
, 0, data_out_sz
,
1687 } else if (data_in_sz
) /* READ */ {
1688 sgl_flags
= MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT
|
1689 MPI25_IEEE_SGE_FLAGS_END_OF_LIST
|
1690 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
;
1691 _base_add_sg_single_ieee(psge
, sgl_flags
, 0, data_in_sz
,
1696 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1699 * _base_config_dma_addressing - set dma addressing
1700 * @ioc: per adapter object
1701 * @pdev: PCI device struct
1703 * Returns 0 for success, non-zero for failure.
1706 _base_config_dma_addressing(struct MPT3SAS_ADAPTER
*ioc
, struct pci_dev
*pdev
)
1709 u64 consistent_dma_mask
;
1712 consistent_dma_mask
= DMA_BIT_MASK(64);
1714 consistent_dma_mask
= DMA_BIT_MASK(32);
1716 if (sizeof(dma_addr_t
) > 4) {
1717 const uint64_t required_mask
=
1718 dma_get_required_mask(&pdev
->dev
);
1719 if ((required_mask
> DMA_BIT_MASK(32)) &&
1720 !pci_set_dma_mask(pdev
, DMA_BIT_MASK(64)) &&
1721 !pci_set_consistent_dma_mask(pdev
, consistent_dma_mask
)) {
1722 ioc
->base_add_sg_single
= &_base_add_sg_single_64
;
1723 ioc
->sge_size
= sizeof(Mpi2SGESimple64_t
);
1729 if (!pci_set_dma_mask(pdev
, DMA_BIT_MASK(32))
1730 && !pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32))) {
1731 ioc
->base_add_sg_single
= &_base_add_sg_single_32
;
1732 ioc
->sge_size
= sizeof(Mpi2SGESimple32_t
);
1740 "%d BIT PCI BUS DMA ADDRESSING SUPPORTED, total mem (%ld kB)\n",
1741 ioc
->name
, ioc
->dma_mask
, convert_to_kb(s
.totalram
));
1747 _base_change_consistent_dma_mask(struct MPT3SAS_ADAPTER
*ioc
,
1748 struct pci_dev
*pdev
)
1750 if (pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64))) {
1751 if (pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32)))
1758 * _base_check_enable_msix - checks MSIX capabable.
1759 * @ioc: per adapter object
1761 * Check to see if card is capable of MSIX, and set number
1762 * of available msix vectors
1765 _base_check_enable_msix(struct MPT3SAS_ADAPTER
*ioc
)
1768 u16 message_control
;
1770 /* Check whether controller SAS2008 B0 controller,
1771 * if it is SAS2008 B0 controller use IO-APIC instead of MSIX
1773 if (ioc
->pdev
->device
== MPI2_MFGPAGE_DEVID_SAS2008
&&
1774 ioc
->pdev
->revision
== SAS2_PCI_DEVICE_B0_REVISION
) {
1778 base
= pci_find_capability(ioc
->pdev
, PCI_CAP_ID_MSIX
);
1780 dfailprintk(ioc
, pr_info(MPT3SAS_FMT
"msix not supported\n",
1785 /* get msix vector count */
1786 /* NUMA_IO not supported for older controllers */
1787 if (ioc
->pdev
->device
== MPI2_MFGPAGE_DEVID_SAS2004
||
1788 ioc
->pdev
->device
== MPI2_MFGPAGE_DEVID_SAS2008
||
1789 ioc
->pdev
->device
== MPI2_MFGPAGE_DEVID_SAS2108_1
||
1790 ioc
->pdev
->device
== MPI2_MFGPAGE_DEVID_SAS2108_2
||
1791 ioc
->pdev
->device
== MPI2_MFGPAGE_DEVID_SAS2108_3
||
1792 ioc
->pdev
->device
== MPI2_MFGPAGE_DEVID_SAS2116_1
||
1793 ioc
->pdev
->device
== MPI2_MFGPAGE_DEVID_SAS2116_2
)
1794 ioc
->msix_vector_count
= 1;
1796 pci_read_config_word(ioc
->pdev
, base
+ 2, &message_control
);
1797 ioc
->msix_vector_count
= (message_control
& 0x3FF) + 1;
1799 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
1800 "msix is supported, vector_count(%d)\n",
1801 ioc
->name
, ioc
->msix_vector_count
));
1806 * _base_free_irq - free irq
1807 * @ioc: per adapter object
1809 * Freeing respective reply_queue from the list.
1812 _base_free_irq(struct MPT3SAS_ADAPTER
*ioc
)
1814 struct adapter_reply_queue
*reply_q
, *next
;
1816 if (list_empty(&ioc
->reply_queue_list
))
1819 list_for_each_entry_safe(reply_q
, next
, &ioc
->reply_queue_list
, list
) {
1820 list_del(&reply_q
->list
);
1821 if (smp_affinity_enable
) {
1822 irq_set_affinity_hint(reply_q
->vector
, NULL
);
1823 free_cpumask_var(reply_q
->affinity_hint
);
1825 free_irq(reply_q
->vector
, reply_q
);
1831 * _base_request_irq - request irq
1832 * @ioc: per adapter object
1833 * @index: msix index into vector table
1834 * @vector: irq vector
1836 * Inserting respective reply_queue into the list.
1839 _base_request_irq(struct MPT3SAS_ADAPTER
*ioc
, u8 index
, u32 vector
)
1841 struct adapter_reply_queue
*reply_q
;
1844 reply_q
= kzalloc(sizeof(struct adapter_reply_queue
), GFP_KERNEL
);
1846 pr_err(MPT3SAS_FMT
"unable to allocate memory %d!\n",
1847 ioc
->name
, (int)sizeof(struct adapter_reply_queue
));
1851 reply_q
->msix_index
= index
;
1852 reply_q
->vector
= vector
;
1854 if (smp_affinity_enable
) {
1855 if (!zalloc_cpumask_var(&reply_q
->affinity_hint
, GFP_KERNEL
)) {
1861 atomic_set(&reply_q
->busy
, 0);
1862 if (ioc
->msix_enable
)
1863 snprintf(reply_q
->name
, MPT_NAME_LENGTH
, "%s%d-msix%d",
1864 ioc
->driver_name
, ioc
->id
, index
);
1866 snprintf(reply_q
->name
, MPT_NAME_LENGTH
, "%s%d",
1867 ioc
->driver_name
, ioc
->id
);
1868 r
= request_irq(vector
, _base_interrupt
, IRQF_SHARED
, reply_q
->name
,
1871 pr_err(MPT3SAS_FMT
"unable to allocate interrupt %d!\n",
1872 reply_q
->name
, vector
);
1873 free_cpumask_var(reply_q
->affinity_hint
);
1878 INIT_LIST_HEAD(&reply_q
->list
);
1879 list_add_tail(&reply_q
->list
, &ioc
->reply_queue_list
);
1884 * _base_assign_reply_queues - assigning msix index for each cpu
1885 * @ioc: per adapter object
1887 * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
1889 * It would nice if we could call irq_set_affinity, however it is not
1890 * an exported symbol
1893 _base_assign_reply_queues(struct MPT3SAS_ADAPTER
*ioc
)
1895 unsigned int cpu
, nr_cpus
, nr_msix
, index
= 0;
1896 struct adapter_reply_queue
*reply_q
;
1898 if (!_base_is_controller_msix_enabled(ioc
))
1901 memset(ioc
->cpu_msix_table
, 0, ioc
->cpu_msix_table_sz
);
1903 nr_cpus
= num_online_cpus();
1904 nr_msix
= ioc
->reply_queue_count
= min(ioc
->reply_queue_count
,
1905 ioc
->facts
.MaxMSIxVectors
);
1909 cpu
= cpumask_first(cpu_online_mask
);
1911 list_for_each_entry(reply_q
, &ioc
->reply_queue_list
, list
) {
1913 unsigned int i
, group
= nr_cpus
/ nr_msix
;
1918 if (index
< nr_cpus
% nr_msix
)
1921 for (i
= 0 ; i
< group
; i
++) {
1922 ioc
->cpu_msix_table
[cpu
] = index
;
1923 if (smp_affinity_enable
)
1924 cpumask_or(reply_q
->affinity_hint
,
1925 reply_q
->affinity_hint
, get_cpu_mask(cpu
));
1926 cpu
= cpumask_next(cpu
, cpu_online_mask
);
1928 if (smp_affinity_enable
)
1929 if (irq_set_affinity_hint(reply_q
->vector
,
1930 reply_q
->affinity_hint
))
1931 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
1932 "Err setting affinity hint to irq vector %d\n",
1933 ioc
->name
, reply_q
->vector
));
1939 * _base_disable_msix - disables msix
1940 * @ioc: per adapter object
1944 _base_disable_msix(struct MPT3SAS_ADAPTER
*ioc
)
1946 if (!ioc
->msix_enable
)
1948 pci_disable_msix(ioc
->pdev
);
1949 ioc
->msix_enable
= 0;
1953 * _base_enable_msix - enables msix, failback to io_apic
1954 * @ioc: per adapter object
1958 _base_enable_msix(struct MPT3SAS_ADAPTER
*ioc
)
1960 struct msix_entry
*entries
, *a
;
1962 int i
, local_max_msix_vectors
;
1965 if (msix_disable
== -1 || msix_disable
== 0)
1971 if (_base_check_enable_msix(ioc
) != 0)
1974 ioc
->reply_queue_count
= min_t(int, ioc
->cpu_count
,
1975 ioc
->msix_vector_count
);
1977 printk(MPT3SAS_FMT
"MSI-X vectors supported: %d, no of cores"
1978 ": %d, max_msix_vectors: %d\n", ioc
->name
, ioc
->msix_vector_count
,
1979 ioc
->cpu_count
, max_msix_vectors
);
1981 if (!ioc
->rdpq_array_enable
&& max_msix_vectors
== -1)
1982 local_max_msix_vectors
= 8;
1984 local_max_msix_vectors
= max_msix_vectors
;
1986 if (local_max_msix_vectors
> 0) {
1987 ioc
->reply_queue_count
= min_t(int, local_max_msix_vectors
,
1988 ioc
->reply_queue_count
);
1989 ioc
->msix_vector_count
= ioc
->reply_queue_count
;
1990 } else if (local_max_msix_vectors
== 0)
1993 if (ioc
->msix_vector_count
< ioc
->cpu_count
)
1994 smp_affinity_enable
= 0;
1996 entries
= kcalloc(ioc
->reply_queue_count
, sizeof(struct msix_entry
),
1999 dfailprintk(ioc
, pr_info(MPT3SAS_FMT
2000 "kcalloc failed @ at %s:%d/%s() !!!\n",
2001 ioc
->name
, __FILE__
, __LINE__
, __func__
));
2005 for (i
= 0, a
= entries
; i
< ioc
->reply_queue_count
; i
++, a
++)
2008 r
= pci_enable_msix_exact(ioc
->pdev
, entries
, ioc
->reply_queue_count
);
2010 dfailprintk(ioc
, pr_info(MPT3SAS_FMT
2011 "pci_enable_msix_exact failed (r=%d) !!!\n",
2017 ioc
->msix_enable
= 1;
2018 for (i
= 0, a
= entries
; i
< ioc
->reply_queue_count
; i
++, a
++) {
2019 r
= _base_request_irq(ioc
, i
, a
->vector
);
2021 _base_free_irq(ioc
);
2022 _base_disable_msix(ioc
);
2031 /* failback to io_apic interrupt routing */
2034 ioc
->reply_queue_count
= 1;
2035 r
= _base_request_irq(ioc
, 0, ioc
->pdev
->irq
);
2041 * mpt3sas_base_unmap_resources - free controller resources
2042 * @ioc: per adapter object
2045 mpt3sas_base_unmap_resources(struct MPT3SAS_ADAPTER
*ioc
)
2047 struct pci_dev
*pdev
= ioc
->pdev
;
2049 dexitprintk(ioc
, printk(MPT3SAS_FMT
"%s\n",
2050 ioc
->name
, __func__
));
2052 _base_free_irq(ioc
);
2053 _base_disable_msix(ioc
);
2055 if (ioc
->combined_reply_queue
) {
2056 kfree(ioc
->replyPostRegisterIndex
);
2057 ioc
->replyPostRegisterIndex
= NULL
;
2060 if (ioc
->chip_phys
) {
2065 if (pci_is_enabled(pdev
)) {
2066 pci_release_selected_regions(ioc
->pdev
, ioc
->bars
);
2067 pci_disable_pcie_error_reporting(pdev
);
2068 pci_disable_device(pdev
);
2073 * mpt3sas_base_map_resources - map in controller resources (io/irq/memap)
2074 * @ioc: per adapter object
2076 * Returns 0 for success, non-zero for failure.
2079 mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER
*ioc
)
2081 struct pci_dev
*pdev
= ioc
->pdev
;
2087 struct adapter_reply_queue
*reply_q
;
2089 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n",
2090 ioc
->name
, __func__
));
2092 ioc
->bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2093 if (pci_enable_device_mem(pdev
)) {
2094 pr_warn(MPT3SAS_FMT
"pci_enable_device_mem: failed\n",
2101 if (pci_request_selected_regions(pdev
, ioc
->bars
,
2102 ioc
->driver_name
)) {
2103 pr_warn(MPT3SAS_FMT
"pci_request_selected_regions: failed\n",
2110 /* AER (Advanced Error Reporting) hooks */
2111 pci_enable_pcie_error_reporting(pdev
);
2113 pci_set_master(pdev
);
2116 if (_base_config_dma_addressing(ioc
, pdev
) != 0) {
2117 pr_warn(MPT3SAS_FMT
"no suitable DMA mask for %s\n",
2118 ioc
->name
, pci_name(pdev
));
2123 for (i
= 0, memap_sz
= 0, pio_sz
= 0; (i
< DEVICE_COUNT_RESOURCE
) &&
2124 (!memap_sz
|| !pio_sz
); i
++) {
2125 if (pci_resource_flags(pdev
, i
) & IORESOURCE_IO
) {
2128 pio_chip
= (u64
)pci_resource_start(pdev
, i
);
2129 pio_sz
= pci_resource_len(pdev
, i
);
2130 } else if (pci_resource_flags(pdev
, i
) & IORESOURCE_MEM
) {
2133 ioc
->chip_phys
= pci_resource_start(pdev
, i
);
2134 chip_phys
= (u64
)ioc
->chip_phys
;
2135 memap_sz
= pci_resource_len(pdev
, i
);
2136 ioc
->chip
= ioremap(ioc
->chip_phys
, memap_sz
);
2140 if (ioc
->chip
== NULL
) {
2141 pr_err(MPT3SAS_FMT
"unable to map adapter memory! "
2142 " or resource not found\n", ioc
->name
);
2147 _base_mask_interrupts(ioc
);
2149 r
= _base_get_ioc_facts(ioc
);
2153 if (!ioc
->rdpq_array_enable_assigned
) {
2154 ioc
->rdpq_array_enable
= ioc
->rdpq_array_capable
;
2155 ioc
->rdpq_array_enable_assigned
= 1;
2158 r
= _base_enable_msix(ioc
);
2162 /* Use the Combined reply queue feature only for SAS3 C0 & higher
2163 * revision HBAs and also only when reply queue count is greater than 8
2165 if (ioc
->combined_reply_queue
&& ioc
->reply_queue_count
> 8) {
2166 /* Determine the Supplemental Reply Post Host Index Registers
2167 * Addresse. Supplemental Reply Post Host Index Registers
2168 * starts at offset MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET and
2169 * each register is at offset bytes of
2170 * MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET from previous one.
2172 ioc
->replyPostRegisterIndex
= kcalloc(
2173 ioc
->combined_reply_index_count
,
2174 sizeof(resource_size_t
*), GFP_KERNEL
);
2175 if (!ioc
->replyPostRegisterIndex
) {
2176 dfailprintk(ioc
, printk(MPT3SAS_FMT
2177 "allocation for reply Post Register Index failed!!!\n",
2183 for (i
= 0; i
< ioc
->combined_reply_index_count
; i
++) {
2184 ioc
->replyPostRegisterIndex
[i
] = (resource_size_t
*)
2185 ((u8
*)&ioc
->chip
->Doorbell
+
2186 MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET
+
2187 (i
* MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET
));
2190 ioc
->combined_reply_queue
= 0;
2192 if (ioc
->is_warpdrive
) {
2193 ioc
->reply_post_host_index
[0] = (resource_size_t __iomem
*)
2194 &ioc
->chip
->ReplyPostHostIndex
;
2196 for (i
= 1; i
< ioc
->cpu_msix_table_sz
; i
++)
2197 ioc
->reply_post_host_index
[i
] =
2198 (resource_size_t __iomem
*)
2199 ((u8 __iomem
*)&ioc
->chip
->Doorbell
+ (0x4000 + ((i
- 1)
2203 list_for_each_entry(reply_q
, &ioc
->reply_queue_list
, list
)
2204 pr_info(MPT3SAS_FMT
"%s: IRQ %d\n",
2205 reply_q
->name
, ((ioc
->msix_enable
) ? "PCI-MSI-X enabled" :
2206 "IO-APIC enabled"), reply_q
->vector
);
2208 pr_info(MPT3SAS_FMT
"iomem(0x%016llx), mapped(0x%p), size(%d)\n",
2209 ioc
->name
, (unsigned long long)chip_phys
, ioc
->chip
, memap_sz
);
2210 pr_info(MPT3SAS_FMT
"ioport(0x%016llx), size(%d)\n",
2211 ioc
->name
, (unsigned long long)pio_chip
, pio_sz
);
2213 /* Save PCI configuration state for recovery from PCI AER/EEH errors */
2214 pci_save_state(pdev
);
2218 mpt3sas_base_unmap_resources(ioc
);
2223 * mpt3sas_base_get_msg_frame - obtain request mf pointer
2224 * @ioc: per adapter object
2225 * @smid: system request message index(smid zero is invalid)
2227 * Returns virt pointer to message frame.
2230 mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
2232 return (void *)(ioc
->request
+ (smid
* ioc
->request_sz
));
2236 * mpt3sas_base_get_sense_buffer - obtain a sense buffer virt addr
2237 * @ioc: per adapter object
2238 * @smid: system request message index
2240 * Returns virt pointer to sense buffer.
2243 mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
2245 return (void *)(ioc
->sense
+ ((smid
- 1) * SCSI_SENSE_BUFFERSIZE
));
2249 * mpt3sas_base_get_sense_buffer_dma - obtain a sense buffer dma addr
2250 * @ioc: per adapter object
2251 * @smid: system request message index
2253 * Returns phys pointer to the low 32bit address of the sense buffer.
2256 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
2258 return cpu_to_le32(ioc
->sense_dma
+ ((smid
- 1) *
2259 SCSI_SENSE_BUFFERSIZE
));
2263 * mpt3sas_base_get_reply_virt_addr - obtain reply frames virt address
2264 * @ioc: per adapter object
2265 * @phys_addr: lower 32 physical addr of the reply
2267 * Converts 32bit lower physical addr into a virt address.
2270 mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER
*ioc
, u32 phys_addr
)
2274 return ioc
->reply
+ (phys_addr
- (u32
)ioc
->reply_dma
);
2278 _base_get_msix_index(struct MPT3SAS_ADAPTER
*ioc
)
2280 return ioc
->cpu_msix_table
[raw_smp_processor_id()];
2284 * mpt3sas_base_get_smid - obtain a free smid from internal queue
2285 * @ioc: per adapter object
2286 * @cb_idx: callback index
2288 * Returns smid (zero is invalid)
2291 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER
*ioc
, u8 cb_idx
)
2293 unsigned long flags
;
2294 struct request_tracker
*request
;
2297 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
2298 if (list_empty(&ioc
->internal_free_list
)) {
2299 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2300 pr_err(MPT3SAS_FMT
"%s: smid not available\n",
2301 ioc
->name
, __func__
);
2305 request
= list_entry(ioc
->internal_free_list
.next
,
2306 struct request_tracker
, tracker_list
);
2307 request
->cb_idx
= cb_idx
;
2308 smid
= request
->smid
;
2309 list_del(&request
->tracker_list
);
2310 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2315 * mpt3sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
2316 * @ioc: per adapter object
2317 * @cb_idx: callback index
2318 * @scmd: pointer to scsi command object
2320 * Returns smid (zero is invalid)
2323 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER
*ioc
, u8 cb_idx
,
2324 struct scsi_cmnd
*scmd
)
2326 unsigned long flags
;
2327 struct scsiio_tracker
*request
;
2330 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
2331 if (list_empty(&ioc
->free_list
)) {
2332 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2333 pr_err(MPT3SAS_FMT
"%s: smid not available\n",
2334 ioc
->name
, __func__
);
2338 request
= list_entry(ioc
->free_list
.next
,
2339 struct scsiio_tracker
, tracker_list
);
2340 request
->scmd
= scmd
;
2341 request
->cb_idx
= cb_idx
;
2342 smid
= request
->smid
;
2343 request
->msix_io
= _base_get_msix_index(ioc
);
2344 list_del(&request
->tracker_list
);
2345 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2350 * mpt3sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
2351 * @ioc: per adapter object
2352 * @cb_idx: callback index
2354 * Returns smid (zero is invalid)
2357 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER
*ioc
, u8 cb_idx
)
2359 unsigned long flags
;
2360 struct request_tracker
*request
;
2363 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
2364 if (list_empty(&ioc
->hpr_free_list
)) {
2365 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2369 request
= list_entry(ioc
->hpr_free_list
.next
,
2370 struct request_tracker
, tracker_list
);
2371 request
->cb_idx
= cb_idx
;
2372 smid
= request
->smid
;
2373 list_del(&request
->tracker_list
);
2374 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2379 * mpt3sas_base_free_smid - put smid back on free_list
2380 * @ioc: per adapter object
2381 * @smid: system request message index
2386 mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
2388 unsigned long flags
;
2390 struct chain_tracker
*chain_req
, *next
;
2392 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
2393 if (smid
< ioc
->hi_priority_smid
) {
2396 if (!list_empty(&ioc
->scsi_lookup
[i
].chain_list
)) {
2397 list_for_each_entry_safe(chain_req
, next
,
2398 &ioc
->scsi_lookup
[i
].chain_list
, tracker_list
) {
2399 list_del_init(&chain_req
->tracker_list
);
2400 list_add(&chain_req
->tracker_list
,
2401 &ioc
->free_chain_list
);
2404 ioc
->scsi_lookup
[i
].cb_idx
= 0xFF;
2405 ioc
->scsi_lookup
[i
].scmd
= NULL
;
2406 ioc
->scsi_lookup
[i
].direct_io
= 0;
2407 list_add(&ioc
->scsi_lookup
[i
].tracker_list
, &ioc
->free_list
);
2408 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2411 * See _wait_for_commands_to_complete() call with regards
2414 if (ioc
->shost_recovery
&& ioc
->pending_io_count
) {
2415 if (ioc
->pending_io_count
== 1)
2416 wake_up(&ioc
->reset_wq
);
2417 ioc
->pending_io_count
--;
2420 } else if (smid
< ioc
->internal_smid
) {
2422 i
= smid
- ioc
->hi_priority_smid
;
2423 ioc
->hpr_lookup
[i
].cb_idx
= 0xFF;
2424 list_add(&ioc
->hpr_lookup
[i
].tracker_list
, &ioc
->hpr_free_list
);
2425 } else if (smid
<= ioc
->hba_queue_depth
) {
2426 /* internal queue */
2427 i
= smid
- ioc
->internal_smid
;
2428 ioc
->internal_lookup
[i
].cb_idx
= 0xFF;
2429 list_add(&ioc
->internal_lookup
[i
].tracker_list
,
2430 &ioc
->internal_free_list
);
2432 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2436 * _base_writeq - 64 bit write to MMIO
2437 * @ioc: per adapter object
2439 * @addr: address in MMIO space
2440 * @writeq_lock: spin lock
2442 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
2443 * care of 32 bit environment where its not quarenteed to send the entire word
2446 #if defined(writeq) && defined(CONFIG_64BIT)
2448 _base_writeq(__u64 b
, volatile void __iomem
*addr
, spinlock_t
*writeq_lock
)
2450 writeq(cpu_to_le64(b
), addr
);
2454 _base_writeq(__u64 b
, volatile void __iomem
*addr
, spinlock_t
*writeq_lock
)
2456 unsigned long flags
;
2457 __u64 data_out
= cpu_to_le64(b
);
2459 spin_lock_irqsave(writeq_lock
, flags
);
2460 writel((u32
)(data_out
), addr
);
2461 writel((u32
)(data_out
>> 32), (addr
+ 4));
2462 spin_unlock_irqrestore(writeq_lock
, flags
);
2467 * _base_put_smid_scsi_io - send SCSI_IO request to firmware
2468 * @ioc: per adapter object
2469 * @smid: system request message index
2470 * @handle: device handle
2475 _base_put_smid_scsi_io(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
, u16 handle
)
2477 Mpi2RequestDescriptorUnion_t descriptor
;
2478 u64
*request
= (u64
*)&descriptor
;
2481 descriptor
.SCSIIO
.RequestFlags
= MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO
;
2482 descriptor
.SCSIIO
.MSIxIndex
= _base_get_msix_index(ioc
);
2483 descriptor
.SCSIIO
.SMID
= cpu_to_le16(smid
);
2484 descriptor
.SCSIIO
.DevHandle
= cpu_to_le16(handle
);
2485 descriptor
.SCSIIO
.LMID
= 0;
2486 _base_writeq(*request
, &ioc
->chip
->RequestDescriptorPostLow
,
2487 &ioc
->scsi_lookup_lock
);
2491 * _base_put_smid_fast_path - send fast path request to firmware
2492 * @ioc: per adapter object
2493 * @smid: system request message index
2494 * @handle: device handle
2499 _base_put_smid_fast_path(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
,
2502 Mpi2RequestDescriptorUnion_t descriptor
;
2503 u64
*request
= (u64
*)&descriptor
;
2505 descriptor
.SCSIIO
.RequestFlags
=
2506 MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO
;
2507 descriptor
.SCSIIO
.MSIxIndex
= _base_get_msix_index(ioc
);
2508 descriptor
.SCSIIO
.SMID
= cpu_to_le16(smid
);
2509 descriptor
.SCSIIO
.DevHandle
= cpu_to_le16(handle
);
2510 descriptor
.SCSIIO
.LMID
= 0;
2511 _base_writeq(*request
, &ioc
->chip
->RequestDescriptorPostLow
,
2512 &ioc
->scsi_lookup_lock
);
2516 * _base_put_smid_hi_priority - send Task Management request to firmware
2517 * @ioc: per adapter object
2518 * @smid: system request message index
2519 * @msix_task: msix_task will be same as msix of IO incase of task abort else 0.
2523 _base_put_smid_hi_priority(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
,
2526 Mpi2RequestDescriptorUnion_t descriptor
;
2527 u64
*request
= (u64
*)&descriptor
;
2529 descriptor
.HighPriority
.RequestFlags
=
2530 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY
;
2531 descriptor
.HighPriority
.MSIxIndex
= msix_task
;
2532 descriptor
.HighPriority
.SMID
= cpu_to_le16(smid
);
2533 descriptor
.HighPriority
.LMID
= 0;
2534 descriptor
.HighPriority
.Reserved1
= 0;
2535 _base_writeq(*request
, &ioc
->chip
->RequestDescriptorPostLow
,
2536 &ioc
->scsi_lookup_lock
);
2540 * _base_put_smid_default - Default, primarily used for config pages
2541 * @ioc: per adapter object
2542 * @smid: system request message index
2547 _base_put_smid_default(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
2549 Mpi2RequestDescriptorUnion_t descriptor
;
2550 u64
*request
= (u64
*)&descriptor
;
2552 descriptor
.Default
.RequestFlags
= MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE
;
2553 descriptor
.Default
.MSIxIndex
= _base_get_msix_index(ioc
);
2554 descriptor
.Default
.SMID
= cpu_to_le16(smid
);
2555 descriptor
.Default
.LMID
= 0;
2556 descriptor
.Default
.DescriptorTypeDependent
= 0;
2557 _base_writeq(*request
, &ioc
->chip
->RequestDescriptorPostLow
,
2558 &ioc
->scsi_lookup_lock
);
2562 * _base_put_smid_scsi_io_atomic - send SCSI_IO request to firmware using
2563 * Atomic Request Descriptor
2564 * @ioc: per adapter object
2565 * @smid: system request message index
2566 * @handle: device handle, unused in this function, for function type match
2571 _base_put_smid_scsi_io_atomic(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
,
2574 Mpi26AtomicRequestDescriptor_t descriptor
;
2575 u32
*request
= (u32
*)&descriptor
;
2577 descriptor
.RequestFlags
= MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO
;
2578 descriptor
.MSIxIndex
= _base_get_msix_index(ioc
);
2579 descriptor
.SMID
= cpu_to_le16(smid
);
2581 writel(cpu_to_le32(*request
), &ioc
->chip
->AtomicRequestDescriptorPost
);
2585 * _base_put_smid_fast_path_atomic - send fast path request to firmware
2586 * using Atomic Request Descriptor
2587 * @ioc: per adapter object
2588 * @smid: system request message index
2589 * @handle: device handle, unused in this function, for function type match
2593 _base_put_smid_fast_path_atomic(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
,
2596 Mpi26AtomicRequestDescriptor_t descriptor
;
2597 u32
*request
= (u32
*)&descriptor
;
2599 descriptor
.RequestFlags
= MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO
;
2600 descriptor
.MSIxIndex
= _base_get_msix_index(ioc
);
2601 descriptor
.SMID
= cpu_to_le16(smid
);
2603 writel(cpu_to_le32(*request
), &ioc
->chip
->AtomicRequestDescriptorPost
);
2607 * _base_put_smid_hi_priority_atomic - send Task Management request to
2608 * firmware using Atomic Request Descriptor
2609 * @ioc: per adapter object
2610 * @smid: system request message index
2611 * @msix_task: msix_task will be same as msix of IO incase of task abort else 0
2616 _base_put_smid_hi_priority_atomic(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
,
2619 Mpi26AtomicRequestDescriptor_t descriptor
;
2620 u32
*request
= (u32
*)&descriptor
;
2622 descriptor
.RequestFlags
= MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY
;
2623 descriptor
.MSIxIndex
= msix_task
;
2624 descriptor
.SMID
= cpu_to_le16(smid
);
2626 writel(cpu_to_le32(*request
), &ioc
->chip
->AtomicRequestDescriptorPost
);
2630 * _base_put_smid_default - Default, primarily used for config pages
2631 * use Atomic Request Descriptor
2632 * @ioc: per adapter object
2633 * @smid: system request message index
2638 _base_put_smid_default_atomic(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
2640 Mpi26AtomicRequestDescriptor_t descriptor
;
2641 u32
*request
= (u32
*)&descriptor
;
2643 descriptor
.RequestFlags
= MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE
;
2644 descriptor
.MSIxIndex
= _base_get_msix_index(ioc
);
2645 descriptor
.SMID
= cpu_to_le16(smid
);
2647 writel(cpu_to_le32(*request
), &ioc
->chip
->AtomicRequestDescriptorPost
);
2651 * _base_display_OEMs_branding - Display branding string
2652 * @ioc: per adapter object
2657 _base_display_OEMs_branding(struct MPT3SAS_ADAPTER
*ioc
)
2659 if (ioc
->pdev
->subsystem_vendor
!= PCI_VENDOR_ID_INTEL
)
2662 switch (ioc
->pdev
->subsystem_vendor
) {
2663 case PCI_VENDOR_ID_INTEL
:
2664 switch (ioc
->pdev
->device
) {
2665 case MPI2_MFGPAGE_DEVID_SAS2008
:
2666 switch (ioc
->pdev
->subsystem_device
) {
2667 case MPT2SAS_INTEL_RMS2LL080_SSDID
:
2668 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2669 MPT2SAS_INTEL_RMS2LL080_BRANDING
);
2671 case MPT2SAS_INTEL_RMS2LL040_SSDID
:
2672 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2673 MPT2SAS_INTEL_RMS2LL040_BRANDING
);
2675 case MPT2SAS_INTEL_SSD910_SSDID
:
2676 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2677 MPT2SAS_INTEL_SSD910_BRANDING
);
2681 "Intel(R) Controller: Subsystem ID: 0x%X\n",
2682 ioc
->name
, ioc
->pdev
->subsystem_device
);
2685 case MPI2_MFGPAGE_DEVID_SAS2308_2
:
2686 switch (ioc
->pdev
->subsystem_device
) {
2687 case MPT2SAS_INTEL_RS25GB008_SSDID
:
2688 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2689 MPT2SAS_INTEL_RS25GB008_BRANDING
);
2691 case MPT2SAS_INTEL_RMS25JB080_SSDID
:
2692 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2693 MPT2SAS_INTEL_RMS25JB080_BRANDING
);
2695 case MPT2SAS_INTEL_RMS25JB040_SSDID
:
2696 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2697 MPT2SAS_INTEL_RMS25JB040_BRANDING
);
2699 case MPT2SAS_INTEL_RMS25KB080_SSDID
:
2700 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2701 MPT2SAS_INTEL_RMS25KB080_BRANDING
);
2703 case MPT2SAS_INTEL_RMS25KB040_SSDID
:
2704 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2705 MPT2SAS_INTEL_RMS25KB040_BRANDING
);
2707 case MPT2SAS_INTEL_RMS25LB040_SSDID
:
2708 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2709 MPT2SAS_INTEL_RMS25LB040_BRANDING
);
2711 case MPT2SAS_INTEL_RMS25LB080_SSDID
:
2712 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2713 MPT2SAS_INTEL_RMS25LB080_BRANDING
);
2717 "Intel(R) Controller: Subsystem ID: 0x%X\n",
2718 ioc
->name
, ioc
->pdev
->subsystem_device
);
2721 case MPI25_MFGPAGE_DEVID_SAS3008
:
2722 switch (ioc
->pdev
->subsystem_device
) {
2723 case MPT3SAS_INTEL_RMS3JC080_SSDID
:
2724 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2725 MPT3SAS_INTEL_RMS3JC080_BRANDING
);
2728 case MPT3SAS_INTEL_RS3GC008_SSDID
:
2729 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2730 MPT3SAS_INTEL_RS3GC008_BRANDING
);
2732 case MPT3SAS_INTEL_RS3FC044_SSDID
:
2733 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2734 MPT3SAS_INTEL_RS3FC044_BRANDING
);
2736 case MPT3SAS_INTEL_RS3UC080_SSDID
:
2737 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2738 MPT3SAS_INTEL_RS3UC080_BRANDING
);
2742 "Intel(R) Controller: Subsystem ID: 0x%X\n",
2743 ioc
->name
, ioc
->pdev
->subsystem_device
);
2749 "Intel(R) Controller: Subsystem ID: 0x%X\n",
2750 ioc
->name
, ioc
->pdev
->subsystem_device
);
2754 case PCI_VENDOR_ID_DELL
:
2755 switch (ioc
->pdev
->device
) {
2756 case MPI2_MFGPAGE_DEVID_SAS2008
:
2757 switch (ioc
->pdev
->subsystem_device
) {
2758 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID
:
2759 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2760 MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING
);
2762 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID
:
2763 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2764 MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING
);
2766 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID
:
2767 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2768 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING
);
2770 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID
:
2771 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2772 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING
);
2774 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID
:
2775 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2776 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING
);
2778 case MPT2SAS_DELL_PERC_H200_SSDID
:
2779 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2780 MPT2SAS_DELL_PERC_H200_BRANDING
);
2782 case MPT2SAS_DELL_6GBPS_SAS_SSDID
:
2783 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2784 MPT2SAS_DELL_6GBPS_SAS_BRANDING
);
2788 "Dell 6Gbps HBA: Subsystem ID: 0x%X\n",
2789 ioc
->name
, ioc
->pdev
->subsystem_device
);
2793 case MPI25_MFGPAGE_DEVID_SAS3008
:
2794 switch (ioc
->pdev
->subsystem_device
) {
2795 case MPT3SAS_DELL_12G_HBA_SSDID
:
2796 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2797 MPT3SAS_DELL_12G_HBA_BRANDING
);
2801 "Dell 12Gbps HBA: Subsystem ID: 0x%X\n",
2802 ioc
->name
, ioc
->pdev
->subsystem_device
);
2808 "Dell HBA: Subsystem ID: 0x%X\n", ioc
->name
,
2809 ioc
->pdev
->subsystem_device
);
2813 case PCI_VENDOR_ID_CISCO
:
2814 switch (ioc
->pdev
->device
) {
2815 case MPI25_MFGPAGE_DEVID_SAS3008
:
2816 switch (ioc
->pdev
->subsystem_device
) {
2817 case MPT3SAS_CISCO_12G_8E_HBA_SSDID
:
2818 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2819 MPT3SAS_CISCO_12G_8E_HBA_BRANDING
);
2821 case MPT3SAS_CISCO_12G_8I_HBA_SSDID
:
2822 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2823 MPT3SAS_CISCO_12G_8I_HBA_BRANDING
);
2825 case MPT3SAS_CISCO_12G_AVILA_HBA_SSDID
:
2826 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2827 MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING
);
2831 "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n",
2832 ioc
->name
, ioc
->pdev
->subsystem_device
);
2836 case MPI25_MFGPAGE_DEVID_SAS3108_1
:
2837 switch (ioc
->pdev
->subsystem_device
) {
2838 case MPT3SAS_CISCO_12G_AVILA_HBA_SSDID
:
2839 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2840 MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING
);
2842 case MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID
:
2843 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2844 MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING
2849 "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n",
2850 ioc
->name
, ioc
->pdev
->subsystem_device
);
2856 "Cisco SAS HBA: Subsystem ID: 0x%X\n",
2857 ioc
->name
, ioc
->pdev
->subsystem_device
);
2861 case MPT2SAS_HP_3PAR_SSVID
:
2862 switch (ioc
->pdev
->device
) {
2863 case MPI2_MFGPAGE_DEVID_SAS2004
:
2864 switch (ioc
->pdev
->subsystem_device
) {
2865 case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID
:
2866 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2867 MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING
);
2871 "HP 6Gbps SAS HBA: Subsystem ID: 0x%X\n",
2872 ioc
->name
, ioc
->pdev
->subsystem_device
);
2875 case MPI2_MFGPAGE_DEVID_SAS2308_2
:
2876 switch (ioc
->pdev
->subsystem_device
) {
2877 case MPT2SAS_HP_2_4_INTERNAL_SSDID
:
2878 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2879 MPT2SAS_HP_2_4_INTERNAL_BRANDING
);
2881 case MPT2SAS_HP_2_4_EXTERNAL_SSDID
:
2882 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2883 MPT2SAS_HP_2_4_EXTERNAL_BRANDING
);
2885 case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID
:
2886 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2887 MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING
);
2889 case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID
:
2890 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2891 MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING
);
2895 "HP 6Gbps SAS HBA: Subsystem ID: 0x%X\n",
2896 ioc
->name
, ioc
->pdev
->subsystem_device
);
2901 "HP SAS HBA: Subsystem ID: 0x%X\n",
2902 ioc
->name
, ioc
->pdev
->subsystem_device
);
2911 * _base_display_ioc_capabilities - Disply IOC's capabilities.
2912 * @ioc: per adapter object
2917 _base_display_ioc_capabilities(struct MPT3SAS_ADAPTER
*ioc
)
2921 u32 iounit_pg1_flags
;
2924 bios_version
= le32_to_cpu(ioc
->bios_pg3
.BiosVersion
);
2925 strncpy(desc
, ioc
->manu_pg0
.ChipName
, 16);
2926 pr_info(MPT3SAS_FMT
"%s: FWVersion(%02d.%02d.%02d.%02d), "\
2927 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
2929 (ioc
->facts
.FWVersion
.Word
& 0xFF000000) >> 24,
2930 (ioc
->facts
.FWVersion
.Word
& 0x00FF0000) >> 16,
2931 (ioc
->facts
.FWVersion
.Word
& 0x0000FF00) >> 8,
2932 ioc
->facts
.FWVersion
.Word
& 0x000000FF,
2933 ioc
->pdev
->revision
,
2934 (bios_version
& 0xFF000000) >> 24,
2935 (bios_version
& 0x00FF0000) >> 16,
2936 (bios_version
& 0x0000FF00) >> 8,
2937 bios_version
& 0x000000FF);
2939 _base_display_OEMs_branding(ioc
);
2941 pr_info(MPT3SAS_FMT
"Protocol=(", ioc
->name
);
2943 if (ioc
->facts
.ProtocolFlags
& MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR
) {
2944 pr_info("Initiator");
2948 if (ioc
->facts
.ProtocolFlags
& MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET
) {
2949 pr_info("%sTarget", i
? "," : "");
2955 pr_info("Capabilities=(");
2957 if (!ioc
->hide_ir_msg
) {
2958 if (ioc
->facts
.IOCCapabilities
&
2959 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID
) {
2965 if (ioc
->facts
.IOCCapabilities
& MPI2_IOCFACTS_CAPABILITY_TLR
) {
2966 pr_info("%sTLR", i
? "," : "");
2970 if (ioc
->facts
.IOCCapabilities
& MPI2_IOCFACTS_CAPABILITY_MULTICAST
) {
2971 pr_info("%sMulticast", i
? "," : "");
2975 if (ioc
->facts
.IOCCapabilities
&
2976 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET
) {
2977 pr_info("%sBIDI Target", i
? "," : "");
2981 if (ioc
->facts
.IOCCapabilities
& MPI2_IOCFACTS_CAPABILITY_EEDP
) {
2982 pr_info("%sEEDP", i
? "," : "");
2986 if (ioc
->facts
.IOCCapabilities
&
2987 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER
) {
2988 pr_info("%sSnapshot Buffer", i
? "," : "");
2992 if (ioc
->facts
.IOCCapabilities
&
2993 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER
) {
2994 pr_info("%sDiag Trace Buffer", i
? "," : "");
2998 if (ioc
->facts
.IOCCapabilities
&
2999 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER
) {
3000 pr_info("%sDiag Extended Buffer", i
? "," : "");
3004 if (ioc
->facts
.IOCCapabilities
&
3005 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING
) {
3006 pr_info("%sTask Set Full", i
? "," : "");
3010 iounit_pg1_flags
= le32_to_cpu(ioc
->iounit_pg1
.Flags
);
3011 if (!(iounit_pg1_flags
& MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE
)) {
3012 pr_info("%sNCQ", i
? "," : "");
3020 * mpt3sas_base_update_missing_delay - change the missing delay timers
3021 * @ioc: per adapter object
3022 * @device_missing_delay: amount of time till device is reported missing
3023 * @io_missing_delay: interval IO is returned when there is a missing device
3027 * Passed on the command line, this function will modify the device missing
3028 * delay, as well as the io missing delay. This should be called at driver
3032 mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER
*ioc
,
3033 u16 device_missing_delay
, u8 io_missing_delay
)
3035 u16 dmd
, dmd_new
, dmd_orignal
;
3036 u8 io_missing_delay_original
;
3038 Mpi2SasIOUnitPage1_t
*sas_iounit_pg1
= NULL
;
3039 Mpi2ConfigReply_t mpi_reply
;
3043 mpt3sas_config_get_number_hba_phys(ioc
, &num_phys
);
3047 sz
= offsetof(Mpi2SasIOUnitPage1_t
, PhyData
) + (num_phys
*
3048 sizeof(Mpi2SasIOUnit1PhyData_t
));
3049 sas_iounit_pg1
= kzalloc(sz
, GFP_KERNEL
);
3050 if (!sas_iounit_pg1
) {
3051 pr_err(MPT3SAS_FMT
"failure at %s:%d/%s()!\n",
3052 ioc
->name
, __FILE__
, __LINE__
, __func__
);
3055 if ((mpt3sas_config_get_sas_iounit_pg1(ioc
, &mpi_reply
,
3056 sas_iounit_pg1
, sz
))) {
3057 pr_err(MPT3SAS_FMT
"failure at %s:%d/%s()!\n",
3058 ioc
->name
, __FILE__
, __LINE__
, __func__
);
3061 ioc_status
= le16_to_cpu(mpi_reply
.IOCStatus
) &
3062 MPI2_IOCSTATUS_MASK
;
3063 if (ioc_status
!= MPI2_IOCSTATUS_SUCCESS
) {
3064 pr_err(MPT3SAS_FMT
"failure at %s:%d/%s()!\n",
3065 ioc
->name
, __FILE__
, __LINE__
, __func__
);
3069 /* device missing delay */
3070 dmd
= sas_iounit_pg1
->ReportDeviceMissingDelay
;
3071 if (dmd
& MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16
)
3072 dmd
= (dmd
& MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK
) * 16;
3074 dmd
= dmd
& MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK
;
3076 if (device_missing_delay
> 0x7F) {
3077 dmd
= (device_missing_delay
> 0x7F0) ? 0x7F0 :
3078 device_missing_delay
;
3080 dmd
|= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16
;
3082 dmd
= device_missing_delay
;
3083 sas_iounit_pg1
->ReportDeviceMissingDelay
= dmd
;
3085 /* io missing delay */
3086 io_missing_delay_original
= sas_iounit_pg1
->IODeviceMissingDelay
;
3087 sas_iounit_pg1
->IODeviceMissingDelay
= io_missing_delay
;
3089 if (!mpt3sas_config_set_sas_iounit_pg1(ioc
, &mpi_reply
, sas_iounit_pg1
,
3091 if (dmd
& MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16
)
3093 MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK
) * 16;
3096 dmd
& MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK
;
3097 pr_info(MPT3SAS_FMT
"device_missing_delay: old(%d), new(%d)\n",
3098 ioc
->name
, dmd_orignal
, dmd_new
);
3099 pr_info(MPT3SAS_FMT
"ioc_missing_delay: old(%d), new(%d)\n",
3100 ioc
->name
, io_missing_delay_original
,
3102 ioc
->device_missing_delay
= dmd_new
;
3103 ioc
->io_missing_delay
= io_missing_delay
;
3107 kfree(sas_iounit_pg1
);
3110 * _base_static_config_pages - static start of day config pages
3111 * @ioc: per adapter object
3116 _base_static_config_pages(struct MPT3SAS_ADAPTER
*ioc
)
3118 Mpi2ConfigReply_t mpi_reply
;
3119 u32 iounit_pg1_flags
;
3121 mpt3sas_config_get_manufacturing_pg0(ioc
, &mpi_reply
, &ioc
->manu_pg0
);
3122 if (ioc
->ir_firmware
)
3123 mpt3sas_config_get_manufacturing_pg10(ioc
, &mpi_reply
,
3127 * Ensure correct T10 PI operation if vendor left EEDPTagMode
3128 * flag unset in NVDATA.
3130 mpt3sas_config_get_manufacturing_pg11(ioc
, &mpi_reply
, &ioc
->manu_pg11
);
3131 if (ioc
->manu_pg11
.EEDPTagMode
== 0) {
3132 pr_err("%s: overriding NVDATA EEDPTagMode setting\n",
3134 ioc
->manu_pg11
.EEDPTagMode
&= ~0x3;
3135 ioc
->manu_pg11
.EEDPTagMode
|= 0x1;
3136 mpt3sas_config_set_manufacturing_pg11(ioc
, &mpi_reply
,
3140 mpt3sas_config_get_bios_pg2(ioc
, &mpi_reply
, &ioc
->bios_pg2
);
3141 mpt3sas_config_get_bios_pg3(ioc
, &mpi_reply
, &ioc
->bios_pg3
);
3142 mpt3sas_config_get_ioc_pg8(ioc
, &mpi_reply
, &ioc
->ioc_pg8
);
3143 mpt3sas_config_get_iounit_pg0(ioc
, &mpi_reply
, &ioc
->iounit_pg0
);
3144 mpt3sas_config_get_iounit_pg1(ioc
, &mpi_reply
, &ioc
->iounit_pg1
);
3145 mpt3sas_config_get_iounit_pg8(ioc
, &mpi_reply
, &ioc
->iounit_pg8
);
3146 _base_display_ioc_capabilities(ioc
);
3149 * Enable task_set_full handling in iounit_pg1 when the
3150 * facts capabilities indicate that its supported.
3152 iounit_pg1_flags
= le32_to_cpu(ioc
->iounit_pg1
.Flags
);
3153 if ((ioc
->facts
.IOCCapabilities
&
3154 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING
))
3156 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING
;
3159 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING
;
3160 ioc
->iounit_pg1
.Flags
= cpu_to_le32(iounit_pg1_flags
);
3161 mpt3sas_config_set_iounit_pg1(ioc
, &mpi_reply
, &ioc
->iounit_pg1
);
3163 if (ioc
->iounit_pg8
.NumSensors
)
3164 ioc
->temp_sensors_count
= ioc
->iounit_pg8
.NumSensors
;
3168 * _base_release_memory_pools - release memory
3169 * @ioc: per adapter object
3171 * Free memory allocated from _base_allocate_memory_pools.
3176 _base_release_memory_pools(struct MPT3SAS_ADAPTER
*ioc
)
3179 struct reply_post_struct
*rps
;
3181 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
3185 pci_free_consistent(ioc
->pdev
, ioc
->request_dma_sz
,
3186 ioc
->request
, ioc
->request_dma
);
3187 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
3188 "request_pool(0x%p): free\n",
3189 ioc
->name
, ioc
->request
));
3190 ioc
->request
= NULL
;
3194 pci_pool_free(ioc
->sense_dma_pool
, ioc
->sense
, ioc
->sense_dma
);
3195 if (ioc
->sense_dma_pool
)
3196 pci_pool_destroy(ioc
->sense_dma_pool
);
3197 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
3198 "sense_pool(0x%p): free\n",
3199 ioc
->name
, ioc
->sense
));
3204 pci_pool_free(ioc
->reply_dma_pool
, ioc
->reply
, ioc
->reply_dma
);
3205 if (ioc
->reply_dma_pool
)
3206 pci_pool_destroy(ioc
->reply_dma_pool
);
3207 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
3208 "reply_pool(0x%p): free\n",
3209 ioc
->name
, ioc
->reply
));
3213 if (ioc
->reply_free
) {
3214 pci_pool_free(ioc
->reply_free_dma_pool
, ioc
->reply_free
,
3215 ioc
->reply_free_dma
);
3216 if (ioc
->reply_free_dma_pool
)
3217 pci_pool_destroy(ioc
->reply_free_dma_pool
);
3218 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
3219 "reply_free_pool(0x%p): free\n",
3220 ioc
->name
, ioc
->reply_free
));
3221 ioc
->reply_free
= NULL
;
3224 if (ioc
->reply_post
) {
3226 rps
= &ioc
->reply_post
[i
];
3227 if (rps
->reply_post_free
) {
3229 ioc
->reply_post_free_dma_pool
,
3230 rps
->reply_post_free
,
3231 rps
->reply_post_free_dma
);
3232 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
3233 "reply_post_free_pool(0x%p): free\n",
3234 ioc
->name
, rps
->reply_post_free
));
3235 rps
->reply_post_free
= NULL
;
3237 } while (ioc
->rdpq_array_enable
&&
3238 (++i
< ioc
->reply_queue_count
));
3240 if (ioc
->reply_post_free_dma_pool
)
3241 pci_pool_destroy(ioc
->reply_post_free_dma_pool
);
3242 kfree(ioc
->reply_post
);
3245 if (ioc
->config_page
) {
3246 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
3247 "config_page(0x%p): free\n", ioc
->name
,
3249 pci_free_consistent(ioc
->pdev
, ioc
->config_page_sz
,
3250 ioc
->config_page
, ioc
->config_page_dma
);
3253 if (ioc
->scsi_lookup
) {
3254 free_pages((ulong
)ioc
->scsi_lookup
, ioc
->scsi_lookup_pages
);
3255 ioc
->scsi_lookup
= NULL
;
3257 kfree(ioc
->hpr_lookup
);
3258 kfree(ioc
->internal_lookup
);
3259 if (ioc
->chain_lookup
) {
3260 for (i
= 0; i
< ioc
->chain_depth
; i
++) {
3261 if (ioc
->chain_lookup
[i
].chain_buffer
)
3262 pci_pool_free(ioc
->chain_dma_pool
,
3263 ioc
->chain_lookup
[i
].chain_buffer
,
3264 ioc
->chain_lookup
[i
].chain_buffer_dma
);
3266 if (ioc
->chain_dma_pool
)
3267 pci_pool_destroy(ioc
->chain_dma_pool
);
3268 free_pages((ulong
)ioc
->chain_lookup
, ioc
->chain_pages
);
3269 ioc
->chain_lookup
= NULL
;
3274 * _base_allocate_memory_pools - allocate start of day memory pools
3275 * @ioc: per adapter object
3277 * Returns 0 success, anything else error
3280 _base_allocate_memory_pools(struct MPT3SAS_ADAPTER
*ioc
)
3282 struct mpt3sas_facts
*facts
;
3283 u16 max_sge_elements
;
3284 u16 chains_needed_per_io
;
3285 u32 sz
, total_sz
, reply_post_free_sz
;
3287 u16 max_request_credit
;
3288 unsigned short sg_tablesize
;
3292 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
3297 facts
= &ioc
->facts
;
3299 /* command line tunables for max sgl entries */
3300 if (max_sgl_entries
!= -1)
3301 sg_tablesize
= max_sgl_entries
;
3303 if (ioc
->hba_mpi_version_belonged
== MPI2_VERSION
)
3304 sg_tablesize
= MPT2SAS_SG_DEPTH
;
3306 sg_tablesize
= MPT3SAS_SG_DEPTH
;
3309 if (sg_tablesize
< MPT_MIN_PHYS_SEGMENTS
)
3310 sg_tablesize
= MPT_MIN_PHYS_SEGMENTS
;
3311 else if (sg_tablesize
> MPT_MAX_PHYS_SEGMENTS
) {
3312 sg_tablesize
= min_t(unsigned short, sg_tablesize
,
3315 "sg_tablesize(%u) is bigger than kernel"
3316 " defined SG_CHUNK_SIZE(%u)\n", ioc
->name
,
3317 sg_tablesize
, MPT_MAX_PHYS_SEGMENTS
);
3319 ioc
->shost
->sg_tablesize
= sg_tablesize
;
3321 ioc
->internal_depth
= min_t(int, (facts
->HighPriorityCredit
+ (5)),
3322 (facts
->RequestCredit
/ 4));
3323 if (ioc
->internal_depth
< INTERNAL_CMDS_COUNT
) {
3324 if (facts
->RequestCredit
<= (INTERNAL_CMDS_COUNT
+
3325 INTERNAL_SCSIIO_CMDS_COUNT
)) {
3326 pr_err(MPT3SAS_FMT
"IOC doesn't have enough Request \
3327 Credits, it has just %d number of credits\n",
3328 ioc
->name
, facts
->RequestCredit
);
3331 ioc
->internal_depth
= 10;
3334 ioc
->hi_priority_depth
= ioc
->internal_depth
- (5);
3335 /* command line tunables for max controller queue depth */
3336 if (max_queue_depth
!= -1 && max_queue_depth
!= 0) {
3337 max_request_credit
= min_t(u16
, max_queue_depth
+
3338 ioc
->internal_depth
, facts
->RequestCredit
);
3339 if (max_request_credit
> MAX_HBA_QUEUE_DEPTH
)
3340 max_request_credit
= MAX_HBA_QUEUE_DEPTH
;
3342 max_request_credit
= min_t(u16
, facts
->RequestCredit
,
3343 MAX_HBA_QUEUE_DEPTH
);
3345 /* Firmware maintains additional facts->HighPriorityCredit number of
3346 * credits for HiPriprity Request messages, so hba queue depth will be
3347 * sum of max_request_credit and high priority queue depth.
3349 ioc
->hba_queue_depth
= max_request_credit
+ ioc
->hi_priority_depth
;
3351 /* request frame size */
3352 ioc
->request_sz
= facts
->IOCRequestFrameSize
* 4;
3354 /* reply frame size */
3355 ioc
->reply_sz
= facts
->ReplyFrameSize
* 4;
3357 /* chain segment size */
3358 if (ioc
->hba_mpi_version_belonged
!= MPI2_VERSION
) {
3359 if (facts
->IOCMaxChainSegmentSize
)
3360 ioc
->chain_segment_sz
=
3361 facts
->IOCMaxChainSegmentSize
*
3364 /* set to 128 bytes size if IOCMaxChainSegmentSize is zero */
3365 ioc
->chain_segment_sz
= DEFAULT_NUM_FWCHAIN_ELEMTS
*
3368 ioc
->chain_segment_sz
= ioc
->request_sz
;
3370 /* calculate the max scatter element size */
3371 sge_size
= max_t(u16
, ioc
->sge_size
, ioc
->sge_size_ieee
);
3375 /* calculate number of sg elements left over in the 1st frame */
3376 max_sge_elements
= ioc
->request_sz
- ((sizeof(Mpi2SCSIIORequest_t
) -
3377 sizeof(Mpi2SGEIOUnion_t
)) + sge_size
);
3378 ioc
->max_sges_in_main_message
= max_sge_elements
/sge_size
;
3380 /* now do the same for a chain buffer */
3381 max_sge_elements
= ioc
->chain_segment_sz
- sge_size
;
3382 ioc
->max_sges_in_chain_message
= max_sge_elements
/sge_size
;
3385 * MPT3SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
3387 chains_needed_per_io
= ((ioc
->shost
->sg_tablesize
-
3388 ioc
->max_sges_in_main_message
)/ioc
->max_sges_in_chain_message
)
3390 if (chains_needed_per_io
> facts
->MaxChainDepth
) {
3391 chains_needed_per_io
= facts
->MaxChainDepth
;
3392 ioc
->shost
->sg_tablesize
= min_t(u16
,
3393 ioc
->max_sges_in_main_message
+ (ioc
->max_sges_in_chain_message
3394 * chains_needed_per_io
), ioc
->shost
->sg_tablesize
);
3396 ioc
->chains_needed_per_io
= chains_needed_per_io
;
3398 /* reply free queue sizing - taking into account for 64 FW events */
3399 ioc
->reply_free_queue_depth
= ioc
->hba_queue_depth
+ 64;
3401 /* calculate reply descriptor post queue depth */
3402 ioc
->reply_post_queue_depth
= ioc
->hba_queue_depth
+
3403 ioc
->reply_free_queue_depth
+ 1 ;
3404 /* align the reply post queue on the next 16 count boundary */
3405 if (ioc
->reply_post_queue_depth
% 16)
3406 ioc
->reply_post_queue_depth
+= 16 -
3407 (ioc
->reply_post_queue_depth
% 16);
3409 if (ioc
->reply_post_queue_depth
>
3410 facts
->MaxReplyDescriptorPostQueueDepth
) {
3411 ioc
->reply_post_queue_depth
=
3412 facts
->MaxReplyDescriptorPostQueueDepth
-
3413 (facts
->MaxReplyDescriptorPostQueueDepth
% 16);
3414 ioc
->hba_queue_depth
=
3415 ((ioc
->reply_post_queue_depth
- 64) / 2) - 1;
3416 ioc
->reply_free_queue_depth
= ioc
->hba_queue_depth
+ 64;
3419 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"scatter gather: " \
3420 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
3421 "chains_per_io(%d)\n", ioc
->name
, ioc
->max_sges_in_main_message
,
3422 ioc
->max_sges_in_chain_message
, ioc
->shost
->sg_tablesize
,
3423 ioc
->chains_needed_per_io
));
3425 /* reply post queue, 16 byte align */
3426 reply_post_free_sz
= ioc
->reply_post_queue_depth
*
3427 sizeof(Mpi2DefaultReplyDescriptor_t
);
3429 sz
= reply_post_free_sz
;
3430 if (_base_is_controller_msix_enabled(ioc
) && !ioc
->rdpq_array_enable
)
3431 sz
*= ioc
->reply_queue_count
;
3433 ioc
->reply_post
= kcalloc((ioc
->rdpq_array_enable
) ?
3434 (ioc
->reply_queue_count
):1,
3435 sizeof(struct reply_post_struct
), GFP_KERNEL
);
3437 if (!ioc
->reply_post
) {
3438 pr_err(MPT3SAS_FMT
"reply_post_free pool: kcalloc failed\n",
3442 ioc
->reply_post_free_dma_pool
= pci_pool_create("reply_post_free pool",
3443 ioc
->pdev
, sz
, 16, 0);
3444 if (!ioc
->reply_post_free_dma_pool
) {
3446 "reply_post_free pool: pci_pool_create failed\n",
3452 ioc
->reply_post
[i
].reply_post_free
=
3453 pci_pool_alloc(ioc
->reply_post_free_dma_pool
,
3455 &ioc
->reply_post
[i
].reply_post_free_dma
);
3456 if (!ioc
->reply_post
[i
].reply_post_free
) {
3458 "reply_post_free pool: pci_pool_alloc failed\n",
3462 memset(ioc
->reply_post
[i
].reply_post_free
, 0, sz
);
3463 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3464 "reply post free pool (0x%p): depth(%d),"
3465 "element_size(%d), pool_size(%d kB)\n", ioc
->name
,
3466 ioc
->reply_post
[i
].reply_post_free
,
3467 ioc
->reply_post_queue_depth
, 8, sz
/1024));
3468 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3469 "reply_post_free_dma = (0x%llx)\n", ioc
->name
,
3470 (unsigned long long)
3471 ioc
->reply_post
[i
].reply_post_free_dma
));
3473 } while (ioc
->rdpq_array_enable
&& (++i
< ioc
->reply_queue_count
));
3475 if (ioc
->dma_mask
== 64) {
3476 if (_base_change_consistent_dma_mask(ioc
, ioc
->pdev
) != 0) {
3478 "no suitable consistent DMA mask for %s\n",
3479 ioc
->name
, pci_name(ioc
->pdev
));
3484 ioc
->scsiio_depth
= ioc
->hba_queue_depth
-
3485 ioc
->hi_priority_depth
- ioc
->internal_depth
;
3487 /* set the scsi host can_queue depth
3488 * with some internal commands that could be outstanding
3490 ioc
->shost
->can_queue
= ioc
->scsiio_depth
- INTERNAL_SCSIIO_CMDS_COUNT
;
3491 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3492 "scsi host: can_queue depth (%d)\n",
3493 ioc
->name
, ioc
->shost
->can_queue
));
3496 /* contiguous pool for request and chains, 16 byte align, one extra "
3499 ioc
->chain_depth
= ioc
->chains_needed_per_io
* ioc
->scsiio_depth
;
3500 sz
= ((ioc
->scsiio_depth
+ 1) * ioc
->request_sz
);
3502 /* hi-priority queue */
3503 sz
+= (ioc
->hi_priority_depth
* ioc
->request_sz
);
3505 /* internal queue */
3506 sz
+= (ioc
->internal_depth
* ioc
->request_sz
);
3508 ioc
->request_dma_sz
= sz
;
3509 ioc
->request
= pci_alloc_consistent(ioc
->pdev
, sz
, &ioc
->request_dma
);
3510 if (!ioc
->request
) {
3511 pr_err(MPT3SAS_FMT
"request pool: pci_alloc_consistent " \
3512 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
3513 "total(%d kB)\n", ioc
->name
, ioc
->hba_queue_depth
,
3514 ioc
->chains_needed_per_io
, ioc
->request_sz
, sz
/1024);
3515 if (ioc
->scsiio_depth
< MPT3SAS_SAS_QUEUE_DEPTH
)
3518 ioc
->hba_queue_depth
-= retry_sz
;
3519 _base_release_memory_pools(ioc
);
3520 goto retry_allocation
;
3524 pr_err(MPT3SAS_FMT
"request pool: pci_alloc_consistent " \
3525 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
3526 "total(%d kb)\n", ioc
->name
, ioc
->hba_queue_depth
,
3527 ioc
->chains_needed_per_io
, ioc
->request_sz
, sz
/1024);
3529 /* hi-priority queue */
3530 ioc
->hi_priority
= ioc
->request
+ ((ioc
->scsiio_depth
+ 1) *
3532 ioc
->hi_priority_dma
= ioc
->request_dma
+ ((ioc
->scsiio_depth
+ 1) *
3535 /* internal queue */
3536 ioc
->internal
= ioc
->hi_priority
+ (ioc
->hi_priority_depth
*
3538 ioc
->internal_dma
= ioc
->hi_priority_dma
+ (ioc
->hi_priority_depth
*
3541 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3542 "request pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n",
3543 ioc
->name
, ioc
->request
, ioc
->hba_queue_depth
, ioc
->request_sz
,
3544 (ioc
->hba_queue_depth
* ioc
->request_sz
)/1024));
3546 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"request pool: dma(0x%llx)\n",
3547 ioc
->name
, (unsigned long long) ioc
->request_dma
));
3550 sz
= ioc
->scsiio_depth
* sizeof(struct scsiio_tracker
);
3551 ioc
->scsi_lookup_pages
= get_order(sz
);
3552 ioc
->scsi_lookup
= (struct scsiio_tracker
*)__get_free_pages(
3553 GFP_KERNEL
, ioc
->scsi_lookup_pages
);
3554 if (!ioc
->scsi_lookup
) {
3555 pr_err(MPT3SAS_FMT
"scsi_lookup: get_free_pages failed, sz(%d)\n",
3556 ioc
->name
, (int)sz
);
3560 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"scsiio(0x%p): depth(%d)\n",
3561 ioc
->name
, ioc
->request
, ioc
->scsiio_depth
));
3563 ioc
->chain_depth
= min_t(u32
, ioc
->chain_depth
, MAX_CHAIN_DEPTH
);
3564 sz
= ioc
->chain_depth
* sizeof(struct chain_tracker
);
3565 ioc
->chain_pages
= get_order(sz
);
3566 ioc
->chain_lookup
= (struct chain_tracker
*)__get_free_pages(
3567 GFP_KERNEL
, ioc
->chain_pages
);
3568 if (!ioc
->chain_lookup
) {
3569 pr_err(MPT3SAS_FMT
"chain_lookup: __get_free_pages failed\n",
3573 ioc
->chain_dma_pool
= pci_pool_create("chain pool", ioc
->pdev
,
3574 ioc
->chain_segment_sz
, 16, 0);
3575 if (!ioc
->chain_dma_pool
) {
3576 pr_err(MPT3SAS_FMT
"chain_dma_pool: pci_pool_create failed\n",
3580 for (i
= 0; i
< ioc
->chain_depth
; i
++) {
3581 ioc
->chain_lookup
[i
].chain_buffer
= pci_pool_alloc(
3582 ioc
->chain_dma_pool
, GFP_KERNEL
,
3583 &ioc
->chain_lookup
[i
].chain_buffer_dma
);
3584 if (!ioc
->chain_lookup
[i
].chain_buffer
) {
3585 ioc
->chain_depth
= i
;
3588 total_sz
+= ioc
->chain_segment_sz
;
3591 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3592 "chain pool depth(%d), frame_size(%d), pool_size(%d kB)\n",
3593 ioc
->name
, ioc
->chain_depth
, ioc
->chain_segment_sz
,
3594 ((ioc
->chain_depth
* ioc
->chain_segment_sz
))/1024));
3596 /* initialize hi-priority queue smid's */
3597 ioc
->hpr_lookup
= kcalloc(ioc
->hi_priority_depth
,
3598 sizeof(struct request_tracker
), GFP_KERNEL
);
3599 if (!ioc
->hpr_lookup
) {
3600 pr_err(MPT3SAS_FMT
"hpr_lookup: kcalloc failed\n",
3604 ioc
->hi_priority_smid
= ioc
->scsiio_depth
+ 1;
3605 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3606 "hi_priority(0x%p): depth(%d), start smid(%d)\n",
3607 ioc
->name
, ioc
->hi_priority
,
3608 ioc
->hi_priority_depth
, ioc
->hi_priority_smid
));
3610 /* initialize internal queue smid's */
3611 ioc
->internal_lookup
= kcalloc(ioc
->internal_depth
,
3612 sizeof(struct request_tracker
), GFP_KERNEL
);
3613 if (!ioc
->internal_lookup
) {
3614 pr_err(MPT3SAS_FMT
"internal_lookup: kcalloc failed\n",
3618 ioc
->internal_smid
= ioc
->hi_priority_smid
+ ioc
->hi_priority_depth
;
3619 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3620 "internal(0x%p): depth(%d), start smid(%d)\n",
3621 ioc
->name
, ioc
->internal
,
3622 ioc
->internal_depth
, ioc
->internal_smid
));
3624 /* sense buffers, 4 byte align */
3625 sz
= ioc
->scsiio_depth
* SCSI_SENSE_BUFFERSIZE
;
3626 ioc
->sense_dma_pool
= pci_pool_create("sense pool", ioc
->pdev
, sz
, 4,
3628 if (!ioc
->sense_dma_pool
) {
3629 pr_err(MPT3SAS_FMT
"sense pool: pci_pool_create failed\n",
3633 ioc
->sense
= pci_pool_alloc(ioc
->sense_dma_pool
, GFP_KERNEL
,
3636 pr_err(MPT3SAS_FMT
"sense pool: pci_pool_alloc failed\n",
3640 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3641 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
3642 "(%d kB)\n", ioc
->name
, ioc
->sense
, ioc
->scsiio_depth
,
3643 SCSI_SENSE_BUFFERSIZE
, sz
/1024));
3644 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"sense_dma(0x%llx)\n",
3645 ioc
->name
, (unsigned long long)ioc
->sense_dma
));
3648 /* reply pool, 4 byte align */
3649 sz
= ioc
->reply_free_queue_depth
* ioc
->reply_sz
;
3650 ioc
->reply_dma_pool
= pci_pool_create("reply pool", ioc
->pdev
, sz
, 4,
3652 if (!ioc
->reply_dma_pool
) {
3653 pr_err(MPT3SAS_FMT
"reply pool: pci_pool_create failed\n",
3657 ioc
->reply
= pci_pool_alloc(ioc
->reply_dma_pool
, GFP_KERNEL
,
3660 pr_err(MPT3SAS_FMT
"reply pool: pci_pool_alloc failed\n",
3664 ioc
->reply_dma_min_address
= (u32
)(ioc
->reply_dma
);
3665 ioc
->reply_dma_max_address
= (u32
)(ioc
->reply_dma
) + sz
;
3666 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3667 "reply pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n",
3668 ioc
->name
, ioc
->reply
,
3669 ioc
->reply_free_queue_depth
, ioc
->reply_sz
, sz
/1024));
3670 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"reply_dma(0x%llx)\n",
3671 ioc
->name
, (unsigned long long)ioc
->reply_dma
));
3674 /* reply free queue, 16 byte align */
3675 sz
= ioc
->reply_free_queue_depth
* 4;
3676 ioc
->reply_free_dma_pool
= pci_pool_create("reply_free pool",
3677 ioc
->pdev
, sz
, 16, 0);
3678 if (!ioc
->reply_free_dma_pool
) {
3679 pr_err(MPT3SAS_FMT
"reply_free pool: pci_pool_create failed\n",
3683 ioc
->reply_free
= pci_pool_alloc(ioc
->reply_free_dma_pool
, GFP_KERNEL
,
3684 &ioc
->reply_free_dma
);
3685 if (!ioc
->reply_free
) {
3686 pr_err(MPT3SAS_FMT
"reply_free pool: pci_pool_alloc failed\n",
3690 memset(ioc
->reply_free
, 0, sz
);
3691 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"reply_free pool(0x%p): " \
3692 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc
->name
,
3693 ioc
->reply_free
, ioc
->reply_free_queue_depth
, 4, sz
/1024));
3694 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3695 "reply_free_dma (0x%llx)\n",
3696 ioc
->name
, (unsigned long long)ioc
->reply_free_dma
));
3699 ioc
->config_page_sz
= 512;
3700 ioc
->config_page
= pci_alloc_consistent(ioc
->pdev
,
3701 ioc
->config_page_sz
, &ioc
->config_page_dma
);
3702 if (!ioc
->config_page
) {
3704 "config page: pci_pool_alloc failed\n",
3708 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3709 "config page(0x%p): size(%d)\n",
3710 ioc
->name
, ioc
->config_page
, ioc
->config_page_sz
));
3711 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"config_page_dma(0x%llx)\n",
3712 ioc
->name
, (unsigned long long)ioc
->config_page_dma
));
3713 total_sz
+= ioc
->config_page_sz
;
3715 pr_info(MPT3SAS_FMT
"Allocated physical memory: size(%d kB)\n",
3716 ioc
->name
, total_sz
/1024);
3718 "Current Controller Queue Depth(%d),Max Controller Queue Depth(%d)\n",
3719 ioc
->name
, ioc
->shost
->can_queue
, facts
->RequestCredit
);
3720 pr_info(MPT3SAS_FMT
"Scatter Gather Elements per IO(%d)\n",
3721 ioc
->name
, ioc
->shost
->sg_tablesize
);
3729 * mpt3sas_base_get_iocstate - Get the current state of a MPT adapter.
3730 * @ioc: Pointer to MPT_ADAPTER structure
3731 * @cooked: Request raw or cooked IOC state
3733 * Returns all IOC Doorbell register bits if cooked==0, else just the
3734 * Doorbell bits in MPI_IOC_STATE_MASK.
3737 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER
*ioc
, int cooked
)
3741 s
= readl(&ioc
->chip
->Doorbell
);
3742 sc
= s
& MPI2_IOC_STATE_MASK
;
3743 return cooked
? sc
: s
;
3747 * _base_wait_on_iocstate - waiting on a particular ioc state
3748 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
3749 * @timeout: timeout in second
3751 * Returns 0 for success, non-zero for failure.
3754 _base_wait_on_iocstate(struct MPT3SAS_ADAPTER
*ioc
, u32 ioc_state
, int timeout
)
3760 cntdn
= 1000 * timeout
;
3762 current_state
= mpt3sas_base_get_iocstate(ioc
, 1);
3763 if (current_state
== ioc_state
)
3765 if (count
&& current_state
== MPI2_IOC_STATE_FAULT
)
3768 usleep_range(1000, 1500);
3772 return current_state
;
3776 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
3777 * a write to the doorbell)
3778 * @ioc: per adapter object
3779 * @timeout: timeout in second
3781 * Returns 0 for success, non-zero for failure.
3783 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
3786 _base_diag_reset(struct MPT3SAS_ADAPTER
*ioc
);
3789 _base_wait_for_doorbell_int(struct MPT3SAS_ADAPTER
*ioc
, int timeout
)
3795 cntdn
= 1000 * timeout
;
3797 int_status
= readl(&ioc
->chip
->HostInterruptStatus
);
3798 if (int_status
& MPI2_HIS_IOC2SYS_DB_STATUS
) {
3799 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
3800 "%s: successful count(%d), timeout(%d)\n",
3801 ioc
->name
, __func__
, count
, timeout
));
3805 usleep_range(1000, 1500);
3810 "%s: failed due to timeout count(%d), int_status(%x)!\n",
3811 ioc
->name
, __func__
, count
, int_status
);
3816 _base_spin_on_doorbell_int(struct MPT3SAS_ADAPTER
*ioc
, int timeout
)
3822 cntdn
= 2000 * timeout
;
3824 int_status
= readl(&ioc
->chip
->HostInterruptStatus
);
3825 if (int_status
& MPI2_HIS_IOC2SYS_DB_STATUS
) {
3826 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
3827 "%s: successful count(%d), timeout(%d)\n",
3828 ioc
->name
, __func__
, count
, timeout
));
3837 "%s: failed due to timeout count(%d), int_status(%x)!\n",
3838 ioc
->name
, __func__
, count
, int_status
);
3844 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
3845 * @ioc: per adapter object
3846 * @timeout: timeout in second
3848 * Returns 0 for success, non-zero for failure.
3850 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
3854 _base_wait_for_doorbell_ack(struct MPT3SAS_ADAPTER
*ioc
, int timeout
)
3861 cntdn
= 1000 * timeout
;
3863 int_status
= readl(&ioc
->chip
->HostInterruptStatus
);
3864 if (!(int_status
& MPI2_HIS_SYS2IOC_DB_STATUS
)) {
3865 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
3866 "%s: successful count(%d), timeout(%d)\n",
3867 ioc
->name
, __func__
, count
, timeout
));
3869 } else if (int_status
& MPI2_HIS_IOC2SYS_DB_STATUS
) {
3870 doorbell
= readl(&ioc
->chip
->Doorbell
);
3871 if ((doorbell
& MPI2_IOC_STATE_MASK
) ==
3872 MPI2_IOC_STATE_FAULT
) {
3873 mpt3sas_base_fault_info(ioc
, doorbell
);
3876 } else if (int_status
== 0xFFFFFFFF)
3879 usleep_range(1000, 1500);
3885 "%s: failed due to timeout count(%d), int_status(%x)!\n",
3886 ioc
->name
, __func__
, count
, int_status
);
3891 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
3892 * @ioc: per adapter object
3893 * @timeout: timeout in second
3895 * Returns 0 for success, non-zero for failure.
3899 _base_wait_for_doorbell_not_used(struct MPT3SAS_ADAPTER
*ioc
, int timeout
)
3905 cntdn
= 1000 * timeout
;
3907 doorbell_reg
= readl(&ioc
->chip
->Doorbell
);
3908 if (!(doorbell_reg
& MPI2_DOORBELL_USED
)) {
3909 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
3910 "%s: successful count(%d), timeout(%d)\n",
3911 ioc
->name
, __func__
, count
, timeout
));
3915 usleep_range(1000, 1500);
3920 "%s: failed due to timeout count(%d), doorbell_reg(%x)!\n",
3921 ioc
->name
, __func__
, count
, doorbell_reg
);
3926 * _base_send_ioc_reset - send doorbell reset
3927 * @ioc: per adapter object
3928 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
3929 * @timeout: timeout in second
3931 * Returns 0 for success, non-zero for failure.
3934 _base_send_ioc_reset(struct MPT3SAS_ADAPTER
*ioc
, u8 reset_type
, int timeout
)
3939 if (reset_type
!= MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
) {
3940 pr_err(MPT3SAS_FMT
"%s: unknown reset_type\n",
3941 ioc
->name
, __func__
);
3945 if (!(ioc
->facts
.IOCCapabilities
&
3946 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY
))
3949 pr_info(MPT3SAS_FMT
"sending message unit reset !!\n", ioc
->name
);
3951 writel(reset_type
<< MPI2_DOORBELL_FUNCTION_SHIFT
,
3952 &ioc
->chip
->Doorbell
);
3953 if ((_base_wait_for_doorbell_ack(ioc
, 15))) {
3957 ioc_state
= _base_wait_on_iocstate(ioc
, MPI2_IOC_STATE_READY
, timeout
);
3960 "%s: failed going to ready state (ioc_state=0x%x)\n",
3961 ioc
->name
, __func__
, ioc_state
);
3966 pr_info(MPT3SAS_FMT
"message unit reset: %s\n",
3967 ioc
->name
, ((r
== 0) ? "SUCCESS" : "FAILED"));
3972 * _base_handshake_req_reply_wait - send request thru doorbell interface
3973 * @ioc: per adapter object
3974 * @request_bytes: request length
3975 * @request: pointer having request payload
3976 * @reply_bytes: reply length
3977 * @reply: pointer to reply payload
3978 * @timeout: timeout in second
3980 * Returns 0 for success, non-zero for failure.
3983 _base_handshake_req_reply_wait(struct MPT3SAS_ADAPTER
*ioc
, int request_bytes
,
3984 u32
*request
, int reply_bytes
, u16
*reply
, int timeout
)
3986 MPI2DefaultReply_t
*default_reply
= (MPI2DefaultReply_t
*)reply
;
3991 /* make sure doorbell is not in use */
3992 if ((readl(&ioc
->chip
->Doorbell
) & MPI2_DOORBELL_USED
)) {
3994 "doorbell is in use (line=%d)\n",
3995 ioc
->name
, __LINE__
);
3999 /* clear pending doorbell interrupts from previous state changes */
4000 if (readl(&ioc
->chip
->HostInterruptStatus
) &
4001 MPI2_HIS_IOC2SYS_DB_STATUS
)
4002 writel(0, &ioc
->chip
->HostInterruptStatus
);
4004 /* send message to ioc */
4005 writel(((MPI2_FUNCTION_HANDSHAKE
<<MPI2_DOORBELL_FUNCTION_SHIFT
) |
4006 ((request_bytes
/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT
)),
4007 &ioc
->chip
->Doorbell
);
4009 if ((_base_spin_on_doorbell_int(ioc
, 5))) {
4011 "doorbell handshake int failed (line=%d)\n",
4012 ioc
->name
, __LINE__
);
4015 writel(0, &ioc
->chip
->HostInterruptStatus
);
4017 if ((_base_wait_for_doorbell_ack(ioc
, 5))) {
4019 "doorbell handshake ack failed (line=%d)\n",
4020 ioc
->name
, __LINE__
);
4024 /* send message 32-bits at a time */
4025 for (i
= 0, failed
= 0; i
< request_bytes
/4 && !failed
; i
++) {
4026 writel(cpu_to_le32(request
[i
]), &ioc
->chip
->Doorbell
);
4027 if ((_base_wait_for_doorbell_ack(ioc
, 5)))
4033 "doorbell handshake sending request failed (line=%d)\n",
4034 ioc
->name
, __LINE__
);
4038 /* now wait for the reply */
4039 if ((_base_wait_for_doorbell_int(ioc
, timeout
))) {
4041 "doorbell handshake int failed (line=%d)\n",
4042 ioc
->name
, __LINE__
);
4046 /* read the first two 16-bits, it gives the total length of the reply */
4047 reply
[0] = le16_to_cpu(readl(&ioc
->chip
->Doorbell
)
4048 & MPI2_DOORBELL_DATA_MASK
);
4049 writel(0, &ioc
->chip
->HostInterruptStatus
);
4050 if ((_base_wait_for_doorbell_int(ioc
, 5))) {
4052 "doorbell handshake int failed (line=%d)\n",
4053 ioc
->name
, __LINE__
);
4056 reply
[1] = le16_to_cpu(readl(&ioc
->chip
->Doorbell
)
4057 & MPI2_DOORBELL_DATA_MASK
);
4058 writel(0, &ioc
->chip
->HostInterruptStatus
);
4060 for (i
= 2; i
< default_reply
->MsgLength
* 2; i
++) {
4061 if ((_base_wait_for_doorbell_int(ioc
, 5))) {
4063 "doorbell handshake int failed (line=%d)\n",
4064 ioc
->name
, __LINE__
);
4067 if (i
>= reply_bytes
/2) /* overflow case */
4068 readl(&ioc
->chip
->Doorbell
);
4070 reply
[i
] = le16_to_cpu(readl(&ioc
->chip
->Doorbell
)
4071 & MPI2_DOORBELL_DATA_MASK
);
4072 writel(0, &ioc
->chip
->HostInterruptStatus
);
4075 _base_wait_for_doorbell_int(ioc
, 5);
4076 if (_base_wait_for_doorbell_not_used(ioc
, 5) != 0) {
4077 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
4078 "doorbell is in use (line=%d)\n", ioc
->name
, __LINE__
));
4080 writel(0, &ioc
->chip
->HostInterruptStatus
);
4082 if (ioc
->logging_level
& MPT_DEBUG_INIT
) {
4083 mfp
= (__le32
*)reply
;
4084 pr_info("\toffset:data\n");
4085 for (i
= 0; i
< reply_bytes
/4; i
++)
4086 pr_info("\t[0x%02x]:%08x\n", i
*4,
4087 le32_to_cpu(mfp
[i
]));
4093 * mpt3sas_base_sas_iounit_control - send sas iounit control to FW
4094 * @ioc: per adapter object
4095 * @mpi_reply: the reply payload from FW
4096 * @mpi_request: the request payload sent to FW
4098 * The SAS IO Unit Control Request message allows the host to perform low-level
4099 * operations, such as resets on the PHYs of the IO Unit, also allows the host
4100 * to obtain the IOC assigned device handles for a device if it has other
4101 * identifying information about the device, in addition allows the host to
4102 * remove IOC resources associated with the device.
4104 * Returns 0 for success, non-zero for failure.
4107 mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER
*ioc
,
4108 Mpi2SasIoUnitControlReply_t
*mpi_reply
,
4109 Mpi2SasIoUnitControlRequest_t
*mpi_request
)
4113 bool issue_reset
= false;
4116 u16 wait_state_count
;
4118 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4121 mutex_lock(&ioc
->base_cmds
.mutex
);
4123 if (ioc
->base_cmds
.status
!= MPT3_CMD_NOT_USED
) {
4124 pr_err(MPT3SAS_FMT
"%s: base_cmd in use\n",
4125 ioc
->name
, __func__
);
4130 wait_state_count
= 0;
4131 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 1);
4132 while (ioc_state
!= MPI2_IOC_STATE_OPERATIONAL
) {
4133 if (wait_state_count
++ == 10) {
4135 "%s: failed due to ioc not operational\n",
4136 ioc
->name
, __func__
);
4141 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 1);
4143 "%s: waiting for operational state(count=%d)\n",
4144 ioc
->name
, __func__
, wait_state_count
);
4147 smid
= mpt3sas_base_get_smid(ioc
, ioc
->base_cb_idx
);
4149 pr_err(MPT3SAS_FMT
"%s: failed obtaining a smid\n",
4150 ioc
->name
, __func__
);
4156 ioc
->base_cmds
.status
= MPT3_CMD_PENDING
;
4157 request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
4158 ioc
->base_cmds
.smid
= smid
;
4159 memcpy(request
, mpi_request
, sizeof(Mpi2SasIoUnitControlRequest_t
));
4160 if (mpi_request
->Operation
== MPI2_SAS_OP_PHY_HARD_RESET
||
4161 mpi_request
->Operation
== MPI2_SAS_OP_PHY_LINK_RESET
)
4162 ioc
->ioc_link_reset_in_progress
= 1;
4163 init_completion(&ioc
->base_cmds
.done
);
4164 ioc
->put_smid_default(ioc
, smid
);
4165 wait_for_completion_timeout(&ioc
->base_cmds
.done
,
4166 msecs_to_jiffies(10000));
4167 if ((mpi_request
->Operation
== MPI2_SAS_OP_PHY_HARD_RESET
||
4168 mpi_request
->Operation
== MPI2_SAS_OP_PHY_LINK_RESET
) &&
4169 ioc
->ioc_link_reset_in_progress
)
4170 ioc
->ioc_link_reset_in_progress
= 0;
4171 if (!(ioc
->base_cmds
.status
& MPT3_CMD_COMPLETE
)) {
4172 pr_err(MPT3SAS_FMT
"%s: timeout\n",
4173 ioc
->name
, __func__
);
4174 _debug_dump_mf(mpi_request
,
4175 sizeof(Mpi2SasIoUnitControlRequest_t
)/4);
4176 if (!(ioc
->base_cmds
.status
& MPT3_CMD_RESET
))
4178 goto issue_host_reset
;
4180 if (ioc
->base_cmds
.status
& MPT3_CMD_REPLY_VALID
)
4181 memcpy(mpi_reply
, ioc
->base_cmds
.reply
,
4182 sizeof(Mpi2SasIoUnitControlReply_t
));
4184 memset(mpi_reply
, 0, sizeof(Mpi2SasIoUnitControlReply_t
));
4185 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
4190 mpt3sas_base_hard_reset_handler(ioc
, FORCE_BIG_HAMMER
);
4191 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
4194 mutex_unlock(&ioc
->base_cmds
.mutex
);
4199 * mpt3sas_base_scsi_enclosure_processor - sending request to sep device
4200 * @ioc: per adapter object
4201 * @mpi_reply: the reply payload from FW
4202 * @mpi_request: the request payload sent to FW
4204 * The SCSI Enclosure Processor request message causes the IOC to
4205 * communicate with SES devices to control LED status signals.
4207 * Returns 0 for success, non-zero for failure.
4210 mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER
*ioc
,
4211 Mpi2SepReply_t
*mpi_reply
, Mpi2SepRequest_t
*mpi_request
)
4215 bool issue_reset
= false;
4218 u16 wait_state_count
;
4220 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4223 mutex_lock(&ioc
->base_cmds
.mutex
);
4225 if (ioc
->base_cmds
.status
!= MPT3_CMD_NOT_USED
) {
4226 pr_err(MPT3SAS_FMT
"%s: base_cmd in use\n",
4227 ioc
->name
, __func__
);
4232 wait_state_count
= 0;
4233 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 1);
4234 while (ioc_state
!= MPI2_IOC_STATE_OPERATIONAL
) {
4235 if (wait_state_count
++ == 10) {
4237 "%s: failed due to ioc not operational\n",
4238 ioc
->name
, __func__
);
4243 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 1);
4245 "%s: waiting for operational state(count=%d)\n",
4247 __func__
, wait_state_count
);
4250 smid
= mpt3sas_base_get_smid(ioc
, ioc
->base_cb_idx
);
4252 pr_err(MPT3SAS_FMT
"%s: failed obtaining a smid\n",
4253 ioc
->name
, __func__
);
4259 ioc
->base_cmds
.status
= MPT3_CMD_PENDING
;
4260 request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
4261 ioc
->base_cmds
.smid
= smid
;
4262 memcpy(request
, mpi_request
, sizeof(Mpi2SepReply_t
));
4263 init_completion(&ioc
->base_cmds
.done
);
4264 ioc
->put_smid_default(ioc
, smid
);
4265 wait_for_completion_timeout(&ioc
->base_cmds
.done
,
4266 msecs_to_jiffies(10000));
4267 if (!(ioc
->base_cmds
.status
& MPT3_CMD_COMPLETE
)) {
4268 pr_err(MPT3SAS_FMT
"%s: timeout\n",
4269 ioc
->name
, __func__
);
4270 _debug_dump_mf(mpi_request
,
4271 sizeof(Mpi2SepRequest_t
)/4);
4272 if (!(ioc
->base_cmds
.status
& MPT3_CMD_RESET
))
4273 issue_reset
= false;
4274 goto issue_host_reset
;
4276 if (ioc
->base_cmds
.status
& MPT3_CMD_REPLY_VALID
)
4277 memcpy(mpi_reply
, ioc
->base_cmds
.reply
,
4278 sizeof(Mpi2SepReply_t
));
4280 memset(mpi_reply
, 0, sizeof(Mpi2SepReply_t
));
4281 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
4286 mpt3sas_base_hard_reset_handler(ioc
, FORCE_BIG_HAMMER
);
4287 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
4290 mutex_unlock(&ioc
->base_cmds
.mutex
);
4295 * _base_get_port_facts - obtain port facts reply and save in ioc
4296 * @ioc: per adapter object
4298 * Returns 0 for success, non-zero for failure.
4301 _base_get_port_facts(struct MPT3SAS_ADAPTER
*ioc
, int port
)
4303 Mpi2PortFactsRequest_t mpi_request
;
4304 Mpi2PortFactsReply_t mpi_reply
;
4305 struct mpt3sas_port_facts
*pfacts
;
4306 int mpi_reply_sz
, mpi_request_sz
, r
;
4308 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4311 mpi_reply_sz
= sizeof(Mpi2PortFactsReply_t
);
4312 mpi_request_sz
= sizeof(Mpi2PortFactsRequest_t
);
4313 memset(&mpi_request
, 0, mpi_request_sz
);
4314 mpi_request
.Function
= MPI2_FUNCTION_PORT_FACTS
;
4315 mpi_request
.PortNumber
= port
;
4316 r
= _base_handshake_req_reply_wait(ioc
, mpi_request_sz
,
4317 (u32
*)&mpi_request
, mpi_reply_sz
, (u16
*)&mpi_reply
, 5);
4320 pr_err(MPT3SAS_FMT
"%s: handshake failed (r=%d)\n",
4321 ioc
->name
, __func__
, r
);
4325 pfacts
= &ioc
->pfacts
[port
];
4326 memset(pfacts
, 0, sizeof(struct mpt3sas_port_facts
));
4327 pfacts
->PortNumber
= mpi_reply
.PortNumber
;
4328 pfacts
->VP_ID
= mpi_reply
.VP_ID
;
4329 pfacts
->VF_ID
= mpi_reply
.VF_ID
;
4330 pfacts
->MaxPostedCmdBuffers
=
4331 le16_to_cpu(mpi_reply
.MaxPostedCmdBuffers
);
4337 * _base_wait_for_iocstate - Wait until the card is in READY or OPERATIONAL
4338 * @ioc: per adapter object
4341 * Returns 0 for success, non-zero for failure.
4344 _base_wait_for_iocstate(struct MPT3SAS_ADAPTER
*ioc
, int timeout
)
4349 dinitprintk(ioc
, printk(MPT3SAS_FMT
"%s\n", ioc
->name
,
4352 if (ioc
->pci_error_recovery
) {
4353 dfailprintk(ioc
, printk(MPT3SAS_FMT
4354 "%s: host in pci error recovery\n", ioc
->name
, __func__
));
4358 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 0);
4359 dhsprintk(ioc
, printk(MPT3SAS_FMT
"%s: ioc_state(0x%08x)\n",
4360 ioc
->name
, __func__
, ioc_state
));
4362 if (((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_READY
) ||
4363 (ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_OPERATIONAL
)
4366 if (ioc_state
& MPI2_DOORBELL_USED
) {
4367 dhsprintk(ioc
, printk(MPT3SAS_FMT
4368 "unexpected doorbell active!\n", ioc
->name
));
4369 goto issue_diag_reset
;
4372 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_FAULT
) {
4373 mpt3sas_base_fault_info(ioc
, ioc_state
&
4374 MPI2_DOORBELL_DATA_MASK
);
4375 goto issue_diag_reset
;
4378 ioc_state
= _base_wait_on_iocstate(ioc
, MPI2_IOC_STATE_READY
, timeout
);
4380 dfailprintk(ioc
, printk(MPT3SAS_FMT
4381 "%s: failed going to ready state (ioc_state=0x%x)\n",
4382 ioc
->name
, __func__
, ioc_state
));
4387 rc
= _base_diag_reset(ioc
);
4392 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
4393 * @ioc: per adapter object
4395 * Returns 0 for success, non-zero for failure.
4398 _base_get_ioc_facts(struct MPT3SAS_ADAPTER
*ioc
)
4400 Mpi2IOCFactsRequest_t mpi_request
;
4401 Mpi2IOCFactsReply_t mpi_reply
;
4402 struct mpt3sas_facts
*facts
;
4403 int mpi_reply_sz
, mpi_request_sz
, r
;
4405 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4408 r
= _base_wait_for_iocstate(ioc
, 10);
4410 dfailprintk(ioc
, printk(MPT3SAS_FMT
4411 "%s: failed getting to correct state\n",
4412 ioc
->name
, __func__
));
4415 mpi_reply_sz
= sizeof(Mpi2IOCFactsReply_t
);
4416 mpi_request_sz
= sizeof(Mpi2IOCFactsRequest_t
);
4417 memset(&mpi_request
, 0, mpi_request_sz
);
4418 mpi_request
.Function
= MPI2_FUNCTION_IOC_FACTS
;
4419 r
= _base_handshake_req_reply_wait(ioc
, mpi_request_sz
,
4420 (u32
*)&mpi_request
, mpi_reply_sz
, (u16
*)&mpi_reply
, 5);
4423 pr_err(MPT3SAS_FMT
"%s: handshake failed (r=%d)\n",
4424 ioc
->name
, __func__
, r
);
4428 facts
= &ioc
->facts
;
4429 memset(facts
, 0, sizeof(struct mpt3sas_facts
));
4430 facts
->MsgVersion
= le16_to_cpu(mpi_reply
.MsgVersion
);
4431 facts
->HeaderVersion
= le16_to_cpu(mpi_reply
.HeaderVersion
);
4432 facts
->VP_ID
= mpi_reply
.VP_ID
;
4433 facts
->VF_ID
= mpi_reply
.VF_ID
;
4434 facts
->IOCExceptions
= le16_to_cpu(mpi_reply
.IOCExceptions
);
4435 facts
->MaxChainDepth
= mpi_reply
.MaxChainDepth
;
4436 facts
->WhoInit
= mpi_reply
.WhoInit
;
4437 facts
->NumberOfPorts
= mpi_reply
.NumberOfPorts
;
4438 facts
->MaxMSIxVectors
= mpi_reply
.MaxMSIxVectors
;
4439 facts
->RequestCredit
= le16_to_cpu(mpi_reply
.RequestCredit
);
4440 facts
->MaxReplyDescriptorPostQueueDepth
=
4441 le16_to_cpu(mpi_reply
.MaxReplyDescriptorPostQueueDepth
);
4442 facts
->ProductID
= le16_to_cpu(mpi_reply
.ProductID
);
4443 facts
->IOCCapabilities
= le32_to_cpu(mpi_reply
.IOCCapabilities
);
4444 if ((facts
->IOCCapabilities
& MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID
))
4445 ioc
->ir_firmware
= 1;
4446 if ((facts
->IOCCapabilities
&
4447 MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE
))
4448 ioc
->rdpq_array_capable
= 1;
4449 if (facts
->IOCCapabilities
& MPI26_IOCFACTS_CAPABILITY_ATOMIC_REQ
)
4450 ioc
->atomic_desc_capable
= 1;
4451 facts
->FWVersion
.Word
= le32_to_cpu(mpi_reply
.FWVersion
.Word
);
4452 facts
->IOCRequestFrameSize
=
4453 le16_to_cpu(mpi_reply
.IOCRequestFrameSize
);
4454 if (ioc
->hba_mpi_version_belonged
!= MPI2_VERSION
) {
4455 facts
->IOCMaxChainSegmentSize
=
4456 le16_to_cpu(mpi_reply
.IOCMaxChainSegmentSize
);
4458 facts
->MaxInitiators
= le16_to_cpu(mpi_reply
.MaxInitiators
);
4459 facts
->MaxTargets
= le16_to_cpu(mpi_reply
.MaxTargets
);
4460 ioc
->shost
->max_id
= -1;
4461 facts
->MaxSasExpanders
= le16_to_cpu(mpi_reply
.MaxSasExpanders
);
4462 facts
->MaxEnclosures
= le16_to_cpu(mpi_reply
.MaxEnclosures
);
4463 facts
->ProtocolFlags
= le16_to_cpu(mpi_reply
.ProtocolFlags
);
4464 facts
->HighPriorityCredit
=
4465 le16_to_cpu(mpi_reply
.HighPriorityCredit
);
4466 facts
->ReplyFrameSize
= mpi_reply
.ReplyFrameSize
;
4467 facts
->MaxDevHandle
= le16_to_cpu(mpi_reply
.MaxDevHandle
);
4469 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
4470 "hba queue depth(%d), max chains per io(%d)\n",
4471 ioc
->name
, facts
->RequestCredit
,
4472 facts
->MaxChainDepth
));
4473 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
4474 "request frame size(%d), reply frame size(%d)\n", ioc
->name
,
4475 facts
->IOCRequestFrameSize
* 4, facts
->ReplyFrameSize
* 4));
4480 * _base_send_ioc_init - send ioc_init to firmware
4481 * @ioc: per adapter object
4483 * Returns 0 for success, non-zero for failure.
4486 _base_send_ioc_init(struct MPT3SAS_ADAPTER
*ioc
)
4488 Mpi2IOCInitRequest_t mpi_request
;
4489 Mpi2IOCInitReply_t mpi_reply
;
4491 ktime_t current_time
;
4493 u32 reply_post_free_array_sz
= 0;
4494 Mpi2IOCInitRDPQArrayEntry
*reply_post_free_array
= NULL
;
4495 dma_addr_t reply_post_free_array_dma
;
4497 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4500 memset(&mpi_request
, 0, sizeof(Mpi2IOCInitRequest_t
));
4501 mpi_request
.Function
= MPI2_FUNCTION_IOC_INIT
;
4502 mpi_request
.WhoInit
= MPI2_WHOINIT_HOST_DRIVER
;
4503 mpi_request
.VF_ID
= 0; /* TODO */
4504 mpi_request
.VP_ID
= 0;
4505 mpi_request
.MsgVersion
= cpu_to_le16(ioc
->hba_mpi_version_belonged
);
4506 mpi_request
.HeaderVersion
= cpu_to_le16(MPI2_HEADER_VERSION
);
4508 if (_base_is_controller_msix_enabled(ioc
))
4509 mpi_request
.HostMSIxVectors
= ioc
->reply_queue_count
;
4510 mpi_request
.SystemRequestFrameSize
= cpu_to_le16(ioc
->request_sz
/4);
4511 mpi_request
.ReplyDescriptorPostQueueDepth
=
4512 cpu_to_le16(ioc
->reply_post_queue_depth
);
4513 mpi_request
.ReplyFreeQueueDepth
=
4514 cpu_to_le16(ioc
->reply_free_queue_depth
);
4516 mpi_request
.SenseBufferAddressHigh
=
4517 cpu_to_le32((u64
)ioc
->sense_dma
>> 32);
4518 mpi_request
.SystemReplyAddressHigh
=
4519 cpu_to_le32((u64
)ioc
->reply_dma
>> 32);
4520 mpi_request
.SystemRequestFrameBaseAddress
=
4521 cpu_to_le64((u64
)ioc
->request_dma
);
4522 mpi_request
.ReplyFreeQueueAddress
=
4523 cpu_to_le64((u64
)ioc
->reply_free_dma
);
4525 if (ioc
->rdpq_array_enable
) {
4526 reply_post_free_array_sz
= ioc
->reply_queue_count
*
4527 sizeof(Mpi2IOCInitRDPQArrayEntry
);
4528 reply_post_free_array
= pci_alloc_consistent(ioc
->pdev
,
4529 reply_post_free_array_sz
, &reply_post_free_array_dma
);
4530 if (!reply_post_free_array
) {
4532 "reply_post_free_array: pci_alloc_consistent failed\n",
4537 memset(reply_post_free_array
, 0, reply_post_free_array_sz
);
4538 for (i
= 0; i
< ioc
->reply_queue_count
; i
++)
4539 reply_post_free_array
[i
].RDPQBaseAddress
=
4541 (u64
)ioc
->reply_post
[i
].reply_post_free_dma
);
4542 mpi_request
.MsgFlags
= MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE
;
4543 mpi_request
.ReplyDescriptorPostQueueAddress
=
4544 cpu_to_le64((u64
)reply_post_free_array_dma
);
4546 mpi_request
.ReplyDescriptorPostQueueAddress
=
4547 cpu_to_le64((u64
)ioc
->reply_post
[0].reply_post_free_dma
);
4550 /* This time stamp specifies number of milliseconds
4551 * since epoch ~ midnight January 1, 1970.
4553 current_time
= ktime_get_real();
4554 mpi_request
.TimeStamp
= cpu_to_le64(ktime_to_ms(current_time
));
4556 if (ioc
->logging_level
& MPT_DEBUG_INIT
) {
4560 mfp
= (__le32
*)&mpi_request
;
4561 pr_info("\toffset:data\n");
4562 for (i
= 0; i
< sizeof(Mpi2IOCInitRequest_t
)/4; i
++)
4563 pr_info("\t[0x%02x]:%08x\n", i
*4,
4564 le32_to_cpu(mfp
[i
]));
4567 r
= _base_handshake_req_reply_wait(ioc
,
4568 sizeof(Mpi2IOCInitRequest_t
), (u32
*)&mpi_request
,
4569 sizeof(Mpi2IOCInitReply_t
), (u16
*)&mpi_reply
, 10);
4572 pr_err(MPT3SAS_FMT
"%s: handshake failed (r=%d)\n",
4573 ioc
->name
, __func__
, r
);
4577 ioc_status
= le16_to_cpu(mpi_reply
.IOCStatus
) & MPI2_IOCSTATUS_MASK
;
4578 if (ioc_status
!= MPI2_IOCSTATUS_SUCCESS
||
4579 mpi_reply
.IOCLogInfo
) {
4580 pr_err(MPT3SAS_FMT
"%s: failed\n", ioc
->name
, __func__
);
4585 if (reply_post_free_array
)
4586 pci_free_consistent(ioc
->pdev
, reply_post_free_array_sz
,
4587 reply_post_free_array
,
4588 reply_post_free_array_dma
);
4593 * mpt3sas_port_enable_done - command completion routine for port enable
4594 * @ioc: per adapter object
4595 * @smid: system request message index
4596 * @msix_index: MSIX table index supplied by the OS
4597 * @reply: reply message frame(lower 32bit addr)
4599 * Return 1 meaning mf should be freed from _base_interrupt
4600 * 0 means the mf is freed from this function.
4603 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
, u8 msix_index
,
4606 MPI2DefaultReply_t
*mpi_reply
;
4609 if (ioc
->port_enable_cmds
.status
== MPT3_CMD_NOT_USED
)
4612 mpi_reply
= mpt3sas_base_get_reply_virt_addr(ioc
, reply
);
4616 if (mpi_reply
->Function
!= MPI2_FUNCTION_PORT_ENABLE
)
4619 ioc
->port_enable_cmds
.status
&= ~MPT3_CMD_PENDING
;
4620 ioc
->port_enable_cmds
.status
|= MPT3_CMD_COMPLETE
;
4621 ioc
->port_enable_cmds
.status
|= MPT3_CMD_REPLY_VALID
;
4622 memcpy(ioc
->port_enable_cmds
.reply
, mpi_reply
, mpi_reply
->MsgLength
*4);
4623 ioc_status
= le16_to_cpu(mpi_reply
->IOCStatus
) & MPI2_IOCSTATUS_MASK
;
4624 if (ioc_status
!= MPI2_IOCSTATUS_SUCCESS
)
4625 ioc
->port_enable_failed
= 1;
4627 if (ioc
->is_driver_loading
) {
4628 if (ioc_status
== MPI2_IOCSTATUS_SUCCESS
) {
4629 mpt3sas_port_enable_complete(ioc
);
4632 ioc
->start_scan_failed
= ioc_status
;
4633 ioc
->start_scan
= 0;
4637 complete(&ioc
->port_enable_cmds
.done
);
4642 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
4643 * @ioc: per adapter object
4645 * Returns 0 for success, non-zero for failure.
4648 _base_send_port_enable(struct MPT3SAS_ADAPTER
*ioc
)
4650 Mpi2PortEnableRequest_t
*mpi_request
;
4651 Mpi2PortEnableReply_t
*mpi_reply
;
4656 pr_info(MPT3SAS_FMT
"sending port enable !!\n", ioc
->name
);
4658 if (ioc
->port_enable_cmds
.status
& MPT3_CMD_PENDING
) {
4659 pr_err(MPT3SAS_FMT
"%s: internal command already in use\n",
4660 ioc
->name
, __func__
);
4664 smid
= mpt3sas_base_get_smid(ioc
, ioc
->port_enable_cb_idx
);
4666 pr_err(MPT3SAS_FMT
"%s: failed obtaining a smid\n",
4667 ioc
->name
, __func__
);
4671 ioc
->port_enable_cmds
.status
= MPT3_CMD_PENDING
;
4672 mpi_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
4673 ioc
->port_enable_cmds
.smid
= smid
;
4674 memset(mpi_request
, 0, sizeof(Mpi2PortEnableRequest_t
));
4675 mpi_request
->Function
= MPI2_FUNCTION_PORT_ENABLE
;
4677 init_completion(&ioc
->port_enable_cmds
.done
);
4678 ioc
->put_smid_default(ioc
, smid
);
4679 wait_for_completion_timeout(&ioc
->port_enable_cmds
.done
, 300*HZ
);
4680 if (!(ioc
->port_enable_cmds
.status
& MPT3_CMD_COMPLETE
)) {
4681 pr_err(MPT3SAS_FMT
"%s: timeout\n",
4682 ioc
->name
, __func__
);
4683 _debug_dump_mf(mpi_request
,
4684 sizeof(Mpi2PortEnableRequest_t
)/4);
4685 if (ioc
->port_enable_cmds
.status
& MPT3_CMD_RESET
)
4692 mpi_reply
= ioc
->port_enable_cmds
.reply
;
4693 ioc_status
= le16_to_cpu(mpi_reply
->IOCStatus
) & MPI2_IOCSTATUS_MASK
;
4694 if (ioc_status
!= MPI2_IOCSTATUS_SUCCESS
) {
4695 pr_err(MPT3SAS_FMT
"%s: failed with (ioc_status=0x%08x)\n",
4696 ioc
->name
, __func__
, ioc_status
);
4702 ioc
->port_enable_cmds
.status
= MPT3_CMD_NOT_USED
;
4703 pr_info(MPT3SAS_FMT
"port enable: %s\n", ioc
->name
, ((r
== 0) ?
4704 "SUCCESS" : "FAILED"));
4709 * mpt3sas_port_enable - initiate firmware discovery (don't wait for reply)
4710 * @ioc: per adapter object
4712 * Returns 0 for success, non-zero for failure.
4715 mpt3sas_port_enable(struct MPT3SAS_ADAPTER
*ioc
)
4717 Mpi2PortEnableRequest_t
*mpi_request
;
4720 pr_info(MPT3SAS_FMT
"sending port enable !!\n", ioc
->name
);
4722 if (ioc
->port_enable_cmds
.status
& MPT3_CMD_PENDING
) {
4723 pr_err(MPT3SAS_FMT
"%s: internal command already in use\n",
4724 ioc
->name
, __func__
);
4728 smid
= mpt3sas_base_get_smid(ioc
, ioc
->port_enable_cb_idx
);
4730 pr_err(MPT3SAS_FMT
"%s: failed obtaining a smid\n",
4731 ioc
->name
, __func__
);
4735 ioc
->port_enable_cmds
.status
= MPT3_CMD_PENDING
;
4736 mpi_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
4737 ioc
->port_enable_cmds
.smid
= smid
;
4738 memset(mpi_request
, 0, sizeof(Mpi2PortEnableRequest_t
));
4739 mpi_request
->Function
= MPI2_FUNCTION_PORT_ENABLE
;
4741 ioc
->put_smid_default(ioc
, smid
);
4746 * _base_determine_wait_on_discovery - desposition
4747 * @ioc: per adapter object
4749 * Decide whether to wait on discovery to complete. Used to either
4750 * locate boot device, or report volumes ahead of physical devices.
4752 * Returns 1 for wait, 0 for don't wait
4755 _base_determine_wait_on_discovery(struct MPT3SAS_ADAPTER
*ioc
)
4757 /* We wait for discovery to complete if IR firmware is loaded.
4758 * The sas topology events arrive before PD events, so we need time to
4759 * turn on the bit in ioc->pd_handles to indicate PD
4760 * Also, it maybe required to report Volumes ahead of physical
4761 * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
4763 if (ioc
->ir_firmware
)
4766 /* if no Bios, then we don't need to wait */
4767 if (!ioc
->bios_pg3
.BiosVersion
)
4770 /* Bios is present, then we drop down here.
4772 * If there any entries in the Bios Page 2, then we wait
4773 * for discovery to complete.
4776 /* Current Boot Device */
4777 if ((ioc
->bios_pg2
.CurrentBootDeviceForm
&
4778 MPI2_BIOSPAGE2_FORM_MASK
) ==
4779 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED
&&
4780 /* Request Boot Device */
4781 (ioc
->bios_pg2
.ReqBootDeviceForm
&
4782 MPI2_BIOSPAGE2_FORM_MASK
) ==
4783 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED
&&
4784 /* Alternate Request Boot Device */
4785 (ioc
->bios_pg2
.ReqAltBootDeviceForm
&
4786 MPI2_BIOSPAGE2_FORM_MASK
) ==
4787 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED
)
4794 * _base_unmask_events - turn on notification for this event
4795 * @ioc: per adapter object
4796 * @event: firmware event
4798 * The mask is stored in ioc->event_masks.
4801 _base_unmask_events(struct MPT3SAS_ADAPTER
*ioc
, u16 event
)
4808 desired_event
= (1 << (event
% 32));
4811 ioc
->event_masks
[0] &= ~desired_event
;
4812 else if (event
< 64)
4813 ioc
->event_masks
[1] &= ~desired_event
;
4814 else if (event
< 96)
4815 ioc
->event_masks
[2] &= ~desired_event
;
4816 else if (event
< 128)
4817 ioc
->event_masks
[3] &= ~desired_event
;
4821 * _base_event_notification - send event notification
4822 * @ioc: per adapter object
4824 * Returns 0 for success, non-zero for failure.
4827 _base_event_notification(struct MPT3SAS_ADAPTER
*ioc
)
4829 Mpi2EventNotificationRequest_t
*mpi_request
;
4834 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4837 if (ioc
->base_cmds
.status
& MPT3_CMD_PENDING
) {
4838 pr_err(MPT3SAS_FMT
"%s: internal command already in use\n",
4839 ioc
->name
, __func__
);
4843 smid
= mpt3sas_base_get_smid(ioc
, ioc
->base_cb_idx
);
4845 pr_err(MPT3SAS_FMT
"%s: failed obtaining a smid\n",
4846 ioc
->name
, __func__
);
4849 ioc
->base_cmds
.status
= MPT3_CMD_PENDING
;
4850 mpi_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
4851 ioc
->base_cmds
.smid
= smid
;
4852 memset(mpi_request
, 0, sizeof(Mpi2EventNotificationRequest_t
));
4853 mpi_request
->Function
= MPI2_FUNCTION_EVENT_NOTIFICATION
;
4854 mpi_request
->VF_ID
= 0; /* TODO */
4855 mpi_request
->VP_ID
= 0;
4856 for (i
= 0; i
< MPI2_EVENT_NOTIFY_EVENTMASK_WORDS
; i
++)
4857 mpi_request
->EventMasks
[i
] =
4858 cpu_to_le32(ioc
->event_masks
[i
]);
4859 init_completion(&ioc
->base_cmds
.done
);
4860 ioc
->put_smid_default(ioc
, smid
);
4861 wait_for_completion_timeout(&ioc
->base_cmds
.done
, 30*HZ
);
4862 if (!(ioc
->base_cmds
.status
& MPT3_CMD_COMPLETE
)) {
4863 pr_err(MPT3SAS_FMT
"%s: timeout\n",
4864 ioc
->name
, __func__
);
4865 _debug_dump_mf(mpi_request
,
4866 sizeof(Mpi2EventNotificationRequest_t
)/4);
4867 if (ioc
->base_cmds
.status
& MPT3_CMD_RESET
)
4872 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: complete\n",
4873 ioc
->name
, __func__
));
4874 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
4879 * mpt3sas_base_validate_event_type - validating event types
4880 * @ioc: per adapter object
4881 * @event: firmware event
4883 * This will turn on firmware event notification when application
4884 * ask for that event. We don't mask events that are already enabled.
4887 mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER
*ioc
, u32
*event_type
)
4890 u32 event_mask
, desired_event
;
4891 u8 send_update_to_fw
;
4893 for (i
= 0, send_update_to_fw
= 0; i
<
4894 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS
; i
++) {
4895 event_mask
= ~event_type
[i
];
4897 for (j
= 0; j
< 32; j
++) {
4898 if (!(event_mask
& desired_event
) &&
4899 (ioc
->event_masks
[i
] & desired_event
)) {
4900 ioc
->event_masks
[i
] &= ~desired_event
;
4901 send_update_to_fw
= 1;
4903 desired_event
= (desired_event
<< 1);
4907 if (!send_update_to_fw
)
4910 mutex_lock(&ioc
->base_cmds
.mutex
);
4911 _base_event_notification(ioc
);
4912 mutex_unlock(&ioc
->base_cmds
.mutex
);
4916 * _base_diag_reset - the "big hammer" start of day reset
4917 * @ioc: per adapter object
4919 * Returns 0 for success, non-zero for failure.
4922 _base_diag_reset(struct MPT3SAS_ADAPTER
*ioc
)
4924 u32 host_diagnostic
;
4929 pr_info(MPT3SAS_FMT
"sending diag reset !!\n", ioc
->name
);
4931 drsprintk(ioc
, pr_info(MPT3SAS_FMT
"clear interrupts\n",
4936 /* Write magic sequence to WriteSequence register
4937 * Loop until in diagnostic mode
4939 drsprintk(ioc
, pr_info(MPT3SAS_FMT
4940 "write magic sequence\n", ioc
->name
));
4941 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4942 writel(MPI2_WRSEQ_1ST_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4943 writel(MPI2_WRSEQ_2ND_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4944 writel(MPI2_WRSEQ_3RD_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4945 writel(MPI2_WRSEQ_4TH_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4946 writel(MPI2_WRSEQ_5TH_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4947 writel(MPI2_WRSEQ_6TH_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4955 host_diagnostic
= readl(&ioc
->chip
->HostDiagnostic
);
4956 drsprintk(ioc
, pr_info(MPT3SAS_FMT
4957 "wrote magic sequence: count(%d), host_diagnostic(0x%08x)\n",
4958 ioc
->name
, count
, host_diagnostic
));
4960 } while ((host_diagnostic
& MPI2_DIAG_DIAG_WRITE_ENABLE
) == 0);
4962 hcb_size
= readl(&ioc
->chip
->HCBSize
);
4964 drsprintk(ioc
, pr_info(MPT3SAS_FMT
"diag reset: issued\n",
4966 writel(host_diagnostic
| MPI2_DIAG_RESET_ADAPTER
,
4967 &ioc
->chip
->HostDiagnostic
);
4969 /*This delay allows the chip PCIe hardware time to finish reset tasks*/
4970 msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC
/1000);
4972 /* Approximately 300 second max wait */
4973 for (count
= 0; count
< (300000000 /
4974 MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
); count
++) {
4976 host_diagnostic
= readl(&ioc
->chip
->HostDiagnostic
);
4978 if (host_diagnostic
== 0xFFFFFFFF)
4980 if (!(host_diagnostic
& MPI2_DIAG_RESET_ADAPTER
))
4983 msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
/ 1000);
4986 if (host_diagnostic
& MPI2_DIAG_HCB_MODE
) {
4988 drsprintk(ioc
, pr_info(MPT3SAS_FMT
4989 "restart the adapter assuming the HCB Address points to good F/W\n",
4991 host_diagnostic
&= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK
;
4992 host_diagnostic
|= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW
;
4993 writel(host_diagnostic
, &ioc
->chip
->HostDiagnostic
);
4995 drsprintk(ioc
, pr_info(MPT3SAS_FMT
4996 "re-enable the HCDW\n", ioc
->name
));
4997 writel(hcb_size
| MPI2_HCB_SIZE_HCB_ENABLE
,
4998 &ioc
->chip
->HCBSize
);
5001 drsprintk(ioc
, pr_info(MPT3SAS_FMT
"restart the adapter\n",
5003 writel(host_diagnostic
& ~MPI2_DIAG_HOLD_IOC_RESET
,
5004 &ioc
->chip
->HostDiagnostic
);
5006 drsprintk(ioc
, pr_info(MPT3SAS_FMT
5007 "disable writes to the diagnostic register\n", ioc
->name
));
5008 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
5010 drsprintk(ioc
, pr_info(MPT3SAS_FMT
5011 "Wait for FW to go to the READY state\n", ioc
->name
));
5012 ioc_state
= _base_wait_on_iocstate(ioc
, MPI2_IOC_STATE_READY
, 20);
5015 "%s: failed going to ready state (ioc_state=0x%x)\n",
5016 ioc
->name
, __func__
, ioc_state
);
5020 pr_info(MPT3SAS_FMT
"diag reset: SUCCESS\n", ioc
->name
);
5024 pr_err(MPT3SAS_FMT
"diag reset: FAILED\n", ioc
->name
);
5029 * _base_make_ioc_ready - put controller in READY state
5030 * @ioc: per adapter object
5031 * @type: FORCE_BIG_HAMMER or SOFT_RESET
5033 * Returns 0 for success, non-zero for failure.
5036 _base_make_ioc_ready(struct MPT3SAS_ADAPTER
*ioc
, enum reset_type type
)
5042 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
5045 if (ioc
->pci_error_recovery
)
5048 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 0);
5049 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: ioc_state(0x%08x)\n",
5050 ioc
->name
, __func__
, ioc_state
));
5052 /* if in RESET state, it should move to READY state shortly */
5054 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_RESET
) {
5055 while ((ioc_state
& MPI2_IOC_STATE_MASK
) !=
5056 MPI2_IOC_STATE_READY
) {
5057 if (count
++ == 10) {
5059 "%s: failed going to ready state (ioc_state=0x%x)\n",
5060 ioc
->name
, __func__
, ioc_state
);
5064 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 0);
5068 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_READY
)
5071 if (ioc_state
& MPI2_DOORBELL_USED
) {
5072 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
5073 "unexpected doorbell active!\n",
5075 goto issue_diag_reset
;
5078 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_FAULT
) {
5079 mpt3sas_base_fault_info(ioc
, ioc_state
&
5080 MPI2_DOORBELL_DATA_MASK
);
5081 goto issue_diag_reset
;
5084 if (type
== FORCE_BIG_HAMMER
)
5085 goto issue_diag_reset
;
5087 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_OPERATIONAL
)
5088 if (!(_base_send_ioc_reset(ioc
,
5089 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
, 15))) {
5094 rc
= _base_diag_reset(ioc
);
5099 * _base_make_ioc_operational - put controller in OPERATIONAL state
5100 * @ioc: per adapter object
5102 * Returns 0 for success, non-zero for failure.
5105 _base_make_ioc_operational(struct MPT3SAS_ADAPTER
*ioc
)
5108 unsigned long flags
;
5111 struct _tr_list
*delayed_tr
, *delayed_tr_next
;
5112 struct _sc_list
*delayed_sc
, *delayed_sc_next
;
5113 struct _event_ack_list
*delayed_event_ack
, *delayed_event_ack_next
;
5115 struct adapter_reply_queue
*reply_q
;
5116 Mpi2ReplyDescriptorsUnion_t
*reply_post_free_contig
;
5118 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
5121 /* clean the delayed target reset list */
5122 list_for_each_entry_safe(delayed_tr
, delayed_tr_next
,
5123 &ioc
->delayed_tr_list
, list
) {
5124 list_del(&delayed_tr
->list
);
5129 list_for_each_entry_safe(delayed_tr
, delayed_tr_next
,
5130 &ioc
->delayed_tr_volume_list
, list
) {
5131 list_del(&delayed_tr
->list
);
5135 list_for_each_entry_safe(delayed_sc
, delayed_sc_next
,
5136 &ioc
->delayed_sc_list
, list
) {
5137 list_del(&delayed_sc
->list
);
5141 list_for_each_entry_safe(delayed_event_ack
, delayed_event_ack_next
,
5142 &ioc
->delayed_event_ack_list
, list
) {
5143 list_del(&delayed_event_ack
->list
);
5144 kfree(delayed_event_ack
);
5147 /* initialize the scsi lookup free list */
5148 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
5149 INIT_LIST_HEAD(&ioc
->free_list
);
5151 for (i
= 0; i
< ioc
->scsiio_depth
; i
++, smid
++) {
5152 INIT_LIST_HEAD(&ioc
->scsi_lookup
[i
].chain_list
);
5153 ioc
->scsi_lookup
[i
].cb_idx
= 0xFF;
5154 ioc
->scsi_lookup
[i
].smid
= smid
;
5155 ioc
->scsi_lookup
[i
].scmd
= NULL
;
5156 ioc
->scsi_lookup
[i
].direct_io
= 0;
5157 list_add_tail(&ioc
->scsi_lookup
[i
].tracker_list
,
5161 /* hi-priority queue */
5162 INIT_LIST_HEAD(&ioc
->hpr_free_list
);
5163 smid
= ioc
->hi_priority_smid
;
5164 for (i
= 0; i
< ioc
->hi_priority_depth
; i
++, smid
++) {
5165 ioc
->hpr_lookup
[i
].cb_idx
= 0xFF;
5166 ioc
->hpr_lookup
[i
].smid
= smid
;
5167 list_add_tail(&ioc
->hpr_lookup
[i
].tracker_list
,
5168 &ioc
->hpr_free_list
);
5171 /* internal queue */
5172 INIT_LIST_HEAD(&ioc
->internal_free_list
);
5173 smid
= ioc
->internal_smid
;
5174 for (i
= 0; i
< ioc
->internal_depth
; i
++, smid
++) {
5175 ioc
->internal_lookup
[i
].cb_idx
= 0xFF;
5176 ioc
->internal_lookup
[i
].smid
= smid
;
5177 list_add_tail(&ioc
->internal_lookup
[i
].tracker_list
,
5178 &ioc
->internal_free_list
);
5182 INIT_LIST_HEAD(&ioc
->free_chain_list
);
5183 for (i
= 0; i
< ioc
->chain_depth
; i
++)
5184 list_add_tail(&ioc
->chain_lookup
[i
].tracker_list
,
5185 &ioc
->free_chain_list
);
5187 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
5189 /* initialize Reply Free Queue */
5190 for (i
= 0, reply_address
= (u32
)ioc
->reply_dma
;
5191 i
< ioc
->reply_free_queue_depth
; i
++, reply_address
+=
5193 ioc
->reply_free
[i
] = cpu_to_le32(reply_address
);
5195 /* initialize reply queues */
5196 if (ioc
->is_driver_loading
)
5197 _base_assign_reply_queues(ioc
);
5199 /* initialize Reply Post Free Queue */
5201 reply_post_free_contig
= ioc
->reply_post
[0].reply_post_free
;
5202 list_for_each_entry(reply_q
, &ioc
->reply_queue_list
, list
) {
5204 * If RDPQ is enabled, switch to the next allocation.
5205 * Otherwise advance within the contiguous region.
5207 if (ioc
->rdpq_array_enable
) {
5208 reply_q
->reply_post_free
=
5209 ioc
->reply_post
[index
++].reply_post_free
;
5211 reply_q
->reply_post_free
= reply_post_free_contig
;
5212 reply_post_free_contig
+= ioc
->reply_post_queue_depth
;
5215 reply_q
->reply_post_host_index
= 0;
5216 for (i
= 0; i
< ioc
->reply_post_queue_depth
; i
++)
5217 reply_q
->reply_post_free
[i
].Words
=
5218 cpu_to_le64(ULLONG_MAX
);
5219 if (!_base_is_controller_msix_enabled(ioc
))
5220 goto skip_init_reply_post_free_queue
;
5222 skip_init_reply_post_free_queue
:
5224 r
= _base_send_ioc_init(ioc
);
5228 /* initialize reply free host index */
5229 ioc
->reply_free_host_index
= ioc
->reply_free_queue_depth
- 1;
5230 writel(ioc
->reply_free_host_index
, &ioc
->chip
->ReplyFreeHostIndex
);
5232 /* initialize reply post host index */
5233 list_for_each_entry(reply_q
, &ioc
->reply_queue_list
, list
) {
5234 if (ioc
->combined_reply_queue
)
5235 writel((reply_q
->msix_index
& 7)<<
5236 MPI2_RPHI_MSIX_INDEX_SHIFT
,
5237 ioc
->replyPostRegisterIndex
[reply_q
->msix_index
/8]);
5239 writel(reply_q
->msix_index
<<
5240 MPI2_RPHI_MSIX_INDEX_SHIFT
,
5241 &ioc
->chip
->ReplyPostHostIndex
);
5243 if (!_base_is_controller_msix_enabled(ioc
))
5244 goto skip_init_reply_post_host_index
;
5247 skip_init_reply_post_host_index
:
5249 _base_unmask_interrupts(ioc
);
5250 r
= _base_event_notification(ioc
);
5254 _base_static_config_pages(ioc
);
5256 if (ioc
->is_driver_loading
) {
5258 if (ioc
->is_warpdrive
&& ioc
->manu_pg10
.OEMIdentifier
5261 le32_to_cpu(ioc
->manu_pg10
.OEMSpecificFlags0
) &
5262 MFG_PAGE10_HIDE_SSDS_MASK
);
5263 if (hide_flag
!= MFG_PAGE10_HIDE_SSDS_MASK
)
5264 ioc
->mfg_pg10_hide_flag
= hide_flag
;
5267 ioc
->wait_for_discovery_to_complete
=
5268 _base_determine_wait_on_discovery(ioc
);
5270 return r
; /* scan_start and scan_finished support */
5273 r
= _base_send_port_enable(ioc
);
5281 * mpt3sas_base_free_resources - free resources controller resources
5282 * @ioc: per adapter object
5287 mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER
*ioc
)
5289 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
5292 /* synchronizing freeing resource with pci_access_mutex lock */
5293 mutex_lock(&ioc
->pci_access_mutex
);
5294 if (ioc
->chip_phys
&& ioc
->chip
) {
5295 _base_mask_interrupts(ioc
);
5296 ioc
->shost_recovery
= 1;
5297 _base_make_ioc_ready(ioc
, SOFT_RESET
);
5298 ioc
->shost_recovery
= 0;
5301 mpt3sas_base_unmap_resources(ioc
);
5302 mutex_unlock(&ioc
->pci_access_mutex
);
5307 * mpt3sas_base_attach - attach controller instance
5308 * @ioc: per adapter object
5310 * Returns 0 for success, non-zero for failure.
5313 mpt3sas_base_attach(struct MPT3SAS_ADAPTER
*ioc
)
5316 int cpu_id
, last_cpu_id
= 0;
5318 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
5321 /* setup cpu_msix_table */
5322 ioc
->cpu_count
= num_online_cpus();
5323 for_each_online_cpu(cpu_id
)
5324 last_cpu_id
= cpu_id
;
5325 ioc
->cpu_msix_table_sz
= last_cpu_id
+ 1;
5326 ioc
->cpu_msix_table
= kzalloc(ioc
->cpu_msix_table_sz
, GFP_KERNEL
);
5327 ioc
->reply_queue_count
= 1;
5328 if (!ioc
->cpu_msix_table
) {
5329 dfailprintk(ioc
, pr_info(MPT3SAS_FMT
5330 "allocation for cpu_msix_table failed!!!\n",
5333 goto out_free_resources
;
5336 if (ioc
->is_warpdrive
) {
5337 ioc
->reply_post_host_index
= kcalloc(ioc
->cpu_msix_table_sz
,
5338 sizeof(resource_size_t
*), GFP_KERNEL
);
5339 if (!ioc
->reply_post_host_index
) {
5340 dfailprintk(ioc
, pr_info(MPT3SAS_FMT
"allocation "
5341 "for cpu_msix_table failed!!!\n", ioc
->name
));
5343 goto out_free_resources
;
5347 ioc
->rdpq_array_enable_assigned
= 0;
5349 r
= mpt3sas_base_map_resources(ioc
);
5351 goto out_free_resources
;
5353 pci_set_drvdata(ioc
->pdev
, ioc
->shost
);
5354 r
= _base_get_ioc_facts(ioc
);
5356 goto out_free_resources
;
5358 switch (ioc
->hba_mpi_version_belonged
) {
5360 ioc
->build_sg_scmd
= &_base_build_sg_scmd
;
5361 ioc
->build_sg
= &_base_build_sg
;
5362 ioc
->build_zero_len_sge
= &_base_build_zero_len_sge
;
5368 * SCSI_IO, SMP_PASSTHRU, SATA_PASSTHRU, Target Assist, and
5369 * Target Status - all require the IEEE formated scatter gather
5372 ioc
->build_sg_scmd
= &_base_build_sg_scmd_ieee
;
5373 ioc
->build_sg
= &_base_build_sg_ieee
;
5374 ioc
->build_zero_len_sge
= &_base_build_zero_len_sge_ieee
;
5375 ioc
->sge_size_ieee
= sizeof(Mpi2IeeeSgeSimple64_t
);
5380 if (ioc
->atomic_desc_capable
) {
5381 ioc
->put_smid_default
= &_base_put_smid_default_atomic
;
5382 ioc
->put_smid_scsi_io
= &_base_put_smid_scsi_io_atomic
;
5383 ioc
->put_smid_fast_path
= &_base_put_smid_fast_path_atomic
;
5384 ioc
->put_smid_hi_priority
= &_base_put_smid_hi_priority_atomic
;
5386 ioc
->put_smid_default
= &_base_put_smid_default
;
5387 ioc
->put_smid_scsi_io
= &_base_put_smid_scsi_io
;
5388 ioc
->put_smid_fast_path
= &_base_put_smid_fast_path
;
5389 ioc
->put_smid_hi_priority
= &_base_put_smid_hi_priority
;
5394 * These function pointers for other requests that don't
5395 * the require IEEE scatter gather elements.
5397 * For example Configuration Pages and SAS IOUNIT Control don't.
5399 ioc
->build_sg_mpi
= &_base_build_sg
;
5400 ioc
->build_zero_len_sge_mpi
= &_base_build_zero_len_sge
;
5402 r
= _base_make_ioc_ready(ioc
, SOFT_RESET
);
5404 goto out_free_resources
;
5406 ioc
->pfacts
= kcalloc(ioc
->facts
.NumberOfPorts
,
5407 sizeof(struct mpt3sas_port_facts
), GFP_KERNEL
);
5410 goto out_free_resources
;
5413 for (i
= 0 ; i
< ioc
->facts
.NumberOfPorts
; i
++) {
5414 r
= _base_get_port_facts(ioc
, i
);
5416 goto out_free_resources
;
5419 r
= _base_allocate_memory_pools(ioc
);
5421 goto out_free_resources
;
5423 init_waitqueue_head(&ioc
->reset_wq
);
5425 /* allocate memory pd handle bitmask list */
5426 ioc
->pd_handles_sz
= (ioc
->facts
.MaxDevHandle
/ 8);
5427 if (ioc
->facts
.MaxDevHandle
% 8)
5428 ioc
->pd_handles_sz
++;
5429 ioc
->pd_handles
= kzalloc(ioc
->pd_handles_sz
,
5431 if (!ioc
->pd_handles
) {
5433 goto out_free_resources
;
5435 ioc
->blocking_handles
= kzalloc(ioc
->pd_handles_sz
,
5437 if (!ioc
->blocking_handles
) {
5439 goto out_free_resources
;
5442 /* allocate memory for pending OS device add list */
5443 ioc
->pend_os_device_add_sz
= (ioc
->facts
.MaxDevHandle
/ 8);
5444 if (ioc
->facts
.MaxDevHandle
% 8)
5445 ioc
->pend_os_device_add_sz
++;
5446 ioc
->pend_os_device_add
= kzalloc(ioc
->pend_os_device_add_sz
,
5448 if (!ioc
->pend_os_device_add
)
5449 goto out_free_resources
;
5451 ioc
->device_remove_in_progress_sz
= ioc
->pend_os_device_add_sz
;
5452 ioc
->device_remove_in_progress
=
5453 kzalloc(ioc
->device_remove_in_progress_sz
, GFP_KERNEL
);
5454 if (!ioc
->device_remove_in_progress
)
5455 goto out_free_resources
;
5457 ioc
->fwfault_debug
= mpt3sas_fwfault_debug
;
5459 /* base internal command bits */
5460 mutex_init(&ioc
->base_cmds
.mutex
);
5461 ioc
->base_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
5462 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
5464 /* port_enable command bits */
5465 ioc
->port_enable_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
5466 ioc
->port_enable_cmds
.status
= MPT3_CMD_NOT_USED
;
5468 /* transport internal command bits */
5469 ioc
->transport_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
5470 ioc
->transport_cmds
.status
= MPT3_CMD_NOT_USED
;
5471 mutex_init(&ioc
->transport_cmds
.mutex
);
5473 /* scsih internal command bits */
5474 ioc
->scsih_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
5475 ioc
->scsih_cmds
.status
= MPT3_CMD_NOT_USED
;
5476 mutex_init(&ioc
->scsih_cmds
.mutex
);
5478 /* task management internal command bits */
5479 ioc
->tm_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
5480 ioc
->tm_cmds
.status
= MPT3_CMD_NOT_USED
;
5481 mutex_init(&ioc
->tm_cmds
.mutex
);
5483 /* config page internal command bits */
5484 ioc
->config_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
5485 ioc
->config_cmds
.status
= MPT3_CMD_NOT_USED
;
5486 mutex_init(&ioc
->config_cmds
.mutex
);
5488 /* ctl module internal command bits */
5489 ioc
->ctl_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
5490 ioc
->ctl_cmds
.sense
= kzalloc(SCSI_SENSE_BUFFERSIZE
, GFP_KERNEL
);
5491 ioc
->ctl_cmds
.status
= MPT3_CMD_NOT_USED
;
5492 mutex_init(&ioc
->ctl_cmds
.mutex
);
5494 if (!ioc
->base_cmds
.reply
|| !ioc
->transport_cmds
.reply
||
5495 !ioc
->scsih_cmds
.reply
|| !ioc
->tm_cmds
.reply
||
5496 !ioc
->config_cmds
.reply
|| !ioc
->ctl_cmds
.reply
||
5497 !ioc
->ctl_cmds
.sense
) {
5499 goto out_free_resources
;
5502 for (i
= 0; i
< MPI2_EVENT_NOTIFY_EVENTMASK_WORDS
; i
++)
5503 ioc
->event_masks
[i
] = -1;
5505 /* here we enable the events we care about */
5506 _base_unmask_events(ioc
, MPI2_EVENT_SAS_DISCOVERY
);
5507 _base_unmask_events(ioc
, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE
);
5508 _base_unmask_events(ioc
, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST
);
5509 _base_unmask_events(ioc
, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE
);
5510 _base_unmask_events(ioc
, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE
);
5511 _base_unmask_events(ioc
, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST
);
5512 _base_unmask_events(ioc
, MPI2_EVENT_IR_VOLUME
);
5513 _base_unmask_events(ioc
, MPI2_EVENT_IR_PHYSICAL_DISK
);
5514 _base_unmask_events(ioc
, MPI2_EVENT_IR_OPERATION_STATUS
);
5515 _base_unmask_events(ioc
, MPI2_EVENT_LOG_ENTRY_ADDED
);
5516 _base_unmask_events(ioc
, MPI2_EVENT_TEMP_THRESHOLD
);
5517 if (ioc
->hba_mpi_version_belonged
== MPI26_VERSION
)
5518 _base_unmask_events(ioc
, MPI2_EVENT_ACTIVE_CABLE_EXCEPTION
);
5520 r
= _base_make_ioc_operational(ioc
);
5522 goto out_free_resources
;
5524 ioc
->non_operational_loop
= 0;
5529 ioc
->remove_host
= 1;
5531 mpt3sas_base_free_resources(ioc
);
5532 _base_release_memory_pools(ioc
);
5533 pci_set_drvdata(ioc
->pdev
, NULL
);
5534 kfree(ioc
->cpu_msix_table
);
5535 if (ioc
->is_warpdrive
)
5536 kfree(ioc
->reply_post_host_index
);
5537 kfree(ioc
->pd_handles
);
5538 kfree(ioc
->blocking_handles
);
5539 kfree(ioc
->device_remove_in_progress
);
5540 kfree(ioc
->pend_os_device_add
);
5541 kfree(ioc
->tm_cmds
.reply
);
5542 kfree(ioc
->transport_cmds
.reply
);
5543 kfree(ioc
->scsih_cmds
.reply
);
5544 kfree(ioc
->config_cmds
.reply
);
5545 kfree(ioc
->base_cmds
.reply
);
5546 kfree(ioc
->port_enable_cmds
.reply
);
5547 kfree(ioc
->ctl_cmds
.reply
);
5548 kfree(ioc
->ctl_cmds
.sense
);
5550 ioc
->ctl_cmds
.reply
= NULL
;
5551 ioc
->base_cmds
.reply
= NULL
;
5552 ioc
->tm_cmds
.reply
= NULL
;
5553 ioc
->scsih_cmds
.reply
= NULL
;
5554 ioc
->transport_cmds
.reply
= NULL
;
5555 ioc
->config_cmds
.reply
= NULL
;
5562 * mpt3sas_base_detach - remove controller instance
5563 * @ioc: per adapter object
5568 mpt3sas_base_detach(struct MPT3SAS_ADAPTER
*ioc
)
5570 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
5573 mpt3sas_base_stop_watchdog(ioc
);
5574 mpt3sas_base_free_resources(ioc
);
5575 _base_release_memory_pools(ioc
);
5576 pci_set_drvdata(ioc
->pdev
, NULL
);
5577 kfree(ioc
->cpu_msix_table
);
5578 if (ioc
->is_warpdrive
)
5579 kfree(ioc
->reply_post_host_index
);
5580 kfree(ioc
->pd_handles
);
5581 kfree(ioc
->blocking_handles
);
5582 kfree(ioc
->device_remove_in_progress
);
5583 kfree(ioc
->pend_os_device_add
);
5585 kfree(ioc
->ctl_cmds
.reply
);
5586 kfree(ioc
->ctl_cmds
.sense
);
5587 kfree(ioc
->base_cmds
.reply
);
5588 kfree(ioc
->port_enable_cmds
.reply
);
5589 kfree(ioc
->tm_cmds
.reply
);
5590 kfree(ioc
->transport_cmds
.reply
);
5591 kfree(ioc
->scsih_cmds
.reply
);
5592 kfree(ioc
->config_cmds
.reply
);
5596 * _base_reset_handler - reset callback handler (for base)
5597 * @ioc: per adapter object
5598 * @reset_phase: phase
5600 * The handler for doing any required cleanup or initialization.
5602 * The reset phase can be MPT3_IOC_PRE_RESET, MPT3_IOC_AFTER_RESET,
5603 * MPT3_IOC_DONE_RESET
5608 _base_reset_handler(struct MPT3SAS_ADAPTER
*ioc
, int reset_phase
)
5610 mpt3sas_scsih_reset_handler(ioc
, reset_phase
);
5611 mpt3sas_ctl_reset_handler(ioc
, reset_phase
);
5612 switch (reset_phase
) {
5613 case MPT3_IOC_PRE_RESET
:
5614 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
5615 "%s: MPT3_IOC_PRE_RESET\n", ioc
->name
, __func__
));
5617 case MPT3_IOC_AFTER_RESET
:
5618 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
5619 "%s: MPT3_IOC_AFTER_RESET\n", ioc
->name
, __func__
));
5620 if (ioc
->transport_cmds
.status
& MPT3_CMD_PENDING
) {
5621 ioc
->transport_cmds
.status
|= MPT3_CMD_RESET
;
5622 mpt3sas_base_free_smid(ioc
, ioc
->transport_cmds
.smid
);
5623 complete(&ioc
->transport_cmds
.done
);
5625 if (ioc
->base_cmds
.status
& MPT3_CMD_PENDING
) {
5626 ioc
->base_cmds
.status
|= MPT3_CMD_RESET
;
5627 mpt3sas_base_free_smid(ioc
, ioc
->base_cmds
.smid
);
5628 complete(&ioc
->base_cmds
.done
);
5630 if (ioc
->port_enable_cmds
.status
& MPT3_CMD_PENDING
) {
5631 ioc
->port_enable_failed
= 1;
5632 ioc
->port_enable_cmds
.status
|= MPT3_CMD_RESET
;
5633 mpt3sas_base_free_smid(ioc
, ioc
->port_enable_cmds
.smid
);
5634 if (ioc
->is_driver_loading
) {
5635 ioc
->start_scan_failed
=
5636 MPI2_IOCSTATUS_INTERNAL_ERROR
;
5637 ioc
->start_scan
= 0;
5638 ioc
->port_enable_cmds
.status
=
5641 complete(&ioc
->port_enable_cmds
.done
);
5643 if (ioc
->config_cmds
.status
& MPT3_CMD_PENDING
) {
5644 ioc
->config_cmds
.status
|= MPT3_CMD_RESET
;
5645 mpt3sas_base_free_smid(ioc
, ioc
->config_cmds
.smid
);
5646 ioc
->config_cmds
.smid
= USHRT_MAX
;
5647 complete(&ioc
->config_cmds
.done
);
5650 case MPT3_IOC_DONE_RESET
:
5651 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
5652 "%s: MPT3_IOC_DONE_RESET\n", ioc
->name
, __func__
));
5658 * _wait_for_commands_to_complete - reset controller
5659 * @ioc: Pointer to MPT_ADAPTER structure
5661 * This function waiting(3s) for all pending commands to complete
5662 * prior to putting controller in reset.
5665 _wait_for_commands_to_complete(struct MPT3SAS_ADAPTER
*ioc
)
5668 unsigned long flags
;
5671 ioc
->pending_io_count
= 0;
5673 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 0);
5674 if ((ioc_state
& MPI2_IOC_STATE_MASK
) != MPI2_IOC_STATE_OPERATIONAL
)
5677 /* pending command count */
5678 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
5679 for (i
= 0; i
< ioc
->scsiio_depth
; i
++)
5680 if (ioc
->scsi_lookup
[i
].cb_idx
!= 0xFF)
5681 ioc
->pending_io_count
++;
5682 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
5684 if (!ioc
->pending_io_count
)
5687 /* wait for pending commands to complete */
5688 wait_event_timeout(ioc
->reset_wq
, ioc
->pending_io_count
== 0, 10 * HZ
);
5692 * mpt3sas_base_hard_reset_handler - reset controller
5693 * @ioc: Pointer to MPT_ADAPTER structure
5694 * @type: FORCE_BIG_HAMMER or SOFT_RESET
5696 * Returns 0 for success, non-zero for failure.
5699 mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER
*ioc
,
5700 enum reset_type type
)
5703 unsigned long flags
;
5705 u8 is_fault
= 0, is_trigger
= 0;
5707 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: enter\n", ioc
->name
,
5710 if (ioc
->pci_error_recovery
) {
5711 pr_err(MPT3SAS_FMT
"%s: pci error recovery reset\n",
5712 ioc
->name
, __func__
);
5717 if (mpt3sas_fwfault_debug
)
5718 mpt3sas_halt_firmware(ioc
);
5720 /* wait for an active reset in progress to complete */
5721 if (!mutex_trylock(&ioc
->reset_in_progress_mutex
)) {
5724 } while (ioc
->shost_recovery
== 1);
5725 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: exit\n", ioc
->name
,
5727 return ioc
->ioc_reset_in_progress_status
;
5730 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
5731 ioc
->shost_recovery
= 1;
5732 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
5734 if ((ioc
->diag_buffer_status
[MPI2_DIAG_BUF_TYPE_TRACE
] &
5735 MPT3_DIAG_BUFFER_IS_REGISTERED
) &&
5736 (!(ioc
->diag_buffer_status
[MPI2_DIAG_BUF_TYPE_TRACE
] &
5737 MPT3_DIAG_BUFFER_IS_RELEASED
))) {
5739 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 0);
5740 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_FAULT
)
5743 _base_reset_handler(ioc
, MPT3_IOC_PRE_RESET
);
5744 _wait_for_commands_to_complete(ioc
);
5745 _base_mask_interrupts(ioc
);
5746 r
= _base_make_ioc_ready(ioc
, type
);
5749 _base_reset_handler(ioc
, MPT3_IOC_AFTER_RESET
);
5751 /* If this hard reset is called while port enable is active, then
5752 * there is no reason to call make_ioc_operational
5754 if (ioc
->is_driver_loading
&& ioc
->port_enable_failed
) {
5755 ioc
->remove_host
= 1;
5759 r
= _base_get_ioc_facts(ioc
);
5763 if (ioc
->rdpq_array_enable
&& !ioc
->rdpq_array_capable
)
5764 panic("%s: Issue occurred with flashing controller firmware."
5765 "Please reboot the system and ensure that the correct"
5766 " firmware version is running\n", ioc
->name
);
5768 r
= _base_make_ioc_operational(ioc
);
5770 _base_reset_handler(ioc
, MPT3_IOC_DONE_RESET
);
5773 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: %s\n",
5774 ioc
->name
, __func__
, ((r
== 0) ? "SUCCESS" : "FAILED")));
5776 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
5777 ioc
->ioc_reset_in_progress_status
= r
;
5778 ioc
->shost_recovery
= 0;
5779 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
5780 ioc
->ioc_reset_count
++;
5781 mutex_unlock(&ioc
->reset_in_progress_mutex
);
5784 if ((r
== 0) && is_trigger
) {
5786 mpt3sas_trigger_master(ioc
, MASTER_TRIGGER_FW_FAULT
);
5788 mpt3sas_trigger_master(ioc
,
5789 MASTER_TRIGGER_ADAPTER_RESET
);
5791 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: exit\n", ioc
->name
,