2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
5 * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.c
6 * Copyright (C) 2012-2014 LSI Corporation
7 * Copyright (C) 2013-2014 Avago Technologies
8 * (mailto: MPT-FusionLinux.pdl@avagotech.com)
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
21 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
22 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
24 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
25 * solely responsible for determining the appropriateness of using and
26 * distributing the Program and assumes all risks associated with its
27 * exercise of rights under this Agreement, including but not limited to
28 * the risks and costs of program errors, damage to or loss of data,
29 * programs or equipment, and unavailability or interruption of operations.
31 * DISCLAIMER OF LIABILITY
32 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
36 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
37 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
38 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
40 * You should have received a copy of the GNU General Public License
41 * along with this program; if not, write to the Free Software
42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
46 #include <linux/kernel.h>
47 #include <linux/module.h>
48 #include <linux/errno.h>
49 #include <linux/init.h>
50 #include <linux/slab.h>
51 #include <linux/types.h>
52 #include <linux/pci.h>
53 #include <linux/kdev_t.h>
54 #include <linux/blkdev.h>
55 #include <linux/delay.h>
56 #include <linux/interrupt.h>
57 #include <linux/dma-mapping.h>
59 #include <linux/time.h>
60 #include <linux/ktime.h>
61 #include <linux/kthread.h>
62 #include <linux/aer.h>
65 #include "mpt3sas_base.h"
67 static MPT_CALLBACK mpt_callbacks
[MPT_MAX_CALLBACKS
];
70 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
72 /* maximum controller queue depth */
73 #define MAX_HBA_QUEUE_DEPTH 30000
74 #define MAX_CHAIN_DEPTH 100000
75 static int max_queue_depth
= -1;
76 module_param(max_queue_depth
, int, 0);
77 MODULE_PARM_DESC(max_queue_depth
, " max controller queue depth ");
79 static int max_sgl_entries
= -1;
80 module_param(max_sgl_entries
, int, 0);
81 MODULE_PARM_DESC(max_sgl_entries
, " max sg entries ");
83 static int msix_disable
= -1;
84 module_param(msix_disable
, int, 0);
85 MODULE_PARM_DESC(msix_disable
, " disable msix routed interrupts (default=0)");
87 static int smp_affinity_enable
= 1;
88 module_param(smp_affinity_enable
, int, S_IRUGO
);
89 MODULE_PARM_DESC(smp_affinity_enable
, "SMP affinity feature enable/disbale Default: enable(1)");
91 static int max_msix_vectors
= -1;
92 module_param(max_msix_vectors
, int, 0);
93 MODULE_PARM_DESC(max_msix_vectors
,
96 static int mpt3sas_fwfault_debug
;
97 MODULE_PARM_DESC(mpt3sas_fwfault_debug
,
98 " enable detection of firmware fault and halt firmware - (default=0)");
101 _base_get_ioc_facts(struct MPT3SAS_ADAPTER
*ioc
);
104 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
108 _scsih_set_fwfault_debug(const char *val
, struct kernel_param
*kp
)
110 int ret
= param_set_int(val
, kp
);
111 struct MPT3SAS_ADAPTER
*ioc
;
116 /* global ioc spinlock to protect controller list on list operations */
117 pr_info("setting fwfault_debug(%d)\n", mpt3sas_fwfault_debug
);
118 spin_lock(&gioc_lock
);
119 list_for_each_entry(ioc
, &mpt3sas_ioc_list
, list
)
120 ioc
->fwfault_debug
= mpt3sas_fwfault_debug
;
121 spin_unlock(&gioc_lock
);
124 module_param_call(mpt3sas_fwfault_debug
, _scsih_set_fwfault_debug
,
125 param_get_int
, &mpt3sas_fwfault_debug
, 0644);
128 * mpt3sas_remove_dead_ioc_func - kthread context to remove dead ioc
129 * @arg: input argument, used to derive ioc
131 * Return 0 if controller is removed from pci subsystem.
132 * Return -1 for other case.
134 static int mpt3sas_remove_dead_ioc_func(void *arg
)
136 struct MPT3SAS_ADAPTER
*ioc
= (struct MPT3SAS_ADAPTER
*)arg
;
137 struct pci_dev
*pdev
;
145 pci_stop_and_remove_bus_device_locked(pdev
);
150 * _base_fault_reset_work - workq handling ioc fault conditions
151 * @work: input argument, used to derive ioc
157 _base_fault_reset_work(struct work_struct
*work
)
159 struct MPT3SAS_ADAPTER
*ioc
=
160 container_of(work
, struct MPT3SAS_ADAPTER
, fault_reset_work
.work
);
164 struct task_struct
*p
;
167 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
168 if (ioc
->shost_recovery
|| ioc
->pci_error_recovery
)
170 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
172 doorbell
= mpt3sas_base_get_iocstate(ioc
, 0);
173 if ((doorbell
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_MASK
) {
174 pr_err(MPT3SAS_FMT
"SAS host is non-operational !!!!\n",
177 /* It may be possible that EEH recovery can resolve some of
178 * pci bus failure issues rather removing the dead ioc function
179 * by considering controller is in a non-operational state. So
180 * here priority is given to the EEH recovery. If it doesn't
181 * not resolve this issue, mpt3sas driver will consider this
182 * controller to non-operational state and remove the dead ioc
185 if (ioc
->non_operational_loop
++ < 5) {
186 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
,
192 * Call _scsih_flush_pending_cmds callback so that we flush all
193 * pending commands back to OS. This call is required to aovid
194 * deadlock at block layer. Dead IOC will fail to do diag reset,
195 * and this call is safe since dead ioc will never return any
196 * command back from HW.
198 ioc
->schedule_dead_ioc_flush_running_cmds(ioc
);
200 * Set remove_host flag early since kernel thread will
201 * take some time to execute.
203 ioc
->remove_host
= 1;
204 /*Remove the Dead Host */
205 p
= kthread_run(mpt3sas_remove_dead_ioc_func
, ioc
,
206 "%s_dead_ioc_%d", ioc
->driver_name
, ioc
->id
);
209 "%s: Running mpt3sas_dead_ioc thread failed !!!!\n",
210 ioc
->name
, __func__
);
213 "%s: Running mpt3sas_dead_ioc thread success !!!!\n",
214 ioc
->name
, __func__
);
215 return; /* don't rearm timer */
218 ioc
->non_operational_loop
= 0;
220 if ((doorbell
& MPI2_IOC_STATE_MASK
) != MPI2_IOC_STATE_OPERATIONAL
) {
221 rc
= mpt3sas_base_hard_reset_handler(ioc
, FORCE_BIG_HAMMER
);
222 pr_warn(MPT3SAS_FMT
"%s: hard reset: %s\n", ioc
->name
,
223 __func__
, (rc
== 0) ? "success" : "failed");
224 doorbell
= mpt3sas_base_get_iocstate(ioc
, 0);
225 if ((doorbell
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_FAULT
)
226 mpt3sas_base_fault_info(ioc
, doorbell
&
227 MPI2_DOORBELL_DATA_MASK
);
228 if (rc
&& (doorbell
& MPI2_IOC_STATE_MASK
) !=
229 MPI2_IOC_STATE_OPERATIONAL
)
230 return; /* don't rearm timer */
233 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
235 if (ioc
->fault_reset_work_q
)
236 queue_delayed_work(ioc
->fault_reset_work_q
,
237 &ioc
->fault_reset_work
,
238 msecs_to_jiffies(FAULT_POLLING_INTERVAL
));
239 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
243 * mpt3sas_base_start_watchdog - start the fault_reset_work_q
244 * @ioc: per adapter object
250 mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER
*ioc
)
254 if (ioc
->fault_reset_work_q
)
257 /* initialize fault polling */
259 INIT_DELAYED_WORK(&ioc
->fault_reset_work
, _base_fault_reset_work
);
260 snprintf(ioc
->fault_reset_work_q_name
,
261 sizeof(ioc
->fault_reset_work_q_name
), "poll_%s%d_status",
262 ioc
->driver_name
, ioc
->id
);
263 ioc
->fault_reset_work_q
=
264 create_singlethread_workqueue(ioc
->fault_reset_work_q_name
);
265 if (!ioc
->fault_reset_work_q
) {
266 pr_err(MPT3SAS_FMT
"%s: failed (line=%d)\n",
267 ioc
->name
, __func__
, __LINE__
);
270 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
271 if (ioc
->fault_reset_work_q
)
272 queue_delayed_work(ioc
->fault_reset_work_q
,
273 &ioc
->fault_reset_work
,
274 msecs_to_jiffies(FAULT_POLLING_INTERVAL
));
275 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
279 * mpt3sas_base_stop_watchdog - stop the fault_reset_work_q
280 * @ioc: per adapter object
286 mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER
*ioc
)
289 struct workqueue_struct
*wq
;
291 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
292 wq
= ioc
->fault_reset_work_q
;
293 ioc
->fault_reset_work_q
= NULL
;
294 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
296 if (!cancel_delayed_work_sync(&ioc
->fault_reset_work
))
298 destroy_workqueue(wq
);
303 * mpt3sas_base_fault_info - verbose translation of firmware FAULT code
304 * @ioc: per adapter object
305 * @fault_code: fault code
310 mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER
*ioc
, u16 fault_code
)
312 pr_err(MPT3SAS_FMT
"fault_state(0x%04x)!\n",
313 ioc
->name
, fault_code
);
317 * mpt3sas_halt_firmware - halt's mpt controller firmware
318 * @ioc: per adapter object
320 * For debugging timeout related issues. Writing 0xCOFFEE00
321 * to the doorbell register will halt controller firmware. With
322 * the purpose to stop both driver and firmware, the enduser can
323 * obtain a ring buffer from controller UART.
326 mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER
*ioc
)
330 if (!ioc
->fwfault_debug
)
335 doorbell
= readl(&ioc
->chip
->Doorbell
);
336 if ((doorbell
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_FAULT
)
337 mpt3sas_base_fault_info(ioc
, doorbell
);
339 writel(0xC0FFEE00, &ioc
->chip
->Doorbell
);
340 pr_err(MPT3SAS_FMT
"Firmware is halted due to command timeout\n",
344 if (ioc
->fwfault_debug
== 2)
348 panic("panic in %s\n", __func__
);
352 * _base_sas_ioc_info - verbose translation of the ioc status
353 * @ioc: per adapter object
354 * @mpi_reply: reply mf payload returned from firmware
355 * @request_hdr: request mf
360 _base_sas_ioc_info(struct MPT3SAS_ADAPTER
*ioc
, MPI2DefaultReply_t
*mpi_reply
,
361 MPI2RequestHeader_t
*request_hdr
)
363 u16 ioc_status
= le16_to_cpu(mpi_reply
->IOCStatus
) &
367 char *func_str
= NULL
;
369 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
370 if (request_hdr
->Function
== MPI2_FUNCTION_SCSI_IO_REQUEST
||
371 request_hdr
->Function
== MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH
||
372 request_hdr
->Function
== MPI2_FUNCTION_EVENT_NOTIFICATION
)
375 if (ioc_status
== MPI2_IOCSTATUS_CONFIG_INVALID_PAGE
)
378 switch (ioc_status
) {
380 /****************************************************************************
381 * Common IOCStatus values for all replies
382 ****************************************************************************/
384 case MPI2_IOCSTATUS_INVALID_FUNCTION
:
385 desc
= "invalid function";
387 case MPI2_IOCSTATUS_BUSY
:
390 case MPI2_IOCSTATUS_INVALID_SGL
:
391 desc
= "invalid sgl";
393 case MPI2_IOCSTATUS_INTERNAL_ERROR
:
394 desc
= "internal error";
396 case MPI2_IOCSTATUS_INVALID_VPID
:
397 desc
= "invalid vpid";
399 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES
:
400 desc
= "insufficient resources";
402 case MPI2_IOCSTATUS_INSUFFICIENT_POWER
:
403 desc
= "insufficient power";
405 case MPI2_IOCSTATUS_INVALID_FIELD
:
406 desc
= "invalid field";
408 case MPI2_IOCSTATUS_INVALID_STATE
:
409 desc
= "invalid state";
411 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED
:
412 desc
= "op state not supported";
415 /****************************************************************************
416 * Config IOCStatus values
417 ****************************************************************************/
419 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION
:
420 desc
= "config invalid action";
422 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE
:
423 desc
= "config invalid type";
425 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE
:
426 desc
= "config invalid page";
428 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA
:
429 desc
= "config invalid data";
431 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS
:
432 desc
= "config no defaults";
434 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT
:
435 desc
= "config cant commit";
438 /****************************************************************************
440 ****************************************************************************/
442 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR
:
443 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE
:
444 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE
:
445 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN
:
446 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN
:
447 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR
:
448 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR
:
449 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED
:
450 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH
:
451 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED
:
452 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED
:
453 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED
:
456 /****************************************************************************
457 * For use by SCSI Initiator and SCSI Target end-to-end data protection
458 ****************************************************************************/
460 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR
:
461 desc
= "eedp guard error";
463 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR
:
464 desc
= "eedp ref tag error";
466 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR
:
467 desc
= "eedp app tag error";
470 /****************************************************************************
472 ****************************************************************************/
474 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX
:
475 desc
= "target invalid io index";
477 case MPI2_IOCSTATUS_TARGET_ABORTED
:
478 desc
= "target aborted";
480 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE
:
481 desc
= "target no conn retryable";
483 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION
:
484 desc
= "target no connection";
486 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH
:
487 desc
= "target xfer count mismatch";
489 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR
:
490 desc
= "target data offset error";
492 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA
:
493 desc
= "target too much write data";
495 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT
:
496 desc
= "target iu too short";
498 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT
:
499 desc
= "target ack nak timeout";
501 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED
:
502 desc
= "target nak received";
505 /****************************************************************************
506 * Serial Attached SCSI values
507 ****************************************************************************/
509 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED
:
510 desc
= "smp request failed";
512 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN
:
513 desc
= "smp data overrun";
516 /****************************************************************************
517 * Diagnostic Buffer Post / Diagnostic Release values
518 ****************************************************************************/
520 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED
:
521 desc
= "diagnostic released";
530 switch (request_hdr
->Function
) {
531 case MPI2_FUNCTION_CONFIG
:
532 frame_sz
= sizeof(Mpi2ConfigRequest_t
) + ioc
->sge_size
;
533 func_str
= "config_page";
535 case MPI2_FUNCTION_SCSI_TASK_MGMT
:
536 frame_sz
= sizeof(Mpi2SCSITaskManagementRequest_t
);
537 func_str
= "task_mgmt";
539 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL
:
540 frame_sz
= sizeof(Mpi2SasIoUnitControlRequest_t
);
541 func_str
= "sas_iounit_ctl";
543 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR
:
544 frame_sz
= sizeof(Mpi2SepRequest_t
);
545 func_str
= "enclosure";
547 case MPI2_FUNCTION_IOC_INIT
:
548 frame_sz
= sizeof(Mpi2IOCInitRequest_t
);
549 func_str
= "ioc_init";
551 case MPI2_FUNCTION_PORT_ENABLE
:
552 frame_sz
= sizeof(Mpi2PortEnableRequest_t
);
553 func_str
= "port_enable";
555 case MPI2_FUNCTION_SMP_PASSTHROUGH
:
556 frame_sz
= sizeof(Mpi2SmpPassthroughRequest_t
) + ioc
->sge_size
;
557 func_str
= "smp_passthru";
561 func_str
= "unknown";
565 pr_warn(MPT3SAS_FMT
"ioc_status: %s(0x%04x), request(0x%p),(%s)\n",
566 ioc
->name
, desc
, ioc_status
, request_hdr
, func_str
);
568 _debug_dump_mf(request_hdr
, frame_sz
/4);
572 * _base_display_event_data - verbose translation of firmware asyn events
573 * @ioc: per adapter object
574 * @mpi_reply: reply mf payload returned from firmware
579 _base_display_event_data(struct MPT3SAS_ADAPTER
*ioc
,
580 Mpi2EventNotificationReply_t
*mpi_reply
)
585 if (!(ioc
->logging_level
& MPT_DEBUG_EVENTS
))
588 event
= le16_to_cpu(mpi_reply
->Event
);
591 case MPI2_EVENT_LOG_DATA
:
594 case MPI2_EVENT_STATE_CHANGE
:
595 desc
= "Status Change";
597 case MPI2_EVENT_HARD_RESET_RECEIVED
:
598 desc
= "Hard Reset Received";
600 case MPI2_EVENT_EVENT_CHANGE
:
601 desc
= "Event Change";
603 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE
:
604 desc
= "Device Status Change";
606 case MPI2_EVENT_IR_OPERATION_STATUS
:
607 if (!ioc
->hide_ir_msg
)
608 desc
= "IR Operation Status";
610 case MPI2_EVENT_SAS_DISCOVERY
:
612 Mpi2EventDataSasDiscovery_t
*event_data
=
613 (Mpi2EventDataSasDiscovery_t
*)mpi_reply
->EventData
;
614 pr_info(MPT3SAS_FMT
"Discovery: (%s)", ioc
->name
,
615 (event_data
->ReasonCode
== MPI2_EVENT_SAS_DISC_RC_STARTED
) ?
617 if (event_data
->DiscoveryStatus
)
618 pr_info("discovery_status(0x%08x)",
619 le32_to_cpu(event_data
->DiscoveryStatus
));
623 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE
:
624 desc
= "SAS Broadcast Primitive";
626 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE
:
627 desc
= "SAS Init Device Status Change";
629 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW
:
630 desc
= "SAS Init Table Overflow";
632 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST
:
633 desc
= "SAS Topology Change List";
635 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE
:
636 desc
= "SAS Enclosure Device Status Change";
638 case MPI2_EVENT_IR_VOLUME
:
639 if (!ioc
->hide_ir_msg
)
642 case MPI2_EVENT_IR_PHYSICAL_DISK
:
643 if (!ioc
->hide_ir_msg
)
644 desc
= "IR Physical Disk";
646 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST
:
647 if (!ioc
->hide_ir_msg
)
648 desc
= "IR Configuration Change List";
650 case MPI2_EVENT_LOG_ENTRY_ADDED
:
651 if (!ioc
->hide_ir_msg
)
652 desc
= "Log Entry Added";
654 case MPI2_EVENT_TEMP_THRESHOLD
:
655 desc
= "Temperature Threshold";
657 case MPI2_EVENT_ACTIVE_CABLE_EXCEPTION
:
658 desc
= "Active cable exception";
665 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
, desc
);
669 * _base_sas_log_info - verbose translation of firmware log info
670 * @ioc: per adapter object
671 * @log_info: log info
676 _base_sas_log_info(struct MPT3SAS_ADAPTER
*ioc
, u32 log_info
)
687 union loginfo_type sas_loginfo
;
688 char *originator_str
= NULL
;
690 sas_loginfo
.loginfo
= log_info
;
691 if (sas_loginfo
.dw
.bus_type
!= 3 /*SAS*/)
694 /* each nexus loss loginfo */
695 if (log_info
== 0x31170000)
698 /* eat the loginfos associated with task aborts */
699 if (ioc
->ignore_loginfos
&& (log_info
== 0x30050000 || log_info
==
700 0x31140000 || log_info
== 0x31130000))
703 switch (sas_loginfo
.dw
.originator
) {
705 originator_str
= "IOP";
708 originator_str
= "PL";
711 if (!ioc
->hide_ir_msg
)
712 originator_str
= "IR";
714 originator_str
= "WarpDrive";
719 "log_info(0x%08x): originator(%s), code(0x%02x), sub_code(0x%04x)\n",
721 originator_str
, sas_loginfo
.dw
.code
,
722 sas_loginfo
.dw
.subcode
);
726 * _base_display_reply_info -
727 * @ioc: per adapter object
728 * @smid: system request message index
729 * @msix_index: MSIX table index supplied by the OS
730 * @reply: reply message frame(lower 32bit addr)
735 _base_display_reply_info(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
, u8 msix_index
,
738 MPI2DefaultReply_t
*mpi_reply
;
742 mpi_reply
= mpt3sas_base_get_reply_virt_addr(ioc
, reply
);
743 if (unlikely(!mpi_reply
)) {
744 pr_err(MPT3SAS_FMT
"mpi_reply not valid at %s:%d/%s()!\n",
745 ioc
->name
, __FILE__
, __LINE__
, __func__
);
748 ioc_status
= le16_to_cpu(mpi_reply
->IOCStatus
);
750 if ((ioc_status
& MPI2_IOCSTATUS_MASK
) &&
751 (ioc
->logging_level
& MPT_DEBUG_REPLY
)) {
752 _base_sas_ioc_info(ioc
, mpi_reply
,
753 mpt3sas_base_get_msg_frame(ioc
, smid
));
756 if (ioc_status
& MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE
) {
757 loginfo
= le32_to_cpu(mpi_reply
->IOCLogInfo
);
758 _base_sas_log_info(ioc
, loginfo
);
761 if (ioc_status
|| loginfo
) {
762 ioc_status
&= MPI2_IOCSTATUS_MASK
;
763 mpt3sas_trigger_mpi(ioc
, ioc_status
, loginfo
);
768 * mpt3sas_base_done - base internal command completion routine
769 * @ioc: per adapter object
770 * @smid: system request message index
771 * @msix_index: MSIX table index supplied by the OS
772 * @reply: reply message frame(lower 32bit addr)
774 * Return 1 meaning mf should be freed from _base_interrupt
775 * 0 means the mf is freed from this function.
778 mpt3sas_base_done(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
, u8 msix_index
,
781 MPI2DefaultReply_t
*mpi_reply
;
783 mpi_reply
= mpt3sas_base_get_reply_virt_addr(ioc
, reply
);
784 if (mpi_reply
&& mpi_reply
->Function
== MPI2_FUNCTION_EVENT_ACK
)
785 return mpt3sas_check_for_pending_internal_cmds(ioc
, smid
);
787 if (ioc
->base_cmds
.status
== MPT3_CMD_NOT_USED
)
790 ioc
->base_cmds
.status
|= MPT3_CMD_COMPLETE
;
792 ioc
->base_cmds
.status
|= MPT3_CMD_REPLY_VALID
;
793 memcpy(ioc
->base_cmds
.reply
, mpi_reply
, mpi_reply
->MsgLength
*4);
795 ioc
->base_cmds
.status
&= ~MPT3_CMD_PENDING
;
797 complete(&ioc
->base_cmds
.done
);
802 * _base_async_event - main callback handler for firmware asyn events
803 * @ioc: per adapter object
804 * @msix_index: MSIX table index supplied by the OS
805 * @reply: reply message frame(lower 32bit addr)
807 * Return 1 meaning mf should be freed from _base_interrupt
808 * 0 means the mf is freed from this function.
811 _base_async_event(struct MPT3SAS_ADAPTER
*ioc
, u8 msix_index
, u32 reply
)
813 Mpi2EventNotificationReply_t
*mpi_reply
;
814 Mpi2EventAckRequest_t
*ack_request
;
816 struct _event_ack_list
*delayed_event_ack
;
818 mpi_reply
= mpt3sas_base_get_reply_virt_addr(ioc
, reply
);
821 if (mpi_reply
->Function
!= MPI2_FUNCTION_EVENT_NOTIFICATION
)
824 _base_display_event_data(ioc
, mpi_reply
);
826 if (!(mpi_reply
->AckRequired
& MPI2_EVENT_NOTIFICATION_ACK_REQUIRED
))
828 smid
= mpt3sas_base_get_smid(ioc
, ioc
->base_cb_idx
);
830 delayed_event_ack
= kzalloc(sizeof(*delayed_event_ack
),
832 if (!delayed_event_ack
)
834 INIT_LIST_HEAD(&delayed_event_ack
->list
);
835 delayed_event_ack
->Event
= mpi_reply
->Event
;
836 delayed_event_ack
->EventContext
= mpi_reply
->EventContext
;
837 list_add_tail(&delayed_event_ack
->list
,
838 &ioc
->delayed_event_ack_list
);
839 dewtprintk(ioc
, pr_info(MPT3SAS_FMT
840 "DELAYED: EVENT ACK: event (0x%04x)\n",
841 ioc
->name
, le16_to_cpu(mpi_reply
->Event
)));
845 ack_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
846 memset(ack_request
, 0, sizeof(Mpi2EventAckRequest_t
));
847 ack_request
->Function
= MPI2_FUNCTION_EVENT_ACK
;
848 ack_request
->Event
= mpi_reply
->Event
;
849 ack_request
->EventContext
= mpi_reply
->EventContext
;
850 ack_request
->VF_ID
= 0; /* TODO */
851 ack_request
->VP_ID
= 0;
852 ioc
->put_smid_default(ioc
, smid
);
856 /* scsih callback handler */
857 mpt3sas_scsih_event_callback(ioc
, msix_index
, reply
);
859 /* ctl callback handler */
860 mpt3sas_ctl_event_callback(ioc
, msix_index
, reply
);
866 * _base_get_cb_idx - obtain the callback index
867 * @ioc: per adapter object
868 * @smid: system request message index
870 * Return callback index.
873 _base_get_cb_idx(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
878 if (smid
< ioc
->hi_priority_smid
) {
880 cb_idx
= ioc
->scsi_lookup
[i
].cb_idx
;
881 } else if (smid
< ioc
->internal_smid
) {
882 i
= smid
- ioc
->hi_priority_smid
;
883 cb_idx
= ioc
->hpr_lookup
[i
].cb_idx
;
884 } else if (smid
<= ioc
->hba_queue_depth
) {
885 i
= smid
- ioc
->internal_smid
;
886 cb_idx
= ioc
->internal_lookup
[i
].cb_idx
;
893 * _base_mask_interrupts - disable interrupts
894 * @ioc: per adapter object
896 * Disabling ResetIRQ, Reply and Doorbell Interrupts
901 _base_mask_interrupts(struct MPT3SAS_ADAPTER
*ioc
)
905 ioc
->mask_interrupts
= 1;
906 him_register
= readl(&ioc
->chip
->HostInterruptMask
);
907 him_register
|= MPI2_HIM_DIM
+ MPI2_HIM_RIM
+ MPI2_HIM_RESET_IRQ_MASK
;
908 writel(him_register
, &ioc
->chip
->HostInterruptMask
);
909 readl(&ioc
->chip
->HostInterruptMask
);
913 * _base_unmask_interrupts - enable interrupts
914 * @ioc: per adapter object
916 * Enabling only Reply Interrupts
921 _base_unmask_interrupts(struct MPT3SAS_ADAPTER
*ioc
)
925 him_register
= readl(&ioc
->chip
->HostInterruptMask
);
926 him_register
&= ~MPI2_HIM_RIM
;
927 writel(him_register
, &ioc
->chip
->HostInterruptMask
);
928 ioc
->mask_interrupts
= 0;
931 union reply_descriptor
{
940 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
941 * @irq: irq number (not used)
942 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
943 * @r: pt_regs pointer (not used)
945 * Return IRQ_HANDLE if processed, else IRQ_NONE.
948 _base_interrupt(int irq
, void *bus_id
)
950 struct adapter_reply_queue
*reply_q
= bus_id
;
951 union reply_descriptor rd
;
953 u8 request_desript_type
;
957 u8 msix_index
= reply_q
->msix_index
;
958 struct MPT3SAS_ADAPTER
*ioc
= reply_q
->ioc
;
959 Mpi2ReplyDescriptorsUnion_t
*rpf
;
962 if (ioc
->mask_interrupts
)
965 if (!atomic_add_unless(&reply_q
->busy
, 1, 1))
968 rpf
= &reply_q
->reply_post_free
[reply_q
->reply_post_host_index
];
969 request_desript_type
= rpf
->Default
.ReplyFlags
970 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK
;
971 if (request_desript_type
== MPI2_RPY_DESCRIPT_FLAGS_UNUSED
) {
972 atomic_dec(&reply_q
->busy
);
979 rd
.word
= le64_to_cpu(rpf
->Words
);
980 if (rd
.u
.low
== UINT_MAX
|| rd
.u
.high
== UINT_MAX
)
983 smid
= le16_to_cpu(rpf
->Default
.DescriptorTypeDependent1
);
984 if (request_desript_type
==
985 MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS
||
986 request_desript_type
==
987 MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS
) {
988 cb_idx
= _base_get_cb_idx(ioc
, smid
);
989 if ((likely(cb_idx
< MPT_MAX_CALLBACKS
)) &&
990 (likely(mpt_callbacks
[cb_idx
] != NULL
))) {
991 rc
= mpt_callbacks
[cb_idx
](ioc
, smid
,
994 mpt3sas_base_free_smid(ioc
, smid
);
996 } else if (request_desript_type
==
997 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY
) {
999 rpf
->AddressReply
.ReplyFrameAddress
);
1000 if (reply
> ioc
->reply_dma_max_address
||
1001 reply
< ioc
->reply_dma_min_address
)
1004 cb_idx
= _base_get_cb_idx(ioc
, smid
);
1005 if ((likely(cb_idx
< MPT_MAX_CALLBACKS
)) &&
1006 (likely(mpt_callbacks
[cb_idx
] != NULL
))) {
1007 rc
= mpt_callbacks
[cb_idx
](ioc
, smid
,
1010 _base_display_reply_info(ioc
,
1011 smid
, msix_index
, reply
);
1013 mpt3sas_base_free_smid(ioc
,
1017 _base_async_event(ioc
, msix_index
, reply
);
1020 /* reply free queue handling */
1022 ioc
->reply_free_host_index
=
1023 (ioc
->reply_free_host_index
==
1024 (ioc
->reply_free_queue_depth
- 1)) ?
1025 0 : ioc
->reply_free_host_index
+ 1;
1026 ioc
->reply_free
[ioc
->reply_free_host_index
] =
1028 writel(ioc
->reply_free_host_index
,
1029 &ioc
->chip
->ReplyFreeHostIndex
);
1033 rpf
->Words
= cpu_to_le64(ULLONG_MAX
);
1034 reply_q
->reply_post_host_index
=
1035 (reply_q
->reply_post_host_index
==
1036 (ioc
->reply_post_queue_depth
- 1)) ? 0 :
1037 reply_q
->reply_post_host_index
+ 1;
1038 request_desript_type
=
1039 reply_q
->reply_post_free
[reply_q
->reply_post_host_index
].
1040 Default
.ReplyFlags
& MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK
;
1042 /* Update the reply post host index after continuously
1043 * processing the threshold number of Reply Descriptors.
1044 * So that FW can find enough entries to post the Reply
1045 * Descriptors in the reply descriptor post queue.
1047 if (completed_cmds
> ioc
->hba_queue_depth
/3) {
1048 if (ioc
->combined_reply_queue
) {
1049 writel(reply_q
->reply_post_host_index
|
1050 ((msix_index
& 7) <<
1051 MPI2_RPHI_MSIX_INDEX_SHIFT
),
1052 ioc
->replyPostRegisterIndex
[msix_index
/8]);
1054 writel(reply_q
->reply_post_host_index
|
1056 MPI2_RPHI_MSIX_INDEX_SHIFT
),
1057 &ioc
->chip
->ReplyPostHostIndex
);
1061 if (request_desript_type
== MPI2_RPY_DESCRIPT_FLAGS_UNUSED
)
1063 if (!reply_q
->reply_post_host_index
)
1064 rpf
= reply_q
->reply_post_free
;
1071 if (!completed_cmds
) {
1072 atomic_dec(&reply_q
->busy
);
1076 if (ioc
->is_warpdrive
) {
1077 writel(reply_q
->reply_post_host_index
,
1078 ioc
->reply_post_host_index
[msix_index
]);
1079 atomic_dec(&reply_q
->busy
);
1083 /* Update Reply Post Host Index.
1084 * For those HBA's which support combined reply queue feature
1085 * 1. Get the correct Supplemental Reply Post Host Index Register.
1086 * i.e. (msix_index / 8)th entry from Supplemental Reply Post Host
1087 * Index Register address bank i.e replyPostRegisterIndex[],
1088 * 2. Then update this register with new reply host index value
1089 * in ReplyPostIndex field and the MSIxIndex field with
1090 * msix_index value reduced to a value between 0 and 7,
1091 * using a modulo 8 operation. Since each Supplemental Reply Post
1092 * Host Index Register supports 8 MSI-X vectors.
1094 * For other HBA's just update the Reply Post Host Index register with
1095 * new reply host index value in ReplyPostIndex Field and msix_index
1096 * value in MSIxIndex field.
1098 if (ioc
->combined_reply_queue
)
1099 writel(reply_q
->reply_post_host_index
| ((msix_index
& 7) <<
1100 MPI2_RPHI_MSIX_INDEX_SHIFT
),
1101 ioc
->replyPostRegisterIndex
[msix_index
/8]);
1103 writel(reply_q
->reply_post_host_index
| (msix_index
<<
1104 MPI2_RPHI_MSIX_INDEX_SHIFT
),
1105 &ioc
->chip
->ReplyPostHostIndex
);
1106 atomic_dec(&reply_q
->busy
);
1111 * _base_is_controller_msix_enabled - is controller support muli-reply queues
1112 * @ioc: per adapter object
1116 _base_is_controller_msix_enabled(struct MPT3SAS_ADAPTER
*ioc
)
1118 return (ioc
->facts
.IOCCapabilities
&
1119 MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX
) && ioc
->msix_enable
;
1123 * mpt3sas_base_sync_reply_irqs - flush pending MSIX interrupts
1124 * @ioc: per adapter object
1125 * Context: non ISR conext
1127 * Called when a Task Management request has completed.
1132 mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER
*ioc
)
1134 struct adapter_reply_queue
*reply_q
;
1136 /* If MSIX capability is turned off
1137 * then multi-queues are not enabled
1139 if (!_base_is_controller_msix_enabled(ioc
))
1142 list_for_each_entry(reply_q
, &ioc
->reply_queue_list
, list
) {
1143 if (ioc
->shost_recovery
|| ioc
->remove_host
||
1144 ioc
->pci_error_recovery
)
1146 /* TMs are on msix_index == 0 */
1147 if (reply_q
->msix_index
== 0)
1149 synchronize_irq(pci_irq_vector(ioc
->pdev
, reply_q
->msix_index
));
1154 * mpt3sas_base_release_callback_handler - clear interrupt callback handler
1155 * @cb_idx: callback index
1160 mpt3sas_base_release_callback_handler(u8 cb_idx
)
1162 mpt_callbacks
[cb_idx
] = NULL
;
1166 * mpt3sas_base_register_callback_handler - obtain index for the interrupt callback handler
1167 * @cb_func: callback function
1172 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func
)
1176 for (cb_idx
= MPT_MAX_CALLBACKS
-1; cb_idx
; cb_idx
--)
1177 if (mpt_callbacks
[cb_idx
] == NULL
)
1180 mpt_callbacks
[cb_idx
] = cb_func
;
1185 * mpt3sas_base_initialize_callback_handler - initialize the interrupt callback handler
1190 mpt3sas_base_initialize_callback_handler(void)
1194 for (cb_idx
= 0; cb_idx
< MPT_MAX_CALLBACKS
; cb_idx
++)
1195 mpt3sas_base_release_callback_handler(cb_idx
);
1200 * _base_build_zero_len_sge - build zero length sg entry
1201 * @ioc: per adapter object
1202 * @paddr: virtual address for SGE
1204 * Create a zero length scatter gather entry to insure the IOCs hardware has
1205 * something to use if the target device goes brain dead and tries
1206 * to send data even when none is asked for.
1211 _base_build_zero_len_sge(struct MPT3SAS_ADAPTER
*ioc
, void *paddr
)
1213 u32 flags_length
= (u32
)((MPI2_SGE_FLAGS_LAST_ELEMENT
|
1214 MPI2_SGE_FLAGS_END_OF_BUFFER
| MPI2_SGE_FLAGS_END_OF_LIST
|
1215 MPI2_SGE_FLAGS_SIMPLE_ELEMENT
) <<
1216 MPI2_SGE_FLAGS_SHIFT
);
1217 ioc
->base_add_sg_single(paddr
, flags_length
, -1);
1221 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
1222 * @paddr: virtual address for SGE
1223 * @flags_length: SGE flags and data transfer length
1224 * @dma_addr: Physical address
1229 _base_add_sg_single_32(void *paddr
, u32 flags_length
, dma_addr_t dma_addr
)
1231 Mpi2SGESimple32_t
*sgel
= paddr
;
1233 flags_length
|= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING
|
1234 MPI2_SGE_FLAGS_SYSTEM_ADDRESS
) << MPI2_SGE_FLAGS_SHIFT
;
1235 sgel
->FlagsLength
= cpu_to_le32(flags_length
);
1236 sgel
->Address
= cpu_to_le32(dma_addr
);
1241 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1242 * @paddr: virtual address for SGE
1243 * @flags_length: SGE flags and data transfer length
1244 * @dma_addr: Physical address
1249 _base_add_sg_single_64(void *paddr
, u32 flags_length
, dma_addr_t dma_addr
)
1251 Mpi2SGESimple64_t
*sgel
= paddr
;
1253 flags_length
|= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING
|
1254 MPI2_SGE_FLAGS_SYSTEM_ADDRESS
) << MPI2_SGE_FLAGS_SHIFT
;
1255 sgel
->FlagsLength
= cpu_to_le32(flags_length
);
1256 sgel
->Address
= cpu_to_le64(dma_addr
);
1260 * _base_get_chain_buffer_tracker - obtain chain tracker
1261 * @ioc: per adapter object
1262 * @smid: smid associated to an IO request
1264 * Returns chain tracker(from ioc->free_chain_list)
1266 static struct chain_tracker
*
1267 _base_get_chain_buffer_tracker(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
1269 struct chain_tracker
*chain_req
;
1270 unsigned long flags
;
1272 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
1273 if (list_empty(&ioc
->free_chain_list
)) {
1274 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
1275 dfailprintk(ioc
, pr_warn(MPT3SAS_FMT
1276 "chain buffers not available\n", ioc
->name
));
1279 chain_req
= list_entry(ioc
->free_chain_list
.next
,
1280 struct chain_tracker
, tracker_list
);
1281 list_del_init(&chain_req
->tracker_list
);
1282 list_add_tail(&chain_req
->tracker_list
,
1283 &ioc
->scsi_lookup
[smid
- 1].chain_list
);
1284 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
1290 * _base_build_sg - build generic sg
1291 * @ioc: per adapter object
1292 * @psge: virtual address for SGE
1293 * @data_out_dma: physical address for WRITES
1294 * @data_out_sz: data xfer size for WRITES
1295 * @data_in_dma: physical address for READS
1296 * @data_in_sz: data xfer size for READS
1301 _base_build_sg(struct MPT3SAS_ADAPTER
*ioc
, void *psge
,
1302 dma_addr_t data_out_dma
, size_t data_out_sz
, dma_addr_t data_in_dma
,
1307 if (!data_out_sz
&& !data_in_sz
) {
1308 _base_build_zero_len_sge(ioc
, psge
);
1312 if (data_out_sz
&& data_in_sz
) {
1313 /* WRITE sgel first */
1314 sgl_flags
= (MPI2_SGE_FLAGS_SIMPLE_ELEMENT
|
1315 MPI2_SGE_FLAGS_END_OF_BUFFER
| MPI2_SGE_FLAGS_HOST_TO_IOC
);
1316 sgl_flags
= sgl_flags
<< MPI2_SGE_FLAGS_SHIFT
;
1317 ioc
->base_add_sg_single(psge
, sgl_flags
|
1318 data_out_sz
, data_out_dma
);
1321 psge
+= ioc
->sge_size
;
1323 /* READ sgel last */
1324 sgl_flags
= (MPI2_SGE_FLAGS_SIMPLE_ELEMENT
|
1325 MPI2_SGE_FLAGS_LAST_ELEMENT
| MPI2_SGE_FLAGS_END_OF_BUFFER
|
1326 MPI2_SGE_FLAGS_END_OF_LIST
);
1327 sgl_flags
= sgl_flags
<< MPI2_SGE_FLAGS_SHIFT
;
1328 ioc
->base_add_sg_single(psge
, sgl_flags
|
1329 data_in_sz
, data_in_dma
);
1330 } else if (data_out_sz
) /* WRITE */ {
1331 sgl_flags
= (MPI2_SGE_FLAGS_SIMPLE_ELEMENT
|
1332 MPI2_SGE_FLAGS_LAST_ELEMENT
| MPI2_SGE_FLAGS_END_OF_BUFFER
|
1333 MPI2_SGE_FLAGS_END_OF_LIST
| MPI2_SGE_FLAGS_HOST_TO_IOC
);
1334 sgl_flags
= sgl_flags
<< MPI2_SGE_FLAGS_SHIFT
;
1335 ioc
->base_add_sg_single(psge
, sgl_flags
|
1336 data_out_sz
, data_out_dma
);
1337 } else if (data_in_sz
) /* READ */ {
1338 sgl_flags
= (MPI2_SGE_FLAGS_SIMPLE_ELEMENT
|
1339 MPI2_SGE_FLAGS_LAST_ELEMENT
| MPI2_SGE_FLAGS_END_OF_BUFFER
|
1340 MPI2_SGE_FLAGS_END_OF_LIST
);
1341 sgl_flags
= sgl_flags
<< MPI2_SGE_FLAGS_SHIFT
;
1342 ioc
->base_add_sg_single(psge
, sgl_flags
|
1343 data_in_sz
, data_in_dma
);
1347 /* IEEE format sgls */
1350 * _base_add_sg_single_ieee - add sg element for IEEE format
1351 * @paddr: virtual address for SGE
1353 * @chain_offset: number of 128 byte elements from start of segment
1354 * @length: data transfer length
1355 * @dma_addr: Physical address
1360 _base_add_sg_single_ieee(void *paddr
, u8 flags
, u8 chain_offset
, u32 length
,
1361 dma_addr_t dma_addr
)
1363 Mpi25IeeeSgeChain64_t
*sgel
= paddr
;
1365 sgel
->Flags
= flags
;
1366 sgel
->NextChainOffset
= chain_offset
;
1367 sgel
->Length
= cpu_to_le32(length
);
1368 sgel
->Address
= cpu_to_le64(dma_addr
);
1372 * _base_build_zero_len_sge_ieee - build zero length sg entry for IEEE format
1373 * @ioc: per adapter object
1374 * @paddr: virtual address for SGE
1376 * Create a zero length scatter gather entry to insure the IOCs hardware has
1377 * something to use if the target device goes brain dead and tries
1378 * to send data even when none is asked for.
1383 _base_build_zero_len_sge_ieee(struct MPT3SAS_ADAPTER
*ioc
, void *paddr
)
1385 u8 sgl_flags
= (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT
|
1386 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
|
1387 MPI25_IEEE_SGE_FLAGS_END_OF_LIST
);
1389 _base_add_sg_single_ieee(paddr
, sgl_flags
, 0, 0, -1);
1393 * _base_build_sg_scmd - main sg creation routine
1394 * @ioc: per adapter object
1395 * @scmd: scsi command
1396 * @smid: system request message index
1399 * The main routine that builds scatter gather table from a given
1400 * scsi request sent via the .queuecommand main handler.
1402 * Returns 0 success, anything else error
1405 _base_build_sg_scmd(struct MPT3SAS_ADAPTER
*ioc
,
1406 struct scsi_cmnd
*scmd
, u16 smid
)
1408 Mpi2SCSIIORequest_t
*mpi_request
;
1409 dma_addr_t chain_dma
;
1410 struct scatterlist
*sg_scmd
;
1411 void *sg_local
, *chain
;
1416 u32 sges_in_segment
;
1418 u32 sgl_flags_last_element
;
1419 u32 sgl_flags_end_buffer
;
1420 struct chain_tracker
*chain_req
;
1422 mpi_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
1424 /* init scatter gather flags */
1425 sgl_flags
= MPI2_SGE_FLAGS_SIMPLE_ELEMENT
;
1426 if (scmd
->sc_data_direction
== DMA_TO_DEVICE
)
1427 sgl_flags
|= MPI2_SGE_FLAGS_HOST_TO_IOC
;
1428 sgl_flags_last_element
= (sgl_flags
| MPI2_SGE_FLAGS_LAST_ELEMENT
)
1429 << MPI2_SGE_FLAGS_SHIFT
;
1430 sgl_flags_end_buffer
= (sgl_flags
| MPI2_SGE_FLAGS_LAST_ELEMENT
|
1431 MPI2_SGE_FLAGS_END_OF_BUFFER
| MPI2_SGE_FLAGS_END_OF_LIST
)
1432 << MPI2_SGE_FLAGS_SHIFT
;
1433 sgl_flags
= sgl_flags
<< MPI2_SGE_FLAGS_SHIFT
;
1435 sg_scmd
= scsi_sglist(scmd
);
1436 sges_left
= scsi_dma_map(scmd
);
1437 if (sges_left
< 0) {
1438 sdev_printk(KERN_ERR
, scmd
->device
,
1439 "pci_map_sg failed: request for %d bytes!\n",
1440 scsi_bufflen(scmd
));
1444 sg_local
= &mpi_request
->SGL
;
1445 sges_in_segment
= ioc
->max_sges_in_main_message
;
1446 if (sges_left
<= sges_in_segment
)
1447 goto fill_in_last_segment
;
1449 mpi_request
->ChainOffset
= (offsetof(Mpi2SCSIIORequest_t
, SGL
) +
1450 (sges_in_segment
* ioc
->sge_size
))/4;
1452 /* fill in main message segment when there is a chain following */
1453 while (sges_in_segment
) {
1454 if (sges_in_segment
== 1)
1455 ioc
->base_add_sg_single(sg_local
,
1456 sgl_flags_last_element
| sg_dma_len(sg_scmd
),
1457 sg_dma_address(sg_scmd
));
1459 ioc
->base_add_sg_single(sg_local
, sgl_flags
|
1460 sg_dma_len(sg_scmd
), sg_dma_address(sg_scmd
));
1461 sg_scmd
= sg_next(sg_scmd
);
1462 sg_local
+= ioc
->sge_size
;
1467 /* initializing the chain flags and pointers */
1468 chain_flags
= MPI2_SGE_FLAGS_CHAIN_ELEMENT
<< MPI2_SGE_FLAGS_SHIFT
;
1469 chain_req
= _base_get_chain_buffer_tracker(ioc
, smid
);
1472 chain
= chain_req
->chain_buffer
;
1473 chain_dma
= chain_req
->chain_buffer_dma
;
1475 sges_in_segment
= (sges_left
<=
1476 ioc
->max_sges_in_chain_message
) ? sges_left
:
1477 ioc
->max_sges_in_chain_message
;
1478 chain_offset
= (sges_left
== sges_in_segment
) ?
1479 0 : (sges_in_segment
* ioc
->sge_size
)/4;
1480 chain_length
= sges_in_segment
* ioc
->sge_size
;
1482 chain_offset
= chain_offset
<<
1483 MPI2_SGE_CHAIN_OFFSET_SHIFT
;
1484 chain_length
+= ioc
->sge_size
;
1486 ioc
->base_add_sg_single(sg_local
, chain_flags
| chain_offset
|
1487 chain_length
, chain_dma
);
1490 goto fill_in_last_segment
;
1492 /* fill in chain segments */
1493 while (sges_in_segment
) {
1494 if (sges_in_segment
== 1)
1495 ioc
->base_add_sg_single(sg_local
,
1496 sgl_flags_last_element
|
1497 sg_dma_len(sg_scmd
),
1498 sg_dma_address(sg_scmd
));
1500 ioc
->base_add_sg_single(sg_local
, sgl_flags
|
1501 sg_dma_len(sg_scmd
),
1502 sg_dma_address(sg_scmd
));
1503 sg_scmd
= sg_next(sg_scmd
);
1504 sg_local
+= ioc
->sge_size
;
1509 chain_req
= _base_get_chain_buffer_tracker(ioc
, smid
);
1512 chain
= chain_req
->chain_buffer
;
1513 chain_dma
= chain_req
->chain_buffer_dma
;
1517 fill_in_last_segment
:
1519 /* fill the last segment */
1522 ioc
->base_add_sg_single(sg_local
, sgl_flags_end_buffer
|
1523 sg_dma_len(sg_scmd
), sg_dma_address(sg_scmd
));
1525 ioc
->base_add_sg_single(sg_local
, sgl_flags
|
1526 sg_dma_len(sg_scmd
), sg_dma_address(sg_scmd
));
1527 sg_scmd
= sg_next(sg_scmd
);
1528 sg_local
+= ioc
->sge_size
;
1536 * _base_build_sg_scmd_ieee - main sg creation routine for IEEE format
1537 * @ioc: per adapter object
1538 * @scmd: scsi command
1539 * @smid: system request message index
1542 * The main routine that builds scatter gather table from a given
1543 * scsi request sent via the .queuecommand main handler.
1545 * Returns 0 success, anything else error
1548 _base_build_sg_scmd_ieee(struct MPT3SAS_ADAPTER
*ioc
,
1549 struct scsi_cmnd
*scmd
, u16 smid
)
1551 Mpi2SCSIIORequest_t
*mpi_request
;
1552 dma_addr_t chain_dma
;
1553 struct scatterlist
*sg_scmd
;
1554 void *sg_local
, *chain
;
1558 u32 sges_in_segment
;
1559 u8 simple_sgl_flags
;
1560 u8 simple_sgl_flags_last
;
1562 struct chain_tracker
*chain_req
;
1564 mpi_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
1566 /* init scatter gather flags */
1567 simple_sgl_flags
= MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT
|
1568 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
;
1569 simple_sgl_flags_last
= simple_sgl_flags
|
1570 MPI25_IEEE_SGE_FLAGS_END_OF_LIST
;
1571 chain_sgl_flags
= MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT
|
1572 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
;
1574 sg_scmd
= scsi_sglist(scmd
);
1575 sges_left
= scsi_dma_map(scmd
);
1576 if (sges_left
< 0) {
1577 sdev_printk(KERN_ERR
, scmd
->device
,
1578 "pci_map_sg failed: request for %d bytes!\n",
1579 scsi_bufflen(scmd
));
1583 sg_local
= &mpi_request
->SGL
;
1584 sges_in_segment
= (ioc
->request_sz
-
1585 offsetof(Mpi2SCSIIORequest_t
, SGL
))/ioc
->sge_size_ieee
;
1586 if (sges_left
<= sges_in_segment
)
1587 goto fill_in_last_segment
;
1589 mpi_request
->ChainOffset
= (sges_in_segment
- 1 /* chain element */) +
1590 (offsetof(Mpi2SCSIIORequest_t
, SGL
)/ioc
->sge_size_ieee
);
1592 /* fill in main message segment when there is a chain following */
1593 while (sges_in_segment
> 1) {
1594 _base_add_sg_single_ieee(sg_local
, simple_sgl_flags
, 0,
1595 sg_dma_len(sg_scmd
), sg_dma_address(sg_scmd
));
1596 sg_scmd
= sg_next(sg_scmd
);
1597 sg_local
+= ioc
->sge_size_ieee
;
1602 /* initializing the pointers */
1603 chain_req
= _base_get_chain_buffer_tracker(ioc
, smid
);
1606 chain
= chain_req
->chain_buffer
;
1607 chain_dma
= chain_req
->chain_buffer_dma
;
1609 sges_in_segment
= (sges_left
<=
1610 ioc
->max_sges_in_chain_message
) ? sges_left
:
1611 ioc
->max_sges_in_chain_message
;
1612 chain_offset
= (sges_left
== sges_in_segment
) ?
1613 0 : sges_in_segment
;
1614 chain_length
= sges_in_segment
* ioc
->sge_size_ieee
;
1616 chain_length
+= ioc
->sge_size_ieee
;
1617 _base_add_sg_single_ieee(sg_local
, chain_sgl_flags
,
1618 chain_offset
, chain_length
, chain_dma
);
1622 goto fill_in_last_segment
;
1624 /* fill in chain segments */
1625 while (sges_in_segment
) {
1626 _base_add_sg_single_ieee(sg_local
, simple_sgl_flags
, 0,
1627 sg_dma_len(sg_scmd
), sg_dma_address(sg_scmd
));
1628 sg_scmd
= sg_next(sg_scmd
);
1629 sg_local
+= ioc
->sge_size_ieee
;
1634 chain_req
= _base_get_chain_buffer_tracker(ioc
, smid
);
1637 chain
= chain_req
->chain_buffer
;
1638 chain_dma
= chain_req
->chain_buffer_dma
;
1642 fill_in_last_segment
:
1644 /* fill the last segment */
1645 while (sges_left
> 0) {
1647 _base_add_sg_single_ieee(sg_local
,
1648 simple_sgl_flags_last
, 0, sg_dma_len(sg_scmd
),
1649 sg_dma_address(sg_scmd
));
1651 _base_add_sg_single_ieee(sg_local
, simple_sgl_flags
, 0,
1652 sg_dma_len(sg_scmd
), sg_dma_address(sg_scmd
));
1653 sg_scmd
= sg_next(sg_scmd
);
1654 sg_local
+= ioc
->sge_size_ieee
;
1662 * _base_build_sg_ieee - build generic sg for IEEE format
1663 * @ioc: per adapter object
1664 * @psge: virtual address for SGE
1665 * @data_out_dma: physical address for WRITES
1666 * @data_out_sz: data xfer size for WRITES
1667 * @data_in_dma: physical address for READS
1668 * @data_in_sz: data xfer size for READS
1673 _base_build_sg_ieee(struct MPT3SAS_ADAPTER
*ioc
, void *psge
,
1674 dma_addr_t data_out_dma
, size_t data_out_sz
, dma_addr_t data_in_dma
,
1679 if (!data_out_sz
&& !data_in_sz
) {
1680 _base_build_zero_len_sge_ieee(ioc
, psge
);
1684 if (data_out_sz
&& data_in_sz
) {
1685 /* WRITE sgel first */
1686 sgl_flags
= MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT
|
1687 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
;
1688 _base_add_sg_single_ieee(psge
, sgl_flags
, 0, data_out_sz
,
1692 psge
+= ioc
->sge_size_ieee
;
1694 /* READ sgel last */
1695 sgl_flags
|= MPI25_IEEE_SGE_FLAGS_END_OF_LIST
;
1696 _base_add_sg_single_ieee(psge
, sgl_flags
, 0, data_in_sz
,
1698 } else if (data_out_sz
) /* WRITE */ {
1699 sgl_flags
= MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT
|
1700 MPI25_IEEE_SGE_FLAGS_END_OF_LIST
|
1701 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
;
1702 _base_add_sg_single_ieee(psge
, sgl_flags
, 0, data_out_sz
,
1704 } else if (data_in_sz
) /* READ */ {
1705 sgl_flags
= MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT
|
1706 MPI25_IEEE_SGE_FLAGS_END_OF_LIST
|
1707 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR
;
1708 _base_add_sg_single_ieee(psge
, sgl_flags
, 0, data_in_sz
,
1713 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1716 * _base_config_dma_addressing - set dma addressing
1717 * @ioc: per adapter object
1718 * @pdev: PCI device struct
1720 * Returns 0 for success, non-zero for failure.
1723 _base_config_dma_addressing(struct MPT3SAS_ADAPTER
*ioc
, struct pci_dev
*pdev
)
1726 u64 consistent_dma_mask
;
1729 consistent_dma_mask
= DMA_BIT_MASK(64);
1731 consistent_dma_mask
= DMA_BIT_MASK(32);
1733 if (sizeof(dma_addr_t
) > 4) {
1734 const uint64_t required_mask
=
1735 dma_get_required_mask(&pdev
->dev
);
1736 if ((required_mask
> DMA_BIT_MASK(32)) &&
1737 !pci_set_dma_mask(pdev
, DMA_BIT_MASK(64)) &&
1738 !pci_set_consistent_dma_mask(pdev
, consistent_dma_mask
)) {
1739 ioc
->base_add_sg_single
= &_base_add_sg_single_64
;
1740 ioc
->sge_size
= sizeof(Mpi2SGESimple64_t
);
1746 if (!pci_set_dma_mask(pdev
, DMA_BIT_MASK(32))
1747 && !pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32))) {
1748 ioc
->base_add_sg_single
= &_base_add_sg_single_32
;
1749 ioc
->sge_size
= sizeof(Mpi2SGESimple32_t
);
1757 "%d BIT PCI BUS DMA ADDRESSING SUPPORTED, total mem (%ld kB)\n",
1758 ioc
->name
, ioc
->dma_mask
, convert_to_kb(s
.totalram
));
1764 _base_change_consistent_dma_mask(struct MPT3SAS_ADAPTER
*ioc
,
1765 struct pci_dev
*pdev
)
1767 if (pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64))) {
1768 if (pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32)))
1775 * _base_check_enable_msix - checks MSIX capabable.
1776 * @ioc: per adapter object
1778 * Check to see if card is capable of MSIX, and set number
1779 * of available msix vectors
1782 _base_check_enable_msix(struct MPT3SAS_ADAPTER
*ioc
)
1785 u16 message_control
;
1787 /* Check whether controller SAS2008 B0 controller,
1788 * if it is SAS2008 B0 controller use IO-APIC instead of MSIX
1790 if (ioc
->pdev
->device
== MPI2_MFGPAGE_DEVID_SAS2008
&&
1791 ioc
->pdev
->revision
== SAS2_PCI_DEVICE_B0_REVISION
) {
1795 base
= pci_find_capability(ioc
->pdev
, PCI_CAP_ID_MSIX
);
1797 dfailprintk(ioc
, pr_info(MPT3SAS_FMT
"msix not supported\n",
1802 /* get msix vector count */
1803 /* NUMA_IO not supported for older controllers */
1804 if (ioc
->pdev
->device
== MPI2_MFGPAGE_DEVID_SAS2004
||
1805 ioc
->pdev
->device
== MPI2_MFGPAGE_DEVID_SAS2008
||
1806 ioc
->pdev
->device
== MPI2_MFGPAGE_DEVID_SAS2108_1
||
1807 ioc
->pdev
->device
== MPI2_MFGPAGE_DEVID_SAS2108_2
||
1808 ioc
->pdev
->device
== MPI2_MFGPAGE_DEVID_SAS2108_3
||
1809 ioc
->pdev
->device
== MPI2_MFGPAGE_DEVID_SAS2116_1
||
1810 ioc
->pdev
->device
== MPI2_MFGPAGE_DEVID_SAS2116_2
)
1811 ioc
->msix_vector_count
= 1;
1813 pci_read_config_word(ioc
->pdev
, base
+ 2, &message_control
);
1814 ioc
->msix_vector_count
= (message_control
& 0x3FF) + 1;
1816 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
1817 "msix is supported, vector_count(%d)\n",
1818 ioc
->name
, ioc
->msix_vector_count
));
1823 * _base_free_irq - free irq
1824 * @ioc: per adapter object
1826 * Freeing respective reply_queue from the list.
1829 _base_free_irq(struct MPT3SAS_ADAPTER
*ioc
)
1831 struct adapter_reply_queue
*reply_q
, *next
;
1833 if (list_empty(&ioc
->reply_queue_list
))
1836 list_for_each_entry_safe(reply_q
, next
, &ioc
->reply_queue_list
, list
) {
1837 list_del(&reply_q
->list
);
1838 free_irq(pci_irq_vector(ioc
->pdev
, reply_q
->msix_index
),
1845 * _base_request_irq - request irq
1846 * @ioc: per adapter object
1847 * @index: msix index into vector table
1849 * Inserting respective reply_queue into the list.
1852 _base_request_irq(struct MPT3SAS_ADAPTER
*ioc
, u8 index
)
1854 struct pci_dev
*pdev
= ioc
->pdev
;
1855 struct adapter_reply_queue
*reply_q
;
1858 reply_q
= kzalloc(sizeof(struct adapter_reply_queue
), GFP_KERNEL
);
1860 pr_err(MPT3SAS_FMT
"unable to allocate memory %d!\n",
1861 ioc
->name
, (int)sizeof(struct adapter_reply_queue
));
1865 reply_q
->msix_index
= index
;
1867 atomic_set(&reply_q
->busy
, 0);
1868 if (ioc
->msix_enable
)
1869 snprintf(reply_q
->name
, MPT_NAME_LENGTH
, "%s%d-msix%d",
1870 ioc
->driver_name
, ioc
->id
, index
);
1872 snprintf(reply_q
->name
, MPT_NAME_LENGTH
, "%s%d",
1873 ioc
->driver_name
, ioc
->id
);
1874 r
= request_irq(pci_irq_vector(pdev
, index
), _base_interrupt
,
1875 IRQF_SHARED
, reply_q
->name
, reply_q
);
1877 pr_err(MPT3SAS_FMT
"unable to allocate interrupt %d!\n",
1878 reply_q
->name
, pci_irq_vector(pdev
, index
));
1883 INIT_LIST_HEAD(&reply_q
->list
);
1884 list_add_tail(&reply_q
->list
, &ioc
->reply_queue_list
);
1889 * _base_assign_reply_queues - assigning msix index for each cpu
1890 * @ioc: per adapter object
1892 * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
1894 * It would nice if we could call irq_set_affinity, however it is not
1895 * an exported symbol
1898 _base_assign_reply_queues(struct MPT3SAS_ADAPTER
*ioc
)
1900 unsigned int cpu
, nr_cpus
, nr_msix
, index
= 0;
1901 struct adapter_reply_queue
*reply_q
;
1903 if (!_base_is_controller_msix_enabled(ioc
))
1906 memset(ioc
->cpu_msix_table
, 0, ioc
->cpu_msix_table_sz
);
1908 nr_cpus
= num_online_cpus();
1909 nr_msix
= ioc
->reply_queue_count
= min(ioc
->reply_queue_count
,
1910 ioc
->facts
.MaxMSIxVectors
);
1914 if (smp_affinity_enable
) {
1915 list_for_each_entry(reply_q
, &ioc
->reply_queue_list
, list
) {
1916 const cpumask_t
*mask
= pci_irq_get_affinity(ioc
->pdev
,
1917 reply_q
->msix_index
);
1919 pr_warn(MPT3SAS_FMT
"no affinity for msi %x\n",
1920 ioc
->name
, reply_q
->msix_index
);
1924 for_each_cpu(cpu
, mask
)
1925 ioc
->cpu_msix_table
[cpu
] = reply_q
->msix_index
;
1929 cpu
= cpumask_first(cpu_online_mask
);
1931 list_for_each_entry(reply_q
, &ioc
->reply_queue_list
, list
) {
1933 unsigned int i
, group
= nr_cpus
/ nr_msix
;
1938 if (index
< nr_cpus
% nr_msix
)
1941 for (i
= 0 ; i
< group
; i
++) {
1942 ioc
->cpu_msix_table
[cpu
] = reply_q
->msix_index
;
1943 cpu
= cpumask_next(cpu
, cpu_online_mask
);
1950 * _base_disable_msix - disables msix
1951 * @ioc: per adapter object
1955 _base_disable_msix(struct MPT3SAS_ADAPTER
*ioc
)
1957 if (!ioc
->msix_enable
)
1959 pci_disable_msix(ioc
->pdev
);
1960 ioc
->msix_enable
= 0;
1964 * _base_enable_msix - enables msix, failback to io_apic
1965 * @ioc: per adapter object
1969 _base_enable_msix(struct MPT3SAS_ADAPTER
*ioc
)
1972 int i
, local_max_msix_vectors
;
1974 unsigned int irq_flags
= PCI_IRQ_MSIX
;
1976 if (msix_disable
== -1 || msix_disable
== 0)
1982 if (_base_check_enable_msix(ioc
) != 0)
1985 ioc
->reply_queue_count
= min_t(int, ioc
->cpu_count
,
1986 ioc
->msix_vector_count
);
1988 printk(MPT3SAS_FMT
"MSI-X vectors supported: %d, no of cores"
1989 ": %d, max_msix_vectors: %d\n", ioc
->name
, ioc
->msix_vector_count
,
1990 ioc
->cpu_count
, max_msix_vectors
);
1992 if (!ioc
->rdpq_array_enable
&& max_msix_vectors
== -1)
1993 local_max_msix_vectors
= 8;
1995 local_max_msix_vectors
= max_msix_vectors
;
1997 if (local_max_msix_vectors
> 0)
1998 ioc
->reply_queue_count
= min_t(int, local_max_msix_vectors
,
1999 ioc
->reply_queue_count
);
2000 else if (local_max_msix_vectors
== 0)
2003 if (ioc
->msix_vector_count
< ioc
->cpu_count
)
2004 smp_affinity_enable
= 0;
2006 if (smp_affinity_enable
)
2007 irq_flags
|= PCI_IRQ_AFFINITY
;
2009 r
= pci_alloc_irq_vectors(ioc
->pdev
, 1, ioc
->reply_queue_count
,
2012 dfailprintk(ioc
, pr_info(MPT3SAS_FMT
2013 "pci_alloc_irq_vectors failed (r=%d) !!!\n",
2018 ioc
->msix_enable
= 1;
2019 ioc
->reply_queue_count
= r
;
2020 for (i
= 0; i
< ioc
->reply_queue_count
; i
++) {
2021 r
= _base_request_irq(ioc
, i
);
2023 _base_free_irq(ioc
);
2024 _base_disable_msix(ioc
);
2031 /* failback to io_apic interrupt routing */
2034 ioc
->reply_queue_count
= 1;
2035 r
= pci_alloc_irq_vectors(ioc
->pdev
, 1, 1, PCI_IRQ_LEGACY
);
2037 dfailprintk(ioc
, pr_info(MPT3SAS_FMT
2038 "pci_alloc_irq_vector(legacy) failed (r=%d) !!!\n",
2041 r
= _base_request_irq(ioc
, 0);
2047 * mpt3sas_base_unmap_resources - free controller resources
2048 * @ioc: per adapter object
2051 mpt3sas_base_unmap_resources(struct MPT3SAS_ADAPTER
*ioc
)
2053 struct pci_dev
*pdev
= ioc
->pdev
;
2055 dexitprintk(ioc
, printk(MPT3SAS_FMT
"%s\n",
2056 ioc
->name
, __func__
));
2058 _base_free_irq(ioc
);
2059 _base_disable_msix(ioc
);
2061 if (ioc
->combined_reply_queue
) {
2062 kfree(ioc
->replyPostRegisterIndex
);
2063 ioc
->replyPostRegisterIndex
= NULL
;
2066 if (ioc
->chip_phys
) {
2071 if (pci_is_enabled(pdev
)) {
2072 pci_release_selected_regions(ioc
->pdev
, ioc
->bars
);
2073 pci_disable_pcie_error_reporting(pdev
);
2074 pci_disable_device(pdev
);
2079 * mpt3sas_base_map_resources - map in controller resources (io/irq/memap)
2080 * @ioc: per adapter object
2082 * Returns 0 for success, non-zero for failure.
2085 mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER
*ioc
)
2087 struct pci_dev
*pdev
= ioc
->pdev
;
2093 struct adapter_reply_queue
*reply_q
;
2095 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n",
2096 ioc
->name
, __func__
));
2098 ioc
->bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2099 if (pci_enable_device_mem(pdev
)) {
2100 pr_warn(MPT3SAS_FMT
"pci_enable_device_mem: failed\n",
2107 if (pci_request_selected_regions(pdev
, ioc
->bars
,
2108 ioc
->driver_name
)) {
2109 pr_warn(MPT3SAS_FMT
"pci_request_selected_regions: failed\n",
2116 /* AER (Advanced Error Reporting) hooks */
2117 pci_enable_pcie_error_reporting(pdev
);
2119 pci_set_master(pdev
);
2122 if (_base_config_dma_addressing(ioc
, pdev
) != 0) {
2123 pr_warn(MPT3SAS_FMT
"no suitable DMA mask for %s\n",
2124 ioc
->name
, pci_name(pdev
));
2129 for (i
= 0, memap_sz
= 0, pio_sz
= 0; (i
< DEVICE_COUNT_RESOURCE
) &&
2130 (!memap_sz
|| !pio_sz
); i
++) {
2131 if (pci_resource_flags(pdev
, i
) & IORESOURCE_IO
) {
2134 pio_chip
= (u64
)pci_resource_start(pdev
, i
);
2135 pio_sz
= pci_resource_len(pdev
, i
);
2136 } else if (pci_resource_flags(pdev
, i
) & IORESOURCE_MEM
) {
2139 ioc
->chip_phys
= pci_resource_start(pdev
, i
);
2140 chip_phys
= (u64
)ioc
->chip_phys
;
2141 memap_sz
= pci_resource_len(pdev
, i
);
2142 ioc
->chip
= ioremap(ioc
->chip_phys
, memap_sz
);
2146 if (ioc
->chip
== NULL
) {
2147 pr_err(MPT3SAS_FMT
"unable to map adapter memory! "
2148 " or resource not found\n", ioc
->name
);
2153 _base_mask_interrupts(ioc
);
2155 r
= _base_get_ioc_facts(ioc
);
2159 if (!ioc
->rdpq_array_enable_assigned
) {
2160 ioc
->rdpq_array_enable
= ioc
->rdpq_array_capable
;
2161 ioc
->rdpq_array_enable_assigned
= 1;
2164 r
= _base_enable_msix(ioc
);
2168 /* Use the Combined reply queue feature only for SAS3 C0 & higher
2169 * revision HBAs and also only when reply queue count is greater than 8
2171 if (ioc
->combined_reply_queue
&& ioc
->reply_queue_count
> 8) {
2172 /* Determine the Supplemental Reply Post Host Index Registers
2173 * Addresse. Supplemental Reply Post Host Index Registers
2174 * starts at offset MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET and
2175 * each register is at offset bytes of
2176 * MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET from previous one.
2178 ioc
->replyPostRegisterIndex
= kcalloc(
2179 ioc
->combined_reply_index_count
,
2180 sizeof(resource_size_t
*), GFP_KERNEL
);
2181 if (!ioc
->replyPostRegisterIndex
) {
2182 dfailprintk(ioc
, printk(MPT3SAS_FMT
2183 "allocation for reply Post Register Index failed!!!\n",
2189 for (i
= 0; i
< ioc
->combined_reply_index_count
; i
++) {
2190 ioc
->replyPostRegisterIndex
[i
] = (resource_size_t
*)
2191 ((u8
*)&ioc
->chip
->Doorbell
+
2192 MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET
+
2193 (i
* MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET
));
2196 ioc
->combined_reply_queue
= 0;
2198 if (ioc
->is_warpdrive
) {
2199 ioc
->reply_post_host_index
[0] = (resource_size_t __iomem
*)
2200 &ioc
->chip
->ReplyPostHostIndex
;
2202 for (i
= 1; i
< ioc
->cpu_msix_table_sz
; i
++)
2203 ioc
->reply_post_host_index
[i
] =
2204 (resource_size_t __iomem
*)
2205 ((u8 __iomem
*)&ioc
->chip
->Doorbell
+ (0x4000 + ((i
- 1)
2209 list_for_each_entry(reply_q
, &ioc
->reply_queue_list
, list
)
2210 pr_info(MPT3SAS_FMT
"%s: IRQ %d\n",
2211 reply_q
->name
, ((ioc
->msix_enable
) ? "PCI-MSI-X enabled" :
2213 pci_irq_vector(ioc
->pdev
, reply_q
->msix_index
));
2215 pr_info(MPT3SAS_FMT
"iomem(0x%016llx), mapped(0x%p), size(%d)\n",
2216 ioc
->name
, (unsigned long long)chip_phys
, ioc
->chip
, memap_sz
);
2217 pr_info(MPT3SAS_FMT
"ioport(0x%016llx), size(%d)\n",
2218 ioc
->name
, (unsigned long long)pio_chip
, pio_sz
);
2220 /* Save PCI configuration state for recovery from PCI AER/EEH errors */
2221 pci_save_state(pdev
);
2225 mpt3sas_base_unmap_resources(ioc
);
2230 * mpt3sas_base_get_msg_frame - obtain request mf pointer
2231 * @ioc: per adapter object
2232 * @smid: system request message index(smid zero is invalid)
2234 * Returns virt pointer to message frame.
2237 mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
2239 return (void *)(ioc
->request
+ (smid
* ioc
->request_sz
));
2243 * mpt3sas_base_get_sense_buffer - obtain a sense buffer virt addr
2244 * @ioc: per adapter object
2245 * @smid: system request message index
2247 * Returns virt pointer to sense buffer.
2250 mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
2252 return (void *)(ioc
->sense
+ ((smid
- 1) * SCSI_SENSE_BUFFERSIZE
));
2256 * mpt3sas_base_get_sense_buffer_dma - obtain a sense buffer dma addr
2257 * @ioc: per adapter object
2258 * @smid: system request message index
2260 * Returns phys pointer to the low 32bit address of the sense buffer.
2263 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
2265 return cpu_to_le32(ioc
->sense_dma
+ ((smid
- 1) *
2266 SCSI_SENSE_BUFFERSIZE
));
2270 * mpt3sas_base_get_reply_virt_addr - obtain reply frames virt address
2271 * @ioc: per adapter object
2272 * @phys_addr: lower 32 physical addr of the reply
2274 * Converts 32bit lower physical addr into a virt address.
2277 mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER
*ioc
, u32 phys_addr
)
2281 return ioc
->reply
+ (phys_addr
- (u32
)ioc
->reply_dma
);
2285 _base_get_msix_index(struct MPT3SAS_ADAPTER
*ioc
)
2287 return ioc
->cpu_msix_table
[raw_smp_processor_id()];
2291 * mpt3sas_base_get_smid - obtain a free smid from internal queue
2292 * @ioc: per adapter object
2293 * @cb_idx: callback index
2295 * Returns smid (zero is invalid)
2298 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER
*ioc
, u8 cb_idx
)
2300 unsigned long flags
;
2301 struct request_tracker
*request
;
2304 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
2305 if (list_empty(&ioc
->internal_free_list
)) {
2306 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2307 pr_err(MPT3SAS_FMT
"%s: smid not available\n",
2308 ioc
->name
, __func__
);
2312 request
= list_entry(ioc
->internal_free_list
.next
,
2313 struct request_tracker
, tracker_list
);
2314 request
->cb_idx
= cb_idx
;
2315 smid
= request
->smid
;
2316 list_del(&request
->tracker_list
);
2317 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2322 * mpt3sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
2323 * @ioc: per adapter object
2324 * @cb_idx: callback index
2325 * @scmd: pointer to scsi command object
2327 * Returns smid (zero is invalid)
2330 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER
*ioc
, u8 cb_idx
,
2331 struct scsi_cmnd
*scmd
)
2333 unsigned long flags
;
2334 struct scsiio_tracker
*request
;
2337 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
2338 if (list_empty(&ioc
->free_list
)) {
2339 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2340 pr_err(MPT3SAS_FMT
"%s: smid not available\n",
2341 ioc
->name
, __func__
);
2345 request
= list_entry(ioc
->free_list
.next
,
2346 struct scsiio_tracker
, tracker_list
);
2347 request
->scmd
= scmd
;
2348 request
->cb_idx
= cb_idx
;
2349 smid
= request
->smid
;
2350 request
->msix_io
= _base_get_msix_index(ioc
);
2351 list_del(&request
->tracker_list
);
2352 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2357 * mpt3sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
2358 * @ioc: per adapter object
2359 * @cb_idx: callback index
2361 * Returns smid (zero is invalid)
2364 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER
*ioc
, u8 cb_idx
)
2366 unsigned long flags
;
2367 struct request_tracker
*request
;
2370 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
2371 if (list_empty(&ioc
->hpr_free_list
)) {
2372 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2376 request
= list_entry(ioc
->hpr_free_list
.next
,
2377 struct request_tracker
, tracker_list
);
2378 request
->cb_idx
= cb_idx
;
2379 smid
= request
->smid
;
2380 list_del(&request
->tracker_list
);
2381 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2386 * mpt3sas_base_free_smid - put smid back on free_list
2387 * @ioc: per adapter object
2388 * @smid: system request message index
2393 mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
2395 unsigned long flags
;
2397 struct chain_tracker
*chain_req
, *next
;
2399 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
2400 if (smid
< ioc
->hi_priority_smid
) {
2403 if (!list_empty(&ioc
->scsi_lookup
[i
].chain_list
)) {
2404 list_for_each_entry_safe(chain_req
, next
,
2405 &ioc
->scsi_lookup
[i
].chain_list
, tracker_list
) {
2406 list_del_init(&chain_req
->tracker_list
);
2407 list_add(&chain_req
->tracker_list
,
2408 &ioc
->free_chain_list
);
2411 ioc
->scsi_lookup
[i
].cb_idx
= 0xFF;
2412 ioc
->scsi_lookup
[i
].scmd
= NULL
;
2413 ioc
->scsi_lookup
[i
].direct_io
= 0;
2414 list_add(&ioc
->scsi_lookup
[i
].tracker_list
, &ioc
->free_list
);
2415 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2418 * See _wait_for_commands_to_complete() call with regards
2421 if (ioc
->shost_recovery
&& ioc
->pending_io_count
) {
2422 if (ioc
->pending_io_count
== 1)
2423 wake_up(&ioc
->reset_wq
);
2424 ioc
->pending_io_count
--;
2427 } else if (smid
< ioc
->internal_smid
) {
2429 i
= smid
- ioc
->hi_priority_smid
;
2430 ioc
->hpr_lookup
[i
].cb_idx
= 0xFF;
2431 list_add(&ioc
->hpr_lookup
[i
].tracker_list
, &ioc
->hpr_free_list
);
2432 } else if (smid
<= ioc
->hba_queue_depth
) {
2433 /* internal queue */
2434 i
= smid
- ioc
->internal_smid
;
2435 ioc
->internal_lookup
[i
].cb_idx
= 0xFF;
2436 list_add(&ioc
->internal_lookup
[i
].tracker_list
,
2437 &ioc
->internal_free_list
);
2439 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
2443 * _base_writeq - 64 bit write to MMIO
2444 * @ioc: per adapter object
2446 * @addr: address in MMIO space
2447 * @writeq_lock: spin lock
2449 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
2450 * care of 32 bit environment where its not quarenteed to send the entire word
2453 #if defined(writeq) && defined(CONFIG_64BIT)
2455 _base_writeq(__u64 b
, volatile void __iomem
*addr
, spinlock_t
*writeq_lock
)
2457 writeq(cpu_to_le64(b
), addr
);
2461 _base_writeq(__u64 b
, volatile void __iomem
*addr
, spinlock_t
*writeq_lock
)
2463 unsigned long flags
;
2464 __u64 data_out
= cpu_to_le64(b
);
2466 spin_lock_irqsave(writeq_lock
, flags
);
2467 writel((u32
)(data_out
), addr
);
2468 writel((u32
)(data_out
>> 32), (addr
+ 4));
2469 spin_unlock_irqrestore(writeq_lock
, flags
);
2474 * _base_put_smid_scsi_io - send SCSI_IO request to firmware
2475 * @ioc: per adapter object
2476 * @smid: system request message index
2477 * @handle: device handle
2482 _base_put_smid_scsi_io(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
, u16 handle
)
2484 Mpi2RequestDescriptorUnion_t descriptor
;
2485 u64
*request
= (u64
*)&descriptor
;
2488 descriptor
.SCSIIO
.RequestFlags
= MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO
;
2489 descriptor
.SCSIIO
.MSIxIndex
= _base_get_msix_index(ioc
);
2490 descriptor
.SCSIIO
.SMID
= cpu_to_le16(smid
);
2491 descriptor
.SCSIIO
.DevHandle
= cpu_to_le16(handle
);
2492 descriptor
.SCSIIO
.LMID
= 0;
2493 _base_writeq(*request
, &ioc
->chip
->RequestDescriptorPostLow
,
2494 &ioc
->scsi_lookup_lock
);
2498 * _base_put_smid_fast_path - send fast path request to firmware
2499 * @ioc: per adapter object
2500 * @smid: system request message index
2501 * @handle: device handle
2506 _base_put_smid_fast_path(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
,
2509 Mpi2RequestDescriptorUnion_t descriptor
;
2510 u64
*request
= (u64
*)&descriptor
;
2512 descriptor
.SCSIIO
.RequestFlags
=
2513 MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO
;
2514 descriptor
.SCSIIO
.MSIxIndex
= _base_get_msix_index(ioc
);
2515 descriptor
.SCSIIO
.SMID
= cpu_to_le16(smid
);
2516 descriptor
.SCSIIO
.DevHandle
= cpu_to_le16(handle
);
2517 descriptor
.SCSIIO
.LMID
= 0;
2518 _base_writeq(*request
, &ioc
->chip
->RequestDescriptorPostLow
,
2519 &ioc
->scsi_lookup_lock
);
2523 * _base_put_smid_hi_priority - send Task Management request to firmware
2524 * @ioc: per adapter object
2525 * @smid: system request message index
2526 * @msix_task: msix_task will be same as msix of IO incase of task abort else 0.
2530 _base_put_smid_hi_priority(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
,
2533 Mpi2RequestDescriptorUnion_t descriptor
;
2534 u64
*request
= (u64
*)&descriptor
;
2536 descriptor
.HighPriority
.RequestFlags
=
2537 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY
;
2538 descriptor
.HighPriority
.MSIxIndex
= msix_task
;
2539 descriptor
.HighPriority
.SMID
= cpu_to_le16(smid
);
2540 descriptor
.HighPriority
.LMID
= 0;
2541 descriptor
.HighPriority
.Reserved1
= 0;
2542 _base_writeq(*request
, &ioc
->chip
->RequestDescriptorPostLow
,
2543 &ioc
->scsi_lookup_lock
);
2547 * _base_put_smid_default - Default, primarily used for config pages
2548 * @ioc: per adapter object
2549 * @smid: system request message index
2554 _base_put_smid_default(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
2556 Mpi2RequestDescriptorUnion_t descriptor
;
2557 u64
*request
= (u64
*)&descriptor
;
2559 descriptor
.Default
.RequestFlags
= MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE
;
2560 descriptor
.Default
.MSIxIndex
= _base_get_msix_index(ioc
);
2561 descriptor
.Default
.SMID
= cpu_to_le16(smid
);
2562 descriptor
.Default
.LMID
= 0;
2563 descriptor
.Default
.DescriptorTypeDependent
= 0;
2564 _base_writeq(*request
, &ioc
->chip
->RequestDescriptorPostLow
,
2565 &ioc
->scsi_lookup_lock
);
2569 * _base_put_smid_scsi_io_atomic - send SCSI_IO request to firmware using
2570 * Atomic Request Descriptor
2571 * @ioc: per adapter object
2572 * @smid: system request message index
2573 * @handle: device handle, unused in this function, for function type match
2578 _base_put_smid_scsi_io_atomic(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
,
2581 Mpi26AtomicRequestDescriptor_t descriptor
;
2582 u32
*request
= (u32
*)&descriptor
;
2584 descriptor
.RequestFlags
= MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO
;
2585 descriptor
.MSIxIndex
= _base_get_msix_index(ioc
);
2586 descriptor
.SMID
= cpu_to_le16(smid
);
2588 writel(cpu_to_le32(*request
), &ioc
->chip
->AtomicRequestDescriptorPost
);
2592 * _base_put_smid_fast_path_atomic - send fast path request to firmware
2593 * using Atomic Request Descriptor
2594 * @ioc: per adapter object
2595 * @smid: system request message index
2596 * @handle: device handle, unused in this function, for function type match
2600 _base_put_smid_fast_path_atomic(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
,
2603 Mpi26AtomicRequestDescriptor_t descriptor
;
2604 u32
*request
= (u32
*)&descriptor
;
2606 descriptor
.RequestFlags
= MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO
;
2607 descriptor
.MSIxIndex
= _base_get_msix_index(ioc
);
2608 descriptor
.SMID
= cpu_to_le16(smid
);
2610 writel(cpu_to_le32(*request
), &ioc
->chip
->AtomicRequestDescriptorPost
);
2614 * _base_put_smid_hi_priority_atomic - send Task Management request to
2615 * firmware using Atomic Request Descriptor
2616 * @ioc: per adapter object
2617 * @smid: system request message index
2618 * @msix_task: msix_task will be same as msix of IO incase of task abort else 0
2623 _base_put_smid_hi_priority_atomic(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
,
2626 Mpi26AtomicRequestDescriptor_t descriptor
;
2627 u32
*request
= (u32
*)&descriptor
;
2629 descriptor
.RequestFlags
= MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY
;
2630 descriptor
.MSIxIndex
= msix_task
;
2631 descriptor
.SMID
= cpu_to_le16(smid
);
2633 writel(cpu_to_le32(*request
), &ioc
->chip
->AtomicRequestDescriptorPost
);
2637 * _base_put_smid_default - Default, primarily used for config pages
2638 * use Atomic Request Descriptor
2639 * @ioc: per adapter object
2640 * @smid: system request message index
2645 _base_put_smid_default_atomic(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
)
2647 Mpi26AtomicRequestDescriptor_t descriptor
;
2648 u32
*request
= (u32
*)&descriptor
;
2650 descriptor
.RequestFlags
= MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE
;
2651 descriptor
.MSIxIndex
= _base_get_msix_index(ioc
);
2652 descriptor
.SMID
= cpu_to_le16(smid
);
2654 writel(cpu_to_le32(*request
), &ioc
->chip
->AtomicRequestDescriptorPost
);
2658 * _base_display_OEMs_branding - Display branding string
2659 * @ioc: per adapter object
2664 _base_display_OEMs_branding(struct MPT3SAS_ADAPTER
*ioc
)
2666 if (ioc
->pdev
->subsystem_vendor
!= PCI_VENDOR_ID_INTEL
)
2669 switch (ioc
->pdev
->subsystem_vendor
) {
2670 case PCI_VENDOR_ID_INTEL
:
2671 switch (ioc
->pdev
->device
) {
2672 case MPI2_MFGPAGE_DEVID_SAS2008
:
2673 switch (ioc
->pdev
->subsystem_device
) {
2674 case MPT2SAS_INTEL_RMS2LL080_SSDID
:
2675 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2676 MPT2SAS_INTEL_RMS2LL080_BRANDING
);
2678 case MPT2SAS_INTEL_RMS2LL040_SSDID
:
2679 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2680 MPT2SAS_INTEL_RMS2LL040_BRANDING
);
2682 case MPT2SAS_INTEL_SSD910_SSDID
:
2683 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2684 MPT2SAS_INTEL_SSD910_BRANDING
);
2688 "Intel(R) Controller: Subsystem ID: 0x%X\n",
2689 ioc
->name
, ioc
->pdev
->subsystem_device
);
2692 case MPI2_MFGPAGE_DEVID_SAS2308_2
:
2693 switch (ioc
->pdev
->subsystem_device
) {
2694 case MPT2SAS_INTEL_RS25GB008_SSDID
:
2695 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2696 MPT2SAS_INTEL_RS25GB008_BRANDING
);
2698 case MPT2SAS_INTEL_RMS25JB080_SSDID
:
2699 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2700 MPT2SAS_INTEL_RMS25JB080_BRANDING
);
2702 case MPT2SAS_INTEL_RMS25JB040_SSDID
:
2703 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2704 MPT2SAS_INTEL_RMS25JB040_BRANDING
);
2706 case MPT2SAS_INTEL_RMS25KB080_SSDID
:
2707 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2708 MPT2SAS_INTEL_RMS25KB080_BRANDING
);
2710 case MPT2SAS_INTEL_RMS25KB040_SSDID
:
2711 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2712 MPT2SAS_INTEL_RMS25KB040_BRANDING
);
2714 case MPT2SAS_INTEL_RMS25LB040_SSDID
:
2715 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2716 MPT2SAS_INTEL_RMS25LB040_BRANDING
);
2718 case MPT2SAS_INTEL_RMS25LB080_SSDID
:
2719 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2720 MPT2SAS_INTEL_RMS25LB080_BRANDING
);
2724 "Intel(R) Controller: Subsystem ID: 0x%X\n",
2725 ioc
->name
, ioc
->pdev
->subsystem_device
);
2728 case MPI25_MFGPAGE_DEVID_SAS3008
:
2729 switch (ioc
->pdev
->subsystem_device
) {
2730 case MPT3SAS_INTEL_RMS3JC080_SSDID
:
2731 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2732 MPT3SAS_INTEL_RMS3JC080_BRANDING
);
2735 case MPT3SAS_INTEL_RS3GC008_SSDID
:
2736 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2737 MPT3SAS_INTEL_RS3GC008_BRANDING
);
2739 case MPT3SAS_INTEL_RS3FC044_SSDID
:
2740 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2741 MPT3SAS_INTEL_RS3FC044_BRANDING
);
2743 case MPT3SAS_INTEL_RS3UC080_SSDID
:
2744 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2745 MPT3SAS_INTEL_RS3UC080_BRANDING
);
2749 "Intel(R) Controller: Subsystem ID: 0x%X\n",
2750 ioc
->name
, ioc
->pdev
->subsystem_device
);
2756 "Intel(R) Controller: Subsystem ID: 0x%X\n",
2757 ioc
->name
, ioc
->pdev
->subsystem_device
);
2761 case PCI_VENDOR_ID_DELL
:
2762 switch (ioc
->pdev
->device
) {
2763 case MPI2_MFGPAGE_DEVID_SAS2008
:
2764 switch (ioc
->pdev
->subsystem_device
) {
2765 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID
:
2766 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2767 MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING
);
2769 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID
:
2770 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2771 MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING
);
2773 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID
:
2774 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2775 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING
);
2777 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID
:
2778 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2779 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING
);
2781 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID
:
2782 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2783 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING
);
2785 case MPT2SAS_DELL_PERC_H200_SSDID
:
2786 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2787 MPT2SAS_DELL_PERC_H200_BRANDING
);
2789 case MPT2SAS_DELL_6GBPS_SAS_SSDID
:
2790 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2791 MPT2SAS_DELL_6GBPS_SAS_BRANDING
);
2795 "Dell 6Gbps HBA: Subsystem ID: 0x%X\n",
2796 ioc
->name
, ioc
->pdev
->subsystem_device
);
2800 case MPI25_MFGPAGE_DEVID_SAS3008
:
2801 switch (ioc
->pdev
->subsystem_device
) {
2802 case MPT3SAS_DELL_12G_HBA_SSDID
:
2803 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2804 MPT3SAS_DELL_12G_HBA_BRANDING
);
2808 "Dell 12Gbps HBA: Subsystem ID: 0x%X\n",
2809 ioc
->name
, ioc
->pdev
->subsystem_device
);
2815 "Dell HBA: Subsystem ID: 0x%X\n", ioc
->name
,
2816 ioc
->pdev
->subsystem_device
);
2820 case PCI_VENDOR_ID_CISCO
:
2821 switch (ioc
->pdev
->device
) {
2822 case MPI25_MFGPAGE_DEVID_SAS3008
:
2823 switch (ioc
->pdev
->subsystem_device
) {
2824 case MPT3SAS_CISCO_12G_8E_HBA_SSDID
:
2825 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2826 MPT3SAS_CISCO_12G_8E_HBA_BRANDING
);
2828 case MPT3SAS_CISCO_12G_8I_HBA_SSDID
:
2829 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2830 MPT3SAS_CISCO_12G_8I_HBA_BRANDING
);
2832 case MPT3SAS_CISCO_12G_AVILA_HBA_SSDID
:
2833 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2834 MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING
);
2838 "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n",
2839 ioc
->name
, ioc
->pdev
->subsystem_device
);
2843 case MPI25_MFGPAGE_DEVID_SAS3108_1
:
2844 switch (ioc
->pdev
->subsystem_device
) {
2845 case MPT3SAS_CISCO_12G_AVILA_HBA_SSDID
:
2846 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2847 MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING
);
2849 case MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID
:
2850 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2851 MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING
2856 "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n",
2857 ioc
->name
, ioc
->pdev
->subsystem_device
);
2863 "Cisco SAS HBA: Subsystem ID: 0x%X\n",
2864 ioc
->name
, ioc
->pdev
->subsystem_device
);
2868 case MPT2SAS_HP_3PAR_SSVID
:
2869 switch (ioc
->pdev
->device
) {
2870 case MPI2_MFGPAGE_DEVID_SAS2004
:
2871 switch (ioc
->pdev
->subsystem_device
) {
2872 case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID
:
2873 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2874 MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING
);
2878 "HP 6Gbps SAS HBA: Subsystem ID: 0x%X\n",
2879 ioc
->name
, ioc
->pdev
->subsystem_device
);
2882 case MPI2_MFGPAGE_DEVID_SAS2308_2
:
2883 switch (ioc
->pdev
->subsystem_device
) {
2884 case MPT2SAS_HP_2_4_INTERNAL_SSDID
:
2885 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2886 MPT2SAS_HP_2_4_INTERNAL_BRANDING
);
2888 case MPT2SAS_HP_2_4_EXTERNAL_SSDID
:
2889 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2890 MPT2SAS_HP_2_4_EXTERNAL_BRANDING
);
2892 case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID
:
2893 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2894 MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING
);
2896 case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID
:
2897 pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
2898 MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING
);
2902 "HP 6Gbps SAS HBA: Subsystem ID: 0x%X\n",
2903 ioc
->name
, ioc
->pdev
->subsystem_device
);
2908 "HP SAS HBA: Subsystem ID: 0x%X\n",
2909 ioc
->name
, ioc
->pdev
->subsystem_device
);
2918 * _base_display_ioc_capabilities - Disply IOC's capabilities.
2919 * @ioc: per adapter object
2924 _base_display_ioc_capabilities(struct MPT3SAS_ADAPTER
*ioc
)
2928 u32 iounit_pg1_flags
;
2931 bios_version
= le32_to_cpu(ioc
->bios_pg3
.BiosVersion
);
2932 strncpy(desc
, ioc
->manu_pg0
.ChipName
, 16);
2933 pr_info(MPT3SAS_FMT
"%s: FWVersion(%02d.%02d.%02d.%02d), "\
2934 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
2936 (ioc
->facts
.FWVersion
.Word
& 0xFF000000) >> 24,
2937 (ioc
->facts
.FWVersion
.Word
& 0x00FF0000) >> 16,
2938 (ioc
->facts
.FWVersion
.Word
& 0x0000FF00) >> 8,
2939 ioc
->facts
.FWVersion
.Word
& 0x000000FF,
2940 ioc
->pdev
->revision
,
2941 (bios_version
& 0xFF000000) >> 24,
2942 (bios_version
& 0x00FF0000) >> 16,
2943 (bios_version
& 0x0000FF00) >> 8,
2944 bios_version
& 0x000000FF);
2946 _base_display_OEMs_branding(ioc
);
2948 pr_info(MPT3SAS_FMT
"Protocol=(", ioc
->name
);
2950 if (ioc
->facts
.ProtocolFlags
& MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR
) {
2951 pr_info("Initiator");
2955 if (ioc
->facts
.ProtocolFlags
& MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET
) {
2956 pr_info("%sTarget", i
? "," : "");
2962 pr_info("Capabilities=(");
2964 if (!ioc
->hide_ir_msg
) {
2965 if (ioc
->facts
.IOCCapabilities
&
2966 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID
) {
2972 if (ioc
->facts
.IOCCapabilities
& MPI2_IOCFACTS_CAPABILITY_TLR
) {
2973 pr_info("%sTLR", i
? "," : "");
2977 if (ioc
->facts
.IOCCapabilities
& MPI2_IOCFACTS_CAPABILITY_MULTICAST
) {
2978 pr_info("%sMulticast", i
? "," : "");
2982 if (ioc
->facts
.IOCCapabilities
&
2983 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET
) {
2984 pr_info("%sBIDI Target", i
? "," : "");
2988 if (ioc
->facts
.IOCCapabilities
& MPI2_IOCFACTS_CAPABILITY_EEDP
) {
2989 pr_info("%sEEDP", i
? "," : "");
2993 if (ioc
->facts
.IOCCapabilities
&
2994 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER
) {
2995 pr_info("%sSnapshot Buffer", i
? "," : "");
2999 if (ioc
->facts
.IOCCapabilities
&
3000 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER
) {
3001 pr_info("%sDiag Trace Buffer", i
? "," : "");
3005 if (ioc
->facts
.IOCCapabilities
&
3006 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER
) {
3007 pr_info("%sDiag Extended Buffer", i
? "," : "");
3011 if (ioc
->facts
.IOCCapabilities
&
3012 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING
) {
3013 pr_info("%sTask Set Full", i
? "," : "");
3017 iounit_pg1_flags
= le32_to_cpu(ioc
->iounit_pg1
.Flags
);
3018 if (!(iounit_pg1_flags
& MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE
)) {
3019 pr_info("%sNCQ", i
? "," : "");
3027 * mpt3sas_base_update_missing_delay - change the missing delay timers
3028 * @ioc: per adapter object
3029 * @device_missing_delay: amount of time till device is reported missing
3030 * @io_missing_delay: interval IO is returned when there is a missing device
3034 * Passed on the command line, this function will modify the device missing
3035 * delay, as well as the io missing delay. This should be called at driver
3039 mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER
*ioc
,
3040 u16 device_missing_delay
, u8 io_missing_delay
)
3042 u16 dmd
, dmd_new
, dmd_orignal
;
3043 u8 io_missing_delay_original
;
3045 Mpi2SasIOUnitPage1_t
*sas_iounit_pg1
= NULL
;
3046 Mpi2ConfigReply_t mpi_reply
;
3050 mpt3sas_config_get_number_hba_phys(ioc
, &num_phys
);
3054 sz
= offsetof(Mpi2SasIOUnitPage1_t
, PhyData
) + (num_phys
*
3055 sizeof(Mpi2SasIOUnit1PhyData_t
));
3056 sas_iounit_pg1
= kzalloc(sz
, GFP_KERNEL
);
3057 if (!sas_iounit_pg1
) {
3058 pr_err(MPT3SAS_FMT
"failure at %s:%d/%s()!\n",
3059 ioc
->name
, __FILE__
, __LINE__
, __func__
);
3062 if ((mpt3sas_config_get_sas_iounit_pg1(ioc
, &mpi_reply
,
3063 sas_iounit_pg1
, sz
))) {
3064 pr_err(MPT3SAS_FMT
"failure at %s:%d/%s()!\n",
3065 ioc
->name
, __FILE__
, __LINE__
, __func__
);
3068 ioc_status
= le16_to_cpu(mpi_reply
.IOCStatus
) &
3069 MPI2_IOCSTATUS_MASK
;
3070 if (ioc_status
!= MPI2_IOCSTATUS_SUCCESS
) {
3071 pr_err(MPT3SAS_FMT
"failure at %s:%d/%s()!\n",
3072 ioc
->name
, __FILE__
, __LINE__
, __func__
);
3076 /* device missing delay */
3077 dmd
= sas_iounit_pg1
->ReportDeviceMissingDelay
;
3078 if (dmd
& MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16
)
3079 dmd
= (dmd
& MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK
) * 16;
3081 dmd
= dmd
& MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK
;
3083 if (device_missing_delay
> 0x7F) {
3084 dmd
= (device_missing_delay
> 0x7F0) ? 0x7F0 :
3085 device_missing_delay
;
3087 dmd
|= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16
;
3089 dmd
= device_missing_delay
;
3090 sas_iounit_pg1
->ReportDeviceMissingDelay
= dmd
;
3092 /* io missing delay */
3093 io_missing_delay_original
= sas_iounit_pg1
->IODeviceMissingDelay
;
3094 sas_iounit_pg1
->IODeviceMissingDelay
= io_missing_delay
;
3096 if (!mpt3sas_config_set_sas_iounit_pg1(ioc
, &mpi_reply
, sas_iounit_pg1
,
3098 if (dmd
& MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16
)
3100 MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK
) * 16;
3103 dmd
& MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK
;
3104 pr_info(MPT3SAS_FMT
"device_missing_delay: old(%d), new(%d)\n",
3105 ioc
->name
, dmd_orignal
, dmd_new
);
3106 pr_info(MPT3SAS_FMT
"ioc_missing_delay: old(%d), new(%d)\n",
3107 ioc
->name
, io_missing_delay_original
,
3109 ioc
->device_missing_delay
= dmd_new
;
3110 ioc
->io_missing_delay
= io_missing_delay
;
3114 kfree(sas_iounit_pg1
);
3117 * _base_static_config_pages - static start of day config pages
3118 * @ioc: per adapter object
3123 _base_static_config_pages(struct MPT3SAS_ADAPTER
*ioc
)
3125 Mpi2ConfigReply_t mpi_reply
;
3126 u32 iounit_pg1_flags
;
3128 mpt3sas_config_get_manufacturing_pg0(ioc
, &mpi_reply
, &ioc
->manu_pg0
);
3129 if (ioc
->ir_firmware
)
3130 mpt3sas_config_get_manufacturing_pg10(ioc
, &mpi_reply
,
3134 * Ensure correct T10 PI operation if vendor left EEDPTagMode
3135 * flag unset in NVDATA.
3137 mpt3sas_config_get_manufacturing_pg11(ioc
, &mpi_reply
, &ioc
->manu_pg11
);
3138 if (ioc
->manu_pg11
.EEDPTagMode
== 0) {
3139 pr_err("%s: overriding NVDATA EEDPTagMode setting\n",
3141 ioc
->manu_pg11
.EEDPTagMode
&= ~0x3;
3142 ioc
->manu_pg11
.EEDPTagMode
|= 0x1;
3143 mpt3sas_config_set_manufacturing_pg11(ioc
, &mpi_reply
,
3147 mpt3sas_config_get_bios_pg2(ioc
, &mpi_reply
, &ioc
->bios_pg2
);
3148 mpt3sas_config_get_bios_pg3(ioc
, &mpi_reply
, &ioc
->bios_pg3
);
3149 mpt3sas_config_get_ioc_pg8(ioc
, &mpi_reply
, &ioc
->ioc_pg8
);
3150 mpt3sas_config_get_iounit_pg0(ioc
, &mpi_reply
, &ioc
->iounit_pg0
);
3151 mpt3sas_config_get_iounit_pg1(ioc
, &mpi_reply
, &ioc
->iounit_pg1
);
3152 mpt3sas_config_get_iounit_pg8(ioc
, &mpi_reply
, &ioc
->iounit_pg8
);
3153 _base_display_ioc_capabilities(ioc
);
3156 * Enable task_set_full handling in iounit_pg1 when the
3157 * facts capabilities indicate that its supported.
3159 iounit_pg1_flags
= le32_to_cpu(ioc
->iounit_pg1
.Flags
);
3160 if ((ioc
->facts
.IOCCapabilities
&
3161 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING
))
3163 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING
;
3166 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING
;
3167 ioc
->iounit_pg1
.Flags
= cpu_to_le32(iounit_pg1_flags
);
3168 mpt3sas_config_set_iounit_pg1(ioc
, &mpi_reply
, &ioc
->iounit_pg1
);
3170 if (ioc
->iounit_pg8
.NumSensors
)
3171 ioc
->temp_sensors_count
= ioc
->iounit_pg8
.NumSensors
;
3175 * _base_release_memory_pools - release memory
3176 * @ioc: per adapter object
3178 * Free memory allocated from _base_allocate_memory_pools.
3183 _base_release_memory_pools(struct MPT3SAS_ADAPTER
*ioc
)
3186 struct reply_post_struct
*rps
;
3188 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
3192 pci_free_consistent(ioc
->pdev
, ioc
->request_dma_sz
,
3193 ioc
->request
, ioc
->request_dma
);
3194 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
3195 "request_pool(0x%p): free\n",
3196 ioc
->name
, ioc
->request
));
3197 ioc
->request
= NULL
;
3201 pci_pool_free(ioc
->sense_dma_pool
, ioc
->sense
, ioc
->sense_dma
);
3202 if (ioc
->sense_dma_pool
)
3203 pci_pool_destroy(ioc
->sense_dma_pool
);
3204 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
3205 "sense_pool(0x%p): free\n",
3206 ioc
->name
, ioc
->sense
));
3211 pci_pool_free(ioc
->reply_dma_pool
, ioc
->reply
, ioc
->reply_dma
);
3212 if (ioc
->reply_dma_pool
)
3213 pci_pool_destroy(ioc
->reply_dma_pool
);
3214 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
3215 "reply_pool(0x%p): free\n",
3216 ioc
->name
, ioc
->reply
));
3220 if (ioc
->reply_free
) {
3221 pci_pool_free(ioc
->reply_free_dma_pool
, ioc
->reply_free
,
3222 ioc
->reply_free_dma
);
3223 if (ioc
->reply_free_dma_pool
)
3224 pci_pool_destroy(ioc
->reply_free_dma_pool
);
3225 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
3226 "reply_free_pool(0x%p): free\n",
3227 ioc
->name
, ioc
->reply_free
));
3228 ioc
->reply_free
= NULL
;
3231 if (ioc
->reply_post
) {
3233 rps
= &ioc
->reply_post
[i
];
3234 if (rps
->reply_post_free
) {
3236 ioc
->reply_post_free_dma_pool
,
3237 rps
->reply_post_free
,
3238 rps
->reply_post_free_dma
);
3239 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
3240 "reply_post_free_pool(0x%p): free\n",
3241 ioc
->name
, rps
->reply_post_free
));
3242 rps
->reply_post_free
= NULL
;
3244 } while (ioc
->rdpq_array_enable
&&
3245 (++i
< ioc
->reply_queue_count
));
3247 if (ioc
->reply_post_free_dma_pool
)
3248 pci_pool_destroy(ioc
->reply_post_free_dma_pool
);
3249 kfree(ioc
->reply_post
);
3252 if (ioc
->config_page
) {
3253 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
3254 "config_page(0x%p): free\n", ioc
->name
,
3256 pci_free_consistent(ioc
->pdev
, ioc
->config_page_sz
,
3257 ioc
->config_page
, ioc
->config_page_dma
);
3260 if (ioc
->scsi_lookup
) {
3261 free_pages((ulong
)ioc
->scsi_lookup
, ioc
->scsi_lookup_pages
);
3262 ioc
->scsi_lookup
= NULL
;
3264 kfree(ioc
->hpr_lookup
);
3265 kfree(ioc
->internal_lookup
);
3266 if (ioc
->chain_lookup
) {
3267 for (i
= 0; i
< ioc
->chain_depth
; i
++) {
3268 if (ioc
->chain_lookup
[i
].chain_buffer
)
3269 pci_pool_free(ioc
->chain_dma_pool
,
3270 ioc
->chain_lookup
[i
].chain_buffer
,
3271 ioc
->chain_lookup
[i
].chain_buffer_dma
);
3273 if (ioc
->chain_dma_pool
)
3274 pci_pool_destroy(ioc
->chain_dma_pool
);
3275 free_pages((ulong
)ioc
->chain_lookup
, ioc
->chain_pages
);
3276 ioc
->chain_lookup
= NULL
;
3281 * _base_allocate_memory_pools - allocate start of day memory pools
3282 * @ioc: per adapter object
3284 * Returns 0 success, anything else error
3287 _base_allocate_memory_pools(struct MPT3SAS_ADAPTER
*ioc
)
3289 struct mpt3sas_facts
*facts
;
3290 u16 max_sge_elements
;
3291 u16 chains_needed_per_io
;
3292 u32 sz
, total_sz
, reply_post_free_sz
;
3294 u16 max_request_credit
;
3295 unsigned short sg_tablesize
;
3299 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
3304 facts
= &ioc
->facts
;
3306 /* command line tunables for max sgl entries */
3307 if (max_sgl_entries
!= -1)
3308 sg_tablesize
= max_sgl_entries
;
3310 if (ioc
->hba_mpi_version_belonged
== MPI2_VERSION
)
3311 sg_tablesize
= MPT2SAS_SG_DEPTH
;
3313 sg_tablesize
= MPT3SAS_SG_DEPTH
;
3316 if (sg_tablesize
< MPT_MIN_PHYS_SEGMENTS
)
3317 sg_tablesize
= MPT_MIN_PHYS_SEGMENTS
;
3318 else if (sg_tablesize
> MPT_MAX_PHYS_SEGMENTS
) {
3319 sg_tablesize
= min_t(unsigned short, sg_tablesize
,
3322 "sg_tablesize(%u) is bigger than kernel"
3323 " defined SG_CHUNK_SIZE(%u)\n", ioc
->name
,
3324 sg_tablesize
, MPT_MAX_PHYS_SEGMENTS
);
3326 ioc
->shost
->sg_tablesize
= sg_tablesize
;
3328 ioc
->internal_depth
= min_t(int, (facts
->HighPriorityCredit
+ (5)),
3329 (facts
->RequestCredit
/ 4));
3330 if (ioc
->internal_depth
< INTERNAL_CMDS_COUNT
) {
3331 if (facts
->RequestCredit
<= (INTERNAL_CMDS_COUNT
+
3332 INTERNAL_SCSIIO_CMDS_COUNT
)) {
3333 pr_err(MPT3SAS_FMT
"IOC doesn't have enough Request \
3334 Credits, it has just %d number of credits\n",
3335 ioc
->name
, facts
->RequestCredit
);
3338 ioc
->internal_depth
= 10;
3341 ioc
->hi_priority_depth
= ioc
->internal_depth
- (5);
3342 /* command line tunables for max controller queue depth */
3343 if (max_queue_depth
!= -1 && max_queue_depth
!= 0) {
3344 max_request_credit
= min_t(u16
, max_queue_depth
+
3345 ioc
->internal_depth
, facts
->RequestCredit
);
3346 if (max_request_credit
> MAX_HBA_QUEUE_DEPTH
)
3347 max_request_credit
= MAX_HBA_QUEUE_DEPTH
;
3349 max_request_credit
= min_t(u16
, facts
->RequestCredit
,
3350 MAX_HBA_QUEUE_DEPTH
);
3352 /* Firmware maintains additional facts->HighPriorityCredit number of
3353 * credits for HiPriprity Request messages, so hba queue depth will be
3354 * sum of max_request_credit and high priority queue depth.
3356 ioc
->hba_queue_depth
= max_request_credit
+ ioc
->hi_priority_depth
;
3358 /* request frame size */
3359 ioc
->request_sz
= facts
->IOCRequestFrameSize
* 4;
3361 /* reply frame size */
3362 ioc
->reply_sz
= facts
->ReplyFrameSize
* 4;
3364 /* chain segment size */
3365 if (ioc
->hba_mpi_version_belonged
!= MPI2_VERSION
) {
3366 if (facts
->IOCMaxChainSegmentSize
)
3367 ioc
->chain_segment_sz
=
3368 facts
->IOCMaxChainSegmentSize
*
3371 /* set to 128 bytes size if IOCMaxChainSegmentSize is zero */
3372 ioc
->chain_segment_sz
= DEFAULT_NUM_FWCHAIN_ELEMTS
*
3375 ioc
->chain_segment_sz
= ioc
->request_sz
;
3377 /* calculate the max scatter element size */
3378 sge_size
= max_t(u16
, ioc
->sge_size
, ioc
->sge_size_ieee
);
3382 /* calculate number of sg elements left over in the 1st frame */
3383 max_sge_elements
= ioc
->request_sz
- ((sizeof(Mpi2SCSIIORequest_t
) -
3384 sizeof(Mpi2SGEIOUnion_t
)) + sge_size
);
3385 ioc
->max_sges_in_main_message
= max_sge_elements
/sge_size
;
3387 /* now do the same for a chain buffer */
3388 max_sge_elements
= ioc
->chain_segment_sz
- sge_size
;
3389 ioc
->max_sges_in_chain_message
= max_sge_elements
/sge_size
;
3392 * MPT3SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
3394 chains_needed_per_io
= ((ioc
->shost
->sg_tablesize
-
3395 ioc
->max_sges_in_main_message
)/ioc
->max_sges_in_chain_message
)
3397 if (chains_needed_per_io
> facts
->MaxChainDepth
) {
3398 chains_needed_per_io
= facts
->MaxChainDepth
;
3399 ioc
->shost
->sg_tablesize
= min_t(u16
,
3400 ioc
->max_sges_in_main_message
+ (ioc
->max_sges_in_chain_message
3401 * chains_needed_per_io
), ioc
->shost
->sg_tablesize
);
3403 ioc
->chains_needed_per_io
= chains_needed_per_io
;
3405 /* reply free queue sizing - taking into account for 64 FW events */
3406 ioc
->reply_free_queue_depth
= ioc
->hba_queue_depth
+ 64;
3408 /* calculate reply descriptor post queue depth */
3409 ioc
->reply_post_queue_depth
= ioc
->hba_queue_depth
+
3410 ioc
->reply_free_queue_depth
+ 1 ;
3411 /* align the reply post queue on the next 16 count boundary */
3412 if (ioc
->reply_post_queue_depth
% 16)
3413 ioc
->reply_post_queue_depth
+= 16 -
3414 (ioc
->reply_post_queue_depth
% 16);
3416 if (ioc
->reply_post_queue_depth
>
3417 facts
->MaxReplyDescriptorPostQueueDepth
) {
3418 ioc
->reply_post_queue_depth
=
3419 facts
->MaxReplyDescriptorPostQueueDepth
-
3420 (facts
->MaxReplyDescriptorPostQueueDepth
% 16);
3421 ioc
->hba_queue_depth
=
3422 ((ioc
->reply_post_queue_depth
- 64) / 2) - 1;
3423 ioc
->reply_free_queue_depth
= ioc
->hba_queue_depth
+ 64;
3426 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"scatter gather: " \
3427 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
3428 "chains_per_io(%d)\n", ioc
->name
, ioc
->max_sges_in_main_message
,
3429 ioc
->max_sges_in_chain_message
, ioc
->shost
->sg_tablesize
,
3430 ioc
->chains_needed_per_io
));
3432 /* reply post queue, 16 byte align */
3433 reply_post_free_sz
= ioc
->reply_post_queue_depth
*
3434 sizeof(Mpi2DefaultReplyDescriptor_t
);
3436 sz
= reply_post_free_sz
;
3437 if (_base_is_controller_msix_enabled(ioc
) && !ioc
->rdpq_array_enable
)
3438 sz
*= ioc
->reply_queue_count
;
3440 ioc
->reply_post
= kcalloc((ioc
->rdpq_array_enable
) ?
3441 (ioc
->reply_queue_count
):1,
3442 sizeof(struct reply_post_struct
), GFP_KERNEL
);
3444 if (!ioc
->reply_post
) {
3445 pr_err(MPT3SAS_FMT
"reply_post_free pool: kcalloc failed\n",
3449 ioc
->reply_post_free_dma_pool
= pci_pool_create("reply_post_free pool",
3450 ioc
->pdev
, sz
, 16, 0);
3451 if (!ioc
->reply_post_free_dma_pool
) {
3453 "reply_post_free pool: pci_pool_create failed\n",
3459 ioc
->reply_post
[i
].reply_post_free
=
3460 pci_pool_alloc(ioc
->reply_post_free_dma_pool
,
3462 &ioc
->reply_post
[i
].reply_post_free_dma
);
3463 if (!ioc
->reply_post
[i
].reply_post_free
) {
3465 "reply_post_free pool: pci_pool_alloc failed\n",
3469 memset(ioc
->reply_post
[i
].reply_post_free
, 0, sz
);
3470 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3471 "reply post free pool (0x%p): depth(%d),"
3472 "element_size(%d), pool_size(%d kB)\n", ioc
->name
,
3473 ioc
->reply_post
[i
].reply_post_free
,
3474 ioc
->reply_post_queue_depth
, 8, sz
/1024));
3475 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3476 "reply_post_free_dma = (0x%llx)\n", ioc
->name
,
3477 (unsigned long long)
3478 ioc
->reply_post
[i
].reply_post_free_dma
));
3480 } while (ioc
->rdpq_array_enable
&& (++i
< ioc
->reply_queue_count
));
3482 if (ioc
->dma_mask
== 64) {
3483 if (_base_change_consistent_dma_mask(ioc
, ioc
->pdev
) != 0) {
3485 "no suitable consistent DMA mask for %s\n",
3486 ioc
->name
, pci_name(ioc
->pdev
));
3491 ioc
->scsiio_depth
= ioc
->hba_queue_depth
-
3492 ioc
->hi_priority_depth
- ioc
->internal_depth
;
3494 /* set the scsi host can_queue depth
3495 * with some internal commands that could be outstanding
3497 ioc
->shost
->can_queue
= ioc
->scsiio_depth
- INTERNAL_SCSIIO_CMDS_COUNT
;
3498 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3499 "scsi host: can_queue depth (%d)\n",
3500 ioc
->name
, ioc
->shost
->can_queue
));
3503 /* contiguous pool for request and chains, 16 byte align, one extra "
3506 ioc
->chain_depth
= ioc
->chains_needed_per_io
* ioc
->scsiio_depth
;
3507 sz
= ((ioc
->scsiio_depth
+ 1) * ioc
->request_sz
);
3509 /* hi-priority queue */
3510 sz
+= (ioc
->hi_priority_depth
* ioc
->request_sz
);
3512 /* internal queue */
3513 sz
+= (ioc
->internal_depth
* ioc
->request_sz
);
3515 ioc
->request_dma_sz
= sz
;
3516 ioc
->request
= pci_alloc_consistent(ioc
->pdev
, sz
, &ioc
->request_dma
);
3517 if (!ioc
->request
) {
3518 pr_err(MPT3SAS_FMT
"request pool: pci_alloc_consistent " \
3519 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
3520 "total(%d kB)\n", ioc
->name
, ioc
->hba_queue_depth
,
3521 ioc
->chains_needed_per_io
, ioc
->request_sz
, sz
/1024);
3522 if (ioc
->scsiio_depth
< MPT3SAS_SAS_QUEUE_DEPTH
)
3525 ioc
->hba_queue_depth
-= retry_sz
;
3526 _base_release_memory_pools(ioc
);
3527 goto retry_allocation
;
3531 pr_err(MPT3SAS_FMT
"request pool: pci_alloc_consistent " \
3532 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
3533 "total(%d kb)\n", ioc
->name
, ioc
->hba_queue_depth
,
3534 ioc
->chains_needed_per_io
, ioc
->request_sz
, sz
/1024);
3536 /* hi-priority queue */
3537 ioc
->hi_priority
= ioc
->request
+ ((ioc
->scsiio_depth
+ 1) *
3539 ioc
->hi_priority_dma
= ioc
->request_dma
+ ((ioc
->scsiio_depth
+ 1) *
3542 /* internal queue */
3543 ioc
->internal
= ioc
->hi_priority
+ (ioc
->hi_priority_depth
*
3545 ioc
->internal_dma
= ioc
->hi_priority_dma
+ (ioc
->hi_priority_depth
*
3548 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3549 "request pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n",
3550 ioc
->name
, ioc
->request
, ioc
->hba_queue_depth
, ioc
->request_sz
,
3551 (ioc
->hba_queue_depth
* ioc
->request_sz
)/1024));
3553 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"request pool: dma(0x%llx)\n",
3554 ioc
->name
, (unsigned long long) ioc
->request_dma
));
3557 sz
= ioc
->scsiio_depth
* sizeof(struct scsiio_tracker
);
3558 ioc
->scsi_lookup_pages
= get_order(sz
);
3559 ioc
->scsi_lookup
= (struct scsiio_tracker
*)__get_free_pages(
3560 GFP_KERNEL
, ioc
->scsi_lookup_pages
);
3561 if (!ioc
->scsi_lookup
) {
3562 pr_err(MPT3SAS_FMT
"scsi_lookup: get_free_pages failed, sz(%d)\n",
3563 ioc
->name
, (int)sz
);
3567 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"scsiio(0x%p): depth(%d)\n",
3568 ioc
->name
, ioc
->request
, ioc
->scsiio_depth
));
3570 ioc
->chain_depth
= min_t(u32
, ioc
->chain_depth
, MAX_CHAIN_DEPTH
);
3571 sz
= ioc
->chain_depth
* sizeof(struct chain_tracker
);
3572 ioc
->chain_pages
= get_order(sz
);
3573 ioc
->chain_lookup
= (struct chain_tracker
*)__get_free_pages(
3574 GFP_KERNEL
, ioc
->chain_pages
);
3575 if (!ioc
->chain_lookup
) {
3576 pr_err(MPT3SAS_FMT
"chain_lookup: __get_free_pages failed\n",
3580 ioc
->chain_dma_pool
= pci_pool_create("chain pool", ioc
->pdev
,
3581 ioc
->chain_segment_sz
, 16, 0);
3582 if (!ioc
->chain_dma_pool
) {
3583 pr_err(MPT3SAS_FMT
"chain_dma_pool: pci_pool_create failed\n",
3587 for (i
= 0; i
< ioc
->chain_depth
; i
++) {
3588 ioc
->chain_lookup
[i
].chain_buffer
= pci_pool_alloc(
3589 ioc
->chain_dma_pool
, GFP_KERNEL
,
3590 &ioc
->chain_lookup
[i
].chain_buffer_dma
);
3591 if (!ioc
->chain_lookup
[i
].chain_buffer
) {
3592 ioc
->chain_depth
= i
;
3595 total_sz
+= ioc
->chain_segment_sz
;
3598 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3599 "chain pool depth(%d), frame_size(%d), pool_size(%d kB)\n",
3600 ioc
->name
, ioc
->chain_depth
, ioc
->chain_segment_sz
,
3601 ((ioc
->chain_depth
* ioc
->chain_segment_sz
))/1024));
3603 /* initialize hi-priority queue smid's */
3604 ioc
->hpr_lookup
= kcalloc(ioc
->hi_priority_depth
,
3605 sizeof(struct request_tracker
), GFP_KERNEL
);
3606 if (!ioc
->hpr_lookup
) {
3607 pr_err(MPT3SAS_FMT
"hpr_lookup: kcalloc failed\n",
3611 ioc
->hi_priority_smid
= ioc
->scsiio_depth
+ 1;
3612 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3613 "hi_priority(0x%p): depth(%d), start smid(%d)\n",
3614 ioc
->name
, ioc
->hi_priority
,
3615 ioc
->hi_priority_depth
, ioc
->hi_priority_smid
));
3617 /* initialize internal queue smid's */
3618 ioc
->internal_lookup
= kcalloc(ioc
->internal_depth
,
3619 sizeof(struct request_tracker
), GFP_KERNEL
);
3620 if (!ioc
->internal_lookup
) {
3621 pr_err(MPT3SAS_FMT
"internal_lookup: kcalloc failed\n",
3625 ioc
->internal_smid
= ioc
->hi_priority_smid
+ ioc
->hi_priority_depth
;
3626 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3627 "internal(0x%p): depth(%d), start smid(%d)\n",
3628 ioc
->name
, ioc
->internal
,
3629 ioc
->internal_depth
, ioc
->internal_smid
));
3631 /* sense buffers, 4 byte align */
3632 sz
= ioc
->scsiio_depth
* SCSI_SENSE_BUFFERSIZE
;
3633 ioc
->sense_dma_pool
= pci_pool_create("sense pool", ioc
->pdev
, sz
, 4,
3635 if (!ioc
->sense_dma_pool
) {
3636 pr_err(MPT3SAS_FMT
"sense pool: pci_pool_create failed\n",
3640 ioc
->sense
= pci_pool_alloc(ioc
->sense_dma_pool
, GFP_KERNEL
,
3643 pr_err(MPT3SAS_FMT
"sense pool: pci_pool_alloc failed\n",
3647 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3648 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
3649 "(%d kB)\n", ioc
->name
, ioc
->sense
, ioc
->scsiio_depth
,
3650 SCSI_SENSE_BUFFERSIZE
, sz
/1024));
3651 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"sense_dma(0x%llx)\n",
3652 ioc
->name
, (unsigned long long)ioc
->sense_dma
));
3655 /* reply pool, 4 byte align */
3656 sz
= ioc
->reply_free_queue_depth
* ioc
->reply_sz
;
3657 ioc
->reply_dma_pool
= pci_pool_create("reply pool", ioc
->pdev
, sz
, 4,
3659 if (!ioc
->reply_dma_pool
) {
3660 pr_err(MPT3SAS_FMT
"reply pool: pci_pool_create failed\n",
3664 ioc
->reply
= pci_pool_alloc(ioc
->reply_dma_pool
, GFP_KERNEL
,
3667 pr_err(MPT3SAS_FMT
"reply pool: pci_pool_alloc failed\n",
3671 ioc
->reply_dma_min_address
= (u32
)(ioc
->reply_dma
);
3672 ioc
->reply_dma_max_address
= (u32
)(ioc
->reply_dma
) + sz
;
3673 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3674 "reply pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n",
3675 ioc
->name
, ioc
->reply
,
3676 ioc
->reply_free_queue_depth
, ioc
->reply_sz
, sz
/1024));
3677 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"reply_dma(0x%llx)\n",
3678 ioc
->name
, (unsigned long long)ioc
->reply_dma
));
3681 /* reply free queue, 16 byte align */
3682 sz
= ioc
->reply_free_queue_depth
* 4;
3683 ioc
->reply_free_dma_pool
= pci_pool_create("reply_free pool",
3684 ioc
->pdev
, sz
, 16, 0);
3685 if (!ioc
->reply_free_dma_pool
) {
3686 pr_err(MPT3SAS_FMT
"reply_free pool: pci_pool_create failed\n",
3690 ioc
->reply_free
= pci_pool_alloc(ioc
->reply_free_dma_pool
, GFP_KERNEL
,
3691 &ioc
->reply_free_dma
);
3692 if (!ioc
->reply_free
) {
3693 pr_err(MPT3SAS_FMT
"reply_free pool: pci_pool_alloc failed\n",
3697 memset(ioc
->reply_free
, 0, sz
);
3698 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"reply_free pool(0x%p): " \
3699 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc
->name
,
3700 ioc
->reply_free
, ioc
->reply_free_queue_depth
, 4, sz
/1024));
3701 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3702 "reply_free_dma (0x%llx)\n",
3703 ioc
->name
, (unsigned long long)ioc
->reply_free_dma
));
3706 ioc
->config_page_sz
= 512;
3707 ioc
->config_page
= pci_alloc_consistent(ioc
->pdev
,
3708 ioc
->config_page_sz
, &ioc
->config_page_dma
);
3709 if (!ioc
->config_page
) {
3711 "config page: pci_pool_alloc failed\n",
3715 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
3716 "config page(0x%p): size(%d)\n",
3717 ioc
->name
, ioc
->config_page
, ioc
->config_page_sz
));
3718 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"config_page_dma(0x%llx)\n",
3719 ioc
->name
, (unsigned long long)ioc
->config_page_dma
));
3720 total_sz
+= ioc
->config_page_sz
;
3722 pr_info(MPT3SAS_FMT
"Allocated physical memory: size(%d kB)\n",
3723 ioc
->name
, total_sz
/1024);
3725 "Current Controller Queue Depth(%d),Max Controller Queue Depth(%d)\n",
3726 ioc
->name
, ioc
->shost
->can_queue
, facts
->RequestCredit
);
3727 pr_info(MPT3SAS_FMT
"Scatter Gather Elements per IO(%d)\n",
3728 ioc
->name
, ioc
->shost
->sg_tablesize
);
3736 * mpt3sas_base_get_iocstate - Get the current state of a MPT adapter.
3737 * @ioc: Pointer to MPT_ADAPTER structure
3738 * @cooked: Request raw or cooked IOC state
3740 * Returns all IOC Doorbell register bits if cooked==0, else just the
3741 * Doorbell bits in MPI_IOC_STATE_MASK.
3744 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER
*ioc
, int cooked
)
3748 s
= readl(&ioc
->chip
->Doorbell
);
3749 sc
= s
& MPI2_IOC_STATE_MASK
;
3750 return cooked
? sc
: s
;
3754 * _base_wait_on_iocstate - waiting on a particular ioc state
3755 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
3756 * @timeout: timeout in second
3758 * Returns 0 for success, non-zero for failure.
3761 _base_wait_on_iocstate(struct MPT3SAS_ADAPTER
*ioc
, u32 ioc_state
, int timeout
)
3767 cntdn
= 1000 * timeout
;
3769 current_state
= mpt3sas_base_get_iocstate(ioc
, 1);
3770 if (current_state
== ioc_state
)
3772 if (count
&& current_state
== MPI2_IOC_STATE_FAULT
)
3775 usleep_range(1000, 1500);
3779 return current_state
;
3783 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
3784 * a write to the doorbell)
3785 * @ioc: per adapter object
3786 * @timeout: timeout in second
3788 * Returns 0 for success, non-zero for failure.
3790 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
3793 _base_diag_reset(struct MPT3SAS_ADAPTER
*ioc
);
3796 _base_wait_for_doorbell_int(struct MPT3SAS_ADAPTER
*ioc
, int timeout
)
3802 cntdn
= 1000 * timeout
;
3804 int_status
= readl(&ioc
->chip
->HostInterruptStatus
);
3805 if (int_status
& MPI2_HIS_IOC2SYS_DB_STATUS
) {
3806 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
3807 "%s: successful count(%d), timeout(%d)\n",
3808 ioc
->name
, __func__
, count
, timeout
));
3812 usleep_range(1000, 1500);
3817 "%s: failed due to timeout count(%d), int_status(%x)!\n",
3818 ioc
->name
, __func__
, count
, int_status
);
3823 _base_spin_on_doorbell_int(struct MPT3SAS_ADAPTER
*ioc
, int timeout
)
3829 cntdn
= 2000 * timeout
;
3831 int_status
= readl(&ioc
->chip
->HostInterruptStatus
);
3832 if (int_status
& MPI2_HIS_IOC2SYS_DB_STATUS
) {
3833 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
3834 "%s: successful count(%d), timeout(%d)\n",
3835 ioc
->name
, __func__
, count
, timeout
));
3844 "%s: failed due to timeout count(%d), int_status(%x)!\n",
3845 ioc
->name
, __func__
, count
, int_status
);
3851 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
3852 * @ioc: per adapter object
3853 * @timeout: timeout in second
3855 * Returns 0 for success, non-zero for failure.
3857 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
3861 _base_wait_for_doorbell_ack(struct MPT3SAS_ADAPTER
*ioc
, int timeout
)
3868 cntdn
= 1000 * timeout
;
3870 int_status
= readl(&ioc
->chip
->HostInterruptStatus
);
3871 if (!(int_status
& MPI2_HIS_SYS2IOC_DB_STATUS
)) {
3872 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
3873 "%s: successful count(%d), timeout(%d)\n",
3874 ioc
->name
, __func__
, count
, timeout
));
3876 } else if (int_status
& MPI2_HIS_IOC2SYS_DB_STATUS
) {
3877 doorbell
= readl(&ioc
->chip
->Doorbell
);
3878 if ((doorbell
& MPI2_IOC_STATE_MASK
) ==
3879 MPI2_IOC_STATE_FAULT
) {
3880 mpt3sas_base_fault_info(ioc
, doorbell
);
3883 } else if (int_status
== 0xFFFFFFFF)
3886 usleep_range(1000, 1500);
3892 "%s: failed due to timeout count(%d), int_status(%x)!\n",
3893 ioc
->name
, __func__
, count
, int_status
);
3898 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
3899 * @ioc: per adapter object
3900 * @timeout: timeout in second
3902 * Returns 0 for success, non-zero for failure.
3906 _base_wait_for_doorbell_not_used(struct MPT3SAS_ADAPTER
*ioc
, int timeout
)
3912 cntdn
= 1000 * timeout
;
3914 doorbell_reg
= readl(&ioc
->chip
->Doorbell
);
3915 if (!(doorbell_reg
& MPI2_DOORBELL_USED
)) {
3916 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
3917 "%s: successful count(%d), timeout(%d)\n",
3918 ioc
->name
, __func__
, count
, timeout
));
3922 usleep_range(1000, 1500);
3927 "%s: failed due to timeout count(%d), doorbell_reg(%x)!\n",
3928 ioc
->name
, __func__
, count
, doorbell_reg
);
3933 * _base_send_ioc_reset - send doorbell reset
3934 * @ioc: per adapter object
3935 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
3936 * @timeout: timeout in second
3938 * Returns 0 for success, non-zero for failure.
3941 _base_send_ioc_reset(struct MPT3SAS_ADAPTER
*ioc
, u8 reset_type
, int timeout
)
3946 if (reset_type
!= MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
) {
3947 pr_err(MPT3SAS_FMT
"%s: unknown reset_type\n",
3948 ioc
->name
, __func__
);
3952 if (!(ioc
->facts
.IOCCapabilities
&
3953 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY
))
3956 pr_info(MPT3SAS_FMT
"sending message unit reset !!\n", ioc
->name
);
3958 writel(reset_type
<< MPI2_DOORBELL_FUNCTION_SHIFT
,
3959 &ioc
->chip
->Doorbell
);
3960 if ((_base_wait_for_doorbell_ack(ioc
, 15))) {
3964 ioc_state
= _base_wait_on_iocstate(ioc
, MPI2_IOC_STATE_READY
, timeout
);
3967 "%s: failed going to ready state (ioc_state=0x%x)\n",
3968 ioc
->name
, __func__
, ioc_state
);
3973 pr_info(MPT3SAS_FMT
"message unit reset: %s\n",
3974 ioc
->name
, ((r
== 0) ? "SUCCESS" : "FAILED"));
3979 * _base_handshake_req_reply_wait - send request thru doorbell interface
3980 * @ioc: per adapter object
3981 * @request_bytes: request length
3982 * @request: pointer having request payload
3983 * @reply_bytes: reply length
3984 * @reply: pointer to reply payload
3985 * @timeout: timeout in second
3987 * Returns 0 for success, non-zero for failure.
3990 _base_handshake_req_reply_wait(struct MPT3SAS_ADAPTER
*ioc
, int request_bytes
,
3991 u32
*request
, int reply_bytes
, u16
*reply
, int timeout
)
3993 MPI2DefaultReply_t
*default_reply
= (MPI2DefaultReply_t
*)reply
;
3998 /* make sure doorbell is not in use */
3999 if ((readl(&ioc
->chip
->Doorbell
) & MPI2_DOORBELL_USED
)) {
4001 "doorbell is in use (line=%d)\n",
4002 ioc
->name
, __LINE__
);
4006 /* clear pending doorbell interrupts from previous state changes */
4007 if (readl(&ioc
->chip
->HostInterruptStatus
) &
4008 MPI2_HIS_IOC2SYS_DB_STATUS
)
4009 writel(0, &ioc
->chip
->HostInterruptStatus
);
4011 /* send message to ioc */
4012 writel(((MPI2_FUNCTION_HANDSHAKE
<<MPI2_DOORBELL_FUNCTION_SHIFT
) |
4013 ((request_bytes
/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT
)),
4014 &ioc
->chip
->Doorbell
);
4016 if ((_base_spin_on_doorbell_int(ioc
, 5))) {
4018 "doorbell handshake int failed (line=%d)\n",
4019 ioc
->name
, __LINE__
);
4022 writel(0, &ioc
->chip
->HostInterruptStatus
);
4024 if ((_base_wait_for_doorbell_ack(ioc
, 5))) {
4026 "doorbell handshake ack failed (line=%d)\n",
4027 ioc
->name
, __LINE__
);
4031 /* send message 32-bits at a time */
4032 for (i
= 0, failed
= 0; i
< request_bytes
/4 && !failed
; i
++) {
4033 writel(cpu_to_le32(request
[i
]), &ioc
->chip
->Doorbell
);
4034 if ((_base_wait_for_doorbell_ack(ioc
, 5)))
4040 "doorbell handshake sending request failed (line=%d)\n",
4041 ioc
->name
, __LINE__
);
4045 /* now wait for the reply */
4046 if ((_base_wait_for_doorbell_int(ioc
, timeout
))) {
4048 "doorbell handshake int failed (line=%d)\n",
4049 ioc
->name
, __LINE__
);
4053 /* read the first two 16-bits, it gives the total length of the reply */
4054 reply
[0] = le16_to_cpu(readl(&ioc
->chip
->Doorbell
)
4055 & MPI2_DOORBELL_DATA_MASK
);
4056 writel(0, &ioc
->chip
->HostInterruptStatus
);
4057 if ((_base_wait_for_doorbell_int(ioc
, 5))) {
4059 "doorbell handshake int failed (line=%d)\n",
4060 ioc
->name
, __LINE__
);
4063 reply
[1] = le16_to_cpu(readl(&ioc
->chip
->Doorbell
)
4064 & MPI2_DOORBELL_DATA_MASK
);
4065 writel(0, &ioc
->chip
->HostInterruptStatus
);
4067 for (i
= 2; i
< default_reply
->MsgLength
* 2; i
++) {
4068 if ((_base_wait_for_doorbell_int(ioc
, 5))) {
4070 "doorbell handshake int failed (line=%d)\n",
4071 ioc
->name
, __LINE__
);
4074 if (i
>= reply_bytes
/2) /* overflow case */
4075 readl(&ioc
->chip
->Doorbell
);
4077 reply
[i
] = le16_to_cpu(readl(&ioc
->chip
->Doorbell
)
4078 & MPI2_DOORBELL_DATA_MASK
);
4079 writel(0, &ioc
->chip
->HostInterruptStatus
);
4082 _base_wait_for_doorbell_int(ioc
, 5);
4083 if (_base_wait_for_doorbell_not_used(ioc
, 5) != 0) {
4084 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
4085 "doorbell is in use (line=%d)\n", ioc
->name
, __LINE__
));
4087 writel(0, &ioc
->chip
->HostInterruptStatus
);
4089 if (ioc
->logging_level
& MPT_DEBUG_INIT
) {
4090 mfp
= (__le32
*)reply
;
4091 pr_info("\toffset:data\n");
4092 for (i
= 0; i
< reply_bytes
/4; i
++)
4093 pr_info("\t[0x%02x]:%08x\n", i
*4,
4094 le32_to_cpu(mfp
[i
]));
4100 * mpt3sas_base_sas_iounit_control - send sas iounit control to FW
4101 * @ioc: per adapter object
4102 * @mpi_reply: the reply payload from FW
4103 * @mpi_request: the request payload sent to FW
4105 * The SAS IO Unit Control Request message allows the host to perform low-level
4106 * operations, such as resets on the PHYs of the IO Unit, also allows the host
4107 * to obtain the IOC assigned device handles for a device if it has other
4108 * identifying information about the device, in addition allows the host to
4109 * remove IOC resources associated with the device.
4111 * Returns 0 for success, non-zero for failure.
4114 mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER
*ioc
,
4115 Mpi2SasIoUnitControlReply_t
*mpi_reply
,
4116 Mpi2SasIoUnitControlRequest_t
*mpi_request
)
4120 bool issue_reset
= false;
4123 u16 wait_state_count
;
4125 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4128 mutex_lock(&ioc
->base_cmds
.mutex
);
4130 if (ioc
->base_cmds
.status
!= MPT3_CMD_NOT_USED
) {
4131 pr_err(MPT3SAS_FMT
"%s: base_cmd in use\n",
4132 ioc
->name
, __func__
);
4137 wait_state_count
= 0;
4138 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 1);
4139 while (ioc_state
!= MPI2_IOC_STATE_OPERATIONAL
) {
4140 if (wait_state_count
++ == 10) {
4142 "%s: failed due to ioc not operational\n",
4143 ioc
->name
, __func__
);
4148 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 1);
4150 "%s: waiting for operational state(count=%d)\n",
4151 ioc
->name
, __func__
, wait_state_count
);
4154 smid
= mpt3sas_base_get_smid(ioc
, ioc
->base_cb_idx
);
4156 pr_err(MPT3SAS_FMT
"%s: failed obtaining a smid\n",
4157 ioc
->name
, __func__
);
4163 ioc
->base_cmds
.status
= MPT3_CMD_PENDING
;
4164 request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
4165 ioc
->base_cmds
.smid
= smid
;
4166 memcpy(request
, mpi_request
, sizeof(Mpi2SasIoUnitControlRequest_t
));
4167 if (mpi_request
->Operation
== MPI2_SAS_OP_PHY_HARD_RESET
||
4168 mpi_request
->Operation
== MPI2_SAS_OP_PHY_LINK_RESET
)
4169 ioc
->ioc_link_reset_in_progress
= 1;
4170 init_completion(&ioc
->base_cmds
.done
);
4171 ioc
->put_smid_default(ioc
, smid
);
4172 wait_for_completion_timeout(&ioc
->base_cmds
.done
,
4173 msecs_to_jiffies(10000));
4174 if ((mpi_request
->Operation
== MPI2_SAS_OP_PHY_HARD_RESET
||
4175 mpi_request
->Operation
== MPI2_SAS_OP_PHY_LINK_RESET
) &&
4176 ioc
->ioc_link_reset_in_progress
)
4177 ioc
->ioc_link_reset_in_progress
= 0;
4178 if (!(ioc
->base_cmds
.status
& MPT3_CMD_COMPLETE
)) {
4179 pr_err(MPT3SAS_FMT
"%s: timeout\n",
4180 ioc
->name
, __func__
);
4181 _debug_dump_mf(mpi_request
,
4182 sizeof(Mpi2SasIoUnitControlRequest_t
)/4);
4183 if (!(ioc
->base_cmds
.status
& MPT3_CMD_RESET
))
4185 goto issue_host_reset
;
4187 if (ioc
->base_cmds
.status
& MPT3_CMD_REPLY_VALID
)
4188 memcpy(mpi_reply
, ioc
->base_cmds
.reply
,
4189 sizeof(Mpi2SasIoUnitControlReply_t
));
4191 memset(mpi_reply
, 0, sizeof(Mpi2SasIoUnitControlReply_t
));
4192 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
4197 mpt3sas_base_hard_reset_handler(ioc
, FORCE_BIG_HAMMER
);
4198 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
4201 mutex_unlock(&ioc
->base_cmds
.mutex
);
4206 * mpt3sas_base_scsi_enclosure_processor - sending request to sep device
4207 * @ioc: per adapter object
4208 * @mpi_reply: the reply payload from FW
4209 * @mpi_request: the request payload sent to FW
4211 * The SCSI Enclosure Processor request message causes the IOC to
4212 * communicate with SES devices to control LED status signals.
4214 * Returns 0 for success, non-zero for failure.
4217 mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER
*ioc
,
4218 Mpi2SepReply_t
*mpi_reply
, Mpi2SepRequest_t
*mpi_request
)
4222 bool issue_reset
= false;
4225 u16 wait_state_count
;
4227 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4230 mutex_lock(&ioc
->base_cmds
.mutex
);
4232 if (ioc
->base_cmds
.status
!= MPT3_CMD_NOT_USED
) {
4233 pr_err(MPT3SAS_FMT
"%s: base_cmd in use\n",
4234 ioc
->name
, __func__
);
4239 wait_state_count
= 0;
4240 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 1);
4241 while (ioc_state
!= MPI2_IOC_STATE_OPERATIONAL
) {
4242 if (wait_state_count
++ == 10) {
4244 "%s: failed due to ioc not operational\n",
4245 ioc
->name
, __func__
);
4250 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 1);
4252 "%s: waiting for operational state(count=%d)\n",
4254 __func__
, wait_state_count
);
4257 smid
= mpt3sas_base_get_smid(ioc
, ioc
->base_cb_idx
);
4259 pr_err(MPT3SAS_FMT
"%s: failed obtaining a smid\n",
4260 ioc
->name
, __func__
);
4266 ioc
->base_cmds
.status
= MPT3_CMD_PENDING
;
4267 request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
4268 ioc
->base_cmds
.smid
= smid
;
4269 memcpy(request
, mpi_request
, sizeof(Mpi2SepReply_t
));
4270 init_completion(&ioc
->base_cmds
.done
);
4271 ioc
->put_smid_default(ioc
, smid
);
4272 wait_for_completion_timeout(&ioc
->base_cmds
.done
,
4273 msecs_to_jiffies(10000));
4274 if (!(ioc
->base_cmds
.status
& MPT3_CMD_COMPLETE
)) {
4275 pr_err(MPT3SAS_FMT
"%s: timeout\n",
4276 ioc
->name
, __func__
);
4277 _debug_dump_mf(mpi_request
,
4278 sizeof(Mpi2SepRequest_t
)/4);
4279 if (!(ioc
->base_cmds
.status
& MPT3_CMD_RESET
))
4280 issue_reset
= false;
4281 goto issue_host_reset
;
4283 if (ioc
->base_cmds
.status
& MPT3_CMD_REPLY_VALID
)
4284 memcpy(mpi_reply
, ioc
->base_cmds
.reply
,
4285 sizeof(Mpi2SepReply_t
));
4287 memset(mpi_reply
, 0, sizeof(Mpi2SepReply_t
));
4288 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
4293 mpt3sas_base_hard_reset_handler(ioc
, FORCE_BIG_HAMMER
);
4294 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
4297 mutex_unlock(&ioc
->base_cmds
.mutex
);
4302 * _base_get_port_facts - obtain port facts reply and save in ioc
4303 * @ioc: per adapter object
4305 * Returns 0 for success, non-zero for failure.
4308 _base_get_port_facts(struct MPT3SAS_ADAPTER
*ioc
, int port
)
4310 Mpi2PortFactsRequest_t mpi_request
;
4311 Mpi2PortFactsReply_t mpi_reply
;
4312 struct mpt3sas_port_facts
*pfacts
;
4313 int mpi_reply_sz
, mpi_request_sz
, r
;
4315 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4318 mpi_reply_sz
= sizeof(Mpi2PortFactsReply_t
);
4319 mpi_request_sz
= sizeof(Mpi2PortFactsRequest_t
);
4320 memset(&mpi_request
, 0, mpi_request_sz
);
4321 mpi_request
.Function
= MPI2_FUNCTION_PORT_FACTS
;
4322 mpi_request
.PortNumber
= port
;
4323 r
= _base_handshake_req_reply_wait(ioc
, mpi_request_sz
,
4324 (u32
*)&mpi_request
, mpi_reply_sz
, (u16
*)&mpi_reply
, 5);
4327 pr_err(MPT3SAS_FMT
"%s: handshake failed (r=%d)\n",
4328 ioc
->name
, __func__
, r
);
4332 pfacts
= &ioc
->pfacts
[port
];
4333 memset(pfacts
, 0, sizeof(struct mpt3sas_port_facts
));
4334 pfacts
->PortNumber
= mpi_reply
.PortNumber
;
4335 pfacts
->VP_ID
= mpi_reply
.VP_ID
;
4336 pfacts
->VF_ID
= mpi_reply
.VF_ID
;
4337 pfacts
->MaxPostedCmdBuffers
=
4338 le16_to_cpu(mpi_reply
.MaxPostedCmdBuffers
);
4344 * _base_wait_for_iocstate - Wait until the card is in READY or OPERATIONAL
4345 * @ioc: per adapter object
4348 * Returns 0 for success, non-zero for failure.
4351 _base_wait_for_iocstate(struct MPT3SAS_ADAPTER
*ioc
, int timeout
)
4356 dinitprintk(ioc
, printk(MPT3SAS_FMT
"%s\n", ioc
->name
,
4359 if (ioc
->pci_error_recovery
) {
4360 dfailprintk(ioc
, printk(MPT3SAS_FMT
4361 "%s: host in pci error recovery\n", ioc
->name
, __func__
));
4365 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 0);
4366 dhsprintk(ioc
, printk(MPT3SAS_FMT
"%s: ioc_state(0x%08x)\n",
4367 ioc
->name
, __func__
, ioc_state
));
4369 if (((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_READY
) ||
4370 (ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_OPERATIONAL
)
4373 if (ioc_state
& MPI2_DOORBELL_USED
) {
4374 dhsprintk(ioc
, printk(MPT3SAS_FMT
4375 "unexpected doorbell active!\n", ioc
->name
));
4376 goto issue_diag_reset
;
4379 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_FAULT
) {
4380 mpt3sas_base_fault_info(ioc
, ioc_state
&
4381 MPI2_DOORBELL_DATA_MASK
);
4382 goto issue_diag_reset
;
4385 ioc_state
= _base_wait_on_iocstate(ioc
, MPI2_IOC_STATE_READY
, timeout
);
4387 dfailprintk(ioc
, printk(MPT3SAS_FMT
4388 "%s: failed going to ready state (ioc_state=0x%x)\n",
4389 ioc
->name
, __func__
, ioc_state
));
4394 rc
= _base_diag_reset(ioc
);
4399 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
4400 * @ioc: per adapter object
4402 * Returns 0 for success, non-zero for failure.
4405 _base_get_ioc_facts(struct MPT3SAS_ADAPTER
*ioc
)
4407 Mpi2IOCFactsRequest_t mpi_request
;
4408 Mpi2IOCFactsReply_t mpi_reply
;
4409 struct mpt3sas_facts
*facts
;
4410 int mpi_reply_sz
, mpi_request_sz
, r
;
4412 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4415 r
= _base_wait_for_iocstate(ioc
, 10);
4417 dfailprintk(ioc
, printk(MPT3SAS_FMT
4418 "%s: failed getting to correct state\n",
4419 ioc
->name
, __func__
));
4422 mpi_reply_sz
= sizeof(Mpi2IOCFactsReply_t
);
4423 mpi_request_sz
= sizeof(Mpi2IOCFactsRequest_t
);
4424 memset(&mpi_request
, 0, mpi_request_sz
);
4425 mpi_request
.Function
= MPI2_FUNCTION_IOC_FACTS
;
4426 r
= _base_handshake_req_reply_wait(ioc
, mpi_request_sz
,
4427 (u32
*)&mpi_request
, mpi_reply_sz
, (u16
*)&mpi_reply
, 5);
4430 pr_err(MPT3SAS_FMT
"%s: handshake failed (r=%d)\n",
4431 ioc
->name
, __func__
, r
);
4435 facts
= &ioc
->facts
;
4436 memset(facts
, 0, sizeof(struct mpt3sas_facts
));
4437 facts
->MsgVersion
= le16_to_cpu(mpi_reply
.MsgVersion
);
4438 facts
->HeaderVersion
= le16_to_cpu(mpi_reply
.HeaderVersion
);
4439 facts
->VP_ID
= mpi_reply
.VP_ID
;
4440 facts
->VF_ID
= mpi_reply
.VF_ID
;
4441 facts
->IOCExceptions
= le16_to_cpu(mpi_reply
.IOCExceptions
);
4442 facts
->MaxChainDepth
= mpi_reply
.MaxChainDepth
;
4443 facts
->WhoInit
= mpi_reply
.WhoInit
;
4444 facts
->NumberOfPorts
= mpi_reply
.NumberOfPorts
;
4445 facts
->MaxMSIxVectors
= mpi_reply
.MaxMSIxVectors
;
4446 facts
->RequestCredit
= le16_to_cpu(mpi_reply
.RequestCredit
);
4447 facts
->MaxReplyDescriptorPostQueueDepth
=
4448 le16_to_cpu(mpi_reply
.MaxReplyDescriptorPostQueueDepth
);
4449 facts
->ProductID
= le16_to_cpu(mpi_reply
.ProductID
);
4450 facts
->IOCCapabilities
= le32_to_cpu(mpi_reply
.IOCCapabilities
);
4451 if ((facts
->IOCCapabilities
& MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID
))
4452 ioc
->ir_firmware
= 1;
4453 if ((facts
->IOCCapabilities
&
4454 MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE
))
4455 ioc
->rdpq_array_capable
= 1;
4456 if (facts
->IOCCapabilities
& MPI26_IOCFACTS_CAPABILITY_ATOMIC_REQ
)
4457 ioc
->atomic_desc_capable
= 1;
4458 facts
->FWVersion
.Word
= le32_to_cpu(mpi_reply
.FWVersion
.Word
);
4459 facts
->IOCRequestFrameSize
=
4460 le16_to_cpu(mpi_reply
.IOCRequestFrameSize
);
4461 if (ioc
->hba_mpi_version_belonged
!= MPI2_VERSION
) {
4462 facts
->IOCMaxChainSegmentSize
=
4463 le16_to_cpu(mpi_reply
.IOCMaxChainSegmentSize
);
4465 facts
->MaxInitiators
= le16_to_cpu(mpi_reply
.MaxInitiators
);
4466 facts
->MaxTargets
= le16_to_cpu(mpi_reply
.MaxTargets
);
4467 ioc
->shost
->max_id
= -1;
4468 facts
->MaxSasExpanders
= le16_to_cpu(mpi_reply
.MaxSasExpanders
);
4469 facts
->MaxEnclosures
= le16_to_cpu(mpi_reply
.MaxEnclosures
);
4470 facts
->ProtocolFlags
= le16_to_cpu(mpi_reply
.ProtocolFlags
);
4471 facts
->HighPriorityCredit
=
4472 le16_to_cpu(mpi_reply
.HighPriorityCredit
);
4473 facts
->ReplyFrameSize
= mpi_reply
.ReplyFrameSize
;
4474 facts
->MaxDevHandle
= le16_to_cpu(mpi_reply
.MaxDevHandle
);
4476 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
4477 "hba queue depth(%d), max chains per io(%d)\n",
4478 ioc
->name
, facts
->RequestCredit
,
4479 facts
->MaxChainDepth
));
4480 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
4481 "request frame size(%d), reply frame size(%d)\n", ioc
->name
,
4482 facts
->IOCRequestFrameSize
* 4, facts
->ReplyFrameSize
* 4));
4487 * _base_send_ioc_init - send ioc_init to firmware
4488 * @ioc: per adapter object
4490 * Returns 0 for success, non-zero for failure.
4493 _base_send_ioc_init(struct MPT3SAS_ADAPTER
*ioc
)
4495 Mpi2IOCInitRequest_t mpi_request
;
4496 Mpi2IOCInitReply_t mpi_reply
;
4498 ktime_t current_time
;
4500 u32 reply_post_free_array_sz
= 0;
4501 Mpi2IOCInitRDPQArrayEntry
*reply_post_free_array
= NULL
;
4502 dma_addr_t reply_post_free_array_dma
;
4504 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4507 memset(&mpi_request
, 0, sizeof(Mpi2IOCInitRequest_t
));
4508 mpi_request
.Function
= MPI2_FUNCTION_IOC_INIT
;
4509 mpi_request
.WhoInit
= MPI2_WHOINIT_HOST_DRIVER
;
4510 mpi_request
.VF_ID
= 0; /* TODO */
4511 mpi_request
.VP_ID
= 0;
4512 mpi_request
.MsgVersion
= cpu_to_le16(ioc
->hba_mpi_version_belonged
);
4513 mpi_request
.HeaderVersion
= cpu_to_le16(MPI2_HEADER_VERSION
);
4515 if (_base_is_controller_msix_enabled(ioc
))
4516 mpi_request
.HostMSIxVectors
= ioc
->reply_queue_count
;
4517 mpi_request
.SystemRequestFrameSize
= cpu_to_le16(ioc
->request_sz
/4);
4518 mpi_request
.ReplyDescriptorPostQueueDepth
=
4519 cpu_to_le16(ioc
->reply_post_queue_depth
);
4520 mpi_request
.ReplyFreeQueueDepth
=
4521 cpu_to_le16(ioc
->reply_free_queue_depth
);
4523 mpi_request
.SenseBufferAddressHigh
=
4524 cpu_to_le32((u64
)ioc
->sense_dma
>> 32);
4525 mpi_request
.SystemReplyAddressHigh
=
4526 cpu_to_le32((u64
)ioc
->reply_dma
>> 32);
4527 mpi_request
.SystemRequestFrameBaseAddress
=
4528 cpu_to_le64((u64
)ioc
->request_dma
);
4529 mpi_request
.ReplyFreeQueueAddress
=
4530 cpu_to_le64((u64
)ioc
->reply_free_dma
);
4532 if (ioc
->rdpq_array_enable
) {
4533 reply_post_free_array_sz
= ioc
->reply_queue_count
*
4534 sizeof(Mpi2IOCInitRDPQArrayEntry
);
4535 reply_post_free_array
= pci_alloc_consistent(ioc
->pdev
,
4536 reply_post_free_array_sz
, &reply_post_free_array_dma
);
4537 if (!reply_post_free_array
) {
4539 "reply_post_free_array: pci_alloc_consistent failed\n",
4544 memset(reply_post_free_array
, 0, reply_post_free_array_sz
);
4545 for (i
= 0; i
< ioc
->reply_queue_count
; i
++)
4546 reply_post_free_array
[i
].RDPQBaseAddress
=
4548 (u64
)ioc
->reply_post
[i
].reply_post_free_dma
);
4549 mpi_request
.MsgFlags
= MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE
;
4550 mpi_request
.ReplyDescriptorPostQueueAddress
=
4551 cpu_to_le64((u64
)reply_post_free_array_dma
);
4553 mpi_request
.ReplyDescriptorPostQueueAddress
=
4554 cpu_to_le64((u64
)ioc
->reply_post
[0].reply_post_free_dma
);
4557 /* This time stamp specifies number of milliseconds
4558 * since epoch ~ midnight January 1, 1970.
4560 current_time
= ktime_get_real();
4561 mpi_request
.TimeStamp
= cpu_to_le64(ktime_to_ms(current_time
));
4563 if (ioc
->logging_level
& MPT_DEBUG_INIT
) {
4567 mfp
= (__le32
*)&mpi_request
;
4568 pr_info("\toffset:data\n");
4569 for (i
= 0; i
< sizeof(Mpi2IOCInitRequest_t
)/4; i
++)
4570 pr_info("\t[0x%02x]:%08x\n", i
*4,
4571 le32_to_cpu(mfp
[i
]));
4574 r
= _base_handshake_req_reply_wait(ioc
,
4575 sizeof(Mpi2IOCInitRequest_t
), (u32
*)&mpi_request
,
4576 sizeof(Mpi2IOCInitReply_t
), (u16
*)&mpi_reply
, 10);
4579 pr_err(MPT3SAS_FMT
"%s: handshake failed (r=%d)\n",
4580 ioc
->name
, __func__
, r
);
4584 ioc_status
= le16_to_cpu(mpi_reply
.IOCStatus
) & MPI2_IOCSTATUS_MASK
;
4585 if (ioc_status
!= MPI2_IOCSTATUS_SUCCESS
||
4586 mpi_reply
.IOCLogInfo
) {
4587 pr_err(MPT3SAS_FMT
"%s: failed\n", ioc
->name
, __func__
);
4592 if (reply_post_free_array
)
4593 pci_free_consistent(ioc
->pdev
, reply_post_free_array_sz
,
4594 reply_post_free_array
,
4595 reply_post_free_array_dma
);
4600 * mpt3sas_port_enable_done - command completion routine for port enable
4601 * @ioc: per adapter object
4602 * @smid: system request message index
4603 * @msix_index: MSIX table index supplied by the OS
4604 * @reply: reply message frame(lower 32bit addr)
4606 * Return 1 meaning mf should be freed from _base_interrupt
4607 * 0 means the mf is freed from this function.
4610 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER
*ioc
, u16 smid
, u8 msix_index
,
4613 MPI2DefaultReply_t
*mpi_reply
;
4616 if (ioc
->port_enable_cmds
.status
== MPT3_CMD_NOT_USED
)
4619 mpi_reply
= mpt3sas_base_get_reply_virt_addr(ioc
, reply
);
4623 if (mpi_reply
->Function
!= MPI2_FUNCTION_PORT_ENABLE
)
4626 ioc
->port_enable_cmds
.status
&= ~MPT3_CMD_PENDING
;
4627 ioc
->port_enable_cmds
.status
|= MPT3_CMD_COMPLETE
;
4628 ioc
->port_enable_cmds
.status
|= MPT3_CMD_REPLY_VALID
;
4629 memcpy(ioc
->port_enable_cmds
.reply
, mpi_reply
, mpi_reply
->MsgLength
*4);
4630 ioc_status
= le16_to_cpu(mpi_reply
->IOCStatus
) & MPI2_IOCSTATUS_MASK
;
4631 if (ioc_status
!= MPI2_IOCSTATUS_SUCCESS
)
4632 ioc
->port_enable_failed
= 1;
4634 if (ioc
->is_driver_loading
) {
4635 if (ioc_status
== MPI2_IOCSTATUS_SUCCESS
) {
4636 mpt3sas_port_enable_complete(ioc
);
4639 ioc
->start_scan_failed
= ioc_status
;
4640 ioc
->start_scan
= 0;
4644 complete(&ioc
->port_enable_cmds
.done
);
4649 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
4650 * @ioc: per adapter object
4652 * Returns 0 for success, non-zero for failure.
4655 _base_send_port_enable(struct MPT3SAS_ADAPTER
*ioc
)
4657 Mpi2PortEnableRequest_t
*mpi_request
;
4658 Mpi2PortEnableReply_t
*mpi_reply
;
4663 pr_info(MPT3SAS_FMT
"sending port enable !!\n", ioc
->name
);
4665 if (ioc
->port_enable_cmds
.status
& MPT3_CMD_PENDING
) {
4666 pr_err(MPT3SAS_FMT
"%s: internal command already in use\n",
4667 ioc
->name
, __func__
);
4671 smid
= mpt3sas_base_get_smid(ioc
, ioc
->port_enable_cb_idx
);
4673 pr_err(MPT3SAS_FMT
"%s: failed obtaining a smid\n",
4674 ioc
->name
, __func__
);
4678 ioc
->port_enable_cmds
.status
= MPT3_CMD_PENDING
;
4679 mpi_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
4680 ioc
->port_enable_cmds
.smid
= smid
;
4681 memset(mpi_request
, 0, sizeof(Mpi2PortEnableRequest_t
));
4682 mpi_request
->Function
= MPI2_FUNCTION_PORT_ENABLE
;
4684 init_completion(&ioc
->port_enable_cmds
.done
);
4685 ioc
->put_smid_default(ioc
, smid
);
4686 wait_for_completion_timeout(&ioc
->port_enable_cmds
.done
, 300*HZ
);
4687 if (!(ioc
->port_enable_cmds
.status
& MPT3_CMD_COMPLETE
)) {
4688 pr_err(MPT3SAS_FMT
"%s: timeout\n",
4689 ioc
->name
, __func__
);
4690 _debug_dump_mf(mpi_request
,
4691 sizeof(Mpi2PortEnableRequest_t
)/4);
4692 if (ioc
->port_enable_cmds
.status
& MPT3_CMD_RESET
)
4699 mpi_reply
= ioc
->port_enable_cmds
.reply
;
4700 ioc_status
= le16_to_cpu(mpi_reply
->IOCStatus
) & MPI2_IOCSTATUS_MASK
;
4701 if (ioc_status
!= MPI2_IOCSTATUS_SUCCESS
) {
4702 pr_err(MPT3SAS_FMT
"%s: failed with (ioc_status=0x%08x)\n",
4703 ioc
->name
, __func__
, ioc_status
);
4709 ioc
->port_enable_cmds
.status
= MPT3_CMD_NOT_USED
;
4710 pr_info(MPT3SAS_FMT
"port enable: %s\n", ioc
->name
, ((r
== 0) ?
4711 "SUCCESS" : "FAILED"));
4716 * mpt3sas_port_enable - initiate firmware discovery (don't wait for reply)
4717 * @ioc: per adapter object
4719 * Returns 0 for success, non-zero for failure.
4722 mpt3sas_port_enable(struct MPT3SAS_ADAPTER
*ioc
)
4724 Mpi2PortEnableRequest_t
*mpi_request
;
4727 pr_info(MPT3SAS_FMT
"sending port enable !!\n", ioc
->name
);
4729 if (ioc
->port_enable_cmds
.status
& MPT3_CMD_PENDING
) {
4730 pr_err(MPT3SAS_FMT
"%s: internal command already in use\n",
4731 ioc
->name
, __func__
);
4735 smid
= mpt3sas_base_get_smid(ioc
, ioc
->port_enable_cb_idx
);
4737 pr_err(MPT3SAS_FMT
"%s: failed obtaining a smid\n",
4738 ioc
->name
, __func__
);
4742 ioc
->port_enable_cmds
.status
= MPT3_CMD_PENDING
;
4743 mpi_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
4744 ioc
->port_enable_cmds
.smid
= smid
;
4745 memset(mpi_request
, 0, sizeof(Mpi2PortEnableRequest_t
));
4746 mpi_request
->Function
= MPI2_FUNCTION_PORT_ENABLE
;
4748 ioc
->put_smid_default(ioc
, smid
);
4753 * _base_determine_wait_on_discovery - desposition
4754 * @ioc: per adapter object
4756 * Decide whether to wait on discovery to complete. Used to either
4757 * locate boot device, or report volumes ahead of physical devices.
4759 * Returns 1 for wait, 0 for don't wait
4762 _base_determine_wait_on_discovery(struct MPT3SAS_ADAPTER
*ioc
)
4764 /* We wait for discovery to complete if IR firmware is loaded.
4765 * The sas topology events arrive before PD events, so we need time to
4766 * turn on the bit in ioc->pd_handles to indicate PD
4767 * Also, it maybe required to report Volumes ahead of physical
4768 * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
4770 if (ioc
->ir_firmware
)
4773 /* if no Bios, then we don't need to wait */
4774 if (!ioc
->bios_pg3
.BiosVersion
)
4777 /* Bios is present, then we drop down here.
4779 * If there any entries in the Bios Page 2, then we wait
4780 * for discovery to complete.
4783 /* Current Boot Device */
4784 if ((ioc
->bios_pg2
.CurrentBootDeviceForm
&
4785 MPI2_BIOSPAGE2_FORM_MASK
) ==
4786 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED
&&
4787 /* Request Boot Device */
4788 (ioc
->bios_pg2
.ReqBootDeviceForm
&
4789 MPI2_BIOSPAGE2_FORM_MASK
) ==
4790 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED
&&
4791 /* Alternate Request Boot Device */
4792 (ioc
->bios_pg2
.ReqAltBootDeviceForm
&
4793 MPI2_BIOSPAGE2_FORM_MASK
) ==
4794 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED
)
4801 * _base_unmask_events - turn on notification for this event
4802 * @ioc: per adapter object
4803 * @event: firmware event
4805 * The mask is stored in ioc->event_masks.
4808 _base_unmask_events(struct MPT3SAS_ADAPTER
*ioc
, u16 event
)
4815 desired_event
= (1 << (event
% 32));
4818 ioc
->event_masks
[0] &= ~desired_event
;
4819 else if (event
< 64)
4820 ioc
->event_masks
[1] &= ~desired_event
;
4821 else if (event
< 96)
4822 ioc
->event_masks
[2] &= ~desired_event
;
4823 else if (event
< 128)
4824 ioc
->event_masks
[3] &= ~desired_event
;
4828 * _base_event_notification - send event notification
4829 * @ioc: per adapter object
4831 * Returns 0 for success, non-zero for failure.
4834 _base_event_notification(struct MPT3SAS_ADAPTER
*ioc
)
4836 Mpi2EventNotificationRequest_t
*mpi_request
;
4841 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
4844 if (ioc
->base_cmds
.status
& MPT3_CMD_PENDING
) {
4845 pr_err(MPT3SAS_FMT
"%s: internal command already in use\n",
4846 ioc
->name
, __func__
);
4850 smid
= mpt3sas_base_get_smid(ioc
, ioc
->base_cb_idx
);
4852 pr_err(MPT3SAS_FMT
"%s: failed obtaining a smid\n",
4853 ioc
->name
, __func__
);
4856 ioc
->base_cmds
.status
= MPT3_CMD_PENDING
;
4857 mpi_request
= mpt3sas_base_get_msg_frame(ioc
, smid
);
4858 ioc
->base_cmds
.smid
= smid
;
4859 memset(mpi_request
, 0, sizeof(Mpi2EventNotificationRequest_t
));
4860 mpi_request
->Function
= MPI2_FUNCTION_EVENT_NOTIFICATION
;
4861 mpi_request
->VF_ID
= 0; /* TODO */
4862 mpi_request
->VP_ID
= 0;
4863 for (i
= 0; i
< MPI2_EVENT_NOTIFY_EVENTMASK_WORDS
; i
++)
4864 mpi_request
->EventMasks
[i
] =
4865 cpu_to_le32(ioc
->event_masks
[i
]);
4866 init_completion(&ioc
->base_cmds
.done
);
4867 ioc
->put_smid_default(ioc
, smid
);
4868 wait_for_completion_timeout(&ioc
->base_cmds
.done
, 30*HZ
);
4869 if (!(ioc
->base_cmds
.status
& MPT3_CMD_COMPLETE
)) {
4870 pr_err(MPT3SAS_FMT
"%s: timeout\n",
4871 ioc
->name
, __func__
);
4872 _debug_dump_mf(mpi_request
,
4873 sizeof(Mpi2EventNotificationRequest_t
)/4);
4874 if (ioc
->base_cmds
.status
& MPT3_CMD_RESET
)
4879 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: complete\n",
4880 ioc
->name
, __func__
));
4881 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
4886 * mpt3sas_base_validate_event_type - validating event types
4887 * @ioc: per adapter object
4888 * @event: firmware event
4890 * This will turn on firmware event notification when application
4891 * ask for that event. We don't mask events that are already enabled.
4894 mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER
*ioc
, u32
*event_type
)
4897 u32 event_mask
, desired_event
;
4898 u8 send_update_to_fw
;
4900 for (i
= 0, send_update_to_fw
= 0; i
<
4901 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS
; i
++) {
4902 event_mask
= ~event_type
[i
];
4904 for (j
= 0; j
< 32; j
++) {
4905 if (!(event_mask
& desired_event
) &&
4906 (ioc
->event_masks
[i
] & desired_event
)) {
4907 ioc
->event_masks
[i
] &= ~desired_event
;
4908 send_update_to_fw
= 1;
4910 desired_event
= (desired_event
<< 1);
4914 if (!send_update_to_fw
)
4917 mutex_lock(&ioc
->base_cmds
.mutex
);
4918 _base_event_notification(ioc
);
4919 mutex_unlock(&ioc
->base_cmds
.mutex
);
4923 * _base_diag_reset - the "big hammer" start of day reset
4924 * @ioc: per adapter object
4926 * Returns 0 for success, non-zero for failure.
4929 _base_diag_reset(struct MPT3SAS_ADAPTER
*ioc
)
4931 u32 host_diagnostic
;
4936 pr_info(MPT3SAS_FMT
"sending diag reset !!\n", ioc
->name
);
4938 drsprintk(ioc
, pr_info(MPT3SAS_FMT
"clear interrupts\n",
4943 /* Write magic sequence to WriteSequence register
4944 * Loop until in diagnostic mode
4946 drsprintk(ioc
, pr_info(MPT3SAS_FMT
4947 "write magic sequence\n", ioc
->name
));
4948 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4949 writel(MPI2_WRSEQ_1ST_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4950 writel(MPI2_WRSEQ_2ND_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4951 writel(MPI2_WRSEQ_3RD_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4952 writel(MPI2_WRSEQ_4TH_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4953 writel(MPI2_WRSEQ_5TH_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4954 writel(MPI2_WRSEQ_6TH_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
4962 host_diagnostic
= readl(&ioc
->chip
->HostDiagnostic
);
4963 drsprintk(ioc
, pr_info(MPT3SAS_FMT
4964 "wrote magic sequence: count(%d), host_diagnostic(0x%08x)\n",
4965 ioc
->name
, count
, host_diagnostic
));
4967 } while ((host_diagnostic
& MPI2_DIAG_DIAG_WRITE_ENABLE
) == 0);
4969 hcb_size
= readl(&ioc
->chip
->HCBSize
);
4971 drsprintk(ioc
, pr_info(MPT3SAS_FMT
"diag reset: issued\n",
4973 writel(host_diagnostic
| MPI2_DIAG_RESET_ADAPTER
,
4974 &ioc
->chip
->HostDiagnostic
);
4976 /*This delay allows the chip PCIe hardware time to finish reset tasks*/
4977 msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC
/1000);
4979 /* Approximately 300 second max wait */
4980 for (count
= 0; count
< (300000000 /
4981 MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
); count
++) {
4983 host_diagnostic
= readl(&ioc
->chip
->HostDiagnostic
);
4985 if (host_diagnostic
== 0xFFFFFFFF)
4987 if (!(host_diagnostic
& MPI2_DIAG_RESET_ADAPTER
))
4990 msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
/ 1000);
4993 if (host_diagnostic
& MPI2_DIAG_HCB_MODE
) {
4995 drsprintk(ioc
, pr_info(MPT3SAS_FMT
4996 "restart the adapter assuming the HCB Address points to good F/W\n",
4998 host_diagnostic
&= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK
;
4999 host_diagnostic
|= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW
;
5000 writel(host_diagnostic
, &ioc
->chip
->HostDiagnostic
);
5002 drsprintk(ioc
, pr_info(MPT3SAS_FMT
5003 "re-enable the HCDW\n", ioc
->name
));
5004 writel(hcb_size
| MPI2_HCB_SIZE_HCB_ENABLE
,
5005 &ioc
->chip
->HCBSize
);
5008 drsprintk(ioc
, pr_info(MPT3SAS_FMT
"restart the adapter\n",
5010 writel(host_diagnostic
& ~MPI2_DIAG_HOLD_IOC_RESET
,
5011 &ioc
->chip
->HostDiagnostic
);
5013 drsprintk(ioc
, pr_info(MPT3SAS_FMT
5014 "disable writes to the diagnostic register\n", ioc
->name
));
5015 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE
, &ioc
->chip
->WriteSequence
);
5017 drsprintk(ioc
, pr_info(MPT3SAS_FMT
5018 "Wait for FW to go to the READY state\n", ioc
->name
));
5019 ioc_state
= _base_wait_on_iocstate(ioc
, MPI2_IOC_STATE_READY
, 20);
5022 "%s: failed going to ready state (ioc_state=0x%x)\n",
5023 ioc
->name
, __func__
, ioc_state
);
5027 pr_info(MPT3SAS_FMT
"diag reset: SUCCESS\n", ioc
->name
);
5031 pr_err(MPT3SAS_FMT
"diag reset: FAILED\n", ioc
->name
);
5036 * _base_make_ioc_ready - put controller in READY state
5037 * @ioc: per adapter object
5038 * @type: FORCE_BIG_HAMMER or SOFT_RESET
5040 * Returns 0 for success, non-zero for failure.
5043 _base_make_ioc_ready(struct MPT3SAS_ADAPTER
*ioc
, enum reset_type type
)
5049 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
5052 if (ioc
->pci_error_recovery
)
5055 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 0);
5056 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: ioc_state(0x%08x)\n",
5057 ioc
->name
, __func__
, ioc_state
));
5059 /* if in RESET state, it should move to READY state shortly */
5061 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_RESET
) {
5062 while ((ioc_state
& MPI2_IOC_STATE_MASK
) !=
5063 MPI2_IOC_STATE_READY
) {
5064 if (count
++ == 10) {
5066 "%s: failed going to ready state (ioc_state=0x%x)\n",
5067 ioc
->name
, __func__
, ioc_state
);
5071 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 0);
5075 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_READY
)
5078 if (ioc_state
& MPI2_DOORBELL_USED
) {
5079 dhsprintk(ioc
, pr_info(MPT3SAS_FMT
5080 "unexpected doorbell active!\n",
5082 goto issue_diag_reset
;
5085 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_FAULT
) {
5086 mpt3sas_base_fault_info(ioc
, ioc_state
&
5087 MPI2_DOORBELL_DATA_MASK
);
5088 goto issue_diag_reset
;
5091 if (type
== FORCE_BIG_HAMMER
)
5092 goto issue_diag_reset
;
5094 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_OPERATIONAL
)
5095 if (!(_base_send_ioc_reset(ioc
,
5096 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
, 15))) {
5101 rc
= _base_diag_reset(ioc
);
5106 * _base_make_ioc_operational - put controller in OPERATIONAL state
5107 * @ioc: per adapter object
5109 * Returns 0 for success, non-zero for failure.
5112 _base_make_ioc_operational(struct MPT3SAS_ADAPTER
*ioc
)
5115 unsigned long flags
;
5118 struct _tr_list
*delayed_tr
, *delayed_tr_next
;
5119 struct _sc_list
*delayed_sc
, *delayed_sc_next
;
5120 struct _event_ack_list
*delayed_event_ack
, *delayed_event_ack_next
;
5122 struct adapter_reply_queue
*reply_q
;
5123 Mpi2ReplyDescriptorsUnion_t
*reply_post_free_contig
;
5125 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
5128 /* clean the delayed target reset list */
5129 list_for_each_entry_safe(delayed_tr
, delayed_tr_next
,
5130 &ioc
->delayed_tr_list
, list
) {
5131 list_del(&delayed_tr
->list
);
5136 list_for_each_entry_safe(delayed_tr
, delayed_tr_next
,
5137 &ioc
->delayed_tr_volume_list
, list
) {
5138 list_del(&delayed_tr
->list
);
5142 list_for_each_entry_safe(delayed_sc
, delayed_sc_next
,
5143 &ioc
->delayed_sc_list
, list
) {
5144 list_del(&delayed_sc
->list
);
5148 list_for_each_entry_safe(delayed_event_ack
, delayed_event_ack_next
,
5149 &ioc
->delayed_event_ack_list
, list
) {
5150 list_del(&delayed_event_ack
->list
);
5151 kfree(delayed_event_ack
);
5154 /* initialize the scsi lookup free list */
5155 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
5156 INIT_LIST_HEAD(&ioc
->free_list
);
5158 for (i
= 0; i
< ioc
->scsiio_depth
; i
++, smid
++) {
5159 INIT_LIST_HEAD(&ioc
->scsi_lookup
[i
].chain_list
);
5160 ioc
->scsi_lookup
[i
].cb_idx
= 0xFF;
5161 ioc
->scsi_lookup
[i
].smid
= smid
;
5162 ioc
->scsi_lookup
[i
].scmd
= NULL
;
5163 ioc
->scsi_lookup
[i
].direct_io
= 0;
5164 list_add_tail(&ioc
->scsi_lookup
[i
].tracker_list
,
5168 /* hi-priority queue */
5169 INIT_LIST_HEAD(&ioc
->hpr_free_list
);
5170 smid
= ioc
->hi_priority_smid
;
5171 for (i
= 0; i
< ioc
->hi_priority_depth
; i
++, smid
++) {
5172 ioc
->hpr_lookup
[i
].cb_idx
= 0xFF;
5173 ioc
->hpr_lookup
[i
].smid
= smid
;
5174 list_add_tail(&ioc
->hpr_lookup
[i
].tracker_list
,
5175 &ioc
->hpr_free_list
);
5178 /* internal queue */
5179 INIT_LIST_HEAD(&ioc
->internal_free_list
);
5180 smid
= ioc
->internal_smid
;
5181 for (i
= 0; i
< ioc
->internal_depth
; i
++, smid
++) {
5182 ioc
->internal_lookup
[i
].cb_idx
= 0xFF;
5183 ioc
->internal_lookup
[i
].smid
= smid
;
5184 list_add_tail(&ioc
->internal_lookup
[i
].tracker_list
,
5185 &ioc
->internal_free_list
);
5189 INIT_LIST_HEAD(&ioc
->free_chain_list
);
5190 for (i
= 0; i
< ioc
->chain_depth
; i
++)
5191 list_add_tail(&ioc
->chain_lookup
[i
].tracker_list
,
5192 &ioc
->free_chain_list
);
5194 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
5196 /* initialize Reply Free Queue */
5197 for (i
= 0, reply_address
= (u32
)ioc
->reply_dma
;
5198 i
< ioc
->reply_free_queue_depth
; i
++, reply_address
+=
5200 ioc
->reply_free
[i
] = cpu_to_le32(reply_address
);
5202 /* initialize reply queues */
5203 if (ioc
->is_driver_loading
)
5204 _base_assign_reply_queues(ioc
);
5206 /* initialize Reply Post Free Queue */
5208 reply_post_free_contig
= ioc
->reply_post
[0].reply_post_free
;
5209 list_for_each_entry(reply_q
, &ioc
->reply_queue_list
, list
) {
5211 * If RDPQ is enabled, switch to the next allocation.
5212 * Otherwise advance within the contiguous region.
5214 if (ioc
->rdpq_array_enable
) {
5215 reply_q
->reply_post_free
=
5216 ioc
->reply_post
[index
++].reply_post_free
;
5218 reply_q
->reply_post_free
= reply_post_free_contig
;
5219 reply_post_free_contig
+= ioc
->reply_post_queue_depth
;
5222 reply_q
->reply_post_host_index
= 0;
5223 for (i
= 0; i
< ioc
->reply_post_queue_depth
; i
++)
5224 reply_q
->reply_post_free
[i
].Words
=
5225 cpu_to_le64(ULLONG_MAX
);
5226 if (!_base_is_controller_msix_enabled(ioc
))
5227 goto skip_init_reply_post_free_queue
;
5229 skip_init_reply_post_free_queue
:
5231 r
= _base_send_ioc_init(ioc
);
5235 /* initialize reply free host index */
5236 ioc
->reply_free_host_index
= ioc
->reply_free_queue_depth
- 1;
5237 writel(ioc
->reply_free_host_index
, &ioc
->chip
->ReplyFreeHostIndex
);
5239 /* initialize reply post host index */
5240 list_for_each_entry(reply_q
, &ioc
->reply_queue_list
, list
) {
5241 if (ioc
->combined_reply_queue
)
5242 writel((reply_q
->msix_index
& 7)<<
5243 MPI2_RPHI_MSIX_INDEX_SHIFT
,
5244 ioc
->replyPostRegisterIndex
[reply_q
->msix_index
/8]);
5246 writel(reply_q
->msix_index
<<
5247 MPI2_RPHI_MSIX_INDEX_SHIFT
,
5248 &ioc
->chip
->ReplyPostHostIndex
);
5250 if (!_base_is_controller_msix_enabled(ioc
))
5251 goto skip_init_reply_post_host_index
;
5254 skip_init_reply_post_host_index
:
5256 _base_unmask_interrupts(ioc
);
5257 r
= _base_event_notification(ioc
);
5261 _base_static_config_pages(ioc
);
5263 if (ioc
->is_driver_loading
) {
5265 if (ioc
->is_warpdrive
&& ioc
->manu_pg10
.OEMIdentifier
5268 le32_to_cpu(ioc
->manu_pg10
.OEMSpecificFlags0
) &
5269 MFG_PAGE10_HIDE_SSDS_MASK
);
5270 if (hide_flag
!= MFG_PAGE10_HIDE_SSDS_MASK
)
5271 ioc
->mfg_pg10_hide_flag
= hide_flag
;
5274 ioc
->wait_for_discovery_to_complete
=
5275 _base_determine_wait_on_discovery(ioc
);
5277 return r
; /* scan_start and scan_finished support */
5280 r
= _base_send_port_enable(ioc
);
5288 * mpt3sas_base_free_resources - free resources controller resources
5289 * @ioc: per adapter object
5294 mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER
*ioc
)
5296 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
5299 /* synchronizing freeing resource with pci_access_mutex lock */
5300 mutex_lock(&ioc
->pci_access_mutex
);
5301 if (ioc
->chip_phys
&& ioc
->chip
) {
5302 _base_mask_interrupts(ioc
);
5303 ioc
->shost_recovery
= 1;
5304 _base_make_ioc_ready(ioc
, SOFT_RESET
);
5305 ioc
->shost_recovery
= 0;
5308 mpt3sas_base_unmap_resources(ioc
);
5309 mutex_unlock(&ioc
->pci_access_mutex
);
5314 * mpt3sas_base_attach - attach controller instance
5315 * @ioc: per adapter object
5317 * Returns 0 for success, non-zero for failure.
5320 mpt3sas_base_attach(struct MPT3SAS_ADAPTER
*ioc
)
5323 int cpu_id
, last_cpu_id
= 0;
5325 dinitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
5328 /* setup cpu_msix_table */
5329 ioc
->cpu_count
= num_online_cpus();
5330 for_each_online_cpu(cpu_id
)
5331 last_cpu_id
= cpu_id
;
5332 ioc
->cpu_msix_table_sz
= last_cpu_id
+ 1;
5333 ioc
->cpu_msix_table
= kzalloc(ioc
->cpu_msix_table_sz
, GFP_KERNEL
);
5334 ioc
->reply_queue_count
= 1;
5335 if (!ioc
->cpu_msix_table
) {
5336 dfailprintk(ioc
, pr_info(MPT3SAS_FMT
5337 "allocation for cpu_msix_table failed!!!\n",
5340 goto out_free_resources
;
5343 if (ioc
->is_warpdrive
) {
5344 ioc
->reply_post_host_index
= kcalloc(ioc
->cpu_msix_table_sz
,
5345 sizeof(resource_size_t
*), GFP_KERNEL
);
5346 if (!ioc
->reply_post_host_index
) {
5347 dfailprintk(ioc
, pr_info(MPT3SAS_FMT
"allocation "
5348 "for reply_post_host_index failed!!!\n",
5351 goto out_free_resources
;
5355 ioc
->rdpq_array_enable_assigned
= 0;
5357 r
= mpt3sas_base_map_resources(ioc
);
5359 goto out_free_resources
;
5361 pci_set_drvdata(ioc
->pdev
, ioc
->shost
);
5362 r
= _base_get_ioc_facts(ioc
);
5364 goto out_free_resources
;
5366 switch (ioc
->hba_mpi_version_belonged
) {
5368 ioc
->build_sg_scmd
= &_base_build_sg_scmd
;
5369 ioc
->build_sg
= &_base_build_sg
;
5370 ioc
->build_zero_len_sge
= &_base_build_zero_len_sge
;
5376 * SCSI_IO, SMP_PASSTHRU, SATA_PASSTHRU, Target Assist, and
5377 * Target Status - all require the IEEE formated scatter gather
5380 ioc
->build_sg_scmd
= &_base_build_sg_scmd_ieee
;
5381 ioc
->build_sg
= &_base_build_sg_ieee
;
5382 ioc
->build_zero_len_sge
= &_base_build_zero_len_sge_ieee
;
5383 ioc
->sge_size_ieee
= sizeof(Mpi2IeeeSgeSimple64_t
);
5388 if (ioc
->atomic_desc_capable
) {
5389 ioc
->put_smid_default
= &_base_put_smid_default_atomic
;
5390 ioc
->put_smid_scsi_io
= &_base_put_smid_scsi_io_atomic
;
5391 ioc
->put_smid_fast_path
= &_base_put_smid_fast_path_atomic
;
5392 ioc
->put_smid_hi_priority
= &_base_put_smid_hi_priority_atomic
;
5394 ioc
->put_smid_default
= &_base_put_smid_default
;
5395 ioc
->put_smid_scsi_io
= &_base_put_smid_scsi_io
;
5396 ioc
->put_smid_fast_path
= &_base_put_smid_fast_path
;
5397 ioc
->put_smid_hi_priority
= &_base_put_smid_hi_priority
;
5402 * These function pointers for other requests that don't
5403 * the require IEEE scatter gather elements.
5405 * For example Configuration Pages and SAS IOUNIT Control don't.
5407 ioc
->build_sg_mpi
= &_base_build_sg
;
5408 ioc
->build_zero_len_sge_mpi
= &_base_build_zero_len_sge
;
5410 r
= _base_make_ioc_ready(ioc
, SOFT_RESET
);
5412 goto out_free_resources
;
5414 ioc
->pfacts
= kcalloc(ioc
->facts
.NumberOfPorts
,
5415 sizeof(struct mpt3sas_port_facts
), GFP_KERNEL
);
5418 goto out_free_resources
;
5421 for (i
= 0 ; i
< ioc
->facts
.NumberOfPorts
; i
++) {
5422 r
= _base_get_port_facts(ioc
, i
);
5424 goto out_free_resources
;
5427 r
= _base_allocate_memory_pools(ioc
);
5429 goto out_free_resources
;
5431 init_waitqueue_head(&ioc
->reset_wq
);
5433 /* allocate memory pd handle bitmask list */
5434 ioc
->pd_handles_sz
= (ioc
->facts
.MaxDevHandle
/ 8);
5435 if (ioc
->facts
.MaxDevHandle
% 8)
5436 ioc
->pd_handles_sz
++;
5437 ioc
->pd_handles
= kzalloc(ioc
->pd_handles_sz
,
5439 if (!ioc
->pd_handles
) {
5441 goto out_free_resources
;
5443 ioc
->blocking_handles
= kzalloc(ioc
->pd_handles_sz
,
5445 if (!ioc
->blocking_handles
) {
5447 goto out_free_resources
;
5450 /* allocate memory for pending OS device add list */
5451 ioc
->pend_os_device_add_sz
= (ioc
->facts
.MaxDevHandle
/ 8);
5452 if (ioc
->facts
.MaxDevHandle
% 8)
5453 ioc
->pend_os_device_add_sz
++;
5454 ioc
->pend_os_device_add
= kzalloc(ioc
->pend_os_device_add_sz
,
5456 if (!ioc
->pend_os_device_add
)
5457 goto out_free_resources
;
5459 ioc
->device_remove_in_progress_sz
= ioc
->pend_os_device_add_sz
;
5460 ioc
->device_remove_in_progress
=
5461 kzalloc(ioc
->device_remove_in_progress_sz
, GFP_KERNEL
);
5462 if (!ioc
->device_remove_in_progress
)
5463 goto out_free_resources
;
5465 ioc
->fwfault_debug
= mpt3sas_fwfault_debug
;
5467 /* base internal command bits */
5468 mutex_init(&ioc
->base_cmds
.mutex
);
5469 ioc
->base_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
5470 ioc
->base_cmds
.status
= MPT3_CMD_NOT_USED
;
5472 /* port_enable command bits */
5473 ioc
->port_enable_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
5474 ioc
->port_enable_cmds
.status
= MPT3_CMD_NOT_USED
;
5476 /* transport internal command bits */
5477 ioc
->transport_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
5478 ioc
->transport_cmds
.status
= MPT3_CMD_NOT_USED
;
5479 mutex_init(&ioc
->transport_cmds
.mutex
);
5481 /* scsih internal command bits */
5482 ioc
->scsih_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
5483 ioc
->scsih_cmds
.status
= MPT3_CMD_NOT_USED
;
5484 mutex_init(&ioc
->scsih_cmds
.mutex
);
5486 /* task management internal command bits */
5487 ioc
->tm_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
5488 ioc
->tm_cmds
.status
= MPT3_CMD_NOT_USED
;
5489 mutex_init(&ioc
->tm_cmds
.mutex
);
5491 /* config page internal command bits */
5492 ioc
->config_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
5493 ioc
->config_cmds
.status
= MPT3_CMD_NOT_USED
;
5494 mutex_init(&ioc
->config_cmds
.mutex
);
5496 /* ctl module internal command bits */
5497 ioc
->ctl_cmds
.reply
= kzalloc(ioc
->reply_sz
, GFP_KERNEL
);
5498 ioc
->ctl_cmds
.sense
= kzalloc(SCSI_SENSE_BUFFERSIZE
, GFP_KERNEL
);
5499 ioc
->ctl_cmds
.status
= MPT3_CMD_NOT_USED
;
5500 mutex_init(&ioc
->ctl_cmds
.mutex
);
5502 if (!ioc
->base_cmds
.reply
|| !ioc
->transport_cmds
.reply
||
5503 !ioc
->scsih_cmds
.reply
|| !ioc
->tm_cmds
.reply
||
5504 !ioc
->config_cmds
.reply
|| !ioc
->ctl_cmds
.reply
||
5505 !ioc
->ctl_cmds
.sense
) {
5507 goto out_free_resources
;
5510 for (i
= 0; i
< MPI2_EVENT_NOTIFY_EVENTMASK_WORDS
; i
++)
5511 ioc
->event_masks
[i
] = -1;
5513 /* here we enable the events we care about */
5514 _base_unmask_events(ioc
, MPI2_EVENT_SAS_DISCOVERY
);
5515 _base_unmask_events(ioc
, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE
);
5516 _base_unmask_events(ioc
, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST
);
5517 _base_unmask_events(ioc
, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE
);
5518 _base_unmask_events(ioc
, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE
);
5519 _base_unmask_events(ioc
, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST
);
5520 _base_unmask_events(ioc
, MPI2_EVENT_IR_VOLUME
);
5521 _base_unmask_events(ioc
, MPI2_EVENT_IR_PHYSICAL_DISK
);
5522 _base_unmask_events(ioc
, MPI2_EVENT_IR_OPERATION_STATUS
);
5523 _base_unmask_events(ioc
, MPI2_EVENT_LOG_ENTRY_ADDED
);
5524 _base_unmask_events(ioc
, MPI2_EVENT_TEMP_THRESHOLD
);
5525 if (ioc
->hba_mpi_version_belonged
== MPI26_VERSION
)
5526 _base_unmask_events(ioc
, MPI2_EVENT_ACTIVE_CABLE_EXCEPTION
);
5528 r
= _base_make_ioc_operational(ioc
);
5530 goto out_free_resources
;
5532 ioc
->non_operational_loop
= 0;
5533 ioc
->got_task_abort_from_ioctl
= 0;
5538 ioc
->remove_host
= 1;
5540 mpt3sas_base_free_resources(ioc
);
5541 _base_release_memory_pools(ioc
);
5542 pci_set_drvdata(ioc
->pdev
, NULL
);
5543 kfree(ioc
->cpu_msix_table
);
5544 if (ioc
->is_warpdrive
)
5545 kfree(ioc
->reply_post_host_index
);
5546 kfree(ioc
->pd_handles
);
5547 kfree(ioc
->blocking_handles
);
5548 kfree(ioc
->device_remove_in_progress
);
5549 kfree(ioc
->pend_os_device_add
);
5550 kfree(ioc
->tm_cmds
.reply
);
5551 kfree(ioc
->transport_cmds
.reply
);
5552 kfree(ioc
->scsih_cmds
.reply
);
5553 kfree(ioc
->config_cmds
.reply
);
5554 kfree(ioc
->base_cmds
.reply
);
5555 kfree(ioc
->port_enable_cmds
.reply
);
5556 kfree(ioc
->ctl_cmds
.reply
);
5557 kfree(ioc
->ctl_cmds
.sense
);
5559 ioc
->ctl_cmds
.reply
= NULL
;
5560 ioc
->base_cmds
.reply
= NULL
;
5561 ioc
->tm_cmds
.reply
= NULL
;
5562 ioc
->scsih_cmds
.reply
= NULL
;
5563 ioc
->transport_cmds
.reply
= NULL
;
5564 ioc
->config_cmds
.reply
= NULL
;
5571 * mpt3sas_base_detach - remove controller instance
5572 * @ioc: per adapter object
5577 mpt3sas_base_detach(struct MPT3SAS_ADAPTER
*ioc
)
5579 dexitprintk(ioc
, pr_info(MPT3SAS_FMT
"%s\n", ioc
->name
,
5582 mpt3sas_base_stop_watchdog(ioc
);
5583 mpt3sas_base_free_resources(ioc
);
5584 _base_release_memory_pools(ioc
);
5585 pci_set_drvdata(ioc
->pdev
, NULL
);
5586 kfree(ioc
->cpu_msix_table
);
5587 if (ioc
->is_warpdrive
)
5588 kfree(ioc
->reply_post_host_index
);
5589 kfree(ioc
->pd_handles
);
5590 kfree(ioc
->blocking_handles
);
5591 kfree(ioc
->device_remove_in_progress
);
5592 kfree(ioc
->pend_os_device_add
);
5594 kfree(ioc
->ctl_cmds
.reply
);
5595 kfree(ioc
->ctl_cmds
.sense
);
5596 kfree(ioc
->base_cmds
.reply
);
5597 kfree(ioc
->port_enable_cmds
.reply
);
5598 kfree(ioc
->tm_cmds
.reply
);
5599 kfree(ioc
->transport_cmds
.reply
);
5600 kfree(ioc
->scsih_cmds
.reply
);
5601 kfree(ioc
->config_cmds
.reply
);
5605 * _base_reset_handler - reset callback handler (for base)
5606 * @ioc: per adapter object
5607 * @reset_phase: phase
5609 * The handler for doing any required cleanup or initialization.
5611 * The reset phase can be MPT3_IOC_PRE_RESET, MPT3_IOC_AFTER_RESET,
5612 * MPT3_IOC_DONE_RESET
5617 _base_reset_handler(struct MPT3SAS_ADAPTER
*ioc
, int reset_phase
)
5619 mpt3sas_scsih_reset_handler(ioc
, reset_phase
);
5620 mpt3sas_ctl_reset_handler(ioc
, reset_phase
);
5621 switch (reset_phase
) {
5622 case MPT3_IOC_PRE_RESET
:
5623 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
5624 "%s: MPT3_IOC_PRE_RESET\n", ioc
->name
, __func__
));
5626 case MPT3_IOC_AFTER_RESET
:
5627 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
5628 "%s: MPT3_IOC_AFTER_RESET\n", ioc
->name
, __func__
));
5629 if (ioc
->transport_cmds
.status
& MPT3_CMD_PENDING
) {
5630 ioc
->transport_cmds
.status
|= MPT3_CMD_RESET
;
5631 mpt3sas_base_free_smid(ioc
, ioc
->transport_cmds
.smid
);
5632 complete(&ioc
->transport_cmds
.done
);
5634 if (ioc
->base_cmds
.status
& MPT3_CMD_PENDING
) {
5635 ioc
->base_cmds
.status
|= MPT3_CMD_RESET
;
5636 mpt3sas_base_free_smid(ioc
, ioc
->base_cmds
.smid
);
5637 complete(&ioc
->base_cmds
.done
);
5639 if (ioc
->port_enable_cmds
.status
& MPT3_CMD_PENDING
) {
5640 ioc
->port_enable_failed
= 1;
5641 ioc
->port_enable_cmds
.status
|= MPT3_CMD_RESET
;
5642 mpt3sas_base_free_smid(ioc
, ioc
->port_enable_cmds
.smid
);
5643 if (ioc
->is_driver_loading
) {
5644 ioc
->start_scan_failed
=
5645 MPI2_IOCSTATUS_INTERNAL_ERROR
;
5646 ioc
->start_scan
= 0;
5647 ioc
->port_enable_cmds
.status
=
5650 complete(&ioc
->port_enable_cmds
.done
);
5652 if (ioc
->config_cmds
.status
& MPT3_CMD_PENDING
) {
5653 ioc
->config_cmds
.status
|= MPT3_CMD_RESET
;
5654 mpt3sas_base_free_smid(ioc
, ioc
->config_cmds
.smid
);
5655 ioc
->config_cmds
.smid
= USHRT_MAX
;
5656 complete(&ioc
->config_cmds
.done
);
5659 case MPT3_IOC_DONE_RESET
:
5660 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
5661 "%s: MPT3_IOC_DONE_RESET\n", ioc
->name
, __func__
));
5667 * _wait_for_commands_to_complete - reset controller
5668 * @ioc: Pointer to MPT_ADAPTER structure
5670 * This function waiting(3s) for all pending commands to complete
5671 * prior to putting controller in reset.
5674 _wait_for_commands_to_complete(struct MPT3SAS_ADAPTER
*ioc
)
5677 unsigned long flags
;
5680 ioc
->pending_io_count
= 0;
5682 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 0);
5683 if ((ioc_state
& MPI2_IOC_STATE_MASK
) != MPI2_IOC_STATE_OPERATIONAL
)
5686 /* pending command count */
5687 spin_lock_irqsave(&ioc
->scsi_lookup_lock
, flags
);
5688 for (i
= 0; i
< ioc
->scsiio_depth
; i
++)
5689 if (ioc
->scsi_lookup
[i
].cb_idx
!= 0xFF)
5690 ioc
->pending_io_count
++;
5691 spin_unlock_irqrestore(&ioc
->scsi_lookup_lock
, flags
);
5693 if (!ioc
->pending_io_count
)
5696 /* wait for pending commands to complete */
5697 wait_event_timeout(ioc
->reset_wq
, ioc
->pending_io_count
== 0, 10 * HZ
);
5701 * mpt3sas_base_hard_reset_handler - reset controller
5702 * @ioc: Pointer to MPT_ADAPTER structure
5703 * @type: FORCE_BIG_HAMMER or SOFT_RESET
5705 * Returns 0 for success, non-zero for failure.
5708 mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER
*ioc
,
5709 enum reset_type type
)
5712 unsigned long flags
;
5714 u8 is_fault
= 0, is_trigger
= 0;
5716 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: enter\n", ioc
->name
,
5719 if (ioc
->pci_error_recovery
) {
5720 pr_err(MPT3SAS_FMT
"%s: pci error recovery reset\n",
5721 ioc
->name
, __func__
);
5726 if (mpt3sas_fwfault_debug
)
5727 mpt3sas_halt_firmware(ioc
);
5729 /* wait for an active reset in progress to complete */
5730 if (!mutex_trylock(&ioc
->reset_in_progress_mutex
)) {
5733 } while (ioc
->shost_recovery
== 1);
5734 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: exit\n", ioc
->name
,
5736 return ioc
->ioc_reset_in_progress_status
;
5739 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
5740 ioc
->shost_recovery
= 1;
5741 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
5743 if ((ioc
->diag_buffer_status
[MPI2_DIAG_BUF_TYPE_TRACE
] &
5744 MPT3_DIAG_BUFFER_IS_REGISTERED
) &&
5745 (!(ioc
->diag_buffer_status
[MPI2_DIAG_BUF_TYPE_TRACE
] &
5746 MPT3_DIAG_BUFFER_IS_RELEASED
))) {
5748 ioc_state
= mpt3sas_base_get_iocstate(ioc
, 0);
5749 if ((ioc_state
& MPI2_IOC_STATE_MASK
) == MPI2_IOC_STATE_FAULT
)
5752 _base_reset_handler(ioc
, MPT3_IOC_PRE_RESET
);
5753 _wait_for_commands_to_complete(ioc
);
5754 _base_mask_interrupts(ioc
);
5755 r
= _base_make_ioc_ready(ioc
, type
);
5758 _base_reset_handler(ioc
, MPT3_IOC_AFTER_RESET
);
5760 /* If this hard reset is called while port enable is active, then
5761 * there is no reason to call make_ioc_operational
5763 if (ioc
->is_driver_loading
&& ioc
->port_enable_failed
) {
5764 ioc
->remove_host
= 1;
5768 r
= _base_get_ioc_facts(ioc
);
5772 if (ioc
->rdpq_array_enable
&& !ioc
->rdpq_array_capable
)
5773 panic("%s: Issue occurred with flashing controller firmware."
5774 "Please reboot the system and ensure that the correct"
5775 " firmware version is running\n", ioc
->name
);
5777 r
= _base_make_ioc_operational(ioc
);
5779 _base_reset_handler(ioc
, MPT3_IOC_DONE_RESET
);
5782 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: %s\n",
5783 ioc
->name
, __func__
, ((r
== 0) ? "SUCCESS" : "FAILED")));
5785 spin_lock_irqsave(&ioc
->ioc_reset_in_progress_lock
, flags
);
5786 ioc
->ioc_reset_in_progress_status
= r
;
5787 ioc
->shost_recovery
= 0;
5788 spin_unlock_irqrestore(&ioc
->ioc_reset_in_progress_lock
, flags
);
5789 ioc
->ioc_reset_count
++;
5790 mutex_unlock(&ioc
->reset_in_progress_mutex
);
5793 if ((r
== 0) && is_trigger
) {
5795 mpt3sas_trigger_master(ioc
, MASTER_TRIGGER_FW_FAULT
);
5797 mpt3sas_trigger_master(ioc
,
5798 MASTER_TRIGGER_ADAPTER_RESET
);
5800 dtmprintk(ioc
, pr_info(MPT3SAS_FMT
"%s: exit\n", ioc
->name
,