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[mirror_ubuntu-artful-kernel.git] / drivers / scsi / mvsas / mv_sas.c
1 /*
2 * Marvell 88SE64xx/88SE94xx main function
3 *
4 * Copyright 2007 Red Hat, Inc.
5 * Copyright 2008 Marvell. <kewei@marvell.com>
6 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
7 *
8 * This file is licensed under GPLv2.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; version 2 of the
13 * License.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
23 * USA
24 */
25
26 #include "mv_sas.h"
27
28 static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag)
29 {
30 if (task->lldd_task) {
31 struct mvs_slot_info *slot;
32 slot = task->lldd_task;
33 *tag = slot->slot_tag;
34 return 1;
35 }
36 return 0;
37 }
38
39 void mvs_tag_clear(struct mvs_info *mvi, u32 tag)
40 {
41 void *bitmap = mvi->tags;
42 clear_bit(tag, bitmap);
43 }
44
45 void mvs_tag_free(struct mvs_info *mvi, u32 tag)
46 {
47 mvs_tag_clear(mvi, tag);
48 }
49
50 void mvs_tag_set(struct mvs_info *mvi, unsigned int tag)
51 {
52 void *bitmap = mvi->tags;
53 set_bit(tag, bitmap);
54 }
55
56 inline int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out)
57 {
58 unsigned int index, tag;
59 void *bitmap = mvi->tags;
60
61 index = find_first_zero_bit(bitmap, mvi->tags_num);
62 tag = index;
63 if (tag >= mvi->tags_num)
64 return -SAS_QUEUE_FULL;
65 mvs_tag_set(mvi, tag);
66 *tag_out = tag;
67 return 0;
68 }
69
70 void mvs_tag_init(struct mvs_info *mvi)
71 {
72 int i;
73 for (i = 0; i < mvi->tags_num; ++i)
74 mvs_tag_clear(mvi, i);
75 }
76
77 struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev)
78 {
79 unsigned long i = 0, j = 0, hi = 0;
80 struct sas_ha_struct *sha = dev->port->ha;
81 struct mvs_info *mvi = NULL;
82 struct asd_sas_phy *phy;
83
84 while (sha->sas_port[i]) {
85 if (sha->sas_port[i] == dev->port) {
86 phy = container_of(sha->sas_port[i]->phy_list.next,
87 struct asd_sas_phy, port_phy_el);
88 j = 0;
89 while (sha->sas_phy[j]) {
90 if (sha->sas_phy[j] == phy)
91 break;
92 j++;
93 }
94 break;
95 }
96 i++;
97 }
98 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
99 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
100
101 return mvi;
102
103 }
104
105 int mvs_find_dev_phyno(struct domain_device *dev, int *phyno)
106 {
107 unsigned long i = 0, j = 0, n = 0, num = 0;
108 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
109 struct mvs_info *mvi = mvi_dev->mvi_info;
110 struct sas_ha_struct *sha = dev->port->ha;
111
112 while (sha->sas_port[i]) {
113 if (sha->sas_port[i] == dev->port) {
114 struct asd_sas_phy *phy;
115 list_for_each_entry(phy,
116 &sha->sas_port[i]->phy_list, port_phy_el) {
117 j = 0;
118 while (sha->sas_phy[j]) {
119 if (sha->sas_phy[j] == phy)
120 break;
121 j++;
122 }
123 phyno[n] = (j >= mvi->chip->n_phy) ?
124 (j - mvi->chip->n_phy) : j;
125 num++;
126 n++;
127 }
128 break;
129 }
130 i++;
131 }
132 return num;
133 }
134
135 struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi,
136 u8 reg_set)
137 {
138 u32 dev_no;
139 for (dev_no = 0; dev_no < MVS_MAX_DEVICES; dev_no++) {
140 if (mvi->devices[dev_no].taskfileset == MVS_ID_NOT_MAPPED)
141 continue;
142
143 if (mvi->devices[dev_no].taskfileset == reg_set)
144 return &mvi->devices[dev_no];
145 }
146 return NULL;
147 }
148
149 static inline void mvs_free_reg_set(struct mvs_info *mvi,
150 struct mvs_device *dev)
151 {
152 if (!dev) {
153 mv_printk("device has been free.\n");
154 return;
155 }
156 if (dev->taskfileset == MVS_ID_NOT_MAPPED)
157 return;
158 MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset);
159 }
160
161 static inline u8 mvs_assign_reg_set(struct mvs_info *mvi,
162 struct mvs_device *dev)
163 {
164 if (dev->taskfileset != MVS_ID_NOT_MAPPED)
165 return 0;
166 return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset);
167 }
168
169 void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard)
170 {
171 u32 no;
172 for_each_phy(phy_mask, phy_mask, no) {
173 if (!(phy_mask & 1))
174 continue;
175 MVS_CHIP_DISP->phy_reset(mvi, no, hard);
176 }
177 }
178
179 int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
180 void *funcdata)
181 {
182 int rc = 0, phy_id = sas_phy->id;
183 u32 tmp, i = 0, hi;
184 struct sas_ha_struct *sha = sas_phy->ha;
185 struct mvs_info *mvi = NULL;
186
187 while (sha->sas_phy[i]) {
188 if (sha->sas_phy[i] == sas_phy)
189 break;
190 i++;
191 }
192 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
193 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
194
195 switch (func) {
196 case PHY_FUNC_SET_LINK_RATE:
197 MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata);
198 break;
199
200 case PHY_FUNC_HARD_RESET:
201 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id);
202 if (tmp & PHY_RST_HARD)
203 break;
204 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET);
205 break;
206
207 case PHY_FUNC_LINK_RESET:
208 MVS_CHIP_DISP->phy_enable(mvi, phy_id);
209 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET);
210 break;
211
212 case PHY_FUNC_DISABLE:
213 MVS_CHIP_DISP->phy_disable(mvi, phy_id);
214 break;
215 case PHY_FUNC_RELEASE_SPINUP_HOLD:
216 default:
217 rc = -ENOSYS;
218 }
219 msleep(200);
220 return rc;
221 }
222
223 void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo,
224 u32 off_hi, u64 sas_addr)
225 {
226 u32 lo = (u32)sas_addr;
227 u32 hi = (u32)(sas_addr>>32);
228
229 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo);
230 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo);
231 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi);
232 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi);
233 }
234
235 static void mvs_bytes_dmaed(struct mvs_info *mvi, int i)
236 {
237 struct mvs_phy *phy = &mvi->phy[i];
238 struct asd_sas_phy *sas_phy = &phy->sas_phy;
239 struct sas_ha_struct *sas_ha;
240 if (!phy->phy_attached)
241 return;
242
243 if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK)
244 && phy->phy_type & PORT_TYPE_SAS) {
245 return;
246 }
247
248 sas_ha = mvi->sas;
249 sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE);
250
251 if (sas_phy->phy) {
252 struct sas_phy *sphy = sas_phy->phy;
253
254 sphy->negotiated_linkrate = sas_phy->linkrate;
255 sphy->minimum_linkrate = phy->minimum_linkrate;
256 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
257 sphy->maximum_linkrate = phy->maximum_linkrate;
258 sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate();
259 }
260
261 if (phy->phy_type & PORT_TYPE_SAS) {
262 struct sas_identify_frame *id;
263
264 id = (struct sas_identify_frame *)phy->frame_rcvd;
265 id->dev_type = phy->identify.device_type;
266 id->initiator_bits = SAS_PROTOCOL_ALL;
267 id->target_bits = phy->identify.target_port_protocols;
268
269 /* direct attached SAS device */
270 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
271 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
272 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x00);
273 }
274 } else if (phy->phy_type & PORT_TYPE_SATA) {
275 /*Nothing*/
276 }
277 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy);
278
279 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
280
281 mvi->sas->notify_port_event(sas_phy,
282 PORTE_BYTES_DMAED);
283 }
284
285 void mvs_scan_start(struct Scsi_Host *shost)
286 {
287 int i, j;
288 unsigned short core_nr;
289 struct mvs_info *mvi;
290 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
291 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
292
293 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;
294
295 for (j = 0; j < core_nr; j++) {
296 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j];
297 for (i = 0; i < mvi->chip->n_phy; ++i)
298 mvs_bytes_dmaed(mvi, i);
299 }
300 mvs_prv->scan_finished = 1;
301 }
302
303 int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time)
304 {
305 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
306 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
307
308 if (mvs_prv->scan_finished == 0)
309 return 0;
310
311 sas_drain_work(sha);
312 return 1;
313 }
314
315 static int mvs_task_prep_smp(struct mvs_info *mvi,
316 struct mvs_task_exec_info *tei)
317 {
318 int elem, rc, i;
319 struct sas_ha_struct *sha = mvi->sas;
320 struct sas_task *task = tei->task;
321 struct mvs_cmd_hdr *hdr = tei->hdr;
322 struct domain_device *dev = task->dev;
323 struct asd_sas_port *sas_port = dev->port;
324 struct sas_phy *sphy = dev->phy;
325 struct asd_sas_phy *sas_phy = sha->sas_phy[sphy->number];
326 struct scatterlist *sg_req, *sg_resp;
327 u32 req_len, resp_len, tag = tei->tag;
328 void *buf_tmp;
329 u8 *buf_oaf;
330 dma_addr_t buf_tmp_dma;
331 void *buf_prd;
332 struct mvs_slot_info *slot = &mvi->slot_info[tag];
333 u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
334
335 /*
336 * DMA-map SMP request, response buffers
337 */
338 sg_req = &task->smp_task.smp_req;
339 elem = dma_map_sg(mvi->dev, sg_req, 1, PCI_DMA_TODEVICE);
340 if (!elem)
341 return -ENOMEM;
342 req_len = sg_dma_len(sg_req);
343
344 sg_resp = &task->smp_task.smp_resp;
345 elem = dma_map_sg(mvi->dev, sg_resp, 1, PCI_DMA_FROMDEVICE);
346 if (!elem) {
347 rc = -ENOMEM;
348 goto err_out;
349 }
350 resp_len = SB_RFB_MAX;
351
352 /* must be in dwords */
353 if ((req_len & 0x3) || (resp_len & 0x3)) {
354 rc = -EINVAL;
355 goto err_out_2;
356 }
357
358 /*
359 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
360 */
361
362 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */
363 buf_tmp = slot->buf;
364 buf_tmp_dma = slot->buf_dma;
365
366 hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req));
367
368 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
369 buf_oaf = buf_tmp;
370 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
371
372 buf_tmp += MVS_OAF_SZ;
373 buf_tmp_dma += MVS_OAF_SZ;
374
375 /* region 3: PRD table *********************************** */
376 buf_prd = buf_tmp;
377 if (tei->n_elem)
378 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
379 else
380 hdr->prd_tbl = 0;
381
382 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
383 buf_tmp += i;
384 buf_tmp_dma += i;
385
386 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
387 slot->response = buf_tmp;
388 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
389 if (mvi->flags & MVF_FLAG_SOC)
390 hdr->reserved[0] = 0;
391
392 /*
393 * Fill in TX ring and command slot header
394 */
395 slot->tx = mvi->tx_prod;
396 mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) |
397 TXQ_MODE_I | tag |
398 (MVS_PHY_ID << TXQ_PHY_SHIFT));
399
400 hdr->flags |= flags;
401 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4));
402 hdr->tags = cpu_to_le32(tag);
403 hdr->data_len = 0;
404
405 /* generate open address frame hdr (first 12 bytes) */
406 /* initiator, SMP, ftype 1h */
407 buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01;
408 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
409 *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */
410 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
411
412 /* fill in PRD (scatter/gather) table, if any */
413 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
414
415 return 0;
416
417 err_out_2:
418 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1,
419 PCI_DMA_FROMDEVICE);
420 err_out:
421 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1,
422 PCI_DMA_TODEVICE);
423 return rc;
424 }
425
426 static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag)
427 {
428 struct ata_queued_cmd *qc = task->uldd_task;
429
430 if (qc) {
431 if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
432 qc->tf.command == ATA_CMD_FPDMA_READ) {
433 *tag = qc->tag;
434 return 1;
435 }
436 }
437
438 return 0;
439 }
440
441 static int mvs_task_prep_ata(struct mvs_info *mvi,
442 struct mvs_task_exec_info *tei)
443 {
444 struct sas_task *task = tei->task;
445 struct domain_device *dev = task->dev;
446 struct mvs_device *mvi_dev = dev->lldd_dev;
447 struct mvs_cmd_hdr *hdr = tei->hdr;
448 struct asd_sas_port *sas_port = dev->port;
449 struct mvs_slot_info *slot;
450 void *buf_prd;
451 u32 tag = tei->tag, hdr_tag;
452 u32 flags, del_q;
453 void *buf_tmp;
454 u8 *buf_cmd, *buf_oaf;
455 dma_addr_t buf_tmp_dma;
456 u32 i, req_len, resp_len;
457 const u32 max_resp_len = SB_RFB_MAX;
458
459 if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) {
460 mv_dprintk("Have not enough regiset for dev %d.\n",
461 mvi_dev->device_id);
462 return -EBUSY;
463 }
464 slot = &mvi->slot_info[tag];
465 slot->tx = mvi->tx_prod;
466 del_q = TXQ_MODE_I | tag |
467 (TXQ_CMD_STP << TXQ_CMD_SHIFT) |
468 ((sas_port->phy_mask & TXQ_PHY_MASK) << TXQ_PHY_SHIFT) |
469 (mvi_dev->taskfileset << TXQ_SRS_SHIFT);
470 mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q);
471
472 if (task->data_dir == DMA_FROM_DEVICE)
473 flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT);
474 else
475 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
476
477 if (task->ata_task.use_ncq)
478 flags |= MCH_FPDMA;
479 if (dev->sata_dev.class == ATA_DEV_ATAPI) {
480 if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI)
481 flags |= MCH_ATAPI;
482 }
483
484 hdr->flags = cpu_to_le32(flags);
485
486 if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag))
487 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3);
488 else
489 hdr_tag = tag;
490
491 hdr->tags = cpu_to_le32(hdr_tag);
492
493 hdr->data_len = cpu_to_le32(task->total_xfer_len);
494
495 /*
496 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
497 */
498
499 /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */
500 buf_cmd = buf_tmp = slot->buf;
501 buf_tmp_dma = slot->buf_dma;
502
503 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
504
505 buf_tmp += MVS_ATA_CMD_SZ;
506 buf_tmp_dma += MVS_ATA_CMD_SZ;
507
508 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
509 /* used for STP. unused for SATA? */
510 buf_oaf = buf_tmp;
511 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
512
513 buf_tmp += MVS_OAF_SZ;
514 buf_tmp_dma += MVS_OAF_SZ;
515
516 /* region 3: PRD table ********************************************* */
517 buf_prd = buf_tmp;
518
519 if (tei->n_elem)
520 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
521 else
522 hdr->prd_tbl = 0;
523 i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count();
524
525 buf_tmp += i;
526 buf_tmp_dma += i;
527
528 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
529 slot->response = buf_tmp;
530 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
531 if (mvi->flags & MVF_FLAG_SOC)
532 hdr->reserved[0] = 0;
533
534 req_len = sizeof(struct host_to_dev_fis);
535 resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ -
536 sizeof(struct mvs_err_info) - i;
537
538 /* request, response lengths */
539 resp_len = min(resp_len, max_resp_len);
540 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
541
542 if (likely(!task->ata_task.device_control_reg_update))
543 task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */
544 /* fill in command FIS and ATAPI CDB */
545 memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis));
546 if (dev->sata_dev.class == ATA_DEV_ATAPI)
547 memcpy(buf_cmd + STP_ATAPI_CMD,
548 task->ata_task.atapi_packet, 16);
549
550 /* generate open address frame hdr (first 12 bytes) */
551 /* initiator, STP, ftype 1h */
552 buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1;
553 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
554 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
555 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
556
557 /* fill in PRD (scatter/gather) table, if any */
558 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
559
560 if (task->data_dir == DMA_FROM_DEVICE)
561 MVS_CHIP_DISP->dma_fix(mvi, sas_port->phy_mask,
562 TRASH_BUCKET_SIZE, tei->n_elem, buf_prd);
563
564 return 0;
565 }
566
567 static int mvs_task_prep_ssp(struct mvs_info *mvi,
568 struct mvs_task_exec_info *tei, int is_tmf,
569 struct mvs_tmf_task *tmf)
570 {
571 struct sas_task *task = tei->task;
572 struct mvs_cmd_hdr *hdr = tei->hdr;
573 struct mvs_port *port = tei->port;
574 struct domain_device *dev = task->dev;
575 struct mvs_device *mvi_dev = dev->lldd_dev;
576 struct asd_sas_port *sas_port = dev->port;
577 struct mvs_slot_info *slot;
578 void *buf_prd;
579 struct ssp_frame_hdr *ssp_hdr;
580 void *buf_tmp;
581 u8 *buf_cmd, *buf_oaf, fburst = 0;
582 dma_addr_t buf_tmp_dma;
583 u32 flags;
584 u32 resp_len, req_len, i, tag = tei->tag;
585 const u32 max_resp_len = SB_RFB_MAX;
586 u32 phy_mask;
587
588 slot = &mvi->slot_info[tag];
589
590 phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap :
591 sas_port->phy_mask) & TXQ_PHY_MASK;
592
593 slot->tx = mvi->tx_prod;
594 mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag |
595 (TXQ_CMD_SSP << TXQ_CMD_SHIFT) |
596 (phy_mask << TXQ_PHY_SHIFT));
597
598 flags = MCH_RETRY;
599 if (task->ssp_task.enable_first_burst) {
600 flags |= MCH_FBURST;
601 fburst = (1 << 7);
602 }
603 if (is_tmf)
604 flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT);
605 else
606 flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT);
607
608 hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT));
609 hdr->tags = cpu_to_le32(tag);
610 hdr->data_len = cpu_to_le32(task->total_xfer_len);
611
612 /*
613 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
614 */
615
616 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */
617 buf_cmd = buf_tmp = slot->buf;
618 buf_tmp_dma = slot->buf_dma;
619
620 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
621
622 buf_tmp += MVS_SSP_CMD_SZ;
623 buf_tmp_dma += MVS_SSP_CMD_SZ;
624
625 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
626 buf_oaf = buf_tmp;
627 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
628
629 buf_tmp += MVS_OAF_SZ;
630 buf_tmp_dma += MVS_OAF_SZ;
631
632 /* region 3: PRD table ********************************************* */
633 buf_prd = buf_tmp;
634 if (tei->n_elem)
635 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
636 else
637 hdr->prd_tbl = 0;
638
639 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
640 buf_tmp += i;
641 buf_tmp_dma += i;
642
643 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
644 slot->response = buf_tmp;
645 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
646 if (mvi->flags & MVF_FLAG_SOC)
647 hdr->reserved[0] = 0;
648
649 resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ -
650 sizeof(struct mvs_err_info) - i;
651 resp_len = min(resp_len, max_resp_len);
652
653 req_len = sizeof(struct ssp_frame_hdr) + 28;
654
655 /* request, response lengths */
656 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
657
658 /* generate open address frame hdr (first 12 bytes) */
659 /* initiator, SSP, ftype 1h */
660 buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1;
661 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
662 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
663 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
664
665 /* fill in SSP frame header (Command Table.SSP frame header) */
666 ssp_hdr = (struct ssp_frame_hdr *)buf_cmd;
667
668 if (is_tmf)
669 ssp_hdr->frame_type = SSP_TASK;
670 else
671 ssp_hdr->frame_type = SSP_COMMAND;
672
673 memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr,
674 HASHED_SAS_ADDR_SIZE);
675 memcpy(ssp_hdr->hashed_src_addr,
676 dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE);
677 ssp_hdr->tag = cpu_to_be16(tag);
678
679 /* fill in IU for TASK and Command Frame */
680 buf_cmd += sizeof(*ssp_hdr);
681 memcpy(buf_cmd, &task->ssp_task.LUN, 8);
682
683 if (ssp_hdr->frame_type != SSP_TASK) {
684 buf_cmd[9] = fburst | task->ssp_task.task_attr |
685 (task->ssp_task.task_prio << 3);
686 memcpy(buf_cmd + 12, task->ssp_task.cmd->cmnd,
687 task->ssp_task.cmd->cmd_len);
688 } else{
689 buf_cmd[10] = tmf->tmf;
690 switch (tmf->tmf) {
691 case TMF_ABORT_TASK:
692 case TMF_QUERY_TASK:
693 buf_cmd[12] =
694 (tmf->tag_of_task_to_be_managed >> 8) & 0xff;
695 buf_cmd[13] =
696 tmf->tag_of_task_to_be_managed & 0xff;
697 break;
698 default:
699 break;
700 }
701 }
702 /* fill in PRD (scatter/gather) table, if any */
703 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
704 return 0;
705 }
706
707 #define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == SAS_PHY_UNUSED)))
708 static int mvs_task_prep(struct sas_task *task, struct mvs_info *mvi, int is_tmf,
709 struct mvs_tmf_task *tmf, int *pass)
710 {
711 struct domain_device *dev = task->dev;
712 struct mvs_device *mvi_dev = dev->lldd_dev;
713 struct mvs_task_exec_info tei;
714 struct mvs_slot_info *slot;
715 u32 tag = 0xdeadbeef, n_elem = 0;
716 int rc = 0;
717
718 if (!dev->port) {
719 struct task_status_struct *tsm = &task->task_status;
720
721 tsm->resp = SAS_TASK_UNDELIVERED;
722 tsm->stat = SAS_PHY_DOWN;
723 /*
724 * libsas will use dev->port, should
725 * not call task_done for sata
726 */
727 if (dev->dev_type != SAS_SATA_DEV)
728 task->task_done(task);
729 return rc;
730 }
731
732 if (DEV_IS_GONE(mvi_dev)) {
733 if (mvi_dev)
734 mv_dprintk("device %d not ready.\n",
735 mvi_dev->device_id);
736 else
737 mv_dprintk("device %016llx not ready.\n",
738 SAS_ADDR(dev->sas_addr));
739
740 rc = SAS_PHY_DOWN;
741 return rc;
742 }
743 tei.port = dev->port->lldd_port;
744 if (tei.port && !tei.port->port_attached && !tmf) {
745 if (sas_protocol_ata(task->task_proto)) {
746 struct task_status_struct *ts = &task->task_status;
747 mv_dprintk("SATA/STP port %d does not attach"
748 "device.\n", dev->port->id);
749 ts->resp = SAS_TASK_COMPLETE;
750 ts->stat = SAS_PHY_DOWN;
751
752 task->task_done(task);
753
754 } else {
755 struct task_status_struct *ts = &task->task_status;
756 mv_dprintk("SAS port %d does not attach"
757 "device.\n", dev->port->id);
758 ts->resp = SAS_TASK_UNDELIVERED;
759 ts->stat = SAS_PHY_DOWN;
760 task->task_done(task);
761 }
762 return rc;
763 }
764
765 if (!sas_protocol_ata(task->task_proto)) {
766 if (task->num_scatter) {
767 n_elem = dma_map_sg(mvi->dev,
768 task->scatter,
769 task->num_scatter,
770 task->data_dir);
771 if (!n_elem) {
772 rc = -ENOMEM;
773 goto prep_out;
774 }
775 }
776 } else {
777 n_elem = task->num_scatter;
778 }
779
780 rc = mvs_tag_alloc(mvi, &tag);
781 if (rc)
782 goto err_out;
783
784 slot = &mvi->slot_info[tag];
785
786 task->lldd_task = NULL;
787 slot->n_elem = n_elem;
788 slot->slot_tag = tag;
789
790 slot->buf = pci_pool_alloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma);
791 if (!slot->buf)
792 goto err_out_tag;
793 memset(slot->buf, 0, MVS_SLOT_BUF_SZ);
794
795 tei.task = task;
796 tei.hdr = &mvi->slot[tag];
797 tei.tag = tag;
798 tei.n_elem = n_elem;
799 switch (task->task_proto) {
800 case SAS_PROTOCOL_SMP:
801 rc = mvs_task_prep_smp(mvi, &tei);
802 break;
803 case SAS_PROTOCOL_SSP:
804 rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf);
805 break;
806 case SAS_PROTOCOL_SATA:
807 case SAS_PROTOCOL_STP:
808 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
809 rc = mvs_task_prep_ata(mvi, &tei);
810 break;
811 default:
812 dev_printk(KERN_ERR, mvi->dev,
813 "unknown sas_task proto: 0x%x\n",
814 task->task_proto);
815 rc = -EINVAL;
816 break;
817 }
818
819 if (rc) {
820 mv_dprintk("rc is %x\n", rc);
821 goto err_out_slot_buf;
822 }
823 slot->task = task;
824 slot->port = tei.port;
825 task->lldd_task = slot;
826 list_add_tail(&slot->entry, &tei.port->list);
827 spin_lock(&task->task_state_lock);
828 task->task_state_flags |= SAS_TASK_AT_INITIATOR;
829 spin_unlock(&task->task_state_lock);
830
831 mvi_dev->running_req++;
832 ++(*pass);
833 mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1);
834
835 return rc;
836
837 err_out_slot_buf:
838 pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
839 err_out_tag:
840 mvs_tag_free(mvi, tag);
841 err_out:
842
843 dev_printk(KERN_ERR, mvi->dev, "mvsas prep failed[%d]!\n", rc);
844 if (!sas_protocol_ata(task->task_proto))
845 if (n_elem)
846 dma_unmap_sg(mvi->dev, task->scatter, n_elem,
847 task->data_dir);
848 prep_out:
849 return rc;
850 }
851
852 static int mvs_task_exec(struct sas_task *task, gfp_t gfp_flags,
853 struct completion *completion, int is_tmf,
854 struct mvs_tmf_task *tmf)
855 {
856 struct mvs_info *mvi = NULL;
857 u32 rc = 0;
858 u32 pass = 0;
859 unsigned long flags = 0;
860
861 mvi = ((struct mvs_device *)task->dev->lldd_dev)->mvi_info;
862
863 spin_lock_irqsave(&mvi->lock, flags);
864 rc = mvs_task_prep(task, mvi, is_tmf, tmf, &pass);
865 if (rc)
866 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);
867
868 if (likely(pass))
869 MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) &
870 (MVS_CHIP_SLOT_SZ - 1));
871 spin_unlock_irqrestore(&mvi->lock, flags);
872
873 return rc;
874 }
875
876 int mvs_queue_command(struct sas_task *task, gfp_t gfp_flags)
877 {
878 return mvs_task_exec(task, gfp_flags, NULL, 0, NULL);
879 }
880
881 static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc)
882 {
883 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
884 mvs_tag_clear(mvi, slot_idx);
885 }
886
887 static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task,
888 struct mvs_slot_info *slot, u32 slot_idx)
889 {
890 if (!slot->task)
891 return;
892 if (!sas_protocol_ata(task->task_proto))
893 if (slot->n_elem)
894 dma_unmap_sg(mvi->dev, task->scatter,
895 slot->n_elem, task->data_dir);
896
897 switch (task->task_proto) {
898 case SAS_PROTOCOL_SMP:
899 dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1,
900 PCI_DMA_FROMDEVICE);
901 dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1,
902 PCI_DMA_TODEVICE);
903 break;
904
905 case SAS_PROTOCOL_SATA:
906 case SAS_PROTOCOL_STP:
907 case SAS_PROTOCOL_SSP:
908 default:
909 /* do nothing */
910 break;
911 }
912
913 if (slot->buf) {
914 pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
915 slot->buf = NULL;
916 }
917 list_del_init(&slot->entry);
918 task->lldd_task = NULL;
919 slot->task = NULL;
920 slot->port = NULL;
921 slot->slot_tag = 0xFFFFFFFF;
922 mvs_slot_free(mvi, slot_idx);
923 }
924
925 static void mvs_update_wideport(struct mvs_info *mvi, int phy_no)
926 {
927 struct mvs_phy *phy = &mvi->phy[phy_no];
928 struct mvs_port *port = phy->port;
929 int j, no;
930
931 for_each_phy(port->wide_port_phymap, j, no) {
932 if (j & 1) {
933 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
934 PHYR_WIDE_PORT);
935 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
936 port->wide_port_phymap);
937 } else {
938 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
939 PHYR_WIDE_PORT);
940 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
941 0);
942 }
943 }
944 }
945
946 static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i)
947 {
948 u32 tmp;
949 struct mvs_phy *phy = &mvi->phy[i];
950 struct mvs_port *port = phy->port;
951
952 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i);
953 if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) {
954 if (!port)
955 phy->phy_attached = 1;
956 return tmp;
957 }
958
959 if (port) {
960 if (phy->phy_type & PORT_TYPE_SAS) {
961 port->wide_port_phymap &= ~(1U << i);
962 if (!port->wide_port_phymap)
963 port->port_attached = 0;
964 mvs_update_wideport(mvi, i);
965 } else if (phy->phy_type & PORT_TYPE_SATA)
966 port->port_attached = 0;
967 phy->port = NULL;
968 phy->phy_attached = 0;
969 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA);
970 }
971 return 0;
972 }
973
974 static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf)
975 {
976 u32 *s = (u32 *) buf;
977
978 if (!s)
979 return NULL;
980
981 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3);
982 s[3] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
983
984 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2);
985 s[2] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
986
987 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1);
988 s[1] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
989
990 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0);
991 s[0] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
992
993 if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01))
994 s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10);
995
996 return s;
997 }
998
999 static u32 mvs_is_sig_fis_received(u32 irq_status)
1000 {
1001 return irq_status & PHYEV_SIG_FIS;
1002 }
1003
1004 static void mvs_sig_remove_timer(struct mvs_phy *phy)
1005 {
1006 if (phy->timer.function)
1007 del_timer(&phy->timer);
1008 phy->timer.function = NULL;
1009 }
1010
1011 void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st)
1012 {
1013 struct mvs_phy *phy = &mvi->phy[i];
1014 struct sas_identify_frame *id;
1015
1016 id = (struct sas_identify_frame *)phy->frame_rcvd;
1017
1018 if (get_st) {
1019 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i);
1020 phy->phy_status = mvs_is_phy_ready(mvi, i);
1021 }
1022
1023 if (phy->phy_status) {
1024 int oob_done = 0;
1025 struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy;
1026
1027 oob_done = MVS_CHIP_DISP->oob_done(mvi, i);
1028
1029 MVS_CHIP_DISP->fix_phy_info(mvi, i, id);
1030 if (phy->phy_type & PORT_TYPE_SATA) {
1031 phy->identify.target_port_protocols = SAS_PROTOCOL_STP;
1032 if (mvs_is_sig_fis_received(phy->irq_status)) {
1033 mvs_sig_remove_timer(phy);
1034 phy->phy_attached = 1;
1035 phy->att_dev_sas_addr =
1036 i + mvi->id * mvi->chip->n_phy;
1037 if (oob_done)
1038 sas_phy->oob_mode = SATA_OOB_MODE;
1039 phy->frame_rcvd_size =
1040 sizeof(struct dev_to_host_fis);
1041 mvs_get_d2h_reg(mvi, i, id);
1042 } else {
1043 u32 tmp;
1044 dev_printk(KERN_DEBUG, mvi->dev,
1045 "Phy%d : No sig fis\n", i);
1046 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i);
1047 MVS_CHIP_DISP->write_port_irq_mask(mvi, i,
1048 tmp | PHYEV_SIG_FIS);
1049 phy->phy_attached = 0;
1050 phy->phy_type &= ~PORT_TYPE_SATA;
1051 goto out_done;
1052 }
1053 } else if (phy->phy_type & PORT_TYPE_SAS
1054 || phy->att_dev_info & PORT_SSP_INIT_MASK) {
1055 phy->phy_attached = 1;
1056 phy->identify.device_type =
1057 phy->att_dev_info & PORT_DEV_TYPE_MASK;
1058
1059 if (phy->identify.device_type == SAS_END_DEVICE)
1060 phy->identify.target_port_protocols =
1061 SAS_PROTOCOL_SSP;
1062 else if (phy->identify.device_type != SAS_PHY_UNUSED)
1063 phy->identify.target_port_protocols =
1064 SAS_PROTOCOL_SMP;
1065 if (oob_done)
1066 sas_phy->oob_mode = SAS_OOB_MODE;
1067 phy->frame_rcvd_size =
1068 sizeof(struct sas_identify_frame);
1069 }
1070 memcpy(sas_phy->attached_sas_addr,
1071 &phy->att_dev_sas_addr, SAS_ADDR_SIZE);
1072
1073 if (MVS_CHIP_DISP->phy_work_around)
1074 MVS_CHIP_DISP->phy_work_around(mvi, i);
1075 }
1076 mv_dprintk("phy %d attach dev info is %x\n",
1077 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info);
1078 mv_dprintk("phy %d attach sas addr is %llx\n",
1079 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr);
1080 out_done:
1081 if (get_st)
1082 MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status);
1083 }
1084
1085 static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock)
1086 {
1087 struct sas_ha_struct *sas_ha = sas_phy->ha;
1088 struct mvs_info *mvi = NULL; int i = 0, hi;
1089 struct mvs_phy *phy = sas_phy->lldd_phy;
1090 struct asd_sas_port *sas_port = sas_phy->port;
1091 struct mvs_port *port;
1092 unsigned long flags = 0;
1093 if (!sas_port)
1094 return;
1095
1096 while (sas_ha->sas_phy[i]) {
1097 if (sas_ha->sas_phy[i] == sas_phy)
1098 break;
1099 i++;
1100 }
1101 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy;
1102 mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi];
1103 if (i >= mvi->chip->n_phy)
1104 port = &mvi->port[i - mvi->chip->n_phy];
1105 else
1106 port = &mvi->port[i];
1107 if (lock)
1108 spin_lock_irqsave(&mvi->lock, flags);
1109 port->port_attached = 1;
1110 phy->port = port;
1111 sas_port->lldd_port = port;
1112 if (phy->phy_type & PORT_TYPE_SAS) {
1113 port->wide_port_phymap = sas_port->phy_mask;
1114 mv_printk("set wide port phy map %x\n", sas_port->phy_mask);
1115 mvs_update_wideport(mvi, sas_phy->id);
1116
1117 /* direct attached SAS device */
1118 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
1119 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
1120 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x04);
1121 }
1122 }
1123 if (lock)
1124 spin_unlock_irqrestore(&mvi->lock, flags);
1125 }
1126
1127 static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock)
1128 {
1129 struct domain_device *dev;
1130 struct mvs_phy *phy = sas_phy->lldd_phy;
1131 struct mvs_info *mvi = phy->mvi;
1132 struct asd_sas_port *port = sas_phy->port;
1133 int phy_no = 0;
1134
1135 while (phy != &mvi->phy[phy_no]) {
1136 phy_no++;
1137 if (phy_no >= MVS_MAX_PHYS)
1138 return;
1139 }
1140 list_for_each_entry(dev, &port->dev_list, dev_list_node)
1141 mvs_do_release_task(phy->mvi, phy_no, dev);
1142
1143 }
1144
1145
1146 void mvs_port_formed(struct asd_sas_phy *sas_phy)
1147 {
1148 mvs_port_notify_formed(sas_phy, 1);
1149 }
1150
1151 void mvs_port_deformed(struct asd_sas_phy *sas_phy)
1152 {
1153 mvs_port_notify_deformed(sas_phy, 1);
1154 }
1155
1156 struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi)
1157 {
1158 u32 dev;
1159 for (dev = 0; dev < MVS_MAX_DEVICES; dev++) {
1160 if (mvi->devices[dev].dev_type == SAS_PHY_UNUSED) {
1161 mvi->devices[dev].device_id = dev;
1162 return &mvi->devices[dev];
1163 }
1164 }
1165
1166 if (dev == MVS_MAX_DEVICES)
1167 mv_printk("max support %d devices, ignore ..\n",
1168 MVS_MAX_DEVICES);
1169
1170 return NULL;
1171 }
1172
1173 void mvs_free_dev(struct mvs_device *mvi_dev)
1174 {
1175 u32 id = mvi_dev->device_id;
1176 memset(mvi_dev, 0, sizeof(*mvi_dev));
1177 mvi_dev->device_id = id;
1178 mvi_dev->dev_type = SAS_PHY_UNUSED;
1179 mvi_dev->dev_status = MVS_DEV_NORMAL;
1180 mvi_dev->taskfileset = MVS_ID_NOT_MAPPED;
1181 }
1182
1183 int mvs_dev_found_notify(struct domain_device *dev, int lock)
1184 {
1185 unsigned long flags = 0;
1186 int res = 0;
1187 struct mvs_info *mvi = NULL;
1188 struct domain_device *parent_dev = dev->parent;
1189 struct mvs_device *mvi_device;
1190
1191 mvi = mvs_find_dev_mvi(dev);
1192
1193 if (lock)
1194 spin_lock_irqsave(&mvi->lock, flags);
1195
1196 mvi_device = mvs_alloc_dev(mvi);
1197 if (!mvi_device) {
1198 res = -1;
1199 goto found_out;
1200 }
1201 dev->lldd_dev = mvi_device;
1202 mvi_device->dev_status = MVS_DEV_NORMAL;
1203 mvi_device->dev_type = dev->dev_type;
1204 mvi_device->mvi_info = mvi;
1205 mvi_device->sas_device = dev;
1206 if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) {
1207 int phy_id;
1208 u8 phy_num = parent_dev->ex_dev.num_phys;
1209 struct ex_phy *phy;
1210 for (phy_id = 0; phy_id < phy_num; phy_id++) {
1211 phy = &parent_dev->ex_dev.ex_phy[phy_id];
1212 if (SAS_ADDR(phy->attached_sas_addr) ==
1213 SAS_ADDR(dev->sas_addr)) {
1214 mvi_device->attached_phy = phy_id;
1215 break;
1216 }
1217 }
1218
1219 if (phy_id == phy_num) {
1220 mv_printk("Error: no attached dev:%016llx"
1221 "at ex:%016llx.\n",
1222 SAS_ADDR(dev->sas_addr),
1223 SAS_ADDR(parent_dev->sas_addr));
1224 res = -1;
1225 }
1226 }
1227
1228 found_out:
1229 if (lock)
1230 spin_unlock_irqrestore(&mvi->lock, flags);
1231 return res;
1232 }
1233
1234 int mvs_dev_found(struct domain_device *dev)
1235 {
1236 return mvs_dev_found_notify(dev, 1);
1237 }
1238
1239 void mvs_dev_gone_notify(struct domain_device *dev)
1240 {
1241 unsigned long flags = 0;
1242 struct mvs_device *mvi_dev = dev->lldd_dev;
1243 struct mvs_info *mvi;
1244
1245 if (!mvi_dev) {
1246 mv_dprintk("found dev has gone.\n");
1247 return;
1248 }
1249
1250 mvi = mvi_dev->mvi_info;
1251
1252 spin_lock_irqsave(&mvi->lock, flags);
1253
1254 mv_dprintk("found dev[%d:%x] is gone.\n",
1255 mvi_dev->device_id, mvi_dev->dev_type);
1256 mvs_release_task(mvi, dev);
1257 mvs_free_reg_set(mvi, mvi_dev);
1258 mvs_free_dev(mvi_dev);
1259
1260 dev->lldd_dev = NULL;
1261 mvi_dev->sas_device = NULL;
1262
1263 spin_unlock_irqrestore(&mvi->lock, flags);
1264 }
1265
1266
1267 void mvs_dev_gone(struct domain_device *dev)
1268 {
1269 mvs_dev_gone_notify(dev);
1270 }
1271
1272 static void mvs_task_done(struct sas_task *task)
1273 {
1274 if (!del_timer(&task->slow_task->timer))
1275 return;
1276 complete(&task->slow_task->completion);
1277 }
1278
1279 static void mvs_tmf_timedout(unsigned long data)
1280 {
1281 struct sas_task *task = (struct sas_task *)data;
1282
1283 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1284 complete(&task->slow_task->completion);
1285 }
1286
1287 #define MVS_TASK_TIMEOUT 20
1288 static int mvs_exec_internal_tmf_task(struct domain_device *dev,
1289 void *parameter, u32 para_len, struct mvs_tmf_task *tmf)
1290 {
1291 int res, retry;
1292 struct sas_task *task = NULL;
1293
1294 for (retry = 0; retry < 3; retry++) {
1295 task = sas_alloc_slow_task(GFP_KERNEL);
1296 if (!task)
1297 return -ENOMEM;
1298
1299 task->dev = dev;
1300 task->task_proto = dev->tproto;
1301
1302 memcpy(&task->ssp_task, parameter, para_len);
1303 task->task_done = mvs_task_done;
1304
1305 task->slow_task->timer.data = (unsigned long) task;
1306 task->slow_task->timer.function = mvs_tmf_timedout;
1307 task->slow_task->timer.expires = jiffies + MVS_TASK_TIMEOUT*HZ;
1308 add_timer(&task->slow_task->timer);
1309
1310 res = mvs_task_exec(task, GFP_KERNEL, NULL, 1, tmf);
1311
1312 if (res) {
1313 del_timer(&task->slow_task->timer);
1314 mv_printk("executing internal task failed:%d\n", res);
1315 goto ex_err;
1316 }
1317
1318 wait_for_completion(&task->slow_task->completion);
1319 res = TMF_RESP_FUNC_FAILED;
1320 /* Even TMF timed out, return direct. */
1321 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1322 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
1323 mv_printk("TMF task[%x] timeout.\n", tmf->tmf);
1324 goto ex_err;
1325 }
1326 }
1327
1328 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1329 task->task_status.stat == SAM_STAT_GOOD) {
1330 res = TMF_RESP_FUNC_COMPLETE;
1331 break;
1332 }
1333
1334 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1335 task->task_status.stat == SAS_DATA_UNDERRUN) {
1336 /* no error, but return the number of bytes of
1337 * underrun */
1338 res = task->task_status.residual;
1339 break;
1340 }
1341
1342 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1343 task->task_status.stat == SAS_DATA_OVERRUN) {
1344 mv_dprintk("blocked task error.\n");
1345 res = -EMSGSIZE;
1346 break;
1347 } else {
1348 mv_dprintk(" task to dev %016llx response: 0x%x "
1349 "status 0x%x\n",
1350 SAS_ADDR(dev->sas_addr),
1351 task->task_status.resp,
1352 task->task_status.stat);
1353 sas_free_task(task);
1354 task = NULL;
1355
1356 }
1357 }
1358 ex_err:
1359 BUG_ON(retry == 3 && task != NULL);
1360 sas_free_task(task);
1361 return res;
1362 }
1363
1364 static int mvs_debug_issue_ssp_tmf(struct domain_device *dev,
1365 u8 *lun, struct mvs_tmf_task *tmf)
1366 {
1367 struct sas_ssp_task ssp_task;
1368 if (!(dev->tproto & SAS_PROTOCOL_SSP))
1369 return TMF_RESP_FUNC_ESUPP;
1370
1371 memcpy(ssp_task.LUN, lun, 8);
1372
1373 return mvs_exec_internal_tmf_task(dev, &ssp_task,
1374 sizeof(ssp_task), tmf);
1375 }
1376
1377
1378 /* Standard mandates link reset for ATA (type 0)
1379 and hard reset for SSP (type 1) , only for RECOVERY */
1380 static int mvs_debug_I_T_nexus_reset(struct domain_device *dev)
1381 {
1382 int rc;
1383 struct sas_phy *phy = sas_get_local_phy(dev);
1384 int reset_type = (dev->dev_type == SAS_SATA_DEV ||
1385 (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
1386 rc = sas_phy_reset(phy, reset_type);
1387 sas_put_local_phy(phy);
1388 msleep(2000);
1389 return rc;
1390 }
1391
1392 /* mandatory SAM-3 */
1393 int mvs_lu_reset(struct domain_device *dev, u8 *lun)
1394 {
1395 unsigned long flags;
1396 int rc = TMF_RESP_FUNC_FAILED;
1397 struct mvs_tmf_task tmf_task;
1398 struct mvs_device * mvi_dev = dev->lldd_dev;
1399 struct mvs_info *mvi = mvi_dev->mvi_info;
1400
1401 tmf_task.tmf = TMF_LU_RESET;
1402 mvi_dev->dev_status = MVS_DEV_EH;
1403 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1404 if (rc == TMF_RESP_FUNC_COMPLETE) {
1405 spin_lock_irqsave(&mvi->lock, flags);
1406 mvs_release_task(mvi, dev);
1407 spin_unlock_irqrestore(&mvi->lock, flags);
1408 }
1409 /* If failed, fall-through I_T_Nexus reset */
1410 mv_printk("%s for device[%x]:rc= %d\n", __func__,
1411 mvi_dev->device_id, rc);
1412 return rc;
1413 }
1414
1415 int mvs_I_T_nexus_reset(struct domain_device *dev)
1416 {
1417 unsigned long flags;
1418 int rc = TMF_RESP_FUNC_FAILED;
1419 struct mvs_device * mvi_dev = (struct mvs_device *)dev->lldd_dev;
1420 struct mvs_info *mvi = mvi_dev->mvi_info;
1421
1422 if (mvi_dev->dev_status != MVS_DEV_EH)
1423 return TMF_RESP_FUNC_COMPLETE;
1424 else
1425 mvi_dev->dev_status = MVS_DEV_NORMAL;
1426 rc = mvs_debug_I_T_nexus_reset(dev);
1427 mv_printk("%s for device[%x]:rc= %d\n",
1428 __func__, mvi_dev->device_id, rc);
1429
1430 spin_lock_irqsave(&mvi->lock, flags);
1431 mvs_release_task(mvi, dev);
1432 spin_unlock_irqrestore(&mvi->lock, flags);
1433
1434 return rc;
1435 }
1436 /* optional SAM-3 */
1437 int mvs_query_task(struct sas_task *task)
1438 {
1439 u32 tag;
1440 struct scsi_lun lun;
1441 struct mvs_tmf_task tmf_task;
1442 int rc = TMF_RESP_FUNC_FAILED;
1443
1444 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1445 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1446 struct domain_device *dev = task->dev;
1447 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1448 struct mvs_info *mvi = mvi_dev->mvi_info;
1449
1450 int_to_scsilun(cmnd->device->lun, &lun);
1451 rc = mvs_find_tag(mvi, task, &tag);
1452 if (rc == 0) {
1453 rc = TMF_RESP_FUNC_FAILED;
1454 return rc;
1455 }
1456
1457 tmf_task.tmf = TMF_QUERY_TASK;
1458 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1459
1460 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1461 switch (rc) {
1462 /* The task is still in Lun, release it then */
1463 case TMF_RESP_FUNC_SUCC:
1464 /* The task is not in Lun or failed, reset the phy */
1465 case TMF_RESP_FUNC_FAILED:
1466 case TMF_RESP_FUNC_COMPLETE:
1467 break;
1468 }
1469 }
1470 mv_printk("%s:rc= %d\n", __func__, rc);
1471 return rc;
1472 }
1473
1474 /* mandatory SAM-3, still need free task/slot info */
1475 int mvs_abort_task(struct sas_task *task)
1476 {
1477 struct scsi_lun lun;
1478 struct mvs_tmf_task tmf_task;
1479 struct domain_device *dev = task->dev;
1480 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1481 struct mvs_info *mvi;
1482 int rc = TMF_RESP_FUNC_FAILED;
1483 unsigned long flags;
1484 u32 tag;
1485
1486 if (!mvi_dev) {
1487 mv_printk("Device has removed\n");
1488 return TMF_RESP_FUNC_FAILED;
1489 }
1490
1491 mvi = mvi_dev->mvi_info;
1492
1493 spin_lock_irqsave(&task->task_state_lock, flags);
1494 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
1495 spin_unlock_irqrestore(&task->task_state_lock, flags);
1496 rc = TMF_RESP_FUNC_COMPLETE;
1497 goto out;
1498 }
1499 spin_unlock_irqrestore(&task->task_state_lock, flags);
1500 mvi_dev->dev_status = MVS_DEV_EH;
1501 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1502 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1503
1504 int_to_scsilun(cmnd->device->lun, &lun);
1505 rc = mvs_find_tag(mvi, task, &tag);
1506 if (rc == 0) {
1507 mv_printk("No such tag in %s\n", __func__);
1508 rc = TMF_RESP_FUNC_FAILED;
1509 return rc;
1510 }
1511
1512 tmf_task.tmf = TMF_ABORT_TASK;
1513 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1514
1515 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1516
1517 /* if successful, clear the task and callback forwards.*/
1518 if (rc == TMF_RESP_FUNC_COMPLETE) {
1519 u32 slot_no;
1520 struct mvs_slot_info *slot;
1521
1522 if (task->lldd_task) {
1523 slot = task->lldd_task;
1524 slot_no = (u32) (slot - mvi->slot_info);
1525 spin_lock_irqsave(&mvi->lock, flags);
1526 mvs_slot_complete(mvi, slot_no, 1);
1527 spin_unlock_irqrestore(&mvi->lock, flags);
1528 }
1529 }
1530
1531 } else if (task->task_proto & SAS_PROTOCOL_SATA ||
1532 task->task_proto & SAS_PROTOCOL_STP) {
1533 if (SAS_SATA_DEV == dev->dev_type) {
1534 struct mvs_slot_info *slot = task->lldd_task;
1535 u32 slot_idx = (u32)(slot - mvi->slot_info);
1536 mv_dprintk("mvs_abort_task() mvi=%p task=%p "
1537 "slot=%p slot_idx=x%x\n",
1538 mvi, task, slot, slot_idx);
1539 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1540 mvs_slot_task_free(mvi, task, slot, slot_idx);
1541 rc = TMF_RESP_FUNC_COMPLETE;
1542 goto out;
1543 }
1544
1545 }
1546 out:
1547 if (rc != TMF_RESP_FUNC_COMPLETE)
1548 mv_printk("%s:rc= %d\n", __func__, rc);
1549 return rc;
1550 }
1551
1552 int mvs_abort_task_set(struct domain_device *dev, u8 *lun)
1553 {
1554 int rc = TMF_RESP_FUNC_FAILED;
1555 struct mvs_tmf_task tmf_task;
1556
1557 tmf_task.tmf = TMF_ABORT_TASK_SET;
1558 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1559
1560 return rc;
1561 }
1562
1563 int mvs_clear_aca(struct domain_device *dev, u8 *lun)
1564 {
1565 int rc = TMF_RESP_FUNC_FAILED;
1566 struct mvs_tmf_task tmf_task;
1567
1568 tmf_task.tmf = TMF_CLEAR_ACA;
1569 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1570
1571 return rc;
1572 }
1573
1574 int mvs_clear_task_set(struct domain_device *dev, u8 *lun)
1575 {
1576 int rc = TMF_RESP_FUNC_FAILED;
1577 struct mvs_tmf_task tmf_task;
1578
1579 tmf_task.tmf = TMF_CLEAR_TASK_SET;
1580 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1581
1582 return rc;
1583 }
1584
1585 static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task,
1586 u32 slot_idx, int err)
1587 {
1588 struct mvs_device *mvi_dev = task->dev->lldd_dev;
1589 struct task_status_struct *tstat = &task->task_status;
1590 struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf;
1591 int stat = SAM_STAT_GOOD;
1592
1593
1594 resp->frame_len = sizeof(struct dev_to_host_fis);
1595 memcpy(&resp->ending_fis[0],
1596 SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset),
1597 sizeof(struct dev_to_host_fis));
1598 tstat->buf_valid_size = sizeof(*resp);
1599 if (unlikely(err)) {
1600 if (unlikely(err & CMD_ISS_STPD))
1601 stat = SAS_OPEN_REJECT;
1602 else
1603 stat = SAS_PROTO_RESPONSE;
1604 }
1605
1606 return stat;
1607 }
1608
1609 void mvs_set_sense(u8 *buffer, int len, int d_sense,
1610 int key, int asc, int ascq)
1611 {
1612 memset(buffer, 0, len);
1613
1614 if (d_sense) {
1615 /* Descriptor format */
1616 if (len < 4) {
1617 mv_printk("Length %d of sense buffer too small to "
1618 "fit sense %x:%x:%x", len, key, asc, ascq);
1619 }
1620
1621 buffer[0] = 0x72; /* Response Code */
1622 if (len > 1)
1623 buffer[1] = key; /* Sense Key */
1624 if (len > 2)
1625 buffer[2] = asc; /* ASC */
1626 if (len > 3)
1627 buffer[3] = ascq; /* ASCQ */
1628 } else {
1629 if (len < 14) {
1630 mv_printk("Length %d of sense buffer too small to "
1631 "fit sense %x:%x:%x", len, key, asc, ascq);
1632 }
1633
1634 buffer[0] = 0x70; /* Response Code */
1635 if (len > 2)
1636 buffer[2] = key; /* Sense Key */
1637 if (len > 7)
1638 buffer[7] = 0x0a; /* Additional Sense Length */
1639 if (len > 12)
1640 buffer[12] = asc; /* ASC */
1641 if (len > 13)
1642 buffer[13] = ascq; /* ASCQ */
1643 }
1644
1645 return;
1646 }
1647
1648 void mvs_fill_ssp_resp_iu(struct ssp_response_iu *iu,
1649 u8 key, u8 asc, u8 asc_q)
1650 {
1651 iu->datapres = 2;
1652 iu->response_data_len = 0;
1653 iu->sense_data_len = 17;
1654 iu->status = 02;
1655 mvs_set_sense(iu->sense_data, 17, 0,
1656 key, asc, asc_q);
1657 }
1658
1659 static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task,
1660 u32 slot_idx)
1661 {
1662 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1663 int stat;
1664 u32 err_dw0 = le32_to_cpu(*(u32 *)slot->response);
1665 u32 err_dw1 = le32_to_cpu(*((u32 *)slot->response + 1));
1666 u32 tfs = 0;
1667 enum mvs_port_type type = PORT_TYPE_SAS;
1668
1669 if (err_dw0 & CMD_ISS_STPD)
1670 MVS_CHIP_DISP->issue_stop(mvi, type, tfs);
1671
1672 MVS_CHIP_DISP->command_active(mvi, slot_idx);
1673
1674 stat = SAM_STAT_CHECK_CONDITION;
1675 switch (task->task_proto) {
1676 case SAS_PROTOCOL_SSP:
1677 {
1678 stat = SAS_ABORTED_TASK;
1679 if ((err_dw0 & NO_DEST) || err_dw1 & bit(31)) {
1680 struct ssp_response_iu *iu = slot->response +
1681 sizeof(struct mvs_err_info);
1682 mvs_fill_ssp_resp_iu(iu, NOT_READY, 0x04, 01);
1683 sas_ssp_task_response(mvi->dev, task, iu);
1684 stat = SAM_STAT_CHECK_CONDITION;
1685 }
1686 if (err_dw1 & bit(31))
1687 mv_printk("reuse same slot, retry command.\n");
1688 break;
1689 }
1690 case SAS_PROTOCOL_SMP:
1691 stat = SAM_STAT_CHECK_CONDITION;
1692 break;
1693
1694 case SAS_PROTOCOL_SATA:
1695 case SAS_PROTOCOL_STP:
1696 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
1697 {
1698 task->ata_task.use_ncq = 0;
1699 stat = SAS_PROTO_RESPONSE;
1700 mvs_sata_done(mvi, task, slot_idx, err_dw0);
1701 }
1702 break;
1703 default:
1704 break;
1705 }
1706
1707 return stat;
1708 }
1709
1710 int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags)
1711 {
1712 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
1713 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1714 struct sas_task *task = slot->task;
1715 struct mvs_device *mvi_dev = NULL;
1716 struct task_status_struct *tstat;
1717 struct domain_device *dev;
1718 u32 aborted;
1719
1720 void *to;
1721 enum exec_status sts;
1722
1723 if (unlikely(!task || !task->lldd_task || !task->dev))
1724 return -1;
1725
1726 tstat = &task->task_status;
1727 dev = task->dev;
1728 mvi_dev = dev->lldd_dev;
1729
1730 spin_lock(&task->task_state_lock);
1731 task->task_state_flags &=
1732 ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR);
1733 task->task_state_flags |= SAS_TASK_STATE_DONE;
1734 /* race condition*/
1735 aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED;
1736 spin_unlock(&task->task_state_lock);
1737
1738 memset(tstat, 0, sizeof(*tstat));
1739 tstat->resp = SAS_TASK_COMPLETE;
1740
1741 if (unlikely(aborted)) {
1742 tstat->stat = SAS_ABORTED_TASK;
1743 if (mvi_dev && mvi_dev->running_req)
1744 mvi_dev->running_req--;
1745 if (sas_protocol_ata(task->task_proto))
1746 mvs_free_reg_set(mvi, mvi_dev);
1747
1748 mvs_slot_task_free(mvi, task, slot, slot_idx);
1749 return -1;
1750 }
1751
1752 /* when no device attaching, go ahead and complete by error handling*/
1753 if (unlikely(!mvi_dev || flags)) {
1754 if (!mvi_dev)
1755 mv_dprintk("port has not device.\n");
1756 tstat->stat = SAS_PHY_DOWN;
1757 goto out;
1758 }
1759
1760 /*
1761 * error info record present; slot->response is 32 bit aligned but may
1762 * not be 64 bit aligned, so check for zero in two 32 bit reads
1763 */
1764 if (unlikely((rx_desc & RXQ_ERR)
1765 && (*((u32 *)slot->response)
1766 || *(((u32 *)slot->response) + 1)))) {
1767 mv_dprintk("port %d slot %d rx_desc %X has error info"
1768 "%016llX.\n", slot->port->sas_port.id, slot_idx,
1769 rx_desc, get_unaligned_le64(slot->response));
1770 tstat->stat = mvs_slot_err(mvi, task, slot_idx);
1771 tstat->resp = SAS_TASK_COMPLETE;
1772 goto out;
1773 }
1774
1775 switch (task->task_proto) {
1776 case SAS_PROTOCOL_SSP:
1777 /* hw says status == 0, datapres == 0 */
1778 if (rx_desc & RXQ_GOOD) {
1779 tstat->stat = SAM_STAT_GOOD;
1780 tstat->resp = SAS_TASK_COMPLETE;
1781 }
1782 /* response frame present */
1783 else if (rx_desc & RXQ_RSP) {
1784 struct ssp_response_iu *iu = slot->response +
1785 sizeof(struct mvs_err_info);
1786 sas_ssp_task_response(mvi->dev, task, iu);
1787 } else
1788 tstat->stat = SAM_STAT_CHECK_CONDITION;
1789 break;
1790
1791 case SAS_PROTOCOL_SMP: {
1792 struct scatterlist *sg_resp = &task->smp_task.smp_resp;
1793 tstat->stat = SAM_STAT_GOOD;
1794 to = kmap_atomic(sg_page(sg_resp));
1795 memcpy(to + sg_resp->offset,
1796 slot->response + sizeof(struct mvs_err_info),
1797 sg_dma_len(sg_resp));
1798 kunmap_atomic(to);
1799 break;
1800 }
1801
1802 case SAS_PROTOCOL_SATA:
1803 case SAS_PROTOCOL_STP:
1804 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: {
1805 tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0);
1806 break;
1807 }
1808
1809 default:
1810 tstat->stat = SAM_STAT_CHECK_CONDITION;
1811 break;
1812 }
1813 if (!slot->port->port_attached) {
1814 mv_dprintk("port %d has removed.\n", slot->port->sas_port.id);
1815 tstat->stat = SAS_PHY_DOWN;
1816 }
1817
1818
1819 out:
1820 if (mvi_dev && mvi_dev->running_req) {
1821 mvi_dev->running_req--;
1822 if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req)
1823 mvs_free_reg_set(mvi, mvi_dev);
1824 }
1825 mvs_slot_task_free(mvi, task, slot, slot_idx);
1826 sts = tstat->stat;
1827
1828 spin_unlock(&mvi->lock);
1829 if (task->task_done)
1830 task->task_done(task);
1831
1832 spin_lock(&mvi->lock);
1833
1834 return sts;
1835 }
1836
1837 void mvs_do_release_task(struct mvs_info *mvi,
1838 int phy_no, struct domain_device *dev)
1839 {
1840 u32 slot_idx;
1841 struct mvs_phy *phy;
1842 struct mvs_port *port;
1843 struct mvs_slot_info *slot, *slot2;
1844
1845 phy = &mvi->phy[phy_no];
1846 port = phy->port;
1847 if (!port)
1848 return;
1849 /* clean cmpl queue in case request is already finished */
1850 mvs_int_rx(mvi, false);
1851
1852
1853
1854 list_for_each_entry_safe(slot, slot2, &port->list, entry) {
1855 struct sas_task *task;
1856 slot_idx = (u32) (slot - mvi->slot_info);
1857 task = slot->task;
1858
1859 if (dev && task->dev != dev)
1860 continue;
1861
1862 mv_printk("Release slot [%x] tag[%x], task [%p]:\n",
1863 slot_idx, slot->slot_tag, task);
1864 MVS_CHIP_DISP->command_active(mvi, slot_idx);
1865
1866 mvs_slot_complete(mvi, slot_idx, 1);
1867 }
1868 }
1869
1870 void mvs_release_task(struct mvs_info *mvi,
1871 struct domain_device *dev)
1872 {
1873 int i, phyno[WIDE_PORT_MAX_PHY], num;
1874 num = mvs_find_dev_phyno(dev, phyno);
1875 for (i = 0; i < num; i++)
1876 mvs_do_release_task(mvi, phyno[i], dev);
1877 }
1878
1879 static void mvs_phy_disconnected(struct mvs_phy *phy)
1880 {
1881 phy->phy_attached = 0;
1882 phy->att_dev_info = 0;
1883 phy->att_dev_sas_addr = 0;
1884 }
1885
1886 static void mvs_work_queue(struct work_struct *work)
1887 {
1888 struct delayed_work *dw = container_of(work, struct delayed_work, work);
1889 struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q);
1890 struct mvs_info *mvi = mwq->mvi;
1891 unsigned long flags;
1892 u32 phy_no = (unsigned long) mwq->data;
1893 struct sas_ha_struct *sas_ha = mvi->sas;
1894 struct mvs_phy *phy = &mvi->phy[phy_no];
1895 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1896
1897 spin_lock_irqsave(&mvi->lock, flags);
1898 if (mwq->handler & PHY_PLUG_EVENT) {
1899
1900 if (phy->phy_event & PHY_PLUG_OUT) {
1901 u32 tmp;
1902 struct sas_identify_frame *id;
1903 id = (struct sas_identify_frame *)phy->frame_rcvd;
1904 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no);
1905 phy->phy_event &= ~PHY_PLUG_OUT;
1906 if (!(tmp & PHY_READY_MASK)) {
1907 sas_phy_disconnected(sas_phy);
1908 mvs_phy_disconnected(phy);
1909 sas_ha->notify_phy_event(sas_phy,
1910 PHYE_LOSS_OF_SIGNAL);
1911 mv_dprintk("phy%d Removed Device\n", phy_no);
1912 } else {
1913 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
1914 mvs_update_phyinfo(mvi, phy_no, 1);
1915 mvs_bytes_dmaed(mvi, phy_no);
1916 mvs_port_notify_formed(sas_phy, 0);
1917 mv_dprintk("phy%d Attached Device\n", phy_no);
1918 }
1919 }
1920 } else if (mwq->handler & EXP_BRCT_CHG) {
1921 phy->phy_event &= ~EXP_BRCT_CHG;
1922 sas_ha->notify_port_event(sas_phy,
1923 PORTE_BROADCAST_RCVD);
1924 mv_dprintk("phy%d Got Broadcast Change\n", phy_no);
1925 }
1926 list_del(&mwq->entry);
1927 spin_unlock_irqrestore(&mvi->lock, flags);
1928 kfree(mwq);
1929 }
1930
1931 static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler)
1932 {
1933 struct mvs_wq *mwq;
1934 int ret = 0;
1935
1936 mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC);
1937 if (mwq) {
1938 mwq->mvi = mvi;
1939 mwq->data = data;
1940 mwq->handler = handler;
1941 MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq);
1942 list_add_tail(&mwq->entry, &mvi->wq_list);
1943 schedule_delayed_work(&mwq->work_q, HZ * 2);
1944 } else
1945 ret = -ENOMEM;
1946
1947 return ret;
1948 }
1949
1950 static void mvs_sig_time_out(unsigned long tphy)
1951 {
1952 struct mvs_phy *phy = (struct mvs_phy *)tphy;
1953 struct mvs_info *mvi = phy->mvi;
1954 u8 phy_no;
1955
1956 for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) {
1957 if (&mvi->phy[phy_no] == phy) {
1958 mv_dprintk("Get signature time out, reset phy %d\n",
1959 phy_no+mvi->id*mvi->chip->n_phy);
1960 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET);
1961 }
1962 }
1963 }
1964
1965 void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events)
1966 {
1967 u32 tmp;
1968 struct mvs_phy *phy = &mvi->phy[phy_no];
1969
1970 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no);
1971 MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status);
1972 mv_dprintk("phy %d ctrl sts=0x%08X.\n", phy_no+mvi->id*mvi->chip->n_phy,
1973 MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no));
1974 mv_dprintk("phy %d irq sts = 0x%08X\n", phy_no+mvi->id*mvi->chip->n_phy,
1975 phy->irq_status);
1976
1977 /*
1978 * events is port event now ,
1979 * we need check the interrupt status which belongs to per port.
1980 */
1981
1982 if (phy->irq_status & PHYEV_DCDR_ERR) {
1983 mv_dprintk("phy %d STP decoding error.\n",
1984 phy_no + mvi->id*mvi->chip->n_phy);
1985 }
1986
1987 if (phy->irq_status & PHYEV_POOF) {
1988 mdelay(500);
1989 if (!(phy->phy_event & PHY_PLUG_OUT)) {
1990 int dev_sata = phy->phy_type & PORT_TYPE_SATA;
1991 int ready;
1992 mvs_do_release_task(mvi, phy_no, NULL);
1993 phy->phy_event |= PHY_PLUG_OUT;
1994 MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1);
1995 mvs_handle_event(mvi,
1996 (void *)(unsigned long)phy_no,
1997 PHY_PLUG_EVENT);
1998 ready = mvs_is_phy_ready(mvi, phy_no);
1999 if (ready || dev_sata) {
2000 if (MVS_CHIP_DISP->stp_reset)
2001 MVS_CHIP_DISP->stp_reset(mvi,
2002 phy_no);
2003 else
2004 MVS_CHIP_DISP->phy_reset(mvi,
2005 phy_no, MVS_SOFT_RESET);
2006 return;
2007 }
2008 }
2009 }
2010
2011 if (phy->irq_status & PHYEV_COMWAKE) {
2012 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no);
2013 MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no,
2014 tmp | PHYEV_SIG_FIS);
2015 if (phy->timer.function == NULL) {
2016 phy->timer.data = (unsigned long)phy;
2017 phy->timer.function = mvs_sig_time_out;
2018 phy->timer.expires = jiffies + 5*HZ;
2019 add_timer(&phy->timer);
2020 }
2021 }
2022 if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) {
2023 phy->phy_status = mvs_is_phy_ready(mvi, phy_no);
2024 mv_dprintk("notify plug in on phy[%d]\n", phy_no);
2025 if (phy->phy_status) {
2026 mdelay(10);
2027 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
2028 if (phy->phy_type & PORT_TYPE_SATA) {
2029 tmp = MVS_CHIP_DISP->read_port_irq_mask(
2030 mvi, phy_no);
2031 tmp &= ~PHYEV_SIG_FIS;
2032 MVS_CHIP_DISP->write_port_irq_mask(mvi,
2033 phy_no, tmp);
2034 }
2035 mvs_update_phyinfo(mvi, phy_no, 0);
2036 if (phy->phy_type & PORT_TYPE_SAS) {
2037 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE);
2038 mdelay(10);
2039 }
2040
2041 mvs_bytes_dmaed(mvi, phy_no);
2042 /* whether driver is going to handle hot plug */
2043 if (phy->phy_event & PHY_PLUG_OUT) {
2044 mvs_port_notify_formed(&phy->sas_phy, 0);
2045 phy->phy_event &= ~PHY_PLUG_OUT;
2046 }
2047 } else {
2048 mv_dprintk("plugin interrupt but phy%d is gone\n",
2049 phy_no + mvi->id*mvi->chip->n_phy);
2050 }
2051 } else if (phy->irq_status & PHYEV_BROAD_CH) {
2052 mv_dprintk("phy %d broadcast change.\n",
2053 phy_no + mvi->id*mvi->chip->n_phy);
2054 mvs_handle_event(mvi, (void *)(unsigned long)phy_no,
2055 EXP_BRCT_CHG);
2056 }
2057 }
2058
2059 int mvs_int_rx(struct mvs_info *mvi, bool self_clear)
2060 {
2061 u32 rx_prod_idx, rx_desc;
2062 bool attn = false;
2063
2064 /* the first dword in the RX ring is special: it contains
2065 * a mirror of the hardware's RX producer index, so that
2066 * we don't have to stall the CPU reading that register.
2067 * The actual RX ring is offset by one dword, due to this.
2068 */
2069 rx_prod_idx = mvi->rx_cons;
2070 mvi->rx_cons = le32_to_cpu(mvi->rx[0]);
2071 if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */
2072 return 0;
2073
2074 /* The CMPL_Q may come late, read from register and try again
2075 * note: if coalescing is enabled,
2076 * it will need to read from register every time for sure
2077 */
2078 if (unlikely(mvi->rx_cons == rx_prod_idx))
2079 mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK;
2080
2081 if (mvi->rx_cons == rx_prod_idx)
2082 return 0;
2083
2084 while (mvi->rx_cons != rx_prod_idx) {
2085 /* increment our internal RX consumer pointer */
2086 rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1);
2087 rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]);
2088
2089 if (likely(rx_desc & RXQ_DONE))
2090 mvs_slot_complete(mvi, rx_desc, 0);
2091 if (rx_desc & RXQ_ATTN) {
2092 attn = true;
2093 } else if (rx_desc & RXQ_ERR) {
2094 if (!(rx_desc & RXQ_DONE))
2095 mvs_slot_complete(mvi, rx_desc, 0);
2096 } else if (rx_desc & RXQ_SLOT_RESET) {
2097 mvs_slot_free(mvi, rx_desc);
2098 }
2099 }
2100
2101 if (attn && self_clear)
2102 MVS_CHIP_DISP->int_full(mvi);
2103 return 0;
2104 }
2105