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Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[mirror_ubuntu-bionic-kernel.git] / drivers / scsi / mvsas / mv_sas.c
1 /*
2 * Marvell 88SE64xx/88SE94xx main function
3 *
4 * Copyright 2007 Red Hat, Inc.
5 * Copyright 2008 Marvell. <kewei@marvell.com>
6 *
7 * This file is licensed under GPLv2.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; version 2 of the
12 * License.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
22 * USA
23 */
24
25 #include "mv_sas.h"
26
27 static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag)
28 {
29 if (task->lldd_task) {
30 struct mvs_slot_info *slot;
31 slot = task->lldd_task;
32 *tag = slot->slot_tag;
33 return 1;
34 }
35 return 0;
36 }
37
38 void mvs_tag_clear(struct mvs_info *mvi, u32 tag)
39 {
40 void *bitmap = &mvi->tags;
41 clear_bit(tag, bitmap);
42 }
43
44 void mvs_tag_free(struct mvs_info *mvi, u32 tag)
45 {
46 mvs_tag_clear(mvi, tag);
47 }
48
49 void mvs_tag_set(struct mvs_info *mvi, unsigned int tag)
50 {
51 void *bitmap = &mvi->tags;
52 set_bit(tag, bitmap);
53 }
54
55 inline int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out)
56 {
57 unsigned int index, tag;
58 void *bitmap = &mvi->tags;
59
60 index = find_first_zero_bit(bitmap, mvi->tags_num);
61 tag = index;
62 if (tag >= mvi->tags_num)
63 return -SAS_QUEUE_FULL;
64 mvs_tag_set(mvi, tag);
65 *tag_out = tag;
66 return 0;
67 }
68
69 void mvs_tag_init(struct mvs_info *mvi)
70 {
71 int i;
72 for (i = 0; i < mvi->tags_num; ++i)
73 mvs_tag_clear(mvi, i);
74 }
75
76 void mvs_hexdump(u32 size, u8 *data, u32 baseaddr)
77 {
78 u32 i;
79 u32 run;
80 u32 offset;
81
82 offset = 0;
83 while (size) {
84 printk(KERN_DEBUG"%08X : ", baseaddr + offset);
85 if (size >= 16)
86 run = 16;
87 else
88 run = size;
89 size -= run;
90 for (i = 0; i < 16; i++) {
91 if (i < run)
92 printk(KERN_DEBUG"%02X ", (u32)data[i]);
93 else
94 printk(KERN_DEBUG" ");
95 }
96 printk(KERN_DEBUG": ");
97 for (i = 0; i < run; i++)
98 printk(KERN_DEBUG"%c",
99 isalnum(data[i]) ? data[i] : '.');
100 printk(KERN_DEBUG"\n");
101 data = &data[16];
102 offset += run;
103 }
104 printk(KERN_DEBUG"\n");
105 }
106
107 #if (_MV_DUMP > 1)
108 static void mvs_hba_sb_dump(struct mvs_info *mvi, u32 tag,
109 enum sas_protocol proto)
110 {
111 u32 offset;
112 struct mvs_slot_info *slot = &mvi->slot_info[tag];
113
114 offset = slot->cmd_size + MVS_OAF_SZ +
115 MVS_CHIP_DISP->prd_size() * slot->n_elem;
116 dev_printk(KERN_DEBUG, mvi->dev, "+---->Status buffer[%d] :\n",
117 tag);
118 mvs_hexdump(32, (u8 *) slot->response,
119 (u32) slot->buf_dma + offset);
120 }
121 #endif
122
123 static void mvs_hba_memory_dump(struct mvs_info *mvi, u32 tag,
124 enum sas_protocol proto)
125 {
126 #if (_MV_DUMP > 1)
127 u32 sz, w_ptr;
128 u64 addr;
129 struct mvs_slot_info *slot = &mvi->slot_info[tag];
130
131 /*Delivery Queue */
132 sz = MVS_CHIP_SLOT_SZ;
133 w_ptr = slot->tx;
134 addr = mvi->tx_dma;
135 dev_printk(KERN_DEBUG, mvi->dev,
136 "Delivery Queue Size=%04d , WRT_PTR=%04X\n", sz, w_ptr);
137 dev_printk(KERN_DEBUG, mvi->dev,
138 "Delivery Queue Base Address=0x%llX (PA)"
139 "(tx_dma=0x%llX), Entry=%04d\n",
140 addr, (unsigned long long)mvi->tx_dma, w_ptr);
141 mvs_hexdump(sizeof(u32), (u8 *)(&mvi->tx[mvi->tx_prod]),
142 (u32) mvi->tx_dma + sizeof(u32) * w_ptr);
143 /*Command List */
144 addr = mvi->slot_dma;
145 dev_printk(KERN_DEBUG, mvi->dev,
146 "Command List Base Address=0x%llX (PA)"
147 "(slot_dma=0x%llX), Header=%03d\n",
148 addr, (unsigned long long)slot->buf_dma, tag);
149 dev_printk(KERN_DEBUG, mvi->dev, "Command Header[%03d]:\n", tag);
150 /*mvs_cmd_hdr */
151 mvs_hexdump(sizeof(struct mvs_cmd_hdr), (u8 *)(&mvi->slot[tag]),
152 (u32) mvi->slot_dma + tag * sizeof(struct mvs_cmd_hdr));
153 /*1.command table area */
154 dev_printk(KERN_DEBUG, mvi->dev, "+---->Command Table :\n");
155 mvs_hexdump(slot->cmd_size, (u8 *) slot->buf, (u32) slot->buf_dma);
156 /*2.open address frame area */
157 dev_printk(KERN_DEBUG, mvi->dev, "+---->Open Address Frame :\n");
158 mvs_hexdump(MVS_OAF_SZ, (u8 *) slot->buf + slot->cmd_size,
159 (u32) slot->buf_dma + slot->cmd_size);
160 /*3.status buffer */
161 mvs_hba_sb_dump(mvi, tag, proto);
162 /*4.PRD table */
163 dev_printk(KERN_DEBUG, mvi->dev, "+---->PRD table :\n");
164 mvs_hexdump(MVS_CHIP_DISP->prd_size() * slot->n_elem,
165 (u8 *) slot->buf + slot->cmd_size + MVS_OAF_SZ,
166 (u32) slot->buf_dma + slot->cmd_size + MVS_OAF_SZ);
167 #endif
168 }
169
170 static void mvs_hba_cq_dump(struct mvs_info *mvi)
171 {
172 #if (_MV_DUMP > 2)
173 u64 addr;
174 void __iomem *regs = mvi->regs;
175 u32 entry = mvi->rx_cons + 1;
176 u32 rx_desc = le32_to_cpu(mvi->rx[entry]);
177
178 /*Completion Queue */
179 addr = mr32(RX_HI) << 16 << 16 | mr32(RX_LO);
180 dev_printk(KERN_DEBUG, mvi->dev, "Completion Task = 0x%p\n",
181 mvi->slot_info[rx_desc & RXQ_SLOT_MASK].task);
182 dev_printk(KERN_DEBUG, mvi->dev,
183 "Completion List Base Address=0x%llX (PA), "
184 "CQ_Entry=%04d, CQ_WP=0x%08X\n",
185 addr, entry - 1, mvi->rx[0]);
186 mvs_hexdump(sizeof(u32), (u8 *)(&rx_desc),
187 mvi->rx_dma + sizeof(u32) * entry);
188 #endif
189 }
190
191 void mvs_get_sas_addr(void *buf, u32 buflen)
192 {
193 /*memcpy(buf, "\x50\x05\x04\x30\x11\xab\x64\x40", 8);*/
194 }
195
196 struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev)
197 {
198 unsigned long i = 0, j = 0, hi = 0;
199 struct sas_ha_struct *sha = dev->port->ha;
200 struct mvs_info *mvi = NULL;
201 struct asd_sas_phy *phy;
202
203 while (sha->sas_port[i]) {
204 if (sha->sas_port[i] == dev->port) {
205 phy = container_of(sha->sas_port[i]->phy_list.next,
206 struct asd_sas_phy, port_phy_el);
207 j = 0;
208 while (sha->sas_phy[j]) {
209 if (sha->sas_phy[j] == phy)
210 break;
211 j++;
212 }
213 break;
214 }
215 i++;
216 }
217 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
218 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
219
220 return mvi;
221
222 }
223
224 /* FIXME */
225 int mvs_find_dev_phyno(struct domain_device *dev, int *phyno)
226 {
227 unsigned long i = 0, j = 0, n = 0, num = 0;
228 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
229 struct mvs_info *mvi = mvi_dev->mvi_info;
230 struct sas_ha_struct *sha = dev->port->ha;
231
232 while (sha->sas_port[i]) {
233 if (sha->sas_port[i] == dev->port) {
234 struct asd_sas_phy *phy;
235 list_for_each_entry(phy,
236 &sha->sas_port[i]->phy_list, port_phy_el) {
237 j = 0;
238 while (sha->sas_phy[j]) {
239 if (sha->sas_phy[j] == phy)
240 break;
241 j++;
242 }
243 phyno[n] = (j >= mvi->chip->n_phy) ?
244 (j - mvi->chip->n_phy) : j;
245 num++;
246 n++;
247 }
248 break;
249 }
250 i++;
251 }
252 return num;
253 }
254
255 static inline void mvs_free_reg_set(struct mvs_info *mvi,
256 struct mvs_device *dev)
257 {
258 if (!dev) {
259 mv_printk("device has been free.\n");
260 return;
261 }
262 if (dev->taskfileset == MVS_ID_NOT_MAPPED)
263 return;
264 MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset);
265 }
266
267 static inline u8 mvs_assign_reg_set(struct mvs_info *mvi,
268 struct mvs_device *dev)
269 {
270 if (dev->taskfileset != MVS_ID_NOT_MAPPED)
271 return 0;
272 return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset);
273 }
274
275 void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard)
276 {
277 u32 no;
278 for_each_phy(phy_mask, phy_mask, no) {
279 if (!(phy_mask & 1))
280 continue;
281 MVS_CHIP_DISP->phy_reset(mvi, no, hard);
282 }
283 }
284
285 /* FIXME: locking? */
286 int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
287 void *funcdata)
288 {
289 int rc = 0, phy_id = sas_phy->id;
290 u32 tmp, i = 0, hi;
291 struct sas_ha_struct *sha = sas_phy->ha;
292 struct mvs_info *mvi = NULL;
293
294 while (sha->sas_phy[i]) {
295 if (sha->sas_phy[i] == sas_phy)
296 break;
297 i++;
298 }
299 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
300 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
301
302 switch (func) {
303 case PHY_FUNC_SET_LINK_RATE:
304 MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata);
305 break;
306
307 case PHY_FUNC_HARD_RESET:
308 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id);
309 if (tmp & PHY_RST_HARD)
310 break;
311 MVS_CHIP_DISP->phy_reset(mvi, phy_id, 1);
312 break;
313
314 case PHY_FUNC_LINK_RESET:
315 MVS_CHIP_DISP->phy_enable(mvi, phy_id);
316 MVS_CHIP_DISP->phy_reset(mvi, phy_id, 0);
317 break;
318
319 case PHY_FUNC_DISABLE:
320 MVS_CHIP_DISP->phy_disable(mvi, phy_id);
321 break;
322 case PHY_FUNC_RELEASE_SPINUP_HOLD:
323 default:
324 rc = -EOPNOTSUPP;
325 }
326 msleep(200);
327 return rc;
328 }
329
330 void __devinit mvs_set_sas_addr(struct mvs_info *mvi, int port_id,
331 u32 off_lo, u32 off_hi, u64 sas_addr)
332 {
333 u32 lo = (u32)sas_addr;
334 u32 hi = (u32)(sas_addr>>32);
335
336 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo);
337 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo);
338 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi);
339 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi);
340 }
341
342 static void mvs_bytes_dmaed(struct mvs_info *mvi, int i)
343 {
344 struct mvs_phy *phy = &mvi->phy[i];
345 struct asd_sas_phy *sas_phy = &phy->sas_phy;
346 struct sas_ha_struct *sas_ha;
347 if (!phy->phy_attached)
348 return;
349
350 if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK)
351 && phy->phy_type & PORT_TYPE_SAS) {
352 return;
353 }
354
355 sas_ha = mvi->sas;
356 sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE);
357
358 if (sas_phy->phy) {
359 struct sas_phy *sphy = sas_phy->phy;
360
361 sphy->negotiated_linkrate = sas_phy->linkrate;
362 sphy->minimum_linkrate = phy->minimum_linkrate;
363 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
364 sphy->maximum_linkrate = phy->maximum_linkrate;
365 sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate();
366 }
367
368 if (phy->phy_type & PORT_TYPE_SAS) {
369 struct sas_identify_frame *id;
370
371 id = (struct sas_identify_frame *)phy->frame_rcvd;
372 id->dev_type = phy->identify.device_type;
373 id->initiator_bits = SAS_PROTOCOL_ALL;
374 id->target_bits = phy->identify.target_port_protocols;
375 } else if (phy->phy_type & PORT_TYPE_SATA) {
376 /*Nothing*/
377 }
378 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy);
379
380 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
381
382 mvi->sas->notify_port_event(sas_phy,
383 PORTE_BYTES_DMAED);
384 }
385
386 int mvs_slave_alloc(struct scsi_device *scsi_dev)
387 {
388 struct domain_device *dev = sdev_to_domain_dev(scsi_dev);
389 if (dev_is_sata(dev)) {
390 /* We don't need to rescan targets
391 * if REPORT_LUNS request is failed
392 */
393 if (scsi_dev->lun > 0)
394 return -ENXIO;
395 scsi_dev->tagged_supported = 1;
396 }
397
398 return sas_slave_alloc(scsi_dev);
399 }
400
401 int mvs_slave_configure(struct scsi_device *sdev)
402 {
403 struct domain_device *dev = sdev_to_domain_dev(sdev);
404 int ret = sas_slave_configure(sdev);
405
406 if (ret)
407 return ret;
408 if (dev_is_sata(dev)) {
409 /* may set PIO mode */
410 #if MV_DISABLE_NCQ
411 struct ata_port *ap = dev->sata_dev.ap;
412 struct ata_device *adev = ap->link.device;
413 adev->flags |= ATA_DFLAG_NCQ_OFF;
414 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, 1);
415 #endif
416 }
417 return 0;
418 }
419
420 void mvs_scan_start(struct Scsi_Host *shost)
421 {
422 int i, j;
423 unsigned short core_nr;
424 struct mvs_info *mvi;
425 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
426
427 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;
428
429 for (j = 0; j < core_nr; j++) {
430 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j];
431 for (i = 0; i < mvi->chip->n_phy; ++i)
432 mvs_bytes_dmaed(mvi, i);
433 }
434 }
435
436 int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time)
437 {
438 /* give the phy enabling interrupt event time to come in (1s
439 * is empirically about all it takes) */
440 if (time < HZ)
441 return 0;
442 /* Wait for discovery to finish */
443 scsi_flush_work(shost);
444 return 1;
445 }
446
447 static int mvs_task_prep_smp(struct mvs_info *mvi,
448 struct mvs_task_exec_info *tei)
449 {
450 int elem, rc, i;
451 struct sas_task *task = tei->task;
452 struct mvs_cmd_hdr *hdr = tei->hdr;
453 struct domain_device *dev = task->dev;
454 struct asd_sas_port *sas_port = dev->port;
455 struct scatterlist *sg_req, *sg_resp;
456 u32 req_len, resp_len, tag = tei->tag;
457 void *buf_tmp;
458 u8 *buf_oaf;
459 dma_addr_t buf_tmp_dma;
460 void *buf_prd;
461 struct mvs_slot_info *slot = &mvi->slot_info[tag];
462 u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
463 #if _MV_DUMP
464 u8 *buf_cmd;
465 void *from;
466 #endif
467 /*
468 * DMA-map SMP request, response buffers
469 */
470 sg_req = &task->smp_task.smp_req;
471 elem = dma_map_sg(mvi->dev, sg_req, 1, PCI_DMA_TODEVICE);
472 if (!elem)
473 return -ENOMEM;
474 req_len = sg_dma_len(sg_req);
475
476 sg_resp = &task->smp_task.smp_resp;
477 elem = dma_map_sg(mvi->dev, sg_resp, 1, PCI_DMA_FROMDEVICE);
478 if (!elem) {
479 rc = -ENOMEM;
480 goto err_out;
481 }
482 resp_len = SB_RFB_MAX;
483
484 /* must be in dwords */
485 if ((req_len & 0x3) || (resp_len & 0x3)) {
486 rc = -EINVAL;
487 goto err_out_2;
488 }
489
490 /*
491 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
492 */
493
494 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */
495 buf_tmp = slot->buf;
496 buf_tmp_dma = slot->buf_dma;
497
498 #if _MV_DUMP
499 buf_cmd = buf_tmp;
500 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
501 buf_tmp += req_len;
502 buf_tmp_dma += req_len;
503 slot->cmd_size = req_len;
504 #else
505 hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req));
506 #endif
507
508 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
509 buf_oaf = buf_tmp;
510 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
511
512 buf_tmp += MVS_OAF_SZ;
513 buf_tmp_dma += MVS_OAF_SZ;
514
515 /* region 3: PRD table *********************************** */
516 buf_prd = buf_tmp;
517 if (tei->n_elem)
518 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
519 else
520 hdr->prd_tbl = 0;
521
522 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
523 buf_tmp += i;
524 buf_tmp_dma += i;
525
526 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
527 slot->response = buf_tmp;
528 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
529 if (mvi->flags & MVF_FLAG_SOC)
530 hdr->reserved[0] = 0;
531
532 /*
533 * Fill in TX ring and command slot header
534 */
535 slot->tx = mvi->tx_prod;
536 mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) |
537 TXQ_MODE_I | tag |
538 (sas_port->phy_mask << TXQ_PHY_SHIFT));
539
540 hdr->flags |= flags;
541 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4));
542 hdr->tags = cpu_to_le32(tag);
543 hdr->data_len = 0;
544
545 /* generate open address frame hdr (first 12 bytes) */
546 /* initiator, SMP, ftype 1h */
547 buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01;
548 buf_oaf[1] = dev->linkrate & 0xf;
549 *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */
550 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
551
552 /* fill in PRD (scatter/gather) table, if any */
553 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
554
555 #if _MV_DUMP
556 /* copy cmd table */
557 from = kmap_atomic(sg_page(sg_req), KM_IRQ0);
558 memcpy(buf_cmd, from + sg_req->offset, req_len);
559 kunmap_atomic(from, KM_IRQ0);
560 #endif
561 return 0;
562
563 err_out_2:
564 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1,
565 PCI_DMA_FROMDEVICE);
566 err_out:
567 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1,
568 PCI_DMA_TODEVICE);
569 return rc;
570 }
571
572 static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag)
573 {
574 struct ata_queued_cmd *qc = task->uldd_task;
575
576 if (qc) {
577 if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
578 qc->tf.command == ATA_CMD_FPDMA_READ) {
579 *tag = qc->tag;
580 return 1;
581 }
582 }
583
584 return 0;
585 }
586
587 static int mvs_task_prep_ata(struct mvs_info *mvi,
588 struct mvs_task_exec_info *tei)
589 {
590 struct sas_task *task = tei->task;
591 struct domain_device *dev = task->dev;
592 struct mvs_device *mvi_dev = dev->lldd_dev;
593 struct mvs_cmd_hdr *hdr = tei->hdr;
594 struct asd_sas_port *sas_port = dev->port;
595 struct mvs_slot_info *slot;
596 void *buf_prd;
597 u32 tag = tei->tag, hdr_tag;
598 u32 flags, del_q;
599 void *buf_tmp;
600 u8 *buf_cmd, *buf_oaf;
601 dma_addr_t buf_tmp_dma;
602 u32 i, req_len, resp_len;
603 const u32 max_resp_len = SB_RFB_MAX;
604
605 if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) {
606 mv_dprintk("Have not enough regiset for dev %d.\n",
607 mvi_dev->device_id);
608 return -EBUSY;
609 }
610 slot = &mvi->slot_info[tag];
611 slot->tx = mvi->tx_prod;
612 del_q = TXQ_MODE_I | tag |
613 (TXQ_CMD_STP << TXQ_CMD_SHIFT) |
614 (sas_port->phy_mask << TXQ_PHY_SHIFT) |
615 (mvi_dev->taskfileset << TXQ_SRS_SHIFT);
616 mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q);
617
618 #ifndef DISABLE_HOTPLUG_DMA_FIX
619 if (task->data_dir == DMA_FROM_DEVICE)
620 flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT);
621 else
622 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
623 #else
624 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
625 #endif
626 if (task->ata_task.use_ncq)
627 flags |= MCH_FPDMA;
628 if (dev->sata_dev.command_set == ATAPI_COMMAND_SET) {
629 if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI)
630 flags |= MCH_ATAPI;
631 }
632
633 /* FIXME: fill in port multiplier number */
634
635 hdr->flags = cpu_to_le32(flags);
636
637 /* FIXME: the low order order 5 bits for the TAG if enable NCQ */
638 if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag))
639 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3);
640 else
641 hdr_tag = tag;
642
643 hdr->tags = cpu_to_le32(hdr_tag);
644
645 hdr->data_len = cpu_to_le32(task->total_xfer_len);
646
647 /*
648 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
649 */
650
651 /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */
652 buf_cmd = buf_tmp = slot->buf;
653 buf_tmp_dma = slot->buf_dma;
654
655 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
656
657 buf_tmp += MVS_ATA_CMD_SZ;
658 buf_tmp_dma += MVS_ATA_CMD_SZ;
659 #if _MV_DUMP
660 slot->cmd_size = MVS_ATA_CMD_SZ;
661 #endif
662
663 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
664 /* used for STP. unused for SATA? */
665 buf_oaf = buf_tmp;
666 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
667
668 buf_tmp += MVS_OAF_SZ;
669 buf_tmp_dma += MVS_OAF_SZ;
670
671 /* region 3: PRD table ********************************************* */
672 buf_prd = buf_tmp;
673
674 if (tei->n_elem)
675 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
676 else
677 hdr->prd_tbl = 0;
678 i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count();
679
680 buf_tmp += i;
681 buf_tmp_dma += i;
682
683 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
684 /* FIXME: probably unused, for SATA. kept here just in case
685 * we get a STP/SATA error information record
686 */
687 slot->response = buf_tmp;
688 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
689 if (mvi->flags & MVF_FLAG_SOC)
690 hdr->reserved[0] = 0;
691
692 req_len = sizeof(struct host_to_dev_fis);
693 resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ -
694 sizeof(struct mvs_err_info) - i;
695
696 /* request, response lengths */
697 resp_len = min(resp_len, max_resp_len);
698 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
699
700 if (likely(!task->ata_task.device_control_reg_update))
701 task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */
702 /* fill in command FIS and ATAPI CDB */
703 memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis));
704 if (dev->sata_dev.command_set == ATAPI_COMMAND_SET)
705 memcpy(buf_cmd + STP_ATAPI_CMD,
706 task->ata_task.atapi_packet, 16);
707
708 /* generate open address frame hdr (first 12 bytes) */
709 /* initiator, STP, ftype 1h */
710 buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1;
711 buf_oaf[1] = dev->linkrate & 0xf;
712 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
713 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
714
715 /* fill in PRD (scatter/gather) table, if any */
716 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
717 #ifndef DISABLE_HOTPLUG_DMA_FIX
718 if (task->data_dir == DMA_FROM_DEVICE)
719 MVS_CHIP_DISP->dma_fix(mvi->bulk_buffer_dma,
720 TRASH_BUCKET_SIZE, tei->n_elem, buf_prd);
721 #endif
722 return 0;
723 }
724
725 static int mvs_task_prep_ssp(struct mvs_info *mvi,
726 struct mvs_task_exec_info *tei, int is_tmf,
727 struct mvs_tmf_task *tmf)
728 {
729 struct sas_task *task = tei->task;
730 struct mvs_cmd_hdr *hdr = tei->hdr;
731 struct mvs_port *port = tei->port;
732 struct domain_device *dev = task->dev;
733 struct mvs_device *mvi_dev = dev->lldd_dev;
734 struct asd_sas_port *sas_port = dev->port;
735 struct mvs_slot_info *slot;
736 void *buf_prd;
737 struct ssp_frame_hdr *ssp_hdr;
738 void *buf_tmp;
739 u8 *buf_cmd, *buf_oaf, fburst = 0;
740 dma_addr_t buf_tmp_dma;
741 u32 flags;
742 u32 resp_len, req_len, i, tag = tei->tag;
743 const u32 max_resp_len = SB_RFB_MAX;
744 u32 phy_mask;
745
746 slot = &mvi->slot_info[tag];
747
748 phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap :
749 sas_port->phy_mask) & TXQ_PHY_MASK;
750
751 slot->tx = mvi->tx_prod;
752 mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag |
753 (TXQ_CMD_SSP << TXQ_CMD_SHIFT) |
754 (phy_mask << TXQ_PHY_SHIFT));
755
756 flags = MCH_RETRY;
757 if (task->ssp_task.enable_first_burst) {
758 flags |= MCH_FBURST;
759 fburst = (1 << 7);
760 }
761 if (is_tmf)
762 flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT);
763 hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT));
764 hdr->tags = cpu_to_le32(tag);
765 hdr->data_len = cpu_to_le32(task->total_xfer_len);
766
767 /*
768 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
769 */
770
771 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */
772 buf_cmd = buf_tmp = slot->buf;
773 buf_tmp_dma = slot->buf_dma;
774
775 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
776
777 buf_tmp += MVS_SSP_CMD_SZ;
778 buf_tmp_dma += MVS_SSP_CMD_SZ;
779 #if _MV_DUMP
780 slot->cmd_size = MVS_SSP_CMD_SZ;
781 #endif
782
783 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
784 buf_oaf = buf_tmp;
785 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
786
787 buf_tmp += MVS_OAF_SZ;
788 buf_tmp_dma += MVS_OAF_SZ;
789
790 /* region 3: PRD table ********************************************* */
791 buf_prd = buf_tmp;
792 if (tei->n_elem)
793 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
794 else
795 hdr->prd_tbl = 0;
796
797 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
798 buf_tmp += i;
799 buf_tmp_dma += i;
800
801 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
802 slot->response = buf_tmp;
803 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
804 if (mvi->flags & MVF_FLAG_SOC)
805 hdr->reserved[0] = 0;
806
807 resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ -
808 sizeof(struct mvs_err_info) - i;
809 resp_len = min(resp_len, max_resp_len);
810
811 req_len = sizeof(struct ssp_frame_hdr) + 28;
812
813 /* request, response lengths */
814 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
815
816 /* generate open address frame hdr (first 12 bytes) */
817 /* initiator, SSP, ftype 1h */
818 buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1;
819 buf_oaf[1] = dev->linkrate & 0xf;
820 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
821 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
822
823 /* fill in SSP frame header (Command Table.SSP frame header) */
824 ssp_hdr = (struct ssp_frame_hdr *)buf_cmd;
825
826 if (is_tmf)
827 ssp_hdr->frame_type = SSP_TASK;
828 else
829 ssp_hdr->frame_type = SSP_COMMAND;
830
831 memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr,
832 HASHED_SAS_ADDR_SIZE);
833 memcpy(ssp_hdr->hashed_src_addr,
834 dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE);
835 ssp_hdr->tag = cpu_to_be16(tag);
836
837 /* fill in IU for TASK and Command Frame */
838 buf_cmd += sizeof(*ssp_hdr);
839 memcpy(buf_cmd, &task->ssp_task.LUN, 8);
840
841 if (ssp_hdr->frame_type != SSP_TASK) {
842 buf_cmd[9] = fburst | task->ssp_task.task_attr |
843 (task->ssp_task.task_prio << 3);
844 memcpy(buf_cmd + 12, &task->ssp_task.cdb, 16);
845 } else{
846 buf_cmd[10] = tmf->tmf;
847 switch (tmf->tmf) {
848 case TMF_ABORT_TASK:
849 case TMF_QUERY_TASK:
850 buf_cmd[12] =
851 (tmf->tag_of_task_to_be_managed >> 8) & 0xff;
852 buf_cmd[13] =
853 tmf->tag_of_task_to_be_managed & 0xff;
854 break;
855 default:
856 break;
857 }
858 }
859 /* fill in PRD (scatter/gather) table, if any */
860 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
861 return 0;
862 }
863
864 #define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == NO_DEVICE)))
865 static int mvs_task_exec(struct sas_task *task, const int num, gfp_t gfp_flags,
866 struct completion *completion,int is_tmf,
867 struct mvs_tmf_task *tmf)
868 {
869 struct domain_device *dev = task->dev;
870 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
871 struct mvs_info *mvi = mvi_dev->mvi_info;
872 struct mvs_task_exec_info tei;
873 struct sas_task *t = task;
874 struct mvs_slot_info *slot;
875 u32 tag = 0xdeadbeef, rc, n_elem = 0;
876 u32 n = num, pass = 0;
877 unsigned long flags = 0, flags_libsas = 0;
878
879 if (!dev->port) {
880 struct task_status_struct *tsm = &t->task_status;
881
882 tsm->resp = SAS_TASK_UNDELIVERED;
883 tsm->stat = SAS_PHY_DOWN;
884 if (dev->dev_type != SATA_DEV)
885 t->task_done(t);
886 return 0;
887 }
888
889 spin_lock_irqsave(&mvi->lock, flags);
890 do {
891 dev = t->dev;
892 mvi_dev = dev->lldd_dev;
893 if (DEV_IS_GONE(mvi_dev)) {
894 if (mvi_dev)
895 mv_dprintk("device %d not ready.\n",
896 mvi_dev->device_id);
897 else
898 mv_dprintk("device %016llx not ready.\n",
899 SAS_ADDR(dev->sas_addr));
900
901 rc = SAS_PHY_DOWN;
902 goto out_done;
903 }
904
905 if (dev->port->id >= mvi->chip->n_phy)
906 tei.port = &mvi->port[dev->port->id - mvi->chip->n_phy];
907 else
908 tei.port = &mvi->port[dev->port->id];
909
910 if (tei.port && !tei.port->port_attached) {
911 if (sas_protocol_ata(t->task_proto)) {
912 struct task_status_struct *ts = &t->task_status;
913
914 mv_dprintk("port %d does not"
915 "attached device.\n", dev->port->id);
916 ts->stat = SAS_PROTO_RESPONSE;
917 ts->stat = SAS_PHY_DOWN;
918 spin_unlock_irqrestore(dev->sata_dev.ap->lock,
919 flags_libsas);
920 spin_unlock_irqrestore(&mvi->lock, flags);
921 t->task_done(t);
922 spin_lock_irqsave(&mvi->lock, flags);
923 spin_lock_irqsave(dev->sata_dev.ap->lock,
924 flags_libsas);
925 if (n > 1)
926 t = list_entry(t->list.next,
927 struct sas_task, list);
928 continue;
929 } else {
930 struct task_status_struct *ts = &t->task_status;
931 ts->resp = SAS_TASK_UNDELIVERED;
932 ts->stat = SAS_PHY_DOWN;
933 t->task_done(t);
934 if (n > 1)
935 t = list_entry(t->list.next,
936 struct sas_task, list);
937 continue;
938 }
939 }
940
941 if (!sas_protocol_ata(t->task_proto)) {
942 if (t->num_scatter) {
943 n_elem = dma_map_sg(mvi->dev,
944 t->scatter,
945 t->num_scatter,
946 t->data_dir);
947 if (!n_elem) {
948 rc = -ENOMEM;
949 goto err_out;
950 }
951 }
952 } else {
953 n_elem = t->num_scatter;
954 }
955
956 rc = mvs_tag_alloc(mvi, &tag);
957 if (rc)
958 goto err_out;
959
960 slot = &mvi->slot_info[tag];
961
962
963 t->lldd_task = NULL;
964 slot->n_elem = n_elem;
965 slot->slot_tag = tag;
966 memset(slot->buf, 0, MVS_SLOT_BUF_SZ);
967
968 tei.task = t;
969 tei.hdr = &mvi->slot[tag];
970 tei.tag = tag;
971 tei.n_elem = n_elem;
972 switch (t->task_proto) {
973 case SAS_PROTOCOL_SMP:
974 rc = mvs_task_prep_smp(mvi, &tei);
975 break;
976 case SAS_PROTOCOL_SSP:
977 rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf);
978 break;
979 case SAS_PROTOCOL_SATA:
980 case SAS_PROTOCOL_STP:
981 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
982 rc = mvs_task_prep_ata(mvi, &tei);
983 break;
984 default:
985 dev_printk(KERN_ERR, mvi->dev,
986 "unknown sas_task proto: 0x%x\n",
987 t->task_proto);
988 rc = -EINVAL;
989 break;
990 }
991
992 if (rc) {
993 mv_dprintk("rc is %x\n", rc);
994 goto err_out_tag;
995 }
996 slot->task = t;
997 slot->port = tei.port;
998 t->lldd_task = slot;
999 list_add_tail(&slot->entry, &tei.port->list);
1000 /* TODO: select normal or high priority */
1001 spin_lock(&t->task_state_lock);
1002 t->task_state_flags |= SAS_TASK_AT_INITIATOR;
1003 spin_unlock(&t->task_state_lock);
1004
1005 mvs_hba_memory_dump(mvi, tag, t->task_proto);
1006 mvi_dev->running_req++;
1007 ++pass;
1008 mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1);
1009 if (n > 1)
1010 t = list_entry(t->list.next, struct sas_task, list);
1011 if (likely(pass))
1012 MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) &
1013 (MVS_CHIP_SLOT_SZ - 1));
1014
1015 } while (--n);
1016 rc = 0;
1017 goto out_done;
1018
1019 err_out_tag:
1020 mvs_tag_free(mvi, tag);
1021 err_out:
1022
1023 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);
1024 if (!sas_protocol_ata(t->task_proto))
1025 if (n_elem)
1026 dma_unmap_sg(mvi->dev, t->scatter, n_elem,
1027 t->data_dir);
1028 out_done:
1029 spin_unlock_irqrestore(&mvi->lock, flags);
1030 return rc;
1031 }
1032
1033 int mvs_queue_command(struct sas_task *task, const int num,
1034 gfp_t gfp_flags)
1035 {
1036 return mvs_task_exec(task, num, gfp_flags, NULL, 0, NULL);
1037 }
1038
1039 static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc)
1040 {
1041 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
1042 mvs_tag_clear(mvi, slot_idx);
1043 }
1044
1045 static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task,
1046 struct mvs_slot_info *slot, u32 slot_idx)
1047 {
1048 if (!slot->task)
1049 return;
1050 if (!sas_protocol_ata(task->task_proto))
1051 if (slot->n_elem)
1052 dma_unmap_sg(mvi->dev, task->scatter,
1053 slot->n_elem, task->data_dir);
1054
1055 switch (task->task_proto) {
1056 case SAS_PROTOCOL_SMP:
1057 dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1,
1058 PCI_DMA_FROMDEVICE);
1059 dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1,
1060 PCI_DMA_TODEVICE);
1061 break;
1062
1063 case SAS_PROTOCOL_SATA:
1064 case SAS_PROTOCOL_STP:
1065 case SAS_PROTOCOL_SSP:
1066 default:
1067 /* do nothing */
1068 break;
1069 }
1070 list_del_init(&slot->entry);
1071 task->lldd_task = NULL;
1072 slot->task = NULL;
1073 slot->port = NULL;
1074 slot->slot_tag = 0xFFFFFFFF;
1075 mvs_slot_free(mvi, slot_idx);
1076 }
1077
1078 static void mvs_update_wideport(struct mvs_info *mvi, int i)
1079 {
1080 struct mvs_phy *phy = &mvi->phy[i];
1081 struct mvs_port *port = phy->port;
1082 int j, no;
1083
1084 for_each_phy(port->wide_port_phymap, j, no) {
1085 if (j & 1) {
1086 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
1087 PHYR_WIDE_PORT);
1088 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
1089 port->wide_port_phymap);
1090 } else {
1091 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
1092 PHYR_WIDE_PORT);
1093 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
1094 0);
1095 }
1096 }
1097 }
1098
1099 static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i)
1100 {
1101 u32 tmp;
1102 struct mvs_phy *phy = &mvi->phy[i];
1103 struct mvs_port *port = phy->port;
1104
1105 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i);
1106 if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) {
1107 if (!port)
1108 phy->phy_attached = 1;
1109 return tmp;
1110 }
1111
1112 if (port) {
1113 if (phy->phy_type & PORT_TYPE_SAS) {
1114 port->wide_port_phymap &= ~(1U << i);
1115 if (!port->wide_port_phymap)
1116 port->port_attached = 0;
1117 mvs_update_wideport(mvi, i);
1118 } else if (phy->phy_type & PORT_TYPE_SATA)
1119 port->port_attached = 0;
1120 phy->port = NULL;
1121 phy->phy_attached = 0;
1122 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA);
1123 }
1124 return 0;
1125 }
1126
1127 static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf)
1128 {
1129 u32 *s = (u32 *) buf;
1130
1131 if (!s)
1132 return NULL;
1133
1134 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3);
1135 s[3] = MVS_CHIP_DISP->read_port_cfg_data(mvi, i);
1136
1137 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2);
1138 s[2] = MVS_CHIP_DISP->read_port_cfg_data(mvi, i);
1139
1140 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1);
1141 s[1] = MVS_CHIP_DISP->read_port_cfg_data(mvi, i);
1142
1143 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0);
1144 s[0] = MVS_CHIP_DISP->read_port_cfg_data(mvi, i);
1145
1146 /* Workaround: take some ATAPI devices for ATA */
1147 if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01))
1148 s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10);
1149
1150 return s;
1151 }
1152
1153 static u32 mvs_is_sig_fis_received(u32 irq_status)
1154 {
1155 return irq_status & PHYEV_SIG_FIS;
1156 }
1157
1158 void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st)
1159 {
1160 struct mvs_phy *phy = &mvi->phy[i];
1161 struct sas_identify_frame *id;
1162
1163 id = (struct sas_identify_frame *)phy->frame_rcvd;
1164
1165 if (get_st) {
1166 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i);
1167 phy->phy_status = mvs_is_phy_ready(mvi, i);
1168 }
1169
1170 if (phy->phy_status) {
1171 int oob_done = 0;
1172 struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy;
1173
1174 oob_done = MVS_CHIP_DISP->oob_done(mvi, i);
1175
1176 MVS_CHIP_DISP->fix_phy_info(mvi, i, id);
1177 if (phy->phy_type & PORT_TYPE_SATA) {
1178 phy->identify.target_port_protocols = SAS_PROTOCOL_STP;
1179 if (mvs_is_sig_fis_received(phy->irq_status)) {
1180 phy->phy_attached = 1;
1181 phy->att_dev_sas_addr =
1182 i + mvi->id * mvi->chip->n_phy;
1183 if (oob_done)
1184 sas_phy->oob_mode = SATA_OOB_MODE;
1185 phy->frame_rcvd_size =
1186 sizeof(struct dev_to_host_fis);
1187 mvs_get_d2h_reg(mvi, i, id);
1188 } else {
1189 u32 tmp;
1190 dev_printk(KERN_DEBUG, mvi->dev,
1191 "Phy%d : No sig fis\n", i);
1192 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i);
1193 MVS_CHIP_DISP->write_port_irq_mask(mvi, i,
1194 tmp | PHYEV_SIG_FIS);
1195 phy->phy_attached = 0;
1196 phy->phy_type &= ~PORT_TYPE_SATA;
1197 MVS_CHIP_DISP->phy_reset(mvi, i, 0);
1198 goto out_done;
1199 }
1200 } else if (phy->phy_type & PORT_TYPE_SAS
1201 || phy->att_dev_info & PORT_SSP_INIT_MASK) {
1202 phy->phy_attached = 1;
1203 phy->identify.device_type =
1204 phy->att_dev_info & PORT_DEV_TYPE_MASK;
1205
1206 if (phy->identify.device_type == SAS_END_DEV)
1207 phy->identify.target_port_protocols =
1208 SAS_PROTOCOL_SSP;
1209 else if (phy->identify.device_type != NO_DEVICE)
1210 phy->identify.target_port_protocols =
1211 SAS_PROTOCOL_SMP;
1212 if (oob_done)
1213 sas_phy->oob_mode = SAS_OOB_MODE;
1214 phy->frame_rcvd_size =
1215 sizeof(struct sas_identify_frame);
1216 }
1217 memcpy(sas_phy->attached_sas_addr,
1218 &phy->att_dev_sas_addr, SAS_ADDR_SIZE);
1219
1220 if (MVS_CHIP_DISP->phy_work_around)
1221 MVS_CHIP_DISP->phy_work_around(mvi, i);
1222 }
1223 mv_dprintk("port %d attach dev info is %x\n",
1224 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info);
1225 mv_dprintk("port %d attach sas addr is %llx\n",
1226 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr);
1227 out_done:
1228 if (get_st)
1229 MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status);
1230 }
1231
1232 static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock)
1233 {
1234 struct sas_ha_struct *sas_ha = sas_phy->ha;
1235 struct mvs_info *mvi = NULL; int i = 0, hi;
1236 struct mvs_phy *phy = sas_phy->lldd_phy;
1237 struct asd_sas_port *sas_port = sas_phy->port;
1238 struct mvs_port *port;
1239 unsigned long flags = 0;
1240 if (!sas_port)
1241 return;
1242
1243 while (sas_ha->sas_phy[i]) {
1244 if (sas_ha->sas_phy[i] == sas_phy)
1245 break;
1246 i++;
1247 }
1248 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy;
1249 mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi];
1250 if (sas_port->id >= mvi->chip->n_phy)
1251 port = &mvi->port[sas_port->id - mvi->chip->n_phy];
1252 else
1253 port = &mvi->port[sas_port->id];
1254 if (lock)
1255 spin_lock_irqsave(&mvi->lock, flags);
1256 port->port_attached = 1;
1257 phy->port = port;
1258 if (phy->phy_type & PORT_TYPE_SAS) {
1259 port->wide_port_phymap = sas_port->phy_mask;
1260 mv_printk("set wide port phy map %x\n", sas_port->phy_mask);
1261 mvs_update_wideport(mvi, sas_phy->id);
1262 }
1263 if (lock)
1264 spin_unlock_irqrestore(&mvi->lock, flags);
1265 }
1266
1267 static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock)
1268 {
1269 struct domain_device *dev;
1270 struct mvs_phy *phy = sas_phy->lldd_phy;
1271 struct mvs_info *mvi = phy->mvi;
1272 struct asd_sas_port *port = sas_phy->port;
1273 int phy_no = 0;
1274
1275 while (phy != &mvi->phy[phy_no]) {
1276 phy_no++;
1277 if (phy_no >= MVS_MAX_PHYS)
1278 return;
1279 }
1280 list_for_each_entry(dev, &port->dev_list, dev_list_node)
1281 mvs_do_release_task(phy->mvi, phy_no, NULL);
1282
1283 }
1284
1285
1286 void mvs_port_formed(struct asd_sas_phy *sas_phy)
1287 {
1288 mvs_port_notify_formed(sas_phy, 1);
1289 }
1290
1291 void mvs_port_deformed(struct asd_sas_phy *sas_phy)
1292 {
1293 mvs_port_notify_deformed(sas_phy, 1);
1294 }
1295
1296 struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi)
1297 {
1298 u32 dev;
1299 for (dev = 0; dev < MVS_MAX_DEVICES; dev++) {
1300 if (mvi->devices[dev].dev_type == NO_DEVICE) {
1301 mvi->devices[dev].device_id = dev;
1302 return &mvi->devices[dev];
1303 }
1304 }
1305
1306 if (dev == MVS_MAX_DEVICES)
1307 mv_printk("max support %d devices, ignore ..\n",
1308 MVS_MAX_DEVICES);
1309
1310 return NULL;
1311 }
1312
1313 void mvs_free_dev(struct mvs_device *mvi_dev)
1314 {
1315 u32 id = mvi_dev->device_id;
1316 memset(mvi_dev, 0, sizeof(*mvi_dev));
1317 mvi_dev->device_id = id;
1318 mvi_dev->dev_type = NO_DEVICE;
1319 mvi_dev->dev_status = MVS_DEV_NORMAL;
1320 mvi_dev->taskfileset = MVS_ID_NOT_MAPPED;
1321 }
1322
1323 int mvs_dev_found_notify(struct domain_device *dev, int lock)
1324 {
1325 unsigned long flags = 0;
1326 int res = 0;
1327 struct mvs_info *mvi = NULL;
1328 struct domain_device *parent_dev = dev->parent;
1329 struct mvs_device *mvi_device;
1330
1331 mvi = mvs_find_dev_mvi(dev);
1332
1333 if (lock)
1334 spin_lock_irqsave(&mvi->lock, flags);
1335
1336 mvi_device = mvs_alloc_dev(mvi);
1337 if (!mvi_device) {
1338 res = -1;
1339 goto found_out;
1340 }
1341 dev->lldd_dev = mvi_device;
1342 mvi_device->dev_status = MVS_DEV_NORMAL;
1343 mvi_device->dev_type = dev->dev_type;
1344 mvi_device->mvi_info = mvi;
1345 if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) {
1346 int phy_id;
1347 u8 phy_num = parent_dev->ex_dev.num_phys;
1348 struct ex_phy *phy;
1349 for (phy_id = 0; phy_id < phy_num; phy_id++) {
1350 phy = &parent_dev->ex_dev.ex_phy[phy_id];
1351 if (SAS_ADDR(phy->attached_sas_addr) ==
1352 SAS_ADDR(dev->sas_addr)) {
1353 mvi_device->attached_phy = phy_id;
1354 break;
1355 }
1356 }
1357
1358 if (phy_id == phy_num) {
1359 mv_printk("Error: no attached dev:%016llx"
1360 "at ex:%016llx.\n",
1361 SAS_ADDR(dev->sas_addr),
1362 SAS_ADDR(parent_dev->sas_addr));
1363 res = -1;
1364 }
1365 }
1366
1367 found_out:
1368 if (lock)
1369 spin_unlock_irqrestore(&mvi->lock, flags);
1370 return res;
1371 }
1372
1373 int mvs_dev_found(struct domain_device *dev)
1374 {
1375 return mvs_dev_found_notify(dev, 1);
1376 }
1377
1378 void mvs_dev_gone_notify(struct domain_device *dev)
1379 {
1380 unsigned long flags = 0;
1381 struct mvs_device *mvi_dev = dev->lldd_dev;
1382 struct mvs_info *mvi = mvi_dev->mvi_info;
1383
1384 spin_lock_irqsave(&mvi->lock, flags);
1385
1386 if (mvi_dev) {
1387 mv_dprintk("found dev[%d:%x] is gone.\n",
1388 mvi_dev->device_id, mvi_dev->dev_type);
1389 mvs_release_task(mvi, dev);
1390 mvs_free_reg_set(mvi, mvi_dev);
1391 mvs_free_dev(mvi_dev);
1392 } else {
1393 mv_dprintk("found dev has gone.\n");
1394 }
1395 dev->lldd_dev = NULL;
1396
1397 spin_unlock_irqrestore(&mvi->lock, flags);
1398 }
1399
1400
1401 void mvs_dev_gone(struct domain_device *dev)
1402 {
1403 mvs_dev_gone_notify(dev);
1404 }
1405
1406 static struct sas_task *mvs_alloc_task(void)
1407 {
1408 struct sas_task *task = kzalloc(sizeof(struct sas_task), GFP_KERNEL);
1409
1410 if (task) {
1411 INIT_LIST_HEAD(&task->list);
1412 spin_lock_init(&task->task_state_lock);
1413 task->task_state_flags = SAS_TASK_STATE_PENDING;
1414 init_timer(&task->timer);
1415 init_completion(&task->completion);
1416 }
1417 return task;
1418 }
1419
1420 static void mvs_free_task(struct sas_task *task)
1421 {
1422 if (task) {
1423 BUG_ON(!list_empty(&task->list));
1424 kfree(task);
1425 }
1426 }
1427
1428 static void mvs_task_done(struct sas_task *task)
1429 {
1430 if (!del_timer(&task->timer))
1431 return;
1432 complete(&task->completion);
1433 }
1434
1435 static void mvs_tmf_timedout(unsigned long data)
1436 {
1437 struct sas_task *task = (struct sas_task *)data;
1438
1439 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1440 complete(&task->completion);
1441 }
1442
1443 /* XXX */
1444 #define MVS_TASK_TIMEOUT 20
1445 static int mvs_exec_internal_tmf_task(struct domain_device *dev,
1446 void *parameter, u32 para_len, struct mvs_tmf_task *tmf)
1447 {
1448 int res, retry;
1449 struct sas_task *task = NULL;
1450
1451 for (retry = 0; retry < 3; retry++) {
1452 task = mvs_alloc_task();
1453 if (!task)
1454 return -ENOMEM;
1455
1456 task->dev = dev;
1457 task->task_proto = dev->tproto;
1458
1459 memcpy(&task->ssp_task, parameter, para_len);
1460 task->task_done = mvs_task_done;
1461
1462 task->timer.data = (unsigned long) task;
1463 task->timer.function = mvs_tmf_timedout;
1464 task->timer.expires = jiffies + MVS_TASK_TIMEOUT*HZ;
1465 add_timer(&task->timer);
1466
1467 res = mvs_task_exec(task, 1, GFP_KERNEL, NULL, 1, tmf);
1468
1469 if (res) {
1470 del_timer(&task->timer);
1471 mv_printk("executing internel task failed:%d\n", res);
1472 goto ex_err;
1473 }
1474
1475 wait_for_completion(&task->completion);
1476 res = -TMF_RESP_FUNC_FAILED;
1477 /* Even TMF timed out, return direct. */
1478 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1479 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
1480 mv_printk("TMF task[%x] timeout.\n", tmf->tmf);
1481 goto ex_err;
1482 }
1483 }
1484
1485 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1486 task->task_status.stat == SAM_GOOD) {
1487 res = TMF_RESP_FUNC_COMPLETE;
1488 break;
1489 }
1490
1491 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1492 task->task_status.stat == SAS_DATA_UNDERRUN) {
1493 /* no error, but return the number of bytes of
1494 * underrun */
1495 res = task->task_status.residual;
1496 break;
1497 }
1498
1499 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1500 task->task_status.stat == SAS_DATA_OVERRUN) {
1501 mv_dprintk("blocked task error.\n");
1502 res = -EMSGSIZE;
1503 break;
1504 } else {
1505 mv_dprintk(" task to dev %016llx response: 0x%x "
1506 "status 0x%x\n",
1507 SAS_ADDR(dev->sas_addr),
1508 task->task_status.resp,
1509 task->task_status.stat);
1510 mvs_free_task(task);
1511 task = NULL;
1512
1513 }
1514 }
1515 ex_err:
1516 BUG_ON(retry == 3 && task != NULL);
1517 if (task != NULL)
1518 mvs_free_task(task);
1519 return res;
1520 }
1521
1522 static int mvs_debug_issue_ssp_tmf(struct domain_device *dev,
1523 u8 *lun, struct mvs_tmf_task *tmf)
1524 {
1525 struct sas_ssp_task ssp_task;
1526 DECLARE_COMPLETION_ONSTACK(completion);
1527 if (!(dev->tproto & SAS_PROTOCOL_SSP))
1528 return TMF_RESP_FUNC_ESUPP;
1529
1530 strncpy((u8 *)&ssp_task.LUN, lun, 8);
1531
1532 return mvs_exec_internal_tmf_task(dev, &ssp_task,
1533 sizeof(ssp_task), tmf);
1534 }
1535
1536
1537 /* Standard mandates link reset for ATA (type 0)
1538 and hard reset for SSP (type 1) , only for RECOVERY */
1539 static int mvs_debug_I_T_nexus_reset(struct domain_device *dev)
1540 {
1541 int rc;
1542 struct sas_phy *phy = sas_find_local_phy(dev);
1543 int reset_type = (dev->dev_type == SATA_DEV ||
1544 (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
1545 rc = sas_phy_reset(phy, reset_type);
1546 msleep(2000);
1547 return rc;
1548 }
1549
1550 /* mandatory SAM-3 */
1551 int mvs_lu_reset(struct domain_device *dev, u8 *lun)
1552 {
1553 unsigned long flags;
1554 int i, phyno[WIDE_PORT_MAX_PHY], num , rc = TMF_RESP_FUNC_FAILED;
1555 struct mvs_tmf_task tmf_task;
1556 struct mvs_device * mvi_dev = dev->lldd_dev;
1557 struct mvs_info *mvi = mvi_dev->mvi_info;
1558
1559 tmf_task.tmf = TMF_LU_RESET;
1560 mvi_dev->dev_status = MVS_DEV_EH;
1561 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1562 if (rc == TMF_RESP_FUNC_COMPLETE) {
1563 num = mvs_find_dev_phyno(dev, phyno);
1564 spin_lock_irqsave(&mvi->lock, flags);
1565 for (i = 0; i < num; i++)
1566 mvs_release_task(mvi, dev);
1567 spin_unlock_irqrestore(&mvi->lock, flags);
1568 }
1569 /* If failed, fall-through I_T_Nexus reset */
1570 mv_printk("%s for device[%x]:rc= %d\n", __func__,
1571 mvi_dev->device_id, rc);
1572 return rc;
1573 }
1574
1575 int mvs_I_T_nexus_reset(struct domain_device *dev)
1576 {
1577 unsigned long flags;
1578 int rc = TMF_RESP_FUNC_FAILED;
1579 struct mvs_device * mvi_dev = (struct mvs_device *)dev->lldd_dev;
1580 struct mvs_info *mvi = mvi_dev->mvi_info;
1581
1582 if (mvi_dev->dev_status != MVS_DEV_EH)
1583 return TMF_RESP_FUNC_COMPLETE;
1584 rc = mvs_debug_I_T_nexus_reset(dev);
1585 mv_printk("%s for device[%x]:rc= %d\n",
1586 __func__, mvi_dev->device_id, rc);
1587
1588 /* housekeeper */
1589 spin_lock_irqsave(&mvi->lock, flags);
1590 mvs_release_task(mvi, dev);
1591 spin_unlock_irqrestore(&mvi->lock, flags);
1592
1593 return rc;
1594 }
1595 /* optional SAM-3 */
1596 int mvs_query_task(struct sas_task *task)
1597 {
1598 u32 tag;
1599 struct scsi_lun lun;
1600 struct mvs_tmf_task tmf_task;
1601 int rc = TMF_RESP_FUNC_FAILED;
1602
1603 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1604 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1605 struct domain_device *dev = task->dev;
1606 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1607 struct mvs_info *mvi = mvi_dev->mvi_info;
1608
1609 int_to_scsilun(cmnd->device->lun, &lun);
1610 rc = mvs_find_tag(mvi, task, &tag);
1611 if (rc == 0) {
1612 rc = TMF_RESP_FUNC_FAILED;
1613 return rc;
1614 }
1615
1616 tmf_task.tmf = TMF_QUERY_TASK;
1617 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1618
1619 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1620 switch (rc) {
1621 /* The task is still in Lun, release it then */
1622 case TMF_RESP_FUNC_SUCC:
1623 /* The task is not in Lun or failed, reset the phy */
1624 case TMF_RESP_FUNC_FAILED:
1625 case TMF_RESP_FUNC_COMPLETE:
1626 break;
1627 default:
1628 rc = TMF_RESP_FUNC_COMPLETE;
1629 break;
1630 }
1631 }
1632 mv_printk("%s:rc= %d\n", __func__, rc);
1633 return rc;
1634 }
1635
1636 /* mandatory SAM-3, still need free task/slot info */
1637 int mvs_abort_task(struct sas_task *task)
1638 {
1639 struct scsi_lun lun;
1640 struct mvs_tmf_task tmf_task;
1641 struct domain_device *dev = task->dev;
1642 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1643 struct mvs_info *mvi = mvi_dev->mvi_info;
1644 int rc = TMF_RESP_FUNC_FAILED;
1645 unsigned long flags;
1646 u32 tag;
1647
1648 if (!mvi_dev) {
1649 mv_printk("%s:%d TMF_RESP_FUNC_FAILED\n", __func__, __LINE__);
1650 rc = TMF_RESP_FUNC_FAILED;
1651 }
1652
1653 spin_lock_irqsave(&task->task_state_lock, flags);
1654 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
1655 spin_unlock_irqrestore(&task->task_state_lock, flags);
1656 rc = TMF_RESP_FUNC_COMPLETE;
1657 goto out;
1658 }
1659 spin_unlock_irqrestore(&task->task_state_lock, flags);
1660 mvi_dev->dev_status = MVS_DEV_EH;
1661 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1662 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1663
1664 int_to_scsilun(cmnd->device->lun, &lun);
1665 rc = mvs_find_tag(mvi, task, &tag);
1666 if (rc == 0) {
1667 mv_printk("No such tag in %s\n", __func__);
1668 rc = TMF_RESP_FUNC_FAILED;
1669 return rc;
1670 }
1671
1672 tmf_task.tmf = TMF_ABORT_TASK;
1673 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1674
1675 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1676
1677 /* if successful, clear the task and callback forwards.*/
1678 if (rc == TMF_RESP_FUNC_COMPLETE) {
1679 u32 slot_no;
1680 struct mvs_slot_info *slot;
1681
1682 if (task->lldd_task) {
1683 slot = task->lldd_task;
1684 slot_no = (u32) (slot - mvi->slot_info);
1685 spin_lock_irqsave(&mvi->lock, flags);
1686 mvs_slot_complete(mvi, slot_no, 1);
1687 spin_unlock_irqrestore(&mvi->lock, flags);
1688 }
1689 }
1690
1691 } else if (task->task_proto & SAS_PROTOCOL_SATA ||
1692 task->task_proto & SAS_PROTOCOL_STP) {
1693 /* to do free register_set */
1694 if (SATA_DEV == dev->dev_type) {
1695 struct mvs_slot_info *slot = task->lldd_task;
1696 struct task_status_struct *tstat;
1697 u32 slot_idx = (u32)(slot - mvi->slot_info);
1698 tstat = &task->task_status;
1699 mv_dprintk(KERN_DEBUG "mv_abort_task() mvi=%p task=%p "
1700 "slot=%p slot_idx=x%x\n",
1701 mvi, task, slot, slot_idx);
1702 tstat->stat = SAS_ABORTED_TASK;
1703 if (mvi_dev && mvi_dev->running_req)
1704 mvi_dev->running_req--;
1705 if (sas_protocol_ata(task->task_proto))
1706 mvs_free_reg_set(mvi, mvi_dev);
1707 mvs_slot_task_free(mvi, task, slot, slot_idx);
1708 return -1;
1709 }
1710 } else {
1711 /* SMP */
1712
1713 }
1714 out:
1715 if (rc != TMF_RESP_FUNC_COMPLETE)
1716 mv_printk("%s:rc= %d\n", __func__, rc);
1717 return rc;
1718 }
1719
1720 int mvs_abort_task_set(struct domain_device *dev, u8 *lun)
1721 {
1722 int rc = TMF_RESP_FUNC_FAILED;
1723 struct mvs_tmf_task tmf_task;
1724
1725 tmf_task.tmf = TMF_ABORT_TASK_SET;
1726 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1727
1728 return rc;
1729 }
1730
1731 int mvs_clear_aca(struct domain_device *dev, u8 *lun)
1732 {
1733 int rc = TMF_RESP_FUNC_FAILED;
1734 struct mvs_tmf_task tmf_task;
1735
1736 tmf_task.tmf = TMF_CLEAR_ACA;
1737 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1738
1739 return rc;
1740 }
1741
1742 int mvs_clear_task_set(struct domain_device *dev, u8 *lun)
1743 {
1744 int rc = TMF_RESP_FUNC_FAILED;
1745 struct mvs_tmf_task tmf_task;
1746
1747 tmf_task.tmf = TMF_CLEAR_TASK_SET;
1748 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1749
1750 return rc;
1751 }
1752
1753 static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task,
1754 u32 slot_idx, int err)
1755 {
1756 struct mvs_device *mvi_dev = task->dev->lldd_dev;
1757 struct task_status_struct *tstat = &task->task_status;
1758 struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf;
1759 int stat = SAM_GOOD;
1760
1761
1762 resp->frame_len = sizeof(struct dev_to_host_fis);
1763 memcpy(&resp->ending_fis[0],
1764 SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset),
1765 sizeof(struct dev_to_host_fis));
1766 tstat->buf_valid_size = sizeof(*resp);
1767 if (unlikely(err)) {
1768 if (unlikely(err & CMD_ISS_STPD))
1769 stat = SAS_OPEN_REJECT;
1770 else
1771 stat = SAS_PROTO_RESPONSE;
1772 }
1773
1774 return stat;
1775 }
1776
1777 static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task,
1778 u32 slot_idx)
1779 {
1780 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1781 int stat;
1782 u32 err_dw0 = le32_to_cpu(*(u32 *) (slot->response));
1783 u32 tfs = 0;
1784 enum mvs_port_type type = PORT_TYPE_SAS;
1785
1786 if (err_dw0 & CMD_ISS_STPD)
1787 MVS_CHIP_DISP->issue_stop(mvi, type, tfs);
1788
1789 MVS_CHIP_DISP->command_active(mvi, slot_idx);
1790
1791 stat = SAM_CHECK_COND;
1792 switch (task->task_proto) {
1793 case SAS_PROTOCOL_SSP:
1794 stat = SAS_ABORTED_TASK;
1795 break;
1796 case SAS_PROTOCOL_SMP:
1797 stat = SAM_CHECK_COND;
1798 break;
1799
1800 case SAS_PROTOCOL_SATA:
1801 case SAS_PROTOCOL_STP:
1802 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
1803 {
1804 if (err_dw0 == 0x80400002)
1805 mv_printk("find reserved error, why?\n");
1806
1807 task->ata_task.use_ncq = 0;
1808 mvs_sata_done(mvi, task, slot_idx, err_dw0);
1809 }
1810 break;
1811 default:
1812 break;
1813 }
1814
1815 return stat;
1816 }
1817
1818 int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags)
1819 {
1820 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
1821 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1822 struct sas_task *task = slot->task;
1823 struct mvs_device *mvi_dev = NULL;
1824 struct task_status_struct *tstat;
1825 struct domain_device *dev;
1826 u32 aborted;
1827
1828 void *to;
1829 enum exec_status sts;
1830
1831 if (mvi->exp_req)
1832 mvi->exp_req--;
1833 if (unlikely(!task || !task->lldd_task || !task->dev))
1834 return -1;
1835
1836 tstat = &task->task_status;
1837 dev = task->dev;
1838 mvi_dev = dev->lldd_dev;
1839
1840 mvs_hba_cq_dump(mvi);
1841
1842 spin_lock(&task->task_state_lock);
1843 task->task_state_flags &=
1844 ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR);
1845 task->task_state_flags |= SAS_TASK_STATE_DONE;
1846 /* race condition*/
1847 aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED;
1848 spin_unlock(&task->task_state_lock);
1849
1850 memset(tstat, 0, sizeof(*tstat));
1851 tstat->resp = SAS_TASK_COMPLETE;
1852
1853 if (unlikely(aborted)) {
1854 tstat->stat = SAS_ABORTED_TASK;
1855 if (mvi_dev && mvi_dev->running_req)
1856 mvi_dev->running_req--;
1857 if (sas_protocol_ata(task->task_proto))
1858 mvs_free_reg_set(mvi, mvi_dev);
1859
1860 mvs_slot_task_free(mvi, task, slot, slot_idx);
1861 return -1;
1862 }
1863
1864 if (unlikely(!mvi_dev || flags)) {
1865 if (!mvi_dev)
1866 mv_dprintk("port has not device.\n");
1867 tstat->stat = SAS_PHY_DOWN;
1868 goto out;
1869 }
1870
1871 /* error info record present */
1872 if (unlikely((rx_desc & RXQ_ERR) && (*(u64 *) slot->response))) {
1873 tstat->stat = mvs_slot_err(mvi, task, slot_idx);
1874 tstat->resp = SAS_TASK_COMPLETE;
1875 goto out;
1876 }
1877
1878 switch (task->task_proto) {
1879 case SAS_PROTOCOL_SSP:
1880 /* hw says status == 0, datapres == 0 */
1881 if (rx_desc & RXQ_GOOD) {
1882 tstat->stat = SAM_GOOD;
1883 tstat->resp = SAS_TASK_COMPLETE;
1884 }
1885 /* response frame present */
1886 else if (rx_desc & RXQ_RSP) {
1887 struct ssp_response_iu *iu = slot->response +
1888 sizeof(struct mvs_err_info);
1889 sas_ssp_task_response(mvi->dev, task, iu);
1890 } else
1891 tstat->stat = SAM_CHECK_COND;
1892 break;
1893
1894 case SAS_PROTOCOL_SMP: {
1895 struct scatterlist *sg_resp = &task->smp_task.smp_resp;
1896 tstat->stat = SAM_GOOD;
1897 to = kmap_atomic(sg_page(sg_resp), KM_IRQ0);
1898 memcpy(to + sg_resp->offset,
1899 slot->response + sizeof(struct mvs_err_info),
1900 sg_dma_len(sg_resp));
1901 kunmap_atomic(to, KM_IRQ0);
1902 break;
1903 }
1904
1905 case SAS_PROTOCOL_SATA:
1906 case SAS_PROTOCOL_STP:
1907 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: {
1908 tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0);
1909 break;
1910 }
1911
1912 default:
1913 tstat->stat = SAM_CHECK_COND;
1914 break;
1915 }
1916 if (!slot->port->port_attached) {
1917 mv_dprintk("port %d has removed.\n", slot->port->sas_port.id);
1918 tstat->stat = SAS_PHY_DOWN;
1919 }
1920
1921
1922 out:
1923 if (mvi_dev && mvi_dev->running_req) {
1924 mvi_dev->running_req--;
1925 if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req)
1926 mvs_free_reg_set(mvi, mvi_dev);
1927 }
1928 mvs_slot_task_free(mvi, task, slot, slot_idx);
1929 sts = tstat->stat;
1930
1931 spin_unlock(&mvi->lock);
1932 if (task->task_done)
1933 task->task_done(task);
1934 else
1935 mv_dprintk("why has not task_done.\n");
1936 spin_lock(&mvi->lock);
1937
1938 return sts;
1939 }
1940
1941 void mvs_do_release_task(struct mvs_info *mvi,
1942 int phy_no, struct domain_device *dev)
1943 {
1944 u32 slot_idx;
1945 struct mvs_phy *phy;
1946 struct mvs_port *port;
1947 struct mvs_slot_info *slot, *slot2;
1948
1949 phy = &mvi->phy[phy_no];
1950 port = phy->port;
1951 if (!port)
1952 return;
1953 /* clean cmpl queue in case request is already finished */
1954 mvs_int_rx(mvi, false);
1955
1956
1957
1958 list_for_each_entry_safe(slot, slot2, &port->list, entry) {
1959 struct sas_task *task;
1960 slot_idx = (u32) (slot - mvi->slot_info);
1961 task = slot->task;
1962
1963 if (dev && task->dev != dev)
1964 continue;
1965
1966 mv_printk("Release slot [%x] tag[%x], task [%p]:\n",
1967 slot_idx, slot->slot_tag, task);
1968 MVS_CHIP_DISP->command_active(mvi, slot_idx);
1969
1970 mvs_slot_complete(mvi, slot_idx, 1);
1971 }
1972 }
1973
1974 void mvs_release_task(struct mvs_info *mvi,
1975 struct domain_device *dev)
1976 {
1977 int i, phyno[WIDE_PORT_MAX_PHY], num;
1978 /* housekeeper */
1979 num = mvs_find_dev_phyno(dev, phyno);
1980 for (i = 0; i < num; i++)
1981 mvs_do_release_task(mvi, phyno[i], dev);
1982 }
1983
1984 static void mvs_phy_disconnected(struct mvs_phy *phy)
1985 {
1986 phy->phy_attached = 0;
1987 phy->att_dev_info = 0;
1988 phy->att_dev_sas_addr = 0;
1989 }
1990
1991 static void mvs_work_queue(struct work_struct *work)
1992 {
1993 struct delayed_work *dw = container_of(work, struct delayed_work, work);
1994 struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q);
1995 struct mvs_info *mvi = mwq->mvi;
1996 unsigned long flags;
1997
1998 spin_lock_irqsave(&mvi->lock, flags);
1999 if (mwq->handler & PHY_PLUG_EVENT) {
2000 u32 phy_no = (unsigned long) mwq->data;
2001 struct sas_ha_struct *sas_ha = mvi->sas;
2002 struct mvs_phy *phy = &mvi->phy[phy_no];
2003 struct asd_sas_phy *sas_phy = &phy->sas_phy;
2004
2005 if (phy->phy_event & PHY_PLUG_OUT) {
2006 u32 tmp;
2007 struct sas_identify_frame *id;
2008 id = (struct sas_identify_frame *)phy->frame_rcvd;
2009 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no);
2010 phy->phy_event &= ~PHY_PLUG_OUT;
2011 if (!(tmp & PHY_READY_MASK)) {
2012 sas_phy_disconnected(sas_phy);
2013 mvs_phy_disconnected(phy);
2014 sas_ha->notify_phy_event(sas_phy,
2015 PHYE_LOSS_OF_SIGNAL);
2016 mv_dprintk("phy%d Removed Device\n", phy_no);
2017 } else {
2018 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
2019 mvs_update_phyinfo(mvi, phy_no, 1);
2020 mvs_bytes_dmaed(mvi, phy_no);
2021 mvs_port_notify_formed(sas_phy, 0);
2022 mv_dprintk("phy%d Attached Device\n", phy_no);
2023 }
2024 }
2025 }
2026 list_del(&mwq->entry);
2027 spin_unlock_irqrestore(&mvi->lock, flags);
2028 kfree(mwq);
2029 }
2030
2031 static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler)
2032 {
2033 struct mvs_wq *mwq;
2034 int ret = 0;
2035
2036 mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC);
2037 if (mwq) {
2038 mwq->mvi = mvi;
2039 mwq->data = data;
2040 mwq->handler = handler;
2041 MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq);
2042 list_add_tail(&mwq->entry, &mvi->wq_list);
2043 schedule_delayed_work(&mwq->work_q, HZ * 2);
2044 } else
2045 ret = -ENOMEM;
2046
2047 return ret;
2048 }
2049
2050 static void mvs_sig_time_out(unsigned long tphy)
2051 {
2052 struct mvs_phy *phy = (struct mvs_phy *)tphy;
2053 struct mvs_info *mvi = phy->mvi;
2054 u8 phy_no;
2055
2056 for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) {
2057 if (&mvi->phy[phy_no] == phy) {
2058 mv_dprintk("Get signature time out, reset phy %d\n",
2059 phy_no+mvi->id*mvi->chip->n_phy);
2060 MVS_CHIP_DISP->phy_reset(mvi, phy_no, 1);
2061 }
2062 }
2063 }
2064
2065 static void mvs_sig_remove_timer(struct mvs_phy *phy)
2066 {
2067 if (phy->timer.function)
2068 del_timer(&phy->timer);
2069 phy->timer.function = NULL;
2070 }
2071
2072 void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events)
2073 {
2074 u32 tmp;
2075 struct sas_ha_struct *sas_ha = mvi->sas;
2076 struct mvs_phy *phy = &mvi->phy[phy_no];
2077 struct asd_sas_phy *sas_phy = &phy->sas_phy;
2078
2079 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no);
2080 mv_dprintk("port %d ctrl sts=0x%X.\n", phy_no+mvi->id*mvi->chip->n_phy,
2081 MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no));
2082 mv_dprintk("Port %d irq sts = 0x%X\n", phy_no+mvi->id*mvi->chip->n_phy,
2083 phy->irq_status);
2084
2085 /*
2086 * events is port event now ,
2087 * we need check the interrupt status which belongs to per port.
2088 */
2089
2090 if (phy->irq_status & PHYEV_DCDR_ERR) {
2091 mv_dprintk("port %d STP decoding error.\n",
2092 phy_no + mvi->id*mvi->chip->n_phy);
2093 }
2094
2095 if (phy->irq_status & PHYEV_POOF) {
2096 if (!(phy->phy_event & PHY_PLUG_OUT)) {
2097 int dev_sata = phy->phy_type & PORT_TYPE_SATA;
2098 int ready;
2099 mvs_do_release_task(mvi, phy_no, NULL);
2100 phy->phy_event |= PHY_PLUG_OUT;
2101 MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1);
2102 mvs_handle_event(mvi,
2103 (void *)(unsigned long)phy_no,
2104 PHY_PLUG_EVENT);
2105 ready = mvs_is_phy_ready(mvi, phy_no);
2106 if (!ready)
2107 mv_dprintk("phy%d Unplug Notice\n",
2108 phy_no +
2109 mvi->id * mvi->chip->n_phy);
2110 if (ready || dev_sata) {
2111 if (MVS_CHIP_DISP->stp_reset)
2112 MVS_CHIP_DISP->stp_reset(mvi,
2113 phy_no);
2114 else
2115 MVS_CHIP_DISP->phy_reset(mvi,
2116 phy_no, 0);
2117 return;
2118 }
2119 }
2120 }
2121
2122 if (phy->irq_status & PHYEV_COMWAKE) {
2123 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no);
2124 MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no,
2125 tmp | PHYEV_SIG_FIS);
2126 if (phy->timer.function == NULL) {
2127 phy->timer.data = (unsigned long)phy;
2128 phy->timer.function = mvs_sig_time_out;
2129 phy->timer.expires = jiffies + 10*HZ;
2130 add_timer(&phy->timer);
2131 }
2132 }
2133 if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) {
2134 phy->phy_status = mvs_is_phy_ready(mvi, phy_no);
2135 mvs_sig_remove_timer(phy);
2136 mv_dprintk("notify plug in on phy[%d]\n", phy_no);
2137 if (phy->phy_status) {
2138 mdelay(10);
2139 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
2140 if (phy->phy_type & PORT_TYPE_SATA) {
2141 tmp = MVS_CHIP_DISP->read_port_irq_mask(
2142 mvi, phy_no);
2143 tmp &= ~PHYEV_SIG_FIS;
2144 MVS_CHIP_DISP->write_port_irq_mask(mvi,
2145 phy_no, tmp);
2146 }
2147 mvs_update_phyinfo(mvi, phy_no, 0);
2148 if (phy->phy_type & PORT_TYPE_SAS) {
2149 MVS_CHIP_DISP->phy_reset(mvi, phy_no, 2);
2150 mdelay(10);
2151 }
2152
2153 mvs_bytes_dmaed(mvi, phy_no);
2154 /* whether driver is going to handle hot plug */
2155 if (phy->phy_event & PHY_PLUG_OUT) {
2156 mvs_port_notify_formed(sas_phy, 0);
2157 phy->phy_event &= ~PHY_PLUG_OUT;
2158 }
2159 } else {
2160 mv_dprintk("plugin interrupt but phy%d is gone\n",
2161 phy_no + mvi->id*mvi->chip->n_phy);
2162 }
2163 } else if (phy->irq_status & PHYEV_BROAD_CH) {
2164 mv_dprintk("port %d broadcast change.\n",
2165 phy_no + mvi->id*mvi->chip->n_phy);
2166 /* exception for Samsung disk drive*/
2167 mdelay(1000);
2168 sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
2169 }
2170 MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status);
2171 }
2172
2173 int mvs_int_rx(struct mvs_info *mvi, bool self_clear)
2174 {
2175 u32 rx_prod_idx, rx_desc;
2176 bool attn = false;
2177
2178 /* the first dword in the RX ring is special: it contains
2179 * a mirror of the hardware's RX producer index, so that
2180 * we don't have to stall the CPU reading that register.
2181 * The actual RX ring is offset by one dword, due to this.
2182 */
2183 rx_prod_idx = mvi->rx_cons;
2184 mvi->rx_cons = le32_to_cpu(mvi->rx[0]);
2185 if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */
2186 return 0;
2187
2188 /* The CMPL_Q may come late, read from register and try again
2189 * note: if coalescing is enabled,
2190 * it will need to read from register every time for sure
2191 */
2192 if (unlikely(mvi->rx_cons == rx_prod_idx))
2193 mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK;
2194
2195 if (mvi->rx_cons == rx_prod_idx)
2196 return 0;
2197
2198 while (mvi->rx_cons != rx_prod_idx) {
2199 /* increment our internal RX consumer pointer */
2200 rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1);
2201 rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]);
2202
2203 if (likely(rx_desc & RXQ_DONE))
2204 mvs_slot_complete(mvi, rx_desc, 0);
2205 if (rx_desc & RXQ_ATTN) {
2206 attn = true;
2207 } else if (rx_desc & RXQ_ERR) {
2208 if (!(rx_desc & RXQ_DONE))
2209 mvs_slot_complete(mvi, rx_desc, 0);
2210 } else if (rx_desc & RXQ_SLOT_RESET) {
2211 mvs_slot_free(mvi, rx_desc);
2212 }
2213 }
2214
2215 if (attn && self_clear)
2216 MVS_CHIP_DISP->int_full(mvi);
2217 return 0;
2218 }
2219
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