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qla2xxx: Allow vref count to timeout on vport delete.
[mirror_ubuntu-zesty-kernel.git] / drivers / scsi / qla2xxx / qla_init.c
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_gbl.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/vmalloc.h>
13
14 #include "qla_devtbl.h"
15
16 #ifdef CONFIG_SPARC
17 #include <asm/prom.h>
18 #endif
19
20 #include <target/target_core_base.h>
21 #include "qla_target.h"
22
23 /*
24 * QLogic ISP2x00 Hardware Support Function Prototypes.
25 */
26 static int qla2x00_isp_firmware(scsi_qla_host_t *);
27 static int qla2x00_setup_chip(scsi_qla_host_t *);
28 static int qla2x00_fw_ready(scsi_qla_host_t *);
29 static int qla2x00_configure_hba(scsi_qla_host_t *);
30 static int qla2x00_configure_loop(scsi_qla_host_t *);
31 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
32 static int qla2x00_configure_fabric(scsi_qla_host_t *);
33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
34 static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
35 uint16_t *);
36
37 static int qla2x00_restart_isp(scsi_qla_host_t *);
38
39 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
40 static int qla84xx_init_chip(scsi_qla_host_t *);
41 static int qla25xx_init_queues(struct qla_hw_data *);
42
43 /* SRB Extensions ---------------------------------------------------------- */
44
45 void
46 qla2x00_sp_timeout(unsigned long __data)
47 {
48 srb_t *sp = (srb_t *)__data;
49 struct srb_iocb *iocb;
50 fc_port_t *fcport = sp->fcport;
51 struct qla_hw_data *ha = fcport->vha->hw;
52 struct req_que *req;
53 unsigned long flags;
54
55 spin_lock_irqsave(&ha->hardware_lock, flags);
56 req = ha->req_q_map[0];
57 req->outstanding_cmds[sp->handle] = NULL;
58 iocb = &sp->u.iocb_cmd;
59 iocb->timeout(sp);
60 sp->free(fcport->vha, sp);
61 spin_unlock_irqrestore(&ha->hardware_lock, flags);
62 }
63
64 void
65 qla2x00_sp_free(void *data, void *ptr)
66 {
67 srb_t *sp = (srb_t *)ptr;
68 struct srb_iocb *iocb = &sp->u.iocb_cmd;
69 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
70
71 del_timer(&iocb->timer);
72 qla2x00_rel_sp(vha, sp);
73 }
74
75 /* Asynchronous Login/Logout Routines -------------------------------------- */
76
77 unsigned long
78 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
79 {
80 unsigned long tmo;
81 struct qla_hw_data *ha = vha->hw;
82
83 /* Firmware should use switch negotiated r_a_tov for timeout. */
84 tmo = ha->r_a_tov / 10 * 2;
85 if (IS_QLAFX00(ha)) {
86 tmo = FX00_DEF_RATOV * 2;
87 } else if (!IS_FWI2_CAPABLE(ha)) {
88 /*
89 * Except for earlier ISPs where the timeout is seeded from the
90 * initialization control block.
91 */
92 tmo = ha->login_timeout;
93 }
94 return tmo;
95 }
96
97 static void
98 qla2x00_async_iocb_timeout(void *data)
99 {
100 srb_t *sp = (srb_t *)data;
101 fc_port_t *fcport = sp->fcport;
102
103 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
104 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n",
105 sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area,
106 fcport->d_id.b.al_pa);
107
108 fcport->flags &= ~FCF_ASYNC_SENT;
109 if (sp->type == SRB_LOGIN_CMD) {
110 struct srb_iocb *lio = &sp->u.iocb_cmd;
111 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
112 /* Retry as needed. */
113 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
114 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
115 QLA_LOGIO_LOGIN_RETRIED : 0;
116 qla2x00_post_async_login_done_work(fcport->vha, fcport,
117 lio->u.logio.data);
118 } else if (sp->type == SRB_LOGOUT_CMD) {
119 qlt_logo_completion_handler(fcport, QLA_FUNCTION_TIMEOUT);
120 }
121 }
122
123 static void
124 qla2x00_async_login_sp_done(void *data, void *ptr, int res)
125 {
126 srb_t *sp = (srb_t *)ptr;
127 struct srb_iocb *lio = &sp->u.iocb_cmd;
128 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
129
130 if (!test_bit(UNLOADING, &vha->dpc_flags))
131 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
132 lio->u.logio.data);
133 sp->free(sp->fcport->vha, sp);
134 }
135
136 int
137 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
138 uint16_t *data)
139 {
140 srb_t *sp;
141 struct srb_iocb *lio;
142 int rval;
143
144 rval = QLA_FUNCTION_FAILED;
145 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
146 if (!sp)
147 goto done;
148
149 sp->type = SRB_LOGIN_CMD;
150 sp->name = "login";
151 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
152
153 lio = &sp->u.iocb_cmd;
154 lio->timeout = qla2x00_async_iocb_timeout;
155 sp->done = qla2x00_async_login_sp_done;
156 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
157 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
158 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
159 rval = qla2x00_start_sp(sp);
160 if (rval != QLA_SUCCESS) {
161 fcport->flags &= ~FCF_ASYNC_SENT;
162 fcport->flags |= FCF_LOGIN_NEEDED;
163 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
164 goto done_free_sp;
165 }
166
167 ql_dbg(ql_dbg_disc, vha, 0x2072,
168 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x "
169 "retries=%d.\n", sp->handle, fcport->loop_id,
170 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
171 fcport->login_retry);
172 return rval;
173
174 done_free_sp:
175 sp->free(fcport->vha, sp);
176 done:
177 return rval;
178 }
179
180 static void
181 qla2x00_async_logout_sp_done(void *data, void *ptr, int res)
182 {
183 srb_t *sp = (srb_t *)ptr;
184 struct srb_iocb *lio = &sp->u.iocb_cmd;
185 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
186
187 if (!test_bit(UNLOADING, &vha->dpc_flags))
188 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
189 lio->u.logio.data);
190 sp->free(sp->fcport->vha, sp);
191 }
192
193 int
194 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
195 {
196 srb_t *sp;
197 struct srb_iocb *lio;
198 int rval;
199
200 rval = QLA_FUNCTION_FAILED;
201 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
202 if (!sp)
203 goto done;
204
205 sp->type = SRB_LOGOUT_CMD;
206 sp->name = "logout";
207 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
208
209 lio = &sp->u.iocb_cmd;
210 lio->timeout = qla2x00_async_iocb_timeout;
211 sp->done = qla2x00_async_logout_sp_done;
212 rval = qla2x00_start_sp(sp);
213 if (rval != QLA_SUCCESS)
214 goto done_free_sp;
215
216 ql_dbg(ql_dbg_disc, vha, 0x2070,
217 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
218 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
219 fcport->d_id.b.area, fcport->d_id.b.al_pa);
220 return rval;
221
222 done_free_sp:
223 sp->free(fcport->vha, sp);
224 done:
225 return rval;
226 }
227
228 static void
229 qla2x00_async_adisc_sp_done(void *data, void *ptr, int res)
230 {
231 srb_t *sp = (srb_t *)ptr;
232 struct srb_iocb *lio = &sp->u.iocb_cmd;
233 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
234
235 if (!test_bit(UNLOADING, &vha->dpc_flags))
236 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
237 lio->u.logio.data);
238 sp->free(sp->fcport->vha, sp);
239 }
240
241 int
242 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
243 uint16_t *data)
244 {
245 srb_t *sp;
246 struct srb_iocb *lio;
247 int rval;
248
249 rval = QLA_FUNCTION_FAILED;
250 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
251 if (!sp)
252 goto done;
253
254 sp->type = SRB_ADISC_CMD;
255 sp->name = "adisc";
256 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
257
258 lio = &sp->u.iocb_cmd;
259 lio->timeout = qla2x00_async_iocb_timeout;
260 sp->done = qla2x00_async_adisc_sp_done;
261 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
262 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
263 rval = qla2x00_start_sp(sp);
264 if (rval != QLA_SUCCESS)
265 goto done_free_sp;
266
267 ql_dbg(ql_dbg_disc, vha, 0x206f,
268 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n",
269 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
270 fcport->d_id.b.area, fcport->d_id.b.al_pa);
271 return rval;
272
273 done_free_sp:
274 sp->free(fcport->vha, sp);
275 done:
276 return rval;
277 }
278
279 static void
280 qla2x00_tmf_iocb_timeout(void *data)
281 {
282 srb_t *sp = (srb_t *)data;
283 struct srb_iocb *tmf = &sp->u.iocb_cmd;
284
285 tmf->u.tmf.comp_status = CS_TIMEOUT;
286 complete(&tmf->u.tmf.comp);
287 }
288
289 static void
290 qla2x00_tmf_sp_done(void *data, void *ptr, int res)
291 {
292 srb_t *sp = (srb_t *)ptr;
293 struct srb_iocb *tmf = &sp->u.iocb_cmd;
294 complete(&tmf->u.tmf.comp);
295 }
296
297 int
298 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
299 uint32_t tag)
300 {
301 struct scsi_qla_host *vha = fcport->vha;
302 struct srb_iocb *tm_iocb;
303 srb_t *sp;
304 int rval = QLA_FUNCTION_FAILED;
305
306 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
307 if (!sp)
308 goto done;
309
310 tm_iocb = &sp->u.iocb_cmd;
311 sp->type = SRB_TM_CMD;
312 sp->name = "tmf";
313 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
314 tm_iocb->u.tmf.flags = flags;
315 tm_iocb->u.tmf.lun = lun;
316 tm_iocb->u.tmf.data = tag;
317 sp->done = qla2x00_tmf_sp_done;
318 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
319 init_completion(&tm_iocb->u.tmf.comp);
320
321 rval = qla2x00_start_sp(sp);
322 if (rval != QLA_SUCCESS)
323 goto done_free_sp;
324
325 ql_dbg(ql_dbg_taskm, vha, 0x802f,
326 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
327 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
328 fcport->d_id.b.area, fcport->d_id.b.al_pa);
329
330 wait_for_completion(&tm_iocb->u.tmf.comp);
331
332 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ?
333 QLA_SUCCESS : QLA_FUNCTION_FAILED;
334
335 if ((rval != QLA_SUCCESS) || tm_iocb->u.tmf.data) {
336 ql_dbg(ql_dbg_taskm, vha, 0x8030,
337 "TM IOCB failed (%x).\n", rval);
338 }
339
340 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
341 flags = tm_iocb->u.tmf.flags;
342 lun = (uint16_t)tm_iocb->u.tmf.lun;
343
344 /* Issue Marker IOCB */
345 qla2x00_marker(vha, vha->hw->req_q_map[0],
346 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
347 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
348 }
349
350 done_free_sp:
351 sp->free(vha, sp);
352 done:
353 return rval;
354 }
355
356 static void
357 qla24xx_abort_iocb_timeout(void *data)
358 {
359 srb_t *sp = (srb_t *)data;
360 struct srb_iocb *abt = &sp->u.iocb_cmd;
361
362 abt->u.abt.comp_status = CS_TIMEOUT;
363 complete(&abt->u.abt.comp);
364 }
365
366 static void
367 qla24xx_abort_sp_done(void *data, void *ptr, int res)
368 {
369 srb_t *sp = (srb_t *)ptr;
370 struct srb_iocb *abt = &sp->u.iocb_cmd;
371
372 complete(&abt->u.abt.comp);
373 }
374
375 static int
376 qla24xx_async_abort_cmd(srb_t *cmd_sp)
377 {
378 scsi_qla_host_t *vha = cmd_sp->fcport->vha;
379 fc_port_t *fcport = cmd_sp->fcport;
380 struct srb_iocb *abt_iocb;
381 srb_t *sp;
382 int rval = QLA_FUNCTION_FAILED;
383
384 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
385 if (!sp)
386 goto done;
387
388 abt_iocb = &sp->u.iocb_cmd;
389 sp->type = SRB_ABT_CMD;
390 sp->name = "abort";
391 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
392 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
393 sp->done = qla24xx_abort_sp_done;
394 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
395 init_completion(&abt_iocb->u.abt.comp);
396
397 rval = qla2x00_start_sp(sp);
398 if (rval != QLA_SUCCESS)
399 goto done_free_sp;
400
401 ql_dbg(ql_dbg_async, vha, 0x507c,
402 "Abort command issued - hdl=%x, target_id=%x\n",
403 cmd_sp->handle, fcport->tgt_id);
404
405 wait_for_completion(&abt_iocb->u.abt.comp);
406
407 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
408 QLA_SUCCESS : QLA_FUNCTION_FAILED;
409
410 done_free_sp:
411 sp->free(vha, sp);
412 done:
413 return rval;
414 }
415
416 int
417 qla24xx_async_abort_command(srb_t *sp)
418 {
419 unsigned long flags = 0;
420
421 uint32_t handle;
422 fc_port_t *fcport = sp->fcport;
423 struct scsi_qla_host *vha = fcport->vha;
424 struct qla_hw_data *ha = vha->hw;
425 struct req_que *req = vha->req;
426
427 spin_lock_irqsave(&ha->hardware_lock, flags);
428 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
429 if (req->outstanding_cmds[handle] == sp)
430 break;
431 }
432 spin_unlock_irqrestore(&ha->hardware_lock, flags);
433 if (handle == req->num_outstanding_cmds) {
434 /* Command not found. */
435 return QLA_FUNCTION_FAILED;
436 }
437 if (sp->type == SRB_FXIOCB_DCMD)
438 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
439 FXDISC_ABORT_IOCTL);
440
441 return qla24xx_async_abort_cmd(sp);
442 }
443
444 void
445 qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
446 uint16_t *data)
447 {
448 int rval;
449
450 switch (data[0]) {
451 case MBS_COMMAND_COMPLETE:
452 /*
453 * Driver must validate login state - If PRLI not complete,
454 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
455 * requests.
456 */
457 rval = qla2x00_get_port_database(vha, fcport, 0);
458 if (rval == QLA_NOT_LOGGED_IN) {
459 fcport->flags &= ~FCF_ASYNC_SENT;
460 fcport->flags |= FCF_LOGIN_NEEDED;
461 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
462 break;
463 }
464
465 if (rval != QLA_SUCCESS) {
466 qla2x00_post_async_logout_work(vha, fcport, NULL);
467 qla2x00_post_async_login_work(vha, fcport, NULL);
468 break;
469 }
470 if (fcport->flags & FCF_FCP2_DEVICE) {
471 qla2x00_post_async_adisc_work(vha, fcport, data);
472 break;
473 }
474 qla2x00_update_fcport(vha, fcport);
475 break;
476 case MBS_COMMAND_ERROR:
477 fcport->flags &= ~FCF_ASYNC_SENT;
478 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
479 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
480 else
481 qla2x00_mark_device_lost(vha, fcport, 1, 0);
482 break;
483 case MBS_PORT_ID_USED:
484 fcport->loop_id = data[1];
485 qla2x00_post_async_logout_work(vha, fcport, NULL);
486 qla2x00_post_async_login_work(vha, fcport, NULL);
487 break;
488 case MBS_LOOP_ID_USED:
489 fcport->loop_id++;
490 rval = qla2x00_find_new_loop_id(vha, fcport);
491 if (rval != QLA_SUCCESS) {
492 fcport->flags &= ~FCF_ASYNC_SENT;
493 qla2x00_mark_device_lost(vha, fcport, 1, 0);
494 break;
495 }
496 qla2x00_post_async_login_work(vha, fcport, NULL);
497 break;
498 }
499 return;
500 }
501
502 void
503 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
504 uint16_t *data)
505 {
506 /* Don't re-login in target mode */
507 if (!fcport->tgt_session)
508 qla2x00_mark_device_lost(vha, fcport, 1, 0);
509 qlt_logo_completion_handler(fcport, data[0]);
510 return;
511 }
512
513 void
514 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
515 uint16_t *data)
516 {
517 if (data[0] == MBS_COMMAND_COMPLETE) {
518 qla2x00_update_fcport(vha, fcport);
519
520 return;
521 }
522
523 /* Retry login. */
524 fcport->flags &= ~FCF_ASYNC_SENT;
525 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
526 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
527 else
528 qla2x00_mark_device_lost(vha, fcport, 1, 0);
529
530 return;
531 }
532
533 /****************************************************************************/
534 /* QLogic ISP2x00 Hardware Support Functions. */
535 /****************************************************************************/
536
537 static int
538 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
539 {
540 int rval = QLA_SUCCESS;
541 struct qla_hw_data *ha = vha->hw;
542 uint32_t idc_major_ver, idc_minor_ver;
543 uint16_t config[4];
544
545 qla83xx_idc_lock(vha, 0);
546
547 /* SV: TODO: Assign initialization timeout from
548 * flash-info / other param
549 */
550 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
551 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
552
553 /* Set our fcoe function presence */
554 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
555 ql_dbg(ql_dbg_p3p, vha, 0xb077,
556 "Error while setting DRV-Presence.\n");
557 rval = QLA_FUNCTION_FAILED;
558 goto exit;
559 }
560
561 /* Decide the reset ownership */
562 qla83xx_reset_ownership(vha);
563
564 /*
565 * On first protocol driver load:
566 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
567 * register.
568 * Others: Check compatibility with current IDC Major version.
569 */
570 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
571 if (ha->flags.nic_core_reset_owner) {
572 /* Set IDC Major version */
573 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
574 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
575
576 /* Clearing IDC-Lock-Recovery register */
577 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
578 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
579 /*
580 * Clear further IDC participation if we are not compatible with
581 * the current IDC Major Version.
582 */
583 ql_log(ql_log_warn, vha, 0xb07d,
584 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
585 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
586 __qla83xx_clear_drv_presence(vha);
587 rval = QLA_FUNCTION_FAILED;
588 goto exit;
589 }
590 /* Each function sets its supported Minor version. */
591 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
592 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
593 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
594
595 if (ha->flags.nic_core_reset_owner) {
596 memset(config, 0, sizeof(config));
597 if (!qla81xx_get_port_config(vha, config))
598 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
599 QLA8XXX_DEV_READY);
600 }
601
602 rval = qla83xx_idc_state_handler(vha);
603
604 exit:
605 qla83xx_idc_unlock(vha, 0);
606
607 return rval;
608 }
609
610 /*
611 * qla2x00_initialize_adapter
612 * Initialize board.
613 *
614 * Input:
615 * ha = adapter block pointer.
616 *
617 * Returns:
618 * 0 = success
619 */
620 int
621 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
622 {
623 int rval;
624 struct qla_hw_data *ha = vha->hw;
625 struct req_que *req = ha->req_q_map[0];
626
627 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
628 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
629
630 /* Clear adapter flags. */
631 vha->flags.online = 0;
632 ha->flags.chip_reset_done = 0;
633 vha->flags.reset_active = 0;
634 ha->flags.pci_channel_io_perm_failure = 0;
635 ha->flags.eeh_busy = 0;
636 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
637 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
638 atomic_set(&vha->loop_state, LOOP_DOWN);
639 vha->device_flags = DFLG_NO_CABLE;
640 vha->dpc_flags = 0;
641 vha->flags.management_server_logged_in = 0;
642 vha->marker_needed = 0;
643 ha->isp_abort_cnt = 0;
644 ha->beacon_blink_led = 0;
645
646 set_bit(0, ha->req_qid_map);
647 set_bit(0, ha->rsp_qid_map);
648
649 ql_dbg(ql_dbg_init, vha, 0x0040,
650 "Configuring PCI space...\n");
651 rval = ha->isp_ops->pci_config(vha);
652 if (rval) {
653 ql_log(ql_log_warn, vha, 0x0044,
654 "Unable to configure PCI space.\n");
655 return (rval);
656 }
657
658 ha->isp_ops->reset_chip(vha);
659
660 rval = qla2xxx_get_flash_info(vha);
661 if (rval) {
662 ql_log(ql_log_fatal, vha, 0x004f,
663 "Unable to validate FLASH data.\n");
664 return rval;
665 }
666
667 if (IS_QLA8044(ha)) {
668 qla8044_read_reset_template(vha);
669
670 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
671 * If DONRESET_BIT0 is set, drivers should not set dev_state
672 * to NEED_RESET. But if NEED_RESET is set, drivers should
673 * should honor the reset. */
674 if (ql2xdontresethba == 1)
675 qla8044_set_idc_dontreset(vha);
676 }
677
678 ha->isp_ops->get_flash_version(vha, req->ring);
679 ql_dbg(ql_dbg_init, vha, 0x0061,
680 "Configure NVRAM parameters...\n");
681
682 ha->isp_ops->nvram_config(vha);
683
684 if (ha->flags.disable_serdes) {
685 /* Mask HBA via NVRAM settings? */
686 ql_log(ql_log_info, vha, 0x0077,
687 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
688 return QLA_FUNCTION_FAILED;
689 }
690
691 ql_dbg(ql_dbg_init, vha, 0x0078,
692 "Verifying loaded RISC code...\n");
693
694 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
695 rval = ha->isp_ops->chip_diag(vha);
696 if (rval)
697 return (rval);
698 rval = qla2x00_setup_chip(vha);
699 if (rval)
700 return (rval);
701 }
702
703 if (IS_QLA84XX(ha)) {
704 ha->cs84xx = qla84xx_get_chip(vha);
705 if (!ha->cs84xx) {
706 ql_log(ql_log_warn, vha, 0x00d0,
707 "Unable to configure ISP84XX.\n");
708 return QLA_FUNCTION_FAILED;
709 }
710 }
711
712 if (qla_ini_mode_enabled(vha))
713 rval = qla2x00_init_rings(vha);
714
715 ha->flags.chip_reset_done = 1;
716
717 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
718 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
719 rval = qla84xx_init_chip(vha);
720 if (rval != QLA_SUCCESS) {
721 ql_log(ql_log_warn, vha, 0x00d4,
722 "Unable to initialize ISP84XX.\n");
723 qla84xx_put_chip(vha);
724 }
725 }
726
727 /* Load the NIC Core f/w if we are the first protocol driver. */
728 if (IS_QLA8031(ha)) {
729 rval = qla83xx_nic_core_fw_load(vha);
730 if (rval)
731 ql_log(ql_log_warn, vha, 0x0124,
732 "Error in initializing NIC Core f/w.\n");
733 }
734
735 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
736 qla24xx_read_fcp_prio_cfg(vha);
737
738 if (IS_P3P_TYPE(ha))
739 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
740 else
741 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
742
743 return (rval);
744 }
745
746 /**
747 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
748 * @ha: HA context
749 *
750 * Returns 0 on success.
751 */
752 int
753 qla2100_pci_config(scsi_qla_host_t *vha)
754 {
755 uint16_t w;
756 unsigned long flags;
757 struct qla_hw_data *ha = vha->hw;
758 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
759
760 pci_set_master(ha->pdev);
761 pci_try_set_mwi(ha->pdev);
762
763 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
764 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
765 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
766
767 pci_disable_rom(ha->pdev);
768
769 /* Get PCI bus information. */
770 spin_lock_irqsave(&ha->hardware_lock, flags);
771 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
772 spin_unlock_irqrestore(&ha->hardware_lock, flags);
773
774 return QLA_SUCCESS;
775 }
776
777 /**
778 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
779 * @ha: HA context
780 *
781 * Returns 0 on success.
782 */
783 int
784 qla2300_pci_config(scsi_qla_host_t *vha)
785 {
786 uint16_t w;
787 unsigned long flags = 0;
788 uint32_t cnt;
789 struct qla_hw_data *ha = vha->hw;
790 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
791
792 pci_set_master(ha->pdev);
793 pci_try_set_mwi(ha->pdev);
794
795 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
796 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
797
798 if (IS_QLA2322(ha) || IS_QLA6322(ha))
799 w &= ~PCI_COMMAND_INTX_DISABLE;
800 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
801
802 /*
803 * If this is a 2300 card and not 2312, reset the
804 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
805 * the 2310 also reports itself as a 2300 so we need to get the
806 * fb revision level -- a 6 indicates it really is a 2300 and
807 * not a 2310.
808 */
809 if (IS_QLA2300(ha)) {
810 spin_lock_irqsave(&ha->hardware_lock, flags);
811
812 /* Pause RISC. */
813 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
814 for (cnt = 0; cnt < 30000; cnt++) {
815 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
816 break;
817
818 udelay(10);
819 }
820
821 /* Select FPM registers. */
822 WRT_REG_WORD(&reg->ctrl_status, 0x20);
823 RD_REG_WORD(&reg->ctrl_status);
824
825 /* Get the fb rev level */
826 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
827
828 if (ha->fb_rev == FPM_2300)
829 pci_clear_mwi(ha->pdev);
830
831 /* Deselect FPM registers. */
832 WRT_REG_WORD(&reg->ctrl_status, 0x0);
833 RD_REG_WORD(&reg->ctrl_status);
834
835 /* Release RISC module. */
836 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
837 for (cnt = 0; cnt < 30000; cnt++) {
838 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
839 break;
840
841 udelay(10);
842 }
843
844 spin_unlock_irqrestore(&ha->hardware_lock, flags);
845 }
846
847 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
848
849 pci_disable_rom(ha->pdev);
850
851 /* Get PCI bus information. */
852 spin_lock_irqsave(&ha->hardware_lock, flags);
853 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
854 spin_unlock_irqrestore(&ha->hardware_lock, flags);
855
856 return QLA_SUCCESS;
857 }
858
859 /**
860 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
861 * @ha: HA context
862 *
863 * Returns 0 on success.
864 */
865 int
866 qla24xx_pci_config(scsi_qla_host_t *vha)
867 {
868 uint16_t w;
869 unsigned long flags = 0;
870 struct qla_hw_data *ha = vha->hw;
871 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
872
873 pci_set_master(ha->pdev);
874 pci_try_set_mwi(ha->pdev);
875
876 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
877 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
878 w &= ~PCI_COMMAND_INTX_DISABLE;
879 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
880
881 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
882
883 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
884 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
885 pcix_set_mmrbc(ha->pdev, 2048);
886
887 /* PCIe -- adjust Maximum Read Request Size (2048). */
888 if (pci_is_pcie(ha->pdev))
889 pcie_set_readrq(ha->pdev, 4096);
890
891 pci_disable_rom(ha->pdev);
892
893 ha->chip_revision = ha->pdev->revision;
894
895 /* Get PCI bus information. */
896 spin_lock_irqsave(&ha->hardware_lock, flags);
897 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
898 spin_unlock_irqrestore(&ha->hardware_lock, flags);
899
900 return QLA_SUCCESS;
901 }
902
903 /**
904 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
905 * @ha: HA context
906 *
907 * Returns 0 on success.
908 */
909 int
910 qla25xx_pci_config(scsi_qla_host_t *vha)
911 {
912 uint16_t w;
913 struct qla_hw_data *ha = vha->hw;
914
915 pci_set_master(ha->pdev);
916 pci_try_set_mwi(ha->pdev);
917
918 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
919 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
920 w &= ~PCI_COMMAND_INTX_DISABLE;
921 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
922
923 /* PCIe -- adjust Maximum Read Request Size (2048). */
924 if (pci_is_pcie(ha->pdev))
925 pcie_set_readrq(ha->pdev, 4096);
926
927 pci_disable_rom(ha->pdev);
928
929 ha->chip_revision = ha->pdev->revision;
930
931 return QLA_SUCCESS;
932 }
933
934 /**
935 * qla2x00_isp_firmware() - Choose firmware image.
936 * @ha: HA context
937 *
938 * Returns 0 on success.
939 */
940 static int
941 qla2x00_isp_firmware(scsi_qla_host_t *vha)
942 {
943 int rval;
944 uint16_t loop_id, topo, sw_cap;
945 uint8_t domain, area, al_pa;
946 struct qla_hw_data *ha = vha->hw;
947
948 /* Assume loading risc code */
949 rval = QLA_FUNCTION_FAILED;
950
951 if (ha->flags.disable_risc_code_load) {
952 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
953
954 /* Verify checksum of loaded RISC code. */
955 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
956 if (rval == QLA_SUCCESS) {
957 /* And, verify we are not in ROM code. */
958 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
959 &area, &domain, &topo, &sw_cap);
960 }
961 }
962
963 if (rval)
964 ql_dbg(ql_dbg_init, vha, 0x007a,
965 "**** Load RISC code ****.\n");
966
967 return (rval);
968 }
969
970 /**
971 * qla2x00_reset_chip() - Reset ISP chip.
972 * @ha: HA context
973 *
974 * Returns 0 on success.
975 */
976 void
977 qla2x00_reset_chip(scsi_qla_host_t *vha)
978 {
979 unsigned long flags = 0;
980 struct qla_hw_data *ha = vha->hw;
981 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
982 uint32_t cnt;
983 uint16_t cmd;
984
985 if (unlikely(pci_channel_offline(ha->pdev)))
986 return;
987
988 ha->isp_ops->disable_intrs(ha);
989
990 spin_lock_irqsave(&ha->hardware_lock, flags);
991
992 /* Turn off master enable */
993 cmd = 0;
994 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
995 cmd &= ~PCI_COMMAND_MASTER;
996 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
997
998 if (!IS_QLA2100(ha)) {
999 /* Pause RISC. */
1000 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
1001 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
1002 for (cnt = 0; cnt < 30000; cnt++) {
1003 if ((RD_REG_WORD(&reg->hccr) &
1004 HCCR_RISC_PAUSE) != 0)
1005 break;
1006 udelay(100);
1007 }
1008 } else {
1009 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
1010 udelay(10);
1011 }
1012
1013 /* Select FPM registers. */
1014 WRT_REG_WORD(&reg->ctrl_status, 0x20);
1015 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1016
1017 /* FPM Soft Reset. */
1018 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
1019 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
1020
1021 /* Toggle Fpm Reset. */
1022 if (!IS_QLA2200(ha)) {
1023 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
1024 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
1025 }
1026
1027 /* Select frame buffer registers. */
1028 WRT_REG_WORD(&reg->ctrl_status, 0x10);
1029 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1030
1031 /* Reset frame buffer FIFOs. */
1032 if (IS_QLA2200(ha)) {
1033 WRT_FB_CMD_REG(ha, reg, 0xa000);
1034 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
1035 } else {
1036 WRT_FB_CMD_REG(ha, reg, 0x00fc);
1037
1038 /* Read back fb_cmd until zero or 3 seconds max */
1039 for (cnt = 0; cnt < 3000; cnt++) {
1040 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
1041 break;
1042 udelay(100);
1043 }
1044 }
1045
1046 /* Select RISC module registers. */
1047 WRT_REG_WORD(&reg->ctrl_status, 0);
1048 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1049
1050 /* Reset RISC processor. */
1051 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1052 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
1053
1054 /* Release RISC processor. */
1055 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1056 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
1057 }
1058
1059 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
1060 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
1061
1062 /* Reset ISP chip. */
1063 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
1064
1065 /* Wait for RISC to recover from reset. */
1066 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1067 /*
1068 * It is necessary to for a delay here since the card doesn't
1069 * respond to PCI reads during a reset. On some architectures
1070 * this will result in an MCA.
1071 */
1072 udelay(20);
1073 for (cnt = 30000; cnt; cnt--) {
1074 if ((RD_REG_WORD(&reg->ctrl_status) &
1075 CSR_ISP_SOFT_RESET) == 0)
1076 break;
1077 udelay(100);
1078 }
1079 } else
1080 udelay(10);
1081
1082 /* Reset RISC processor. */
1083 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1084
1085 WRT_REG_WORD(&reg->semaphore, 0);
1086
1087 /* Release RISC processor. */
1088 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1089 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
1090
1091 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1092 for (cnt = 0; cnt < 30000; cnt++) {
1093 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
1094 break;
1095
1096 udelay(100);
1097 }
1098 } else
1099 udelay(100);
1100
1101 /* Turn on master enable */
1102 cmd |= PCI_COMMAND_MASTER;
1103 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
1104
1105 /* Disable RISC pause on FPM parity error. */
1106 if (!IS_QLA2100(ha)) {
1107 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
1108 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
1109 }
1110
1111 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1112 }
1113
1114 /**
1115 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
1116 *
1117 * Returns 0 on success.
1118 */
1119 static int
1120 qla81xx_reset_mpi(scsi_qla_host_t *vha)
1121 {
1122 uint16_t mb[4] = {0x1010, 0, 1, 0};
1123
1124 if (!IS_QLA81XX(vha->hw))
1125 return QLA_SUCCESS;
1126
1127 return qla81xx_write_mpi_register(vha, mb);
1128 }
1129
1130 /**
1131 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
1132 * @ha: HA context
1133 *
1134 * Returns 0 on success.
1135 */
1136 static inline int
1137 qla24xx_reset_risc(scsi_qla_host_t *vha)
1138 {
1139 unsigned long flags = 0;
1140 struct qla_hw_data *ha = vha->hw;
1141 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1142 uint32_t cnt;
1143 uint16_t wd;
1144 static int abts_cnt; /* ISP abort retry counts */
1145 int rval = QLA_SUCCESS;
1146
1147 spin_lock_irqsave(&ha->hardware_lock, flags);
1148
1149 /* Reset RISC. */
1150 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
1151 for (cnt = 0; cnt < 30000; cnt++) {
1152 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
1153 break;
1154
1155 udelay(10);
1156 }
1157
1158 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
1159 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
1160
1161 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
1162 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
1163 RD_REG_DWORD(&reg->hccr),
1164 RD_REG_DWORD(&reg->ctrl_status),
1165 (RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
1166
1167 WRT_REG_DWORD(&reg->ctrl_status,
1168 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
1169 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
1170
1171 udelay(100);
1172
1173 /* Wait for firmware to complete NVRAM accesses. */
1174 RD_REG_WORD(&reg->mailbox0);
1175 for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&
1176 rval == QLA_SUCCESS; cnt--) {
1177 barrier();
1178 if (cnt)
1179 udelay(5);
1180 else
1181 rval = QLA_FUNCTION_TIMEOUT;
1182 }
1183
1184 if (rval == QLA_SUCCESS)
1185 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
1186
1187 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
1188 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
1189 RD_REG_DWORD(&reg->hccr),
1190 RD_REG_DWORD(&reg->mailbox0));
1191
1192 /* Wait for soft-reset to complete. */
1193 RD_REG_DWORD(&reg->ctrl_status);
1194 for (cnt = 0; cnt < 60; cnt++) {
1195 barrier();
1196 if ((RD_REG_DWORD(&reg->ctrl_status) &
1197 CSRX_ISP_SOFT_RESET) == 0)
1198 break;
1199
1200 udelay(5);
1201 }
1202 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
1203 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
1204
1205 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
1206 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
1207 RD_REG_DWORD(&reg->hccr),
1208 RD_REG_DWORD(&reg->ctrl_status));
1209
1210 /* If required, do an MPI FW reset now */
1211 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
1212 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
1213 if (++abts_cnt < 5) {
1214 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1215 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
1216 } else {
1217 /*
1218 * We exhausted the ISP abort retries. We have to
1219 * set the board offline.
1220 */
1221 abts_cnt = 0;
1222 vha->flags.online = 0;
1223 }
1224 }
1225 }
1226
1227 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
1228 RD_REG_DWORD(&reg->hccr);
1229
1230 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
1231 RD_REG_DWORD(&reg->hccr);
1232
1233 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
1234 RD_REG_DWORD(&reg->hccr);
1235
1236 RD_REG_WORD(&reg->mailbox0);
1237 for (cnt = 60; RD_REG_WORD(&reg->mailbox0) != 0 &&
1238 rval == QLA_SUCCESS; cnt--) {
1239 barrier();
1240 if (cnt)
1241 udelay(5);
1242 else
1243 rval = QLA_FUNCTION_TIMEOUT;
1244 }
1245 if (rval == QLA_SUCCESS)
1246 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
1247
1248 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
1249 "Host Risc 0x%x, mailbox0 0x%x\n",
1250 RD_REG_DWORD(&reg->hccr),
1251 RD_REG_WORD(&reg->mailbox0));
1252
1253 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1254
1255 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
1256 "Driver in %s mode\n",
1257 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
1258
1259 if (IS_NOPOLLING_TYPE(ha))
1260 ha->isp_ops->enable_intrs(ha);
1261
1262 return rval;
1263 }
1264
1265 static void
1266 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
1267 {
1268 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
1269
1270 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
1271 *data = RD_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET);
1272
1273 }
1274
1275 static void
1276 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
1277 {
1278 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
1279
1280 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
1281 WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
1282 }
1283
1284 static void
1285 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
1286 {
1287 uint32_t wd32 = 0;
1288 uint delta_msec = 100;
1289 uint elapsed_msec = 0;
1290 uint timeout_msec;
1291 ulong n;
1292
1293 if (vha->hw->pdev->subsystem_device != 0x0175 &&
1294 vha->hw->pdev->subsystem_device != 0x0240)
1295 return;
1296
1297 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
1298 udelay(100);
1299
1300 attempt:
1301 timeout_msec = TIMEOUT_SEMAPHORE;
1302 n = timeout_msec / delta_msec;
1303 while (n--) {
1304 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
1305 qla25xx_read_risc_sema_reg(vha, &wd32);
1306 if (wd32 & RISC_SEMAPHORE)
1307 break;
1308 msleep(delta_msec);
1309 elapsed_msec += delta_msec;
1310 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
1311 goto force;
1312 }
1313
1314 if (!(wd32 & RISC_SEMAPHORE))
1315 goto force;
1316
1317 if (!(wd32 & RISC_SEMAPHORE_FORCE))
1318 goto acquired;
1319
1320 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
1321 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
1322 n = timeout_msec / delta_msec;
1323 while (n--) {
1324 qla25xx_read_risc_sema_reg(vha, &wd32);
1325 if (!(wd32 & RISC_SEMAPHORE_FORCE))
1326 break;
1327 msleep(delta_msec);
1328 elapsed_msec += delta_msec;
1329 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
1330 goto force;
1331 }
1332
1333 if (wd32 & RISC_SEMAPHORE_FORCE)
1334 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
1335
1336 goto attempt;
1337
1338 force:
1339 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
1340
1341 acquired:
1342 return;
1343 }
1344
1345 /**
1346 * qla24xx_reset_chip() - Reset ISP24xx chip.
1347 * @ha: HA context
1348 *
1349 * Returns 0 on success.
1350 */
1351 void
1352 qla24xx_reset_chip(scsi_qla_host_t *vha)
1353 {
1354 struct qla_hw_data *ha = vha->hw;
1355
1356 if (pci_channel_offline(ha->pdev) &&
1357 ha->flags.pci_channel_io_perm_failure) {
1358 return;
1359 }
1360
1361 ha->isp_ops->disable_intrs(ha);
1362
1363 qla25xx_manipulate_risc_semaphore(vha);
1364
1365 /* Perform RISC reset. */
1366 qla24xx_reset_risc(vha);
1367 }
1368
1369 /**
1370 * qla2x00_chip_diag() - Test chip for proper operation.
1371 * @ha: HA context
1372 *
1373 * Returns 0 on success.
1374 */
1375 int
1376 qla2x00_chip_diag(scsi_qla_host_t *vha)
1377 {
1378 int rval;
1379 struct qla_hw_data *ha = vha->hw;
1380 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1381 unsigned long flags = 0;
1382 uint16_t data;
1383 uint32_t cnt;
1384 uint16_t mb[5];
1385 struct req_que *req = ha->req_q_map[0];
1386
1387 /* Assume a failed state */
1388 rval = QLA_FUNCTION_FAILED;
1389
1390 ql_dbg(ql_dbg_init, vha, 0x007b,
1391 "Testing device at %lx.\n", (u_long)&reg->flash_address);
1392
1393 spin_lock_irqsave(&ha->hardware_lock, flags);
1394
1395 /* Reset ISP chip. */
1396 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
1397
1398 /*
1399 * We need to have a delay here since the card will not respond while
1400 * in reset causing an MCA on some architectures.
1401 */
1402 udelay(20);
1403 data = qla2x00_debounce_register(&reg->ctrl_status);
1404 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
1405 udelay(5);
1406 data = RD_REG_WORD(&reg->ctrl_status);
1407 barrier();
1408 }
1409
1410 if (!cnt)
1411 goto chip_diag_failed;
1412
1413 ql_dbg(ql_dbg_init, vha, 0x007c,
1414 "Reset register cleared by chip reset.\n");
1415
1416 /* Reset RISC processor. */
1417 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1418 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1419
1420 /* Workaround for QLA2312 PCI parity error */
1421 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1422 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
1423 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
1424 udelay(5);
1425 data = RD_MAILBOX_REG(ha, reg, 0);
1426 barrier();
1427 }
1428 } else
1429 udelay(10);
1430
1431 if (!cnt)
1432 goto chip_diag_failed;
1433
1434 /* Check product ID of chip */
1435 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n");
1436
1437 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
1438 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
1439 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
1440 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
1441 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
1442 mb[3] != PROD_ID_3) {
1443 ql_log(ql_log_warn, vha, 0x0062,
1444 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
1445 mb[1], mb[2], mb[3]);
1446
1447 goto chip_diag_failed;
1448 }
1449 ha->product_id[0] = mb[1];
1450 ha->product_id[1] = mb[2];
1451 ha->product_id[2] = mb[3];
1452 ha->product_id[3] = mb[4];
1453
1454 /* Adjust fw RISC transfer size */
1455 if (req->length > 1024)
1456 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
1457 else
1458 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
1459 req->length;
1460
1461 if (IS_QLA2200(ha) &&
1462 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
1463 /* Limit firmware transfer size with a 2200A */
1464 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1465
1466 ha->device_type |= DT_ISP2200A;
1467 ha->fw_transfer_size = 128;
1468 }
1469
1470 /* Wrap Incoming Mailboxes Test. */
1471 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1472
1473 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
1474 rval = qla2x00_mbx_reg_test(vha);
1475 if (rval)
1476 ql_log(ql_log_warn, vha, 0x0080,
1477 "Failed mailbox send register test.\n");
1478 else
1479 /* Flag a successful rval */
1480 rval = QLA_SUCCESS;
1481 spin_lock_irqsave(&ha->hardware_lock, flags);
1482
1483 chip_diag_failed:
1484 if (rval)
1485 ql_log(ql_log_info, vha, 0x0081,
1486 "Chip diagnostics **** FAILED ****.\n");
1487
1488 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1489
1490 return (rval);
1491 }
1492
1493 /**
1494 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
1495 * @ha: HA context
1496 *
1497 * Returns 0 on success.
1498 */
1499 int
1500 qla24xx_chip_diag(scsi_qla_host_t *vha)
1501 {
1502 int rval;
1503 struct qla_hw_data *ha = vha->hw;
1504 struct req_que *req = ha->req_q_map[0];
1505
1506 if (IS_P3P_TYPE(ha))
1507 return QLA_SUCCESS;
1508
1509 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
1510
1511 rval = qla2x00_mbx_reg_test(vha);
1512 if (rval) {
1513 ql_log(ql_log_warn, vha, 0x0082,
1514 "Failed mailbox send register test.\n");
1515 } else {
1516 /* Flag a successful rval */
1517 rval = QLA_SUCCESS;
1518 }
1519
1520 return rval;
1521 }
1522
1523 void
1524 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
1525 {
1526 int rval;
1527 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
1528 eft_size, fce_size, mq_size;
1529 dma_addr_t tc_dma;
1530 void *tc;
1531 struct qla_hw_data *ha = vha->hw;
1532 struct req_que *req = ha->req_q_map[0];
1533 struct rsp_que *rsp = ha->rsp_q_map[0];
1534
1535 if (ha->fw_dump) {
1536 ql_dbg(ql_dbg_init, vha, 0x00bd,
1537 "Firmware dump already allocated.\n");
1538 return;
1539 }
1540
1541 ha->fw_dumped = 0;
1542 ha->fw_dump_cap_flags = 0;
1543 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
1544 req_q_size = rsp_q_size = 0;
1545
1546 if (IS_QLA27XX(ha))
1547 goto try_fce;
1548
1549 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
1550 fixed_size = sizeof(struct qla2100_fw_dump);
1551 } else if (IS_QLA23XX(ha)) {
1552 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
1553 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
1554 sizeof(uint16_t);
1555 } else if (IS_FWI2_CAPABLE(ha)) {
1556 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
1557 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
1558 else if (IS_QLA81XX(ha))
1559 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
1560 else if (IS_QLA25XX(ha))
1561 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
1562 else
1563 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
1564
1565 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
1566 sizeof(uint32_t);
1567 if (ha->mqenable) {
1568 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
1569 mq_size = sizeof(struct qla2xxx_mq_chain);
1570 /*
1571 * Allocate maximum buffer size for all queues.
1572 * Resizing must be done at end-of-dump processing.
1573 */
1574 mq_size += ha->max_req_queues *
1575 (req->length * sizeof(request_t));
1576 mq_size += ha->max_rsp_queues *
1577 (rsp->length * sizeof(response_t));
1578 }
1579 if (ha->tgt.atio_ring)
1580 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
1581 /* Allocate memory for Fibre Channel Event Buffer. */
1582 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
1583 !IS_QLA27XX(ha))
1584 goto try_eft;
1585
1586 try_fce:
1587 if (ha->fce)
1588 dma_free_coherent(&ha->pdev->dev,
1589 FCE_SIZE, ha->fce, ha->fce_dma);
1590
1591 /* Allocate memory for Fibre Channel Event Buffer. */
1592 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
1593 GFP_KERNEL);
1594 if (!tc) {
1595 ql_log(ql_log_warn, vha, 0x00be,
1596 "Unable to allocate (%d KB) for FCE.\n",
1597 FCE_SIZE / 1024);
1598 goto try_eft;
1599 }
1600
1601 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
1602 ha->fce_mb, &ha->fce_bufs);
1603 if (rval) {
1604 ql_log(ql_log_warn, vha, 0x00bf,
1605 "Unable to initialize FCE (%d).\n", rval);
1606 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
1607 tc_dma);
1608 ha->flags.fce_enabled = 0;
1609 goto try_eft;
1610 }
1611 ql_dbg(ql_dbg_init, vha, 0x00c0,
1612 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
1613
1614 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
1615 ha->flags.fce_enabled = 1;
1616 ha->fce_dma = tc_dma;
1617 ha->fce = tc;
1618
1619 try_eft:
1620 if (ha->eft)
1621 dma_free_coherent(&ha->pdev->dev,
1622 EFT_SIZE, ha->eft, ha->eft_dma);
1623
1624 /* Allocate memory for Extended Trace Buffer. */
1625 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
1626 GFP_KERNEL);
1627 if (!tc) {
1628 ql_log(ql_log_warn, vha, 0x00c1,
1629 "Unable to allocate (%d KB) for EFT.\n",
1630 EFT_SIZE / 1024);
1631 goto cont_alloc;
1632 }
1633
1634 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
1635 if (rval) {
1636 ql_log(ql_log_warn, vha, 0x00c2,
1637 "Unable to initialize EFT (%d).\n", rval);
1638 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
1639 tc_dma);
1640 goto cont_alloc;
1641 }
1642 ql_dbg(ql_dbg_init, vha, 0x00c3,
1643 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
1644
1645 eft_size = EFT_SIZE;
1646 ha->eft_dma = tc_dma;
1647 ha->eft = tc;
1648 }
1649
1650 cont_alloc:
1651 if (IS_QLA27XX(ha)) {
1652 if (!ha->fw_dump_template) {
1653 ql_log(ql_log_warn, vha, 0x00ba,
1654 "Failed missing fwdump template\n");
1655 return;
1656 }
1657 dump_size = qla27xx_fwdt_calculate_dump_size(vha);
1658 ql_dbg(ql_dbg_init, vha, 0x00fa,
1659 "-> allocating fwdump (%x bytes)...\n", dump_size);
1660 goto allocate;
1661 }
1662
1663 req_q_size = req->length * sizeof(request_t);
1664 rsp_q_size = rsp->length * sizeof(response_t);
1665 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
1666 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
1667 ha->chain_offset = dump_size;
1668 dump_size += mq_size + fce_size;
1669
1670 allocate:
1671 ha->fw_dump = vmalloc(dump_size);
1672 if (!ha->fw_dump) {
1673 ql_log(ql_log_warn, vha, 0x00c4,
1674 "Unable to allocate (%d KB) for firmware dump.\n",
1675 dump_size / 1024);
1676
1677 if (ha->fce) {
1678 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
1679 ha->fce_dma);
1680 ha->fce = NULL;
1681 ha->fce_dma = 0;
1682 }
1683
1684 if (ha->eft) {
1685 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
1686 ha->eft_dma);
1687 ha->eft = NULL;
1688 ha->eft_dma = 0;
1689 }
1690 return;
1691 }
1692 ha->fw_dump_len = dump_size;
1693 ql_dbg(ql_dbg_init, vha, 0x00c5,
1694 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024);
1695
1696 if (IS_QLA27XX(ha))
1697 return;
1698
1699 ha->fw_dump->signature[0] = 'Q';
1700 ha->fw_dump->signature[1] = 'L';
1701 ha->fw_dump->signature[2] = 'G';
1702 ha->fw_dump->signature[3] = 'C';
1703 ha->fw_dump->version = htonl(1);
1704
1705 ha->fw_dump->fixed_size = htonl(fixed_size);
1706 ha->fw_dump->mem_size = htonl(mem_size);
1707 ha->fw_dump->req_q_size = htonl(req_q_size);
1708 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
1709
1710 ha->fw_dump->eft_size = htonl(eft_size);
1711 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
1712 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
1713
1714 ha->fw_dump->header_size =
1715 htonl(offsetof(struct qla2xxx_fw_dump, isp));
1716 }
1717
1718 static int
1719 qla81xx_mpi_sync(scsi_qla_host_t *vha)
1720 {
1721 #define MPS_MASK 0xe0
1722 int rval;
1723 uint16_t dc;
1724 uint32_t dw;
1725
1726 if (!IS_QLA81XX(vha->hw))
1727 return QLA_SUCCESS;
1728
1729 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
1730 if (rval != QLA_SUCCESS) {
1731 ql_log(ql_log_warn, vha, 0x0105,
1732 "Unable to acquire semaphore.\n");
1733 goto done;
1734 }
1735
1736 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
1737 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
1738 if (rval != QLA_SUCCESS) {
1739 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
1740 goto done_release;
1741 }
1742
1743 dc &= MPS_MASK;
1744 if (dc == (dw & MPS_MASK))
1745 goto done_release;
1746
1747 dw &= ~MPS_MASK;
1748 dw |= dc;
1749 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
1750 if (rval != QLA_SUCCESS) {
1751 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
1752 }
1753
1754 done_release:
1755 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
1756 if (rval != QLA_SUCCESS) {
1757 ql_log(ql_log_warn, vha, 0x006d,
1758 "Unable to release semaphore.\n");
1759 }
1760
1761 done:
1762 return rval;
1763 }
1764
1765 int
1766 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
1767 {
1768 /* Don't try to reallocate the array */
1769 if (req->outstanding_cmds)
1770 return QLA_SUCCESS;
1771
1772 if (!IS_FWI2_CAPABLE(ha))
1773 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
1774 else {
1775 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
1776 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
1777 else
1778 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
1779 }
1780
1781 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
1782 req->num_outstanding_cmds, GFP_KERNEL);
1783
1784 if (!req->outstanding_cmds) {
1785 /*
1786 * Try to allocate a minimal size just so we can get through
1787 * initialization.
1788 */
1789 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
1790 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
1791 req->num_outstanding_cmds, GFP_KERNEL);
1792
1793 if (!req->outstanding_cmds) {
1794 ql_log(ql_log_fatal, NULL, 0x0126,
1795 "Failed to allocate memory for "
1796 "outstanding_cmds for req_que %p.\n", req);
1797 req->num_outstanding_cmds = 0;
1798 return QLA_FUNCTION_FAILED;
1799 }
1800 }
1801
1802 return QLA_SUCCESS;
1803 }
1804
1805 /**
1806 * qla2x00_setup_chip() - Load and start RISC firmware.
1807 * @ha: HA context
1808 *
1809 * Returns 0 on success.
1810 */
1811 static int
1812 qla2x00_setup_chip(scsi_qla_host_t *vha)
1813 {
1814 int rval;
1815 uint32_t srisc_address = 0;
1816 struct qla_hw_data *ha = vha->hw;
1817 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1818 unsigned long flags;
1819 uint16_t fw_major_version;
1820
1821 if (IS_P3P_TYPE(ha)) {
1822 rval = ha->isp_ops->load_risc(vha, &srisc_address);
1823 if (rval == QLA_SUCCESS) {
1824 qla2x00_stop_firmware(vha);
1825 goto enable_82xx_npiv;
1826 } else
1827 goto failed;
1828 }
1829
1830 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1831 /* Disable SRAM, Instruction RAM and GP RAM parity. */
1832 spin_lock_irqsave(&ha->hardware_lock, flags);
1833 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
1834 RD_REG_WORD(&reg->hccr);
1835 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1836 }
1837
1838 qla81xx_mpi_sync(vha);
1839
1840 /* Load firmware sequences */
1841 rval = ha->isp_ops->load_risc(vha, &srisc_address);
1842 if (rval == QLA_SUCCESS) {
1843 ql_dbg(ql_dbg_init, vha, 0x00c9,
1844 "Verifying Checksum of loaded RISC code.\n");
1845
1846 rval = qla2x00_verify_checksum(vha, srisc_address);
1847 if (rval == QLA_SUCCESS) {
1848 /* Start firmware execution. */
1849 ql_dbg(ql_dbg_init, vha, 0x00ca,
1850 "Starting firmware.\n");
1851
1852 if (ql2xexlogins)
1853 ha->flags.exlogins_enabled = 1;
1854
1855 if (ql2xexchoffld)
1856 ha->flags.exchoffld_enabled = 1;
1857
1858 rval = qla2x00_execute_fw(vha, srisc_address);
1859 /* Retrieve firmware information. */
1860 if (rval == QLA_SUCCESS) {
1861 rval = qla2x00_set_exlogins_buffer(vha);
1862 if (rval != QLA_SUCCESS)
1863 goto failed;
1864
1865 rval = qla2x00_set_exchoffld_buffer(vha);
1866 if (rval != QLA_SUCCESS)
1867 goto failed;
1868
1869 enable_82xx_npiv:
1870 fw_major_version = ha->fw_major_version;
1871 if (IS_P3P_TYPE(ha))
1872 qla82xx_check_md_needed(vha);
1873 else
1874 rval = qla2x00_get_fw_version(vha);
1875 if (rval != QLA_SUCCESS)
1876 goto failed;
1877 ha->flags.npiv_supported = 0;
1878 if (IS_QLA2XXX_MIDTYPE(ha) &&
1879 (ha->fw_attributes & BIT_2)) {
1880 ha->flags.npiv_supported = 1;
1881 if ((!ha->max_npiv_vports) ||
1882 ((ha->max_npiv_vports + 1) %
1883 MIN_MULTI_ID_FABRIC))
1884 ha->max_npiv_vports =
1885 MIN_MULTI_ID_FABRIC - 1;
1886 }
1887 qla2x00_get_resource_cnts(vha);
1888
1889 /*
1890 * Allocate the array of outstanding commands
1891 * now that we know the firmware resources.
1892 */
1893 rval = qla2x00_alloc_outstanding_cmds(ha,
1894 vha->req);
1895 if (rval != QLA_SUCCESS)
1896 goto failed;
1897
1898 if (!fw_major_version && ql2xallocfwdump
1899 && !(IS_P3P_TYPE(ha)))
1900 qla2x00_alloc_fw_dump(vha);
1901 } else {
1902 goto failed;
1903 }
1904 } else {
1905 ql_log(ql_log_fatal, vha, 0x00cd,
1906 "ISP Firmware failed checksum.\n");
1907 goto failed;
1908 }
1909 } else
1910 goto failed;
1911
1912 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1913 /* Enable proper parity. */
1914 spin_lock_irqsave(&ha->hardware_lock, flags);
1915 if (IS_QLA2300(ha))
1916 /* SRAM parity */
1917 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
1918 else
1919 /* SRAM, Instruction RAM and GP RAM parity */
1920 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
1921 RD_REG_WORD(&reg->hccr);
1922 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1923 }
1924
1925 if (IS_QLA27XX(ha))
1926 ha->flags.fac_supported = 1;
1927 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1928 uint32_t size;
1929
1930 rval = qla81xx_fac_get_sector_size(vha, &size);
1931 if (rval == QLA_SUCCESS) {
1932 ha->flags.fac_supported = 1;
1933 ha->fdt_block_size = size << 2;
1934 } else {
1935 ql_log(ql_log_warn, vha, 0x00ce,
1936 "Unsupported FAC firmware (%d.%02d.%02d).\n",
1937 ha->fw_major_version, ha->fw_minor_version,
1938 ha->fw_subminor_version);
1939
1940 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
1941 ha->flags.fac_supported = 0;
1942 rval = QLA_SUCCESS;
1943 }
1944 }
1945 }
1946 failed:
1947 if (rval) {
1948 ql_log(ql_log_fatal, vha, 0x00cf,
1949 "Setup chip ****FAILED****.\n");
1950 }
1951
1952 return (rval);
1953 }
1954
1955 /**
1956 * qla2x00_init_response_q_entries() - Initializes response queue entries.
1957 * @ha: HA context
1958 *
1959 * Beginning of request ring has initialization control block already built
1960 * by nvram config routine.
1961 *
1962 * Returns 0 on success.
1963 */
1964 void
1965 qla2x00_init_response_q_entries(struct rsp_que *rsp)
1966 {
1967 uint16_t cnt;
1968 response_t *pkt;
1969
1970 rsp->ring_ptr = rsp->ring;
1971 rsp->ring_index = 0;
1972 rsp->status_srb = NULL;
1973 pkt = rsp->ring_ptr;
1974 for (cnt = 0; cnt < rsp->length; cnt++) {
1975 pkt->signature = RESPONSE_PROCESSED;
1976 pkt++;
1977 }
1978 }
1979
1980 /**
1981 * qla2x00_update_fw_options() - Read and process firmware options.
1982 * @ha: HA context
1983 *
1984 * Returns 0 on success.
1985 */
1986 void
1987 qla2x00_update_fw_options(scsi_qla_host_t *vha)
1988 {
1989 uint16_t swing, emphasis, tx_sens, rx_sens;
1990 struct qla_hw_data *ha = vha->hw;
1991
1992 memset(ha->fw_options, 0, sizeof(ha->fw_options));
1993 qla2x00_get_fw_options(vha, ha->fw_options);
1994
1995 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1996 return;
1997
1998 /* Serial Link options. */
1999 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
2000 "Serial link options.\n");
2001 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
2002 (uint8_t *)&ha->fw_seriallink_options,
2003 sizeof(ha->fw_seriallink_options));
2004
2005 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
2006 if (ha->fw_seriallink_options[3] & BIT_2) {
2007 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
2008
2009 /* 1G settings */
2010 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
2011 emphasis = (ha->fw_seriallink_options[2] &
2012 (BIT_4 | BIT_3)) >> 3;
2013 tx_sens = ha->fw_seriallink_options[0] &
2014 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2015 rx_sens = (ha->fw_seriallink_options[0] &
2016 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
2017 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
2018 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
2019 if (rx_sens == 0x0)
2020 rx_sens = 0x3;
2021 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
2022 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
2023 ha->fw_options[10] |= BIT_5 |
2024 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
2025 (tx_sens & (BIT_1 | BIT_0));
2026
2027 /* 2G settings */
2028 swing = (ha->fw_seriallink_options[2] &
2029 (BIT_7 | BIT_6 | BIT_5)) >> 5;
2030 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
2031 tx_sens = ha->fw_seriallink_options[1] &
2032 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2033 rx_sens = (ha->fw_seriallink_options[1] &
2034 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
2035 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
2036 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
2037 if (rx_sens == 0x0)
2038 rx_sens = 0x3;
2039 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
2040 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
2041 ha->fw_options[11] |= BIT_5 |
2042 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
2043 (tx_sens & (BIT_1 | BIT_0));
2044 }
2045
2046 /* FCP2 options. */
2047 /* Return command IOCBs without waiting for an ABTS to complete. */
2048 ha->fw_options[3] |= BIT_13;
2049
2050 /* LED scheme. */
2051 if (ha->flags.enable_led_scheme)
2052 ha->fw_options[2] |= BIT_12;
2053
2054 /* Detect ISP6312. */
2055 if (IS_QLA6312(ha))
2056 ha->fw_options[2] |= BIT_13;
2057
2058 /* Set Retry FLOGI in case of P2P connection */
2059 if (ha->operating_mode == P2P) {
2060 ha->fw_options[2] |= BIT_3;
2061 ql_dbg(ql_dbg_disc, vha, 0x2100,
2062 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
2063 __func__, ha->fw_options[2]);
2064 }
2065
2066 /* Update firmware options. */
2067 qla2x00_set_fw_options(vha, ha->fw_options);
2068 }
2069
2070 void
2071 qla24xx_update_fw_options(scsi_qla_host_t *vha)
2072 {
2073 int rval;
2074 struct qla_hw_data *ha = vha->hw;
2075
2076 if (IS_P3P_TYPE(ha))
2077 return;
2078
2079 /* Hold status IOCBs until ABTS response received. */
2080 if (ql2xfwholdabts)
2081 ha->fw_options[3] |= BIT_12;
2082
2083 /* Set Retry FLOGI in case of P2P connection */
2084 if (ha->operating_mode == P2P) {
2085 ha->fw_options[2] |= BIT_3;
2086 ql_dbg(ql_dbg_disc, vha, 0x2101,
2087 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
2088 __func__, ha->fw_options[2]);
2089 }
2090
2091 /* Update Serial Link options. */
2092 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
2093 return;
2094
2095 rval = qla2x00_set_serdes_params(vha,
2096 le16_to_cpu(ha->fw_seriallink_options24[1]),
2097 le16_to_cpu(ha->fw_seriallink_options24[2]),
2098 le16_to_cpu(ha->fw_seriallink_options24[3]));
2099 if (rval != QLA_SUCCESS) {
2100 ql_log(ql_log_warn, vha, 0x0104,
2101 "Unable to update Serial Link options (%x).\n", rval);
2102 }
2103 }
2104
2105 void
2106 qla2x00_config_rings(struct scsi_qla_host *vha)
2107 {
2108 struct qla_hw_data *ha = vha->hw;
2109 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2110 struct req_que *req = ha->req_q_map[0];
2111 struct rsp_que *rsp = ha->rsp_q_map[0];
2112
2113 /* Setup ring parameters in initialization control block. */
2114 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
2115 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
2116 ha->init_cb->request_q_length = cpu_to_le16(req->length);
2117 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
2118 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
2119 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
2120 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
2121 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
2122
2123 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
2124 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
2125 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
2126 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
2127 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
2128 }
2129
2130 void
2131 qla24xx_config_rings(struct scsi_qla_host *vha)
2132 {
2133 struct qla_hw_data *ha = vha->hw;
2134 device_reg_t *reg = ISP_QUE_REG(ha, 0);
2135 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
2136 struct qla_msix_entry *msix;
2137 struct init_cb_24xx *icb;
2138 uint16_t rid = 0;
2139 struct req_que *req = ha->req_q_map[0];
2140 struct rsp_que *rsp = ha->rsp_q_map[0];
2141
2142 /* Setup ring parameters in initialization control block. */
2143 icb = (struct init_cb_24xx *)ha->init_cb;
2144 icb->request_q_outpointer = cpu_to_le16(0);
2145 icb->response_q_inpointer = cpu_to_le16(0);
2146 icb->request_q_length = cpu_to_le16(req->length);
2147 icb->response_q_length = cpu_to_le16(rsp->length);
2148 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
2149 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
2150 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
2151 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
2152
2153 /* Setup ATIO queue dma pointers for target mode */
2154 icb->atio_q_inpointer = cpu_to_le16(0);
2155 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
2156 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
2157 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
2158
2159 if (IS_SHADOW_REG_CAPABLE(ha))
2160 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
2161
2162 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2163 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
2164 icb->rid = cpu_to_le16(rid);
2165 if (ha->flags.msix_enabled) {
2166 msix = &ha->msix_entries[1];
2167 ql_dbg(ql_dbg_init, vha, 0x00fd,
2168 "Registering vector 0x%x for base que.\n",
2169 msix->entry);
2170 icb->msix = cpu_to_le16(msix->entry);
2171 }
2172 /* Use alternate PCI bus number */
2173 if (MSB(rid))
2174 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
2175 /* Use alternate PCI devfn */
2176 if (LSB(rid))
2177 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
2178
2179 /* Use Disable MSIX Handshake mode for capable adapters */
2180 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
2181 (ha->flags.msix_enabled)) {
2182 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
2183 ha->flags.disable_msix_handshake = 1;
2184 ql_dbg(ql_dbg_init, vha, 0x00fe,
2185 "MSIX Handshake Disable Mode turned on.\n");
2186 } else {
2187 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
2188 }
2189 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
2190
2191 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
2192 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
2193 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
2194 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
2195 } else {
2196 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
2197 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
2198 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
2199 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
2200 }
2201 qlt_24xx_config_rings(vha);
2202
2203 /* PCI posting */
2204 RD_REG_DWORD(&ioreg->hccr);
2205 }
2206
2207 /**
2208 * qla2x00_init_rings() - Initializes firmware.
2209 * @ha: HA context
2210 *
2211 * Beginning of request ring has initialization control block already built
2212 * by nvram config routine.
2213 *
2214 * Returns 0 on success.
2215 */
2216 int
2217 qla2x00_init_rings(scsi_qla_host_t *vha)
2218 {
2219 int rval;
2220 unsigned long flags = 0;
2221 int cnt, que;
2222 struct qla_hw_data *ha = vha->hw;
2223 struct req_que *req;
2224 struct rsp_que *rsp;
2225 struct mid_init_cb_24xx *mid_init_cb =
2226 (struct mid_init_cb_24xx *) ha->init_cb;
2227
2228 spin_lock_irqsave(&ha->hardware_lock, flags);
2229
2230 /* Clear outstanding commands array. */
2231 for (que = 0; que < ha->max_req_queues; que++) {
2232 req = ha->req_q_map[que];
2233 if (!req || !test_bit(que, ha->req_qid_map))
2234 continue;
2235 req->out_ptr = (void *)(req->ring + req->length);
2236 *req->out_ptr = 0;
2237 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
2238 req->outstanding_cmds[cnt] = NULL;
2239
2240 req->current_outstanding_cmd = 1;
2241
2242 /* Initialize firmware. */
2243 req->ring_ptr = req->ring;
2244 req->ring_index = 0;
2245 req->cnt = req->length;
2246 }
2247
2248 for (que = 0; que < ha->max_rsp_queues; que++) {
2249 rsp = ha->rsp_q_map[que];
2250 if (!rsp || !test_bit(que, ha->rsp_qid_map))
2251 continue;
2252 rsp->in_ptr = (void *)(rsp->ring + rsp->length);
2253 *rsp->in_ptr = 0;
2254 /* Initialize response queue entries */
2255 if (IS_QLAFX00(ha))
2256 qlafx00_init_response_q_entries(rsp);
2257 else
2258 qla2x00_init_response_q_entries(rsp);
2259 }
2260
2261 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
2262 ha->tgt.atio_ring_index = 0;
2263 /* Initialize ATIO queue entries */
2264 qlt_init_atio_q_entries(vha);
2265
2266 ha->isp_ops->config_rings(vha);
2267
2268 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2269
2270 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
2271
2272 if (IS_QLAFX00(ha)) {
2273 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
2274 goto next_check;
2275 }
2276
2277 /* Update any ISP specific firmware options before initialization. */
2278 ha->isp_ops->update_fw_options(vha);
2279
2280 if (ha->flags.npiv_supported) {
2281 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
2282 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
2283 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
2284 }
2285
2286 if (IS_FWI2_CAPABLE(ha)) {
2287 mid_init_cb->options = cpu_to_le16(BIT_1);
2288 mid_init_cb->init_cb.execution_throttle =
2289 cpu_to_le16(ha->cur_fw_xcb_count);
2290 ha->flags.dport_enabled =
2291 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0;
2292 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
2293 (ha->flags.dport_enabled) ? "enabled" : "disabled");
2294 /* FA-WWPN Status */
2295 ha->flags.fawwpn_enabled =
2296 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0;
2297 ql_dbg(ql_dbg_init, vha, 0x0141, "FA-WWPN Support: %s.\n",
2298 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
2299 }
2300
2301 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
2302 next_check:
2303 if (rval) {
2304 ql_log(ql_log_fatal, vha, 0x00d2,
2305 "Init Firmware **** FAILED ****.\n");
2306 } else {
2307 ql_dbg(ql_dbg_init, vha, 0x00d3,
2308 "Init Firmware -- success.\n");
2309 }
2310
2311 return (rval);
2312 }
2313
2314 /**
2315 * qla2x00_fw_ready() - Waits for firmware ready.
2316 * @ha: HA context
2317 *
2318 * Returns 0 on success.
2319 */
2320 static int
2321 qla2x00_fw_ready(scsi_qla_host_t *vha)
2322 {
2323 int rval;
2324 unsigned long wtime, mtime, cs84xx_time;
2325 uint16_t min_wait; /* Minimum wait time if loop is down */
2326 uint16_t wait_time; /* Wait time if loop is coming ready */
2327 uint16_t state[6];
2328 struct qla_hw_data *ha = vha->hw;
2329
2330 if (IS_QLAFX00(vha->hw))
2331 return qlafx00_fw_ready(vha);
2332
2333 rval = QLA_SUCCESS;
2334
2335 /* Time to wait for loop down */
2336 if (IS_P3P_TYPE(ha))
2337 min_wait = 30;
2338 else
2339 min_wait = 20;
2340
2341 /*
2342 * Firmware should take at most one RATOV to login, plus 5 seconds for
2343 * our own processing.
2344 */
2345 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
2346 wait_time = min_wait;
2347 }
2348
2349 /* Min wait time if loop down */
2350 mtime = jiffies + (min_wait * HZ);
2351
2352 /* wait time before firmware ready */
2353 wtime = jiffies + (wait_time * HZ);
2354
2355 /* Wait for ISP to finish LIP */
2356 if (!vha->flags.init_done)
2357 ql_log(ql_log_info, vha, 0x801e,
2358 "Waiting for LIP to complete.\n");
2359
2360 do {
2361 memset(state, -1, sizeof(state));
2362 rval = qla2x00_get_firmware_state(vha, state);
2363 if (rval == QLA_SUCCESS) {
2364 if (state[0] < FSTATE_LOSS_OF_SYNC) {
2365 vha->device_flags &= ~DFLG_NO_CABLE;
2366 }
2367 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
2368 ql_dbg(ql_dbg_taskm, vha, 0x801f,
2369 "fw_state=%x 84xx=%x.\n", state[0],
2370 state[2]);
2371 if ((state[2] & FSTATE_LOGGED_IN) &&
2372 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
2373 ql_dbg(ql_dbg_taskm, vha, 0x8028,
2374 "Sending verify iocb.\n");
2375
2376 cs84xx_time = jiffies;
2377 rval = qla84xx_init_chip(vha);
2378 if (rval != QLA_SUCCESS) {
2379 ql_log(ql_log_warn,
2380 vha, 0x8007,
2381 "Init chip failed.\n");
2382 break;
2383 }
2384
2385 /* Add time taken to initialize. */
2386 cs84xx_time = jiffies - cs84xx_time;
2387 wtime += cs84xx_time;
2388 mtime += cs84xx_time;
2389 ql_dbg(ql_dbg_taskm, vha, 0x8008,
2390 "Increasing wait time by %ld. "
2391 "New time %ld.\n", cs84xx_time,
2392 wtime);
2393 }
2394 } else if (state[0] == FSTATE_READY) {
2395 ql_dbg(ql_dbg_taskm, vha, 0x8037,
2396 "F/W Ready - OK.\n");
2397
2398 qla2x00_get_retry_cnt(vha, &ha->retry_count,
2399 &ha->login_timeout, &ha->r_a_tov);
2400
2401 rval = QLA_SUCCESS;
2402 break;
2403 }
2404
2405 rval = QLA_FUNCTION_FAILED;
2406
2407 if (atomic_read(&vha->loop_down_timer) &&
2408 state[0] != FSTATE_READY) {
2409 /* Loop down. Timeout on min_wait for states
2410 * other than Wait for Login.
2411 */
2412 if (time_after_eq(jiffies, mtime)) {
2413 ql_log(ql_log_info, vha, 0x8038,
2414 "Cable is unplugged...\n");
2415
2416 vha->device_flags |= DFLG_NO_CABLE;
2417 break;
2418 }
2419 }
2420 } else {
2421 /* Mailbox cmd failed. Timeout on min_wait. */
2422 if (time_after_eq(jiffies, mtime) ||
2423 ha->flags.isp82xx_fw_hung)
2424 break;
2425 }
2426
2427 if (time_after_eq(jiffies, wtime))
2428 break;
2429
2430 /* Delay for a while */
2431 msleep(500);
2432 } while (1);
2433
2434 ql_dbg(ql_dbg_taskm, vha, 0x803a,
2435 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
2436 state[1], state[2], state[3], state[4], state[5], jiffies);
2437
2438 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
2439 ql_log(ql_log_warn, vha, 0x803b,
2440 "Firmware ready **** FAILED ****.\n");
2441 }
2442
2443 return (rval);
2444 }
2445
2446 /*
2447 * qla2x00_configure_hba
2448 * Setup adapter context.
2449 *
2450 * Input:
2451 * ha = adapter state pointer.
2452 *
2453 * Returns:
2454 * 0 = success
2455 *
2456 * Context:
2457 * Kernel context.
2458 */
2459 static int
2460 qla2x00_configure_hba(scsi_qla_host_t *vha)
2461 {
2462 int rval;
2463 uint16_t loop_id;
2464 uint16_t topo;
2465 uint16_t sw_cap;
2466 uint8_t al_pa;
2467 uint8_t area;
2468 uint8_t domain;
2469 char connect_type[22];
2470 struct qla_hw_data *ha = vha->hw;
2471 unsigned long flags;
2472 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
2473
2474 /* Get host addresses. */
2475 rval = qla2x00_get_adapter_id(vha,
2476 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
2477 if (rval != QLA_SUCCESS) {
2478 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
2479 IS_CNA_CAPABLE(ha) ||
2480 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
2481 ql_dbg(ql_dbg_disc, vha, 0x2008,
2482 "Loop is in a transition state.\n");
2483 } else {
2484 ql_log(ql_log_warn, vha, 0x2009,
2485 "Unable to get host loop ID.\n");
2486 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
2487 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
2488 ql_log(ql_log_warn, vha, 0x1151,
2489 "Doing link init.\n");
2490 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
2491 return rval;
2492 }
2493 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2494 }
2495 return (rval);
2496 }
2497
2498 if (topo == 4) {
2499 ql_log(ql_log_info, vha, 0x200a,
2500 "Cannot get topology - retrying.\n");
2501 return (QLA_FUNCTION_FAILED);
2502 }
2503
2504 vha->loop_id = loop_id;
2505
2506 /* initialize */
2507 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
2508 ha->operating_mode = LOOP;
2509 ha->switch_cap = 0;
2510
2511 switch (topo) {
2512 case 0:
2513 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
2514 ha->current_topology = ISP_CFG_NL;
2515 strcpy(connect_type, "(Loop)");
2516 break;
2517
2518 case 1:
2519 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2520 ha->switch_cap = sw_cap;
2521 ha->current_topology = ISP_CFG_FL;
2522 strcpy(connect_type, "(FL_Port)");
2523 break;
2524
2525 case 2:
2526 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
2527 ha->operating_mode = P2P;
2528 ha->current_topology = ISP_CFG_N;
2529 strcpy(connect_type, "(N_Port-to-N_Port)");
2530 break;
2531
2532 case 3:
2533 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2534 ha->switch_cap = sw_cap;
2535 ha->operating_mode = P2P;
2536 ha->current_topology = ISP_CFG_F;
2537 strcpy(connect_type, "(F_Port)");
2538 break;
2539
2540 default:
2541 ql_dbg(ql_dbg_disc, vha, 0x200f,
2542 "HBA in unknown topology %x, using NL.\n", topo);
2543 ha->current_topology = ISP_CFG_NL;
2544 strcpy(connect_type, "(Loop)");
2545 break;
2546 }
2547
2548 /* Save Host port and loop ID. */
2549 /* byte order - Big Endian */
2550 vha->d_id.b.domain = domain;
2551 vha->d_id.b.area = area;
2552 vha->d_id.b.al_pa = al_pa;
2553
2554 spin_lock_irqsave(&ha->vport_slock, flags);
2555 qlt_update_vp_map(vha, SET_AL_PA);
2556 spin_unlock_irqrestore(&ha->vport_slock, flags);
2557
2558 if (!vha->flags.init_done)
2559 ql_log(ql_log_info, vha, 0x2010,
2560 "Topology - %s, Host Loop address 0x%x.\n",
2561 connect_type, vha->loop_id);
2562
2563 return(rval);
2564 }
2565
2566 inline void
2567 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
2568 char *def)
2569 {
2570 char *st, *en;
2571 uint16_t index;
2572 struct qla_hw_data *ha = vha->hw;
2573 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
2574 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
2575
2576 if (memcmp(model, BINZERO, len) != 0) {
2577 strncpy(ha->model_number, model, len);
2578 st = en = ha->model_number;
2579 en += len - 1;
2580 while (en > st) {
2581 if (*en != 0x20 && *en != 0x00)
2582 break;
2583 *en-- = '\0';
2584 }
2585
2586 index = (ha->pdev->subsystem_device & 0xff);
2587 if (use_tbl &&
2588 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
2589 index < QLA_MODEL_NAMES)
2590 strncpy(ha->model_desc,
2591 qla2x00_model_name[index * 2 + 1],
2592 sizeof(ha->model_desc) - 1);
2593 } else {
2594 index = (ha->pdev->subsystem_device & 0xff);
2595 if (use_tbl &&
2596 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
2597 index < QLA_MODEL_NAMES) {
2598 strcpy(ha->model_number,
2599 qla2x00_model_name[index * 2]);
2600 strncpy(ha->model_desc,
2601 qla2x00_model_name[index * 2 + 1],
2602 sizeof(ha->model_desc) - 1);
2603 } else {
2604 strcpy(ha->model_number, def);
2605 }
2606 }
2607 if (IS_FWI2_CAPABLE(ha))
2608 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
2609 sizeof(ha->model_desc));
2610 }
2611
2612 /* On sparc systems, obtain port and node WWN from firmware
2613 * properties.
2614 */
2615 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
2616 {
2617 #ifdef CONFIG_SPARC
2618 struct qla_hw_data *ha = vha->hw;
2619 struct pci_dev *pdev = ha->pdev;
2620 struct device_node *dp = pci_device_to_OF_node(pdev);
2621 const u8 *val;
2622 int len;
2623
2624 val = of_get_property(dp, "port-wwn", &len);
2625 if (val && len >= WWN_SIZE)
2626 memcpy(nv->port_name, val, WWN_SIZE);
2627
2628 val = of_get_property(dp, "node-wwn", &len);
2629 if (val && len >= WWN_SIZE)
2630 memcpy(nv->node_name, val, WWN_SIZE);
2631 #endif
2632 }
2633
2634 /*
2635 * NVRAM configuration for ISP 2xxx
2636 *
2637 * Input:
2638 * ha = adapter block pointer.
2639 *
2640 * Output:
2641 * initialization control block in response_ring
2642 * host adapters parameters in host adapter block
2643 *
2644 * Returns:
2645 * 0 = success.
2646 */
2647 int
2648 qla2x00_nvram_config(scsi_qla_host_t *vha)
2649 {
2650 int rval;
2651 uint8_t chksum = 0;
2652 uint16_t cnt;
2653 uint8_t *dptr1, *dptr2;
2654 struct qla_hw_data *ha = vha->hw;
2655 init_cb_t *icb = ha->init_cb;
2656 nvram_t *nv = ha->nvram;
2657 uint8_t *ptr = ha->nvram;
2658 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2659
2660 rval = QLA_SUCCESS;
2661
2662 /* Determine NVRAM starting address. */
2663 ha->nvram_size = sizeof(nvram_t);
2664 ha->nvram_base = 0;
2665 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
2666 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
2667 ha->nvram_base = 0x80;
2668
2669 /* Get NVRAM data and calculate checksum. */
2670 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
2671 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
2672 chksum += *ptr++;
2673
2674 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
2675 "Contents of NVRAM.\n");
2676 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
2677 (uint8_t *)nv, ha->nvram_size);
2678
2679 /* Bad NVRAM data, set defaults parameters. */
2680 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
2681 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
2682 /* Reset NVRAM data. */
2683 ql_log(ql_log_warn, vha, 0x0064,
2684 "Inconsistent NVRAM "
2685 "detected: checksum=0x%x id=%c version=0x%x.\n",
2686 chksum, nv->id[0], nv->nvram_version);
2687 ql_log(ql_log_warn, vha, 0x0065,
2688 "Falling back to "
2689 "functioning (yet invalid -- WWPN) defaults.\n");
2690
2691 /*
2692 * Set default initialization control block.
2693 */
2694 memset(nv, 0, ha->nvram_size);
2695 nv->parameter_block_version = ICB_VERSION;
2696
2697 if (IS_QLA23XX(ha)) {
2698 nv->firmware_options[0] = BIT_2 | BIT_1;
2699 nv->firmware_options[1] = BIT_7 | BIT_5;
2700 nv->add_firmware_options[0] = BIT_5;
2701 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2702 nv->frame_payload_size = 2048;
2703 nv->special_options[1] = BIT_7;
2704 } else if (IS_QLA2200(ha)) {
2705 nv->firmware_options[0] = BIT_2 | BIT_1;
2706 nv->firmware_options[1] = BIT_7 | BIT_5;
2707 nv->add_firmware_options[0] = BIT_5;
2708 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2709 nv->frame_payload_size = 1024;
2710 } else if (IS_QLA2100(ha)) {
2711 nv->firmware_options[0] = BIT_3 | BIT_1;
2712 nv->firmware_options[1] = BIT_5;
2713 nv->frame_payload_size = 1024;
2714 }
2715
2716 nv->max_iocb_allocation = cpu_to_le16(256);
2717 nv->execution_throttle = cpu_to_le16(16);
2718 nv->retry_count = 8;
2719 nv->retry_delay = 1;
2720
2721 nv->port_name[0] = 33;
2722 nv->port_name[3] = 224;
2723 nv->port_name[4] = 139;
2724
2725 qla2xxx_nvram_wwn_from_ofw(vha, nv);
2726
2727 nv->login_timeout = 4;
2728
2729 /*
2730 * Set default host adapter parameters
2731 */
2732 nv->host_p[1] = BIT_2;
2733 nv->reset_delay = 5;
2734 nv->port_down_retry_count = 8;
2735 nv->max_luns_per_target = cpu_to_le16(8);
2736 nv->link_down_timeout = 60;
2737
2738 rval = 1;
2739 }
2740
2741 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
2742 /*
2743 * The SN2 does not provide BIOS emulation which means you can't change
2744 * potentially bogus BIOS settings. Force the use of default settings
2745 * for link rate and frame size. Hope that the rest of the settings
2746 * are valid.
2747 */
2748 if (ia64_platform_is("sn2")) {
2749 nv->frame_payload_size = 2048;
2750 if (IS_QLA23XX(ha))
2751 nv->special_options[1] = BIT_7;
2752 }
2753 #endif
2754
2755 /* Reset Initialization control block */
2756 memset(icb, 0, ha->init_cb_size);
2757
2758 /*
2759 * Setup driver NVRAM options.
2760 */
2761 nv->firmware_options[0] |= (BIT_6 | BIT_1);
2762 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
2763 nv->firmware_options[1] |= (BIT_5 | BIT_0);
2764 nv->firmware_options[1] &= ~BIT_4;
2765
2766 if (IS_QLA23XX(ha)) {
2767 nv->firmware_options[0] |= BIT_2;
2768 nv->firmware_options[0] &= ~BIT_3;
2769 nv->special_options[0] &= ~BIT_6;
2770 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
2771
2772 if (IS_QLA2300(ha)) {
2773 if (ha->fb_rev == FPM_2310) {
2774 strcpy(ha->model_number, "QLA2310");
2775 } else {
2776 strcpy(ha->model_number, "QLA2300");
2777 }
2778 } else {
2779 qla2x00_set_model_info(vha, nv->model_number,
2780 sizeof(nv->model_number), "QLA23xx");
2781 }
2782 } else if (IS_QLA2200(ha)) {
2783 nv->firmware_options[0] |= BIT_2;
2784 /*
2785 * 'Point-to-point preferred, else loop' is not a safe
2786 * connection mode setting.
2787 */
2788 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
2789 (BIT_5 | BIT_4)) {
2790 /* Force 'loop preferred, else point-to-point'. */
2791 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
2792 nv->add_firmware_options[0] |= BIT_5;
2793 }
2794 strcpy(ha->model_number, "QLA22xx");
2795 } else /*if (IS_QLA2100(ha))*/ {
2796 strcpy(ha->model_number, "QLA2100");
2797 }
2798
2799 /*
2800 * Copy over NVRAM RISC parameter block to initialization control block.
2801 */
2802 dptr1 = (uint8_t *)icb;
2803 dptr2 = (uint8_t *)&nv->parameter_block_version;
2804 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
2805 while (cnt--)
2806 *dptr1++ = *dptr2++;
2807
2808 /* Copy 2nd half. */
2809 dptr1 = (uint8_t *)icb->add_firmware_options;
2810 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
2811 while (cnt--)
2812 *dptr1++ = *dptr2++;
2813
2814 /* Use alternate WWN? */
2815 if (nv->host_p[1] & BIT_7) {
2816 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
2817 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
2818 }
2819
2820 /* Prepare nodename */
2821 if ((icb->firmware_options[1] & BIT_6) == 0) {
2822 /*
2823 * Firmware will apply the following mask if the nodename was
2824 * not provided.
2825 */
2826 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
2827 icb->node_name[0] &= 0xF0;
2828 }
2829
2830 /*
2831 * Set host adapter parameters.
2832 */
2833
2834 /*
2835 * BIT_7 in the host-parameters section allows for modification to
2836 * internal driver logging.
2837 */
2838 if (nv->host_p[0] & BIT_7)
2839 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
2840 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
2841 /* Always load RISC code on non ISP2[12]00 chips. */
2842 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
2843 ha->flags.disable_risc_code_load = 0;
2844 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
2845 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
2846 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
2847 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
2848 ha->flags.disable_serdes = 0;
2849
2850 ha->operating_mode =
2851 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
2852
2853 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
2854 sizeof(ha->fw_seriallink_options));
2855
2856 /* save HBA serial number */
2857 ha->serial0 = icb->port_name[5];
2858 ha->serial1 = icb->port_name[6];
2859 ha->serial2 = icb->port_name[7];
2860 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
2861 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
2862
2863 icb->execution_throttle = cpu_to_le16(0xFFFF);
2864
2865 ha->retry_count = nv->retry_count;
2866
2867 /* Set minimum login_timeout to 4 seconds. */
2868 if (nv->login_timeout != ql2xlogintimeout)
2869 nv->login_timeout = ql2xlogintimeout;
2870 if (nv->login_timeout < 4)
2871 nv->login_timeout = 4;
2872 ha->login_timeout = nv->login_timeout;
2873
2874 /* Set minimum RATOV to 100 tenths of a second. */
2875 ha->r_a_tov = 100;
2876
2877 ha->loop_reset_delay = nv->reset_delay;
2878
2879 /* Link Down Timeout = 0:
2880 *
2881 * When Port Down timer expires we will start returning
2882 * I/O's to OS with "DID_NO_CONNECT".
2883 *
2884 * Link Down Timeout != 0:
2885 *
2886 * The driver waits for the link to come up after link down
2887 * before returning I/Os to OS with "DID_NO_CONNECT".
2888 */
2889 if (nv->link_down_timeout == 0) {
2890 ha->loop_down_abort_time =
2891 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
2892 } else {
2893 ha->link_down_timeout = nv->link_down_timeout;
2894 ha->loop_down_abort_time =
2895 (LOOP_DOWN_TIME - ha->link_down_timeout);
2896 }
2897
2898 /*
2899 * Need enough time to try and get the port back.
2900 */
2901 ha->port_down_retry_count = nv->port_down_retry_count;
2902 if (qlport_down_retry)
2903 ha->port_down_retry_count = qlport_down_retry;
2904 /* Set login_retry_count */
2905 ha->login_retry_count = nv->retry_count;
2906 if (ha->port_down_retry_count == nv->port_down_retry_count &&
2907 ha->port_down_retry_count > 3)
2908 ha->login_retry_count = ha->port_down_retry_count;
2909 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
2910 ha->login_retry_count = ha->port_down_retry_count;
2911 if (ql2xloginretrycount)
2912 ha->login_retry_count = ql2xloginretrycount;
2913
2914 icb->lun_enables = cpu_to_le16(0);
2915 icb->command_resource_count = 0;
2916 icb->immediate_notify_resource_count = 0;
2917 icb->timeout = cpu_to_le16(0);
2918
2919 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2920 /* Enable RIO */
2921 icb->firmware_options[0] &= ~BIT_3;
2922 icb->add_firmware_options[0] &=
2923 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2924 icb->add_firmware_options[0] |= BIT_2;
2925 icb->response_accumulation_timer = 3;
2926 icb->interrupt_delay_timer = 5;
2927
2928 vha->flags.process_response_queue = 1;
2929 } else {
2930 /* Enable ZIO. */
2931 if (!vha->flags.init_done) {
2932 ha->zio_mode = icb->add_firmware_options[0] &
2933 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2934 ha->zio_timer = icb->interrupt_delay_timer ?
2935 icb->interrupt_delay_timer: 2;
2936 }
2937 icb->add_firmware_options[0] &=
2938 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2939 vha->flags.process_response_queue = 0;
2940 if (ha->zio_mode != QLA_ZIO_DISABLED) {
2941 ha->zio_mode = QLA_ZIO_MODE_6;
2942
2943 ql_log(ql_log_info, vha, 0x0068,
2944 "ZIO mode %d enabled; timer delay (%d us).\n",
2945 ha->zio_mode, ha->zio_timer * 100);
2946
2947 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
2948 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
2949 vha->flags.process_response_queue = 1;
2950 }
2951 }
2952
2953 if (rval) {
2954 ql_log(ql_log_warn, vha, 0x0069,
2955 "NVRAM configuration failed.\n");
2956 }
2957 return (rval);
2958 }
2959
2960 static void
2961 qla2x00_rport_del(void *data)
2962 {
2963 fc_port_t *fcport = data;
2964 struct fc_rport *rport;
2965 unsigned long flags;
2966
2967 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
2968 rport = fcport->drport ? fcport->drport: fcport->rport;
2969 fcport->drport = NULL;
2970 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
2971 if (rport)
2972 fc_remote_port_delete(rport);
2973 }
2974
2975 /**
2976 * qla2x00_alloc_fcport() - Allocate a generic fcport.
2977 * @ha: HA context
2978 * @flags: allocation flags
2979 *
2980 * Returns a pointer to the allocated fcport, or NULL, if none available.
2981 */
2982 fc_port_t *
2983 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
2984 {
2985 fc_port_t *fcport;
2986
2987 fcport = kzalloc(sizeof(fc_port_t), flags);
2988 if (!fcport)
2989 return NULL;
2990
2991 /* Setup fcport template structure. */
2992 fcport->vha = vha;
2993 fcport->port_type = FCT_UNKNOWN;
2994 fcport->loop_id = FC_NO_LOOP_ID;
2995 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
2996 fcport->supported_classes = FC_COS_UNSPECIFIED;
2997
2998 return fcport;
2999 }
3000
3001 /*
3002 * qla2x00_configure_loop
3003 * Updates Fibre Channel Device Database with what is actually on loop.
3004 *
3005 * Input:
3006 * ha = adapter block pointer.
3007 *
3008 * Returns:
3009 * 0 = success.
3010 * 1 = error.
3011 * 2 = database was full and device was not configured.
3012 */
3013 static int
3014 qla2x00_configure_loop(scsi_qla_host_t *vha)
3015 {
3016 int rval;
3017 unsigned long flags, save_flags;
3018 struct qla_hw_data *ha = vha->hw;
3019 rval = QLA_SUCCESS;
3020
3021 /* Get Initiator ID */
3022 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
3023 rval = qla2x00_configure_hba(vha);
3024 if (rval != QLA_SUCCESS) {
3025 ql_dbg(ql_dbg_disc, vha, 0x2013,
3026 "Unable to configure HBA.\n");
3027 return (rval);
3028 }
3029 }
3030
3031 save_flags = flags = vha->dpc_flags;
3032 ql_dbg(ql_dbg_disc, vha, 0x2014,
3033 "Configure loop -- dpc flags = 0x%lx.\n", flags);
3034
3035 /*
3036 * If we have both an RSCN and PORT UPDATE pending then handle them
3037 * both at the same time.
3038 */
3039 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
3040 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
3041
3042 qla2x00_get_data_rate(vha);
3043
3044 /* Determine what we need to do */
3045 if (ha->current_topology == ISP_CFG_FL &&
3046 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
3047
3048 set_bit(RSCN_UPDATE, &flags);
3049
3050 } else if (ha->current_topology == ISP_CFG_F &&
3051 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
3052
3053 set_bit(RSCN_UPDATE, &flags);
3054 clear_bit(LOCAL_LOOP_UPDATE, &flags);
3055
3056 } else if (ha->current_topology == ISP_CFG_N) {
3057 clear_bit(RSCN_UPDATE, &flags);
3058
3059 } else if (!vha->flags.online ||
3060 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
3061
3062 set_bit(RSCN_UPDATE, &flags);
3063 set_bit(LOCAL_LOOP_UPDATE, &flags);
3064 }
3065
3066 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
3067 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
3068 ql_dbg(ql_dbg_disc, vha, 0x2015,
3069 "Loop resync needed, failing.\n");
3070 rval = QLA_FUNCTION_FAILED;
3071 } else
3072 rval = qla2x00_configure_local_loop(vha);
3073 }
3074
3075 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
3076 if (LOOP_TRANSITION(vha)) {
3077 ql_dbg(ql_dbg_disc, vha, 0x201e,
3078 "Needs RSCN update and loop transition.\n");
3079 rval = QLA_FUNCTION_FAILED;
3080 }
3081 else
3082 rval = qla2x00_configure_fabric(vha);
3083 }
3084
3085 if (rval == QLA_SUCCESS) {
3086 if (atomic_read(&vha->loop_down_timer) ||
3087 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
3088 rval = QLA_FUNCTION_FAILED;
3089 } else {
3090 atomic_set(&vha->loop_state, LOOP_READY);
3091 ql_dbg(ql_dbg_disc, vha, 0x2069,
3092 "LOOP READY.\n");
3093
3094 /*
3095 * Process any ATIO queue entries that came in
3096 * while we weren't online.
3097 */
3098 if (qla_tgt_mode_enabled(vha)) {
3099 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) {
3100 spin_lock_irqsave(&ha->tgt.atio_lock,
3101 flags);
3102 qlt_24xx_process_atio_queue(vha, 0);
3103 spin_unlock_irqrestore(
3104 &ha->tgt.atio_lock, flags);
3105 } else {
3106 spin_lock_irqsave(&ha->hardware_lock,
3107 flags);
3108 qlt_24xx_process_atio_queue(vha, 1);
3109 spin_unlock_irqrestore(
3110 &ha->hardware_lock, flags);
3111 }
3112 }
3113 }
3114 }
3115
3116 if (rval) {
3117 ql_dbg(ql_dbg_disc, vha, 0x206a,
3118 "%s *** FAILED ***.\n", __func__);
3119 } else {
3120 ql_dbg(ql_dbg_disc, vha, 0x206b,
3121 "%s: exiting normally.\n", __func__);
3122 }
3123
3124 /* Restore state if a resync event occurred during processing */
3125 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
3126 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
3127 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
3128 if (test_bit(RSCN_UPDATE, &save_flags)) {
3129 set_bit(RSCN_UPDATE, &vha->dpc_flags);
3130 }
3131 }
3132
3133 return (rval);
3134 }
3135
3136
3137
3138 /*
3139 * qla2x00_configure_local_loop
3140 * Updates Fibre Channel Device Database with local loop devices.
3141 *
3142 * Input:
3143 * ha = adapter block pointer.
3144 *
3145 * Returns:
3146 * 0 = success.
3147 */
3148 static int
3149 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
3150 {
3151 int rval, rval2;
3152 int found_devs;
3153 int found;
3154 fc_port_t *fcport, *new_fcport;
3155
3156 uint16_t index;
3157 uint16_t entries;
3158 char *id_iter;
3159 uint16_t loop_id;
3160 uint8_t domain, area, al_pa;
3161 struct qla_hw_data *ha = vha->hw;
3162
3163 found_devs = 0;
3164 new_fcport = NULL;
3165 entries = MAX_FIBRE_DEVICES_LOOP;
3166
3167 /* Get list of logged in devices. */
3168 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
3169 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
3170 &entries);
3171 if (rval != QLA_SUCCESS)
3172 goto cleanup_allocation;
3173
3174 ql_dbg(ql_dbg_disc, vha, 0x2017,
3175 "Entries in ID list (%d).\n", entries);
3176 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
3177 (uint8_t *)ha->gid_list,
3178 entries * sizeof(struct gid_list_info));
3179
3180 /* Allocate temporary fcport for any new fcports discovered. */
3181 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3182 if (new_fcport == NULL) {
3183 ql_log(ql_log_warn, vha, 0x2018,
3184 "Memory allocation failed for fcport.\n");
3185 rval = QLA_MEMORY_ALLOC_FAILED;
3186 goto cleanup_allocation;
3187 }
3188 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
3189
3190 /*
3191 * Mark local devices that were present with FCF_DEVICE_LOST for now.
3192 */
3193 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3194 if (atomic_read(&fcport->state) == FCS_ONLINE &&
3195 fcport->port_type != FCT_BROADCAST &&
3196 (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
3197
3198 ql_dbg(ql_dbg_disc, vha, 0x2019,
3199 "Marking port lost loop_id=0x%04x.\n",
3200 fcport->loop_id);
3201
3202 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3203 }
3204 }
3205
3206 /* Add devices to port list. */
3207 id_iter = (char *)ha->gid_list;
3208 for (index = 0; index < entries; index++) {
3209 domain = ((struct gid_list_info *)id_iter)->domain;
3210 area = ((struct gid_list_info *)id_iter)->area;
3211 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
3212 if (IS_QLA2100(ha) || IS_QLA2200(ha))
3213 loop_id = (uint16_t)
3214 ((struct gid_list_info *)id_iter)->loop_id_2100;
3215 else
3216 loop_id = le16_to_cpu(
3217 ((struct gid_list_info *)id_iter)->loop_id);
3218 id_iter += ha->gid_list_info_size;
3219
3220 /* Bypass reserved domain fields. */
3221 if ((domain & 0xf0) == 0xf0)
3222 continue;
3223
3224 /* Bypass if not same domain and area of adapter. */
3225 if (area && domain &&
3226 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
3227 continue;
3228
3229 /* Bypass invalid local loop ID. */
3230 if (loop_id > LAST_LOCAL_LOOP_ID)
3231 continue;
3232
3233 memset(new_fcport, 0, sizeof(fc_port_t));
3234
3235 /* Fill in member data. */
3236 new_fcport->d_id.b.domain = domain;
3237 new_fcport->d_id.b.area = area;
3238 new_fcport->d_id.b.al_pa = al_pa;
3239 new_fcport->loop_id = loop_id;
3240 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
3241 if (rval2 != QLA_SUCCESS) {
3242 ql_dbg(ql_dbg_disc, vha, 0x201a,
3243 "Failed to retrieve fcport information "
3244 "-- get_port_database=%x, loop_id=0x%04x.\n",
3245 rval2, new_fcport->loop_id);
3246 ql_dbg(ql_dbg_disc, vha, 0x201b,
3247 "Scheduling resync.\n");
3248 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3249 continue;
3250 }
3251
3252 /* Check for matching device in port list. */
3253 found = 0;
3254 fcport = NULL;
3255 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3256 if (memcmp(new_fcport->port_name, fcport->port_name,
3257 WWN_SIZE))
3258 continue;
3259
3260 fcport->flags &= ~FCF_FABRIC_DEVICE;
3261 fcport->loop_id = new_fcport->loop_id;
3262 fcport->port_type = new_fcport->port_type;
3263 fcport->d_id.b24 = new_fcport->d_id.b24;
3264 memcpy(fcport->node_name, new_fcport->node_name,
3265 WWN_SIZE);
3266
3267 found++;
3268 break;
3269 }
3270
3271 if (!found) {
3272 /* New device, add to fcports list. */
3273 list_add_tail(&new_fcport->list, &vha->vp_fcports);
3274
3275 /* Allocate a new replacement fcport. */
3276 fcport = new_fcport;
3277 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3278 if (new_fcport == NULL) {
3279 ql_log(ql_log_warn, vha, 0x201c,
3280 "Failed to allocate memory for fcport.\n");
3281 rval = QLA_MEMORY_ALLOC_FAILED;
3282 goto cleanup_allocation;
3283 }
3284 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
3285 }
3286
3287 /* Base iIDMA settings on HBA port speed. */
3288 fcport->fp_speed = ha->link_data_rate;
3289
3290 qla2x00_update_fcport(vha, fcport);
3291
3292 found_devs++;
3293 }
3294
3295 cleanup_allocation:
3296 kfree(new_fcport);
3297
3298 if (rval != QLA_SUCCESS) {
3299 ql_dbg(ql_dbg_disc, vha, 0x201d,
3300 "Configure local loop error exit: rval=%x.\n", rval);
3301 }
3302
3303 return (rval);
3304 }
3305
3306 static void
3307 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
3308 {
3309 int rval;
3310 uint16_t mb[MAILBOX_REGISTER_COUNT];
3311 struct qla_hw_data *ha = vha->hw;
3312
3313 if (!IS_IIDMA_CAPABLE(ha))
3314 return;
3315
3316 if (atomic_read(&fcport->state) != FCS_ONLINE)
3317 return;
3318
3319 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
3320 fcport->fp_speed > ha->link_data_rate)
3321 return;
3322
3323 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
3324 mb);
3325 if (rval != QLA_SUCCESS) {
3326 ql_dbg(ql_dbg_disc, vha, 0x2004,
3327 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
3328 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
3329 } else {
3330 ql_dbg(ql_dbg_disc, vha, 0x2005,
3331 "iIDMA adjusted to %s GB/s on %8phN.\n",
3332 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
3333 fcport->port_name);
3334 }
3335 }
3336
3337 static void
3338 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
3339 {
3340 struct fc_rport_identifiers rport_ids;
3341 struct fc_rport *rport;
3342 unsigned long flags;
3343
3344 rport_ids.node_name = wwn_to_u64(fcport->node_name);
3345 rport_ids.port_name = wwn_to_u64(fcport->port_name);
3346 rport_ids.port_id = fcport->d_id.b.domain << 16 |
3347 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
3348 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
3349 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
3350 if (!rport) {
3351 ql_log(ql_log_warn, vha, 0x2006,
3352 "Unable to allocate fc remote port.\n");
3353 return;
3354 }
3355 /*
3356 * Create target mode FC NEXUS in qla_target.c if target mode is
3357 * enabled..
3358 */
3359
3360 qlt_fc_port_added(vha, fcport);
3361
3362 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
3363 *((fc_port_t **)rport->dd_data) = fcport;
3364 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
3365
3366 rport->supported_classes = fcport->supported_classes;
3367
3368 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
3369 if (fcport->port_type == FCT_INITIATOR)
3370 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
3371 if (fcport->port_type == FCT_TARGET)
3372 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
3373 fc_remote_port_rolechg(rport, rport_ids.roles);
3374 }
3375
3376 /*
3377 * qla2x00_update_fcport
3378 * Updates device on list.
3379 *
3380 * Input:
3381 * ha = adapter block pointer.
3382 * fcport = port structure pointer.
3383 *
3384 * Return:
3385 * 0 - Success
3386 * BIT_0 - error
3387 *
3388 * Context:
3389 * Kernel context.
3390 */
3391 void
3392 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
3393 {
3394 fcport->vha = vha;
3395
3396 if (IS_QLAFX00(vha->hw)) {
3397 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
3398 goto reg_port;
3399 }
3400 fcport->login_retry = 0;
3401 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
3402
3403 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
3404 qla2x00_iidma_fcport(vha, fcport);
3405 qla24xx_update_fcport_fcp_prio(vha, fcport);
3406
3407 reg_port:
3408 if (qla_ini_mode_enabled(vha))
3409 qla2x00_reg_remote_port(vha, fcport);
3410 else {
3411 /*
3412 * Create target mode FC NEXUS in qla_target.c
3413 */
3414 qlt_fc_port_added(vha, fcport);
3415 }
3416 }
3417
3418 /*
3419 * qla2x00_configure_fabric
3420 * Setup SNS devices with loop ID's.
3421 *
3422 * Input:
3423 * ha = adapter block pointer.
3424 *
3425 * Returns:
3426 * 0 = success.
3427 * BIT_0 = error
3428 */
3429 static int
3430 qla2x00_configure_fabric(scsi_qla_host_t *vha)
3431 {
3432 int rval;
3433 fc_port_t *fcport, *fcptemp;
3434 uint16_t next_loopid;
3435 uint16_t mb[MAILBOX_REGISTER_COUNT];
3436 uint16_t loop_id;
3437 LIST_HEAD(new_fcports);
3438 struct qla_hw_data *ha = vha->hw;
3439 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3440 int discovery_gen;
3441
3442 /* If FL port exists, then SNS is present */
3443 if (IS_FWI2_CAPABLE(ha))
3444 loop_id = NPH_F_PORT;
3445 else
3446 loop_id = SNS_FL_PORT;
3447 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
3448 if (rval != QLA_SUCCESS) {
3449 ql_dbg(ql_dbg_disc, vha, 0x201f,
3450 "MBX_GET_PORT_NAME failed, No FL Port.\n");
3451
3452 vha->device_flags &= ~SWITCH_FOUND;
3453 return (QLA_SUCCESS);
3454 }
3455 vha->device_flags |= SWITCH_FOUND;
3456
3457 do {
3458 /* FDMI support. */
3459 if (ql2xfdmienable &&
3460 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
3461 qla2x00_fdmi_register(vha);
3462
3463 /* Ensure we are logged into the SNS. */
3464 if (IS_FWI2_CAPABLE(ha))
3465 loop_id = NPH_SNS;
3466 else
3467 loop_id = SIMPLE_NAME_SERVER;
3468 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
3469 0xfc, mb, BIT_1|BIT_0);
3470 if (rval != QLA_SUCCESS) {
3471 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3472 return rval;
3473 }
3474 if (mb[0] != MBS_COMMAND_COMPLETE) {
3475 ql_dbg(ql_dbg_disc, vha, 0x2042,
3476 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
3477 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1],
3478 mb[2], mb[6], mb[7]);
3479 return (QLA_SUCCESS);
3480 }
3481
3482 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
3483 if (qla2x00_rft_id(vha)) {
3484 /* EMPTY */
3485 ql_dbg(ql_dbg_disc, vha, 0x2045,
3486 "Register FC-4 TYPE failed.\n");
3487 }
3488 if (qla2x00_rff_id(vha)) {
3489 /* EMPTY */
3490 ql_dbg(ql_dbg_disc, vha, 0x2049,
3491 "Register FC-4 Features failed.\n");
3492 }
3493 if (qla2x00_rnn_id(vha)) {
3494 /* EMPTY */
3495 ql_dbg(ql_dbg_disc, vha, 0x204f,
3496 "Register Node Name failed.\n");
3497 } else if (qla2x00_rsnn_nn(vha)) {
3498 /* EMPTY */
3499 ql_dbg(ql_dbg_disc, vha, 0x2053,
3500 "Register Symobilic Node Name failed.\n");
3501 }
3502 }
3503
3504 #define QLA_FCPORT_SCAN 1
3505 #define QLA_FCPORT_FOUND 2
3506
3507 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3508 fcport->scan_state = QLA_FCPORT_SCAN;
3509 }
3510
3511 /* Mark the time right before querying FW for connected ports.
3512 * This process is long, asynchronous and by the time it's done,
3513 * collected information might not be accurate anymore. E.g.
3514 * disconnected port might have re-connected and a brand new
3515 * session has been created. In this case session's generation
3516 * will be newer than discovery_gen. */
3517 qlt_do_generation_tick(vha, &discovery_gen);
3518
3519 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
3520 if (rval != QLA_SUCCESS)
3521 break;
3522
3523 /*
3524 * Logout all previous fabric devices marked lost, except
3525 * FCP2 devices.
3526 */
3527 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3528 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3529 break;
3530
3531 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
3532 continue;
3533
3534 if (fcport->scan_state == QLA_FCPORT_SCAN) {
3535 if (qla_ini_mode_enabled(base_vha) &&
3536 atomic_read(&fcport->state) == FCS_ONLINE) {
3537 qla2x00_mark_device_lost(vha, fcport,
3538 ql2xplogiabsentdevice, 0);
3539 if (fcport->loop_id != FC_NO_LOOP_ID &&
3540 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
3541 fcport->port_type != FCT_INITIATOR &&
3542 fcport->port_type != FCT_BROADCAST) {
3543 ha->isp_ops->fabric_logout(vha,
3544 fcport->loop_id,
3545 fcport->d_id.b.domain,
3546 fcport->d_id.b.area,
3547 fcport->d_id.b.al_pa);
3548 qla2x00_clear_loop_id(fcport);
3549 }
3550 } else if (!qla_ini_mode_enabled(base_vha)) {
3551 /*
3552 * In target mode, explicitly kill
3553 * sessions and log out of devices
3554 * that are gone, so that we don't
3555 * end up with an initiator using the
3556 * wrong ACL (if the fabric recycles
3557 * an FC address and we have a stale
3558 * session around) and so that we don't
3559 * report initiators that are no longer
3560 * on the fabric.
3561 */
3562 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf077,
3563 "port gone, logging out/killing session: "
3564 "%8phC state 0x%x flags 0x%x fc4_type 0x%x "
3565 "scan_state %d\n",
3566 fcport->port_name,
3567 atomic_read(&fcport->state),
3568 fcport->flags, fcport->fc4_type,
3569 fcport->scan_state);
3570 qlt_fc_port_deleted(vha, fcport,
3571 discovery_gen);
3572 }
3573 }
3574 }
3575
3576 /* Starting free loop ID. */
3577 next_loopid = ha->min_external_loopid;
3578
3579 /*
3580 * Scan through our port list and login entries that need to be
3581 * logged in.
3582 */
3583 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3584 if (atomic_read(&vha->loop_down_timer) ||
3585 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3586 break;
3587
3588 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
3589 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
3590 continue;
3591
3592 /*
3593 * If we're not an initiator, skip looking for devices
3594 * and logging in. There's no reason for us to do it,
3595 * and it seems to actively cause problems in target
3596 * mode if we race with the initiator logging into us
3597 * (we might get the "port ID used" status back from
3598 * our login command and log out the initiator, which
3599 * seems to cause havoc).
3600 */
3601 if (!qla_ini_mode_enabled(base_vha)) {
3602 if (fcport->scan_state == QLA_FCPORT_FOUND) {
3603 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf078,
3604 "port %8phC state 0x%x flags 0x%x fc4_type 0x%x "
3605 "scan_state %d (initiator mode disabled; skipping "
3606 "login)\n", fcport->port_name,
3607 atomic_read(&fcport->state),
3608 fcport->flags, fcport->fc4_type,
3609 fcport->scan_state);
3610 }
3611 continue;
3612 }
3613
3614 if (fcport->loop_id == FC_NO_LOOP_ID) {
3615 fcport->loop_id = next_loopid;
3616 rval = qla2x00_find_new_loop_id(
3617 base_vha, fcport);
3618 if (rval != QLA_SUCCESS) {
3619 /* Ran out of IDs to use */
3620 break;
3621 }
3622 }
3623 /* Login and update database */
3624 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
3625 }
3626
3627 /* Exit if out of loop IDs. */
3628 if (rval != QLA_SUCCESS) {
3629 break;
3630 }
3631
3632 /*
3633 * Login and add the new devices to our port list.
3634 */
3635 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3636 if (atomic_read(&vha->loop_down_timer) ||
3637 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3638 break;
3639
3640 /*
3641 * If we're not an initiator, skip looking for devices
3642 * and logging in. There's no reason for us to do it,
3643 * and it seems to actively cause problems in target
3644 * mode if we race with the initiator logging into us
3645 * (we might get the "port ID used" status back from
3646 * our login command and log out the initiator, which
3647 * seems to cause havoc).
3648 */
3649 if (qla_ini_mode_enabled(base_vha)) {
3650 /* Find a new loop ID to use. */
3651 fcport->loop_id = next_loopid;
3652 rval = qla2x00_find_new_loop_id(base_vha,
3653 fcport);
3654 if (rval != QLA_SUCCESS) {
3655 /* Ran out of IDs to use */
3656 break;
3657 }
3658
3659 /* Login and update database */
3660 qla2x00_fabric_dev_login(vha, fcport,
3661 &next_loopid);
3662 } else {
3663 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf079,
3664 "new port %8phC state 0x%x flags 0x%x fc4_type "
3665 "0x%x scan_state %d (initiator mode disabled; "
3666 "skipping login)\n",
3667 fcport->port_name,
3668 atomic_read(&fcport->state),
3669 fcport->flags, fcport->fc4_type,
3670 fcport->scan_state);
3671 }
3672
3673 list_move_tail(&fcport->list, &vha->vp_fcports);
3674 }
3675 } while (0);
3676
3677 /* Free all new device structures not processed. */
3678 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3679 list_del(&fcport->list);
3680 kfree(fcport);
3681 }
3682
3683 if (rval) {
3684 ql_dbg(ql_dbg_disc, vha, 0x2068,
3685 "Configure fabric error exit rval=%d.\n", rval);
3686 }
3687
3688 return (rval);
3689 }
3690
3691 /*
3692 * qla2x00_find_all_fabric_devs
3693 *
3694 * Input:
3695 * ha = adapter block pointer.
3696 * dev = database device entry pointer.
3697 *
3698 * Returns:
3699 * 0 = success.
3700 *
3701 * Context:
3702 * Kernel context.
3703 */
3704 static int
3705 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
3706 struct list_head *new_fcports)
3707 {
3708 int rval;
3709 uint16_t loop_id;
3710 fc_port_t *fcport, *new_fcport, *fcptemp;
3711 int found;
3712
3713 sw_info_t *swl;
3714 int swl_idx;
3715 int first_dev, last_dev;
3716 port_id_t wrap = {}, nxt_d_id;
3717 struct qla_hw_data *ha = vha->hw;
3718 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3719
3720 rval = QLA_SUCCESS;
3721
3722 /* Try GID_PT to get device list, else GAN. */
3723 if (!ha->swl)
3724 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
3725 GFP_KERNEL);
3726 swl = ha->swl;
3727 if (!swl) {
3728 /*EMPTY*/
3729 ql_dbg(ql_dbg_disc, vha, 0x2054,
3730 "GID_PT allocations failed, fallback on GA_NXT.\n");
3731 } else {
3732 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
3733 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
3734 swl = NULL;
3735 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
3736 swl = NULL;
3737 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
3738 swl = NULL;
3739 } else if (ql2xiidmaenable &&
3740 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
3741 qla2x00_gpsc(vha, swl);
3742 }
3743
3744 /* If other queries succeeded probe for FC-4 type */
3745 if (swl)
3746 qla2x00_gff_id(vha, swl);
3747 }
3748 swl_idx = 0;
3749
3750 /* Allocate temporary fcport for any new fcports discovered. */
3751 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3752 if (new_fcport == NULL) {
3753 ql_log(ql_log_warn, vha, 0x205e,
3754 "Failed to allocate memory for fcport.\n");
3755 return (QLA_MEMORY_ALLOC_FAILED);
3756 }
3757 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3758 /* Set start port ID scan at adapter ID. */
3759 first_dev = 1;
3760 last_dev = 0;
3761
3762 /* Starting free loop ID. */
3763 loop_id = ha->min_external_loopid;
3764 for (; loop_id <= ha->max_loop_id; loop_id++) {
3765 if (qla2x00_is_reserved_id(vha, loop_id))
3766 continue;
3767
3768 if (ha->current_topology == ISP_CFG_FL &&
3769 (atomic_read(&vha->loop_down_timer) ||
3770 LOOP_TRANSITION(vha))) {
3771 atomic_set(&vha->loop_down_timer, 0);
3772 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3773 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
3774 break;
3775 }
3776
3777 if (swl != NULL) {
3778 if (last_dev) {
3779 wrap.b24 = new_fcport->d_id.b24;
3780 } else {
3781 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
3782 memcpy(new_fcport->node_name,
3783 swl[swl_idx].node_name, WWN_SIZE);
3784 memcpy(new_fcport->port_name,
3785 swl[swl_idx].port_name, WWN_SIZE);
3786 memcpy(new_fcport->fabric_port_name,
3787 swl[swl_idx].fabric_port_name, WWN_SIZE);
3788 new_fcport->fp_speed = swl[swl_idx].fp_speed;
3789 new_fcport->fc4_type = swl[swl_idx].fc4_type;
3790
3791 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
3792 last_dev = 1;
3793 }
3794 swl_idx++;
3795 }
3796 } else {
3797 /* Send GA_NXT to the switch */
3798 rval = qla2x00_ga_nxt(vha, new_fcport);
3799 if (rval != QLA_SUCCESS) {
3800 ql_log(ql_log_warn, vha, 0x2064,
3801 "SNS scan failed -- assuming "
3802 "zero-entry result.\n");
3803 list_for_each_entry_safe(fcport, fcptemp,
3804 new_fcports, list) {
3805 list_del(&fcport->list);
3806 kfree(fcport);
3807 }
3808 rval = QLA_SUCCESS;
3809 break;
3810 }
3811 }
3812
3813 /* If wrap on switch device list, exit. */
3814 if (first_dev) {
3815 wrap.b24 = new_fcport->d_id.b24;
3816 first_dev = 0;
3817 } else if (new_fcport->d_id.b24 == wrap.b24) {
3818 ql_dbg(ql_dbg_disc, vha, 0x2065,
3819 "Device wrap (%02x%02x%02x).\n",
3820 new_fcport->d_id.b.domain,
3821 new_fcport->d_id.b.area,
3822 new_fcport->d_id.b.al_pa);
3823 break;
3824 }
3825
3826 /* Bypass if same physical adapter. */
3827 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
3828 continue;
3829
3830 /* Bypass virtual ports of the same host. */
3831 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
3832 continue;
3833
3834 /* Bypass if same domain and area of adapter. */
3835 if (((new_fcport->d_id.b24 & 0xffff00) ==
3836 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
3837 ISP_CFG_FL)
3838 continue;
3839
3840 /* Bypass reserved domain fields. */
3841 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
3842 continue;
3843
3844 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
3845 if (ql2xgffidenable &&
3846 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
3847 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
3848 continue;
3849
3850 /* Locate matching device in database. */
3851 found = 0;
3852 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3853 if (memcmp(new_fcport->port_name, fcport->port_name,
3854 WWN_SIZE))
3855 continue;
3856
3857 fcport->scan_state = QLA_FCPORT_FOUND;
3858
3859 found++;
3860
3861 /* Update port state. */
3862 memcpy(fcport->fabric_port_name,
3863 new_fcport->fabric_port_name, WWN_SIZE);
3864 fcport->fp_speed = new_fcport->fp_speed;
3865
3866 /*
3867 * If address the same and state FCS_ONLINE
3868 * (or in target mode), nothing changed.
3869 */
3870 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
3871 (atomic_read(&fcport->state) == FCS_ONLINE ||
3872 !qla_ini_mode_enabled(base_vha))) {
3873 break;
3874 }
3875
3876 /*
3877 * If device was not a fabric device before.
3878 */
3879 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
3880 fcport->d_id.b24 = new_fcport->d_id.b24;
3881 qla2x00_clear_loop_id(fcport);
3882 fcport->flags |= (FCF_FABRIC_DEVICE |
3883 FCF_LOGIN_NEEDED);
3884 break;
3885 }
3886
3887 /*
3888 * Port ID changed or device was marked to be updated;
3889 * Log it out if still logged in and mark it for
3890 * relogin later.
3891 */
3892 if (!qla_ini_mode_enabled(base_vha)) {
3893 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
3894 "port changed FC ID, %8phC"
3895 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
3896 fcport->port_name,
3897 fcport->d_id.b.domain,
3898 fcport->d_id.b.area,
3899 fcport->d_id.b.al_pa,
3900 fcport->loop_id,
3901 new_fcport->d_id.b.domain,
3902 new_fcport->d_id.b.area,
3903 new_fcport->d_id.b.al_pa);
3904 fcport->d_id.b24 = new_fcport->d_id.b24;
3905 break;
3906 }
3907
3908 fcport->d_id.b24 = new_fcport->d_id.b24;
3909 fcport->flags |= FCF_LOGIN_NEEDED;
3910 if (fcport->loop_id != FC_NO_LOOP_ID &&
3911 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
3912 (fcport->flags & FCF_ASYNC_SENT) == 0 &&
3913 fcport->port_type != FCT_INITIATOR &&
3914 fcport->port_type != FCT_BROADCAST) {
3915 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3916 fcport->d_id.b.domain, fcport->d_id.b.area,
3917 fcport->d_id.b.al_pa);
3918 qla2x00_clear_loop_id(fcport);
3919 }
3920
3921 break;
3922 }
3923
3924 if (found)
3925 continue;
3926 /* If device was not in our fcports list, then add it. */
3927 new_fcport->scan_state = QLA_FCPORT_FOUND;
3928 list_add_tail(&new_fcport->list, new_fcports);
3929
3930 /* Allocate a new replacement fcport. */
3931 nxt_d_id.b24 = new_fcport->d_id.b24;
3932 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3933 if (new_fcport == NULL) {
3934 ql_log(ql_log_warn, vha, 0x2066,
3935 "Memory allocation failed for fcport.\n");
3936 return (QLA_MEMORY_ALLOC_FAILED);
3937 }
3938 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3939 new_fcport->d_id.b24 = nxt_d_id.b24;
3940 }
3941
3942 kfree(new_fcport);
3943
3944 return (rval);
3945 }
3946
3947 /*
3948 * qla2x00_find_new_loop_id
3949 * Scan through our port list and find a new usable loop ID.
3950 *
3951 * Input:
3952 * ha: adapter state pointer.
3953 * dev: port structure pointer.
3954 *
3955 * Returns:
3956 * qla2x00 local function return status code.
3957 *
3958 * Context:
3959 * Kernel context.
3960 */
3961 int
3962 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
3963 {
3964 int rval;
3965 struct qla_hw_data *ha = vha->hw;
3966 unsigned long flags = 0;
3967
3968 rval = QLA_SUCCESS;
3969
3970 spin_lock_irqsave(&ha->vport_slock, flags);
3971
3972 dev->loop_id = find_first_zero_bit(ha->loop_id_map,
3973 LOOPID_MAP_SIZE);
3974 if (dev->loop_id >= LOOPID_MAP_SIZE ||
3975 qla2x00_is_reserved_id(vha, dev->loop_id)) {
3976 dev->loop_id = FC_NO_LOOP_ID;
3977 rval = QLA_FUNCTION_FAILED;
3978 } else
3979 set_bit(dev->loop_id, ha->loop_id_map);
3980
3981 spin_unlock_irqrestore(&ha->vport_slock, flags);
3982
3983 if (rval == QLA_SUCCESS)
3984 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
3985 "Assigning new loopid=%x, portid=%x.\n",
3986 dev->loop_id, dev->d_id.b24);
3987 else
3988 ql_log(ql_log_warn, dev->vha, 0x2087,
3989 "No loop_id's available, portid=%x.\n",
3990 dev->d_id.b24);
3991
3992 return (rval);
3993 }
3994
3995 /*
3996 * qla2x00_fabric_dev_login
3997 * Login fabric target device and update FC port database.
3998 *
3999 * Input:
4000 * ha: adapter state pointer.
4001 * fcport: port structure list pointer.
4002 * next_loopid: contains value of a new loop ID that can be used
4003 * by the next login attempt.
4004 *
4005 * Returns:
4006 * qla2x00 local function return status code.
4007 *
4008 * Context:
4009 * Kernel context.
4010 */
4011 static int
4012 qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
4013 uint16_t *next_loopid)
4014 {
4015 int rval;
4016 uint8_t opts;
4017 struct qla_hw_data *ha = vha->hw;
4018
4019 rval = QLA_SUCCESS;
4020
4021 if (IS_ALOGIO_CAPABLE(ha)) {
4022 if (fcport->flags & FCF_ASYNC_SENT)
4023 return rval;
4024 fcport->flags |= FCF_ASYNC_SENT;
4025 rval = qla2x00_post_async_login_work(vha, fcport, NULL);
4026 if (!rval)
4027 return rval;
4028 }
4029
4030 fcport->flags &= ~FCF_ASYNC_SENT;
4031 rval = qla2x00_fabric_login(vha, fcport, next_loopid);
4032 if (rval == QLA_SUCCESS) {
4033 /* Send an ADISC to FCP2 devices.*/
4034 opts = 0;
4035 if (fcport->flags & FCF_FCP2_DEVICE)
4036 opts |= BIT_1;
4037 rval = qla2x00_get_port_database(vha, fcport, opts);
4038 if (rval != QLA_SUCCESS) {
4039 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
4040 fcport->d_id.b.domain, fcport->d_id.b.area,
4041 fcport->d_id.b.al_pa);
4042 qla2x00_mark_device_lost(vha, fcport, 1, 0);
4043 } else {
4044 qla2x00_update_fcport(vha, fcport);
4045 }
4046 } else {
4047 /* Retry Login. */
4048 qla2x00_mark_device_lost(vha, fcport, 1, 0);
4049 }
4050
4051 return (rval);
4052 }
4053
4054 /*
4055 * qla2x00_fabric_login
4056 * Issue fabric login command.
4057 *
4058 * Input:
4059 * ha = adapter block pointer.
4060 * device = pointer to FC device type structure.
4061 *
4062 * Returns:
4063 * 0 - Login successfully
4064 * 1 - Login failed
4065 * 2 - Initiator device
4066 * 3 - Fatal error
4067 */
4068 int
4069 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
4070 uint16_t *next_loopid)
4071 {
4072 int rval;
4073 int retry;
4074 uint16_t tmp_loopid;
4075 uint16_t mb[MAILBOX_REGISTER_COUNT];
4076 struct qla_hw_data *ha = vha->hw;
4077
4078 retry = 0;
4079 tmp_loopid = 0;
4080
4081 for (;;) {
4082 ql_dbg(ql_dbg_disc, vha, 0x2000,
4083 "Trying Fabric Login w/loop id 0x%04x for port "
4084 "%02x%02x%02x.\n",
4085 fcport->loop_id, fcport->d_id.b.domain,
4086 fcport->d_id.b.area, fcport->d_id.b.al_pa);
4087
4088 /* Login fcport on switch. */
4089 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
4090 fcport->d_id.b.domain, fcport->d_id.b.area,
4091 fcport->d_id.b.al_pa, mb, BIT_0);
4092 if (rval != QLA_SUCCESS) {
4093 return rval;
4094 }
4095 if (mb[0] == MBS_PORT_ID_USED) {
4096 /*
4097 * Device has another loop ID. The firmware team
4098 * recommends the driver perform an implicit login with
4099 * the specified ID again. The ID we just used is save
4100 * here so we return with an ID that can be tried by
4101 * the next login.
4102 */
4103 retry++;
4104 tmp_loopid = fcport->loop_id;
4105 fcport->loop_id = mb[1];
4106
4107 ql_dbg(ql_dbg_disc, vha, 0x2001,
4108 "Fabric Login: port in use - next loop "
4109 "id=0x%04x, port id= %02x%02x%02x.\n",
4110 fcport->loop_id, fcport->d_id.b.domain,
4111 fcport->d_id.b.area, fcport->d_id.b.al_pa);
4112
4113 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
4114 /*
4115 * Login succeeded.
4116 */
4117 if (retry) {
4118 /* A retry occurred before. */
4119 *next_loopid = tmp_loopid;
4120 } else {
4121 /*
4122 * No retry occurred before. Just increment the
4123 * ID value for next login.
4124 */
4125 *next_loopid = (fcport->loop_id + 1);
4126 }
4127
4128 if (mb[1] & BIT_0) {
4129 fcport->port_type = FCT_INITIATOR;
4130 } else {
4131 fcport->port_type = FCT_TARGET;
4132 if (mb[1] & BIT_1) {
4133 fcport->flags |= FCF_FCP2_DEVICE;
4134 }
4135 }
4136
4137 if (mb[10] & BIT_0)
4138 fcport->supported_classes |= FC_COS_CLASS2;
4139 if (mb[10] & BIT_1)
4140 fcport->supported_classes |= FC_COS_CLASS3;
4141
4142 if (IS_FWI2_CAPABLE(ha)) {
4143 if (mb[10] & BIT_7)
4144 fcport->flags |=
4145 FCF_CONF_COMP_SUPPORTED;
4146 }
4147
4148 rval = QLA_SUCCESS;
4149 break;
4150 } else if (mb[0] == MBS_LOOP_ID_USED) {
4151 /*
4152 * Loop ID already used, try next loop ID.
4153 */
4154 fcport->loop_id++;
4155 rval = qla2x00_find_new_loop_id(vha, fcport);
4156 if (rval != QLA_SUCCESS) {
4157 /* Ran out of loop IDs to use */
4158 break;
4159 }
4160 } else if (mb[0] == MBS_COMMAND_ERROR) {
4161 /*
4162 * Firmware possibly timed out during login. If NO
4163 * retries are left to do then the device is declared
4164 * dead.
4165 */
4166 *next_loopid = fcport->loop_id;
4167 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
4168 fcport->d_id.b.domain, fcport->d_id.b.area,
4169 fcport->d_id.b.al_pa);
4170 qla2x00_mark_device_lost(vha, fcport, 1, 0);
4171
4172 rval = 1;
4173 break;
4174 } else {
4175 /*
4176 * unrecoverable / not handled error
4177 */
4178 ql_dbg(ql_dbg_disc, vha, 0x2002,
4179 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
4180 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
4181 fcport->d_id.b.area, fcport->d_id.b.al_pa,
4182 fcport->loop_id, jiffies);
4183
4184 *next_loopid = fcport->loop_id;
4185 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
4186 fcport->d_id.b.domain, fcport->d_id.b.area,
4187 fcport->d_id.b.al_pa);
4188 qla2x00_clear_loop_id(fcport);
4189 fcport->login_retry = 0;
4190
4191 rval = 3;
4192 break;
4193 }
4194 }
4195
4196 return (rval);
4197 }
4198
4199 /*
4200 * qla2x00_local_device_login
4201 * Issue local device login command.
4202 *
4203 * Input:
4204 * ha = adapter block pointer.
4205 * loop_id = loop id of device to login to.
4206 *
4207 * Returns (Where's the #define!!!!):
4208 * 0 - Login successfully
4209 * 1 - Login failed
4210 * 3 - Fatal error
4211 */
4212 int
4213 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
4214 {
4215 int rval;
4216 uint16_t mb[MAILBOX_REGISTER_COUNT];
4217
4218 memset(mb, 0, sizeof(mb));
4219 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
4220 if (rval == QLA_SUCCESS) {
4221 /* Interrogate mailbox registers for any errors */
4222 if (mb[0] == MBS_COMMAND_ERROR)
4223 rval = 1;
4224 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
4225 /* device not in PCB table */
4226 rval = 3;
4227 }
4228
4229 return (rval);
4230 }
4231
4232 /*
4233 * qla2x00_loop_resync
4234 * Resync with fibre channel devices.
4235 *
4236 * Input:
4237 * ha = adapter block pointer.
4238 *
4239 * Returns:
4240 * 0 = success
4241 */
4242 int
4243 qla2x00_loop_resync(scsi_qla_host_t *vha)
4244 {
4245 int rval = QLA_SUCCESS;
4246 uint32_t wait_time;
4247 struct req_que *req;
4248 struct rsp_que *rsp;
4249
4250 req = vha->req;
4251 rsp = req->rsp;
4252
4253 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4254 if (vha->flags.online) {
4255 if (!(rval = qla2x00_fw_ready(vha))) {
4256 /* Wait at most MAX_TARGET RSCNs for a stable link. */
4257 wait_time = 256;
4258 do {
4259 if (!IS_QLAFX00(vha->hw)) {
4260 /*
4261 * Issue a marker after FW becomes
4262 * ready.
4263 */
4264 qla2x00_marker(vha, req, rsp, 0, 0,
4265 MK_SYNC_ALL);
4266 vha->marker_needed = 0;
4267 }
4268
4269 /* Remap devices on Loop. */
4270 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4271
4272 if (IS_QLAFX00(vha->hw))
4273 qlafx00_configure_devices(vha);
4274 else
4275 qla2x00_configure_loop(vha);
4276
4277 wait_time--;
4278 } while (!atomic_read(&vha->loop_down_timer) &&
4279 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
4280 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
4281 &vha->dpc_flags)));
4282 }
4283 }
4284
4285 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
4286 return (QLA_FUNCTION_FAILED);
4287
4288 if (rval)
4289 ql_dbg(ql_dbg_disc, vha, 0x206c,
4290 "%s *** FAILED ***.\n", __func__);
4291
4292 return (rval);
4293 }
4294
4295 /*
4296 * qla2x00_perform_loop_resync
4297 * Description: This function will set the appropriate flags and call
4298 * qla2x00_loop_resync. If successful loop will be resynced
4299 * Arguments : scsi_qla_host_t pointer
4300 * returm : Success or Failure
4301 */
4302
4303 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
4304 {
4305 int32_t rval = 0;
4306
4307 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
4308 /*Configure the flags so that resync happens properly*/
4309 atomic_set(&ha->loop_down_timer, 0);
4310 if (!(ha->device_flags & DFLG_NO_CABLE)) {
4311 atomic_set(&ha->loop_state, LOOP_UP);
4312 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
4313 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
4314 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
4315
4316 rval = qla2x00_loop_resync(ha);
4317 } else
4318 atomic_set(&ha->loop_state, LOOP_DEAD);
4319
4320 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
4321 }
4322
4323 return rval;
4324 }
4325
4326 void
4327 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
4328 {
4329 fc_port_t *fcport;
4330 struct scsi_qla_host *vha;
4331 struct qla_hw_data *ha = base_vha->hw;
4332 unsigned long flags;
4333
4334 spin_lock_irqsave(&ha->vport_slock, flags);
4335 /* Go with deferred removal of rport references. */
4336 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
4337 atomic_inc(&vha->vref_count);
4338 list_for_each_entry(fcport, &vha->vp_fcports, list) {
4339 if (fcport->drport &&
4340 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
4341 spin_unlock_irqrestore(&ha->vport_slock, flags);
4342 qla2x00_rport_del(fcport);
4343
4344 /*
4345 * Release the target mode FC NEXUS in
4346 * qla_target.c, if target mod is enabled.
4347 */
4348 qlt_fc_port_deleted(vha, fcport,
4349 base_vha->total_fcport_update_gen);
4350
4351 spin_lock_irqsave(&ha->vport_slock, flags);
4352 }
4353 }
4354 atomic_dec(&vha->vref_count);
4355 wake_up(&vha->vref_waitq);
4356 }
4357 spin_unlock_irqrestore(&ha->vport_slock, flags);
4358 }
4359
4360 /* Assumes idc_lock always held on entry */
4361 void
4362 qla83xx_reset_ownership(scsi_qla_host_t *vha)
4363 {
4364 struct qla_hw_data *ha = vha->hw;
4365 uint32_t drv_presence, drv_presence_mask;
4366 uint32_t dev_part_info1, dev_part_info2, class_type;
4367 uint32_t class_type_mask = 0x3;
4368 uint16_t fcoe_other_function = 0xffff, i;
4369
4370 if (IS_QLA8044(ha)) {
4371 drv_presence = qla8044_rd_direct(vha,
4372 QLA8044_CRB_DRV_ACTIVE_INDEX);
4373 dev_part_info1 = qla8044_rd_direct(vha,
4374 QLA8044_CRB_DEV_PART_INFO_INDEX);
4375 dev_part_info2 = qla8044_rd_direct(vha,
4376 QLA8044_CRB_DEV_PART_INFO2);
4377 } else {
4378 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4379 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
4380 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
4381 }
4382 for (i = 0; i < 8; i++) {
4383 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
4384 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
4385 (i != ha->portnum)) {
4386 fcoe_other_function = i;
4387 break;
4388 }
4389 }
4390 if (fcoe_other_function == 0xffff) {
4391 for (i = 0; i < 8; i++) {
4392 class_type = ((dev_part_info2 >> (i * 4)) &
4393 class_type_mask);
4394 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
4395 ((i + 8) != ha->portnum)) {
4396 fcoe_other_function = i + 8;
4397 break;
4398 }
4399 }
4400 }
4401 /*
4402 * Prepare drv-presence mask based on fcoe functions present.
4403 * However consider only valid physical fcoe function numbers (0-15).
4404 */
4405 drv_presence_mask = ~((1 << (ha->portnum)) |
4406 ((fcoe_other_function == 0xffff) ?
4407 0 : (1 << (fcoe_other_function))));
4408
4409 /* We are the reset owner iff:
4410 * - No other protocol drivers present.
4411 * - This is the lowest among fcoe functions. */
4412 if (!(drv_presence & drv_presence_mask) &&
4413 (ha->portnum < fcoe_other_function)) {
4414 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
4415 "This host is Reset owner.\n");
4416 ha->flags.nic_core_reset_owner = 1;
4417 }
4418 }
4419
4420 static int
4421 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
4422 {
4423 int rval = QLA_SUCCESS;
4424 struct qla_hw_data *ha = vha->hw;
4425 uint32_t drv_ack;
4426
4427 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4428 if (rval == QLA_SUCCESS) {
4429 drv_ack |= (1 << ha->portnum);
4430 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
4431 }
4432
4433 return rval;
4434 }
4435
4436 static int
4437 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
4438 {
4439 int rval = QLA_SUCCESS;
4440 struct qla_hw_data *ha = vha->hw;
4441 uint32_t drv_ack;
4442
4443 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4444 if (rval == QLA_SUCCESS) {
4445 drv_ack &= ~(1 << ha->portnum);
4446 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
4447 }
4448
4449 return rval;
4450 }
4451
4452 static const char *
4453 qla83xx_dev_state_to_string(uint32_t dev_state)
4454 {
4455 switch (dev_state) {
4456 case QLA8XXX_DEV_COLD:
4457 return "COLD/RE-INIT";
4458 case QLA8XXX_DEV_INITIALIZING:
4459 return "INITIALIZING";
4460 case QLA8XXX_DEV_READY:
4461 return "READY";
4462 case QLA8XXX_DEV_NEED_RESET:
4463 return "NEED RESET";
4464 case QLA8XXX_DEV_NEED_QUIESCENT:
4465 return "NEED QUIESCENT";
4466 case QLA8XXX_DEV_FAILED:
4467 return "FAILED";
4468 case QLA8XXX_DEV_QUIESCENT:
4469 return "QUIESCENT";
4470 default:
4471 return "Unknown";
4472 }
4473 }
4474
4475 /* Assumes idc-lock always held on entry */
4476 void
4477 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
4478 {
4479 struct qla_hw_data *ha = vha->hw;
4480 uint32_t idc_audit_reg = 0, duration_secs = 0;
4481
4482 switch (audit_type) {
4483 case IDC_AUDIT_TIMESTAMP:
4484 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
4485 idc_audit_reg = (ha->portnum) |
4486 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
4487 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
4488 break;
4489
4490 case IDC_AUDIT_COMPLETION:
4491 duration_secs = ((jiffies_to_msecs(jiffies) -
4492 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
4493 idc_audit_reg = (ha->portnum) |
4494 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
4495 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
4496 break;
4497
4498 default:
4499 ql_log(ql_log_warn, vha, 0xb078,
4500 "Invalid audit type specified.\n");
4501 break;
4502 }
4503 }
4504
4505 /* Assumes idc_lock always held on entry */
4506 static int
4507 qla83xx_initiating_reset(scsi_qla_host_t *vha)
4508 {
4509 struct qla_hw_data *ha = vha->hw;
4510 uint32_t idc_control, dev_state;
4511
4512 __qla83xx_get_idc_control(vha, &idc_control);
4513 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
4514 ql_log(ql_log_info, vha, 0xb080,
4515 "NIC Core reset has been disabled. idc-control=0x%x\n",
4516 idc_control);
4517 return QLA_FUNCTION_FAILED;
4518 }
4519
4520 /* Set NEED-RESET iff in READY state and we are the reset-owner */
4521 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4522 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
4523 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
4524 QLA8XXX_DEV_NEED_RESET);
4525 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
4526 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
4527 } else {
4528 const char *state = qla83xx_dev_state_to_string(dev_state);
4529 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
4530
4531 /* SV: XXX: Is timeout required here? */
4532 /* Wait for IDC state change READY -> NEED_RESET */
4533 while (dev_state == QLA8XXX_DEV_READY) {
4534 qla83xx_idc_unlock(vha, 0);
4535 msleep(200);
4536 qla83xx_idc_lock(vha, 0);
4537 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4538 }
4539 }
4540
4541 /* Send IDC ack by writing to drv-ack register */
4542 __qla83xx_set_drv_ack(vha);
4543
4544 return QLA_SUCCESS;
4545 }
4546
4547 int
4548 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
4549 {
4550 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
4551 }
4552
4553 int
4554 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
4555 {
4556 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
4557 }
4558
4559 static int
4560 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
4561 {
4562 uint32_t drv_presence = 0;
4563 struct qla_hw_data *ha = vha->hw;
4564
4565 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4566 if (drv_presence & (1 << ha->portnum))
4567 return QLA_SUCCESS;
4568 else
4569 return QLA_TEST_FAILED;
4570 }
4571
4572 int
4573 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
4574 {
4575 int rval = QLA_SUCCESS;
4576 struct qla_hw_data *ha = vha->hw;
4577
4578 ql_dbg(ql_dbg_p3p, vha, 0xb058,
4579 "Entered %s().\n", __func__);
4580
4581 if (vha->device_flags & DFLG_DEV_FAILED) {
4582 ql_log(ql_log_warn, vha, 0xb059,
4583 "Device in unrecoverable FAILED state.\n");
4584 return QLA_FUNCTION_FAILED;
4585 }
4586
4587 qla83xx_idc_lock(vha, 0);
4588
4589 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
4590 ql_log(ql_log_warn, vha, 0xb05a,
4591 "Function=0x%x has been removed from IDC participation.\n",
4592 ha->portnum);
4593 rval = QLA_FUNCTION_FAILED;
4594 goto exit;
4595 }
4596
4597 qla83xx_reset_ownership(vha);
4598
4599 rval = qla83xx_initiating_reset(vha);
4600
4601 /*
4602 * Perform reset if we are the reset-owner,
4603 * else wait till IDC state changes to READY/FAILED.
4604 */
4605 if (rval == QLA_SUCCESS) {
4606 rval = qla83xx_idc_state_handler(vha);
4607
4608 if (rval == QLA_SUCCESS)
4609 ha->flags.nic_core_hung = 0;
4610 __qla83xx_clear_drv_ack(vha);
4611 }
4612
4613 exit:
4614 qla83xx_idc_unlock(vha, 0);
4615
4616 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
4617
4618 return rval;
4619 }
4620
4621 int
4622 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
4623 {
4624 struct qla_hw_data *ha = vha->hw;
4625 int rval = QLA_FUNCTION_FAILED;
4626
4627 if (!IS_MCTP_CAPABLE(ha)) {
4628 /* This message can be removed from the final version */
4629 ql_log(ql_log_info, vha, 0x506d,
4630 "This board is not MCTP capable\n");
4631 return rval;
4632 }
4633
4634 if (!ha->mctp_dump) {
4635 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
4636 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
4637
4638 if (!ha->mctp_dump) {
4639 ql_log(ql_log_warn, vha, 0x506e,
4640 "Failed to allocate memory for mctp dump\n");
4641 return rval;
4642 }
4643 }
4644
4645 #define MCTP_DUMP_STR_ADDR 0x00000000
4646 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
4647 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
4648 if (rval != QLA_SUCCESS) {
4649 ql_log(ql_log_warn, vha, 0x506f,
4650 "Failed to capture mctp dump\n");
4651 } else {
4652 ql_log(ql_log_info, vha, 0x5070,
4653 "Mctp dump capture for host (%ld/%p).\n",
4654 vha->host_no, ha->mctp_dump);
4655 ha->mctp_dumped = 1;
4656 }
4657
4658 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
4659 ha->flags.nic_core_reset_hdlr_active = 1;
4660 rval = qla83xx_restart_nic_firmware(vha);
4661 if (rval)
4662 /* NIC Core reset failed. */
4663 ql_log(ql_log_warn, vha, 0x5071,
4664 "Failed to restart nic firmware\n");
4665 else
4666 ql_dbg(ql_dbg_p3p, vha, 0xb084,
4667 "Restarted NIC firmware successfully.\n");
4668 ha->flags.nic_core_reset_hdlr_active = 0;
4669 }
4670
4671 return rval;
4672
4673 }
4674
4675 /*
4676 * qla2x00_quiesce_io
4677 * Description: This function will block the new I/Os
4678 * Its not aborting any I/Os as context
4679 * is not destroyed during quiescence
4680 * Arguments: scsi_qla_host_t
4681 * return : void
4682 */
4683 void
4684 qla2x00_quiesce_io(scsi_qla_host_t *vha)
4685 {
4686 struct qla_hw_data *ha = vha->hw;
4687 struct scsi_qla_host *vp;
4688
4689 ql_dbg(ql_dbg_dpc, vha, 0x401d,
4690 "Quiescing I/O - ha=%p.\n", ha);
4691
4692 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
4693 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
4694 atomic_set(&vha->loop_state, LOOP_DOWN);
4695 qla2x00_mark_all_devices_lost(vha, 0);
4696 list_for_each_entry(vp, &ha->vp_list, list)
4697 qla2x00_mark_all_devices_lost(vp, 0);
4698 } else {
4699 if (!atomic_read(&vha->loop_down_timer))
4700 atomic_set(&vha->loop_down_timer,
4701 LOOP_DOWN_TIME);
4702 }
4703 /* Wait for pending cmds to complete */
4704 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
4705 }
4706
4707 void
4708 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
4709 {
4710 struct qla_hw_data *ha = vha->hw;
4711 struct scsi_qla_host *vp;
4712 unsigned long flags;
4713 fc_port_t *fcport;
4714
4715 /* For ISP82XX, driver waits for completion of the commands.
4716 * online flag should be set.
4717 */
4718 if (!(IS_P3P_TYPE(ha)))
4719 vha->flags.online = 0;
4720 ha->flags.chip_reset_done = 0;
4721 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4722 vha->qla_stats.total_isp_aborts++;
4723
4724 ql_log(ql_log_info, vha, 0x00af,
4725 "Performing ISP error recovery - ha=%p.\n", ha);
4726
4727 /* For ISP82XX, reset_chip is just disabling interrupts.
4728 * Driver waits for the completion of the commands.
4729 * the interrupts need to be enabled.
4730 */
4731 if (!(IS_P3P_TYPE(ha)))
4732 ha->isp_ops->reset_chip(vha);
4733
4734 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
4735 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
4736 atomic_set(&vha->loop_state, LOOP_DOWN);
4737 qla2x00_mark_all_devices_lost(vha, 0);
4738
4739 spin_lock_irqsave(&ha->vport_slock, flags);
4740 list_for_each_entry(vp, &ha->vp_list, list) {
4741 atomic_inc(&vp->vref_count);
4742 spin_unlock_irqrestore(&ha->vport_slock, flags);
4743
4744 qla2x00_mark_all_devices_lost(vp, 0);
4745
4746 spin_lock_irqsave(&ha->vport_slock, flags);
4747 atomic_dec(&vp->vref_count);
4748 }
4749 spin_unlock_irqrestore(&ha->vport_slock, flags);
4750 } else {
4751 if (!atomic_read(&vha->loop_down_timer))
4752 atomic_set(&vha->loop_down_timer,
4753 LOOP_DOWN_TIME);
4754 }
4755
4756 /* Clear all async request states across all VPs. */
4757 list_for_each_entry(fcport, &vha->vp_fcports, list)
4758 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4759 spin_lock_irqsave(&ha->vport_slock, flags);
4760 list_for_each_entry(vp, &ha->vp_list, list) {
4761 atomic_inc(&vp->vref_count);
4762 spin_unlock_irqrestore(&ha->vport_slock, flags);
4763
4764 list_for_each_entry(fcport, &vp->vp_fcports, list)
4765 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4766
4767 spin_lock_irqsave(&ha->vport_slock, flags);
4768 atomic_dec(&vp->vref_count);
4769 }
4770 spin_unlock_irqrestore(&ha->vport_slock, flags);
4771
4772 if (!ha->flags.eeh_busy) {
4773 /* Make sure for ISP 82XX IO DMA is complete */
4774 if (IS_P3P_TYPE(ha)) {
4775 qla82xx_chip_reset_cleanup(vha);
4776 ql_log(ql_log_info, vha, 0x00b4,
4777 "Done chip reset cleanup.\n");
4778
4779 /* Done waiting for pending commands.
4780 * Reset the online flag.
4781 */
4782 vha->flags.online = 0;
4783 }
4784
4785 /* Requeue all commands in outstanding command list. */
4786 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
4787 }
4788
4789 ha->chip_reset++;
4790 /* memory barrier */
4791 wmb();
4792 }
4793
4794 /*
4795 * qla2x00_abort_isp
4796 * Resets ISP and aborts all outstanding commands.
4797 *
4798 * Input:
4799 * ha = adapter block pointer.
4800 *
4801 * Returns:
4802 * 0 = success
4803 */
4804 int
4805 qla2x00_abort_isp(scsi_qla_host_t *vha)
4806 {
4807 int rval;
4808 uint8_t status = 0;
4809 struct qla_hw_data *ha = vha->hw;
4810 struct scsi_qla_host *vp;
4811 struct req_que *req = ha->req_q_map[0];
4812 unsigned long flags;
4813
4814 if (vha->flags.online) {
4815 qla2x00_abort_isp_cleanup(vha);
4816
4817 if (IS_QLA8031(ha)) {
4818 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
4819 "Clearing fcoe driver presence.\n");
4820 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
4821 ql_dbg(ql_dbg_p3p, vha, 0xb073,
4822 "Error while clearing DRV-Presence.\n");
4823 }
4824
4825 if (unlikely(pci_channel_offline(ha->pdev) &&
4826 ha->flags.pci_channel_io_perm_failure)) {
4827 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4828 status = 0;
4829 return status;
4830 }
4831
4832 ha->isp_ops->get_flash_version(vha, req->ring);
4833
4834 ha->isp_ops->nvram_config(vha);
4835
4836 if (!qla2x00_restart_isp(vha)) {
4837 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4838
4839 if (!atomic_read(&vha->loop_down_timer)) {
4840 /*
4841 * Issue marker command only when we are going
4842 * to start the I/O .
4843 */
4844 vha->marker_needed = 1;
4845 }
4846
4847 vha->flags.online = 1;
4848
4849 ha->isp_ops->enable_intrs(ha);
4850
4851 ha->isp_abort_cnt = 0;
4852 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4853
4854 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
4855 qla2x00_get_fw_version(vha);
4856 if (ha->fce) {
4857 ha->flags.fce_enabled = 1;
4858 memset(ha->fce, 0,
4859 fce_calc_size(ha->fce_bufs));
4860 rval = qla2x00_enable_fce_trace(vha,
4861 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
4862 &ha->fce_bufs);
4863 if (rval) {
4864 ql_log(ql_log_warn, vha, 0x8033,
4865 "Unable to reinitialize FCE "
4866 "(%d).\n", rval);
4867 ha->flags.fce_enabled = 0;
4868 }
4869 }
4870
4871 if (ha->eft) {
4872 memset(ha->eft, 0, EFT_SIZE);
4873 rval = qla2x00_enable_eft_trace(vha,
4874 ha->eft_dma, EFT_NUM_BUFFERS);
4875 if (rval) {
4876 ql_log(ql_log_warn, vha, 0x8034,
4877 "Unable to reinitialize EFT "
4878 "(%d).\n", rval);
4879 }
4880 }
4881 } else { /* failed the ISP abort */
4882 vha->flags.online = 1;
4883 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
4884 if (ha->isp_abort_cnt == 0) {
4885 ql_log(ql_log_fatal, vha, 0x8035,
4886 "ISP error recover failed - "
4887 "board disabled.\n");
4888 /*
4889 * The next call disables the board
4890 * completely.
4891 */
4892 ha->isp_ops->reset_adapter(vha);
4893 vha->flags.online = 0;
4894 clear_bit(ISP_ABORT_RETRY,
4895 &vha->dpc_flags);
4896 status = 0;
4897 } else { /* schedule another ISP abort */
4898 ha->isp_abort_cnt--;
4899 ql_dbg(ql_dbg_taskm, vha, 0x8020,
4900 "ISP abort - retry remaining %d.\n",
4901 ha->isp_abort_cnt);
4902 status = 1;
4903 }
4904 } else {
4905 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
4906 ql_dbg(ql_dbg_taskm, vha, 0x8021,
4907 "ISP error recovery - retrying (%d) "
4908 "more times.\n", ha->isp_abort_cnt);
4909 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4910 status = 1;
4911 }
4912 }
4913
4914 }
4915
4916 if (!status) {
4917 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
4918
4919 spin_lock_irqsave(&ha->vport_slock, flags);
4920 list_for_each_entry(vp, &ha->vp_list, list) {
4921 if (vp->vp_idx) {
4922 atomic_inc(&vp->vref_count);
4923 spin_unlock_irqrestore(&ha->vport_slock, flags);
4924
4925 qla2x00_vp_abort_isp(vp);
4926
4927 spin_lock_irqsave(&ha->vport_slock, flags);
4928 atomic_dec(&vp->vref_count);
4929 }
4930 }
4931 spin_unlock_irqrestore(&ha->vport_slock, flags);
4932
4933 if (IS_QLA8031(ha)) {
4934 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
4935 "Setting back fcoe driver presence.\n");
4936 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
4937 ql_dbg(ql_dbg_p3p, vha, 0xb074,
4938 "Error while setting DRV-Presence.\n");
4939 }
4940 } else {
4941 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
4942 __func__);
4943 }
4944
4945 return(status);
4946 }
4947
4948 /*
4949 * qla2x00_restart_isp
4950 * restarts the ISP after a reset
4951 *
4952 * Input:
4953 * ha = adapter block pointer.
4954 *
4955 * Returns:
4956 * 0 = success
4957 */
4958 static int
4959 qla2x00_restart_isp(scsi_qla_host_t *vha)
4960 {
4961 int status = 0;
4962 struct qla_hw_data *ha = vha->hw;
4963 struct req_que *req = ha->req_q_map[0];
4964 struct rsp_que *rsp = ha->rsp_q_map[0];
4965
4966 /* If firmware needs to be loaded */
4967 if (qla2x00_isp_firmware(vha)) {
4968 vha->flags.online = 0;
4969 status = ha->isp_ops->chip_diag(vha);
4970 if (!status)
4971 status = qla2x00_setup_chip(vha);
4972 }
4973
4974 if (!status && !(status = qla2x00_init_rings(vha))) {
4975 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4976 ha->flags.chip_reset_done = 1;
4977
4978 /* Initialize the queues in use */
4979 qla25xx_init_queues(ha);
4980
4981 status = qla2x00_fw_ready(vha);
4982 if (!status) {
4983 /* Issue a marker after FW becomes ready. */
4984 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
4985
4986 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4987 }
4988
4989 /* if no cable then assume it's good */
4990 if ((vha->device_flags & DFLG_NO_CABLE))
4991 status = 0;
4992 }
4993 return (status);
4994 }
4995
4996 static int
4997 qla25xx_init_queues(struct qla_hw_data *ha)
4998 {
4999 struct rsp_que *rsp = NULL;
5000 struct req_que *req = NULL;
5001 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5002 int ret = -1;
5003 int i;
5004
5005 for (i = 1; i < ha->max_rsp_queues; i++) {
5006 rsp = ha->rsp_q_map[i];
5007 if (rsp && test_bit(i, ha->rsp_qid_map)) {
5008 rsp->options &= ~BIT_0;
5009 ret = qla25xx_init_rsp_que(base_vha, rsp);
5010 if (ret != QLA_SUCCESS)
5011 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
5012 "%s Rsp que: %d init failed.\n",
5013 __func__, rsp->id);
5014 else
5015 ql_dbg(ql_dbg_init, base_vha, 0x0100,
5016 "%s Rsp que: %d inited.\n",
5017 __func__, rsp->id);
5018 }
5019 }
5020 for (i = 1; i < ha->max_req_queues; i++) {
5021 req = ha->req_q_map[i];
5022 if (req && test_bit(i, ha->req_qid_map)) {
5023 /* Clear outstanding commands array. */
5024 req->options &= ~BIT_0;
5025 ret = qla25xx_init_req_que(base_vha, req);
5026 if (ret != QLA_SUCCESS)
5027 ql_dbg(ql_dbg_init, base_vha, 0x0101,
5028 "%s Req que: %d init failed.\n",
5029 __func__, req->id);
5030 else
5031 ql_dbg(ql_dbg_init, base_vha, 0x0102,
5032 "%s Req que: %d inited.\n",
5033 __func__, req->id);
5034 }
5035 }
5036 return ret;
5037 }
5038
5039 /*
5040 * qla2x00_reset_adapter
5041 * Reset adapter.
5042 *
5043 * Input:
5044 * ha = adapter block pointer.
5045 */
5046 void
5047 qla2x00_reset_adapter(scsi_qla_host_t *vha)
5048 {
5049 unsigned long flags = 0;
5050 struct qla_hw_data *ha = vha->hw;
5051 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5052
5053 vha->flags.online = 0;
5054 ha->isp_ops->disable_intrs(ha);
5055
5056 spin_lock_irqsave(&ha->hardware_lock, flags);
5057 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
5058 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
5059 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
5060 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
5061 spin_unlock_irqrestore(&ha->hardware_lock, flags);
5062 }
5063
5064 void
5065 qla24xx_reset_adapter(scsi_qla_host_t *vha)
5066 {
5067 unsigned long flags = 0;
5068 struct qla_hw_data *ha = vha->hw;
5069 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
5070
5071 if (IS_P3P_TYPE(ha))
5072 return;
5073
5074 vha->flags.online = 0;
5075 ha->isp_ops->disable_intrs(ha);
5076
5077 spin_lock_irqsave(&ha->hardware_lock, flags);
5078 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
5079 RD_REG_DWORD(&reg->hccr);
5080 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
5081 RD_REG_DWORD(&reg->hccr);
5082 spin_unlock_irqrestore(&ha->hardware_lock, flags);
5083
5084 if (IS_NOPOLLING_TYPE(ha))
5085 ha->isp_ops->enable_intrs(ha);
5086 }
5087
5088 /* On sparc systems, obtain port and node WWN from firmware
5089 * properties.
5090 */
5091 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
5092 struct nvram_24xx *nv)
5093 {
5094 #ifdef CONFIG_SPARC
5095 struct qla_hw_data *ha = vha->hw;
5096 struct pci_dev *pdev = ha->pdev;
5097 struct device_node *dp = pci_device_to_OF_node(pdev);
5098 const u8 *val;
5099 int len;
5100
5101 val = of_get_property(dp, "port-wwn", &len);
5102 if (val && len >= WWN_SIZE)
5103 memcpy(nv->port_name, val, WWN_SIZE);
5104
5105 val = of_get_property(dp, "node-wwn", &len);
5106 if (val && len >= WWN_SIZE)
5107 memcpy(nv->node_name, val, WWN_SIZE);
5108 #endif
5109 }
5110
5111 int
5112 qla24xx_nvram_config(scsi_qla_host_t *vha)
5113 {
5114 int rval;
5115 struct init_cb_24xx *icb;
5116 struct nvram_24xx *nv;
5117 uint32_t *dptr;
5118 uint8_t *dptr1, *dptr2;
5119 uint32_t chksum;
5120 uint16_t cnt;
5121 struct qla_hw_data *ha = vha->hw;
5122
5123 rval = QLA_SUCCESS;
5124 icb = (struct init_cb_24xx *)ha->init_cb;
5125 nv = ha->nvram;
5126
5127 /* Determine NVRAM starting address. */
5128 if (ha->port_no == 0) {
5129 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
5130 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
5131 } else {
5132 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
5133 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
5134 }
5135
5136 ha->nvram_size = sizeof(struct nvram_24xx);
5137 ha->vpd_size = FA_NVRAM_VPD_SIZE;
5138
5139 /* Get VPD data into cache */
5140 ha->vpd = ha->nvram + VPD_OFFSET;
5141 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
5142 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
5143
5144 /* Get NVRAM data into cache and calculate checksum. */
5145 dptr = (uint32_t *)nv;
5146 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
5147 ha->nvram_size);
5148 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
5149 chksum += le32_to_cpu(*dptr);
5150
5151 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
5152 "Contents of NVRAM\n");
5153 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
5154 (uint8_t *)nv, ha->nvram_size);
5155
5156 /* Bad NVRAM data, set defaults parameters. */
5157 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
5158 || nv->id[3] != ' ' ||
5159 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
5160 /* Reset NVRAM data. */
5161 ql_log(ql_log_warn, vha, 0x006b,
5162 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
5163 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
5164 ql_log(ql_log_warn, vha, 0x006c,
5165 "Falling back to functioning (yet invalid -- WWPN) "
5166 "defaults.\n");
5167
5168 /*
5169 * Set default initialization control block.
5170 */
5171 memset(nv, 0, ha->nvram_size);
5172 nv->nvram_version = cpu_to_le16(ICB_VERSION);
5173 nv->version = cpu_to_le16(ICB_VERSION);
5174 nv->frame_payload_size = 2048;
5175 nv->execution_throttle = cpu_to_le16(0xFFFF);
5176 nv->exchange_count = cpu_to_le16(0);
5177 nv->hard_address = cpu_to_le16(124);
5178 nv->port_name[0] = 0x21;
5179 nv->port_name[1] = 0x00 + ha->port_no + 1;
5180 nv->port_name[2] = 0x00;
5181 nv->port_name[3] = 0xe0;
5182 nv->port_name[4] = 0x8b;
5183 nv->port_name[5] = 0x1c;
5184 nv->port_name[6] = 0x55;
5185 nv->port_name[7] = 0x86;
5186 nv->node_name[0] = 0x20;
5187 nv->node_name[1] = 0x00;
5188 nv->node_name[2] = 0x00;
5189 nv->node_name[3] = 0xe0;
5190 nv->node_name[4] = 0x8b;
5191 nv->node_name[5] = 0x1c;
5192 nv->node_name[6] = 0x55;
5193 nv->node_name[7] = 0x86;
5194 qla24xx_nvram_wwn_from_ofw(vha, nv);
5195 nv->login_retry_count = cpu_to_le16(8);
5196 nv->interrupt_delay_timer = cpu_to_le16(0);
5197 nv->login_timeout = cpu_to_le16(0);
5198 nv->firmware_options_1 =
5199 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
5200 nv->firmware_options_2 = cpu_to_le32(2 << 4);
5201 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
5202 nv->firmware_options_3 = cpu_to_le32(2 << 13);
5203 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
5204 nv->efi_parameters = cpu_to_le32(0);
5205 nv->reset_delay = 5;
5206 nv->max_luns_per_target = cpu_to_le16(128);
5207 nv->port_down_retry_count = cpu_to_le16(30);
5208 nv->link_down_timeout = cpu_to_le16(30);
5209
5210 rval = 1;
5211 }
5212
5213 if (!qla_ini_mode_enabled(vha)) {
5214 /* Don't enable full login after initial LIP */
5215 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
5216 /* Don't enable LIP full login for initiator */
5217 nv->host_p &= cpu_to_le32(~BIT_10);
5218 }
5219
5220 qlt_24xx_config_nvram_stage1(vha, nv);
5221
5222 /* Reset Initialization control block */
5223 memset(icb, 0, ha->init_cb_size);
5224
5225 /* Copy 1st segment. */
5226 dptr1 = (uint8_t *)icb;
5227 dptr2 = (uint8_t *)&nv->version;
5228 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
5229 while (cnt--)
5230 *dptr1++ = *dptr2++;
5231
5232 icb->login_retry_count = nv->login_retry_count;
5233 icb->link_down_on_nos = nv->link_down_on_nos;
5234
5235 /* Copy 2nd segment. */
5236 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
5237 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
5238 cnt = (uint8_t *)&icb->reserved_3 -
5239 (uint8_t *)&icb->interrupt_delay_timer;
5240 while (cnt--)
5241 *dptr1++ = *dptr2++;
5242
5243 /*
5244 * Setup driver NVRAM options.
5245 */
5246 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
5247 "QLA2462");
5248
5249 qlt_24xx_config_nvram_stage2(vha, icb);
5250
5251 if (nv->host_p & cpu_to_le32(BIT_15)) {
5252 /* Use alternate WWN? */
5253 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5254 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5255 }
5256
5257 /* Prepare nodename */
5258 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
5259 /*
5260 * Firmware will apply the following mask if the nodename was
5261 * not provided.
5262 */
5263 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5264 icb->node_name[0] &= 0xF0;
5265 }
5266
5267 /* Set host adapter parameters. */
5268 ha->flags.disable_risc_code_load = 0;
5269 ha->flags.enable_lip_reset = 0;
5270 ha->flags.enable_lip_full_login =
5271 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
5272 ha->flags.enable_target_reset =
5273 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
5274 ha->flags.enable_led_scheme = 0;
5275 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
5276
5277 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
5278 (BIT_6 | BIT_5 | BIT_4)) >> 4;
5279
5280 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
5281 sizeof(ha->fw_seriallink_options24));
5282
5283 /* save HBA serial number */
5284 ha->serial0 = icb->port_name[5];
5285 ha->serial1 = icb->port_name[6];
5286 ha->serial2 = icb->port_name[7];
5287 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5288 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5289
5290 icb->execution_throttle = cpu_to_le16(0xFFFF);
5291
5292 ha->retry_count = le16_to_cpu(nv->login_retry_count);
5293
5294 /* Set minimum login_timeout to 4 seconds. */
5295 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
5296 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
5297 if (le16_to_cpu(nv->login_timeout) < 4)
5298 nv->login_timeout = cpu_to_le16(4);
5299 ha->login_timeout = le16_to_cpu(nv->login_timeout);
5300
5301 /* Set minimum RATOV to 100 tenths of a second. */
5302 ha->r_a_tov = 100;
5303
5304 ha->loop_reset_delay = nv->reset_delay;
5305
5306 /* Link Down Timeout = 0:
5307 *
5308 * When Port Down timer expires we will start returning
5309 * I/O's to OS with "DID_NO_CONNECT".
5310 *
5311 * Link Down Timeout != 0:
5312 *
5313 * The driver waits for the link to come up after link down
5314 * before returning I/Os to OS with "DID_NO_CONNECT".
5315 */
5316 if (le16_to_cpu(nv->link_down_timeout) == 0) {
5317 ha->loop_down_abort_time =
5318 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5319 } else {
5320 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
5321 ha->loop_down_abort_time =
5322 (LOOP_DOWN_TIME - ha->link_down_timeout);
5323 }
5324
5325 /* Need enough time to try and get the port back. */
5326 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
5327 if (qlport_down_retry)
5328 ha->port_down_retry_count = qlport_down_retry;
5329
5330 /* Set login_retry_count */
5331 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
5332 if (ha->port_down_retry_count ==
5333 le16_to_cpu(nv->port_down_retry_count) &&
5334 ha->port_down_retry_count > 3)
5335 ha->login_retry_count = ha->port_down_retry_count;
5336 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5337 ha->login_retry_count = ha->port_down_retry_count;
5338 if (ql2xloginretrycount)
5339 ha->login_retry_count = ql2xloginretrycount;
5340
5341 /* Enable ZIO. */
5342 if (!vha->flags.init_done) {
5343 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
5344 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5345 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
5346 le16_to_cpu(icb->interrupt_delay_timer): 2;
5347 }
5348 icb->firmware_options_2 &= cpu_to_le32(
5349 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
5350 vha->flags.process_response_queue = 0;
5351 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5352 ha->zio_mode = QLA_ZIO_MODE_6;
5353
5354 ql_log(ql_log_info, vha, 0x006f,
5355 "ZIO mode %d enabled; timer delay (%d us).\n",
5356 ha->zio_mode, ha->zio_timer * 100);
5357
5358 icb->firmware_options_2 |= cpu_to_le32(
5359 (uint32_t)ha->zio_mode);
5360 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
5361 vha->flags.process_response_queue = 1;
5362 }
5363
5364 if (rval) {
5365 ql_log(ql_log_warn, vha, 0x0070,
5366 "NVRAM configuration failed.\n");
5367 }
5368 return (rval);
5369 }
5370
5371 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha)
5372 {
5373 struct qla27xx_image_status pri_image_status, sec_image_status;
5374 uint8_t valid_pri_image, valid_sec_image;
5375 uint32_t *wptr;
5376 uint32_t cnt, chksum, size;
5377 struct qla_hw_data *ha = vha->hw;
5378
5379 valid_pri_image = valid_sec_image = 1;
5380 ha->active_image = 0;
5381 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t);
5382
5383 if (!ha->flt_region_img_status_pri) {
5384 valid_pri_image = 0;
5385 goto check_sec_image;
5386 }
5387
5388 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status),
5389 ha->flt_region_img_status_pri, size);
5390
5391 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
5392 ql_dbg(ql_dbg_init, vha, 0x018b,
5393 "Primary image signature (0x%x) not valid\n",
5394 pri_image_status.signature);
5395 valid_pri_image = 0;
5396 goto check_sec_image;
5397 }
5398
5399 wptr = (uint32_t *)(&pri_image_status);
5400 cnt = size;
5401
5402 for (chksum = 0; cnt--; wptr++)
5403 chksum += le32_to_cpu(*wptr);
5404 if (chksum) {
5405 ql_dbg(ql_dbg_init, vha, 0x018c,
5406 "Checksum validation failed for primary image (0x%x)\n",
5407 chksum);
5408 valid_pri_image = 0;
5409 }
5410
5411 check_sec_image:
5412 if (!ha->flt_region_img_status_sec) {
5413 valid_sec_image = 0;
5414 goto check_valid_image;
5415 }
5416
5417 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
5418 ha->flt_region_img_status_sec, size);
5419
5420 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
5421 ql_dbg(ql_dbg_init, vha, 0x018d,
5422 "Secondary image signature(0x%x) not valid\n",
5423 sec_image_status.signature);
5424 valid_sec_image = 0;
5425 goto check_valid_image;
5426 }
5427
5428 wptr = (uint32_t *)(&sec_image_status);
5429 cnt = size;
5430 for (chksum = 0; cnt--; wptr++)
5431 chksum += le32_to_cpu(*wptr);
5432 if (chksum) {
5433 ql_dbg(ql_dbg_init, vha, 0x018e,
5434 "Checksum validation failed for secondary image (0x%x)\n",
5435 chksum);
5436 valid_sec_image = 0;
5437 }
5438
5439 check_valid_image:
5440 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1))
5441 ha->active_image = QLA27XX_PRIMARY_IMAGE;
5442 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) {
5443 if (!ha->active_image ||
5444 pri_image_status.generation_number <
5445 sec_image_status.generation_number)
5446 ha->active_image = QLA27XX_SECONDARY_IMAGE;
5447 }
5448
5449 ql_dbg(ql_dbg_init, vha, 0x018f, "%s image\n",
5450 ha->active_image == 0 ? "default bootld and fw" :
5451 ha->active_image == 1 ? "primary" :
5452 ha->active_image == 2 ? "secondary" :
5453 "Invalid");
5454
5455 return ha->active_image;
5456 }
5457
5458 static int
5459 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
5460 uint32_t faddr)
5461 {
5462 int rval = QLA_SUCCESS;
5463 int segments, fragment;
5464 uint32_t *dcode, dlen;
5465 uint32_t risc_addr;
5466 uint32_t risc_size;
5467 uint32_t i;
5468 struct qla_hw_data *ha = vha->hw;
5469 struct req_que *req = ha->req_q_map[0];
5470
5471 ql_dbg(ql_dbg_init, vha, 0x008b,
5472 "FW: Loading firmware from flash (%x).\n", faddr);
5473
5474 rval = QLA_SUCCESS;
5475
5476 segments = FA_RISC_CODE_SEGMENTS;
5477 dcode = (uint32_t *)req->ring;
5478 *srisc_addr = 0;
5479
5480 if (IS_QLA27XX(ha) &&
5481 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE)
5482 faddr = ha->flt_region_fw_sec;
5483
5484 /* Validate firmware image by checking version. */
5485 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
5486 for (i = 0; i < 4; i++)
5487 dcode[i] = be32_to_cpu(dcode[i]);
5488 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
5489 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
5490 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
5491 dcode[3] == 0)) {
5492 ql_log(ql_log_fatal, vha, 0x008c,
5493 "Unable to verify the integrity of flash firmware "
5494 "image.\n");
5495 ql_log(ql_log_fatal, vha, 0x008d,
5496 "Firmware data: %08x %08x %08x %08x.\n",
5497 dcode[0], dcode[1], dcode[2], dcode[3]);
5498
5499 return QLA_FUNCTION_FAILED;
5500 }
5501
5502 while (segments && rval == QLA_SUCCESS) {
5503 /* Read segment's load information. */
5504 qla24xx_read_flash_data(vha, dcode, faddr, 4);
5505
5506 risc_addr = be32_to_cpu(dcode[2]);
5507 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
5508 risc_size = be32_to_cpu(dcode[3]);
5509
5510 fragment = 0;
5511 while (risc_size > 0 && rval == QLA_SUCCESS) {
5512 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
5513 if (dlen > risc_size)
5514 dlen = risc_size;
5515
5516 ql_dbg(ql_dbg_init, vha, 0x008e,
5517 "Loading risc segment@ risc addr %x "
5518 "number of dwords 0x%x offset 0x%x.\n",
5519 risc_addr, dlen, faddr);
5520
5521 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
5522 for (i = 0; i < dlen; i++)
5523 dcode[i] = swab32(dcode[i]);
5524
5525 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5526 dlen);
5527 if (rval) {
5528 ql_log(ql_log_fatal, vha, 0x008f,
5529 "Failed to load segment %d of firmware.\n",
5530 fragment);
5531 return QLA_FUNCTION_FAILED;
5532 }
5533
5534 faddr += dlen;
5535 risc_addr += dlen;
5536 risc_size -= dlen;
5537 fragment++;
5538 }
5539
5540 /* Next segment. */
5541 segments--;
5542 }
5543
5544 if (!IS_QLA27XX(ha))
5545 return rval;
5546
5547 if (ha->fw_dump_template)
5548 vfree(ha->fw_dump_template);
5549 ha->fw_dump_template = NULL;
5550 ha->fw_dump_template_len = 0;
5551
5552 ql_dbg(ql_dbg_init, vha, 0x0161,
5553 "Loading fwdump template from %x\n", faddr);
5554 qla24xx_read_flash_data(vha, dcode, faddr, 7);
5555 risc_size = be32_to_cpu(dcode[2]);
5556 ql_dbg(ql_dbg_init, vha, 0x0162,
5557 "-> array size %x dwords\n", risc_size);
5558 if (risc_size == 0 || risc_size == ~0)
5559 goto default_template;
5560
5561 dlen = (risc_size - 8) * sizeof(*dcode);
5562 ql_dbg(ql_dbg_init, vha, 0x0163,
5563 "-> template allocating %x bytes...\n", dlen);
5564 ha->fw_dump_template = vmalloc(dlen);
5565 if (!ha->fw_dump_template) {
5566 ql_log(ql_log_warn, vha, 0x0164,
5567 "Failed fwdump template allocate %x bytes.\n", risc_size);
5568 goto default_template;
5569 }
5570
5571 faddr += 7;
5572 risc_size -= 8;
5573 dcode = ha->fw_dump_template;
5574 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
5575 for (i = 0; i < risc_size; i++)
5576 dcode[i] = le32_to_cpu(dcode[i]);
5577
5578 if (!qla27xx_fwdt_template_valid(dcode)) {
5579 ql_log(ql_log_warn, vha, 0x0165,
5580 "Failed fwdump template validate\n");
5581 goto default_template;
5582 }
5583
5584 dlen = qla27xx_fwdt_template_size(dcode);
5585 ql_dbg(ql_dbg_init, vha, 0x0166,
5586 "-> template size %x bytes\n", dlen);
5587 if (dlen > risc_size * sizeof(*dcode)) {
5588 ql_log(ql_log_warn, vha, 0x0167,
5589 "Failed fwdump template exceeds array by %x bytes\n",
5590 (uint32_t)(dlen - risc_size * sizeof(*dcode)));
5591 goto default_template;
5592 }
5593 ha->fw_dump_template_len = dlen;
5594 return rval;
5595
5596 default_template:
5597 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n");
5598 if (ha->fw_dump_template)
5599 vfree(ha->fw_dump_template);
5600 ha->fw_dump_template = NULL;
5601 ha->fw_dump_template_len = 0;
5602
5603 dlen = qla27xx_fwdt_template_default_size();
5604 ql_dbg(ql_dbg_init, vha, 0x0169,
5605 "-> template allocating %x bytes...\n", dlen);
5606 ha->fw_dump_template = vmalloc(dlen);
5607 if (!ha->fw_dump_template) {
5608 ql_log(ql_log_warn, vha, 0x016a,
5609 "Failed fwdump template allocate %x bytes.\n", risc_size);
5610 goto failed_template;
5611 }
5612
5613 dcode = ha->fw_dump_template;
5614 risc_size = dlen / sizeof(*dcode);
5615 memcpy(dcode, qla27xx_fwdt_template_default(), dlen);
5616 for (i = 0; i < risc_size; i++)
5617 dcode[i] = be32_to_cpu(dcode[i]);
5618
5619 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
5620 ql_log(ql_log_warn, vha, 0x016b,
5621 "Failed fwdump template validate\n");
5622 goto failed_template;
5623 }
5624
5625 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
5626 ql_dbg(ql_dbg_init, vha, 0x016c,
5627 "-> template size %x bytes\n", dlen);
5628 ha->fw_dump_template_len = dlen;
5629 return rval;
5630
5631 failed_template:
5632 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n");
5633 if (ha->fw_dump_template)
5634 vfree(ha->fw_dump_template);
5635 ha->fw_dump_template = NULL;
5636 ha->fw_dump_template_len = 0;
5637 return rval;
5638 }
5639
5640 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
5641
5642 int
5643 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5644 {
5645 int rval;
5646 int i, fragment;
5647 uint16_t *wcode, *fwcode;
5648 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
5649 struct fw_blob *blob;
5650 struct qla_hw_data *ha = vha->hw;
5651 struct req_que *req = ha->req_q_map[0];
5652
5653 /* Load firmware blob. */
5654 blob = qla2x00_request_firmware(vha);
5655 if (!blob) {
5656 ql_log(ql_log_info, vha, 0x0083,
5657 "Firmware image unavailable.\n");
5658 ql_log(ql_log_info, vha, 0x0084,
5659 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
5660 return QLA_FUNCTION_FAILED;
5661 }
5662
5663 rval = QLA_SUCCESS;
5664
5665 wcode = (uint16_t *)req->ring;
5666 *srisc_addr = 0;
5667 fwcode = (uint16_t *)blob->fw->data;
5668 fwclen = 0;
5669
5670 /* Validate firmware image by checking version. */
5671 if (blob->fw->size < 8 * sizeof(uint16_t)) {
5672 ql_log(ql_log_fatal, vha, 0x0085,
5673 "Unable to verify integrity of firmware image (%Zd).\n",
5674 blob->fw->size);
5675 goto fail_fw_integrity;
5676 }
5677 for (i = 0; i < 4; i++)
5678 wcode[i] = be16_to_cpu(fwcode[i + 4]);
5679 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
5680 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
5681 wcode[2] == 0 && wcode[3] == 0)) {
5682 ql_log(ql_log_fatal, vha, 0x0086,
5683 "Unable to verify integrity of firmware image.\n");
5684 ql_log(ql_log_fatal, vha, 0x0087,
5685 "Firmware data: %04x %04x %04x %04x.\n",
5686 wcode[0], wcode[1], wcode[2], wcode[3]);
5687 goto fail_fw_integrity;
5688 }
5689
5690 seg = blob->segs;
5691 while (*seg && rval == QLA_SUCCESS) {
5692 risc_addr = *seg;
5693 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
5694 risc_size = be16_to_cpu(fwcode[3]);
5695
5696 /* Validate firmware image size. */
5697 fwclen += risc_size * sizeof(uint16_t);
5698 if (blob->fw->size < fwclen) {
5699 ql_log(ql_log_fatal, vha, 0x0088,
5700 "Unable to verify integrity of firmware image "
5701 "(%Zd).\n", blob->fw->size);
5702 goto fail_fw_integrity;
5703 }
5704
5705 fragment = 0;
5706 while (risc_size > 0 && rval == QLA_SUCCESS) {
5707 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
5708 if (wlen > risc_size)
5709 wlen = risc_size;
5710 ql_dbg(ql_dbg_init, vha, 0x0089,
5711 "Loading risc segment@ risc addr %x number of "
5712 "words 0x%x.\n", risc_addr, wlen);
5713
5714 for (i = 0; i < wlen; i++)
5715 wcode[i] = swab16(fwcode[i]);
5716
5717 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5718 wlen);
5719 if (rval) {
5720 ql_log(ql_log_fatal, vha, 0x008a,
5721 "Failed to load segment %d of firmware.\n",
5722 fragment);
5723 break;
5724 }
5725
5726 fwcode += wlen;
5727 risc_addr += wlen;
5728 risc_size -= wlen;
5729 fragment++;
5730 }
5731
5732 /* Next segment. */
5733 seg++;
5734 }
5735 return rval;
5736
5737 fail_fw_integrity:
5738 return QLA_FUNCTION_FAILED;
5739 }
5740
5741 static int
5742 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5743 {
5744 int rval;
5745 int segments, fragment;
5746 uint32_t *dcode, dlen;
5747 uint32_t risc_addr;
5748 uint32_t risc_size;
5749 uint32_t i;
5750 struct fw_blob *blob;
5751 const uint32_t *fwcode;
5752 uint32_t fwclen;
5753 struct qla_hw_data *ha = vha->hw;
5754 struct req_que *req = ha->req_q_map[0];
5755
5756 /* Load firmware blob. */
5757 blob = qla2x00_request_firmware(vha);
5758 if (!blob) {
5759 ql_log(ql_log_warn, vha, 0x0090,
5760 "Firmware image unavailable.\n");
5761 ql_log(ql_log_warn, vha, 0x0091,
5762 "Firmware images can be retrieved from: "
5763 QLA_FW_URL ".\n");
5764
5765 return QLA_FUNCTION_FAILED;
5766 }
5767
5768 ql_dbg(ql_dbg_init, vha, 0x0092,
5769 "FW: Loading via request-firmware.\n");
5770
5771 rval = QLA_SUCCESS;
5772
5773 segments = FA_RISC_CODE_SEGMENTS;
5774 dcode = (uint32_t *)req->ring;
5775 *srisc_addr = 0;
5776 fwcode = (uint32_t *)blob->fw->data;
5777 fwclen = 0;
5778
5779 /* Validate firmware image by checking version. */
5780 if (blob->fw->size < 8 * sizeof(uint32_t)) {
5781 ql_log(ql_log_fatal, vha, 0x0093,
5782 "Unable to verify integrity of firmware image (%Zd).\n",
5783 blob->fw->size);
5784 return QLA_FUNCTION_FAILED;
5785 }
5786 for (i = 0; i < 4; i++)
5787 dcode[i] = be32_to_cpu(fwcode[i + 4]);
5788 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
5789 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
5790 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
5791 dcode[3] == 0)) {
5792 ql_log(ql_log_fatal, vha, 0x0094,
5793 "Unable to verify integrity of firmware image (%Zd).\n",
5794 blob->fw->size);
5795 ql_log(ql_log_fatal, vha, 0x0095,
5796 "Firmware data: %08x %08x %08x %08x.\n",
5797 dcode[0], dcode[1], dcode[2], dcode[3]);
5798 return QLA_FUNCTION_FAILED;
5799 }
5800
5801 while (segments && rval == QLA_SUCCESS) {
5802 risc_addr = be32_to_cpu(fwcode[2]);
5803 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
5804 risc_size = be32_to_cpu(fwcode[3]);
5805
5806 /* Validate firmware image size. */
5807 fwclen += risc_size * sizeof(uint32_t);
5808 if (blob->fw->size < fwclen) {
5809 ql_log(ql_log_fatal, vha, 0x0096,
5810 "Unable to verify integrity of firmware image "
5811 "(%Zd).\n", blob->fw->size);
5812 return QLA_FUNCTION_FAILED;
5813 }
5814
5815 fragment = 0;
5816 while (risc_size > 0 && rval == QLA_SUCCESS) {
5817 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
5818 if (dlen > risc_size)
5819 dlen = risc_size;
5820
5821 ql_dbg(ql_dbg_init, vha, 0x0097,
5822 "Loading risc segment@ risc addr %x "
5823 "number of dwords 0x%x.\n", risc_addr, dlen);
5824
5825 for (i = 0; i < dlen; i++)
5826 dcode[i] = swab32(fwcode[i]);
5827
5828 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5829 dlen);
5830 if (rval) {
5831 ql_log(ql_log_fatal, vha, 0x0098,
5832 "Failed to load segment %d of firmware.\n",
5833 fragment);
5834 return QLA_FUNCTION_FAILED;
5835 }
5836
5837 fwcode += dlen;
5838 risc_addr += dlen;
5839 risc_size -= dlen;
5840 fragment++;
5841 }
5842
5843 /* Next segment. */
5844 segments--;
5845 }
5846
5847 if (!IS_QLA27XX(ha))
5848 return rval;
5849
5850 if (ha->fw_dump_template)
5851 vfree(ha->fw_dump_template);
5852 ha->fw_dump_template = NULL;
5853 ha->fw_dump_template_len = 0;
5854
5855 ql_dbg(ql_dbg_init, vha, 0x171,
5856 "Loading fwdump template from %x\n",
5857 (uint32_t)((void *)fwcode - (void *)blob->fw->data));
5858 risc_size = be32_to_cpu(fwcode[2]);
5859 ql_dbg(ql_dbg_init, vha, 0x172,
5860 "-> array size %x dwords\n", risc_size);
5861 if (risc_size == 0 || risc_size == ~0)
5862 goto default_template;
5863
5864 dlen = (risc_size - 8) * sizeof(*fwcode);
5865 ql_dbg(ql_dbg_init, vha, 0x0173,
5866 "-> template allocating %x bytes...\n", dlen);
5867 ha->fw_dump_template = vmalloc(dlen);
5868 if (!ha->fw_dump_template) {
5869 ql_log(ql_log_warn, vha, 0x0174,
5870 "Failed fwdump template allocate %x bytes.\n", risc_size);
5871 goto default_template;
5872 }
5873
5874 fwcode += 7;
5875 risc_size -= 8;
5876 dcode = ha->fw_dump_template;
5877 for (i = 0; i < risc_size; i++)
5878 dcode[i] = le32_to_cpu(fwcode[i]);
5879
5880 if (!qla27xx_fwdt_template_valid(dcode)) {
5881 ql_log(ql_log_warn, vha, 0x0175,
5882 "Failed fwdump template validate\n");
5883 goto default_template;
5884 }
5885
5886 dlen = qla27xx_fwdt_template_size(dcode);
5887 ql_dbg(ql_dbg_init, vha, 0x0176,
5888 "-> template size %x bytes\n", dlen);
5889 if (dlen > risc_size * sizeof(*fwcode)) {
5890 ql_log(ql_log_warn, vha, 0x0177,
5891 "Failed fwdump template exceeds array by %x bytes\n",
5892 (uint32_t)(dlen - risc_size * sizeof(*fwcode)));
5893 goto default_template;
5894 }
5895 ha->fw_dump_template_len = dlen;
5896 return rval;
5897
5898 default_template:
5899 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n");
5900 if (ha->fw_dump_template)
5901 vfree(ha->fw_dump_template);
5902 ha->fw_dump_template = NULL;
5903 ha->fw_dump_template_len = 0;
5904
5905 dlen = qla27xx_fwdt_template_default_size();
5906 ql_dbg(ql_dbg_init, vha, 0x0179,
5907 "-> template allocating %x bytes...\n", dlen);
5908 ha->fw_dump_template = vmalloc(dlen);
5909 if (!ha->fw_dump_template) {
5910 ql_log(ql_log_warn, vha, 0x017a,
5911 "Failed fwdump template allocate %x bytes.\n", risc_size);
5912 goto failed_template;
5913 }
5914
5915 dcode = ha->fw_dump_template;
5916 risc_size = dlen / sizeof(*fwcode);
5917 fwcode = qla27xx_fwdt_template_default();
5918 for (i = 0; i < risc_size; i++)
5919 dcode[i] = be32_to_cpu(fwcode[i]);
5920
5921 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
5922 ql_log(ql_log_warn, vha, 0x017b,
5923 "Failed fwdump template validate\n");
5924 goto failed_template;
5925 }
5926
5927 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
5928 ql_dbg(ql_dbg_init, vha, 0x017c,
5929 "-> template size %x bytes\n", dlen);
5930 ha->fw_dump_template_len = dlen;
5931 return rval;
5932
5933 failed_template:
5934 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n");
5935 if (ha->fw_dump_template)
5936 vfree(ha->fw_dump_template);
5937 ha->fw_dump_template = NULL;
5938 ha->fw_dump_template_len = 0;
5939 return rval;
5940 }
5941
5942 int
5943 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5944 {
5945 int rval;
5946
5947 if (ql2xfwloadbin == 1)
5948 return qla81xx_load_risc(vha, srisc_addr);
5949
5950 /*
5951 * FW Load priority:
5952 * 1) Firmware via request-firmware interface (.bin file).
5953 * 2) Firmware residing in flash.
5954 */
5955 rval = qla24xx_load_risc_blob(vha, srisc_addr);
5956 if (rval == QLA_SUCCESS)
5957 return rval;
5958
5959 return qla24xx_load_risc_flash(vha, srisc_addr,
5960 vha->hw->flt_region_fw);
5961 }
5962
5963 int
5964 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5965 {
5966 int rval;
5967 struct qla_hw_data *ha = vha->hw;
5968
5969 if (ql2xfwloadbin == 2)
5970 goto try_blob_fw;
5971
5972 /*
5973 * FW Load priority:
5974 * 1) Firmware residing in flash.
5975 * 2) Firmware via request-firmware interface (.bin file).
5976 * 3) Golden-Firmware residing in flash -- limited operation.
5977 */
5978 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
5979 if (rval == QLA_SUCCESS)
5980 return rval;
5981
5982 try_blob_fw:
5983 rval = qla24xx_load_risc_blob(vha, srisc_addr);
5984 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
5985 return rval;
5986
5987 ql_log(ql_log_info, vha, 0x0099,
5988 "Attempting to fallback to golden firmware.\n");
5989 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
5990 if (rval != QLA_SUCCESS)
5991 return rval;
5992
5993 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
5994 ha->flags.running_gold_fw = 1;
5995 return rval;
5996 }
5997
5998 void
5999 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
6000 {
6001 int ret, retries;
6002 struct qla_hw_data *ha = vha->hw;
6003
6004 if (ha->flags.pci_channel_io_perm_failure)
6005 return;
6006 if (!IS_FWI2_CAPABLE(ha))
6007 return;
6008 if (!ha->fw_major_version)
6009 return;
6010
6011 ret = qla2x00_stop_firmware(vha);
6012 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
6013 ret != QLA_INVALID_COMMAND && retries ; retries--) {
6014 ha->isp_ops->reset_chip(vha);
6015 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
6016 continue;
6017 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
6018 continue;
6019 ql_log(ql_log_info, vha, 0x8015,
6020 "Attempting retry of stop-firmware command.\n");
6021 ret = qla2x00_stop_firmware(vha);
6022 }
6023 }
6024
6025 int
6026 qla24xx_configure_vhba(scsi_qla_host_t *vha)
6027 {
6028 int rval = QLA_SUCCESS;
6029 int rval2;
6030 uint16_t mb[MAILBOX_REGISTER_COUNT];
6031 struct qla_hw_data *ha = vha->hw;
6032 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6033 struct req_que *req;
6034 struct rsp_que *rsp;
6035
6036 if (!vha->vp_idx)
6037 return -EINVAL;
6038
6039 rval = qla2x00_fw_ready(base_vha);
6040 if (vha->qpair)
6041 req = vha->qpair->req;
6042 else
6043 req = ha->req_q_map[0];
6044 rsp = req->rsp;
6045
6046 if (rval == QLA_SUCCESS) {
6047 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6048 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
6049 }
6050
6051 vha->flags.management_server_logged_in = 0;
6052
6053 /* Login to SNS first */
6054 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
6055 BIT_1);
6056 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
6057 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
6058 ql_dbg(ql_dbg_init, vha, 0x0120,
6059 "Failed SNS login: loop_id=%x, rval2=%d\n",
6060 NPH_SNS, rval2);
6061 else
6062 ql_dbg(ql_dbg_init, vha, 0x0103,
6063 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
6064 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
6065 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
6066 return (QLA_FUNCTION_FAILED);
6067 }
6068
6069 atomic_set(&vha->loop_down_timer, 0);
6070 atomic_set(&vha->loop_state, LOOP_UP);
6071 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6072 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
6073 rval = qla2x00_loop_resync(base_vha);
6074
6075 return rval;
6076 }
6077
6078 /* 84XX Support **************************************************************/
6079
6080 static LIST_HEAD(qla_cs84xx_list);
6081 static DEFINE_MUTEX(qla_cs84xx_mutex);
6082
6083 static struct qla_chip_state_84xx *
6084 qla84xx_get_chip(struct scsi_qla_host *vha)
6085 {
6086 struct qla_chip_state_84xx *cs84xx;
6087 struct qla_hw_data *ha = vha->hw;
6088
6089 mutex_lock(&qla_cs84xx_mutex);
6090
6091 /* Find any shared 84xx chip. */
6092 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
6093 if (cs84xx->bus == ha->pdev->bus) {
6094 kref_get(&cs84xx->kref);
6095 goto done;
6096 }
6097 }
6098
6099 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
6100 if (!cs84xx)
6101 goto done;
6102
6103 kref_init(&cs84xx->kref);
6104 spin_lock_init(&cs84xx->access_lock);
6105 mutex_init(&cs84xx->fw_update_mutex);
6106 cs84xx->bus = ha->pdev->bus;
6107
6108 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
6109 done:
6110 mutex_unlock(&qla_cs84xx_mutex);
6111 return cs84xx;
6112 }
6113
6114 static void
6115 __qla84xx_chip_release(struct kref *kref)
6116 {
6117 struct qla_chip_state_84xx *cs84xx =
6118 container_of(kref, struct qla_chip_state_84xx, kref);
6119
6120 mutex_lock(&qla_cs84xx_mutex);
6121 list_del(&cs84xx->list);
6122 mutex_unlock(&qla_cs84xx_mutex);
6123 kfree(cs84xx);
6124 }
6125
6126 void
6127 qla84xx_put_chip(struct scsi_qla_host *vha)
6128 {
6129 struct qla_hw_data *ha = vha->hw;
6130 if (ha->cs84xx)
6131 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
6132 }
6133
6134 static int
6135 qla84xx_init_chip(scsi_qla_host_t *vha)
6136 {
6137 int rval;
6138 uint16_t status[2];
6139 struct qla_hw_data *ha = vha->hw;
6140
6141 mutex_lock(&ha->cs84xx->fw_update_mutex);
6142
6143 rval = qla84xx_verify_chip(vha, status);
6144
6145 mutex_unlock(&ha->cs84xx->fw_update_mutex);
6146
6147 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
6148 QLA_SUCCESS;
6149 }
6150
6151 /* 81XX Support **************************************************************/
6152
6153 int
6154 qla81xx_nvram_config(scsi_qla_host_t *vha)
6155 {
6156 int rval;
6157 struct init_cb_81xx *icb;
6158 struct nvram_81xx *nv;
6159 uint32_t *dptr;
6160 uint8_t *dptr1, *dptr2;
6161 uint32_t chksum;
6162 uint16_t cnt;
6163 struct qla_hw_data *ha = vha->hw;
6164
6165 rval = QLA_SUCCESS;
6166 icb = (struct init_cb_81xx *)ha->init_cb;
6167 nv = ha->nvram;
6168
6169 /* Determine NVRAM starting address. */
6170 ha->nvram_size = sizeof(struct nvram_81xx);
6171 ha->vpd_size = FA_NVRAM_VPD_SIZE;
6172 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
6173 ha->vpd_size = FA_VPD_SIZE_82XX;
6174
6175 /* Get VPD data into cache */
6176 ha->vpd = ha->nvram + VPD_OFFSET;
6177 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
6178 ha->vpd_size);
6179
6180 /* Get NVRAM data into cache and calculate checksum. */
6181 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
6182 ha->nvram_size);
6183 dptr = (uint32_t *)nv;
6184 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
6185 chksum += le32_to_cpu(*dptr);
6186
6187 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
6188 "Contents of NVRAM:\n");
6189 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
6190 (uint8_t *)nv, ha->nvram_size);
6191
6192 /* Bad NVRAM data, set defaults parameters. */
6193 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
6194 || nv->id[3] != ' ' ||
6195 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
6196 /* Reset NVRAM data. */
6197 ql_log(ql_log_info, vha, 0x0073,
6198 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
6199 "version=0x%x.\n", chksum, nv->id[0],
6200 le16_to_cpu(nv->nvram_version));
6201 ql_log(ql_log_info, vha, 0x0074,
6202 "Falling back to functioning (yet invalid -- WWPN) "
6203 "defaults.\n");
6204
6205 /*
6206 * Set default initialization control block.
6207 */
6208 memset(nv, 0, ha->nvram_size);
6209 nv->nvram_version = cpu_to_le16(ICB_VERSION);
6210 nv->version = cpu_to_le16(ICB_VERSION);
6211 nv->frame_payload_size = 2048;
6212 nv->execution_throttle = cpu_to_le16(0xFFFF);
6213 nv->exchange_count = cpu_to_le16(0);
6214 nv->port_name[0] = 0x21;
6215 nv->port_name[1] = 0x00 + ha->port_no + 1;
6216 nv->port_name[2] = 0x00;
6217 nv->port_name[3] = 0xe0;
6218 nv->port_name[4] = 0x8b;
6219 nv->port_name[5] = 0x1c;
6220 nv->port_name[6] = 0x55;
6221 nv->port_name[7] = 0x86;
6222 nv->node_name[0] = 0x20;
6223 nv->node_name[1] = 0x00;
6224 nv->node_name[2] = 0x00;
6225 nv->node_name[3] = 0xe0;
6226 nv->node_name[4] = 0x8b;
6227 nv->node_name[5] = 0x1c;
6228 nv->node_name[6] = 0x55;
6229 nv->node_name[7] = 0x86;
6230 nv->login_retry_count = cpu_to_le16(8);
6231 nv->interrupt_delay_timer = cpu_to_le16(0);
6232 nv->login_timeout = cpu_to_le16(0);
6233 nv->firmware_options_1 =
6234 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
6235 nv->firmware_options_2 = cpu_to_le32(2 << 4);
6236 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
6237 nv->firmware_options_3 = cpu_to_le32(2 << 13);
6238 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
6239 nv->efi_parameters = cpu_to_le32(0);
6240 nv->reset_delay = 5;
6241 nv->max_luns_per_target = cpu_to_le16(128);
6242 nv->port_down_retry_count = cpu_to_le16(30);
6243 nv->link_down_timeout = cpu_to_le16(180);
6244 nv->enode_mac[0] = 0x00;
6245 nv->enode_mac[1] = 0xC0;
6246 nv->enode_mac[2] = 0xDD;
6247 nv->enode_mac[3] = 0x04;
6248 nv->enode_mac[4] = 0x05;
6249 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
6250
6251 rval = 1;
6252 }
6253
6254 if (IS_T10_PI_CAPABLE(ha))
6255 nv->frame_payload_size &= ~7;
6256
6257 qlt_81xx_config_nvram_stage1(vha, nv);
6258
6259 /* Reset Initialization control block */
6260 memset(icb, 0, ha->init_cb_size);
6261
6262 /* Copy 1st segment. */
6263 dptr1 = (uint8_t *)icb;
6264 dptr2 = (uint8_t *)&nv->version;
6265 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
6266 while (cnt--)
6267 *dptr1++ = *dptr2++;
6268
6269 icb->login_retry_count = nv->login_retry_count;
6270
6271 /* Copy 2nd segment. */
6272 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
6273 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
6274 cnt = (uint8_t *)&icb->reserved_5 -
6275 (uint8_t *)&icb->interrupt_delay_timer;
6276 while (cnt--)
6277 *dptr1++ = *dptr2++;
6278
6279 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
6280 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
6281 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
6282 icb->enode_mac[0] = 0x00;
6283 icb->enode_mac[1] = 0xC0;
6284 icb->enode_mac[2] = 0xDD;
6285 icb->enode_mac[3] = 0x04;
6286 icb->enode_mac[4] = 0x05;
6287 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
6288 }
6289
6290 /* Use extended-initialization control block. */
6291 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
6292
6293 /*
6294 * Setup driver NVRAM options.
6295 */
6296 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
6297 "QLE8XXX");
6298
6299 qlt_81xx_config_nvram_stage2(vha, icb);
6300
6301 /* Use alternate WWN? */
6302 if (nv->host_p & cpu_to_le32(BIT_15)) {
6303 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
6304 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
6305 }
6306
6307 /* Prepare nodename */
6308 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
6309 /*
6310 * Firmware will apply the following mask if the nodename was
6311 * not provided.
6312 */
6313 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
6314 icb->node_name[0] &= 0xF0;
6315 }
6316
6317 /* Set host adapter parameters. */
6318 ha->flags.disable_risc_code_load = 0;
6319 ha->flags.enable_lip_reset = 0;
6320 ha->flags.enable_lip_full_login =
6321 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
6322 ha->flags.enable_target_reset =
6323 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
6324 ha->flags.enable_led_scheme = 0;
6325 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
6326
6327 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
6328 (BIT_6 | BIT_5 | BIT_4)) >> 4;
6329
6330 /* save HBA serial number */
6331 ha->serial0 = icb->port_name[5];
6332 ha->serial1 = icb->port_name[6];
6333 ha->serial2 = icb->port_name[7];
6334 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
6335 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
6336
6337 icb->execution_throttle = cpu_to_le16(0xFFFF);
6338
6339 ha->retry_count = le16_to_cpu(nv->login_retry_count);
6340
6341 /* Set minimum login_timeout to 4 seconds. */
6342 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
6343 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
6344 if (le16_to_cpu(nv->login_timeout) < 4)
6345 nv->login_timeout = cpu_to_le16(4);
6346 ha->login_timeout = le16_to_cpu(nv->login_timeout);
6347
6348 /* Set minimum RATOV to 100 tenths of a second. */
6349 ha->r_a_tov = 100;
6350
6351 ha->loop_reset_delay = nv->reset_delay;
6352
6353 /* Link Down Timeout = 0:
6354 *
6355 * When Port Down timer expires we will start returning
6356 * I/O's to OS with "DID_NO_CONNECT".
6357 *
6358 * Link Down Timeout != 0:
6359 *
6360 * The driver waits for the link to come up after link down
6361 * before returning I/Os to OS with "DID_NO_CONNECT".
6362 */
6363 if (le16_to_cpu(nv->link_down_timeout) == 0) {
6364 ha->loop_down_abort_time =
6365 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
6366 } else {
6367 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
6368 ha->loop_down_abort_time =
6369 (LOOP_DOWN_TIME - ha->link_down_timeout);
6370 }
6371
6372 /* Need enough time to try and get the port back. */
6373 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
6374 if (qlport_down_retry)
6375 ha->port_down_retry_count = qlport_down_retry;
6376
6377 /* Set login_retry_count */
6378 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
6379 if (ha->port_down_retry_count ==
6380 le16_to_cpu(nv->port_down_retry_count) &&
6381 ha->port_down_retry_count > 3)
6382 ha->login_retry_count = ha->port_down_retry_count;
6383 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
6384 ha->login_retry_count = ha->port_down_retry_count;
6385 if (ql2xloginretrycount)
6386 ha->login_retry_count = ql2xloginretrycount;
6387
6388 /* if not running MSI-X we need handshaking on interrupts */
6389 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha)))
6390 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
6391
6392 /* Enable ZIO. */
6393 if (!vha->flags.init_done) {
6394 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
6395 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
6396 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
6397 le16_to_cpu(icb->interrupt_delay_timer): 2;
6398 }
6399 icb->firmware_options_2 &= cpu_to_le32(
6400 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
6401 vha->flags.process_response_queue = 0;
6402 if (ha->zio_mode != QLA_ZIO_DISABLED) {
6403 ha->zio_mode = QLA_ZIO_MODE_6;
6404
6405 ql_log(ql_log_info, vha, 0x0075,
6406 "ZIO mode %d enabled; timer delay (%d us).\n",
6407 ha->zio_mode,
6408 ha->zio_timer * 100);
6409
6410 icb->firmware_options_2 |= cpu_to_le32(
6411 (uint32_t)ha->zio_mode);
6412 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
6413 vha->flags.process_response_queue = 1;
6414 }
6415
6416 if (rval) {
6417 ql_log(ql_log_warn, vha, 0x0076,
6418 "NVRAM configuration failed.\n");
6419 }
6420 return (rval);
6421 }
6422
6423 int
6424 qla82xx_restart_isp(scsi_qla_host_t *vha)
6425 {
6426 int status, rval;
6427 struct qla_hw_data *ha = vha->hw;
6428 struct req_que *req = ha->req_q_map[0];
6429 struct rsp_que *rsp = ha->rsp_q_map[0];
6430 struct scsi_qla_host *vp;
6431 unsigned long flags;
6432
6433 status = qla2x00_init_rings(vha);
6434 if (!status) {
6435 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6436 ha->flags.chip_reset_done = 1;
6437
6438 status = qla2x00_fw_ready(vha);
6439 if (!status) {
6440 /* Issue a marker after FW becomes ready. */
6441 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
6442 vha->flags.online = 1;
6443 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6444 }
6445
6446 /* if no cable then assume it's good */
6447 if ((vha->device_flags & DFLG_NO_CABLE))
6448 status = 0;
6449 }
6450
6451 if (!status) {
6452 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6453
6454 if (!atomic_read(&vha->loop_down_timer)) {
6455 /*
6456 * Issue marker command only when we are going
6457 * to start the I/O .
6458 */
6459 vha->marker_needed = 1;
6460 }
6461
6462 ha->isp_ops->enable_intrs(ha);
6463
6464 ha->isp_abort_cnt = 0;
6465 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6466
6467 /* Update the firmware version */
6468 status = qla82xx_check_md_needed(vha);
6469
6470 if (ha->fce) {
6471 ha->flags.fce_enabled = 1;
6472 memset(ha->fce, 0,
6473 fce_calc_size(ha->fce_bufs));
6474 rval = qla2x00_enable_fce_trace(vha,
6475 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
6476 &ha->fce_bufs);
6477 if (rval) {
6478 ql_log(ql_log_warn, vha, 0x8001,
6479 "Unable to reinitialize FCE (%d).\n",
6480 rval);
6481 ha->flags.fce_enabled = 0;
6482 }
6483 }
6484
6485 if (ha->eft) {
6486 memset(ha->eft, 0, EFT_SIZE);
6487 rval = qla2x00_enable_eft_trace(vha,
6488 ha->eft_dma, EFT_NUM_BUFFERS);
6489 if (rval) {
6490 ql_log(ql_log_warn, vha, 0x8010,
6491 "Unable to reinitialize EFT (%d).\n",
6492 rval);
6493 }
6494 }
6495 }
6496
6497 if (!status) {
6498 ql_dbg(ql_dbg_taskm, vha, 0x8011,
6499 "qla82xx_restart_isp succeeded.\n");
6500
6501 spin_lock_irqsave(&ha->vport_slock, flags);
6502 list_for_each_entry(vp, &ha->vp_list, list) {
6503 if (vp->vp_idx) {
6504 atomic_inc(&vp->vref_count);
6505 spin_unlock_irqrestore(&ha->vport_slock, flags);
6506
6507 qla2x00_vp_abort_isp(vp);
6508
6509 spin_lock_irqsave(&ha->vport_slock, flags);
6510 atomic_dec(&vp->vref_count);
6511 }
6512 }
6513 spin_unlock_irqrestore(&ha->vport_slock, flags);
6514
6515 } else {
6516 ql_log(ql_log_warn, vha, 0x8016,
6517 "qla82xx_restart_isp **** FAILED ****.\n");
6518 }
6519
6520 return status;
6521 }
6522
6523 void
6524 qla81xx_update_fw_options(scsi_qla_host_t *vha)
6525 {
6526 struct qla_hw_data *ha = vha->hw;
6527
6528 /* Hold status IOCBs until ABTS response received. */
6529 if (ql2xfwholdabts)
6530 ha->fw_options[3] |= BIT_12;
6531
6532 /* Set Retry FLOGI in case of P2P connection */
6533 if (ha->operating_mode == P2P) {
6534 ha->fw_options[2] |= BIT_3;
6535 ql_dbg(ql_dbg_disc, vha, 0x2103,
6536 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
6537 __func__, ha->fw_options[2]);
6538 }
6539
6540 if (!ql2xetsenable)
6541 goto out;
6542
6543 /* Enable ETS Burst. */
6544 memset(ha->fw_options, 0, sizeof(ha->fw_options));
6545 ha->fw_options[2] |= BIT_9;
6546 out:
6547 qla2x00_set_fw_options(vha, ha->fw_options);
6548 }
6549
6550 /*
6551 * qla24xx_get_fcp_prio
6552 * Gets the fcp cmd priority value for the logged in port.
6553 * Looks for a match of the port descriptors within
6554 * each of the fcp prio config entries. If a match is found,
6555 * the tag (priority) value is returned.
6556 *
6557 * Input:
6558 * vha = scsi host structure pointer.
6559 * fcport = port structure pointer.
6560 *
6561 * Return:
6562 * non-zero (if found)
6563 * -1 (if not found)
6564 *
6565 * Context:
6566 * Kernel context
6567 */
6568 static int
6569 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
6570 {
6571 int i, entries;
6572 uint8_t pid_match, wwn_match;
6573 int priority;
6574 uint32_t pid1, pid2;
6575 uint64_t wwn1, wwn2;
6576 struct qla_fcp_prio_entry *pri_entry;
6577 struct qla_hw_data *ha = vha->hw;
6578
6579 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
6580 return -1;
6581
6582 priority = -1;
6583 entries = ha->fcp_prio_cfg->num_entries;
6584 pri_entry = &ha->fcp_prio_cfg->entry[0];
6585
6586 for (i = 0; i < entries; i++) {
6587 pid_match = wwn_match = 0;
6588
6589 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
6590 pri_entry++;
6591 continue;
6592 }
6593
6594 /* check source pid for a match */
6595 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
6596 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
6597 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
6598 if (pid1 == INVALID_PORT_ID)
6599 pid_match++;
6600 else if (pid1 == pid2)
6601 pid_match++;
6602 }
6603
6604 /* check destination pid for a match */
6605 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
6606 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
6607 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
6608 if (pid1 == INVALID_PORT_ID)
6609 pid_match++;
6610 else if (pid1 == pid2)
6611 pid_match++;
6612 }
6613
6614 /* check source WWN for a match */
6615 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
6616 wwn1 = wwn_to_u64(vha->port_name);
6617 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
6618 if (wwn2 == (uint64_t)-1)
6619 wwn_match++;
6620 else if (wwn1 == wwn2)
6621 wwn_match++;
6622 }
6623
6624 /* check destination WWN for a match */
6625 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
6626 wwn1 = wwn_to_u64(fcport->port_name);
6627 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
6628 if (wwn2 == (uint64_t)-1)
6629 wwn_match++;
6630 else if (wwn1 == wwn2)
6631 wwn_match++;
6632 }
6633
6634 if (pid_match == 2 || wwn_match == 2) {
6635 /* Found a matching entry */
6636 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
6637 priority = pri_entry->tag;
6638 break;
6639 }
6640
6641 pri_entry++;
6642 }
6643
6644 return priority;
6645 }
6646
6647 /*
6648 * qla24xx_update_fcport_fcp_prio
6649 * Activates fcp priority for the logged in fc port
6650 *
6651 * Input:
6652 * vha = scsi host structure pointer.
6653 * fcp = port structure pointer.
6654 *
6655 * Return:
6656 * QLA_SUCCESS or QLA_FUNCTION_FAILED
6657 *
6658 * Context:
6659 * Kernel context.
6660 */
6661 int
6662 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
6663 {
6664 int ret;
6665 int priority;
6666 uint16_t mb[5];
6667
6668 if (fcport->port_type != FCT_TARGET ||
6669 fcport->loop_id == FC_NO_LOOP_ID)
6670 return QLA_FUNCTION_FAILED;
6671
6672 priority = qla24xx_get_fcp_prio(vha, fcport);
6673 if (priority < 0)
6674 return QLA_FUNCTION_FAILED;
6675
6676 if (IS_P3P_TYPE(vha->hw)) {
6677 fcport->fcp_prio = priority & 0xf;
6678 return QLA_SUCCESS;
6679 }
6680
6681 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
6682 if (ret == QLA_SUCCESS) {
6683 if (fcport->fcp_prio != priority)
6684 ql_dbg(ql_dbg_user, vha, 0x709e,
6685 "Updated FCP_CMND priority - value=%d loop_id=%d "
6686 "port_id=%02x%02x%02x.\n", priority,
6687 fcport->loop_id, fcport->d_id.b.domain,
6688 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6689 fcport->fcp_prio = priority & 0xf;
6690 } else
6691 ql_dbg(ql_dbg_user, vha, 0x704f,
6692 "Unable to update FCP_CMND priority - ret=0x%x for "
6693 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
6694 fcport->d_id.b.domain, fcport->d_id.b.area,
6695 fcport->d_id.b.al_pa);
6696 return ret;
6697 }
6698
6699 /*
6700 * qla24xx_update_all_fcp_prio
6701 * Activates fcp priority for all the logged in ports
6702 *
6703 * Input:
6704 * ha = adapter block pointer.
6705 *
6706 * Return:
6707 * QLA_SUCCESS or QLA_FUNCTION_FAILED
6708 *
6709 * Context:
6710 * Kernel context.
6711 */
6712 int
6713 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
6714 {
6715 int ret;
6716 fc_port_t *fcport;
6717
6718 ret = QLA_FUNCTION_FAILED;
6719 /* We need to set priority for all logged in ports */
6720 list_for_each_entry(fcport, &vha->vp_fcports, list)
6721 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
6722
6723 return ret;
6724 }
6725
6726 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, int vp_idx)
6727 {
6728 int rsp_id = 0;
6729 int req_id = 0;
6730 int i;
6731 struct qla_hw_data *ha = vha->hw;
6732 uint16_t qpair_id = 0;
6733 struct qla_qpair *qpair = NULL;
6734 struct qla_msix_entry *msix;
6735
6736 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
6737 ql_log(ql_log_warn, vha, 0x00181,
6738 "FW/Driver is not multi-queue capable.\n");
6739 return NULL;
6740 }
6741
6742 if (ql2xmqsupport) {
6743 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
6744 if (qpair == NULL) {
6745 ql_log(ql_log_warn, vha, 0x0182,
6746 "Failed to allocate memory for queue pair.\n");
6747 return NULL;
6748 }
6749 memset(qpair, 0, sizeof(struct qla_qpair));
6750
6751 qpair->hw = vha->hw;
6752
6753 /* Assign available que pair id */
6754 mutex_lock(&ha->mq_lock);
6755 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
6756 if (qpair_id >= ha->max_qpairs) {
6757 mutex_unlock(&ha->mq_lock);
6758 ql_log(ql_log_warn, vha, 0x0183,
6759 "No resources to create additional q pair.\n");
6760 goto fail_qid_map;
6761 }
6762 set_bit(qpair_id, ha->qpair_qid_map);
6763 ha->queue_pair_map[qpair_id] = qpair;
6764 qpair->id = qpair_id;
6765 qpair->vp_idx = vp_idx;
6766
6767 for (i = 0; i < ha->msix_count; i++) {
6768 msix = &ha->msix_entries[i];
6769 if (msix->in_use)
6770 continue;
6771 qpair->msix = msix;
6772 ql_log(ql_dbg_multiq, vha, 0xc00f,
6773 "Vector %x selected for qpair\n", msix->vector);
6774 break;
6775 }
6776 if (!qpair->msix) {
6777 ql_log(ql_log_warn, vha, 0x0184,
6778 "Out of MSI-X vectors!.\n");
6779 goto fail_msix;
6780 }
6781
6782 qpair->msix->in_use = 1;
6783 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
6784
6785 mutex_unlock(&ha->mq_lock);
6786
6787 /* Create response queue first */
6788 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair);
6789 if (!rsp_id) {
6790 ql_log(ql_log_warn, vha, 0x0185,
6791 "Failed to create response queue.\n");
6792 goto fail_rsp;
6793 }
6794
6795 qpair->rsp = ha->rsp_q_map[rsp_id];
6796
6797 /* Create request queue */
6798 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos);
6799 if (!req_id) {
6800 ql_log(ql_log_warn, vha, 0x0186,
6801 "Failed to create request queue.\n");
6802 goto fail_req;
6803 }
6804
6805 qpair->req = ha->req_q_map[req_id];
6806 qpair->rsp->req = qpair->req;
6807
6808 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
6809 if (ha->fw_attributes & BIT_4)
6810 qpair->difdix_supported = 1;
6811 }
6812
6813 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
6814 if (!qpair->srb_mempool) {
6815 ql_log(ql_log_warn, vha, 0x0191,
6816 "Failed to create srb mempool for qpair %d\n",
6817 qpair->id);
6818 goto fail_mempool;
6819 }
6820
6821 /* Mark as online */
6822 qpair->online = 1;
6823
6824 if (!vha->flags.qpairs_available)
6825 vha->flags.qpairs_available = 1;
6826
6827 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
6828 "Request/Response queue pair created, id %d\n",
6829 qpair->id);
6830 ql_dbg(ql_dbg_init, vha, 0x0187,
6831 "Request/Response queue pair created, id %d\n",
6832 qpair->id);
6833 }
6834 return qpair;
6835
6836 fail_mempool:
6837 fail_req:
6838 qla25xx_delete_rsp_que(vha, qpair->rsp);
6839 fail_rsp:
6840 mutex_lock(&ha->mq_lock);
6841 qpair->msix->in_use = 0;
6842 list_del(&qpair->qp_list_elem);
6843 if (list_empty(&vha->qp_list))
6844 vha->flags.qpairs_available = 0;
6845 fail_msix:
6846 ha->queue_pair_map[qpair_id] = NULL;
6847 clear_bit(qpair_id, ha->qpair_qid_map);
6848 mutex_unlock(&ha->mq_lock);
6849 fail_qid_map:
6850 kfree(qpair);
6851 return NULL;
6852 }
6853
6854 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
6855 {
6856 int ret;
6857 struct qla_hw_data *ha = qpair->hw;
6858
6859 qpair->delete_in_progress = 1;
6860 while (atomic_read(&qpair->ref_count))
6861 msleep(500);
6862
6863 ret = qla25xx_delete_req_que(vha, qpair->req);
6864 if (ret != QLA_SUCCESS)
6865 goto fail;
6866 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
6867 if (ret != QLA_SUCCESS)
6868 goto fail;
6869
6870 mutex_lock(&ha->mq_lock);
6871 ha->queue_pair_map[qpair->id] = NULL;
6872 clear_bit(qpair->id, ha->qpair_qid_map);
6873 list_del(&qpair->qp_list_elem);
6874 if (list_empty(&vha->qp_list))
6875 vha->flags.qpairs_available = 0;
6876 mempool_destroy(qpair->srb_mempool);
6877 kfree(qpair);
6878 mutex_unlock(&ha->mq_lock);
6879
6880 return QLA_SUCCESS;
6881 fail:
6882 return ret;
6883 }
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