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scsi: qla2xxx: Fix function argument descriptions
[mirror_ubuntu-hirsute-kernel.git] / drivers / scsi / qla2xxx / qla_init.c
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_gbl.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/vmalloc.h>
13
14 #include "qla_devtbl.h"
15
16 #ifdef CONFIG_SPARC
17 #include <asm/prom.h>
18 #endif
19
20 #include <target/target_core_base.h>
21 #include "qla_target.h"
22
23 /*
24 * QLogic ISP2x00 Hardware Support Function Prototypes.
25 */
26 static int qla2x00_isp_firmware(scsi_qla_host_t *);
27 static int qla2x00_setup_chip(scsi_qla_host_t *);
28 static int qla2x00_fw_ready(scsi_qla_host_t *);
29 static int qla2x00_configure_hba(scsi_qla_host_t *);
30 static int qla2x00_configure_loop(scsi_qla_host_t *);
31 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
32 static int qla2x00_configure_fabric(scsi_qla_host_t *);
33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
34 static int qla2x00_restart_isp(scsi_qla_host_t *);
35
36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
37 static int qla84xx_init_chip(scsi_qla_host_t *);
38 static int qla25xx_init_queues(struct qla_hw_data *);
39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *);
40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *,
41 struct event_arg *);
42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
43 struct event_arg *);
44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
45
46 /* SRB Extensions ---------------------------------------------------------- */
47
48 void
49 qla2x00_sp_timeout(struct timer_list *t)
50 {
51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
52 struct srb_iocb *iocb;
53 scsi_qla_host_t *vha = sp->vha;
54 struct req_que *req;
55 unsigned long flags;
56
57 spin_lock_irqsave(&vha->hw->hardware_lock, flags);
58 req = vha->hw->req_q_map[0];
59 req->outstanding_cmds[sp->handle] = NULL;
60 iocb = &sp->u.iocb_cmd;
61 iocb->timeout(sp);
62 if (sp->type != SRB_ELS_DCMD)
63 sp->free(sp);
64 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
65 }
66
67 void
68 qla2x00_sp_free(void *ptr)
69 {
70 srb_t *sp = ptr;
71 struct srb_iocb *iocb = &sp->u.iocb_cmd;
72
73 del_timer(&iocb->timer);
74 qla2x00_rel_sp(sp);
75 }
76
77 /* Asynchronous Login/Logout Routines -------------------------------------- */
78
79 unsigned long
80 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
81 {
82 unsigned long tmo;
83 struct qla_hw_data *ha = vha->hw;
84
85 /* Firmware should use switch negotiated r_a_tov for timeout. */
86 tmo = ha->r_a_tov / 10 * 2;
87 if (IS_QLAFX00(ha)) {
88 tmo = FX00_DEF_RATOV * 2;
89 } else if (!IS_FWI2_CAPABLE(ha)) {
90 /*
91 * Except for earlier ISPs where the timeout is seeded from the
92 * initialization control block.
93 */
94 tmo = ha->login_timeout;
95 }
96 return tmo;
97 }
98
99 void
100 qla2x00_async_iocb_timeout(void *data)
101 {
102 srb_t *sp = data;
103 fc_port_t *fcport = sp->fcport;
104 struct srb_iocb *lio = &sp->u.iocb_cmd;
105 struct event_arg ea;
106
107 if (fcport) {
108 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
109 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
110 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
111
112 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
113 } else {
114 pr_info("Async-%s timeout - hdl=%x.\n",
115 sp->name, sp->handle);
116 }
117
118 switch (sp->type) {
119 case SRB_LOGIN_CMD:
120 if (!fcport)
121 break;
122 /* Retry as needed. */
123 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
124 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
125 QLA_LOGIO_LOGIN_RETRIED : 0;
126 memset(&ea, 0, sizeof(ea));
127 ea.event = FCME_PLOGI_DONE;
128 ea.fcport = sp->fcport;
129 ea.data[0] = lio->u.logio.data[0];
130 ea.data[1] = lio->u.logio.data[1];
131 ea.sp = sp;
132 qla24xx_handle_plogi_done_event(fcport->vha, &ea);
133 break;
134 case SRB_LOGOUT_CMD:
135 if (!fcport)
136 break;
137 qlt_logo_completion_handler(fcport, QLA_FUNCTION_TIMEOUT);
138 break;
139 case SRB_CT_PTHRU_CMD:
140 case SRB_MB_IOCB:
141 case SRB_NACK_PLOGI:
142 case SRB_NACK_PRLI:
143 case SRB_NACK_LOGO:
144 case SRB_CTRL_VP:
145 sp->done(sp, QLA_FUNCTION_TIMEOUT);
146 break;
147 }
148 }
149
150 static void
151 qla2x00_async_login_sp_done(void *ptr, int res)
152 {
153 srb_t *sp = ptr;
154 struct scsi_qla_host *vha = sp->vha;
155 struct srb_iocb *lio = &sp->u.iocb_cmd;
156 struct event_arg ea;
157
158 ql_dbg(ql_dbg_disc, vha, 0x20dd,
159 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
160
161 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
162
163 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
164 memset(&ea, 0, sizeof(ea));
165 ea.event = FCME_PLOGI_DONE;
166 ea.fcport = sp->fcport;
167 ea.data[0] = lio->u.logio.data[0];
168 ea.data[1] = lio->u.logio.data[1];
169 ea.iop[0] = lio->u.logio.iop[0];
170 ea.iop[1] = lio->u.logio.iop[1];
171 ea.sp = sp;
172 qla2x00_fcport_event_handler(vha, &ea);
173 }
174
175 sp->free(sp);
176 }
177
178 int
179 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
180 uint16_t *data)
181 {
182 srb_t *sp;
183 struct srb_iocb *lio;
184 int rval = QLA_FUNCTION_FAILED;
185
186 if (!vha->flags.online)
187 goto done;
188
189 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
190 if (!sp)
191 goto done;
192
193 fcport->flags |= FCF_ASYNC_SENT;
194 fcport->logout_completed = 0;
195
196 fcport->disc_state = DSC_LOGIN_PEND;
197 sp->type = SRB_LOGIN_CMD;
198 sp->name = "login";
199 sp->gen1 = fcport->rscn_gen;
200 sp->gen2 = fcport->login_gen;
201 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
202
203 lio = &sp->u.iocb_cmd;
204 lio->timeout = qla2x00_async_iocb_timeout;
205 sp->done = qla2x00_async_login_sp_done;
206 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
207
208 if (fcport->fc4f_nvme)
209 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
210
211 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
212 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
213 rval = qla2x00_start_sp(sp);
214 if (rval != QLA_SUCCESS) {
215 fcport->flags |= FCF_LOGIN_NEEDED;
216 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
217 goto done_free_sp;
218 }
219
220 ql_dbg(ql_dbg_disc, vha, 0x2072,
221 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x "
222 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id,
223 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
224 fcport->login_retry);
225 return rval;
226
227 done_free_sp:
228 sp->free(sp);
229 fcport->flags &= ~FCF_ASYNC_SENT;
230 done:
231 return rval;
232 }
233
234 static void
235 qla2x00_async_logout_sp_done(void *ptr, int res)
236 {
237 srb_t *sp = ptr;
238 struct srb_iocb *lio = &sp->u.iocb_cmd;
239
240 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
241 if (!test_bit(UNLOADING, &sp->vha->dpc_flags))
242 qla2x00_post_async_logout_done_work(sp->vha, sp->fcport,
243 lio->u.logio.data);
244 sp->free(sp);
245 }
246
247 int
248 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
249 {
250 srb_t *sp;
251 struct srb_iocb *lio;
252 int rval = QLA_FUNCTION_FAILED;
253
254 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
255 return rval;
256
257 fcport->flags |= FCF_ASYNC_SENT;
258 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
259 if (!sp)
260 goto done;
261
262 sp->type = SRB_LOGOUT_CMD;
263 sp->name = "logout";
264 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
265
266 lio = &sp->u.iocb_cmd;
267 lio->timeout = qla2x00_async_iocb_timeout;
268 sp->done = qla2x00_async_logout_sp_done;
269 rval = qla2x00_start_sp(sp);
270 if (rval != QLA_SUCCESS)
271 goto done_free_sp;
272
273 ql_dbg(ql_dbg_disc, vha, 0x2070,
274 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n",
275 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
276 fcport->d_id.b.area, fcport->d_id.b.al_pa,
277 fcport->port_name);
278 return rval;
279
280 done_free_sp:
281 sp->free(sp);
282 done:
283 fcport->flags &= ~FCF_ASYNC_SENT;
284 return rval;
285 }
286
287 void
288 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
289 uint16_t *data)
290 {
291 /* Don't re-login in target mode */
292 if (!fcport->tgt_session)
293 qla2x00_mark_device_lost(vha, fcport, 1, 0);
294 qlt_logo_completion_handler(fcport, data[0]);
295 }
296
297 static void
298 qla2x00_async_prlo_sp_done(void *s, int res)
299 {
300 srb_t *sp = (srb_t *)s;
301 struct srb_iocb *lio = &sp->u.iocb_cmd;
302 struct scsi_qla_host *vha = sp->vha;
303
304 if (!test_bit(UNLOADING, &vha->dpc_flags))
305 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
306 lio->u.logio.data);
307 sp->free(sp);
308 }
309
310 int
311 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
312 {
313 srb_t *sp;
314 struct srb_iocb *lio;
315 int rval;
316
317 rval = QLA_FUNCTION_FAILED;
318 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
319 if (!sp)
320 goto done;
321
322 sp->type = SRB_PRLO_CMD;
323 sp->name = "prlo";
324 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
325
326 lio = &sp->u.iocb_cmd;
327 lio->timeout = qla2x00_async_iocb_timeout;
328 sp->done = qla2x00_async_prlo_sp_done;
329 rval = qla2x00_start_sp(sp);
330 if (rval != QLA_SUCCESS)
331 goto done_free_sp;
332
333 ql_dbg(ql_dbg_disc, vha, 0x2070,
334 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
335 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
336 fcport->d_id.b.area, fcport->d_id.b.al_pa);
337 return rval;
338
339 done_free_sp:
340 sp->free(sp);
341 done:
342 return rval;
343 }
344
345 static
346 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
347 {
348 struct fc_port *fcport = ea->fcport;
349
350 ql_dbg(ql_dbg_disc, vha, 0x20d2,
351 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
352 __func__, fcport->port_name, fcport->disc_state,
353 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
354 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
355
356 if (ea->data[0] != MBS_COMMAND_COMPLETE) {
357 ql_dbg(ql_dbg_disc, vha, 0x2066,
358 "%s %8phC: adisc fail: post delete\n",
359 __func__, ea->fcport->port_name);
360 qlt_schedule_sess_for_deletion(ea->fcport);
361 return;
362 }
363
364 if (ea->fcport->disc_state == DSC_DELETE_PEND)
365 return;
366
367 if (ea->sp->gen2 != ea->fcport->login_gen) {
368 /* target side must have changed it. */
369 ql_dbg(ql_dbg_disc, vha, 0x20d3,
370 "%s %8phC generation changed\n",
371 __func__, ea->fcport->port_name);
372 return;
373 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
374 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n",
375 __func__, __LINE__, ea->fcport->port_name);
376 qla24xx_post_gidpn_work(vha, ea->fcport);
377 return;
378 }
379
380 __qla24xx_handle_gpdb_event(vha, ea);
381 }
382
383 static void
384 qla2x00_async_adisc_sp_done(void *ptr, int res)
385 {
386 srb_t *sp = ptr;
387 struct scsi_qla_host *vha = sp->vha;
388 struct event_arg ea;
389 struct srb_iocb *lio = &sp->u.iocb_cmd;
390
391 ql_dbg(ql_dbg_disc, vha, 0x2066,
392 "Async done-%s res %x %8phC\n",
393 sp->name, res, sp->fcport->port_name);
394
395 memset(&ea, 0, sizeof(ea));
396 ea.event = FCME_ADISC_DONE;
397 ea.rc = res;
398 ea.data[0] = lio->u.logio.data[0];
399 ea.data[1] = lio->u.logio.data[1];
400 ea.iop[0] = lio->u.logio.iop[0];
401 ea.iop[1] = lio->u.logio.iop[1];
402 ea.fcport = sp->fcport;
403 ea.sp = sp;
404
405 qla2x00_fcport_event_handler(vha, &ea);
406
407 sp->free(sp);
408 }
409
410 int
411 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
412 uint16_t *data)
413 {
414 srb_t *sp;
415 struct srb_iocb *lio;
416 int rval;
417
418 rval = QLA_FUNCTION_FAILED;
419 fcport->flags |= FCF_ASYNC_SENT;
420 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
421 if (!sp)
422 goto done;
423
424 sp->type = SRB_ADISC_CMD;
425 sp->name = "adisc";
426 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
427
428 lio = &sp->u.iocb_cmd;
429 lio->timeout = qla2x00_async_iocb_timeout;
430 sp->done = qla2x00_async_adisc_sp_done;
431 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
432 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
433 rval = qla2x00_start_sp(sp);
434 if (rval != QLA_SUCCESS)
435 goto done_free_sp;
436
437 ql_dbg(ql_dbg_disc, vha, 0x206f,
438 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
439 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
440 return rval;
441
442 done_free_sp:
443 sp->free(sp);
444 done:
445 fcport->flags &= ~FCF_ASYNC_SENT;
446 qla2x00_post_async_adisc_work(vha, fcport, data);
447 return rval;
448 }
449
450 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
451 struct event_arg *ea)
452 {
453 fc_port_t *fcport, *conflict_fcport;
454 struct get_name_list_extended *e;
455 u16 i, n, found = 0, loop_id;
456 port_id_t id;
457 u64 wwn;
458 u16 data[2];
459 u8 current_login_state;
460
461 fcport = ea->fcport;
462 ql_dbg(ql_dbg_disc, vha, 0xffff,
463 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n",
464 __func__, fcport->port_name, fcport->disc_state,
465 fcport->fw_login_state, ea->rc,
466 fcport->login_gen, fcport->last_login_gen,
467 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id);
468
469 if (fcport->disc_state == DSC_DELETE_PEND)
470 return;
471
472 if (ea->rc) { /* rval */
473 if (fcport->login_retry == 0) {
474 fcport->login_retry = vha->hw->login_retry_count;
475 ql_dbg(ql_dbg_disc, vha, 0x20de,
476 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
477 fcport->port_name, fcport->login_retry);
478 }
479 return;
480 }
481
482 if (fcport->last_rscn_gen != fcport->rscn_gen) {
483 ql_dbg(ql_dbg_disc, vha, 0x20df,
484 "%s %8phC rscn gen changed rscn %d|%d \n",
485 __func__, fcport->port_name,
486 fcport->last_rscn_gen, fcport->rscn_gen);
487 qla24xx_post_gidpn_work(vha, fcport);
488 return;
489 } else if (fcport->last_login_gen != fcport->login_gen) {
490 ql_dbg(ql_dbg_disc, vha, 0x20e0,
491 "%s %8phC login gen changed\n",
492 __func__, fcport->port_name);
493 return;
494 }
495
496 n = ea->data[0] / sizeof(struct get_name_list_extended);
497
498 ql_dbg(ql_dbg_disc, vha, 0x20e1,
499 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
500 __func__, __LINE__, fcport->port_name, n,
501 fcport->d_id.b.domain, fcport->d_id.b.area,
502 fcport->d_id.b.al_pa, fcport->loop_id);
503
504 for (i = 0; i < n; i++) {
505 e = &vha->gnl.l[i];
506 wwn = wwn_to_u64(e->port_name);
507
508 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
509 continue;
510
511 found = 1;
512 id.b.domain = e->port_id[2];
513 id.b.area = e->port_id[1];
514 id.b.al_pa = e->port_id[0];
515 id.b.rsvd_1 = 0;
516
517 loop_id = le16_to_cpu(e->nport_handle);
518 loop_id = (loop_id & 0x7fff);
519
520 ql_dbg(ql_dbg_disc, vha, 0x20e2,
521 "%s found %8phC CLS [%d|%d] ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n",
522 __func__, fcport->port_name,
523 e->current_login_state, fcport->fw_login_state,
524 id.b.domain, id.b.area, id.b.al_pa,
525 fcport->d_id.b.domain, fcport->d_id.b.area,
526 fcport->d_id.b.al_pa, loop_id, fcport->loop_id);
527
528 if ((id.b24 != fcport->d_id.b24) ||
529 ((fcport->loop_id != FC_NO_LOOP_ID) &&
530 (fcport->loop_id != loop_id))) {
531 ql_dbg(ql_dbg_disc, vha, 0x20e3,
532 "%s %d %8phC post del sess\n",
533 __func__, __LINE__, fcport->port_name);
534 qlt_schedule_sess_for_deletion(fcport);
535 return;
536 }
537
538 fcport->loop_id = loop_id;
539
540 wwn = wwn_to_u64(fcport->port_name);
541 qlt_find_sess_invalidate_other(vha, wwn,
542 id, loop_id, &conflict_fcport);
543
544 if (conflict_fcport) {
545 /*
546 * Another share fcport share the same loop_id &
547 * nport id. Conflict fcport needs to finish
548 * cleanup before this fcport can proceed to login.
549 */
550 conflict_fcport->conflict = fcport;
551 fcport->login_pause = 1;
552 }
553
554 if (fcport->fc4f_nvme)
555 current_login_state = e->current_login_state >> 4;
556 else
557 current_login_state = e->current_login_state & 0xf;
558
559 switch (current_login_state) {
560 case DSC_LS_PRLI_COMP:
561 ql_dbg(ql_dbg_disc, vha, 0x20e4,
562 "%s %d %8phC post gpdb\n",
563 __func__, __LINE__, fcport->port_name);
564
565 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
566 fcport->port_type = FCT_INITIATOR;
567 else
568 fcport->port_type = FCT_TARGET;
569
570 data[0] = data[1] = 0;
571 qla2x00_post_async_adisc_work(vha, fcport, data);
572 break;
573 case DSC_LS_PORT_UNAVAIL:
574 default:
575 if (fcport->loop_id == FC_NO_LOOP_ID) {
576 qla2x00_find_new_loop_id(vha, fcport);
577 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
578 }
579 ql_dbg(ql_dbg_disc, vha, 0x20e5,
580 "%s %d %8phC\n",
581 __func__, __LINE__, fcport->port_name);
582 qla24xx_fcport_handle_login(vha, fcport);
583 break;
584 }
585 }
586
587 if (!found) {
588 /* fw has no record of this port */
589 for (i = 0; i < n; i++) {
590 e = &vha->gnl.l[i];
591 id.b.domain = e->port_id[0];
592 id.b.area = e->port_id[1];
593 id.b.al_pa = e->port_id[2];
594 id.b.rsvd_1 = 0;
595 loop_id = le16_to_cpu(e->nport_handle);
596
597 if (fcport->d_id.b24 == id.b24) {
598 conflict_fcport =
599 qla2x00_find_fcport_by_wwpn(vha,
600 e->port_name, 0);
601 ql_dbg(ql_dbg_disc, vha, 0x20e6,
602 "%s %d %8phC post del sess\n",
603 __func__, __LINE__,
604 conflict_fcport->port_name);
605 qlt_schedule_sess_for_deletion
606 (conflict_fcport);
607 }
608
609 /* FW already picked this loop id for another fcport */
610 if (fcport->loop_id == loop_id)
611 fcport->loop_id = FC_NO_LOOP_ID;
612 }
613 qla24xx_fcport_handle_login(vha, fcport);
614 }
615 } /* gnl_event */
616
617 static void
618 qla24xx_async_gnl_sp_done(void *s, int res)
619 {
620 struct srb *sp = s;
621 struct scsi_qla_host *vha = sp->vha;
622 unsigned long flags;
623 struct fc_port *fcport = NULL, *tf;
624 u16 i, n = 0, loop_id;
625 struct event_arg ea;
626 struct get_name_list_extended *e;
627 u64 wwn;
628 struct list_head h;
629 bool found = false;
630
631 ql_dbg(ql_dbg_disc, vha, 0x20e7,
632 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
633 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
634 sp->u.iocb_cmd.u.mbx.in_mb[2]);
635
636 memset(&ea, 0, sizeof(ea));
637 ea.sp = sp;
638 ea.rc = res;
639 ea.event = FCME_GNL_DONE;
640
641 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
642 sizeof(struct get_name_list_extended)) {
643 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
644 sizeof(struct get_name_list_extended);
645 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
646 }
647
648 for (i = 0; i < n; i++) {
649 e = &vha->gnl.l[i];
650 loop_id = le16_to_cpu(e->nport_handle);
651 /* mask out reserve bit */
652 loop_id = (loop_id & 0x7fff);
653 set_bit(loop_id, vha->hw->loop_id_map);
654 wwn = wwn_to_u64(e->port_name);
655
656 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8,
657 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n",
658 __func__, (void *)&wwn, e->port_id[2], e->port_id[1],
659 e->port_id[0], e->current_login_state, e->last_login_state,
660 (loop_id & 0x7fff));
661 }
662
663 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
664 vha->gnl.sent = 0;
665
666 INIT_LIST_HEAD(&h);
667 fcport = tf = NULL;
668 if (!list_empty(&vha->gnl.fcports))
669 list_splice_init(&vha->gnl.fcports, &h);
670
671 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
672 list_del_init(&fcport->gnl_entry);
673 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
674 ea.fcport = fcport;
675
676 qla2x00_fcport_event_handler(vha, &ea);
677 }
678
679 /* create new fcport if fw has knowledge of new sessions */
680 for (i = 0; i < n; i++) {
681 port_id_t id;
682 u64 wwnn;
683
684 e = &vha->gnl.l[i];
685 wwn = wwn_to_u64(e->port_name);
686
687 found = false;
688 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
689 if (!memcmp((u8 *)&wwn, fcport->port_name,
690 WWN_SIZE)) {
691 found = true;
692 break;
693 }
694 }
695
696 id.b.domain = e->port_id[2];
697 id.b.area = e->port_id[1];
698 id.b.al_pa = e->port_id[0];
699 id.b.rsvd_1 = 0;
700
701 if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
702 ql_dbg(ql_dbg_disc, vha, 0x2065,
703 "%s %d %8phC %06x post new sess\n",
704 __func__, __LINE__, (u8 *)&wwn, id.b24);
705 wwnn = wwn_to_u64(e->node_name);
706 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
707 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN);
708 }
709 }
710
711 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
712
713 sp->free(sp);
714 }
715
716 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
717 {
718 srb_t *sp;
719 struct srb_iocb *mbx;
720 int rval = QLA_FUNCTION_FAILED;
721 unsigned long flags;
722 u16 *mb;
723
724 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
725 return rval;
726
727 ql_dbg(ql_dbg_disc, vha, 0x20d9,
728 "Async-gnlist WWPN %8phC \n", fcport->port_name);
729
730 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
731 fcport->disc_state = DSC_GNL;
732 fcport->last_rscn_gen = fcport->rscn_gen;
733 fcport->last_login_gen = fcport->login_gen;
734
735 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
736 if (vha->gnl.sent) {
737 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
738 return QLA_SUCCESS;
739 }
740 vha->gnl.sent = 1;
741 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
742
743 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
744 if (!sp)
745 goto done;
746
747 fcport->flags |= FCF_ASYNC_SENT;
748 sp->type = SRB_MB_IOCB;
749 sp->name = "gnlist";
750 sp->gen1 = fcport->rscn_gen;
751 sp->gen2 = fcport->login_gen;
752
753 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
754
755 mb = sp->u.iocb_cmd.u.mbx.out_mb;
756 mb[0] = MBC_PORT_NODE_NAME_LIST;
757 mb[1] = BIT_2 | BIT_3;
758 mb[2] = MSW(vha->gnl.ldma);
759 mb[3] = LSW(vha->gnl.ldma);
760 mb[6] = MSW(MSD(vha->gnl.ldma));
761 mb[7] = LSW(MSD(vha->gnl.ldma));
762 mb[8] = vha->gnl.size;
763 mb[9] = vha->vp_idx;
764
765 mbx = &sp->u.iocb_cmd;
766 mbx->timeout = qla2x00_async_iocb_timeout;
767
768 sp->done = qla24xx_async_gnl_sp_done;
769
770 rval = qla2x00_start_sp(sp);
771 if (rval != QLA_SUCCESS)
772 goto done_free_sp;
773
774 ql_dbg(ql_dbg_disc, vha, 0x20da,
775 "Async-%s - OUT WWPN %8phC hndl %x\n",
776 sp->name, fcport->port_name, sp->handle);
777
778 return rval;
779
780 done_free_sp:
781 sp->free(sp);
782 fcport->flags &= ~FCF_ASYNC_SENT;
783 done:
784 return rval;
785 }
786
787 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
788 {
789 struct qla_work_evt *e;
790
791 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
792 if (!e)
793 return QLA_FUNCTION_FAILED;
794
795 e->u.fcport.fcport = fcport;
796 fcport->flags |= FCF_ASYNC_ACTIVE;
797 return qla2x00_post_work(vha, e);
798 }
799
800 static
801 void qla24xx_async_gpdb_sp_done(void *s, int res)
802 {
803 struct srb *sp = s;
804 struct scsi_qla_host *vha = sp->vha;
805 struct qla_hw_data *ha = vha->hw;
806 fc_port_t *fcport = sp->fcport;
807 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
808 struct event_arg ea;
809
810 ql_dbg(ql_dbg_disc, vha, 0x20db,
811 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
812 sp->name, res, fcport->port_name, mb[1], mb[2]);
813
814 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
815
816 memset(&ea, 0, sizeof(ea));
817 ea.event = FCME_GPDB_DONE;
818 ea.fcport = fcport;
819 ea.sp = sp;
820
821 qla2x00_fcport_event_handler(vha, &ea);
822
823 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
824 sp->u.iocb_cmd.u.mbx.in_dma);
825
826 sp->free(sp);
827 }
828
829 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
830 {
831 struct qla_work_evt *e;
832
833 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
834 if (!e)
835 return QLA_FUNCTION_FAILED;
836
837 e->u.fcport.fcport = fcport;
838
839 return qla2x00_post_work(vha, e);
840 }
841
842 static void
843 qla2x00_async_prli_sp_done(void *ptr, int res)
844 {
845 srb_t *sp = ptr;
846 struct scsi_qla_host *vha = sp->vha;
847 struct srb_iocb *lio = &sp->u.iocb_cmd;
848 struct event_arg ea;
849
850 ql_dbg(ql_dbg_disc, vha, 0x2129,
851 "%s %8phC res %d \n", __func__,
852 sp->fcport->port_name, res);
853
854 sp->fcport->flags &= ~FCF_ASYNC_SENT;
855
856 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
857 memset(&ea, 0, sizeof(ea));
858 ea.event = FCME_PRLI_DONE;
859 ea.fcport = sp->fcport;
860 ea.data[0] = lio->u.logio.data[0];
861 ea.data[1] = lio->u.logio.data[1];
862 ea.iop[0] = lio->u.logio.iop[0];
863 ea.iop[1] = lio->u.logio.iop[1];
864 ea.sp = sp;
865
866 qla2x00_fcport_event_handler(vha, &ea);
867 }
868
869 sp->free(sp);
870 }
871
872 int
873 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
874 {
875 srb_t *sp;
876 struct srb_iocb *lio;
877 int rval = QLA_FUNCTION_FAILED;
878
879 if (!vha->flags.online)
880 return rval;
881
882 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
883 fcport->fw_login_state == DSC_LS_PLOGI_COMP ||
884 fcport->fw_login_state == DSC_LS_PRLI_PEND)
885 return rval;
886
887 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
888 if (!sp)
889 return rval;
890
891 fcport->flags |= FCF_ASYNC_SENT;
892 fcport->logout_completed = 0;
893
894 sp->type = SRB_PRLI_CMD;
895 sp->name = "prli";
896 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
897
898 lio = &sp->u.iocb_cmd;
899 lio->timeout = qla2x00_async_iocb_timeout;
900 sp->done = qla2x00_async_prli_sp_done;
901 lio->u.logio.flags = 0;
902
903 if (fcport->fc4f_nvme)
904 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
905
906 rval = qla2x00_start_sp(sp);
907 if (rval != QLA_SUCCESS) {
908 fcport->flags |= FCF_LOGIN_NEEDED;
909 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
910 goto done_free_sp;
911 }
912
913 ql_dbg(ql_dbg_disc, vha, 0x211b,
914 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d.\n",
915 fcport->port_name, sp->handle, fcport->loop_id,
916 fcport->d_id.b24, fcport->login_retry);
917
918 return rval;
919
920 done_free_sp:
921 sp->free(sp);
922 fcport->flags &= ~FCF_ASYNC_SENT;
923 return rval;
924 }
925
926 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
927 {
928 struct qla_work_evt *e;
929
930 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
931 if (!e)
932 return QLA_FUNCTION_FAILED;
933
934 e->u.fcport.fcport = fcport;
935 e->u.fcport.opt = opt;
936 fcport->flags |= FCF_ASYNC_ACTIVE;
937 return qla2x00_post_work(vha, e);
938 }
939
940 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
941 {
942 srb_t *sp;
943 struct srb_iocb *mbx;
944 int rval = QLA_FUNCTION_FAILED;
945 u16 *mb;
946 dma_addr_t pd_dma;
947 struct port_database_24xx *pd;
948 struct qla_hw_data *ha = vha->hw;
949
950 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
951 return rval;
952
953 fcport->disc_state = DSC_GPDB;
954
955 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
956 if (!sp)
957 goto done;
958
959 fcport->flags |= FCF_ASYNC_SENT;
960 sp->type = SRB_MB_IOCB;
961 sp->name = "gpdb";
962 sp->gen1 = fcport->rscn_gen;
963 sp->gen2 = fcport->login_gen;
964 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
965
966 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
967 if (pd == NULL) {
968 ql_log(ql_log_warn, vha, 0xd043,
969 "Failed to allocate port database structure.\n");
970 goto done_free_sp;
971 }
972
973 mb = sp->u.iocb_cmd.u.mbx.out_mb;
974 mb[0] = MBC_GET_PORT_DATABASE;
975 mb[1] = fcport->loop_id;
976 mb[2] = MSW(pd_dma);
977 mb[3] = LSW(pd_dma);
978 mb[6] = MSW(MSD(pd_dma));
979 mb[7] = LSW(MSD(pd_dma));
980 mb[9] = vha->vp_idx;
981 mb[10] = opt;
982
983 mbx = &sp->u.iocb_cmd;
984 mbx->timeout = qla2x00_async_iocb_timeout;
985 mbx->u.mbx.in = (void *)pd;
986 mbx->u.mbx.in_dma = pd_dma;
987
988 sp->done = qla24xx_async_gpdb_sp_done;
989
990 rval = qla2x00_start_sp(sp);
991 if (rval != QLA_SUCCESS)
992 goto done_free_sp;
993
994 ql_dbg(ql_dbg_disc, vha, 0x20dc,
995 "Async-%s %8phC hndl %x opt %x\n",
996 sp->name, fcport->port_name, sp->handle, opt);
997
998 return rval;
999
1000 done_free_sp:
1001 if (pd)
1002 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1003
1004 sp->free(sp);
1005 fcport->flags &= ~FCF_ASYNC_SENT;
1006 done:
1007 qla24xx_post_gpdb_work(vha, fcport, opt);
1008 return rval;
1009 }
1010
1011 static
1012 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1013 {
1014 unsigned long flags;
1015
1016 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1017 ea->fcport->login_gen++;
1018 ea->fcport->deleted = 0;
1019 ea->fcport->logout_on_delete = 1;
1020
1021 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1022 vha->fcport_count++;
1023 ea->fcport->login_succ = 1;
1024
1025 if (!IS_IIDMA_CAPABLE(vha->hw) ||
1026 !vha->hw->flags.gpsc_supported) {
1027 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1028 "%s %d %8phC post upd_fcport fcp_cnt %d\n",
1029 __func__, __LINE__, ea->fcport->port_name,
1030 vha->fcport_count);
1031
1032 qla24xx_post_upd_fcport_work(vha, ea->fcport);
1033 } else {
1034 if (ea->fcport->id_changed) {
1035 ea->fcport->id_changed = 0;
1036 ql_dbg(ql_dbg_disc, vha, 0x20d7,
1037 "%s %d %8phC post gfpnid fcp_cnt %d\n",
1038 __func__, __LINE__, ea->fcport->port_name,
1039 vha->fcport_count);
1040 qla24xx_post_gfpnid_work(vha, ea->fcport);
1041 } else {
1042 ql_dbg(ql_dbg_disc, vha, 0x20d7,
1043 "%s %d %8phC post gpsc fcp_cnt %d\n",
1044 __func__, __LINE__, ea->fcport->port_name,
1045 vha->fcport_count);
1046 qla24xx_post_gpsc_work(vha, ea->fcport);
1047 }
1048 }
1049 } else if (ea->fcport->login_succ) {
1050 /*
1051 * We have an existing session. A late RSCN delivery
1052 * must have triggered the session to be re-validate.
1053 * Session is still valid.
1054 */
1055 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1056 "%s %d %8phC session revalidate success\n",
1057 __func__, __LINE__, ea->fcport->port_name);
1058 ea->fcport->disc_state = DSC_LOGIN_COMPLETE;
1059 }
1060 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1061 }
1062
1063 static
1064 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1065 {
1066 fc_port_t *fcport = ea->fcport;
1067 struct port_database_24xx *pd;
1068 struct srb *sp = ea->sp;
1069
1070 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1071
1072 fcport->flags &= ~FCF_ASYNC_SENT;
1073
1074 ql_dbg(ql_dbg_disc, vha, 0x20d2,
1075 "%s %8phC DS %d LS %d rc %d\n", __func__, fcport->port_name,
1076 fcport->disc_state, pd->current_login_state, ea->rc);
1077
1078 if (fcport->disc_state == DSC_DELETE_PEND)
1079 return;
1080
1081 switch (pd->current_login_state) {
1082 case PDS_PRLI_COMPLETE:
1083 __qla24xx_parse_gpdb(vha, fcport, pd);
1084 break;
1085 case PDS_PLOGI_PENDING:
1086 case PDS_PLOGI_COMPLETE:
1087 case PDS_PRLI_PENDING:
1088 case PDS_PRLI2_PENDING:
1089 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC relogin needed\n",
1090 __func__, __LINE__, fcport->port_name);
1091 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1092 return;
1093 case PDS_LOGO_PENDING:
1094 case PDS_PORT_UNAVAILABLE:
1095 default:
1096 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1097 __func__, __LINE__, fcport->port_name);
1098 qlt_schedule_sess_for_deletion(fcport);
1099 return;
1100 }
1101 __qla24xx_handle_gpdb_event(vha, ea);
1102 } /* gpdb event */
1103
1104 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1105 {
1106 u8 login = 0;
1107 int rc;
1108
1109 if (qla_tgt_mode_enabled(vha))
1110 return;
1111
1112 if (qla_dual_mode_enabled(vha)) {
1113 if (N2N_TOPO(vha->hw)) {
1114 u64 mywwn, wwn;
1115
1116 mywwn = wwn_to_u64(vha->port_name);
1117 wwn = wwn_to_u64(fcport->port_name);
1118 if (mywwn > wwn)
1119 login = 1;
1120 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1121 && time_after_eq(jiffies,
1122 fcport->plogi_nack_done_deadline))
1123 login = 1;
1124 } else {
1125 login = 1;
1126 }
1127 } else {
1128 /* initiator mode */
1129 login = 1;
1130 }
1131
1132 if (login) {
1133 if (fcport->loop_id == FC_NO_LOOP_ID) {
1134 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1135 rc = qla2x00_find_new_loop_id(vha, fcport);
1136 if (rc) {
1137 ql_dbg(ql_dbg_disc, vha, 0x20e6,
1138 "%s %d %8phC post del sess - out of loopid\n",
1139 __func__, __LINE__, fcport->port_name);
1140 fcport->scan_state = 0;
1141 qlt_schedule_sess_for_deletion(fcport);
1142 return;
1143 }
1144 }
1145 ql_dbg(ql_dbg_disc, vha, 0x20bf,
1146 "%s %d %8phC post login\n",
1147 __func__, __LINE__, fcport->port_name);
1148 qla2x00_post_async_login_work(vha, fcport, NULL);
1149 }
1150 }
1151
1152 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1153 {
1154 u16 data[2];
1155 u64 wwn;
1156
1157 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1158 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d retry %d lid %d scan %d\n",
1159 __func__, fcport->port_name, fcport->disc_state,
1160 fcport->fw_login_state, fcport->login_pause, fcport->flags,
1161 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1162 fcport->login_gen, fcport->login_retry,
1163 fcport->loop_id, fcport->scan_state);
1164
1165 if (fcport->login_retry == 0)
1166 return 0;
1167
1168 if (fcport->scan_state != QLA_FCPORT_FOUND)
1169 return 0;
1170
1171 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1172 (fcport->fw_login_state == DSC_LS_PRLI_PEND))
1173 return 0;
1174
1175 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1176 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1177 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1178 return 0;
1179 }
1180 }
1181
1182 /* for pure Target Mode. Login will not be initiated */
1183 if (vha->host->active_mode == MODE_TARGET)
1184 return 0;
1185
1186 if (fcport->flags & FCF_ASYNC_SENT) {
1187 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1188 return 0;
1189 }
1190
1191 fcport->login_retry--;
1192
1193 switch (fcport->disc_state) {
1194 case DSC_DELETED:
1195 wwn = wwn_to_u64(fcport->node_name);
1196 if (wwn == 0) {
1197 ql_dbg(ql_dbg_disc, vha, 0xffff,
1198 "%s %d %8phC post GNNID\n",
1199 __func__, __LINE__, fcport->port_name);
1200 qla24xx_post_gnnid_work(vha, fcport);
1201 } else if (fcport->loop_id == FC_NO_LOOP_ID) {
1202 ql_dbg(ql_dbg_disc, vha, 0x20bd,
1203 "%s %d %8phC post gnl\n",
1204 __func__, __LINE__, fcport->port_name);
1205 qla24xx_post_gnl_work(vha, fcport);
1206 } else {
1207 qla_chk_n2n_b4_login(vha, fcport);
1208 }
1209 break;
1210
1211 case DSC_GNL:
1212 if (fcport->login_pause) {
1213 fcport->last_rscn_gen = fcport->rscn_gen;
1214 fcport->last_login_gen = fcport->login_gen;
1215 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1216 break;
1217 }
1218
1219 qla_chk_n2n_b4_login(vha, fcport);
1220 break;
1221
1222 case DSC_LOGIN_FAILED:
1223 ql_dbg(ql_dbg_disc, vha, 0x20d0,
1224 "%s %d %8phC post gidpn\n",
1225 __func__, __LINE__, fcport->port_name);
1226 if (N2N_TOPO(vha->hw))
1227 qla_chk_n2n_b4_login(vha, fcport);
1228 else
1229 qla24xx_post_gidpn_work(vha, fcport);
1230 break;
1231
1232 case DSC_LOGIN_COMPLETE:
1233 /* recheck login state */
1234 ql_dbg(ql_dbg_disc, vha, 0x20d1,
1235 "%s %d %8phC post adisc\n",
1236 __func__, __LINE__, fcport->port_name);
1237 data[0] = data[1] = 0;
1238 qla2x00_post_async_adisc_work(vha, fcport, data);
1239 break;
1240
1241 default:
1242 break;
1243 }
1244
1245 return 0;
1246 }
1247
1248 static
1249 void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea)
1250 {
1251 fcport->rscn_gen++;
1252
1253 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c,
1254 "%s %8phC DS %d LS %d\n",
1255 __func__, fcport->port_name, fcport->disc_state,
1256 fcport->fw_login_state);
1257
1258 if (fcport->flags & FCF_ASYNC_SENT)
1259 return;
1260
1261 switch (fcport->disc_state) {
1262 case DSC_DELETED:
1263 case DSC_LOGIN_COMPLETE:
1264 qla24xx_post_gpnid_work(fcport->vha, &ea->id);
1265 break;
1266 default:
1267 break;
1268 }
1269 }
1270
1271 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1272 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1273 {
1274 struct qla_work_evt *e;
1275 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1276 if (!e)
1277 return QLA_FUNCTION_FAILED;
1278
1279 e->u.new_sess.id = *id;
1280 e->u.new_sess.pla = pla;
1281 e->u.new_sess.fc4_type = fc4_type;
1282 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1283 if (node_name)
1284 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1285
1286 return qla2x00_post_work(vha, e);
1287 }
1288
1289 static
1290 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1291 struct event_arg *ea)
1292 {
1293 fc_port_t *fcport = ea->fcport;
1294
1295 ql_dbg(ql_dbg_disc, vha, 0x2102,
1296 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1297 __func__, fcport->port_name, fcport->disc_state,
1298 fcport->fw_login_state, fcport->login_pause,
1299 fcport->deleted, fcport->conflict,
1300 fcport->last_rscn_gen, fcport->rscn_gen,
1301 fcport->last_login_gen, fcport->login_gen,
1302 fcport->flags);
1303
1304 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1305 (fcport->fw_login_state == DSC_LS_PRLI_PEND))
1306 return;
1307
1308 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1309 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1310 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1311 return;
1312 }
1313 }
1314
1315 if (fcport->flags & FCF_ASYNC_SENT) {
1316 fcport->login_retry++;
1317 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1318 return;
1319 }
1320
1321 if (fcport->disc_state == DSC_DELETE_PEND) {
1322 fcport->login_retry++;
1323 return;
1324 }
1325
1326 if (fcport->last_rscn_gen != fcport->rscn_gen) {
1327 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n",
1328 __func__, __LINE__, fcport->port_name);
1329
1330 qla24xx_post_gidpn_work(vha, fcport);
1331 return;
1332 }
1333
1334 qla24xx_fcport_handle_login(vha, fcport);
1335 }
1336
1337 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea)
1338 {
1339 fc_port_t *f, *tf;
1340 uint32_t id = 0, mask, rid;
1341 unsigned long flags;
1342
1343 switch (ea->event) {
1344 case FCME_RSCN:
1345 case FCME_GIDPN_DONE:
1346 case FCME_GPSC_DONE:
1347 case FCME_GPNID_DONE:
1348 case FCME_GNNID_DONE:
1349 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
1350 test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags))
1351 return;
1352 break;
1353 default:
1354 break;
1355 }
1356
1357 switch (ea->event) {
1358 case FCME_RELOGIN:
1359 if (test_bit(UNLOADING, &vha->dpc_flags))
1360 return;
1361
1362 qla24xx_handle_relogin_event(vha, ea);
1363 break;
1364 case FCME_RSCN:
1365 if (test_bit(UNLOADING, &vha->dpc_flags))
1366 return;
1367 switch (ea->id.b.rsvd_1) {
1368 case RSCN_PORT_ADDR:
1369 spin_lock_irqsave(&vha->work_lock, flags);
1370 if (vha->scan.scan_flags == 0) {
1371 ql_dbg(ql_dbg_disc, vha, 0xffff,
1372 "%s: schedule\n", __func__);
1373 vha->scan.scan_flags |= SF_QUEUED;
1374 schedule_delayed_work(&vha->scan.scan_work, 5);
1375 }
1376 spin_unlock_irqrestore(&vha->work_lock, flags);
1377
1378 break;
1379 case RSCN_AREA_ADDR:
1380 case RSCN_DOM_ADDR:
1381 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) {
1382 mask = 0xffff00;
1383 ql_dbg(ql_dbg_async, vha, 0x5044,
1384 "RSCN: Area 0x%06x was affected\n",
1385 ea->id.b24);
1386 } else {
1387 mask = 0xff0000;
1388 ql_dbg(ql_dbg_async, vha, 0x507a,
1389 "RSCN: Domain 0x%06x was affected\n",
1390 ea->id.b24);
1391 }
1392
1393 rid = ea->id.b24 & mask;
1394 list_for_each_entry_safe(f, tf, &vha->vp_fcports,
1395 list) {
1396 id = f->d_id.b24 & mask;
1397 if (rid == id) {
1398 ea->fcport = f;
1399 qla24xx_handle_rscn_event(f, ea);
1400 }
1401 }
1402 break;
1403 case RSCN_FAB_ADDR:
1404 default:
1405 ql_log(ql_log_warn, vha, 0xd045,
1406 "RSCN: Fabric was affected. Addr format %d\n",
1407 ea->id.b.rsvd_1);
1408 qla2x00_mark_all_devices_lost(vha, 1);
1409 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1410 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1411 }
1412 break;
1413 case FCME_GIDPN_DONE:
1414 qla24xx_handle_gidpn_event(vha, ea);
1415 break;
1416 case FCME_GNL_DONE:
1417 qla24xx_handle_gnl_done_event(vha, ea);
1418 break;
1419 case FCME_GPSC_DONE:
1420 qla24xx_handle_gpsc_event(vha, ea);
1421 break;
1422 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */
1423 qla24xx_handle_plogi_done_event(vha, ea);
1424 break;
1425 case FCME_PRLI_DONE:
1426 qla24xx_handle_prli_done_event(vha, ea);
1427 break;
1428 case FCME_GPDB_DONE:
1429 qla24xx_handle_gpdb_event(vha, ea);
1430 break;
1431 case FCME_GPNID_DONE:
1432 qla24xx_handle_gpnid_event(vha, ea);
1433 break;
1434 case FCME_GFFID_DONE:
1435 qla24xx_handle_gffid_event(vha, ea);
1436 break;
1437 case FCME_ADISC_DONE:
1438 qla24xx_handle_adisc_event(vha, ea);
1439 break;
1440 case FCME_GNNID_DONE:
1441 qla24xx_handle_gnnid_event(vha, ea);
1442 break;
1443 case FCME_GFPNID_DONE:
1444 qla24xx_handle_gfpnid_event(vha, ea);
1445 break;
1446 default:
1447 BUG_ON(1);
1448 break;
1449 }
1450 }
1451
1452 static void
1453 qla2x00_tmf_iocb_timeout(void *data)
1454 {
1455 srb_t *sp = data;
1456 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1457
1458 tmf->u.tmf.comp_status = CS_TIMEOUT;
1459 complete(&tmf->u.tmf.comp);
1460 }
1461
1462 static void
1463 qla2x00_tmf_sp_done(void *ptr, int res)
1464 {
1465 srb_t *sp = ptr;
1466 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1467
1468 complete(&tmf->u.tmf.comp);
1469 }
1470
1471 int
1472 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
1473 uint32_t tag)
1474 {
1475 struct scsi_qla_host *vha = fcport->vha;
1476 struct srb_iocb *tm_iocb;
1477 srb_t *sp;
1478 int rval = QLA_FUNCTION_FAILED;
1479
1480 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1481 if (!sp)
1482 goto done;
1483
1484 tm_iocb = &sp->u.iocb_cmd;
1485 sp->type = SRB_TM_CMD;
1486 sp->name = "tmf";
1487 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1488 tm_iocb->u.tmf.flags = flags;
1489 tm_iocb->u.tmf.lun = lun;
1490 tm_iocb->u.tmf.data = tag;
1491 sp->done = qla2x00_tmf_sp_done;
1492 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1493 init_completion(&tm_iocb->u.tmf.comp);
1494
1495 rval = qla2x00_start_sp(sp);
1496 if (rval != QLA_SUCCESS)
1497 goto done_free_sp;
1498
1499 ql_dbg(ql_dbg_taskm, vha, 0x802f,
1500 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1501 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1502 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1503
1504 wait_for_completion(&tm_iocb->u.tmf.comp);
1505
1506 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ?
1507 QLA_SUCCESS : QLA_FUNCTION_FAILED;
1508
1509 if ((rval != QLA_SUCCESS) || tm_iocb->u.tmf.data) {
1510 ql_dbg(ql_dbg_taskm, vha, 0x8030,
1511 "TM IOCB failed (%x).\n", rval);
1512 }
1513
1514 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1515 flags = tm_iocb->u.tmf.flags;
1516 lun = (uint16_t)tm_iocb->u.tmf.lun;
1517
1518 /* Issue Marker IOCB */
1519 qla2x00_marker(vha, vha->hw->req_q_map[0],
1520 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
1521 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1522 }
1523
1524 done_free_sp:
1525 sp->free(sp);
1526 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1527 done:
1528 return rval;
1529 }
1530
1531 static void
1532 qla24xx_abort_iocb_timeout(void *data)
1533 {
1534 srb_t *sp = data;
1535 struct srb_iocb *abt = &sp->u.iocb_cmd;
1536
1537 abt->u.abt.comp_status = CS_TIMEOUT;
1538 complete(&abt->u.abt.comp);
1539 }
1540
1541 static void
1542 qla24xx_abort_sp_done(void *ptr, int res)
1543 {
1544 srb_t *sp = ptr;
1545 struct srb_iocb *abt = &sp->u.iocb_cmd;
1546
1547 complete(&abt->u.abt.comp);
1548 }
1549
1550 int
1551 qla24xx_async_abort_cmd(srb_t *cmd_sp)
1552 {
1553 scsi_qla_host_t *vha = cmd_sp->vha;
1554 fc_port_t *fcport = cmd_sp->fcport;
1555 struct srb_iocb *abt_iocb;
1556 srb_t *sp;
1557 int rval = QLA_FUNCTION_FAILED;
1558
1559 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1560 if (!sp)
1561 goto done;
1562
1563 abt_iocb = &sp->u.iocb_cmd;
1564 sp->type = SRB_ABT_CMD;
1565 sp->name = "abort";
1566 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1567 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
1568
1569 if (vha->flags.qpairs_available && cmd_sp->qpair)
1570 abt_iocb->u.abt.req_que_no =
1571 cpu_to_le16(cmd_sp->qpair->req->id);
1572 else
1573 abt_iocb->u.abt.req_que_no = cpu_to_le16(vha->req->id);
1574
1575 sp->done = qla24xx_abort_sp_done;
1576 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
1577 init_completion(&abt_iocb->u.abt.comp);
1578
1579 rval = qla2x00_start_sp(sp);
1580 if (rval != QLA_SUCCESS)
1581 goto done_free_sp;
1582
1583 ql_dbg(ql_dbg_async, vha, 0x507c,
1584 "Abort command issued - hdl=%x, target_id=%x\n",
1585 cmd_sp->handle, fcport->tgt_id);
1586
1587 wait_for_completion(&abt_iocb->u.abt.comp);
1588
1589 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
1590 QLA_SUCCESS : QLA_FUNCTION_FAILED;
1591
1592 done_free_sp:
1593 sp->free(sp);
1594 done:
1595 return rval;
1596 }
1597
1598 int
1599 qla24xx_async_abort_command(srb_t *sp)
1600 {
1601 unsigned long flags = 0;
1602
1603 uint32_t handle;
1604 fc_port_t *fcport = sp->fcport;
1605 struct scsi_qla_host *vha = fcport->vha;
1606 struct qla_hw_data *ha = vha->hw;
1607 struct req_que *req = vha->req;
1608
1609 if (vha->flags.qpairs_available && sp->qpair)
1610 req = sp->qpair->req;
1611
1612 spin_lock_irqsave(&ha->hardware_lock, flags);
1613 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1614 if (req->outstanding_cmds[handle] == sp)
1615 break;
1616 }
1617 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1618 if (handle == req->num_outstanding_cmds) {
1619 /* Command not found. */
1620 return QLA_FUNCTION_FAILED;
1621 }
1622 if (sp->type == SRB_FXIOCB_DCMD)
1623 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1624 FXDISC_ABORT_IOCTL);
1625
1626 return qla24xx_async_abort_cmd(sp);
1627 }
1628
1629 static void
1630 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1631 {
1632 switch (ea->data[0]) {
1633 case MBS_COMMAND_COMPLETE:
1634 ql_dbg(ql_dbg_disc, vha, 0x2118,
1635 "%s %d %8phC post gpdb\n",
1636 __func__, __LINE__, ea->fcport->port_name);
1637
1638 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1639 ea->fcport->logout_on_delete = 1;
1640 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1641 break;
1642 default:
1643 if (ea->fcport->n2n_flag) {
1644 ql_dbg(ql_dbg_disc, vha, 0x2118,
1645 "%s %d %8phC post fc4 prli\n",
1646 __func__, __LINE__, ea->fcport->port_name);
1647 ea->fcport->fc4f_nvme = 0;
1648 ea->fcport->n2n_flag = 0;
1649 qla24xx_post_prli_work(vha, ea->fcport);
1650 }
1651 ql_dbg(ql_dbg_disc, vha, 0x2119,
1652 "%s %d %8phC unhandle event of %x\n",
1653 __func__, __LINE__, ea->fcport->port_name, ea->data[0]);
1654 break;
1655 }
1656 }
1657
1658 static void
1659 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1660 {
1661 port_id_t cid; /* conflict Nport id */
1662 u16 lid;
1663 struct fc_port *conflict_fcport;
1664 unsigned long flags;
1665 struct fc_port *fcport = ea->fcport;
1666
1667 ql_dbg(ql_dbg_disc, vha, 0xffff,
1668 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
1669 __func__, fcport->port_name, fcport->disc_state,
1670 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
1671 ea->sp->gen2, fcport->rscn_gen|ea->sp->gen1,
1672 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
1673
1674 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1675 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
1676 ql_dbg(ql_dbg_disc, vha, 0x20ea,
1677 "%s %d %8phC Remote is trying to login\n",
1678 __func__, __LINE__, fcport->port_name);
1679 return;
1680 }
1681
1682 if (fcport->disc_state == DSC_DELETE_PEND)
1683 return;
1684
1685 if (ea->sp->gen2 != fcport->login_gen) {
1686 /* target side must have changed it. */
1687 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1688 "%s %8phC generation changed\n",
1689 __func__, fcport->port_name);
1690 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1691 return;
1692 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1693 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n",
1694 __func__, __LINE__, fcport->port_name);
1695 qla24xx_post_gidpn_work(vha, fcport);
1696 return;
1697 }
1698
1699 switch (ea->data[0]) {
1700 case MBS_COMMAND_COMPLETE:
1701 /*
1702 * Driver must validate login state - If PRLI not complete,
1703 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
1704 * requests.
1705 */
1706 if (ea->fcport->fc4f_nvme) {
1707 ql_dbg(ql_dbg_disc, vha, 0x2117,
1708 "%s %d %8phC post prli\n",
1709 __func__, __LINE__, ea->fcport->port_name);
1710 qla24xx_post_prli_work(vha, ea->fcport);
1711 } else {
1712 ql_dbg(ql_dbg_disc, vha, 0x20ea,
1713 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n",
1714 __func__, __LINE__, ea->fcport->port_name,
1715 ea->fcport->loop_id, ea->fcport->d_id.b24);
1716
1717 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
1718 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1719 ea->fcport->loop_id = FC_NO_LOOP_ID;
1720 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1721 ea->fcport->logout_on_delete = 1;
1722 ea->fcport->send_els_logo = 0;
1723 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP;
1724 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1725
1726 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1727 }
1728 break;
1729 case MBS_COMMAND_ERROR:
1730 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
1731 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
1732
1733 ea->fcport->flags &= ~FCF_ASYNC_SENT;
1734 ea->fcport->disc_state = DSC_LOGIN_FAILED;
1735 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
1736 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1737 else
1738 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0);
1739 break;
1740 case MBS_LOOP_ID_USED:
1741 /* data[1] = IO PARAM 1 = nport ID */
1742 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
1743 cid.b.area = (ea->iop[1] >> 8) & 0xff;
1744 cid.b.al_pa = ea->iop[1] & 0xff;
1745 cid.b.rsvd_1 = 0;
1746
1747 ql_dbg(ql_dbg_disc, vha, 0x20ec,
1748 "%s %d %8phC LoopID 0x%x in use post gnl\n",
1749 __func__, __LINE__, ea->fcport->port_name,
1750 ea->fcport->loop_id);
1751
1752 if (IS_SW_RESV_ADDR(cid)) {
1753 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
1754 ea->fcport->loop_id = FC_NO_LOOP_ID;
1755 } else {
1756 qla2x00_clear_loop_id(ea->fcport);
1757 }
1758 qla24xx_post_gnl_work(vha, ea->fcport);
1759 break;
1760 case MBS_PORT_ID_USED:
1761 ql_dbg(ql_dbg_disc, vha, 0x20ed,
1762 "%s %d %8phC NPortId %02x%02x%02x inuse post gidpn\n",
1763 __func__, __LINE__, ea->fcport->port_name,
1764 ea->fcport->d_id.b.domain, ea->fcport->d_id.b.area,
1765 ea->fcport->d_id.b.al_pa);
1766
1767 lid = ea->iop[1] & 0xffff;
1768 qlt_find_sess_invalidate_other(vha,
1769 wwn_to_u64(ea->fcport->port_name),
1770 ea->fcport->d_id, lid, &conflict_fcport);
1771
1772 if (conflict_fcport) {
1773 /*
1774 * Another fcport share the same loop_id/nport id.
1775 * Conflict fcport needs to finish cleanup before this
1776 * fcport can proceed to login.
1777 */
1778 conflict_fcport->conflict = ea->fcport;
1779 ea->fcport->login_pause = 1;
1780
1781 ql_dbg(ql_dbg_disc, vha, 0x20ed,
1782 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
1783 __func__, __LINE__, ea->fcport->port_name,
1784 ea->fcport->d_id.b24, lid);
1785 qla2x00_clear_loop_id(ea->fcport);
1786 qla24xx_post_gidpn_work(vha, ea->fcport);
1787 } else {
1788 ql_dbg(ql_dbg_disc, vha, 0x20ed,
1789 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
1790 __func__, __LINE__, ea->fcport->port_name,
1791 ea->fcport->d_id.b24, lid);
1792
1793 qla2x00_clear_loop_id(ea->fcport);
1794 set_bit(lid, vha->hw->loop_id_map);
1795 ea->fcport->loop_id = lid;
1796 ea->fcport->keep_nport_handle = 0;
1797 qlt_schedule_sess_for_deletion(ea->fcport);
1798 }
1799 break;
1800 }
1801 return;
1802 }
1803
1804 void
1805 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
1806 uint16_t *data)
1807 {
1808 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1809 qlt_logo_completion_handler(fcport, data[0]);
1810 fcport->login_gen++;
1811 return;
1812 }
1813
1814 void
1815 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
1816 uint16_t *data)
1817 {
1818 if (data[0] == MBS_COMMAND_COMPLETE) {
1819 qla2x00_update_fcport(vha, fcport);
1820
1821 return;
1822 }
1823
1824 /* Retry login. */
1825 fcport->flags &= ~FCF_ASYNC_SENT;
1826 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
1827 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1828 else
1829 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1830
1831 return;
1832 }
1833
1834 /****************************************************************************/
1835 /* QLogic ISP2x00 Hardware Support Functions. */
1836 /****************************************************************************/
1837
1838 static int
1839 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
1840 {
1841 int rval = QLA_SUCCESS;
1842 struct qla_hw_data *ha = vha->hw;
1843 uint32_t idc_major_ver, idc_minor_ver;
1844 uint16_t config[4];
1845
1846 qla83xx_idc_lock(vha, 0);
1847
1848 /* SV: TODO: Assign initialization timeout from
1849 * flash-info / other param
1850 */
1851 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
1852 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
1853
1854 /* Set our fcoe function presence */
1855 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
1856 ql_dbg(ql_dbg_p3p, vha, 0xb077,
1857 "Error while setting DRV-Presence.\n");
1858 rval = QLA_FUNCTION_FAILED;
1859 goto exit;
1860 }
1861
1862 /* Decide the reset ownership */
1863 qla83xx_reset_ownership(vha);
1864
1865 /*
1866 * On first protocol driver load:
1867 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
1868 * register.
1869 * Others: Check compatibility with current IDC Major version.
1870 */
1871 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
1872 if (ha->flags.nic_core_reset_owner) {
1873 /* Set IDC Major version */
1874 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
1875 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
1876
1877 /* Clearing IDC-Lock-Recovery register */
1878 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
1879 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
1880 /*
1881 * Clear further IDC participation if we are not compatible with
1882 * the current IDC Major Version.
1883 */
1884 ql_log(ql_log_warn, vha, 0xb07d,
1885 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
1886 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
1887 __qla83xx_clear_drv_presence(vha);
1888 rval = QLA_FUNCTION_FAILED;
1889 goto exit;
1890 }
1891 /* Each function sets its supported Minor version. */
1892 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
1893 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
1894 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
1895
1896 if (ha->flags.nic_core_reset_owner) {
1897 memset(config, 0, sizeof(config));
1898 if (!qla81xx_get_port_config(vha, config))
1899 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
1900 QLA8XXX_DEV_READY);
1901 }
1902
1903 rval = qla83xx_idc_state_handler(vha);
1904
1905 exit:
1906 qla83xx_idc_unlock(vha, 0);
1907
1908 return rval;
1909 }
1910
1911 /*
1912 * qla2x00_initialize_adapter
1913 * Initialize board.
1914 *
1915 * Input:
1916 * ha = adapter block pointer.
1917 *
1918 * Returns:
1919 * 0 = success
1920 */
1921 int
1922 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
1923 {
1924 int rval;
1925 struct qla_hw_data *ha = vha->hw;
1926 struct req_que *req = ha->req_q_map[0];
1927
1928 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
1929 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
1930
1931 /* Clear adapter flags. */
1932 vha->flags.online = 0;
1933 ha->flags.chip_reset_done = 0;
1934 vha->flags.reset_active = 0;
1935 ha->flags.pci_channel_io_perm_failure = 0;
1936 ha->flags.eeh_busy = 0;
1937 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
1938 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1939 atomic_set(&vha->loop_state, LOOP_DOWN);
1940 vha->device_flags = DFLG_NO_CABLE;
1941 vha->dpc_flags = 0;
1942 vha->flags.management_server_logged_in = 0;
1943 vha->marker_needed = 0;
1944 ha->isp_abort_cnt = 0;
1945 ha->beacon_blink_led = 0;
1946
1947 set_bit(0, ha->req_qid_map);
1948 set_bit(0, ha->rsp_qid_map);
1949
1950 ql_dbg(ql_dbg_init, vha, 0x0040,
1951 "Configuring PCI space...\n");
1952 rval = ha->isp_ops->pci_config(vha);
1953 if (rval) {
1954 ql_log(ql_log_warn, vha, 0x0044,
1955 "Unable to configure PCI space.\n");
1956 return (rval);
1957 }
1958
1959 ha->isp_ops->reset_chip(vha);
1960
1961 rval = qla2xxx_get_flash_info(vha);
1962 if (rval) {
1963 ql_log(ql_log_fatal, vha, 0x004f,
1964 "Unable to validate FLASH data.\n");
1965 return rval;
1966 }
1967
1968 if (IS_QLA8044(ha)) {
1969 qla8044_read_reset_template(vha);
1970
1971 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
1972 * If DONRESET_BIT0 is set, drivers should not set dev_state
1973 * to NEED_RESET. But if NEED_RESET is set, drivers should
1974 * should honor the reset. */
1975 if (ql2xdontresethba == 1)
1976 qla8044_set_idc_dontreset(vha);
1977 }
1978
1979 ha->isp_ops->get_flash_version(vha, req->ring);
1980 ql_dbg(ql_dbg_init, vha, 0x0061,
1981 "Configure NVRAM parameters...\n");
1982
1983 ha->isp_ops->nvram_config(vha);
1984
1985 if (ha->flags.disable_serdes) {
1986 /* Mask HBA via NVRAM settings? */
1987 ql_log(ql_log_info, vha, 0x0077,
1988 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
1989 return QLA_FUNCTION_FAILED;
1990 }
1991
1992 ql_dbg(ql_dbg_init, vha, 0x0078,
1993 "Verifying loaded RISC code...\n");
1994
1995 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
1996 rval = ha->isp_ops->chip_diag(vha);
1997 if (rval)
1998 return (rval);
1999 rval = qla2x00_setup_chip(vha);
2000 if (rval)
2001 return (rval);
2002 }
2003
2004 if (IS_QLA84XX(ha)) {
2005 ha->cs84xx = qla84xx_get_chip(vha);
2006 if (!ha->cs84xx) {
2007 ql_log(ql_log_warn, vha, 0x00d0,
2008 "Unable to configure ISP84XX.\n");
2009 return QLA_FUNCTION_FAILED;
2010 }
2011 }
2012
2013 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2014 rval = qla2x00_init_rings(vha);
2015
2016 ha->flags.chip_reset_done = 1;
2017
2018 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2019 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
2020 rval = qla84xx_init_chip(vha);
2021 if (rval != QLA_SUCCESS) {
2022 ql_log(ql_log_warn, vha, 0x00d4,
2023 "Unable to initialize ISP84XX.\n");
2024 qla84xx_put_chip(vha);
2025 }
2026 }
2027
2028 /* Load the NIC Core f/w if we are the first protocol driver. */
2029 if (IS_QLA8031(ha)) {
2030 rval = qla83xx_nic_core_fw_load(vha);
2031 if (rval)
2032 ql_log(ql_log_warn, vha, 0x0124,
2033 "Error in initializing NIC Core f/w.\n");
2034 }
2035
2036 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2037 qla24xx_read_fcp_prio_cfg(vha);
2038
2039 if (IS_P3P_TYPE(ha))
2040 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2041 else
2042 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2043
2044 return (rval);
2045 }
2046
2047 /**
2048 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2049 * @vha: HA context
2050 *
2051 * Returns 0 on success.
2052 */
2053 int
2054 qla2100_pci_config(scsi_qla_host_t *vha)
2055 {
2056 uint16_t w;
2057 unsigned long flags;
2058 struct qla_hw_data *ha = vha->hw;
2059 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2060
2061 pci_set_master(ha->pdev);
2062 pci_try_set_mwi(ha->pdev);
2063
2064 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2065 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2066 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2067
2068 pci_disable_rom(ha->pdev);
2069
2070 /* Get PCI bus information. */
2071 spin_lock_irqsave(&ha->hardware_lock, flags);
2072 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
2073 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2074
2075 return QLA_SUCCESS;
2076 }
2077
2078 /**
2079 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2080 * @vha: HA context
2081 *
2082 * Returns 0 on success.
2083 */
2084 int
2085 qla2300_pci_config(scsi_qla_host_t *vha)
2086 {
2087 uint16_t w;
2088 unsigned long flags = 0;
2089 uint32_t cnt;
2090 struct qla_hw_data *ha = vha->hw;
2091 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2092
2093 pci_set_master(ha->pdev);
2094 pci_try_set_mwi(ha->pdev);
2095
2096 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2097 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2098
2099 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2100 w &= ~PCI_COMMAND_INTX_DISABLE;
2101 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2102
2103 /*
2104 * If this is a 2300 card and not 2312, reset the
2105 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2106 * the 2310 also reports itself as a 2300 so we need to get the
2107 * fb revision level -- a 6 indicates it really is a 2300 and
2108 * not a 2310.
2109 */
2110 if (IS_QLA2300(ha)) {
2111 spin_lock_irqsave(&ha->hardware_lock, flags);
2112
2113 /* Pause RISC. */
2114 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
2115 for (cnt = 0; cnt < 30000; cnt++) {
2116 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
2117 break;
2118
2119 udelay(10);
2120 }
2121
2122 /* Select FPM registers. */
2123 WRT_REG_WORD(&reg->ctrl_status, 0x20);
2124 RD_REG_WORD(&reg->ctrl_status);
2125
2126 /* Get the fb rev level */
2127 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2128
2129 if (ha->fb_rev == FPM_2300)
2130 pci_clear_mwi(ha->pdev);
2131
2132 /* Deselect FPM registers. */
2133 WRT_REG_WORD(&reg->ctrl_status, 0x0);
2134 RD_REG_WORD(&reg->ctrl_status);
2135
2136 /* Release RISC module. */
2137 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2138 for (cnt = 0; cnt < 30000; cnt++) {
2139 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
2140 break;
2141
2142 udelay(10);
2143 }
2144
2145 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2146 }
2147
2148 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2149
2150 pci_disable_rom(ha->pdev);
2151
2152 /* Get PCI bus information. */
2153 spin_lock_irqsave(&ha->hardware_lock, flags);
2154 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
2155 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2156
2157 return QLA_SUCCESS;
2158 }
2159
2160 /**
2161 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2162 * @vha: HA context
2163 *
2164 * Returns 0 on success.
2165 */
2166 int
2167 qla24xx_pci_config(scsi_qla_host_t *vha)
2168 {
2169 uint16_t w;
2170 unsigned long flags = 0;
2171 struct qla_hw_data *ha = vha->hw;
2172 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2173
2174 pci_set_master(ha->pdev);
2175 pci_try_set_mwi(ha->pdev);
2176
2177 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2178 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2179 w &= ~PCI_COMMAND_INTX_DISABLE;
2180 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2181
2182 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2183
2184 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
2185 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2186 pcix_set_mmrbc(ha->pdev, 2048);
2187
2188 /* PCIe -- adjust Maximum Read Request Size (2048). */
2189 if (pci_is_pcie(ha->pdev))
2190 pcie_set_readrq(ha->pdev, 4096);
2191
2192 pci_disable_rom(ha->pdev);
2193
2194 ha->chip_revision = ha->pdev->revision;
2195
2196 /* Get PCI bus information. */
2197 spin_lock_irqsave(&ha->hardware_lock, flags);
2198 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
2199 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2200
2201 return QLA_SUCCESS;
2202 }
2203
2204 /**
2205 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
2206 * @vha: HA context
2207 *
2208 * Returns 0 on success.
2209 */
2210 int
2211 qla25xx_pci_config(scsi_qla_host_t *vha)
2212 {
2213 uint16_t w;
2214 struct qla_hw_data *ha = vha->hw;
2215
2216 pci_set_master(ha->pdev);
2217 pci_try_set_mwi(ha->pdev);
2218
2219 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2220 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2221 w &= ~PCI_COMMAND_INTX_DISABLE;
2222 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2223
2224 /* PCIe -- adjust Maximum Read Request Size (2048). */
2225 if (pci_is_pcie(ha->pdev))
2226 pcie_set_readrq(ha->pdev, 4096);
2227
2228 pci_disable_rom(ha->pdev);
2229
2230 ha->chip_revision = ha->pdev->revision;
2231
2232 return QLA_SUCCESS;
2233 }
2234
2235 /**
2236 * qla2x00_isp_firmware() - Choose firmware image.
2237 * @vha: HA context
2238 *
2239 * Returns 0 on success.
2240 */
2241 static int
2242 qla2x00_isp_firmware(scsi_qla_host_t *vha)
2243 {
2244 int rval;
2245 uint16_t loop_id, topo, sw_cap;
2246 uint8_t domain, area, al_pa;
2247 struct qla_hw_data *ha = vha->hw;
2248
2249 /* Assume loading risc code */
2250 rval = QLA_FUNCTION_FAILED;
2251
2252 if (ha->flags.disable_risc_code_load) {
2253 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
2254
2255 /* Verify checksum of loaded RISC code. */
2256 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
2257 if (rval == QLA_SUCCESS) {
2258 /* And, verify we are not in ROM code. */
2259 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
2260 &area, &domain, &topo, &sw_cap);
2261 }
2262 }
2263
2264 if (rval)
2265 ql_dbg(ql_dbg_init, vha, 0x007a,
2266 "**** Load RISC code ****.\n");
2267
2268 return (rval);
2269 }
2270
2271 /**
2272 * qla2x00_reset_chip() - Reset ISP chip.
2273 * @vha: HA context
2274 *
2275 * Returns 0 on success.
2276 */
2277 void
2278 qla2x00_reset_chip(scsi_qla_host_t *vha)
2279 {
2280 unsigned long flags = 0;
2281 struct qla_hw_data *ha = vha->hw;
2282 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2283 uint32_t cnt;
2284 uint16_t cmd;
2285
2286 if (unlikely(pci_channel_offline(ha->pdev)))
2287 return;
2288
2289 ha->isp_ops->disable_intrs(ha);
2290
2291 spin_lock_irqsave(&ha->hardware_lock, flags);
2292
2293 /* Turn off master enable */
2294 cmd = 0;
2295 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2296 cmd &= ~PCI_COMMAND_MASTER;
2297 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2298
2299 if (!IS_QLA2100(ha)) {
2300 /* Pause RISC. */
2301 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
2302 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2303 for (cnt = 0; cnt < 30000; cnt++) {
2304 if ((RD_REG_WORD(&reg->hccr) &
2305 HCCR_RISC_PAUSE) != 0)
2306 break;
2307 udelay(100);
2308 }
2309 } else {
2310 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2311 udelay(10);
2312 }
2313
2314 /* Select FPM registers. */
2315 WRT_REG_WORD(&reg->ctrl_status, 0x20);
2316 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2317
2318 /* FPM Soft Reset. */
2319 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
2320 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2321
2322 /* Toggle Fpm Reset. */
2323 if (!IS_QLA2200(ha)) {
2324 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
2325 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2326 }
2327
2328 /* Select frame buffer registers. */
2329 WRT_REG_WORD(&reg->ctrl_status, 0x10);
2330 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2331
2332 /* Reset frame buffer FIFOs. */
2333 if (IS_QLA2200(ha)) {
2334 WRT_FB_CMD_REG(ha, reg, 0xa000);
2335 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
2336 } else {
2337 WRT_FB_CMD_REG(ha, reg, 0x00fc);
2338
2339 /* Read back fb_cmd until zero or 3 seconds max */
2340 for (cnt = 0; cnt < 3000; cnt++) {
2341 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2342 break;
2343 udelay(100);
2344 }
2345 }
2346
2347 /* Select RISC module registers. */
2348 WRT_REG_WORD(&reg->ctrl_status, 0);
2349 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2350
2351 /* Reset RISC processor. */
2352 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2353 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2354
2355 /* Release RISC processor. */
2356 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2357 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2358 }
2359
2360 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
2361 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
2362
2363 /* Reset ISP chip. */
2364 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2365
2366 /* Wait for RISC to recover from reset. */
2367 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2368 /*
2369 * It is necessary to for a delay here since the card doesn't
2370 * respond to PCI reads during a reset. On some architectures
2371 * this will result in an MCA.
2372 */
2373 udelay(20);
2374 for (cnt = 30000; cnt; cnt--) {
2375 if ((RD_REG_WORD(&reg->ctrl_status) &
2376 CSR_ISP_SOFT_RESET) == 0)
2377 break;
2378 udelay(100);
2379 }
2380 } else
2381 udelay(10);
2382
2383 /* Reset RISC processor. */
2384 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2385
2386 WRT_REG_WORD(&reg->semaphore, 0);
2387
2388 /* Release RISC processor. */
2389 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2390 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2391
2392 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2393 for (cnt = 0; cnt < 30000; cnt++) {
2394 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
2395 break;
2396
2397 udelay(100);
2398 }
2399 } else
2400 udelay(100);
2401
2402 /* Turn on master enable */
2403 cmd |= PCI_COMMAND_MASTER;
2404 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2405
2406 /* Disable RISC pause on FPM parity error. */
2407 if (!IS_QLA2100(ha)) {
2408 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
2409 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2410 }
2411
2412 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2413 }
2414
2415 /**
2416 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2417 * @vha: HA context
2418 *
2419 * Returns 0 on success.
2420 */
2421 static int
2422 qla81xx_reset_mpi(scsi_qla_host_t *vha)
2423 {
2424 uint16_t mb[4] = {0x1010, 0, 1, 0};
2425
2426 if (!IS_QLA81XX(vha->hw))
2427 return QLA_SUCCESS;
2428
2429 return qla81xx_write_mpi_register(vha, mb);
2430 }
2431
2432 /**
2433 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
2434 * @vha: HA context
2435 *
2436 * Returns 0 on success.
2437 */
2438 static inline int
2439 qla24xx_reset_risc(scsi_qla_host_t *vha)
2440 {
2441 unsigned long flags = 0;
2442 struct qla_hw_data *ha = vha->hw;
2443 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2444 uint32_t cnt;
2445 uint16_t wd;
2446 static int abts_cnt; /* ISP abort retry counts */
2447 int rval = QLA_SUCCESS;
2448
2449 spin_lock_irqsave(&ha->hardware_lock, flags);
2450
2451 /* Reset RISC. */
2452 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2453 for (cnt = 0; cnt < 30000; cnt++) {
2454 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2455 break;
2456
2457 udelay(10);
2458 }
2459
2460 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
2461 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2462
2463 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2464 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2465 RD_REG_DWORD(&reg->hccr),
2466 RD_REG_DWORD(&reg->ctrl_status),
2467 (RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
2468
2469 WRT_REG_DWORD(&reg->ctrl_status,
2470 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2471 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
2472
2473 udelay(100);
2474
2475 /* Wait for firmware to complete NVRAM accesses. */
2476 RD_REG_WORD(&reg->mailbox0);
2477 for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&
2478 rval == QLA_SUCCESS; cnt--) {
2479 barrier();
2480 if (cnt)
2481 udelay(5);
2482 else
2483 rval = QLA_FUNCTION_TIMEOUT;
2484 }
2485
2486 if (rval == QLA_SUCCESS)
2487 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2488
2489 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2490 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2491 RD_REG_DWORD(&reg->hccr),
2492 RD_REG_DWORD(&reg->mailbox0));
2493
2494 /* Wait for soft-reset to complete. */
2495 RD_REG_DWORD(&reg->ctrl_status);
2496 for (cnt = 0; cnt < 60; cnt++) {
2497 barrier();
2498 if ((RD_REG_DWORD(&reg->ctrl_status) &
2499 CSRX_ISP_SOFT_RESET) == 0)
2500 break;
2501
2502 udelay(5);
2503 }
2504 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
2505 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2506
2507 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2508 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2509 RD_REG_DWORD(&reg->hccr),
2510 RD_REG_DWORD(&reg->ctrl_status));
2511
2512 /* If required, do an MPI FW reset now */
2513 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2514 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2515 if (++abts_cnt < 5) {
2516 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2517 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2518 } else {
2519 /*
2520 * We exhausted the ISP abort retries. We have to
2521 * set the board offline.
2522 */
2523 abts_cnt = 0;
2524 vha->flags.online = 0;
2525 }
2526 }
2527 }
2528
2529 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
2530 RD_REG_DWORD(&reg->hccr);
2531
2532 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
2533 RD_REG_DWORD(&reg->hccr);
2534
2535 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
2536 RD_REG_DWORD(&reg->hccr);
2537
2538 RD_REG_WORD(&reg->mailbox0);
2539 for (cnt = 60; RD_REG_WORD(&reg->mailbox0) != 0 &&
2540 rval == QLA_SUCCESS; cnt--) {
2541 barrier();
2542 if (cnt)
2543 udelay(5);
2544 else
2545 rval = QLA_FUNCTION_TIMEOUT;
2546 }
2547 if (rval == QLA_SUCCESS)
2548 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
2549
2550 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2551 "Host Risc 0x%x, mailbox0 0x%x\n",
2552 RD_REG_DWORD(&reg->hccr),
2553 RD_REG_WORD(&reg->mailbox0));
2554
2555 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2556
2557 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
2558 "Driver in %s mode\n",
2559 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
2560
2561 if (IS_NOPOLLING_TYPE(ha))
2562 ha->isp_ops->enable_intrs(ha);
2563
2564 return rval;
2565 }
2566
2567 static void
2568 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
2569 {
2570 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2571
2572 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2573 *data = RD_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET);
2574
2575 }
2576
2577 static void
2578 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
2579 {
2580 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2581
2582 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2583 WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
2584 }
2585
2586 static void
2587 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
2588 {
2589 uint32_t wd32 = 0;
2590 uint delta_msec = 100;
2591 uint elapsed_msec = 0;
2592 uint timeout_msec;
2593 ulong n;
2594
2595 if (vha->hw->pdev->subsystem_device != 0x0175 &&
2596 vha->hw->pdev->subsystem_device != 0x0240)
2597 return;
2598
2599 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2600 udelay(100);
2601
2602 attempt:
2603 timeout_msec = TIMEOUT_SEMAPHORE;
2604 n = timeout_msec / delta_msec;
2605 while (n--) {
2606 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
2607 qla25xx_read_risc_sema_reg(vha, &wd32);
2608 if (wd32 & RISC_SEMAPHORE)
2609 break;
2610 msleep(delta_msec);
2611 elapsed_msec += delta_msec;
2612 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2613 goto force;
2614 }
2615
2616 if (!(wd32 & RISC_SEMAPHORE))
2617 goto force;
2618
2619 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2620 goto acquired;
2621
2622 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
2623 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
2624 n = timeout_msec / delta_msec;
2625 while (n--) {
2626 qla25xx_read_risc_sema_reg(vha, &wd32);
2627 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2628 break;
2629 msleep(delta_msec);
2630 elapsed_msec += delta_msec;
2631 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2632 goto force;
2633 }
2634
2635 if (wd32 & RISC_SEMAPHORE_FORCE)
2636 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
2637
2638 goto attempt;
2639
2640 force:
2641 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
2642
2643 acquired:
2644 return;
2645 }
2646
2647 /**
2648 * qla24xx_reset_chip() - Reset ISP24xx chip.
2649 * @vha: HA context
2650 *
2651 * Returns 0 on success.
2652 */
2653 void
2654 qla24xx_reset_chip(scsi_qla_host_t *vha)
2655 {
2656 struct qla_hw_data *ha = vha->hw;
2657
2658 if (pci_channel_offline(ha->pdev) &&
2659 ha->flags.pci_channel_io_perm_failure) {
2660 return;
2661 }
2662
2663 ha->isp_ops->disable_intrs(ha);
2664
2665 qla25xx_manipulate_risc_semaphore(vha);
2666
2667 /* Perform RISC reset. */
2668 qla24xx_reset_risc(vha);
2669 }
2670
2671 /**
2672 * qla2x00_chip_diag() - Test chip for proper operation.
2673 * @vha: HA context
2674 *
2675 * Returns 0 on success.
2676 */
2677 int
2678 qla2x00_chip_diag(scsi_qla_host_t *vha)
2679 {
2680 int rval;
2681 struct qla_hw_data *ha = vha->hw;
2682 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2683 unsigned long flags = 0;
2684 uint16_t data;
2685 uint32_t cnt;
2686 uint16_t mb[5];
2687 struct req_que *req = ha->req_q_map[0];
2688
2689 /* Assume a failed state */
2690 rval = QLA_FUNCTION_FAILED;
2691
2692 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
2693 &reg->flash_address);
2694
2695 spin_lock_irqsave(&ha->hardware_lock, flags);
2696
2697 /* Reset ISP chip. */
2698 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2699
2700 /*
2701 * We need to have a delay here since the card will not respond while
2702 * in reset causing an MCA on some architectures.
2703 */
2704 udelay(20);
2705 data = qla2x00_debounce_register(&reg->ctrl_status);
2706 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
2707 udelay(5);
2708 data = RD_REG_WORD(&reg->ctrl_status);
2709 barrier();
2710 }
2711
2712 if (!cnt)
2713 goto chip_diag_failed;
2714
2715 ql_dbg(ql_dbg_init, vha, 0x007c,
2716 "Reset register cleared by chip reset.\n");
2717
2718 /* Reset RISC processor. */
2719 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2720 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2721
2722 /* Workaround for QLA2312 PCI parity error */
2723 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2724 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
2725 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
2726 udelay(5);
2727 data = RD_MAILBOX_REG(ha, reg, 0);
2728 barrier();
2729 }
2730 } else
2731 udelay(10);
2732
2733 if (!cnt)
2734 goto chip_diag_failed;
2735
2736 /* Check product ID of chip */
2737 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
2738
2739 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
2740 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
2741 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
2742 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
2743 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
2744 mb[3] != PROD_ID_3) {
2745 ql_log(ql_log_warn, vha, 0x0062,
2746 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
2747 mb[1], mb[2], mb[3]);
2748
2749 goto chip_diag_failed;
2750 }
2751 ha->product_id[0] = mb[1];
2752 ha->product_id[1] = mb[2];
2753 ha->product_id[2] = mb[3];
2754 ha->product_id[3] = mb[4];
2755
2756 /* Adjust fw RISC transfer size */
2757 if (req->length > 1024)
2758 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
2759 else
2760 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
2761 req->length;
2762
2763 if (IS_QLA2200(ha) &&
2764 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
2765 /* Limit firmware transfer size with a 2200A */
2766 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
2767
2768 ha->device_type |= DT_ISP2200A;
2769 ha->fw_transfer_size = 128;
2770 }
2771
2772 /* Wrap Incoming Mailboxes Test. */
2773 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2774
2775 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
2776 rval = qla2x00_mbx_reg_test(vha);
2777 if (rval)
2778 ql_log(ql_log_warn, vha, 0x0080,
2779 "Failed mailbox send register test.\n");
2780 else
2781 /* Flag a successful rval */
2782 rval = QLA_SUCCESS;
2783 spin_lock_irqsave(&ha->hardware_lock, flags);
2784
2785 chip_diag_failed:
2786 if (rval)
2787 ql_log(ql_log_info, vha, 0x0081,
2788 "Chip diagnostics **** FAILED ****.\n");
2789
2790 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2791
2792 return (rval);
2793 }
2794
2795 /**
2796 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
2797 * @vha: HA context
2798 *
2799 * Returns 0 on success.
2800 */
2801 int
2802 qla24xx_chip_diag(scsi_qla_host_t *vha)
2803 {
2804 int rval;
2805 struct qla_hw_data *ha = vha->hw;
2806 struct req_que *req = ha->req_q_map[0];
2807
2808 if (IS_P3P_TYPE(ha))
2809 return QLA_SUCCESS;
2810
2811 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
2812
2813 rval = qla2x00_mbx_reg_test(vha);
2814 if (rval) {
2815 ql_log(ql_log_warn, vha, 0x0082,
2816 "Failed mailbox send register test.\n");
2817 } else {
2818 /* Flag a successful rval */
2819 rval = QLA_SUCCESS;
2820 }
2821
2822 return rval;
2823 }
2824
2825 static void
2826 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
2827 {
2828 int rval;
2829 dma_addr_t tc_dma;
2830 void *tc;
2831 struct qla_hw_data *ha = vha->hw;
2832
2833 if (ha->eft) {
2834 ql_dbg(ql_dbg_init, vha, 0x00bd,
2835 "%s: Offload Mem is already allocated.\n",
2836 __func__);
2837 return;
2838 }
2839
2840 if (IS_FWI2_CAPABLE(ha)) {
2841 /* Allocate memory for Fibre Channel Event Buffer. */
2842 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
2843 !IS_QLA27XX(ha))
2844 goto try_eft;
2845
2846 if (ha->fce)
2847 dma_free_coherent(&ha->pdev->dev,
2848 FCE_SIZE, ha->fce, ha->fce_dma);
2849
2850 /* Allocate memory for Fibre Channel Event Buffer. */
2851 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
2852 GFP_KERNEL);
2853 if (!tc) {
2854 ql_log(ql_log_warn, vha, 0x00be,
2855 "Unable to allocate (%d KB) for FCE.\n",
2856 FCE_SIZE / 1024);
2857 goto try_eft;
2858 }
2859
2860 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
2861 ha->fce_mb, &ha->fce_bufs);
2862 if (rval) {
2863 ql_log(ql_log_warn, vha, 0x00bf,
2864 "Unable to initialize FCE (%d).\n", rval);
2865 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
2866 tc_dma);
2867 ha->flags.fce_enabled = 0;
2868 goto try_eft;
2869 }
2870 ql_dbg(ql_dbg_init, vha, 0x00c0,
2871 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
2872
2873 ha->flags.fce_enabled = 1;
2874 ha->fce_dma = tc_dma;
2875 ha->fce = tc;
2876
2877 try_eft:
2878 if (ha->eft)
2879 dma_free_coherent(&ha->pdev->dev,
2880 EFT_SIZE, ha->eft, ha->eft_dma);
2881
2882 /* Allocate memory for Extended Trace Buffer. */
2883 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
2884 GFP_KERNEL);
2885 if (!tc) {
2886 ql_log(ql_log_warn, vha, 0x00c1,
2887 "Unable to allocate (%d KB) for EFT.\n",
2888 EFT_SIZE / 1024);
2889 goto eft_err;
2890 }
2891
2892 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
2893 if (rval) {
2894 ql_log(ql_log_warn, vha, 0x00c2,
2895 "Unable to initialize EFT (%d).\n", rval);
2896 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
2897 tc_dma);
2898 goto eft_err;
2899 }
2900 ql_dbg(ql_dbg_init, vha, 0x00c3,
2901 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
2902
2903 ha->eft_dma = tc_dma;
2904 ha->eft = tc;
2905 }
2906
2907 eft_err:
2908 return;
2909 }
2910
2911 void
2912 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
2913 {
2914 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
2915 eft_size, fce_size, mq_size;
2916 struct qla_hw_data *ha = vha->hw;
2917 struct req_que *req = ha->req_q_map[0];
2918 struct rsp_que *rsp = ha->rsp_q_map[0];
2919 struct qla2xxx_fw_dump *fw_dump;
2920
2921 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
2922 req_q_size = rsp_q_size = 0;
2923
2924 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2925 fixed_size = sizeof(struct qla2100_fw_dump);
2926 } else if (IS_QLA23XX(ha)) {
2927 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
2928 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
2929 sizeof(uint16_t);
2930 } else if (IS_FWI2_CAPABLE(ha)) {
2931 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
2932 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
2933 else if (IS_QLA81XX(ha))
2934 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
2935 else if (IS_QLA25XX(ha))
2936 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
2937 else
2938 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
2939
2940 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
2941 sizeof(uint32_t);
2942 if (ha->mqenable) {
2943 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
2944 mq_size = sizeof(struct qla2xxx_mq_chain);
2945 /*
2946 * Allocate maximum buffer size for all queues.
2947 * Resizing must be done at end-of-dump processing.
2948 */
2949 mq_size += ha->max_req_queues *
2950 (req->length * sizeof(request_t));
2951 mq_size += ha->max_rsp_queues *
2952 (rsp->length * sizeof(response_t));
2953 }
2954 if (ha->tgt.atio_ring)
2955 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
2956 /* Allocate memory for Fibre Channel Event Buffer. */
2957 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
2958 !IS_QLA27XX(ha))
2959 goto try_eft;
2960
2961 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
2962 try_eft:
2963 ql_dbg(ql_dbg_init, vha, 0x00c3,
2964 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
2965 eft_size = EFT_SIZE;
2966 }
2967
2968 if (IS_QLA27XX(ha)) {
2969 if (!ha->fw_dump_template) {
2970 ql_log(ql_log_warn, vha, 0x00ba,
2971 "Failed missing fwdump template\n");
2972 return;
2973 }
2974 dump_size = qla27xx_fwdt_calculate_dump_size(vha);
2975 ql_dbg(ql_dbg_init, vha, 0x00fa,
2976 "-> allocating fwdump (%x bytes)...\n", dump_size);
2977 goto allocate;
2978 }
2979
2980 req_q_size = req->length * sizeof(request_t);
2981 rsp_q_size = rsp->length * sizeof(response_t);
2982 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
2983 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
2984 ha->chain_offset = dump_size;
2985 dump_size += mq_size + fce_size;
2986
2987 if (ha->exchoffld_buf)
2988 dump_size += sizeof(struct qla2xxx_offld_chain) +
2989 ha->exchoffld_size;
2990 if (ha->exlogin_buf)
2991 dump_size += sizeof(struct qla2xxx_offld_chain) +
2992 ha->exlogin_size;
2993
2994 allocate:
2995 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) {
2996 fw_dump = vmalloc(dump_size);
2997 if (!fw_dump) {
2998 ql_log(ql_log_warn, vha, 0x00c4,
2999 "Unable to allocate (%d KB) for firmware dump.\n",
3000 dump_size / 1024);
3001 } else {
3002 if (ha->fw_dump)
3003 vfree(ha->fw_dump);
3004 ha->fw_dump = fw_dump;
3005
3006 ha->fw_dump_len = dump_size;
3007 ql_dbg(ql_dbg_init, vha, 0x00c5,
3008 "Allocated (%d KB) for firmware dump.\n",
3009 dump_size / 1024);
3010
3011 if (IS_QLA27XX(ha))
3012 return;
3013
3014 ha->fw_dump->signature[0] = 'Q';
3015 ha->fw_dump->signature[1] = 'L';
3016 ha->fw_dump->signature[2] = 'G';
3017 ha->fw_dump->signature[3] = 'C';
3018 ha->fw_dump->version = htonl(1);
3019
3020 ha->fw_dump->fixed_size = htonl(fixed_size);
3021 ha->fw_dump->mem_size = htonl(mem_size);
3022 ha->fw_dump->req_q_size = htonl(req_q_size);
3023 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3024
3025 ha->fw_dump->eft_size = htonl(eft_size);
3026 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
3027 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
3028
3029 ha->fw_dump->header_size =
3030 htonl(offsetof(struct qla2xxx_fw_dump, isp));
3031 }
3032 }
3033 }
3034
3035 static int
3036 qla81xx_mpi_sync(scsi_qla_host_t *vha)
3037 {
3038 #define MPS_MASK 0xe0
3039 int rval;
3040 uint16_t dc;
3041 uint32_t dw;
3042
3043 if (!IS_QLA81XX(vha->hw))
3044 return QLA_SUCCESS;
3045
3046 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3047 if (rval != QLA_SUCCESS) {
3048 ql_log(ql_log_warn, vha, 0x0105,
3049 "Unable to acquire semaphore.\n");
3050 goto done;
3051 }
3052
3053 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3054 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3055 if (rval != QLA_SUCCESS) {
3056 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
3057 goto done_release;
3058 }
3059
3060 dc &= MPS_MASK;
3061 if (dc == (dw & MPS_MASK))
3062 goto done_release;
3063
3064 dw &= ~MPS_MASK;
3065 dw |= dc;
3066 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3067 if (rval != QLA_SUCCESS) {
3068 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
3069 }
3070
3071 done_release:
3072 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3073 if (rval != QLA_SUCCESS) {
3074 ql_log(ql_log_warn, vha, 0x006d,
3075 "Unable to release semaphore.\n");
3076 }
3077
3078 done:
3079 return rval;
3080 }
3081
3082 int
3083 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3084 {
3085 /* Don't try to reallocate the array */
3086 if (req->outstanding_cmds)
3087 return QLA_SUCCESS;
3088
3089 if (!IS_FWI2_CAPABLE(ha))
3090 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3091 else {
3092 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3093 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
3094 else
3095 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
3096 }
3097
3098 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
3099 req->num_outstanding_cmds, GFP_KERNEL);
3100
3101 if (!req->outstanding_cmds) {
3102 /*
3103 * Try to allocate a minimal size just so we can get through
3104 * initialization.
3105 */
3106 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
3107 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
3108 req->num_outstanding_cmds, GFP_KERNEL);
3109
3110 if (!req->outstanding_cmds) {
3111 ql_log(ql_log_fatal, NULL, 0x0126,
3112 "Failed to allocate memory for "
3113 "outstanding_cmds for req_que %p.\n", req);
3114 req->num_outstanding_cmds = 0;
3115 return QLA_FUNCTION_FAILED;
3116 }
3117 }
3118
3119 return QLA_SUCCESS;
3120 }
3121
3122 #define PRINT_FIELD(_field, _flag, _str) { \
3123 if (a0->_field & _flag) {\
3124 if (p) {\
3125 strcat(ptr, "|");\
3126 ptr++;\
3127 leftover--;\
3128 } \
3129 len = snprintf(ptr, leftover, "%s", _str); \
3130 p = 1;\
3131 leftover -= len;\
3132 ptr += len; \
3133 } \
3134 }
3135
3136 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
3137 {
3138 #define STR_LEN 64
3139 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
3140 u8 str[STR_LEN], *ptr, p;
3141 int leftover, len;
3142
3143 memset(str, 0, STR_LEN);
3144 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
3145 ql_dbg(ql_dbg_init, vha, 0x015a,
3146 "SFP MFG Name: %s\n", str);
3147
3148 memset(str, 0, STR_LEN);
3149 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
3150 ql_dbg(ql_dbg_init, vha, 0x015c,
3151 "SFP Part Name: %s\n", str);
3152
3153 /* media */
3154 memset(str, 0, STR_LEN);
3155 ptr = str;
3156 leftover = STR_LEN;
3157 p = len = 0;
3158 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
3159 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
3160 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
3161 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
3162 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
3163 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
3164 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
3165 ql_dbg(ql_dbg_init, vha, 0x0160,
3166 "SFP Media: %s\n", str);
3167
3168 /* link length */
3169 memset(str, 0, STR_LEN);
3170 ptr = str;
3171 leftover = STR_LEN;
3172 p = len = 0;
3173 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
3174 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
3175 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
3176 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
3177 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
3178 ql_dbg(ql_dbg_init, vha, 0x0196,
3179 "SFP Link Length: %s\n", str);
3180
3181 memset(str, 0, STR_LEN);
3182 ptr = str;
3183 leftover = STR_LEN;
3184 p = len = 0;
3185 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
3186 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
3187 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
3188 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
3189 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
3190 ql_dbg(ql_dbg_init, vha, 0x016e,
3191 "SFP FC Link Tech: %s\n", str);
3192
3193 if (a0->length_km)
3194 ql_dbg(ql_dbg_init, vha, 0x016f,
3195 "SFP Distant: %d km\n", a0->length_km);
3196 if (a0->length_100m)
3197 ql_dbg(ql_dbg_init, vha, 0x0170,
3198 "SFP Distant: %d m\n", a0->length_100m*100);
3199 if (a0->length_50um_10m)
3200 ql_dbg(ql_dbg_init, vha, 0x0189,
3201 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
3202 if (a0->length_62um_10m)
3203 ql_dbg(ql_dbg_init, vha, 0x018a,
3204 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
3205 if (a0->length_om4_10m)
3206 ql_dbg(ql_dbg_init, vha, 0x0194,
3207 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
3208 if (a0->length_om3_10m)
3209 ql_dbg(ql_dbg_init, vha, 0x0195,
3210 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
3211 }
3212
3213
3214 /*
3215 * Return Code:
3216 * QLA_SUCCESS: no action
3217 * QLA_INTERFACE_ERROR: SFP is not there.
3218 * QLA_FUNCTION_FAILED: detected New SFP
3219 */
3220 int
3221 qla24xx_detect_sfp(scsi_qla_host_t *vha)
3222 {
3223 int rc = QLA_SUCCESS;
3224 struct sff_8247_a0 *a;
3225 struct qla_hw_data *ha = vha->hw;
3226
3227 if (!AUTO_DETECT_SFP_SUPPORT(vha))
3228 goto out;
3229
3230 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3231 if (rc)
3232 goto out;
3233
3234 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3235 qla2xxx_print_sfp_info(vha);
3236
3237 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) {
3238 /* long range */
3239 ha->flags.detected_lr_sfp = 1;
3240
3241 if (a->length_km > 5 || a->length_100m > 50)
3242 ha->long_range_distance = LR_DISTANCE_10K;
3243 else
3244 ha->long_range_distance = LR_DISTANCE_5K;
3245
3246 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting)
3247 ql_dbg(ql_dbg_async, vha, 0x507b,
3248 "Detected Long Range SFP.\n");
3249 } else {
3250 /* short range */
3251 ha->flags.detected_lr_sfp = 0;
3252 if (ha->flags.using_lr_setting)
3253 ql_dbg(ql_dbg_async, vha, 0x5084,
3254 "Detected Short Range SFP.\n");
3255 }
3256
3257 if (!vha->flags.init_done)
3258 rc = QLA_SUCCESS;
3259 out:
3260 return rc;
3261 }
3262
3263 /**
3264 * qla2x00_setup_chip() - Load and start RISC firmware.
3265 * @vha: HA context
3266 *
3267 * Returns 0 on success.
3268 */
3269 static int
3270 qla2x00_setup_chip(scsi_qla_host_t *vha)
3271 {
3272 int rval;
3273 uint32_t srisc_address = 0;
3274 struct qla_hw_data *ha = vha->hw;
3275 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3276 unsigned long flags;
3277 uint16_t fw_major_version;
3278
3279 if (IS_P3P_TYPE(ha)) {
3280 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3281 if (rval == QLA_SUCCESS) {
3282 qla2x00_stop_firmware(vha);
3283 goto enable_82xx_npiv;
3284 } else
3285 goto failed;
3286 }
3287
3288 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3289 /* Disable SRAM, Instruction RAM and GP RAM parity. */
3290 spin_lock_irqsave(&ha->hardware_lock, flags);
3291 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
3292 RD_REG_WORD(&reg->hccr);
3293 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3294 }
3295
3296 qla81xx_mpi_sync(vha);
3297
3298 /* Load firmware sequences */
3299 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3300 if (rval == QLA_SUCCESS) {
3301 ql_dbg(ql_dbg_init, vha, 0x00c9,
3302 "Verifying Checksum of loaded RISC code.\n");
3303
3304 rval = qla2x00_verify_checksum(vha, srisc_address);
3305 if (rval == QLA_SUCCESS) {
3306 /* Start firmware execution. */
3307 ql_dbg(ql_dbg_init, vha, 0x00ca,
3308 "Starting firmware.\n");
3309
3310 if (ql2xexlogins)
3311 ha->flags.exlogins_enabled = 1;
3312
3313 if (qla_is_exch_offld_enabled(vha))
3314 ha->flags.exchoffld_enabled = 1;
3315
3316 rval = qla2x00_execute_fw(vha, srisc_address);
3317 /* Retrieve firmware information. */
3318 if (rval == QLA_SUCCESS) {
3319 qla24xx_detect_sfp(vha);
3320
3321 rval = qla2x00_set_exlogins_buffer(vha);
3322 if (rval != QLA_SUCCESS)
3323 goto failed;
3324
3325 rval = qla2x00_set_exchoffld_buffer(vha);
3326 if (rval != QLA_SUCCESS)
3327 goto failed;
3328
3329 enable_82xx_npiv:
3330 fw_major_version = ha->fw_major_version;
3331 if (IS_P3P_TYPE(ha))
3332 qla82xx_check_md_needed(vha);
3333 else
3334 rval = qla2x00_get_fw_version(vha);
3335 if (rval != QLA_SUCCESS)
3336 goto failed;
3337 ha->flags.npiv_supported = 0;
3338 if (IS_QLA2XXX_MIDTYPE(ha) &&
3339 (ha->fw_attributes & BIT_2)) {
3340 ha->flags.npiv_supported = 1;
3341 if ((!ha->max_npiv_vports) ||
3342 ((ha->max_npiv_vports + 1) %
3343 MIN_MULTI_ID_FABRIC))
3344 ha->max_npiv_vports =
3345 MIN_MULTI_ID_FABRIC - 1;
3346 }
3347 qla2x00_get_resource_cnts(vha);
3348
3349 /*
3350 * Allocate the array of outstanding commands
3351 * now that we know the firmware resources.
3352 */
3353 rval = qla2x00_alloc_outstanding_cmds(ha,
3354 vha->req);
3355 if (rval != QLA_SUCCESS)
3356 goto failed;
3357
3358 if (!fw_major_version && !(IS_P3P_TYPE(ha)))
3359 qla2x00_alloc_offload_mem(vha);
3360
3361 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
3362 qla2x00_alloc_fw_dump(vha);
3363
3364 } else {
3365 goto failed;
3366 }
3367 } else {
3368 ql_log(ql_log_fatal, vha, 0x00cd,
3369 "ISP Firmware failed checksum.\n");
3370 goto failed;
3371 }
3372 } else
3373 goto failed;
3374
3375 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3376 /* Enable proper parity. */
3377 spin_lock_irqsave(&ha->hardware_lock, flags);
3378 if (IS_QLA2300(ha))
3379 /* SRAM parity */
3380 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
3381 else
3382 /* SRAM, Instruction RAM and GP RAM parity */
3383 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
3384 RD_REG_WORD(&reg->hccr);
3385 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3386 }
3387
3388 if (IS_QLA27XX(ha))
3389 ha->flags.fac_supported = 1;
3390 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
3391 uint32_t size;
3392
3393 rval = qla81xx_fac_get_sector_size(vha, &size);
3394 if (rval == QLA_SUCCESS) {
3395 ha->flags.fac_supported = 1;
3396 ha->fdt_block_size = size << 2;
3397 } else {
3398 ql_log(ql_log_warn, vha, 0x00ce,
3399 "Unsupported FAC firmware (%d.%02d.%02d).\n",
3400 ha->fw_major_version, ha->fw_minor_version,
3401 ha->fw_subminor_version);
3402
3403 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3404 ha->flags.fac_supported = 0;
3405 rval = QLA_SUCCESS;
3406 }
3407 }
3408 }
3409 failed:
3410 if (rval) {
3411 ql_log(ql_log_fatal, vha, 0x00cf,
3412 "Setup chip ****FAILED****.\n");
3413 }
3414
3415 return (rval);
3416 }
3417
3418 /**
3419 * qla2x00_init_response_q_entries() - Initializes response queue entries.
3420 * @rsp: response queue
3421 *
3422 * Beginning of request ring has initialization control block already built
3423 * by nvram config routine.
3424 *
3425 * Returns 0 on success.
3426 */
3427 void
3428 qla2x00_init_response_q_entries(struct rsp_que *rsp)
3429 {
3430 uint16_t cnt;
3431 response_t *pkt;
3432
3433 rsp->ring_ptr = rsp->ring;
3434 rsp->ring_index = 0;
3435 rsp->status_srb = NULL;
3436 pkt = rsp->ring_ptr;
3437 for (cnt = 0; cnt < rsp->length; cnt++) {
3438 pkt->signature = RESPONSE_PROCESSED;
3439 pkt++;
3440 }
3441 }
3442
3443 /**
3444 * qla2x00_update_fw_options() - Read and process firmware options.
3445 * @vha: HA context
3446 *
3447 * Returns 0 on success.
3448 */
3449 void
3450 qla2x00_update_fw_options(scsi_qla_host_t *vha)
3451 {
3452 uint16_t swing, emphasis, tx_sens, rx_sens;
3453 struct qla_hw_data *ha = vha->hw;
3454
3455 memset(ha->fw_options, 0, sizeof(ha->fw_options));
3456 qla2x00_get_fw_options(vha, ha->fw_options);
3457
3458 if (IS_QLA2100(ha) || IS_QLA2200(ha))
3459 return;
3460
3461 /* Serial Link options. */
3462 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
3463 "Serial link options.\n");
3464 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
3465 (uint8_t *)&ha->fw_seriallink_options,
3466 sizeof(ha->fw_seriallink_options));
3467
3468 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
3469 if (ha->fw_seriallink_options[3] & BIT_2) {
3470 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
3471
3472 /* 1G settings */
3473 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
3474 emphasis = (ha->fw_seriallink_options[2] &
3475 (BIT_4 | BIT_3)) >> 3;
3476 tx_sens = ha->fw_seriallink_options[0] &
3477 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3478 rx_sens = (ha->fw_seriallink_options[0] &
3479 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3480 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
3481 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3482 if (rx_sens == 0x0)
3483 rx_sens = 0x3;
3484 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
3485 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3486 ha->fw_options[10] |= BIT_5 |
3487 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3488 (tx_sens & (BIT_1 | BIT_0));
3489
3490 /* 2G settings */
3491 swing = (ha->fw_seriallink_options[2] &
3492 (BIT_7 | BIT_6 | BIT_5)) >> 5;
3493 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
3494 tx_sens = ha->fw_seriallink_options[1] &
3495 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3496 rx_sens = (ha->fw_seriallink_options[1] &
3497 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3498 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
3499 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3500 if (rx_sens == 0x0)
3501 rx_sens = 0x3;
3502 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
3503 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3504 ha->fw_options[11] |= BIT_5 |
3505 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3506 (tx_sens & (BIT_1 | BIT_0));
3507 }
3508
3509 /* FCP2 options. */
3510 /* Return command IOCBs without waiting for an ABTS to complete. */
3511 ha->fw_options[3] |= BIT_13;
3512
3513 /* LED scheme. */
3514 if (ha->flags.enable_led_scheme)
3515 ha->fw_options[2] |= BIT_12;
3516
3517 /* Detect ISP6312. */
3518 if (IS_QLA6312(ha))
3519 ha->fw_options[2] |= BIT_13;
3520
3521 /* Set Retry FLOGI in case of P2P connection */
3522 if (ha->operating_mode == P2P) {
3523 ha->fw_options[2] |= BIT_3;
3524 ql_dbg(ql_dbg_disc, vha, 0x2100,
3525 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3526 __func__, ha->fw_options[2]);
3527 }
3528
3529 /* Update firmware options. */
3530 qla2x00_set_fw_options(vha, ha->fw_options);
3531 }
3532
3533 void
3534 qla24xx_update_fw_options(scsi_qla_host_t *vha)
3535 {
3536 int rval;
3537 struct qla_hw_data *ha = vha->hw;
3538
3539 if (IS_P3P_TYPE(ha))
3540 return;
3541
3542 /* Hold status IOCBs until ABTS response received. */
3543 if (ql2xfwholdabts)
3544 ha->fw_options[3] |= BIT_12;
3545
3546 /* Set Retry FLOGI in case of P2P connection */
3547 if (ha->operating_mode == P2P) {
3548 ha->fw_options[2] |= BIT_3;
3549 ql_dbg(ql_dbg_disc, vha, 0x2101,
3550 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3551 __func__, ha->fw_options[2]);
3552 }
3553
3554 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
3555 if (ql2xmvasynctoatio &&
3556 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) {
3557 if (qla_tgt_mode_enabled(vha) ||
3558 qla_dual_mode_enabled(vha))
3559 ha->fw_options[2] |= BIT_11;
3560 else
3561 ha->fw_options[2] &= ~BIT_11;
3562 }
3563
3564 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3565 /*
3566 * Tell FW to track each exchange to prevent
3567 * driver from using stale exchange.
3568 */
3569 if (qla_tgt_mode_enabled(vha) ||
3570 qla_dual_mode_enabled(vha))
3571 ha->fw_options[2] |= BIT_4;
3572 else
3573 ha->fw_options[2] &= ~BIT_4;
3574
3575 /* Reserve 1/2 of emergency exchanges for ELS.*/
3576 if (qla2xuseresexchforels)
3577 ha->fw_options[2] |= BIT_8;
3578 else
3579 ha->fw_options[2] &= ~BIT_8;
3580 }
3581
3582 ql_dbg(ql_dbg_init, vha, 0x00e8,
3583 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
3584 __func__, ha->fw_options[1], ha->fw_options[2],
3585 ha->fw_options[3], vha->host->active_mode);
3586
3587 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
3588 qla2x00_set_fw_options(vha, ha->fw_options);
3589
3590 /* Update Serial Link options. */
3591 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
3592 return;
3593
3594 rval = qla2x00_set_serdes_params(vha,
3595 le16_to_cpu(ha->fw_seriallink_options24[1]),
3596 le16_to_cpu(ha->fw_seriallink_options24[2]),
3597 le16_to_cpu(ha->fw_seriallink_options24[3]));
3598 if (rval != QLA_SUCCESS) {
3599 ql_log(ql_log_warn, vha, 0x0104,
3600 "Unable to update Serial Link options (%x).\n", rval);
3601 }
3602 }
3603
3604 void
3605 qla2x00_config_rings(struct scsi_qla_host *vha)
3606 {
3607 struct qla_hw_data *ha = vha->hw;
3608 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3609 struct req_que *req = ha->req_q_map[0];
3610 struct rsp_que *rsp = ha->rsp_q_map[0];
3611
3612 /* Setup ring parameters in initialization control block. */
3613 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
3614 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
3615 ha->init_cb->request_q_length = cpu_to_le16(req->length);
3616 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
3617 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3618 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3619 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3620 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
3621
3622 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
3623 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
3624 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
3625 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
3626 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
3627 }
3628
3629 void
3630 qla24xx_config_rings(struct scsi_qla_host *vha)
3631 {
3632 struct qla_hw_data *ha = vha->hw;
3633 device_reg_t *reg = ISP_QUE_REG(ha, 0);
3634 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
3635 struct qla_msix_entry *msix;
3636 struct init_cb_24xx *icb;
3637 uint16_t rid = 0;
3638 struct req_que *req = ha->req_q_map[0];
3639 struct rsp_que *rsp = ha->rsp_q_map[0];
3640
3641 /* Setup ring parameters in initialization control block. */
3642 icb = (struct init_cb_24xx *)ha->init_cb;
3643 icb->request_q_outpointer = cpu_to_le16(0);
3644 icb->response_q_inpointer = cpu_to_le16(0);
3645 icb->request_q_length = cpu_to_le16(req->length);
3646 icb->response_q_length = cpu_to_le16(rsp->length);
3647 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3648 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3649 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3650 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
3651
3652 /* Setup ATIO queue dma pointers for target mode */
3653 icb->atio_q_inpointer = cpu_to_le16(0);
3654 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
3655 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
3656 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
3657
3658 if (IS_SHADOW_REG_CAPABLE(ha))
3659 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
3660
3661 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3662 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
3663 icb->rid = cpu_to_le16(rid);
3664 if (ha->flags.msix_enabled) {
3665 msix = &ha->msix_entries[1];
3666 ql_dbg(ql_dbg_init, vha, 0x0019,
3667 "Registering vector 0x%x for base que.\n",
3668 msix->entry);
3669 icb->msix = cpu_to_le16(msix->entry);
3670 }
3671 /* Use alternate PCI bus number */
3672 if (MSB(rid))
3673 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
3674 /* Use alternate PCI devfn */
3675 if (LSB(rid))
3676 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
3677
3678 /* Use Disable MSIX Handshake mode for capable adapters */
3679 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
3680 (ha->flags.msix_enabled)) {
3681 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
3682 ha->flags.disable_msix_handshake = 1;
3683 ql_dbg(ql_dbg_init, vha, 0x00fe,
3684 "MSIX Handshake Disable Mode turned on.\n");
3685 } else {
3686 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
3687 }
3688 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
3689
3690 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
3691 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
3692 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
3693 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
3694 } else {
3695 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
3696 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
3697 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
3698 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
3699 }
3700 qlt_24xx_config_rings(vha);
3701
3702 /* PCI posting */
3703 RD_REG_DWORD(&ioreg->hccr);
3704 }
3705
3706 /**
3707 * qla2x00_init_rings() - Initializes firmware.
3708 * @vha: HA context
3709 *
3710 * Beginning of request ring has initialization control block already built
3711 * by nvram config routine.
3712 *
3713 * Returns 0 on success.
3714 */
3715 int
3716 qla2x00_init_rings(scsi_qla_host_t *vha)
3717 {
3718 int rval;
3719 unsigned long flags = 0;
3720 int cnt, que;
3721 struct qla_hw_data *ha = vha->hw;
3722 struct req_que *req;
3723 struct rsp_que *rsp;
3724 struct mid_init_cb_24xx *mid_init_cb =
3725 (struct mid_init_cb_24xx *) ha->init_cb;
3726
3727 spin_lock_irqsave(&ha->hardware_lock, flags);
3728
3729 /* Clear outstanding commands array. */
3730 for (que = 0; que < ha->max_req_queues; que++) {
3731 req = ha->req_q_map[que];
3732 if (!req || !test_bit(que, ha->req_qid_map))
3733 continue;
3734 req->out_ptr = (void *)(req->ring + req->length);
3735 *req->out_ptr = 0;
3736 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
3737 req->outstanding_cmds[cnt] = NULL;
3738
3739 req->current_outstanding_cmd = 1;
3740
3741 /* Initialize firmware. */
3742 req->ring_ptr = req->ring;
3743 req->ring_index = 0;
3744 req->cnt = req->length;
3745 }
3746
3747 for (que = 0; que < ha->max_rsp_queues; que++) {
3748 rsp = ha->rsp_q_map[que];
3749 if (!rsp || !test_bit(que, ha->rsp_qid_map))
3750 continue;
3751 rsp->in_ptr = (void *)(rsp->ring + rsp->length);
3752 *rsp->in_ptr = 0;
3753 /* Initialize response queue entries */
3754 if (IS_QLAFX00(ha))
3755 qlafx00_init_response_q_entries(rsp);
3756 else
3757 qla2x00_init_response_q_entries(rsp);
3758 }
3759
3760 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
3761 ha->tgt.atio_ring_index = 0;
3762 /* Initialize ATIO queue entries */
3763 qlt_init_atio_q_entries(vha);
3764
3765 ha->isp_ops->config_rings(vha);
3766
3767 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3768
3769 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
3770
3771 if (IS_QLAFX00(ha)) {
3772 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
3773 goto next_check;
3774 }
3775
3776 /* Update any ISP specific firmware options before initialization. */
3777 ha->isp_ops->update_fw_options(vha);
3778
3779 if (ha->flags.npiv_supported) {
3780 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
3781 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
3782 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
3783 }
3784
3785 if (IS_FWI2_CAPABLE(ha)) {
3786 mid_init_cb->options = cpu_to_le16(BIT_1);
3787 mid_init_cb->init_cb.execution_throttle =
3788 cpu_to_le16(ha->cur_fw_xcb_count);
3789 ha->flags.dport_enabled =
3790 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0;
3791 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
3792 (ha->flags.dport_enabled) ? "enabled" : "disabled");
3793 /* FA-WWPN Status */
3794 ha->flags.fawwpn_enabled =
3795 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0;
3796 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
3797 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
3798 }
3799
3800 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
3801 next_check:
3802 if (rval) {
3803 ql_log(ql_log_fatal, vha, 0x00d2,
3804 "Init Firmware **** FAILED ****.\n");
3805 } else {
3806 ql_dbg(ql_dbg_init, vha, 0x00d3,
3807 "Init Firmware -- success.\n");
3808 QLA_FW_STARTED(ha);
3809 }
3810
3811 return (rval);
3812 }
3813
3814 /**
3815 * qla2x00_fw_ready() - Waits for firmware ready.
3816 * @vha: HA context
3817 *
3818 * Returns 0 on success.
3819 */
3820 static int
3821 qla2x00_fw_ready(scsi_qla_host_t *vha)
3822 {
3823 int rval;
3824 unsigned long wtime, mtime, cs84xx_time;
3825 uint16_t min_wait; /* Minimum wait time if loop is down */
3826 uint16_t wait_time; /* Wait time if loop is coming ready */
3827 uint16_t state[6];
3828 struct qla_hw_data *ha = vha->hw;
3829
3830 if (IS_QLAFX00(vha->hw))
3831 return qlafx00_fw_ready(vha);
3832
3833 rval = QLA_SUCCESS;
3834
3835 /* Time to wait for loop down */
3836 if (IS_P3P_TYPE(ha))
3837 min_wait = 30;
3838 else
3839 min_wait = 20;
3840
3841 /*
3842 * Firmware should take at most one RATOV to login, plus 5 seconds for
3843 * our own processing.
3844 */
3845 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
3846 wait_time = min_wait;
3847 }
3848
3849 /* Min wait time if loop down */
3850 mtime = jiffies + (min_wait * HZ);
3851
3852 /* wait time before firmware ready */
3853 wtime = jiffies + (wait_time * HZ);
3854
3855 /* Wait for ISP to finish LIP */
3856 if (!vha->flags.init_done)
3857 ql_log(ql_log_info, vha, 0x801e,
3858 "Waiting for LIP to complete.\n");
3859
3860 do {
3861 memset(state, -1, sizeof(state));
3862 rval = qla2x00_get_firmware_state(vha, state);
3863 if (rval == QLA_SUCCESS) {
3864 if (state[0] < FSTATE_LOSS_OF_SYNC) {
3865 vha->device_flags &= ~DFLG_NO_CABLE;
3866 }
3867 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
3868 ql_dbg(ql_dbg_taskm, vha, 0x801f,
3869 "fw_state=%x 84xx=%x.\n", state[0],
3870 state[2]);
3871 if ((state[2] & FSTATE_LOGGED_IN) &&
3872 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
3873 ql_dbg(ql_dbg_taskm, vha, 0x8028,
3874 "Sending verify iocb.\n");
3875
3876 cs84xx_time = jiffies;
3877 rval = qla84xx_init_chip(vha);
3878 if (rval != QLA_SUCCESS) {
3879 ql_log(ql_log_warn,
3880 vha, 0x8007,
3881 "Init chip failed.\n");
3882 break;
3883 }
3884
3885 /* Add time taken to initialize. */
3886 cs84xx_time = jiffies - cs84xx_time;
3887 wtime += cs84xx_time;
3888 mtime += cs84xx_time;
3889 ql_dbg(ql_dbg_taskm, vha, 0x8008,
3890 "Increasing wait time by %ld. "
3891 "New time %ld.\n", cs84xx_time,
3892 wtime);
3893 }
3894 } else if (state[0] == FSTATE_READY) {
3895 ql_dbg(ql_dbg_taskm, vha, 0x8037,
3896 "F/W Ready - OK.\n");
3897
3898 qla2x00_get_retry_cnt(vha, &ha->retry_count,
3899 &ha->login_timeout, &ha->r_a_tov);
3900
3901 rval = QLA_SUCCESS;
3902 break;
3903 }
3904
3905 rval = QLA_FUNCTION_FAILED;
3906
3907 if (atomic_read(&vha->loop_down_timer) &&
3908 state[0] != FSTATE_READY) {
3909 /* Loop down. Timeout on min_wait for states
3910 * other than Wait for Login.
3911 */
3912 if (time_after_eq(jiffies, mtime)) {
3913 ql_log(ql_log_info, vha, 0x8038,
3914 "Cable is unplugged...\n");
3915
3916 vha->device_flags |= DFLG_NO_CABLE;
3917 break;
3918 }
3919 }
3920 } else {
3921 /* Mailbox cmd failed. Timeout on min_wait. */
3922 if (time_after_eq(jiffies, mtime) ||
3923 ha->flags.isp82xx_fw_hung)
3924 break;
3925 }
3926
3927 if (time_after_eq(jiffies, wtime))
3928 break;
3929
3930 /* Delay for a while */
3931 msleep(500);
3932 } while (1);
3933
3934 ql_dbg(ql_dbg_taskm, vha, 0x803a,
3935 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
3936 state[1], state[2], state[3], state[4], state[5], jiffies);
3937
3938 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
3939 ql_log(ql_log_warn, vha, 0x803b,
3940 "Firmware ready **** FAILED ****.\n");
3941 }
3942
3943 return (rval);
3944 }
3945
3946 /*
3947 * qla2x00_configure_hba
3948 * Setup adapter context.
3949 *
3950 * Input:
3951 * ha = adapter state pointer.
3952 *
3953 * Returns:
3954 * 0 = success
3955 *
3956 * Context:
3957 * Kernel context.
3958 */
3959 static int
3960 qla2x00_configure_hba(scsi_qla_host_t *vha)
3961 {
3962 int rval;
3963 uint16_t loop_id;
3964 uint16_t topo;
3965 uint16_t sw_cap;
3966 uint8_t al_pa;
3967 uint8_t area;
3968 uint8_t domain;
3969 char connect_type[22];
3970 struct qla_hw_data *ha = vha->hw;
3971 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
3972 port_id_t id;
3973 unsigned long flags;
3974
3975 /* Get host addresses. */
3976 rval = qla2x00_get_adapter_id(vha,
3977 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
3978 if (rval != QLA_SUCCESS) {
3979 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
3980 IS_CNA_CAPABLE(ha) ||
3981 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
3982 ql_dbg(ql_dbg_disc, vha, 0x2008,
3983 "Loop is in a transition state.\n");
3984 } else {
3985 ql_log(ql_log_warn, vha, 0x2009,
3986 "Unable to get host loop ID.\n");
3987 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
3988 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
3989 ql_log(ql_log_warn, vha, 0x1151,
3990 "Doing link init.\n");
3991 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
3992 return rval;
3993 }
3994 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3995 }
3996 return (rval);
3997 }
3998
3999 if (topo == 4) {
4000 ql_log(ql_log_info, vha, 0x200a,
4001 "Cannot get topology - retrying.\n");
4002 return (QLA_FUNCTION_FAILED);
4003 }
4004
4005 vha->loop_id = loop_id;
4006
4007 /* initialize */
4008 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
4009 ha->operating_mode = LOOP;
4010 ha->switch_cap = 0;
4011
4012 switch (topo) {
4013 case 0:
4014 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
4015 ha->current_topology = ISP_CFG_NL;
4016 strcpy(connect_type, "(Loop)");
4017 break;
4018
4019 case 1:
4020 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
4021 ha->switch_cap = sw_cap;
4022 ha->current_topology = ISP_CFG_FL;
4023 strcpy(connect_type, "(FL_Port)");
4024 break;
4025
4026 case 2:
4027 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
4028 ha->operating_mode = P2P;
4029 ha->current_topology = ISP_CFG_N;
4030 strcpy(connect_type, "(N_Port-to-N_Port)");
4031 break;
4032
4033 case 3:
4034 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
4035 ha->switch_cap = sw_cap;
4036 ha->operating_mode = P2P;
4037 ha->current_topology = ISP_CFG_F;
4038 strcpy(connect_type, "(F_Port)");
4039 break;
4040
4041 default:
4042 ql_dbg(ql_dbg_disc, vha, 0x200f,
4043 "HBA in unknown topology %x, using NL.\n", topo);
4044 ha->current_topology = ISP_CFG_NL;
4045 strcpy(connect_type, "(Loop)");
4046 break;
4047 }
4048
4049 /* Save Host port and loop ID. */
4050 /* byte order - Big Endian */
4051 id.b.domain = domain;
4052 id.b.area = area;
4053 id.b.al_pa = al_pa;
4054 id.b.rsvd_1 = 0;
4055 spin_lock_irqsave(&ha->hardware_lock, flags);
4056 qlt_update_host_map(vha, id);
4057 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4058
4059 if (!vha->flags.init_done)
4060 ql_log(ql_log_info, vha, 0x2010,
4061 "Topology - %s, Host Loop address 0x%x.\n",
4062 connect_type, vha->loop_id);
4063
4064 return(rval);
4065 }
4066
4067 inline void
4068 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
4069 char *def)
4070 {
4071 char *st, *en;
4072 uint16_t index;
4073 struct qla_hw_data *ha = vha->hw;
4074 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
4075 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
4076
4077 if (memcmp(model, BINZERO, len) != 0) {
4078 strncpy(ha->model_number, model, len);
4079 st = en = ha->model_number;
4080 en += len - 1;
4081 while (en > st) {
4082 if (*en != 0x20 && *en != 0x00)
4083 break;
4084 *en-- = '\0';
4085 }
4086
4087 index = (ha->pdev->subsystem_device & 0xff);
4088 if (use_tbl &&
4089 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4090 index < QLA_MODEL_NAMES)
4091 strncpy(ha->model_desc,
4092 qla2x00_model_name[index * 2 + 1],
4093 sizeof(ha->model_desc) - 1);
4094 } else {
4095 index = (ha->pdev->subsystem_device & 0xff);
4096 if (use_tbl &&
4097 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4098 index < QLA_MODEL_NAMES) {
4099 strcpy(ha->model_number,
4100 qla2x00_model_name[index * 2]);
4101 strncpy(ha->model_desc,
4102 qla2x00_model_name[index * 2 + 1],
4103 sizeof(ha->model_desc) - 1);
4104 } else {
4105 strcpy(ha->model_number, def);
4106 }
4107 }
4108 if (IS_FWI2_CAPABLE(ha))
4109 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
4110 sizeof(ha->model_desc));
4111 }
4112
4113 /* On sparc systems, obtain port and node WWN from firmware
4114 * properties.
4115 */
4116 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4117 {
4118 #ifdef CONFIG_SPARC
4119 struct qla_hw_data *ha = vha->hw;
4120 struct pci_dev *pdev = ha->pdev;
4121 struct device_node *dp = pci_device_to_OF_node(pdev);
4122 const u8 *val;
4123 int len;
4124
4125 val = of_get_property(dp, "port-wwn", &len);
4126 if (val && len >= WWN_SIZE)
4127 memcpy(nv->port_name, val, WWN_SIZE);
4128
4129 val = of_get_property(dp, "node-wwn", &len);
4130 if (val && len >= WWN_SIZE)
4131 memcpy(nv->node_name, val, WWN_SIZE);
4132 #endif
4133 }
4134
4135 /*
4136 * NVRAM configuration for ISP 2xxx
4137 *
4138 * Input:
4139 * ha = adapter block pointer.
4140 *
4141 * Output:
4142 * initialization control block in response_ring
4143 * host adapters parameters in host adapter block
4144 *
4145 * Returns:
4146 * 0 = success.
4147 */
4148 int
4149 qla2x00_nvram_config(scsi_qla_host_t *vha)
4150 {
4151 int rval;
4152 uint8_t chksum = 0;
4153 uint16_t cnt;
4154 uint8_t *dptr1, *dptr2;
4155 struct qla_hw_data *ha = vha->hw;
4156 init_cb_t *icb = ha->init_cb;
4157 nvram_t *nv = ha->nvram;
4158 uint8_t *ptr = ha->nvram;
4159 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4160
4161 rval = QLA_SUCCESS;
4162
4163 /* Determine NVRAM starting address. */
4164 ha->nvram_size = sizeof(nvram_t);
4165 ha->nvram_base = 0;
4166 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4167 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
4168 ha->nvram_base = 0x80;
4169
4170 /* Get NVRAM data and calculate checksum. */
4171 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
4172 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
4173 chksum += *ptr++;
4174
4175 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4176 "Contents of NVRAM.\n");
4177 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4178 (uint8_t *)nv, ha->nvram_size);
4179
4180 /* Bad NVRAM data, set defaults parameters. */
4181 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
4182 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
4183 /* Reset NVRAM data. */
4184 ql_log(ql_log_warn, vha, 0x0064,
4185 "Inconsistent NVRAM "
4186 "detected: checksum=0x%x id=%c version=0x%x.\n",
4187 chksum, nv->id[0], nv->nvram_version);
4188 ql_log(ql_log_warn, vha, 0x0065,
4189 "Falling back to "
4190 "functioning (yet invalid -- WWPN) defaults.\n");
4191
4192 /*
4193 * Set default initialization control block.
4194 */
4195 memset(nv, 0, ha->nvram_size);
4196 nv->parameter_block_version = ICB_VERSION;
4197
4198 if (IS_QLA23XX(ha)) {
4199 nv->firmware_options[0] = BIT_2 | BIT_1;
4200 nv->firmware_options[1] = BIT_7 | BIT_5;
4201 nv->add_firmware_options[0] = BIT_5;
4202 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4203 nv->frame_payload_size = 2048;
4204 nv->special_options[1] = BIT_7;
4205 } else if (IS_QLA2200(ha)) {
4206 nv->firmware_options[0] = BIT_2 | BIT_1;
4207 nv->firmware_options[1] = BIT_7 | BIT_5;
4208 nv->add_firmware_options[0] = BIT_5;
4209 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4210 nv->frame_payload_size = 1024;
4211 } else if (IS_QLA2100(ha)) {
4212 nv->firmware_options[0] = BIT_3 | BIT_1;
4213 nv->firmware_options[1] = BIT_5;
4214 nv->frame_payload_size = 1024;
4215 }
4216
4217 nv->max_iocb_allocation = cpu_to_le16(256);
4218 nv->execution_throttle = cpu_to_le16(16);
4219 nv->retry_count = 8;
4220 nv->retry_delay = 1;
4221
4222 nv->port_name[0] = 33;
4223 nv->port_name[3] = 224;
4224 nv->port_name[4] = 139;
4225
4226 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4227
4228 nv->login_timeout = 4;
4229
4230 /*
4231 * Set default host adapter parameters
4232 */
4233 nv->host_p[1] = BIT_2;
4234 nv->reset_delay = 5;
4235 nv->port_down_retry_count = 8;
4236 nv->max_luns_per_target = cpu_to_le16(8);
4237 nv->link_down_timeout = 60;
4238
4239 rval = 1;
4240 }
4241
4242 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
4243 /*
4244 * The SN2 does not provide BIOS emulation which means you can't change
4245 * potentially bogus BIOS settings. Force the use of default settings
4246 * for link rate and frame size. Hope that the rest of the settings
4247 * are valid.
4248 */
4249 if (ia64_platform_is("sn2")) {
4250 nv->frame_payload_size = 2048;
4251 if (IS_QLA23XX(ha))
4252 nv->special_options[1] = BIT_7;
4253 }
4254 #endif
4255
4256 /* Reset Initialization control block */
4257 memset(icb, 0, ha->init_cb_size);
4258
4259 /*
4260 * Setup driver NVRAM options.
4261 */
4262 nv->firmware_options[0] |= (BIT_6 | BIT_1);
4263 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
4264 nv->firmware_options[1] |= (BIT_5 | BIT_0);
4265 nv->firmware_options[1] &= ~BIT_4;
4266
4267 if (IS_QLA23XX(ha)) {
4268 nv->firmware_options[0] |= BIT_2;
4269 nv->firmware_options[0] &= ~BIT_3;
4270 nv->special_options[0] &= ~BIT_6;
4271 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
4272
4273 if (IS_QLA2300(ha)) {
4274 if (ha->fb_rev == FPM_2310) {
4275 strcpy(ha->model_number, "QLA2310");
4276 } else {
4277 strcpy(ha->model_number, "QLA2300");
4278 }
4279 } else {
4280 qla2x00_set_model_info(vha, nv->model_number,
4281 sizeof(nv->model_number), "QLA23xx");
4282 }
4283 } else if (IS_QLA2200(ha)) {
4284 nv->firmware_options[0] |= BIT_2;
4285 /*
4286 * 'Point-to-point preferred, else loop' is not a safe
4287 * connection mode setting.
4288 */
4289 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
4290 (BIT_5 | BIT_4)) {
4291 /* Force 'loop preferred, else point-to-point'. */
4292 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
4293 nv->add_firmware_options[0] |= BIT_5;
4294 }
4295 strcpy(ha->model_number, "QLA22xx");
4296 } else /*if (IS_QLA2100(ha))*/ {
4297 strcpy(ha->model_number, "QLA2100");
4298 }
4299
4300 /*
4301 * Copy over NVRAM RISC parameter block to initialization control block.
4302 */
4303 dptr1 = (uint8_t *)icb;
4304 dptr2 = (uint8_t *)&nv->parameter_block_version;
4305 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
4306 while (cnt--)
4307 *dptr1++ = *dptr2++;
4308
4309 /* Copy 2nd half. */
4310 dptr1 = (uint8_t *)icb->add_firmware_options;
4311 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
4312 while (cnt--)
4313 *dptr1++ = *dptr2++;
4314
4315 /* Use alternate WWN? */
4316 if (nv->host_p[1] & BIT_7) {
4317 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4318 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4319 }
4320
4321 /* Prepare nodename */
4322 if ((icb->firmware_options[1] & BIT_6) == 0) {
4323 /*
4324 * Firmware will apply the following mask if the nodename was
4325 * not provided.
4326 */
4327 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4328 icb->node_name[0] &= 0xF0;
4329 }
4330
4331 /*
4332 * Set host adapter parameters.
4333 */
4334
4335 /*
4336 * BIT_7 in the host-parameters section allows for modification to
4337 * internal driver logging.
4338 */
4339 if (nv->host_p[0] & BIT_7)
4340 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
4341 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
4342 /* Always load RISC code on non ISP2[12]00 chips. */
4343 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
4344 ha->flags.disable_risc_code_load = 0;
4345 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
4346 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
4347 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
4348 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
4349 ha->flags.disable_serdes = 0;
4350
4351 ha->operating_mode =
4352 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
4353
4354 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
4355 sizeof(ha->fw_seriallink_options));
4356
4357 /* save HBA serial number */
4358 ha->serial0 = icb->port_name[5];
4359 ha->serial1 = icb->port_name[6];
4360 ha->serial2 = icb->port_name[7];
4361 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4362 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4363
4364 icb->execution_throttle = cpu_to_le16(0xFFFF);
4365
4366 ha->retry_count = nv->retry_count;
4367
4368 /* Set minimum login_timeout to 4 seconds. */
4369 if (nv->login_timeout != ql2xlogintimeout)
4370 nv->login_timeout = ql2xlogintimeout;
4371 if (nv->login_timeout < 4)
4372 nv->login_timeout = 4;
4373 ha->login_timeout = nv->login_timeout;
4374
4375 /* Set minimum RATOV to 100 tenths of a second. */
4376 ha->r_a_tov = 100;
4377
4378 ha->loop_reset_delay = nv->reset_delay;
4379
4380 /* Link Down Timeout = 0:
4381 *
4382 * When Port Down timer expires we will start returning
4383 * I/O's to OS with "DID_NO_CONNECT".
4384 *
4385 * Link Down Timeout != 0:
4386 *
4387 * The driver waits for the link to come up after link down
4388 * before returning I/Os to OS with "DID_NO_CONNECT".
4389 */
4390 if (nv->link_down_timeout == 0) {
4391 ha->loop_down_abort_time =
4392 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4393 } else {
4394 ha->link_down_timeout = nv->link_down_timeout;
4395 ha->loop_down_abort_time =
4396 (LOOP_DOWN_TIME - ha->link_down_timeout);
4397 }
4398
4399 /*
4400 * Need enough time to try and get the port back.
4401 */
4402 ha->port_down_retry_count = nv->port_down_retry_count;
4403 if (qlport_down_retry)
4404 ha->port_down_retry_count = qlport_down_retry;
4405 /* Set login_retry_count */
4406 ha->login_retry_count = nv->retry_count;
4407 if (ha->port_down_retry_count == nv->port_down_retry_count &&
4408 ha->port_down_retry_count > 3)
4409 ha->login_retry_count = ha->port_down_retry_count;
4410 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4411 ha->login_retry_count = ha->port_down_retry_count;
4412 if (ql2xloginretrycount)
4413 ha->login_retry_count = ql2xloginretrycount;
4414
4415 icb->lun_enables = cpu_to_le16(0);
4416 icb->command_resource_count = 0;
4417 icb->immediate_notify_resource_count = 0;
4418 icb->timeout = cpu_to_le16(0);
4419
4420 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4421 /* Enable RIO */
4422 icb->firmware_options[0] &= ~BIT_3;
4423 icb->add_firmware_options[0] &=
4424 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4425 icb->add_firmware_options[0] |= BIT_2;
4426 icb->response_accumulation_timer = 3;
4427 icb->interrupt_delay_timer = 5;
4428
4429 vha->flags.process_response_queue = 1;
4430 } else {
4431 /* Enable ZIO. */
4432 if (!vha->flags.init_done) {
4433 ha->zio_mode = icb->add_firmware_options[0] &
4434 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4435 ha->zio_timer = icb->interrupt_delay_timer ?
4436 icb->interrupt_delay_timer: 2;
4437 }
4438 icb->add_firmware_options[0] &=
4439 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4440 vha->flags.process_response_queue = 0;
4441 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4442 ha->zio_mode = QLA_ZIO_MODE_6;
4443
4444 ql_log(ql_log_info, vha, 0x0068,
4445 "ZIO mode %d enabled; timer delay (%d us).\n",
4446 ha->zio_mode, ha->zio_timer * 100);
4447
4448 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
4449 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
4450 vha->flags.process_response_queue = 1;
4451 }
4452 }
4453
4454 if (rval) {
4455 ql_log(ql_log_warn, vha, 0x0069,
4456 "NVRAM configuration failed.\n");
4457 }
4458 return (rval);
4459 }
4460
4461 static void
4462 qla2x00_rport_del(void *data)
4463 {
4464 fc_port_t *fcport = data;
4465 struct fc_rport *rport;
4466 unsigned long flags;
4467
4468 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
4469 rport = fcport->drport ? fcport->drport: fcport->rport;
4470 fcport->drport = NULL;
4471 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
4472 if (rport) {
4473 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
4474 "%s %8phN. rport %p roles %x\n",
4475 __func__, fcport->port_name, rport,
4476 rport->roles);
4477
4478 fc_remote_port_delete(rport);
4479 }
4480 }
4481
4482 /**
4483 * qla2x00_alloc_fcport() - Allocate a generic fcport.
4484 * @vha: HA context
4485 * @flags: allocation flags
4486 *
4487 * Returns a pointer to the allocated fcport, or NULL, if none available.
4488 */
4489 fc_port_t *
4490 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
4491 {
4492 fc_port_t *fcport;
4493
4494 fcport = kzalloc(sizeof(fc_port_t), flags);
4495 if (!fcport)
4496 return NULL;
4497
4498 /* Setup fcport template structure. */
4499 fcport->vha = vha;
4500 fcport->port_type = FCT_UNKNOWN;
4501 fcport->loop_id = FC_NO_LOOP_ID;
4502 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
4503 fcport->supported_classes = FC_COS_UNSPECIFIED;
4504
4505 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
4506 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
4507 flags);
4508 fcport->disc_state = DSC_DELETED;
4509 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4510 fcport->deleted = QLA_SESS_DELETED;
4511 fcport->login_retry = vha->hw->login_retry_count;
4512 fcport->login_retry = 5;
4513 fcport->logout_on_delete = 1;
4514
4515 if (!fcport->ct_desc.ct_sns) {
4516 ql_log(ql_log_warn, vha, 0xd049,
4517 "Failed to allocate ct_sns request.\n");
4518 kfree(fcport);
4519 fcport = NULL;
4520 }
4521 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
4522 INIT_LIST_HEAD(&fcport->gnl_entry);
4523 INIT_LIST_HEAD(&fcport->list);
4524
4525 return fcport;
4526 }
4527
4528 void
4529 qla2x00_free_fcport(fc_port_t *fcport)
4530 {
4531 if (fcport->ct_desc.ct_sns) {
4532 dma_free_coherent(&fcport->vha->hw->pdev->dev,
4533 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
4534 fcport->ct_desc.ct_sns_dma);
4535
4536 fcport->ct_desc.ct_sns = NULL;
4537 }
4538 kfree(fcport);
4539 }
4540
4541 /*
4542 * qla2x00_configure_loop
4543 * Updates Fibre Channel Device Database with what is actually on loop.
4544 *
4545 * Input:
4546 * ha = adapter block pointer.
4547 *
4548 * Returns:
4549 * 0 = success.
4550 * 1 = error.
4551 * 2 = database was full and device was not configured.
4552 */
4553 static int
4554 qla2x00_configure_loop(scsi_qla_host_t *vha)
4555 {
4556 int rval;
4557 unsigned long flags, save_flags;
4558 struct qla_hw_data *ha = vha->hw;
4559 rval = QLA_SUCCESS;
4560
4561 /* Get Initiator ID */
4562 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
4563 rval = qla2x00_configure_hba(vha);
4564 if (rval != QLA_SUCCESS) {
4565 ql_dbg(ql_dbg_disc, vha, 0x2013,
4566 "Unable to configure HBA.\n");
4567 return (rval);
4568 }
4569 }
4570
4571 save_flags = flags = vha->dpc_flags;
4572 ql_dbg(ql_dbg_disc, vha, 0x2014,
4573 "Configure loop -- dpc flags = 0x%lx.\n", flags);
4574
4575 /*
4576 * If we have both an RSCN and PORT UPDATE pending then handle them
4577 * both at the same time.
4578 */
4579 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4580 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
4581
4582 qla2x00_get_data_rate(vha);
4583
4584 /* Determine what we need to do */
4585 if (ha->current_topology == ISP_CFG_FL &&
4586 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4587
4588 set_bit(RSCN_UPDATE, &flags);
4589
4590 } else if (ha->current_topology == ISP_CFG_F &&
4591 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4592
4593 set_bit(RSCN_UPDATE, &flags);
4594 clear_bit(LOCAL_LOOP_UPDATE, &flags);
4595
4596 } else if (ha->current_topology == ISP_CFG_N) {
4597 clear_bit(RSCN_UPDATE, &flags);
4598 if (ha->flags.rida_fmt2) {
4599 /* With Rida Format 2, the login is already triggered.
4600 * We know who is on the other side of the wire.
4601 * No need to login to do login to find out or drop into
4602 * qla2x00_configure_local_loop().
4603 */
4604 clear_bit(LOCAL_LOOP_UPDATE, &flags);
4605 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4606 } else {
4607 if (qla_tgt_mode_enabled(vha)) {
4608 /* allow the other side to start the login */
4609 clear_bit(LOCAL_LOOP_UPDATE, &flags);
4610 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4611 }
4612 }
4613 } else if (ha->current_topology == ISP_CFG_NL) {
4614 clear_bit(RSCN_UPDATE, &flags);
4615 set_bit(LOCAL_LOOP_UPDATE, &flags);
4616 } else if (!vha->flags.online ||
4617 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
4618 set_bit(RSCN_UPDATE, &flags);
4619 set_bit(LOCAL_LOOP_UPDATE, &flags);
4620 }
4621
4622 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
4623 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4624 ql_dbg(ql_dbg_disc, vha, 0x2015,
4625 "Loop resync needed, failing.\n");
4626 rval = QLA_FUNCTION_FAILED;
4627 } else
4628 rval = qla2x00_configure_local_loop(vha);
4629 }
4630
4631 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
4632 if (LOOP_TRANSITION(vha)) {
4633 ql_dbg(ql_dbg_disc, vha, 0x2099,
4634 "Needs RSCN update and loop transition.\n");
4635 rval = QLA_FUNCTION_FAILED;
4636 }
4637 else
4638 rval = qla2x00_configure_fabric(vha);
4639 }
4640
4641 if (rval == QLA_SUCCESS) {
4642 if (atomic_read(&vha->loop_down_timer) ||
4643 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4644 rval = QLA_FUNCTION_FAILED;
4645 } else {
4646 atomic_set(&vha->loop_state, LOOP_READY);
4647 ql_dbg(ql_dbg_disc, vha, 0x2069,
4648 "LOOP READY.\n");
4649 ha->flags.fw_init_done = 1;
4650
4651 /*
4652 * Process any ATIO queue entries that came in
4653 * while we weren't online.
4654 */
4655 if (qla_tgt_mode_enabled(vha) ||
4656 qla_dual_mode_enabled(vha)) {
4657 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) {
4658 spin_lock_irqsave(&ha->tgt.atio_lock,
4659 flags);
4660 qlt_24xx_process_atio_queue(vha, 0);
4661 spin_unlock_irqrestore(
4662 &ha->tgt.atio_lock, flags);
4663 } else {
4664 spin_lock_irqsave(&ha->hardware_lock,
4665 flags);
4666 qlt_24xx_process_atio_queue(vha, 1);
4667 spin_unlock_irqrestore(
4668 &ha->hardware_lock, flags);
4669 }
4670 }
4671 }
4672 }
4673
4674 if (rval) {
4675 ql_dbg(ql_dbg_disc, vha, 0x206a,
4676 "%s *** FAILED ***.\n", __func__);
4677 } else {
4678 ql_dbg(ql_dbg_disc, vha, 0x206b,
4679 "%s: exiting normally.\n", __func__);
4680 }
4681
4682 /* Restore state if a resync event occurred during processing */
4683 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4684 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
4685 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4686 if (test_bit(RSCN_UPDATE, &save_flags)) {
4687 set_bit(RSCN_UPDATE, &vha->dpc_flags);
4688 }
4689 }
4690
4691 return (rval);
4692 }
4693
4694 /*
4695 * N2N Login
4696 * Updates Fibre Channel Device Database with local loop devices.
4697 *
4698 * Input:
4699 * ha = adapter block pointer.
4700 *
4701 * Returns:
4702 */
4703 static int qla24xx_n2n_handle_login(struct scsi_qla_host *vha,
4704 fc_port_t *fcport)
4705 {
4706 struct qla_hw_data *ha = vha->hw;
4707 int res = QLA_SUCCESS, rval;
4708 int greater_wwpn = 0;
4709 int logged_in = 0;
4710
4711 if (ha->current_topology != ISP_CFG_N)
4712 return res;
4713
4714 if (wwn_to_u64(vha->port_name) >
4715 wwn_to_u64(vha->n2n_port_name)) {
4716 ql_dbg(ql_dbg_disc, vha, 0x2002,
4717 "HBA WWPN is greater %llx > target %llx\n",
4718 wwn_to_u64(vha->port_name),
4719 wwn_to_u64(vha->n2n_port_name));
4720 greater_wwpn = 1;
4721 fcport->d_id.b24 = vha->n2n_id;
4722 }
4723
4724 fcport->loop_id = vha->loop_id;
4725 fcport->fc4f_nvme = 0;
4726 fcport->query = 1;
4727
4728 ql_dbg(ql_dbg_disc, vha, 0x4001,
4729 "Initiate N2N login handler: HBA port_id=%06x loopid=%d\n",
4730 fcport->d_id.b24, vha->loop_id);
4731
4732 /* Fill in member data. */
4733 if (!greater_wwpn) {
4734 rval = qla2x00_get_port_database(vha, fcport, 0);
4735 ql_dbg(ql_dbg_disc, vha, 0x1051,
4736 "Remote login-state (%x/%x) port_id=%06x loop_id=%x, rval=%d\n",
4737 fcport->current_login_state, fcport->last_login_state,
4738 fcport->d_id.b24, fcport->loop_id, rval);
4739
4740 if (((fcport->current_login_state & 0xf) == 0x4) ||
4741 ((fcport->current_login_state & 0xf) == 0x6))
4742 logged_in = 1;
4743 }
4744
4745 if (logged_in || greater_wwpn) {
4746 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
4747 qla_nvme_register_hba(vha);
4748
4749 /* Set connected N_Port d_id */
4750 if (vha->flags.nvme_enabled)
4751 fcport->fc4f_nvme = 1;
4752
4753 fcport->scan_state = QLA_FCPORT_FOUND;
4754 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4755 fcport->disc_state = DSC_GNL;
4756 fcport->n2n_flag = 1;
4757 fcport->flags = 3;
4758 vha->hw->flags.gpsc_supported = 0;
4759
4760 if (greater_wwpn) {
4761 ql_dbg(ql_dbg_disc, vha, 0x20e5,
4762 "%s %d PLOGI ELS %8phC\n",
4763 __func__, __LINE__, fcport->port_name);
4764
4765 res = qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
4766 fcport, fcport->d_id);
4767 }
4768
4769 if (res != QLA_SUCCESS) {
4770 ql_log(ql_log_info, vha, 0xd04d,
4771 "PLOGI Failed: portid=%06x - retrying\n",
4772 fcport->d_id.b24);
4773 res = QLA_SUCCESS;
4774 } else {
4775 /* State 0x6 means FCP PRLI complete */
4776 if ((fcport->current_login_state & 0xf) == 0x6) {
4777 ql_dbg(ql_dbg_disc, vha, 0x2118,
4778 "%s %d %8phC post GPDB work\n",
4779 __func__, __LINE__, fcport->port_name);
4780 fcport->chip_reset =
4781 vha->hw->base_qpair->chip_reset;
4782 qla24xx_post_gpdb_work(vha, fcport, 0);
4783 } else {
4784 ql_dbg(ql_dbg_disc, vha, 0x2118,
4785 "%s %d %8phC post NVMe PRLI\n",
4786 __func__, __LINE__, fcport->port_name);
4787 qla24xx_post_prli_work(vha, fcport);
4788 }
4789 }
4790 } else {
4791 /* Wait for next database change */
4792 set_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags);
4793 }
4794
4795 return res;
4796 }
4797
4798 /*
4799 * qla2x00_configure_local_loop
4800 * Updates Fibre Channel Device Database with local loop devices.
4801 *
4802 * Input:
4803 * ha = adapter block pointer.
4804 *
4805 * Returns:
4806 * 0 = success.
4807 */
4808 static int
4809 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
4810 {
4811 int rval, rval2;
4812 int found_devs;
4813 int found;
4814 fc_port_t *fcport, *new_fcport;
4815
4816 uint16_t index;
4817 uint16_t entries;
4818 char *id_iter;
4819 uint16_t loop_id;
4820 uint8_t domain, area, al_pa;
4821 struct qla_hw_data *ha = vha->hw;
4822 unsigned long flags;
4823
4824 found_devs = 0;
4825 new_fcport = NULL;
4826 entries = MAX_FIBRE_DEVICES_LOOP;
4827
4828 /* Get list of logged in devices. */
4829 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
4830 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
4831 &entries);
4832 if (rval != QLA_SUCCESS)
4833 goto cleanup_allocation;
4834
4835 ql_dbg(ql_dbg_disc, vha, 0x2011,
4836 "Entries in ID list (%d).\n", entries);
4837 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
4838 (uint8_t *)ha->gid_list,
4839 entries * sizeof(struct gid_list_info));
4840
4841 list_for_each_entry(fcport, &vha->vp_fcports, list) {
4842 fcport->scan_state = QLA_FCPORT_SCAN;
4843 }
4844
4845 /* Allocate temporary fcport for any new fcports discovered. */
4846 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4847 if (new_fcport == NULL) {
4848 ql_log(ql_log_warn, vha, 0x2012,
4849 "Memory allocation failed for fcport.\n");
4850 rval = QLA_MEMORY_ALLOC_FAILED;
4851 goto cleanup_allocation;
4852 }
4853 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
4854
4855 /* Inititae N2N login. */
4856 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) {
4857 rval = qla24xx_n2n_handle_login(vha, new_fcport);
4858 if (rval != QLA_SUCCESS)
4859 goto cleanup_allocation;
4860 return QLA_SUCCESS;
4861 }
4862
4863 /* Add devices to port list. */
4864 id_iter = (char *)ha->gid_list;
4865 for (index = 0; index < entries; index++) {
4866 domain = ((struct gid_list_info *)id_iter)->domain;
4867 area = ((struct gid_list_info *)id_iter)->area;
4868 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
4869 if (IS_QLA2100(ha) || IS_QLA2200(ha))
4870 loop_id = (uint16_t)
4871 ((struct gid_list_info *)id_iter)->loop_id_2100;
4872 else
4873 loop_id = le16_to_cpu(
4874 ((struct gid_list_info *)id_iter)->loop_id);
4875 id_iter += ha->gid_list_info_size;
4876
4877 /* Bypass reserved domain fields. */
4878 if ((domain & 0xf0) == 0xf0)
4879 continue;
4880
4881 /* Bypass if not same domain and area of adapter. */
4882 if (area && domain &&
4883 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
4884 continue;
4885
4886 /* Bypass invalid local loop ID. */
4887 if (loop_id > LAST_LOCAL_LOOP_ID)
4888 continue;
4889
4890 memset(new_fcport->port_name, 0, WWN_SIZE);
4891
4892 /* Fill in member data. */
4893 new_fcport->d_id.b.domain = domain;
4894 new_fcport->d_id.b.area = area;
4895 new_fcport->d_id.b.al_pa = al_pa;
4896 new_fcport->loop_id = loop_id;
4897 new_fcport->scan_state = QLA_FCPORT_FOUND;
4898
4899 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
4900 if (rval2 != QLA_SUCCESS) {
4901 ql_dbg(ql_dbg_disc, vha, 0x2097,
4902 "Failed to retrieve fcport information "
4903 "-- get_port_database=%x, loop_id=0x%04x.\n",
4904 rval2, new_fcport->loop_id);
4905 /* Skip retry if N2N */
4906 if (ha->current_topology != ISP_CFG_N) {
4907 ql_dbg(ql_dbg_disc, vha, 0x2105,
4908 "Scheduling resync.\n");
4909 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4910 continue;
4911 }
4912 }
4913
4914 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4915 /* Check for matching device in port list. */
4916 found = 0;
4917 fcport = NULL;
4918 list_for_each_entry(fcport, &vha->vp_fcports, list) {
4919 if (memcmp(new_fcport->port_name, fcport->port_name,
4920 WWN_SIZE))
4921 continue;
4922
4923 fcport->flags &= ~FCF_FABRIC_DEVICE;
4924 fcport->loop_id = new_fcport->loop_id;
4925 fcport->port_type = new_fcport->port_type;
4926 fcport->d_id.b24 = new_fcport->d_id.b24;
4927 memcpy(fcport->node_name, new_fcport->node_name,
4928 WWN_SIZE);
4929 fcport->scan_state = QLA_FCPORT_FOUND;
4930 found++;
4931 break;
4932 }
4933
4934 if (!found) {
4935 /* New device, add to fcports list. */
4936 list_add_tail(&new_fcport->list, &vha->vp_fcports);
4937
4938 /* Allocate a new replacement fcport. */
4939 fcport = new_fcport;
4940
4941 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4942
4943 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4944
4945 if (new_fcport == NULL) {
4946 ql_log(ql_log_warn, vha, 0xd031,
4947 "Failed to allocate memory for fcport.\n");
4948 rval = QLA_MEMORY_ALLOC_FAILED;
4949 goto cleanup_allocation;
4950 }
4951 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4952 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
4953 }
4954
4955 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4956
4957 /* Base iIDMA settings on HBA port speed. */
4958 fcport->fp_speed = ha->link_data_rate;
4959
4960 found_devs++;
4961 }
4962
4963 list_for_each_entry(fcport, &vha->vp_fcports, list) {
4964 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4965 break;
4966
4967 if (fcport->scan_state == QLA_FCPORT_SCAN) {
4968 if ((qla_dual_mode_enabled(vha) ||
4969 qla_ini_mode_enabled(vha)) &&
4970 atomic_read(&fcport->state) == FCS_ONLINE) {
4971 qla2x00_mark_device_lost(vha, fcport,
4972 ql2xplogiabsentdevice, 0);
4973 if (fcport->loop_id != FC_NO_LOOP_ID &&
4974 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
4975 fcport->port_type != FCT_INITIATOR &&
4976 fcport->port_type != FCT_BROADCAST) {
4977 ql_dbg(ql_dbg_disc, vha, 0x20f0,
4978 "%s %d %8phC post del sess\n",
4979 __func__, __LINE__,
4980 fcport->port_name);
4981
4982 qlt_schedule_sess_for_deletion(fcport);
4983 continue;
4984 }
4985 }
4986 }
4987
4988 if (fcport->scan_state == QLA_FCPORT_FOUND)
4989 qla24xx_fcport_handle_login(vha, fcport);
4990 }
4991
4992 cleanup_allocation:
4993 kfree(new_fcport);
4994
4995 if (rval != QLA_SUCCESS) {
4996 ql_dbg(ql_dbg_disc, vha, 0x2098,
4997 "Configure local loop error exit: rval=%x.\n", rval);
4998 }
4999
5000 return (rval);
5001 }
5002
5003 static void
5004 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5005 {
5006 int rval;
5007 uint16_t mb[MAILBOX_REGISTER_COUNT];
5008 struct qla_hw_data *ha = vha->hw;
5009
5010 if (!IS_IIDMA_CAPABLE(ha))
5011 return;
5012
5013 if (atomic_read(&fcport->state) != FCS_ONLINE)
5014 return;
5015
5016 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
5017 fcport->fp_speed > ha->link_data_rate)
5018 return;
5019
5020 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
5021 mb);
5022 if (rval != QLA_SUCCESS) {
5023 ql_dbg(ql_dbg_disc, vha, 0x2004,
5024 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
5025 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
5026 } else {
5027 ql_dbg(ql_dbg_disc, vha, 0x2005,
5028 "iIDMA adjusted to %s GB/s on %8phN.\n",
5029 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
5030 fcport->port_name);
5031 }
5032 }
5033
5034 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
5035 static void
5036 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
5037 {
5038 struct fc_rport_identifiers rport_ids;
5039 struct fc_rport *rport;
5040 unsigned long flags;
5041
5042 rport_ids.node_name = wwn_to_u64(fcport->node_name);
5043 rport_ids.port_name = wwn_to_u64(fcport->port_name);
5044 rport_ids.port_id = fcport->d_id.b.domain << 16 |
5045 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
5046 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5047 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
5048 if (!rport) {
5049 ql_log(ql_log_warn, vha, 0x2006,
5050 "Unable to allocate fc remote port.\n");
5051 return;
5052 }
5053
5054 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5055 *((fc_port_t **)rport->dd_data) = fcport;
5056 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5057
5058 rport->supported_classes = fcport->supported_classes;
5059
5060 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5061 if (fcport->port_type == FCT_INITIATOR)
5062 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
5063 if (fcport->port_type == FCT_TARGET)
5064 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
5065
5066 ql_dbg(ql_dbg_disc, vha, 0x20ee,
5067 "%s %8phN. rport %p is %s mode\n",
5068 __func__, fcport->port_name, rport,
5069 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini");
5070
5071 fc_remote_port_rolechg(rport, rport_ids.roles);
5072 }
5073
5074 /*
5075 * qla2x00_update_fcport
5076 * Updates device on list.
5077 *
5078 * Input:
5079 * ha = adapter block pointer.
5080 * fcport = port structure pointer.
5081 *
5082 * Return:
5083 * 0 - Success
5084 * BIT_0 - error
5085 *
5086 * Context:
5087 * Kernel context.
5088 */
5089 void
5090 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5091 {
5092 fcport->vha = vha;
5093
5094 if (IS_SW_RESV_ADDR(fcport->d_id))
5095 return;
5096
5097 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5098 __func__, fcport->port_name);
5099
5100 if (IS_QLAFX00(vha->hw)) {
5101 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5102 goto reg_port;
5103 }
5104 fcport->login_retry = 0;
5105 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
5106 fcport->disc_state = DSC_LOGIN_COMPLETE;
5107 fcport->deleted = 0;
5108 fcport->logout_on_delete = 1;
5109
5110 if (fcport->fc4f_nvme) {
5111 qla_nvme_register_remote(vha, fcport);
5112 return;
5113 }
5114
5115 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5116 qla2x00_iidma_fcport(vha, fcport);
5117 qla24xx_update_fcport_fcp_prio(vha, fcport);
5118
5119 reg_port:
5120 switch (vha->host->active_mode) {
5121 case MODE_INITIATOR:
5122 qla2x00_reg_remote_port(vha, fcport);
5123 break;
5124 case MODE_TARGET:
5125 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5126 !vha->vha_tgt.qla_tgt->tgt_stopped)
5127 qlt_fc_port_added(vha, fcport);
5128 break;
5129 case MODE_DUAL:
5130 qla2x00_reg_remote_port(vha, fcport);
5131 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5132 !vha->vha_tgt.qla_tgt->tgt_stopped)
5133 qlt_fc_port_added(vha, fcport);
5134 break;
5135 default:
5136 break;
5137 }
5138 }
5139
5140 /*
5141 * qla2x00_configure_fabric
5142 * Setup SNS devices with loop ID's.
5143 *
5144 * Input:
5145 * ha = adapter block pointer.
5146 *
5147 * Returns:
5148 * 0 = success.
5149 * BIT_0 = error
5150 */
5151 static int
5152 qla2x00_configure_fabric(scsi_qla_host_t *vha)
5153 {
5154 int rval;
5155 fc_port_t *fcport;
5156 uint16_t mb[MAILBOX_REGISTER_COUNT];
5157 uint16_t loop_id;
5158 LIST_HEAD(new_fcports);
5159 struct qla_hw_data *ha = vha->hw;
5160 int discovery_gen;
5161
5162 /* If FL port exists, then SNS is present */
5163 if (IS_FWI2_CAPABLE(ha))
5164 loop_id = NPH_F_PORT;
5165 else
5166 loop_id = SNS_FL_PORT;
5167 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
5168 if (rval != QLA_SUCCESS) {
5169 ql_dbg(ql_dbg_disc, vha, 0x20a0,
5170 "MBX_GET_PORT_NAME failed, No FL Port.\n");
5171
5172 vha->device_flags &= ~SWITCH_FOUND;
5173 return (QLA_SUCCESS);
5174 }
5175 vha->device_flags |= SWITCH_FOUND;
5176
5177
5178 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
5179 rval = qla2x00_send_change_request(vha, 0x3, 0);
5180 if (rval != QLA_SUCCESS)
5181 ql_log(ql_log_warn, vha, 0x121,
5182 "Failed to enable receiving of RSCN requests: 0x%x.\n",
5183 rval);
5184 }
5185
5186
5187 do {
5188 qla2x00_mgmt_svr_login(vha);
5189
5190 /* FDMI support. */
5191 if (ql2xfdmienable &&
5192 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
5193 qla2x00_fdmi_register(vha);
5194
5195 /* Ensure we are logged into the SNS. */
5196 loop_id = NPH_SNS_LID(ha);
5197 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
5198 0xfc, mb, BIT_1|BIT_0);
5199 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5200 ql_dbg(ql_dbg_disc, vha, 0x20a1,
5201 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
5202 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
5203 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5204 return rval;
5205 }
5206 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
5207 if (qla2x00_rft_id(vha)) {
5208 /* EMPTY */
5209 ql_dbg(ql_dbg_disc, vha, 0x20a2,
5210 "Register FC-4 TYPE failed.\n");
5211 if (test_bit(LOOP_RESYNC_NEEDED,
5212 &vha->dpc_flags))
5213 break;
5214 }
5215 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
5216 /* EMPTY */
5217 ql_dbg(ql_dbg_disc, vha, 0x209a,
5218 "Register FC-4 Features failed.\n");
5219 if (test_bit(LOOP_RESYNC_NEEDED,
5220 &vha->dpc_flags))
5221 break;
5222 }
5223 if (vha->flags.nvme_enabled) {
5224 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
5225 ql_dbg(ql_dbg_disc, vha, 0x2049,
5226 "Register NVME FC Type Features failed.\n");
5227 }
5228 }
5229 if (qla2x00_rnn_id(vha)) {
5230 /* EMPTY */
5231 ql_dbg(ql_dbg_disc, vha, 0x2104,
5232 "Register Node Name failed.\n");
5233 if (test_bit(LOOP_RESYNC_NEEDED,
5234 &vha->dpc_flags))
5235 break;
5236 } else if (qla2x00_rsnn_nn(vha)) {
5237 /* EMPTY */
5238 ql_dbg(ql_dbg_disc, vha, 0x209b,
5239 "Register Symbolic Node Name failed.\n");
5240 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5241 break;
5242 }
5243 }
5244
5245
5246 /* Mark the time right before querying FW for connected ports.
5247 * This process is long, asynchronous and by the time it's done,
5248 * collected information might not be accurate anymore. E.g.
5249 * disconnected port might have re-connected and a brand new
5250 * session has been created. In this case session's generation
5251 * will be newer than discovery_gen. */
5252 qlt_do_generation_tick(vha, &discovery_gen);
5253
5254 if (USE_ASYNC_SCAN(ha)) {
5255 rval = QLA_SUCCESS;
5256 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI);
5257 if (rval)
5258 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5259 } else {
5260 list_for_each_entry(fcport, &vha->vp_fcports, list)
5261 fcport->scan_state = QLA_FCPORT_SCAN;
5262
5263 rval = qla2x00_find_all_fabric_devs(vha);
5264 }
5265 if (rval != QLA_SUCCESS)
5266 break;
5267 } while (0);
5268
5269 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
5270 qla_nvme_register_hba(vha);
5271
5272 if (rval)
5273 ql_dbg(ql_dbg_disc, vha, 0x2068,
5274 "Configure fabric error exit rval=%d.\n", rval);
5275
5276 return (rval);
5277 }
5278
5279 /*
5280 * qla2x00_find_all_fabric_devs
5281 *
5282 * Input:
5283 * ha = adapter block pointer.
5284 * dev = database device entry pointer.
5285 *
5286 * Returns:
5287 * 0 = success.
5288 *
5289 * Context:
5290 * Kernel context.
5291 */
5292 static int
5293 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
5294 {
5295 int rval;
5296 uint16_t loop_id;
5297 fc_port_t *fcport, *new_fcport;
5298 int found;
5299
5300 sw_info_t *swl;
5301 int swl_idx;
5302 int first_dev, last_dev;
5303 port_id_t wrap = {}, nxt_d_id;
5304 struct qla_hw_data *ha = vha->hw;
5305 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5306 unsigned long flags;
5307
5308 rval = QLA_SUCCESS;
5309
5310 /* Try GID_PT to get device list, else GAN. */
5311 if (!ha->swl)
5312 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
5313 GFP_KERNEL);
5314 swl = ha->swl;
5315 if (!swl) {
5316 /*EMPTY*/
5317 ql_dbg(ql_dbg_disc, vha, 0x209c,
5318 "GID_PT allocations failed, fallback on GA_NXT.\n");
5319 } else {
5320 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
5321 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
5322 swl = NULL;
5323 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5324 return rval;
5325 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
5326 swl = NULL;
5327 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5328 return rval;
5329 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
5330 swl = NULL;
5331 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5332 return rval;
5333 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
5334 swl = NULL;
5335 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5336 return rval;
5337 }
5338
5339 /* If other queries succeeded probe for FC-4 type */
5340 if (swl) {
5341 qla2x00_gff_id(vha, swl);
5342 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5343 return rval;
5344 }
5345 }
5346 swl_idx = 0;
5347
5348 /* Allocate temporary fcport for any new fcports discovered. */
5349 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5350 if (new_fcport == NULL) {
5351 ql_log(ql_log_warn, vha, 0x209d,
5352 "Failed to allocate memory for fcport.\n");
5353 return (QLA_MEMORY_ALLOC_FAILED);
5354 }
5355 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5356 /* Set start port ID scan at adapter ID. */
5357 first_dev = 1;
5358 last_dev = 0;
5359
5360 /* Starting free loop ID. */
5361 loop_id = ha->min_external_loopid;
5362 for (; loop_id <= ha->max_loop_id; loop_id++) {
5363 if (qla2x00_is_reserved_id(vha, loop_id))
5364 continue;
5365
5366 if (ha->current_topology == ISP_CFG_FL &&
5367 (atomic_read(&vha->loop_down_timer) ||
5368 LOOP_TRANSITION(vha))) {
5369 atomic_set(&vha->loop_down_timer, 0);
5370 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5371 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5372 break;
5373 }
5374
5375 if (swl != NULL) {
5376 if (last_dev) {
5377 wrap.b24 = new_fcport->d_id.b24;
5378 } else {
5379 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
5380 memcpy(new_fcport->node_name,
5381 swl[swl_idx].node_name, WWN_SIZE);
5382 memcpy(new_fcport->port_name,
5383 swl[swl_idx].port_name, WWN_SIZE);
5384 memcpy(new_fcport->fabric_port_name,
5385 swl[swl_idx].fabric_port_name, WWN_SIZE);
5386 new_fcport->fp_speed = swl[swl_idx].fp_speed;
5387 new_fcport->fc4_type = swl[swl_idx].fc4_type;
5388
5389 new_fcport->nvme_flag = 0;
5390 new_fcport->fc4f_nvme = 0;
5391 if (vha->flags.nvme_enabled &&
5392 swl[swl_idx].fc4f_nvme) {
5393 new_fcport->fc4f_nvme =
5394 swl[swl_idx].fc4f_nvme;
5395 ql_log(ql_log_info, vha, 0x2131,
5396 "FOUND: NVME port %8phC as FC Type 28h\n",
5397 new_fcport->port_name);
5398 }
5399
5400 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
5401 last_dev = 1;
5402 }
5403 swl_idx++;
5404 }
5405 } else {
5406 /* Send GA_NXT to the switch */
5407 rval = qla2x00_ga_nxt(vha, new_fcport);
5408 if (rval != QLA_SUCCESS) {
5409 ql_log(ql_log_warn, vha, 0x209e,
5410 "SNS scan failed -- assuming "
5411 "zero-entry result.\n");
5412 rval = QLA_SUCCESS;
5413 break;
5414 }
5415 }
5416
5417 /* If wrap on switch device list, exit. */
5418 if (first_dev) {
5419 wrap.b24 = new_fcport->d_id.b24;
5420 first_dev = 0;
5421 } else if (new_fcport->d_id.b24 == wrap.b24) {
5422 ql_dbg(ql_dbg_disc, vha, 0x209f,
5423 "Device wrap (%02x%02x%02x).\n",
5424 new_fcport->d_id.b.domain,
5425 new_fcport->d_id.b.area,
5426 new_fcport->d_id.b.al_pa);
5427 break;
5428 }
5429
5430 /* Bypass if same physical adapter. */
5431 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
5432 continue;
5433
5434 /* Bypass virtual ports of the same host. */
5435 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
5436 continue;
5437
5438 /* Bypass if same domain and area of adapter. */
5439 if (((new_fcport->d_id.b24 & 0xffff00) ==
5440 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
5441 ISP_CFG_FL)
5442 continue;
5443
5444 /* Bypass reserved domain fields. */
5445 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
5446 continue;
5447
5448 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
5449 if (ql2xgffidenable &&
5450 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
5451 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
5452 continue;
5453
5454 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5455
5456 /* Locate matching device in database. */
5457 found = 0;
5458 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5459 if (memcmp(new_fcport->port_name, fcport->port_name,
5460 WWN_SIZE))
5461 continue;
5462
5463 fcport->scan_state = QLA_FCPORT_FOUND;
5464
5465 found++;
5466
5467 /* Update port state. */
5468 memcpy(fcport->fabric_port_name,
5469 new_fcport->fabric_port_name, WWN_SIZE);
5470 fcport->fp_speed = new_fcport->fp_speed;
5471
5472 /*
5473 * If address the same and state FCS_ONLINE
5474 * (or in target mode), nothing changed.
5475 */
5476 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
5477 (atomic_read(&fcport->state) == FCS_ONLINE ||
5478 (vha->host->active_mode == MODE_TARGET))) {
5479 break;
5480 }
5481
5482 /*
5483 * If device was not a fabric device before.
5484 */
5485 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
5486 fcport->d_id.b24 = new_fcport->d_id.b24;
5487 qla2x00_clear_loop_id(fcport);
5488 fcport->flags |= (FCF_FABRIC_DEVICE |
5489 FCF_LOGIN_NEEDED);
5490 break;
5491 }
5492
5493 /*
5494 * Port ID changed or device was marked to be updated;
5495 * Log it out if still logged in and mark it for
5496 * relogin later.
5497 */
5498 if (qla_tgt_mode_enabled(base_vha)) {
5499 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
5500 "port changed FC ID, %8phC"
5501 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
5502 fcport->port_name,
5503 fcport->d_id.b.domain,
5504 fcport->d_id.b.area,
5505 fcport->d_id.b.al_pa,
5506 fcport->loop_id,
5507 new_fcport->d_id.b.domain,
5508 new_fcport->d_id.b.area,
5509 new_fcport->d_id.b.al_pa);
5510 fcport->d_id.b24 = new_fcport->d_id.b24;
5511 break;
5512 }
5513
5514 fcport->d_id.b24 = new_fcport->d_id.b24;
5515 fcport->flags |= FCF_LOGIN_NEEDED;
5516 break;
5517 }
5518
5519 if (found) {
5520 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5521 continue;
5522 }
5523 /* If device was not in our fcports list, then add it. */
5524 new_fcport->scan_state = QLA_FCPORT_FOUND;
5525 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5526
5527 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5528
5529
5530 /* Allocate a new replacement fcport. */
5531 nxt_d_id.b24 = new_fcport->d_id.b24;
5532 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5533 if (new_fcport == NULL) {
5534 ql_log(ql_log_warn, vha, 0xd032,
5535 "Memory allocation failed for fcport.\n");
5536 return (QLA_MEMORY_ALLOC_FAILED);
5537 }
5538 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5539 new_fcport->d_id.b24 = nxt_d_id.b24;
5540 }
5541
5542 qla2x00_free_fcport(new_fcport);
5543
5544 /*
5545 * Logout all previous fabric dev marked lost, except FCP2 devices.
5546 */
5547 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5548 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5549 break;
5550
5551 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
5552 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
5553 continue;
5554
5555 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5556 if ((qla_dual_mode_enabled(vha) ||
5557 qla_ini_mode_enabled(vha)) &&
5558 atomic_read(&fcport->state) == FCS_ONLINE) {
5559 qla2x00_mark_device_lost(vha, fcport,
5560 ql2xplogiabsentdevice, 0);
5561 if (fcport->loop_id != FC_NO_LOOP_ID &&
5562 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5563 fcport->port_type != FCT_INITIATOR &&
5564 fcport->port_type != FCT_BROADCAST) {
5565 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5566 "%s %d %8phC post del sess\n",
5567 __func__, __LINE__,
5568 fcport->port_name);
5569 qlt_schedule_sess_for_deletion(fcport);
5570 continue;
5571 }
5572 }
5573 }
5574
5575 if (fcport->scan_state == QLA_FCPORT_FOUND)
5576 qla24xx_fcport_handle_login(vha, fcport);
5577 }
5578 return (rval);
5579 }
5580
5581 /*
5582 * qla2x00_find_new_loop_id
5583 * Scan through our port list and find a new usable loop ID.
5584 *
5585 * Input:
5586 * ha: adapter state pointer.
5587 * dev: port structure pointer.
5588 *
5589 * Returns:
5590 * qla2x00 local function return status code.
5591 *
5592 * Context:
5593 * Kernel context.
5594 */
5595 int
5596 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
5597 {
5598 int rval;
5599 struct qla_hw_data *ha = vha->hw;
5600 unsigned long flags = 0;
5601
5602 rval = QLA_SUCCESS;
5603
5604 spin_lock_irqsave(&ha->vport_slock, flags);
5605
5606 dev->loop_id = find_first_zero_bit(ha->loop_id_map,
5607 LOOPID_MAP_SIZE);
5608 if (dev->loop_id >= LOOPID_MAP_SIZE ||
5609 qla2x00_is_reserved_id(vha, dev->loop_id)) {
5610 dev->loop_id = FC_NO_LOOP_ID;
5611 rval = QLA_FUNCTION_FAILED;
5612 } else
5613 set_bit(dev->loop_id, ha->loop_id_map);
5614
5615 spin_unlock_irqrestore(&ha->vport_slock, flags);
5616
5617 if (rval == QLA_SUCCESS)
5618 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
5619 "Assigning new loopid=%x, portid=%x.\n",
5620 dev->loop_id, dev->d_id.b24);
5621 else
5622 ql_log(ql_log_warn, dev->vha, 0x2087,
5623 "No loop_id's available, portid=%x.\n",
5624 dev->d_id.b24);
5625
5626 return (rval);
5627 }
5628
5629
5630 /*
5631 * qla2x00_fabric_login
5632 * Issue fabric login command.
5633 *
5634 * Input:
5635 * ha = adapter block pointer.
5636 * device = pointer to FC device type structure.
5637 *
5638 * Returns:
5639 * 0 - Login successfully
5640 * 1 - Login failed
5641 * 2 - Initiator device
5642 * 3 - Fatal error
5643 */
5644 int
5645 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
5646 uint16_t *next_loopid)
5647 {
5648 int rval;
5649 int retry;
5650 uint16_t tmp_loopid;
5651 uint16_t mb[MAILBOX_REGISTER_COUNT];
5652 struct qla_hw_data *ha = vha->hw;
5653
5654 retry = 0;
5655 tmp_loopid = 0;
5656
5657 for (;;) {
5658 ql_dbg(ql_dbg_disc, vha, 0x2000,
5659 "Trying Fabric Login w/loop id 0x%04x for port "
5660 "%02x%02x%02x.\n",
5661 fcport->loop_id, fcport->d_id.b.domain,
5662 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5663
5664 /* Login fcport on switch. */
5665 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
5666 fcport->d_id.b.domain, fcport->d_id.b.area,
5667 fcport->d_id.b.al_pa, mb, BIT_0);
5668 if (rval != QLA_SUCCESS) {
5669 return rval;
5670 }
5671 if (mb[0] == MBS_PORT_ID_USED) {
5672 /*
5673 * Device has another loop ID. The firmware team
5674 * recommends the driver perform an implicit login with
5675 * the specified ID again. The ID we just used is save
5676 * here so we return with an ID that can be tried by
5677 * the next login.
5678 */
5679 retry++;
5680 tmp_loopid = fcport->loop_id;
5681 fcport->loop_id = mb[1];
5682
5683 ql_dbg(ql_dbg_disc, vha, 0x2001,
5684 "Fabric Login: port in use - next loop "
5685 "id=0x%04x, port id= %02x%02x%02x.\n",
5686 fcport->loop_id, fcport->d_id.b.domain,
5687 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5688
5689 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
5690 /*
5691 * Login succeeded.
5692 */
5693 if (retry) {
5694 /* A retry occurred before. */
5695 *next_loopid = tmp_loopid;
5696 } else {
5697 /*
5698 * No retry occurred before. Just increment the
5699 * ID value for next login.
5700 */
5701 *next_loopid = (fcport->loop_id + 1);
5702 }
5703
5704 if (mb[1] & BIT_0) {
5705 fcport->port_type = FCT_INITIATOR;
5706 } else {
5707 fcport->port_type = FCT_TARGET;
5708 if (mb[1] & BIT_1) {
5709 fcport->flags |= FCF_FCP2_DEVICE;
5710 }
5711 }
5712
5713 if (mb[10] & BIT_0)
5714 fcport->supported_classes |= FC_COS_CLASS2;
5715 if (mb[10] & BIT_1)
5716 fcport->supported_classes |= FC_COS_CLASS3;
5717
5718 if (IS_FWI2_CAPABLE(ha)) {
5719 if (mb[10] & BIT_7)
5720 fcport->flags |=
5721 FCF_CONF_COMP_SUPPORTED;
5722 }
5723
5724 rval = QLA_SUCCESS;
5725 break;
5726 } else if (mb[0] == MBS_LOOP_ID_USED) {
5727 /*
5728 * Loop ID already used, try next loop ID.
5729 */
5730 fcport->loop_id++;
5731 rval = qla2x00_find_new_loop_id(vha, fcport);
5732 if (rval != QLA_SUCCESS) {
5733 /* Ran out of loop IDs to use */
5734 break;
5735 }
5736 } else if (mb[0] == MBS_COMMAND_ERROR) {
5737 /*
5738 * Firmware possibly timed out during login. If NO
5739 * retries are left to do then the device is declared
5740 * dead.
5741 */
5742 *next_loopid = fcport->loop_id;
5743 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
5744 fcport->d_id.b.domain, fcport->d_id.b.area,
5745 fcport->d_id.b.al_pa);
5746 qla2x00_mark_device_lost(vha, fcport, 1, 0);
5747
5748 rval = 1;
5749 break;
5750 } else {
5751 /*
5752 * unrecoverable / not handled error
5753 */
5754 ql_dbg(ql_dbg_disc, vha, 0x2002,
5755 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
5756 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
5757 fcport->d_id.b.area, fcport->d_id.b.al_pa,
5758 fcport->loop_id, jiffies);
5759
5760 *next_loopid = fcport->loop_id;
5761 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
5762 fcport->d_id.b.domain, fcport->d_id.b.area,
5763 fcport->d_id.b.al_pa);
5764 qla2x00_clear_loop_id(fcport);
5765 fcport->login_retry = 0;
5766
5767 rval = 3;
5768 break;
5769 }
5770 }
5771
5772 return (rval);
5773 }
5774
5775 /*
5776 * qla2x00_local_device_login
5777 * Issue local device login command.
5778 *
5779 * Input:
5780 * ha = adapter block pointer.
5781 * loop_id = loop id of device to login to.
5782 *
5783 * Returns (Where's the #define!!!!):
5784 * 0 - Login successfully
5785 * 1 - Login failed
5786 * 3 - Fatal error
5787 */
5788 int
5789 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
5790 {
5791 int rval;
5792 uint16_t mb[MAILBOX_REGISTER_COUNT];
5793
5794 memset(mb, 0, sizeof(mb));
5795 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
5796 if (rval == QLA_SUCCESS) {
5797 /* Interrogate mailbox registers for any errors */
5798 if (mb[0] == MBS_COMMAND_ERROR)
5799 rval = 1;
5800 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
5801 /* device not in PCB table */
5802 rval = 3;
5803 }
5804
5805 return (rval);
5806 }
5807
5808 /*
5809 * qla2x00_loop_resync
5810 * Resync with fibre channel devices.
5811 *
5812 * Input:
5813 * ha = adapter block pointer.
5814 *
5815 * Returns:
5816 * 0 = success
5817 */
5818 int
5819 qla2x00_loop_resync(scsi_qla_host_t *vha)
5820 {
5821 int rval = QLA_SUCCESS;
5822 uint32_t wait_time;
5823 struct req_que *req;
5824 struct rsp_que *rsp;
5825
5826 req = vha->req;
5827 rsp = req->rsp;
5828
5829 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
5830 if (vha->flags.online) {
5831 if (!(rval = qla2x00_fw_ready(vha))) {
5832 /* Wait at most MAX_TARGET RSCNs for a stable link. */
5833 wait_time = 256;
5834 do {
5835 if (!IS_QLAFX00(vha->hw)) {
5836 /*
5837 * Issue a marker after FW becomes
5838 * ready.
5839 */
5840 qla2x00_marker(vha, req, rsp, 0, 0,
5841 MK_SYNC_ALL);
5842 vha->marker_needed = 0;
5843 }
5844
5845 /* Remap devices on Loop. */
5846 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5847
5848 if (IS_QLAFX00(vha->hw))
5849 qlafx00_configure_devices(vha);
5850 else
5851 qla2x00_configure_loop(vha);
5852
5853 wait_time--;
5854 } while (!atomic_read(&vha->loop_down_timer) &&
5855 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
5856 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
5857 &vha->dpc_flags)));
5858 }
5859 }
5860
5861 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
5862 return (QLA_FUNCTION_FAILED);
5863
5864 if (rval)
5865 ql_dbg(ql_dbg_disc, vha, 0x206c,
5866 "%s *** FAILED ***.\n", __func__);
5867
5868 return (rval);
5869 }
5870
5871 /*
5872 * qla2x00_perform_loop_resync
5873 * Description: This function will set the appropriate flags and call
5874 * qla2x00_loop_resync. If successful loop will be resynced
5875 * Arguments : scsi_qla_host_t pointer
5876 * returm : Success or Failure
5877 */
5878
5879 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
5880 {
5881 int32_t rval = 0;
5882
5883 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
5884 /*Configure the flags so that resync happens properly*/
5885 atomic_set(&ha->loop_down_timer, 0);
5886 if (!(ha->device_flags & DFLG_NO_CABLE)) {
5887 atomic_set(&ha->loop_state, LOOP_UP);
5888 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
5889 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
5890 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
5891
5892 rval = qla2x00_loop_resync(ha);
5893 } else
5894 atomic_set(&ha->loop_state, LOOP_DEAD);
5895
5896 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
5897 }
5898
5899 return rval;
5900 }
5901
5902 void
5903 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
5904 {
5905 fc_port_t *fcport;
5906 struct scsi_qla_host *vha;
5907 struct qla_hw_data *ha = base_vha->hw;
5908 unsigned long flags;
5909
5910 spin_lock_irqsave(&ha->vport_slock, flags);
5911 /* Go with deferred removal of rport references. */
5912 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
5913 atomic_inc(&vha->vref_count);
5914 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5915 if (fcport->drport &&
5916 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
5917 spin_unlock_irqrestore(&ha->vport_slock, flags);
5918 qla2x00_rport_del(fcport);
5919
5920 spin_lock_irqsave(&ha->vport_slock, flags);
5921 }
5922 }
5923 atomic_dec(&vha->vref_count);
5924 wake_up(&vha->vref_waitq);
5925 }
5926 spin_unlock_irqrestore(&ha->vport_slock, flags);
5927 }
5928
5929 /* Assumes idc_lock always held on entry */
5930 void
5931 qla83xx_reset_ownership(scsi_qla_host_t *vha)
5932 {
5933 struct qla_hw_data *ha = vha->hw;
5934 uint32_t drv_presence, drv_presence_mask;
5935 uint32_t dev_part_info1, dev_part_info2, class_type;
5936 uint32_t class_type_mask = 0x3;
5937 uint16_t fcoe_other_function = 0xffff, i;
5938
5939 if (IS_QLA8044(ha)) {
5940 drv_presence = qla8044_rd_direct(vha,
5941 QLA8044_CRB_DRV_ACTIVE_INDEX);
5942 dev_part_info1 = qla8044_rd_direct(vha,
5943 QLA8044_CRB_DEV_PART_INFO_INDEX);
5944 dev_part_info2 = qla8044_rd_direct(vha,
5945 QLA8044_CRB_DEV_PART_INFO2);
5946 } else {
5947 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5948 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
5949 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
5950 }
5951 for (i = 0; i < 8; i++) {
5952 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
5953 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
5954 (i != ha->portnum)) {
5955 fcoe_other_function = i;
5956 break;
5957 }
5958 }
5959 if (fcoe_other_function == 0xffff) {
5960 for (i = 0; i < 8; i++) {
5961 class_type = ((dev_part_info2 >> (i * 4)) &
5962 class_type_mask);
5963 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
5964 ((i + 8) != ha->portnum)) {
5965 fcoe_other_function = i + 8;
5966 break;
5967 }
5968 }
5969 }
5970 /*
5971 * Prepare drv-presence mask based on fcoe functions present.
5972 * However consider only valid physical fcoe function numbers (0-15).
5973 */
5974 drv_presence_mask = ~((1 << (ha->portnum)) |
5975 ((fcoe_other_function == 0xffff) ?
5976 0 : (1 << (fcoe_other_function))));
5977
5978 /* We are the reset owner iff:
5979 * - No other protocol drivers present.
5980 * - This is the lowest among fcoe functions. */
5981 if (!(drv_presence & drv_presence_mask) &&
5982 (ha->portnum < fcoe_other_function)) {
5983 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
5984 "This host is Reset owner.\n");
5985 ha->flags.nic_core_reset_owner = 1;
5986 }
5987 }
5988
5989 static int
5990 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
5991 {
5992 int rval = QLA_SUCCESS;
5993 struct qla_hw_data *ha = vha->hw;
5994 uint32_t drv_ack;
5995
5996 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5997 if (rval == QLA_SUCCESS) {
5998 drv_ack |= (1 << ha->portnum);
5999 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6000 }
6001
6002 return rval;
6003 }
6004
6005 static int
6006 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
6007 {
6008 int rval = QLA_SUCCESS;
6009 struct qla_hw_data *ha = vha->hw;
6010 uint32_t drv_ack;
6011
6012 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6013 if (rval == QLA_SUCCESS) {
6014 drv_ack &= ~(1 << ha->portnum);
6015 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6016 }
6017
6018 return rval;
6019 }
6020
6021 static const char *
6022 qla83xx_dev_state_to_string(uint32_t dev_state)
6023 {
6024 switch (dev_state) {
6025 case QLA8XXX_DEV_COLD:
6026 return "COLD/RE-INIT";
6027 case QLA8XXX_DEV_INITIALIZING:
6028 return "INITIALIZING";
6029 case QLA8XXX_DEV_READY:
6030 return "READY";
6031 case QLA8XXX_DEV_NEED_RESET:
6032 return "NEED RESET";
6033 case QLA8XXX_DEV_NEED_QUIESCENT:
6034 return "NEED QUIESCENT";
6035 case QLA8XXX_DEV_FAILED:
6036 return "FAILED";
6037 case QLA8XXX_DEV_QUIESCENT:
6038 return "QUIESCENT";
6039 default:
6040 return "Unknown";
6041 }
6042 }
6043
6044 /* Assumes idc-lock always held on entry */
6045 void
6046 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
6047 {
6048 struct qla_hw_data *ha = vha->hw;
6049 uint32_t idc_audit_reg = 0, duration_secs = 0;
6050
6051 switch (audit_type) {
6052 case IDC_AUDIT_TIMESTAMP:
6053 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
6054 idc_audit_reg = (ha->portnum) |
6055 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
6056 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6057 break;
6058
6059 case IDC_AUDIT_COMPLETION:
6060 duration_secs = ((jiffies_to_msecs(jiffies) -
6061 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
6062 idc_audit_reg = (ha->portnum) |
6063 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
6064 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6065 break;
6066
6067 default:
6068 ql_log(ql_log_warn, vha, 0xb078,
6069 "Invalid audit type specified.\n");
6070 break;
6071 }
6072 }
6073
6074 /* Assumes idc_lock always held on entry */
6075 static int
6076 qla83xx_initiating_reset(scsi_qla_host_t *vha)
6077 {
6078 struct qla_hw_data *ha = vha->hw;
6079 uint32_t idc_control, dev_state;
6080
6081 __qla83xx_get_idc_control(vha, &idc_control);
6082 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
6083 ql_log(ql_log_info, vha, 0xb080,
6084 "NIC Core reset has been disabled. idc-control=0x%x\n",
6085 idc_control);
6086 return QLA_FUNCTION_FAILED;
6087 }
6088
6089 /* Set NEED-RESET iff in READY state and we are the reset-owner */
6090 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6091 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
6092 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
6093 QLA8XXX_DEV_NEED_RESET);
6094 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
6095 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6096 } else {
6097 const char *state = qla83xx_dev_state_to_string(dev_state);
6098 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
6099
6100 /* SV: XXX: Is timeout required here? */
6101 /* Wait for IDC state change READY -> NEED_RESET */
6102 while (dev_state == QLA8XXX_DEV_READY) {
6103 qla83xx_idc_unlock(vha, 0);
6104 msleep(200);
6105 qla83xx_idc_lock(vha, 0);
6106 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6107 }
6108 }
6109
6110 /* Send IDC ack by writing to drv-ack register */
6111 __qla83xx_set_drv_ack(vha);
6112
6113 return QLA_SUCCESS;
6114 }
6115
6116 int
6117 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
6118 {
6119 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6120 }
6121
6122 int
6123 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
6124 {
6125 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6126 }
6127
6128 static int
6129 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
6130 {
6131 uint32_t drv_presence = 0;
6132 struct qla_hw_data *ha = vha->hw;
6133
6134 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6135 if (drv_presence & (1 << ha->portnum))
6136 return QLA_SUCCESS;
6137 else
6138 return QLA_TEST_FAILED;
6139 }
6140
6141 int
6142 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
6143 {
6144 int rval = QLA_SUCCESS;
6145 struct qla_hw_data *ha = vha->hw;
6146
6147 ql_dbg(ql_dbg_p3p, vha, 0xb058,
6148 "Entered %s().\n", __func__);
6149
6150 if (vha->device_flags & DFLG_DEV_FAILED) {
6151 ql_log(ql_log_warn, vha, 0xb059,
6152 "Device in unrecoverable FAILED state.\n");
6153 return QLA_FUNCTION_FAILED;
6154 }
6155
6156 qla83xx_idc_lock(vha, 0);
6157
6158 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
6159 ql_log(ql_log_warn, vha, 0xb05a,
6160 "Function=0x%x has been removed from IDC participation.\n",
6161 ha->portnum);
6162 rval = QLA_FUNCTION_FAILED;
6163 goto exit;
6164 }
6165
6166 qla83xx_reset_ownership(vha);
6167
6168 rval = qla83xx_initiating_reset(vha);
6169
6170 /*
6171 * Perform reset if we are the reset-owner,
6172 * else wait till IDC state changes to READY/FAILED.
6173 */
6174 if (rval == QLA_SUCCESS) {
6175 rval = qla83xx_idc_state_handler(vha);
6176
6177 if (rval == QLA_SUCCESS)
6178 ha->flags.nic_core_hung = 0;
6179 __qla83xx_clear_drv_ack(vha);
6180 }
6181
6182 exit:
6183 qla83xx_idc_unlock(vha, 0);
6184
6185 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
6186
6187 return rval;
6188 }
6189
6190 int
6191 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
6192 {
6193 struct qla_hw_data *ha = vha->hw;
6194 int rval = QLA_FUNCTION_FAILED;
6195
6196 if (!IS_MCTP_CAPABLE(ha)) {
6197 /* This message can be removed from the final version */
6198 ql_log(ql_log_info, vha, 0x506d,
6199 "This board is not MCTP capable\n");
6200 return rval;
6201 }
6202
6203 if (!ha->mctp_dump) {
6204 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
6205 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
6206
6207 if (!ha->mctp_dump) {
6208 ql_log(ql_log_warn, vha, 0x506e,
6209 "Failed to allocate memory for mctp dump\n");
6210 return rval;
6211 }
6212 }
6213
6214 #define MCTP_DUMP_STR_ADDR 0x00000000
6215 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
6216 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
6217 if (rval != QLA_SUCCESS) {
6218 ql_log(ql_log_warn, vha, 0x506f,
6219 "Failed to capture mctp dump\n");
6220 } else {
6221 ql_log(ql_log_info, vha, 0x5070,
6222 "Mctp dump capture for host (%ld/%p).\n",
6223 vha->host_no, ha->mctp_dump);
6224 ha->mctp_dumped = 1;
6225 }
6226
6227 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
6228 ha->flags.nic_core_reset_hdlr_active = 1;
6229 rval = qla83xx_restart_nic_firmware(vha);
6230 if (rval)
6231 /* NIC Core reset failed. */
6232 ql_log(ql_log_warn, vha, 0x5071,
6233 "Failed to restart nic firmware\n");
6234 else
6235 ql_dbg(ql_dbg_p3p, vha, 0xb084,
6236 "Restarted NIC firmware successfully.\n");
6237 ha->flags.nic_core_reset_hdlr_active = 0;
6238 }
6239
6240 return rval;
6241
6242 }
6243
6244 /*
6245 * qla2x00_quiesce_io
6246 * Description: This function will block the new I/Os
6247 * Its not aborting any I/Os as context
6248 * is not destroyed during quiescence
6249 * Arguments: scsi_qla_host_t
6250 * return : void
6251 */
6252 void
6253 qla2x00_quiesce_io(scsi_qla_host_t *vha)
6254 {
6255 struct qla_hw_data *ha = vha->hw;
6256 struct scsi_qla_host *vp;
6257
6258 ql_dbg(ql_dbg_dpc, vha, 0x401d,
6259 "Quiescing I/O - ha=%p.\n", ha);
6260
6261 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
6262 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6263 atomic_set(&vha->loop_state, LOOP_DOWN);
6264 qla2x00_mark_all_devices_lost(vha, 0);
6265 list_for_each_entry(vp, &ha->vp_list, list)
6266 qla2x00_mark_all_devices_lost(vp, 0);
6267 } else {
6268 if (!atomic_read(&vha->loop_down_timer))
6269 atomic_set(&vha->loop_down_timer,
6270 LOOP_DOWN_TIME);
6271 }
6272 /* Wait for pending cmds to complete */
6273 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
6274 }
6275
6276 void
6277 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
6278 {
6279 struct qla_hw_data *ha = vha->hw;
6280 struct scsi_qla_host *vp;
6281 unsigned long flags;
6282 fc_port_t *fcport;
6283 u16 i;
6284
6285 /* For ISP82XX, driver waits for completion of the commands.
6286 * online flag should be set.
6287 */
6288 if (!(IS_P3P_TYPE(ha)))
6289 vha->flags.online = 0;
6290 ha->flags.chip_reset_done = 0;
6291 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
6292 vha->qla_stats.total_isp_aborts++;
6293
6294 ql_log(ql_log_info, vha, 0x00af,
6295 "Performing ISP error recovery - ha=%p.\n", ha);
6296
6297 /* For ISP82XX, reset_chip is just disabling interrupts.
6298 * Driver waits for the completion of the commands.
6299 * the interrupts need to be enabled.
6300 */
6301 if (!(IS_P3P_TYPE(ha)))
6302 ha->isp_ops->reset_chip(vha);
6303
6304 SAVE_TOPO(ha);
6305 ha->flags.rida_fmt2 = 0;
6306 ha->flags.n2n_ae = 0;
6307 ha->flags.lip_ae = 0;
6308 ha->current_topology = 0;
6309 ha->flags.fw_started = 0;
6310 ha->flags.fw_init_done = 0;
6311 ha->base_qpair->chip_reset++;
6312 for (i = 0; i < ha->max_qpairs; i++) {
6313 if (ha->queue_pair_map[i])
6314 ha->queue_pair_map[i]->chip_reset =
6315 ha->base_qpair->chip_reset;
6316 }
6317
6318 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
6319 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6320 atomic_set(&vha->loop_state, LOOP_DOWN);
6321 qla2x00_mark_all_devices_lost(vha, 0);
6322
6323 spin_lock_irqsave(&ha->vport_slock, flags);
6324 list_for_each_entry(vp, &ha->vp_list, list) {
6325 atomic_inc(&vp->vref_count);
6326 spin_unlock_irqrestore(&ha->vport_slock, flags);
6327
6328 qla2x00_mark_all_devices_lost(vp, 0);
6329
6330 spin_lock_irqsave(&ha->vport_slock, flags);
6331 atomic_dec(&vp->vref_count);
6332 }
6333 spin_unlock_irqrestore(&ha->vport_slock, flags);
6334 } else {
6335 if (!atomic_read(&vha->loop_down_timer))
6336 atomic_set(&vha->loop_down_timer,
6337 LOOP_DOWN_TIME);
6338 }
6339
6340 /* Clear all async request states across all VPs. */
6341 list_for_each_entry(fcport, &vha->vp_fcports, list)
6342 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6343 spin_lock_irqsave(&ha->vport_slock, flags);
6344 list_for_each_entry(vp, &ha->vp_list, list) {
6345 atomic_inc(&vp->vref_count);
6346 spin_unlock_irqrestore(&ha->vport_slock, flags);
6347
6348 list_for_each_entry(fcport, &vp->vp_fcports, list)
6349 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6350
6351 spin_lock_irqsave(&ha->vport_slock, flags);
6352 atomic_dec(&vp->vref_count);
6353 }
6354 spin_unlock_irqrestore(&ha->vport_slock, flags);
6355
6356 if (!ha->flags.eeh_busy) {
6357 /* Make sure for ISP 82XX IO DMA is complete */
6358 if (IS_P3P_TYPE(ha)) {
6359 qla82xx_chip_reset_cleanup(vha);
6360 ql_log(ql_log_info, vha, 0x00b4,
6361 "Done chip reset cleanup.\n");
6362
6363 /* Done waiting for pending commands.
6364 * Reset the online flag.
6365 */
6366 vha->flags.online = 0;
6367 }
6368
6369 /* Requeue all commands in outstanding command list. */
6370 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6371 }
6372 /* memory barrier */
6373 wmb();
6374 }
6375
6376 /*
6377 * qla2x00_abort_isp
6378 * Resets ISP and aborts all outstanding commands.
6379 *
6380 * Input:
6381 * ha = adapter block pointer.
6382 *
6383 * Returns:
6384 * 0 = success
6385 */
6386 int
6387 qla2x00_abort_isp(scsi_qla_host_t *vha)
6388 {
6389 int rval;
6390 uint8_t status = 0;
6391 struct qla_hw_data *ha = vha->hw;
6392 struct scsi_qla_host *vp;
6393 struct req_que *req = ha->req_q_map[0];
6394 unsigned long flags;
6395
6396 if (vha->flags.online) {
6397 qla2x00_abort_isp_cleanup(vha);
6398
6399 if (IS_QLA8031(ha)) {
6400 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
6401 "Clearing fcoe driver presence.\n");
6402 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
6403 ql_dbg(ql_dbg_p3p, vha, 0xb073,
6404 "Error while clearing DRV-Presence.\n");
6405 }
6406
6407 if (unlikely(pci_channel_offline(ha->pdev) &&
6408 ha->flags.pci_channel_io_perm_failure)) {
6409 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6410 status = 0;
6411 return status;
6412 }
6413
6414 ha->isp_ops->get_flash_version(vha, req->ring);
6415
6416 ha->isp_ops->nvram_config(vha);
6417
6418 if (!qla2x00_restart_isp(vha)) {
6419 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6420
6421 if (!atomic_read(&vha->loop_down_timer)) {
6422 /*
6423 * Issue marker command only when we are going
6424 * to start the I/O .
6425 */
6426 vha->marker_needed = 1;
6427 }
6428
6429 vha->flags.online = 1;
6430
6431 ha->isp_ops->enable_intrs(ha);
6432
6433 ha->isp_abort_cnt = 0;
6434 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6435
6436 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
6437 qla2x00_get_fw_version(vha);
6438 if (ha->fce) {
6439 ha->flags.fce_enabled = 1;
6440 memset(ha->fce, 0,
6441 fce_calc_size(ha->fce_bufs));
6442 rval = qla2x00_enable_fce_trace(vha,
6443 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
6444 &ha->fce_bufs);
6445 if (rval) {
6446 ql_log(ql_log_warn, vha, 0x8033,
6447 "Unable to reinitialize FCE "
6448 "(%d).\n", rval);
6449 ha->flags.fce_enabled = 0;
6450 }
6451 }
6452
6453 if (ha->eft) {
6454 memset(ha->eft, 0, EFT_SIZE);
6455 rval = qla2x00_enable_eft_trace(vha,
6456 ha->eft_dma, EFT_NUM_BUFFERS);
6457 if (rval) {
6458 ql_log(ql_log_warn, vha, 0x8034,
6459 "Unable to reinitialize EFT "
6460 "(%d).\n", rval);
6461 }
6462 }
6463 } else { /* failed the ISP abort */
6464 vha->flags.online = 1;
6465 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
6466 if (ha->isp_abort_cnt == 0) {
6467 ql_log(ql_log_fatal, vha, 0x8035,
6468 "ISP error recover failed - "
6469 "board disabled.\n");
6470 /*
6471 * The next call disables the board
6472 * completely.
6473 */
6474 ha->isp_ops->reset_adapter(vha);
6475 vha->flags.online = 0;
6476 clear_bit(ISP_ABORT_RETRY,
6477 &vha->dpc_flags);
6478 status = 0;
6479 } else { /* schedule another ISP abort */
6480 ha->isp_abort_cnt--;
6481 ql_dbg(ql_dbg_taskm, vha, 0x8020,
6482 "ISP abort - retry remaining %d.\n",
6483 ha->isp_abort_cnt);
6484 status = 1;
6485 }
6486 } else {
6487 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
6488 ql_dbg(ql_dbg_taskm, vha, 0x8021,
6489 "ISP error recovery - retrying (%d) "
6490 "more times.\n", ha->isp_abort_cnt);
6491 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6492 status = 1;
6493 }
6494 }
6495
6496 }
6497
6498 if (!status) {
6499 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
6500 qla2x00_configure_hba(vha);
6501 spin_lock_irqsave(&ha->vport_slock, flags);
6502 list_for_each_entry(vp, &ha->vp_list, list) {
6503 if (vp->vp_idx) {
6504 atomic_inc(&vp->vref_count);
6505 spin_unlock_irqrestore(&ha->vport_slock, flags);
6506
6507 qla2x00_vp_abort_isp(vp);
6508
6509 spin_lock_irqsave(&ha->vport_slock, flags);
6510 atomic_dec(&vp->vref_count);
6511 }
6512 }
6513 spin_unlock_irqrestore(&ha->vport_slock, flags);
6514
6515 if (IS_QLA8031(ha)) {
6516 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
6517 "Setting back fcoe driver presence.\n");
6518 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
6519 ql_dbg(ql_dbg_p3p, vha, 0xb074,
6520 "Error while setting DRV-Presence.\n");
6521 }
6522 } else {
6523 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
6524 __func__);
6525 }
6526
6527 return(status);
6528 }
6529
6530 /*
6531 * qla2x00_restart_isp
6532 * restarts the ISP after a reset
6533 *
6534 * Input:
6535 * ha = adapter block pointer.
6536 *
6537 * Returns:
6538 * 0 = success
6539 */
6540 static int
6541 qla2x00_restart_isp(scsi_qla_host_t *vha)
6542 {
6543 int status = 0;
6544 struct qla_hw_data *ha = vha->hw;
6545 struct req_que *req = ha->req_q_map[0];
6546 struct rsp_que *rsp = ha->rsp_q_map[0];
6547
6548 /* If firmware needs to be loaded */
6549 if (qla2x00_isp_firmware(vha)) {
6550 vha->flags.online = 0;
6551 status = ha->isp_ops->chip_diag(vha);
6552 if (!status)
6553 status = qla2x00_setup_chip(vha);
6554 }
6555
6556 if (!status && !(status = qla2x00_init_rings(vha))) {
6557 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6558 ha->flags.chip_reset_done = 1;
6559
6560 /* Initialize the queues in use */
6561 qla25xx_init_queues(ha);
6562
6563 status = qla2x00_fw_ready(vha);
6564 if (!status) {
6565 /* Issue a marker after FW becomes ready. */
6566 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
6567 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6568 }
6569
6570 /* if no cable then assume it's good */
6571 if ((vha->device_flags & DFLG_NO_CABLE))
6572 status = 0;
6573 }
6574 return (status);
6575 }
6576
6577 static int
6578 qla25xx_init_queues(struct qla_hw_data *ha)
6579 {
6580 struct rsp_que *rsp = NULL;
6581 struct req_que *req = NULL;
6582 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6583 int ret = -1;
6584 int i;
6585
6586 for (i = 1; i < ha->max_rsp_queues; i++) {
6587 rsp = ha->rsp_q_map[i];
6588 if (rsp && test_bit(i, ha->rsp_qid_map)) {
6589 rsp->options &= ~BIT_0;
6590 ret = qla25xx_init_rsp_que(base_vha, rsp);
6591 if (ret != QLA_SUCCESS)
6592 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
6593 "%s Rsp que: %d init failed.\n",
6594 __func__, rsp->id);
6595 else
6596 ql_dbg(ql_dbg_init, base_vha, 0x0100,
6597 "%s Rsp que: %d inited.\n",
6598 __func__, rsp->id);
6599 }
6600 }
6601 for (i = 1; i < ha->max_req_queues; i++) {
6602 req = ha->req_q_map[i];
6603 if (req && test_bit(i, ha->req_qid_map)) {
6604 /* Clear outstanding commands array. */
6605 req->options &= ~BIT_0;
6606 ret = qla25xx_init_req_que(base_vha, req);
6607 if (ret != QLA_SUCCESS)
6608 ql_dbg(ql_dbg_init, base_vha, 0x0101,
6609 "%s Req que: %d init failed.\n",
6610 __func__, req->id);
6611 else
6612 ql_dbg(ql_dbg_init, base_vha, 0x0102,
6613 "%s Req que: %d inited.\n",
6614 __func__, req->id);
6615 }
6616 }
6617 return ret;
6618 }
6619
6620 /*
6621 * qla2x00_reset_adapter
6622 * Reset adapter.
6623 *
6624 * Input:
6625 * ha = adapter block pointer.
6626 */
6627 void
6628 qla2x00_reset_adapter(scsi_qla_host_t *vha)
6629 {
6630 unsigned long flags = 0;
6631 struct qla_hw_data *ha = vha->hw;
6632 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6633
6634 vha->flags.online = 0;
6635 ha->isp_ops->disable_intrs(ha);
6636
6637 spin_lock_irqsave(&ha->hardware_lock, flags);
6638 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
6639 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
6640 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
6641 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
6642 spin_unlock_irqrestore(&ha->hardware_lock, flags);
6643 }
6644
6645 void
6646 qla24xx_reset_adapter(scsi_qla_host_t *vha)
6647 {
6648 unsigned long flags = 0;
6649 struct qla_hw_data *ha = vha->hw;
6650 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
6651
6652 if (IS_P3P_TYPE(ha))
6653 return;
6654
6655 vha->flags.online = 0;
6656 ha->isp_ops->disable_intrs(ha);
6657
6658 spin_lock_irqsave(&ha->hardware_lock, flags);
6659 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
6660 RD_REG_DWORD(&reg->hccr);
6661 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
6662 RD_REG_DWORD(&reg->hccr);
6663 spin_unlock_irqrestore(&ha->hardware_lock, flags);
6664
6665 if (IS_NOPOLLING_TYPE(ha))
6666 ha->isp_ops->enable_intrs(ha);
6667 }
6668
6669 /* On sparc systems, obtain port and node WWN from firmware
6670 * properties.
6671 */
6672 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
6673 struct nvram_24xx *nv)
6674 {
6675 #ifdef CONFIG_SPARC
6676 struct qla_hw_data *ha = vha->hw;
6677 struct pci_dev *pdev = ha->pdev;
6678 struct device_node *dp = pci_device_to_OF_node(pdev);
6679 const u8 *val;
6680 int len;
6681
6682 val = of_get_property(dp, "port-wwn", &len);
6683 if (val && len >= WWN_SIZE)
6684 memcpy(nv->port_name, val, WWN_SIZE);
6685
6686 val = of_get_property(dp, "node-wwn", &len);
6687 if (val && len >= WWN_SIZE)
6688 memcpy(nv->node_name, val, WWN_SIZE);
6689 #endif
6690 }
6691
6692 int
6693 qla24xx_nvram_config(scsi_qla_host_t *vha)
6694 {
6695 int rval;
6696 struct init_cb_24xx *icb;
6697 struct nvram_24xx *nv;
6698 uint32_t *dptr;
6699 uint8_t *dptr1, *dptr2;
6700 uint32_t chksum;
6701 uint16_t cnt;
6702 struct qla_hw_data *ha = vha->hw;
6703
6704 rval = QLA_SUCCESS;
6705 icb = (struct init_cb_24xx *)ha->init_cb;
6706 nv = ha->nvram;
6707
6708 /* Determine NVRAM starting address. */
6709 if (ha->port_no == 0) {
6710 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
6711 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
6712 } else {
6713 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
6714 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
6715 }
6716
6717 ha->nvram_size = sizeof(struct nvram_24xx);
6718 ha->vpd_size = FA_NVRAM_VPD_SIZE;
6719
6720 /* Get VPD data into cache */
6721 ha->vpd = ha->nvram + VPD_OFFSET;
6722 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
6723 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
6724
6725 /* Get NVRAM data into cache and calculate checksum. */
6726 dptr = (uint32_t *)nv;
6727 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
6728 ha->nvram_size);
6729 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
6730 chksum += le32_to_cpu(*dptr);
6731
6732 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
6733 "Contents of NVRAM\n");
6734 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
6735 (uint8_t *)nv, ha->nvram_size);
6736
6737 /* Bad NVRAM data, set defaults parameters. */
6738 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
6739 || nv->id[3] != ' ' ||
6740 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
6741 /* Reset NVRAM data. */
6742 ql_log(ql_log_warn, vha, 0x006b,
6743 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
6744 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
6745 ql_log(ql_log_warn, vha, 0x006c,
6746 "Falling back to functioning (yet invalid -- WWPN) "
6747 "defaults.\n");
6748
6749 /*
6750 * Set default initialization control block.
6751 */
6752 memset(nv, 0, ha->nvram_size);
6753 nv->nvram_version = cpu_to_le16(ICB_VERSION);
6754 nv->version = cpu_to_le16(ICB_VERSION);
6755 nv->frame_payload_size = 2048;
6756 nv->execution_throttle = cpu_to_le16(0xFFFF);
6757 nv->exchange_count = cpu_to_le16(0);
6758 nv->hard_address = cpu_to_le16(124);
6759 nv->port_name[0] = 0x21;
6760 nv->port_name[1] = 0x00 + ha->port_no + 1;
6761 nv->port_name[2] = 0x00;
6762 nv->port_name[3] = 0xe0;
6763 nv->port_name[4] = 0x8b;
6764 nv->port_name[5] = 0x1c;
6765 nv->port_name[6] = 0x55;
6766 nv->port_name[7] = 0x86;
6767 nv->node_name[0] = 0x20;
6768 nv->node_name[1] = 0x00;
6769 nv->node_name[2] = 0x00;
6770 nv->node_name[3] = 0xe0;
6771 nv->node_name[4] = 0x8b;
6772 nv->node_name[5] = 0x1c;
6773 nv->node_name[6] = 0x55;
6774 nv->node_name[7] = 0x86;
6775 qla24xx_nvram_wwn_from_ofw(vha, nv);
6776 nv->login_retry_count = cpu_to_le16(8);
6777 nv->interrupt_delay_timer = cpu_to_le16(0);
6778 nv->login_timeout = cpu_to_le16(0);
6779 nv->firmware_options_1 =
6780 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
6781 nv->firmware_options_2 = cpu_to_le32(2 << 4);
6782 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
6783 nv->firmware_options_3 = cpu_to_le32(2 << 13);
6784 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
6785 nv->efi_parameters = cpu_to_le32(0);
6786 nv->reset_delay = 5;
6787 nv->max_luns_per_target = cpu_to_le16(128);
6788 nv->port_down_retry_count = cpu_to_le16(30);
6789 nv->link_down_timeout = cpu_to_le16(30);
6790
6791 rval = 1;
6792 }
6793
6794 if (qla_tgt_mode_enabled(vha)) {
6795 /* Don't enable full login after initial LIP */
6796 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
6797 /* Don't enable LIP full login for initiator */
6798 nv->host_p &= cpu_to_le32(~BIT_10);
6799 }
6800
6801 qlt_24xx_config_nvram_stage1(vha, nv);
6802
6803 /* Reset Initialization control block */
6804 memset(icb, 0, ha->init_cb_size);
6805
6806 /* Copy 1st segment. */
6807 dptr1 = (uint8_t *)icb;
6808 dptr2 = (uint8_t *)&nv->version;
6809 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
6810 while (cnt--)
6811 *dptr1++ = *dptr2++;
6812
6813 icb->login_retry_count = nv->login_retry_count;
6814 icb->link_down_on_nos = nv->link_down_on_nos;
6815
6816 /* Copy 2nd segment. */
6817 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
6818 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
6819 cnt = (uint8_t *)&icb->reserved_3 -
6820 (uint8_t *)&icb->interrupt_delay_timer;
6821 while (cnt--)
6822 *dptr1++ = *dptr2++;
6823
6824 /*
6825 * Setup driver NVRAM options.
6826 */
6827 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
6828 "QLA2462");
6829
6830 qlt_24xx_config_nvram_stage2(vha, icb);
6831
6832 if (nv->host_p & cpu_to_le32(BIT_15)) {
6833 /* Use alternate WWN? */
6834 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
6835 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
6836 }
6837
6838 /* Prepare nodename */
6839 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
6840 /*
6841 * Firmware will apply the following mask if the nodename was
6842 * not provided.
6843 */
6844 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
6845 icb->node_name[0] &= 0xF0;
6846 }
6847
6848 /* Set host adapter parameters. */
6849 ha->flags.disable_risc_code_load = 0;
6850 ha->flags.enable_lip_reset = 0;
6851 ha->flags.enable_lip_full_login =
6852 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
6853 ha->flags.enable_target_reset =
6854 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
6855 ha->flags.enable_led_scheme = 0;
6856 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
6857
6858 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
6859 (BIT_6 | BIT_5 | BIT_4)) >> 4;
6860
6861 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
6862 sizeof(ha->fw_seriallink_options24));
6863
6864 /* save HBA serial number */
6865 ha->serial0 = icb->port_name[5];
6866 ha->serial1 = icb->port_name[6];
6867 ha->serial2 = icb->port_name[7];
6868 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
6869 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
6870
6871 icb->execution_throttle = cpu_to_le16(0xFFFF);
6872
6873 ha->retry_count = le16_to_cpu(nv->login_retry_count);
6874
6875 /* Set minimum login_timeout to 4 seconds. */
6876 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
6877 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
6878 if (le16_to_cpu(nv->login_timeout) < 4)
6879 nv->login_timeout = cpu_to_le16(4);
6880 ha->login_timeout = le16_to_cpu(nv->login_timeout);
6881
6882 /* Set minimum RATOV to 100 tenths of a second. */
6883 ha->r_a_tov = 100;
6884
6885 ha->loop_reset_delay = nv->reset_delay;
6886
6887 /* Link Down Timeout = 0:
6888 *
6889 * When Port Down timer expires we will start returning
6890 * I/O's to OS with "DID_NO_CONNECT".
6891 *
6892 * Link Down Timeout != 0:
6893 *
6894 * The driver waits for the link to come up after link down
6895 * before returning I/Os to OS with "DID_NO_CONNECT".
6896 */
6897 if (le16_to_cpu(nv->link_down_timeout) == 0) {
6898 ha->loop_down_abort_time =
6899 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
6900 } else {
6901 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
6902 ha->loop_down_abort_time =
6903 (LOOP_DOWN_TIME - ha->link_down_timeout);
6904 }
6905
6906 /* Need enough time to try and get the port back. */
6907 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
6908 if (qlport_down_retry)
6909 ha->port_down_retry_count = qlport_down_retry;
6910
6911 /* Set login_retry_count */
6912 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
6913 if (ha->port_down_retry_count ==
6914 le16_to_cpu(nv->port_down_retry_count) &&
6915 ha->port_down_retry_count > 3)
6916 ha->login_retry_count = ha->port_down_retry_count;
6917 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
6918 ha->login_retry_count = ha->port_down_retry_count;
6919 if (ql2xloginretrycount)
6920 ha->login_retry_count = ql2xloginretrycount;
6921
6922 /* Enable ZIO. */
6923 if (!vha->flags.init_done) {
6924 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
6925 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
6926 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
6927 le16_to_cpu(icb->interrupt_delay_timer): 2;
6928 }
6929 icb->firmware_options_2 &= cpu_to_le32(
6930 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
6931 vha->flags.process_response_queue = 0;
6932 if (ha->zio_mode != QLA_ZIO_DISABLED) {
6933 ha->zio_mode = QLA_ZIO_MODE_6;
6934
6935 ql_log(ql_log_info, vha, 0x006f,
6936 "ZIO mode %d enabled; timer delay (%d us).\n",
6937 ha->zio_mode, ha->zio_timer * 100);
6938
6939 icb->firmware_options_2 |= cpu_to_le32(
6940 (uint32_t)ha->zio_mode);
6941 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
6942 vha->flags.process_response_queue = 1;
6943 }
6944
6945 if (rval) {
6946 ql_log(ql_log_warn, vha, 0x0070,
6947 "NVRAM configuration failed.\n");
6948 }
6949 return (rval);
6950 }
6951
6952 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha)
6953 {
6954 struct qla27xx_image_status pri_image_status, sec_image_status;
6955 uint8_t valid_pri_image, valid_sec_image;
6956 uint32_t *wptr;
6957 uint32_t cnt, chksum, size;
6958 struct qla_hw_data *ha = vha->hw;
6959
6960 valid_pri_image = valid_sec_image = 1;
6961 ha->active_image = 0;
6962 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t);
6963
6964 if (!ha->flt_region_img_status_pri) {
6965 valid_pri_image = 0;
6966 goto check_sec_image;
6967 }
6968
6969 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status),
6970 ha->flt_region_img_status_pri, size);
6971
6972 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
6973 ql_dbg(ql_dbg_init, vha, 0x018b,
6974 "Primary image signature (0x%x) not valid\n",
6975 pri_image_status.signature);
6976 valid_pri_image = 0;
6977 goto check_sec_image;
6978 }
6979
6980 wptr = (uint32_t *)(&pri_image_status);
6981 cnt = size;
6982
6983 for (chksum = 0; cnt--; wptr++)
6984 chksum += le32_to_cpu(*wptr);
6985
6986 if (chksum) {
6987 ql_dbg(ql_dbg_init, vha, 0x018c,
6988 "Checksum validation failed for primary image (0x%x)\n",
6989 chksum);
6990 valid_pri_image = 0;
6991 }
6992
6993 check_sec_image:
6994 if (!ha->flt_region_img_status_sec) {
6995 valid_sec_image = 0;
6996 goto check_valid_image;
6997 }
6998
6999 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
7000 ha->flt_region_img_status_sec, size);
7001
7002 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
7003 ql_dbg(ql_dbg_init, vha, 0x018d,
7004 "Secondary image signature(0x%x) not valid\n",
7005 sec_image_status.signature);
7006 valid_sec_image = 0;
7007 goto check_valid_image;
7008 }
7009
7010 wptr = (uint32_t *)(&sec_image_status);
7011 cnt = size;
7012 for (chksum = 0; cnt--; wptr++)
7013 chksum += le32_to_cpu(*wptr);
7014 if (chksum) {
7015 ql_dbg(ql_dbg_init, vha, 0x018e,
7016 "Checksum validation failed for secondary image (0x%x)\n",
7017 chksum);
7018 valid_sec_image = 0;
7019 }
7020
7021 check_valid_image:
7022 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1))
7023 ha->active_image = QLA27XX_PRIMARY_IMAGE;
7024 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) {
7025 if (!ha->active_image ||
7026 pri_image_status.generation_number <
7027 sec_image_status.generation_number)
7028 ha->active_image = QLA27XX_SECONDARY_IMAGE;
7029 }
7030
7031 ql_dbg(ql_dbg_init, vha, 0x018f, "%s image\n",
7032 ha->active_image == 0 ? "default bootld and fw" :
7033 ha->active_image == 1 ? "primary" :
7034 ha->active_image == 2 ? "secondary" :
7035 "Invalid");
7036
7037 return ha->active_image;
7038 }
7039
7040 static int
7041 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
7042 uint32_t faddr)
7043 {
7044 int rval = QLA_SUCCESS;
7045 int segments, fragment;
7046 uint32_t *dcode, dlen;
7047 uint32_t risc_addr;
7048 uint32_t risc_size;
7049 uint32_t i;
7050 struct qla_hw_data *ha = vha->hw;
7051 struct req_que *req = ha->req_q_map[0];
7052
7053 ql_dbg(ql_dbg_init, vha, 0x008b,
7054 "FW: Loading firmware from flash (%x).\n", faddr);
7055
7056 rval = QLA_SUCCESS;
7057
7058 segments = FA_RISC_CODE_SEGMENTS;
7059 dcode = (uint32_t *)req->ring;
7060 *srisc_addr = 0;
7061
7062 if (IS_QLA27XX(ha) &&
7063 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE)
7064 faddr = ha->flt_region_fw_sec;
7065
7066 /* Validate firmware image by checking version. */
7067 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
7068 for (i = 0; i < 4; i++)
7069 dcode[i] = be32_to_cpu(dcode[i]);
7070 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7071 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
7072 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7073 dcode[3] == 0)) {
7074 ql_log(ql_log_fatal, vha, 0x008c,
7075 "Unable to verify the integrity of flash firmware "
7076 "image.\n");
7077 ql_log(ql_log_fatal, vha, 0x008d,
7078 "Firmware data: %08x %08x %08x %08x.\n",
7079 dcode[0], dcode[1], dcode[2], dcode[3]);
7080
7081 return QLA_FUNCTION_FAILED;
7082 }
7083
7084 while (segments && rval == QLA_SUCCESS) {
7085 /* Read segment's load information. */
7086 qla24xx_read_flash_data(vha, dcode, faddr, 4);
7087
7088 risc_addr = be32_to_cpu(dcode[2]);
7089 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
7090 risc_size = be32_to_cpu(dcode[3]);
7091
7092 fragment = 0;
7093 while (risc_size > 0 && rval == QLA_SUCCESS) {
7094 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
7095 if (dlen > risc_size)
7096 dlen = risc_size;
7097
7098 ql_dbg(ql_dbg_init, vha, 0x008e,
7099 "Loading risc segment@ risc addr %x "
7100 "number of dwords 0x%x offset 0x%x.\n",
7101 risc_addr, dlen, faddr);
7102
7103 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
7104 for (i = 0; i < dlen; i++)
7105 dcode[i] = swab32(dcode[i]);
7106
7107 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7108 dlen);
7109 if (rval) {
7110 ql_log(ql_log_fatal, vha, 0x008f,
7111 "Failed to load segment %d of firmware.\n",
7112 fragment);
7113 return QLA_FUNCTION_FAILED;
7114 }
7115
7116 faddr += dlen;
7117 risc_addr += dlen;
7118 risc_size -= dlen;
7119 fragment++;
7120 }
7121
7122 /* Next segment. */
7123 segments--;
7124 }
7125
7126 if (!IS_QLA27XX(ha))
7127 return rval;
7128
7129 if (ha->fw_dump_template)
7130 vfree(ha->fw_dump_template);
7131 ha->fw_dump_template = NULL;
7132 ha->fw_dump_template_len = 0;
7133
7134 ql_dbg(ql_dbg_init, vha, 0x0161,
7135 "Loading fwdump template from %x\n", faddr);
7136 qla24xx_read_flash_data(vha, dcode, faddr, 7);
7137 risc_size = be32_to_cpu(dcode[2]);
7138 ql_dbg(ql_dbg_init, vha, 0x0162,
7139 "-> array size %x dwords\n", risc_size);
7140 if (risc_size == 0 || risc_size == ~0)
7141 goto default_template;
7142
7143 dlen = (risc_size - 8) * sizeof(*dcode);
7144 ql_dbg(ql_dbg_init, vha, 0x0163,
7145 "-> template allocating %x bytes...\n", dlen);
7146 ha->fw_dump_template = vmalloc(dlen);
7147 if (!ha->fw_dump_template) {
7148 ql_log(ql_log_warn, vha, 0x0164,
7149 "Failed fwdump template allocate %x bytes.\n", risc_size);
7150 goto default_template;
7151 }
7152
7153 faddr += 7;
7154 risc_size -= 8;
7155 dcode = ha->fw_dump_template;
7156 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
7157 for (i = 0; i < risc_size; i++)
7158 dcode[i] = le32_to_cpu(dcode[i]);
7159
7160 if (!qla27xx_fwdt_template_valid(dcode)) {
7161 ql_log(ql_log_warn, vha, 0x0165,
7162 "Failed fwdump template validate\n");
7163 goto default_template;
7164 }
7165
7166 dlen = qla27xx_fwdt_template_size(dcode);
7167 ql_dbg(ql_dbg_init, vha, 0x0166,
7168 "-> template size %x bytes\n", dlen);
7169 if (dlen > risc_size * sizeof(*dcode)) {
7170 ql_log(ql_log_warn, vha, 0x0167,
7171 "Failed fwdump template exceeds array by %zx bytes\n",
7172 (size_t)(dlen - risc_size * sizeof(*dcode)));
7173 goto default_template;
7174 }
7175 ha->fw_dump_template_len = dlen;
7176 return rval;
7177
7178 default_template:
7179 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n");
7180 if (ha->fw_dump_template)
7181 vfree(ha->fw_dump_template);
7182 ha->fw_dump_template = NULL;
7183 ha->fw_dump_template_len = 0;
7184
7185 dlen = qla27xx_fwdt_template_default_size();
7186 ql_dbg(ql_dbg_init, vha, 0x0169,
7187 "-> template allocating %x bytes...\n", dlen);
7188 ha->fw_dump_template = vmalloc(dlen);
7189 if (!ha->fw_dump_template) {
7190 ql_log(ql_log_warn, vha, 0x016a,
7191 "Failed fwdump template allocate %x bytes.\n", risc_size);
7192 goto failed_template;
7193 }
7194
7195 dcode = ha->fw_dump_template;
7196 risc_size = dlen / sizeof(*dcode);
7197 memcpy(dcode, qla27xx_fwdt_template_default(), dlen);
7198 for (i = 0; i < risc_size; i++)
7199 dcode[i] = be32_to_cpu(dcode[i]);
7200
7201 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7202 ql_log(ql_log_warn, vha, 0x016b,
7203 "Failed fwdump template validate\n");
7204 goto failed_template;
7205 }
7206
7207 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7208 ql_dbg(ql_dbg_init, vha, 0x016c,
7209 "-> template size %x bytes\n", dlen);
7210 ha->fw_dump_template_len = dlen;
7211 return rval;
7212
7213 failed_template:
7214 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n");
7215 if (ha->fw_dump_template)
7216 vfree(ha->fw_dump_template);
7217 ha->fw_dump_template = NULL;
7218 ha->fw_dump_template_len = 0;
7219 return rval;
7220 }
7221
7222 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
7223
7224 int
7225 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7226 {
7227 int rval;
7228 int i, fragment;
7229 uint16_t *wcode, *fwcode;
7230 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
7231 struct fw_blob *blob;
7232 struct qla_hw_data *ha = vha->hw;
7233 struct req_que *req = ha->req_q_map[0];
7234
7235 /* Load firmware blob. */
7236 blob = qla2x00_request_firmware(vha);
7237 if (!blob) {
7238 ql_log(ql_log_info, vha, 0x0083,
7239 "Firmware image unavailable.\n");
7240 ql_log(ql_log_info, vha, 0x0084,
7241 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
7242 return QLA_FUNCTION_FAILED;
7243 }
7244
7245 rval = QLA_SUCCESS;
7246
7247 wcode = (uint16_t *)req->ring;
7248 *srisc_addr = 0;
7249 fwcode = (uint16_t *)blob->fw->data;
7250 fwclen = 0;
7251
7252 /* Validate firmware image by checking version. */
7253 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7254 ql_log(ql_log_fatal, vha, 0x0085,
7255 "Unable to verify integrity of firmware image (%zd).\n",
7256 blob->fw->size);
7257 goto fail_fw_integrity;
7258 }
7259 for (i = 0; i < 4; i++)
7260 wcode[i] = be16_to_cpu(fwcode[i + 4]);
7261 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
7262 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
7263 wcode[2] == 0 && wcode[3] == 0)) {
7264 ql_log(ql_log_fatal, vha, 0x0086,
7265 "Unable to verify integrity of firmware image.\n");
7266 ql_log(ql_log_fatal, vha, 0x0087,
7267 "Firmware data: %04x %04x %04x %04x.\n",
7268 wcode[0], wcode[1], wcode[2], wcode[3]);
7269 goto fail_fw_integrity;
7270 }
7271
7272 seg = blob->segs;
7273 while (*seg && rval == QLA_SUCCESS) {
7274 risc_addr = *seg;
7275 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
7276 risc_size = be16_to_cpu(fwcode[3]);
7277
7278 /* Validate firmware image size. */
7279 fwclen += risc_size * sizeof(uint16_t);
7280 if (blob->fw->size < fwclen) {
7281 ql_log(ql_log_fatal, vha, 0x0088,
7282 "Unable to verify integrity of firmware image "
7283 "(%zd).\n", blob->fw->size);
7284 goto fail_fw_integrity;
7285 }
7286
7287 fragment = 0;
7288 while (risc_size > 0 && rval == QLA_SUCCESS) {
7289 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
7290 if (wlen > risc_size)
7291 wlen = risc_size;
7292 ql_dbg(ql_dbg_init, vha, 0x0089,
7293 "Loading risc segment@ risc addr %x number of "
7294 "words 0x%x.\n", risc_addr, wlen);
7295
7296 for (i = 0; i < wlen; i++)
7297 wcode[i] = swab16(fwcode[i]);
7298
7299 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7300 wlen);
7301 if (rval) {
7302 ql_log(ql_log_fatal, vha, 0x008a,
7303 "Failed to load segment %d of firmware.\n",
7304 fragment);
7305 break;
7306 }
7307
7308 fwcode += wlen;
7309 risc_addr += wlen;
7310 risc_size -= wlen;
7311 fragment++;
7312 }
7313
7314 /* Next segment. */
7315 seg++;
7316 }
7317 return rval;
7318
7319 fail_fw_integrity:
7320 return QLA_FUNCTION_FAILED;
7321 }
7322
7323 static int
7324 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7325 {
7326 int rval;
7327 int segments, fragment;
7328 uint32_t *dcode, dlen;
7329 uint32_t risc_addr;
7330 uint32_t risc_size;
7331 uint32_t i;
7332 struct fw_blob *blob;
7333 const uint32_t *fwcode;
7334 uint32_t fwclen;
7335 struct qla_hw_data *ha = vha->hw;
7336 struct req_que *req = ha->req_q_map[0];
7337
7338 /* Load firmware blob. */
7339 blob = qla2x00_request_firmware(vha);
7340 if (!blob) {
7341 ql_log(ql_log_warn, vha, 0x0090,
7342 "Firmware image unavailable.\n");
7343 ql_log(ql_log_warn, vha, 0x0091,
7344 "Firmware images can be retrieved from: "
7345 QLA_FW_URL ".\n");
7346
7347 return QLA_FUNCTION_FAILED;
7348 }
7349
7350 ql_dbg(ql_dbg_init, vha, 0x0092,
7351 "FW: Loading via request-firmware.\n");
7352
7353 rval = QLA_SUCCESS;
7354
7355 segments = FA_RISC_CODE_SEGMENTS;
7356 dcode = (uint32_t *)req->ring;
7357 *srisc_addr = 0;
7358 fwcode = (uint32_t *)blob->fw->data;
7359 fwclen = 0;
7360
7361 /* Validate firmware image by checking version. */
7362 if (blob->fw->size < 8 * sizeof(uint32_t)) {
7363 ql_log(ql_log_fatal, vha, 0x0093,
7364 "Unable to verify integrity of firmware image (%zd).\n",
7365 blob->fw->size);
7366 return QLA_FUNCTION_FAILED;
7367 }
7368 for (i = 0; i < 4; i++)
7369 dcode[i] = be32_to_cpu(fwcode[i + 4]);
7370 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7371 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
7372 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7373 dcode[3] == 0)) {
7374 ql_log(ql_log_fatal, vha, 0x0094,
7375 "Unable to verify integrity of firmware image (%zd).\n",
7376 blob->fw->size);
7377 ql_log(ql_log_fatal, vha, 0x0095,
7378 "Firmware data: %08x %08x %08x %08x.\n",
7379 dcode[0], dcode[1], dcode[2], dcode[3]);
7380 return QLA_FUNCTION_FAILED;
7381 }
7382
7383 while (segments && rval == QLA_SUCCESS) {
7384 risc_addr = be32_to_cpu(fwcode[2]);
7385 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
7386 risc_size = be32_to_cpu(fwcode[3]);
7387
7388 /* Validate firmware image size. */
7389 fwclen += risc_size * sizeof(uint32_t);
7390 if (blob->fw->size < fwclen) {
7391 ql_log(ql_log_fatal, vha, 0x0096,
7392 "Unable to verify integrity of firmware image "
7393 "(%zd).\n", blob->fw->size);
7394 return QLA_FUNCTION_FAILED;
7395 }
7396
7397 fragment = 0;
7398 while (risc_size > 0 && rval == QLA_SUCCESS) {
7399 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
7400 if (dlen > risc_size)
7401 dlen = risc_size;
7402
7403 ql_dbg(ql_dbg_init, vha, 0x0097,
7404 "Loading risc segment@ risc addr %x "
7405 "number of dwords 0x%x.\n", risc_addr, dlen);
7406
7407 for (i = 0; i < dlen; i++)
7408 dcode[i] = swab32(fwcode[i]);
7409
7410 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7411 dlen);
7412 if (rval) {
7413 ql_log(ql_log_fatal, vha, 0x0098,
7414 "Failed to load segment %d of firmware.\n",
7415 fragment);
7416 return QLA_FUNCTION_FAILED;
7417 }
7418
7419 fwcode += dlen;
7420 risc_addr += dlen;
7421 risc_size -= dlen;
7422 fragment++;
7423 }
7424
7425 /* Next segment. */
7426 segments--;
7427 }
7428
7429 if (!IS_QLA27XX(ha))
7430 return rval;
7431
7432 if (ha->fw_dump_template)
7433 vfree(ha->fw_dump_template);
7434 ha->fw_dump_template = NULL;
7435 ha->fw_dump_template_len = 0;
7436
7437 ql_dbg(ql_dbg_init, vha, 0x171,
7438 "Loading fwdump template from %x\n",
7439 (uint32_t)((void *)fwcode - (void *)blob->fw->data));
7440 risc_size = be32_to_cpu(fwcode[2]);
7441 ql_dbg(ql_dbg_init, vha, 0x172,
7442 "-> array size %x dwords\n", risc_size);
7443 if (risc_size == 0 || risc_size == ~0)
7444 goto default_template;
7445
7446 dlen = (risc_size - 8) * sizeof(*fwcode);
7447 ql_dbg(ql_dbg_init, vha, 0x0173,
7448 "-> template allocating %x bytes...\n", dlen);
7449 ha->fw_dump_template = vmalloc(dlen);
7450 if (!ha->fw_dump_template) {
7451 ql_log(ql_log_warn, vha, 0x0174,
7452 "Failed fwdump template allocate %x bytes.\n", risc_size);
7453 goto default_template;
7454 }
7455
7456 fwcode += 7;
7457 risc_size -= 8;
7458 dcode = ha->fw_dump_template;
7459 for (i = 0; i < risc_size; i++)
7460 dcode[i] = le32_to_cpu(fwcode[i]);
7461
7462 if (!qla27xx_fwdt_template_valid(dcode)) {
7463 ql_log(ql_log_warn, vha, 0x0175,
7464 "Failed fwdump template validate\n");
7465 goto default_template;
7466 }
7467
7468 dlen = qla27xx_fwdt_template_size(dcode);
7469 ql_dbg(ql_dbg_init, vha, 0x0176,
7470 "-> template size %x bytes\n", dlen);
7471 if (dlen > risc_size * sizeof(*fwcode)) {
7472 ql_log(ql_log_warn, vha, 0x0177,
7473 "Failed fwdump template exceeds array by %zx bytes\n",
7474 (size_t)(dlen - risc_size * sizeof(*fwcode)));
7475 goto default_template;
7476 }
7477 ha->fw_dump_template_len = dlen;
7478 return rval;
7479
7480 default_template:
7481 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n");
7482 if (ha->fw_dump_template)
7483 vfree(ha->fw_dump_template);
7484 ha->fw_dump_template = NULL;
7485 ha->fw_dump_template_len = 0;
7486
7487 dlen = qla27xx_fwdt_template_default_size();
7488 ql_dbg(ql_dbg_init, vha, 0x0179,
7489 "-> template allocating %x bytes...\n", dlen);
7490 ha->fw_dump_template = vmalloc(dlen);
7491 if (!ha->fw_dump_template) {
7492 ql_log(ql_log_warn, vha, 0x017a,
7493 "Failed fwdump template allocate %x bytes.\n", risc_size);
7494 goto failed_template;
7495 }
7496
7497 dcode = ha->fw_dump_template;
7498 risc_size = dlen / sizeof(*fwcode);
7499 fwcode = qla27xx_fwdt_template_default();
7500 for (i = 0; i < risc_size; i++)
7501 dcode[i] = be32_to_cpu(fwcode[i]);
7502
7503 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7504 ql_log(ql_log_warn, vha, 0x017b,
7505 "Failed fwdump template validate\n");
7506 goto failed_template;
7507 }
7508
7509 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7510 ql_dbg(ql_dbg_init, vha, 0x017c,
7511 "-> template size %x bytes\n", dlen);
7512 ha->fw_dump_template_len = dlen;
7513 return rval;
7514
7515 failed_template:
7516 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n");
7517 if (ha->fw_dump_template)
7518 vfree(ha->fw_dump_template);
7519 ha->fw_dump_template = NULL;
7520 ha->fw_dump_template_len = 0;
7521 return rval;
7522 }
7523
7524 int
7525 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7526 {
7527 int rval;
7528
7529 if (ql2xfwloadbin == 1)
7530 return qla81xx_load_risc(vha, srisc_addr);
7531
7532 /*
7533 * FW Load priority:
7534 * 1) Firmware via request-firmware interface (.bin file).
7535 * 2) Firmware residing in flash.
7536 */
7537 rval = qla24xx_load_risc_blob(vha, srisc_addr);
7538 if (rval == QLA_SUCCESS)
7539 return rval;
7540
7541 return qla24xx_load_risc_flash(vha, srisc_addr,
7542 vha->hw->flt_region_fw);
7543 }
7544
7545 int
7546 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7547 {
7548 int rval;
7549 struct qla_hw_data *ha = vha->hw;
7550
7551 if (ql2xfwloadbin == 2)
7552 goto try_blob_fw;
7553
7554 /*
7555 * FW Load priority:
7556 * 1) Firmware residing in flash.
7557 * 2) Firmware via request-firmware interface (.bin file).
7558 * 3) Golden-Firmware residing in flash -- limited operation.
7559 */
7560 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
7561 if (rval == QLA_SUCCESS)
7562 return rval;
7563
7564 try_blob_fw:
7565 rval = qla24xx_load_risc_blob(vha, srisc_addr);
7566 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
7567 return rval;
7568
7569 ql_log(ql_log_info, vha, 0x0099,
7570 "Attempting to fallback to golden firmware.\n");
7571 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
7572 if (rval != QLA_SUCCESS)
7573 return rval;
7574
7575 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
7576 ha->flags.running_gold_fw = 1;
7577 return rval;
7578 }
7579
7580 void
7581 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
7582 {
7583 int ret, retries;
7584 struct qla_hw_data *ha = vha->hw;
7585
7586 if (ha->flags.pci_channel_io_perm_failure)
7587 return;
7588 if (!IS_FWI2_CAPABLE(ha))
7589 return;
7590 if (!ha->fw_major_version)
7591 return;
7592 if (!ha->flags.fw_started)
7593 return;
7594
7595 ret = qla2x00_stop_firmware(vha);
7596 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
7597 ret != QLA_INVALID_COMMAND && retries ; retries--) {
7598 ha->isp_ops->reset_chip(vha);
7599 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
7600 continue;
7601 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
7602 continue;
7603 ql_log(ql_log_info, vha, 0x8015,
7604 "Attempting retry of stop-firmware command.\n");
7605 ret = qla2x00_stop_firmware(vha);
7606 }
7607
7608 QLA_FW_STOPPED(ha);
7609 ha->flags.fw_init_done = 0;
7610 }
7611
7612 int
7613 qla24xx_configure_vhba(scsi_qla_host_t *vha)
7614 {
7615 int rval = QLA_SUCCESS;
7616 int rval2;
7617 uint16_t mb[MAILBOX_REGISTER_COUNT];
7618 struct qla_hw_data *ha = vha->hw;
7619 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7620 struct req_que *req;
7621 struct rsp_que *rsp;
7622
7623 if (!vha->vp_idx)
7624 return -EINVAL;
7625
7626 rval = qla2x00_fw_ready(base_vha);
7627 if (vha->qpair)
7628 req = vha->qpair->req;
7629 else
7630 req = ha->req_q_map[0];
7631 rsp = req->rsp;
7632
7633 if (rval == QLA_SUCCESS) {
7634 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7635 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
7636 }
7637
7638 vha->flags.management_server_logged_in = 0;
7639
7640 /* Login to SNS first */
7641 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
7642 BIT_1);
7643 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
7644 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
7645 ql_dbg(ql_dbg_init, vha, 0x0120,
7646 "Failed SNS login: loop_id=%x, rval2=%d\n",
7647 NPH_SNS, rval2);
7648 else
7649 ql_dbg(ql_dbg_init, vha, 0x0103,
7650 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
7651 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
7652 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
7653 return (QLA_FUNCTION_FAILED);
7654 }
7655
7656 atomic_set(&vha->loop_down_timer, 0);
7657 atomic_set(&vha->loop_state, LOOP_UP);
7658 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
7659 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
7660 rval = qla2x00_loop_resync(base_vha);
7661
7662 return rval;
7663 }
7664
7665 /* 84XX Support **************************************************************/
7666
7667 static LIST_HEAD(qla_cs84xx_list);
7668 static DEFINE_MUTEX(qla_cs84xx_mutex);
7669
7670 static struct qla_chip_state_84xx *
7671 qla84xx_get_chip(struct scsi_qla_host *vha)
7672 {
7673 struct qla_chip_state_84xx *cs84xx;
7674 struct qla_hw_data *ha = vha->hw;
7675
7676 mutex_lock(&qla_cs84xx_mutex);
7677
7678 /* Find any shared 84xx chip. */
7679 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
7680 if (cs84xx->bus == ha->pdev->bus) {
7681 kref_get(&cs84xx->kref);
7682 goto done;
7683 }
7684 }
7685
7686 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
7687 if (!cs84xx)
7688 goto done;
7689
7690 kref_init(&cs84xx->kref);
7691 spin_lock_init(&cs84xx->access_lock);
7692 mutex_init(&cs84xx->fw_update_mutex);
7693 cs84xx->bus = ha->pdev->bus;
7694
7695 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
7696 done:
7697 mutex_unlock(&qla_cs84xx_mutex);
7698 return cs84xx;
7699 }
7700
7701 static void
7702 __qla84xx_chip_release(struct kref *kref)
7703 {
7704 struct qla_chip_state_84xx *cs84xx =
7705 container_of(kref, struct qla_chip_state_84xx, kref);
7706
7707 mutex_lock(&qla_cs84xx_mutex);
7708 list_del(&cs84xx->list);
7709 mutex_unlock(&qla_cs84xx_mutex);
7710 kfree(cs84xx);
7711 }
7712
7713 void
7714 qla84xx_put_chip(struct scsi_qla_host *vha)
7715 {
7716 struct qla_hw_data *ha = vha->hw;
7717 if (ha->cs84xx)
7718 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
7719 }
7720
7721 static int
7722 qla84xx_init_chip(scsi_qla_host_t *vha)
7723 {
7724 int rval;
7725 uint16_t status[2];
7726 struct qla_hw_data *ha = vha->hw;
7727
7728 mutex_lock(&ha->cs84xx->fw_update_mutex);
7729
7730 rval = qla84xx_verify_chip(vha, status);
7731
7732 mutex_unlock(&ha->cs84xx->fw_update_mutex);
7733
7734 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
7735 QLA_SUCCESS;
7736 }
7737
7738 /* 81XX Support **************************************************************/
7739
7740 int
7741 qla81xx_nvram_config(scsi_qla_host_t *vha)
7742 {
7743 int rval;
7744 struct init_cb_81xx *icb;
7745 struct nvram_81xx *nv;
7746 uint32_t *dptr;
7747 uint8_t *dptr1, *dptr2;
7748 uint32_t chksum;
7749 uint16_t cnt;
7750 struct qla_hw_data *ha = vha->hw;
7751
7752 rval = QLA_SUCCESS;
7753 icb = (struct init_cb_81xx *)ha->init_cb;
7754 nv = ha->nvram;
7755
7756 /* Determine NVRAM starting address. */
7757 ha->nvram_size = sizeof(struct nvram_81xx);
7758 ha->vpd_size = FA_NVRAM_VPD_SIZE;
7759 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
7760 ha->vpd_size = FA_VPD_SIZE_82XX;
7761
7762 /* Get VPD data into cache */
7763 ha->vpd = ha->nvram + VPD_OFFSET;
7764 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
7765 ha->vpd_size);
7766
7767 /* Get NVRAM data into cache and calculate checksum. */
7768 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
7769 ha->nvram_size);
7770 dptr = (uint32_t *)nv;
7771 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7772 chksum += le32_to_cpu(*dptr);
7773
7774 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
7775 "Contents of NVRAM:\n");
7776 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
7777 (uint8_t *)nv, ha->nvram_size);
7778
7779 /* Bad NVRAM data, set defaults parameters. */
7780 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
7781 || nv->id[3] != ' ' ||
7782 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
7783 /* Reset NVRAM data. */
7784 ql_log(ql_log_info, vha, 0x0073,
7785 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7786 "version=0x%x.\n", chksum, nv->id[0],
7787 le16_to_cpu(nv->nvram_version));
7788 ql_log(ql_log_info, vha, 0x0074,
7789 "Falling back to functioning (yet invalid -- WWPN) "
7790 "defaults.\n");
7791
7792 /*
7793 * Set default initialization control block.
7794 */
7795 memset(nv, 0, ha->nvram_size);
7796 nv->nvram_version = cpu_to_le16(ICB_VERSION);
7797 nv->version = cpu_to_le16(ICB_VERSION);
7798 nv->frame_payload_size = 2048;
7799 nv->execution_throttle = cpu_to_le16(0xFFFF);
7800 nv->exchange_count = cpu_to_le16(0);
7801 nv->port_name[0] = 0x21;
7802 nv->port_name[1] = 0x00 + ha->port_no + 1;
7803 nv->port_name[2] = 0x00;
7804 nv->port_name[3] = 0xe0;
7805 nv->port_name[4] = 0x8b;
7806 nv->port_name[5] = 0x1c;
7807 nv->port_name[6] = 0x55;
7808 nv->port_name[7] = 0x86;
7809 nv->node_name[0] = 0x20;
7810 nv->node_name[1] = 0x00;
7811 nv->node_name[2] = 0x00;
7812 nv->node_name[3] = 0xe0;
7813 nv->node_name[4] = 0x8b;
7814 nv->node_name[5] = 0x1c;
7815 nv->node_name[6] = 0x55;
7816 nv->node_name[7] = 0x86;
7817 nv->login_retry_count = cpu_to_le16(8);
7818 nv->interrupt_delay_timer = cpu_to_le16(0);
7819 nv->login_timeout = cpu_to_le16(0);
7820 nv->firmware_options_1 =
7821 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7822 nv->firmware_options_2 = cpu_to_le32(2 << 4);
7823 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7824 nv->firmware_options_3 = cpu_to_le32(2 << 13);
7825 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7826 nv->efi_parameters = cpu_to_le32(0);
7827 nv->reset_delay = 5;
7828 nv->max_luns_per_target = cpu_to_le16(128);
7829 nv->port_down_retry_count = cpu_to_le16(30);
7830 nv->link_down_timeout = cpu_to_le16(180);
7831 nv->enode_mac[0] = 0x00;
7832 nv->enode_mac[1] = 0xC0;
7833 nv->enode_mac[2] = 0xDD;
7834 nv->enode_mac[3] = 0x04;
7835 nv->enode_mac[4] = 0x05;
7836 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
7837
7838 rval = 1;
7839 }
7840
7841 if (IS_T10_PI_CAPABLE(ha))
7842 nv->frame_payload_size &= ~7;
7843
7844 qlt_81xx_config_nvram_stage1(vha, nv);
7845
7846 /* Reset Initialization control block */
7847 memset(icb, 0, ha->init_cb_size);
7848
7849 /* Copy 1st segment. */
7850 dptr1 = (uint8_t *)icb;
7851 dptr2 = (uint8_t *)&nv->version;
7852 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7853 while (cnt--)
7854 *dptr1++ = *dptr2++;
7855
7856 icb->login_retry_count = nv->login_retry_count;
7857
7858 /* Copy 2nd segment. */
7859 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7860 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7861 cnt = (uint8_t *)&icb->reserved_5 -
7862 (uint8_t *)&icb->interrupt_delay_timer;
7863 while (cnt--)
7864 *dptr1++ = *dptr2++;
7865
7866 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
7867 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
7868 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
7869 icb->enode_mac[0] = 0x00;
7870 icb->enode_mac[1] = 0xC0;
7871 icb->enode_mac[2] = 0xDD;
7872 icb->enode_mac[3] = 0x04;
7873 icb->enode_mac[4] = 0x05;
7874 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
7875 }
7876
7877 /* Use extended-initialization control block. */
7878 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
7879
7880 /*
7881 * Setup driver NVRAM options.
7882 */
7883 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
7884 "QLE8XXX");
7885
7886 qlt_81xx_config_nvram_stage2(vha, icb);
7887
7888 /* Use alternate WWN? */
7889 if (nv->host_p & cpu_to_le32(BIT_15)) {
7890 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7891 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7892 }
7893
7894 /* Prepare nodename */
7895 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
7896 /*
7897 * Firmware will apply the following mask if the nodename was
7898 * not provided.
7899 */
7900 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7901 icb->node_name[0] &= 0xF0;
7902 }
7903
7904 /* Set host adapter parameters. */
7905 ha->flags.disable_risc_code_load = 0;
7906 ha->flags.enable_lip_reset = 0;
7907 ha->flags.enable_lip_full_login =
7908 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
7909 ha->flags.enable_target_reset =
7910 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
7911 ha->flags.enable_led_scheme = 0;
7912 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
7913
7914 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7915 (BIT_6 | BIT_5 | BIT_4)) >> 4;
7916
7917 /* save HBA serial number */
7918 ha->serial0 = icb->port_name[5];
7919 ha->serial1 = icb->port_name[6];
7920 ha->serial2 = icb->port_name[7];
7921 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7922 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
7923
7924 icb->execution_throttle = cpu_to_le16(0xFFFF);
7925
7926 ha->retry_count = le16_to_cpu(nv->login_retry_count);
7927
7928 /* Set minimum login_timeout to 4 seconds. */
7929 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7930 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7931 if (le16_to_cpu(nv->login_timeout) < 4)
7932 nv->login_timeout = cpu_to_le16(4);
7933 ha->login_timeout = le16_to_cpu(nv->login_timeout);
7934
7935 /* Set minimum RATOV to 100 tenths of a second. */
7936 ha->r_a_tov = 100;
7937
7938 ha->loop_reset_delay = nv->reset_delay;
7939
7940 /* Link Down Timeout = 0:
7941 *
7942 * When Port Down timer expires we will start returning
7943 * I/O's to OS with "DID_NO_CONNECT".
7944 *
7945 * Link Down Timeout != 0:
7946 *
7947 * The driver waits for the link to come up after link down
7948 * before returning I/Os to OS with "DID_NO_CONNECT".
7949 */
7950 if (le16_to_cpu(nv->link_down_timeout) == 0) {
7951 ha->loop_down_abort_time =
7952 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7953 } else {
7954 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
7955 ha->loop_down_abort_time =
7956 (LOOP_DOWN_TIME - ha->link_down_timeout);
7957 }
7958
7959 /* Need enough time to try and get the port back. */
7960 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7961 if (qlport_down_retry)
7962 ha->port_down_retry_count = qlport_down_retry;
7963
7964 /* Set login_retry_count */
7965 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
7966 if (ha->port_down_retry_count ==
7967 le16_to_cpu(nv->port_down_retry_count) &&
7968 ha->port_down_retry_count > 3)
7969 ha->login_retry_count = ha->port_down_retry_count;
7970 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7971 ha->login_retry_count = ha->port_down_retry_count;
7972 if (ql2xloginretrycount)
7973 ha->login_retry_count = ql2xloginretrycount;
7974
7975 /* if not running MSI-X we need handshaking on interrupts */
7976 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha)))
7977 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
7978
7979 /* Enable ZIO. */
7980 if (!vha->flags.init_done) {
7981 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7982 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7983 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7984 le16_to_cpu(icb->interrupt_delay_timer): 2;
7985 }
7986 icb->firmware_options_2 &= cpu_to_le32(
7987 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
7988 vha->flags.process_response_queue = 0;
7989 if (ha->zio_mode != QLA_ZIO_DISABLED) {
7990 ha->zio_mode = QLA_ZIO_MODE_6;
7991
7992 ql_log(ql_log_info, vha, 0x0075,
7993 "ZIO mode %d enabled; timer delay (%d us).\n",
7994 ha->zio_mode,
7995 ha->zio_timer * 100);
7996
7997 icb->firmware_options_2 |= cpu_to_le32(
7998 (uint32_t)ha->zio_mode);
7999 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8000 vha->flags.process_response_queue = 1;
8001 }
8002
8003 /* enable RIDA Format2 */
8004 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha))
8005 icb->firmware_options_3 |= BIT_0;
8006
8007 if (IS_QLA27XX(ha)) {
8008 icb->firmware_options_3 |= BIT_8;
8009 ql_dbg(ql_log_info, vha, 0x0075,
8010 "Enabling direct connection.\n");
8011 }
8012
8013 if (rval) {
8014 ql_log(ql_log_warn, vha, 0x0076,
8015 "NVRAM configuration failed.\n");
8016 }
8017 return (rval);
8018 }
8019
8020 int
8021 qla82xx_restart_isp(scsi_qla_host_t *vha)
8022 {
8023 int status, rval;
8024 struct qla_hw_data *ha = vha->hw;
8025 struct req_que *req = ha->req_q_map[0];
8026 struct rsp_que *rsp = ha->rsp_q_map[0];
8027 struct scsi_qla_host *vp;
8028 unsigned long flags;
8029
8030 status = qla2x00_init_rings(vha);
8031 if (!status) {
8032 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8033 ha->flags.chip_reset_done = 1;
8034
8035 status = qla2x00_fw_ready(vha);
8036 if (!status) {
8037 /* Issue a marker after FW becomes ready. */
8038 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
8039 vha->flags.online = 1;
8040 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8041 }
8042
8043 /* if no cable then assume it's good */
8044 if ((vha->device_flags & DFLG_NO_CABLE))
8045 status = 0;
8046 }
8047
8048 if (!status) {
8049 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8050
8051 if (!atomic_read(&vha->loop_down_timer)) {
8052 /*
8053 * Issue marker command only when we are going
8054 * to start the I/O .
8055 */
8056 vha->marker_needed = 1;
8057 }
8058
8059 ha->isp_ops->enable_intrs(ha);
8060
8061 ha->isp_abort_cnt = 0;
8062 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
8063
8064 /* Update the firmware version */
8065 status = qla82xx_check_md_needed(vha);
8066
8067 if (ha->fce) {
8068 ha->flags.fce_enabled = 1;
8069 memset(ha->fce, 0,
8070 fce_calc_size(ha->fce_bufs));
8071 rval = qla2x00_enable_fce_trace(vha,
8072 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
8073 &ha->fce_bufs);
8074 if (rval) {
8075 ql_log(ql_log_warn, vha, 0x8001,
8076 "Unable to reinitialize FCE (%d).\n",
8077 rval);
8078 ha->flags.fce_enabled = 0;
8079 }
8080 }
8081
8082 if (ha->eft) {
8083 memset(ha->eft, 0, EFT_SIZE);
8084 rval = qla2x00_enable_eft_trace(vha,
8085 ha->eft_dma, EFT_NUM_BUFFERS);
8086 if (rval) {
8087 ql_log(ql_log_warn, vha, 0x8010,
8088 "Unable to reinitialize EFT (%d).\n",
8089 rval);
8090 }
8091 }
8092 }
8093
8094 if (!status) {
8095 ql_dbg(ql_dbg_taskm, vha, 0x8011,
8096 "qla82xx_restart_isp succeeded.\n");
8097
8098 spin_lock_irqsave(&ha->vport_slock, flags);
8099 list_for_each_entry(vp, &ha->vp_list, list) {
8100 if (vp->vp_idx) {
8101 atomic_inc(&vp->vref_count);
8102 spin_unlock_irqrestore(&ha->vport_slock, flags);
8103
8104 qla2x00_vp_abort_isp(vp);
8105
8106 spin_lock_irqsave(&ha->vport_slock, flags);
8107 atomic_dec(&vp->vref_count);
8108 }
8109 }
8110 spin_unlock_irqrestore(&ha->vport_slock, flags);
8111
8112 } else {
8113 ql_log(ql_log_warn, vha, 0x8016,
8114 "qla82xx_restart_isp **** FAILED ****.\n");
8115 }
8116
8117 return status;
8118 }
8119
8120 void
8121 qla81xx_update_fw_options(scsi_qla_host_t *vha)
8122 {
8123 struct qla_hw_data *ha = vha->hw;
8124
8125 /* Hold status IOCBs until ABTS response received. */
8126 if (ql2xfwholdabts)
8127 ha->fw_options[3] |= BIT_12;
8128
8129 /* Set Retry FLOGI in case of P2P connection */
8130 if (ha->operating_mode == P2P) {
8131 ha->fw_options[2] |= BIT_3;
8132 ql_dbg(ql_dbg_disc, vha, 0x2103,
8133 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
8134 __func__, ha->fw_options[2]);
8135 }
8136
8137 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
8138 if (ql2xmvasynctoatio) {
8139 if (qla_tgt_mode_enabled(vha) ||
8140 qla_dual_mode_enabled(vha))
8141 ha->fw_options[2] |= BIT_11;
8142 else
8143 ha->fw_options[2] &= ~BIT_11;
8144 }
8145
8146 if (qla_tgt_mode_enabled(vha) ||
8147 qla_dual_mode_enabled(vha)) {
8148 /* FW auto send SCSI status during */
8149 ha->fw_options[1] |= BIT_8;
8150 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8;
8151
8152 /* FW perform Exchange validation */
8153 ha->fw_options[2] |= BIT_4;
8154 } else {
8155 ha->fw_options[1] &= ~BIT_8;
8156 ha->fw_options[10] &= 0x00ff;
8157
8158 ha->fw_options[2] &= ~BIT_4;
8159 }
8160
8161 if (ql2xetsenable) {
8162 /* Enable ETS Burst. */
8163 memset(ha->fw_options, 0, sizeof(ha->fw_options));
8164 ha->fw_options[2] |= BIT_9;
8165 }
8166
8167 ql_dbg(ql_dbg_init, vha, 0x00e9,
8168 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
8169 __func__, ha->fw_options[1], ha->fw_options[2],
8170 ha->fw_options[3], vha->host->active_mode);
8171
8172 qla2x00_set_fw_options(vha, ha->fw_options);
8173 }
8174
8175 /*
8176 * qla24xx_get_fcp_prio
8177 * Gets the fcp cmd priority value for the logged in port.
8178 * Looks for a match of the port descriptors within
8179 * each of the fcp prio config entries. If a match is found,
8180 * the tag (priority) value is returned.
8181 *
8182 * Input:
8183 * vha = scsi host structure pointer.
8184 * fcport = port structure pointer.
8185 *
8186 * Return:
8187 * non-zero (if found)
8188 * -1 (if not found)
8189 *
8190 * Context:
8191 * Kernel context
8192 */
8193 static int
8194 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8195 {
8196 int i, entries;
8197 uint8_t pid_match, wwn_match;
8198 int priority;
8199 uint32_t pid1, pid2;
8200 uint64_t wwn1, wwn2;
8201 struct qla_fcp_prio_entry *pri_entry;
8202 struct qla_hw_data *ha = vha->hw;
8203
8204 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
8205 return -1;
8206
8207 priority = -1;
8208 entries = ha->fcp_prio_cfg->num_entries;
8209 pri_entry = &ha->fcp_prio_cfg->entry[0];
8210
8211 for (i = 0; i < entries; i++) {
8212 pid_match = wwn_match = 0;
8213
8214 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
8215 pri_entry++;
8216 continue;
8217 }
8218
8219 /* check source pid for a match */
8220 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
8221 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
8222 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
8223 if (pid1 == INVALID_PORT_ID)
8224 pid_match++;
8225 else if (pid1 == pid2)
8226 pid_match++;
8227 }
8228
8229 /* check destination pid for a match */
8230 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
8231 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
8232 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
8233 if (pid1 == INVALID_PORT_ID)
8234 pid_match++;
8235 else if (pid1 == pid2)
8236 pid_match++;
8237 }
8238
8239 /* check source WWN for a match */
8240 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
8241 wwn1 = wwn_to_u64(vha->port_name);
8242 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
8243 if (wwn2 == (uint64_t)-1)
8244 wwn_match++;
8245 else if (wwn1 == wwn2)
8246 wwn_match++;
8247 }
8248
8249 /* check destination WWN for a match */
8250 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
8251 wwn1 = wwn_to_u64(fcport->port_name);
8252 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
8253 if (wwn2 == (uint64_t)-1)
8254 wwn_match++;
8255 else if (wwn1 == wwn2)
8256 wwn_match++;
8257 }
8258
8259 if (pid_match == 2 || wwn_match == 2) {
8260 /* Found a matching entry */
8261 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
8262 priority = pri_entry->tag;
8263 break;
8264 }
8265
8266 pri_entry++;
8267 }
8268
8269 return priority;
8270 }
8271
8272 /*
8273 * qla24xx_update_fcport_fcp_prio
8274 * Activates fcp priority for the logged in fc port
8275 *
8276 * Input:
8277 * vha = scsi host structure pointer.
8278 * fcp = port structure pointer.
8279 *
8280 * Return:
8281 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8282 *
8283 * Context:
8284 * Kernel context.
8285 */
8286 int
8287 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8288 {
8289 int ret;
8290 int priority;
8291 uint16_t mb[5];
8292
8293 if (fcport->port_type != FCT_TARGET ||
8294 fcport->loop_id == FC_NO_LOOP_ID)
8295 return QLA_FUNCTION_FAILED;
8296
8297 priority = qla24xx_get_fcp_prio(vha, fcport);
8298 if (priority < 0)
8299 return QLA_FUNCTION_FAILED;
8300
8301 if (IS_P3P_TYPE(vha->hw)) {
8302 fcport->fcp_prio = priority & 0xf;
8303 return QLA_SUCCESS;
8304 }
8305
8306 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
8307 if (ret == QLA_SUCCESS) {
8308 if (fcport->fcp_prio != priority)
8309 ql_dbg(ql_dbg_user, vha, 0x709e,
8310 "Updated FCP_CMND priority - value=%d loop_id=%d "
8311 "port_id=%02x%02x%02x.\n", priority,
8312 fcport->loop_id, fcport->d_id.b.domain,
8313 fcport->d_id.b.area, fcport->d_id.b.al_pa);
8314 fcport->fcp_prio = priority & 0xf;
8315 } else
8316 ql_dbg(ql_dbg_user, vha, 0x704f,
8317 "Unable to update FCP_CMND priority - ret=0x%x for "
8318 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
8319 fcport->d_id.b.domain, fcport->d_id.b.area,
8320 fcport->d_id.b.al_pa);
8321 return ret;
8322 }
8323
8324 /*
8325 * qla24xx_update_all_fcp_prio
8326 * Activates fcp priority for all the logged in ports
8327 *
8328 * Input:
8329 * ha = adapter block pointer.
8330 *
8331 * Return:
8332 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8333 *
8334 * Context:
8335 * Kernel context.
8336 */
8337 int
8338 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
8339 {
8340 int ret;
8341 fc_port_t *fcport;
8342
8343 ret = QLA_FUNCTION_FAILED;
8344 /* We need to set priority for all logged in ports */
8345 list_for_each_entry(fcport, &vha->vp_fcports, list)
8346 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
8347
8348 return ret;
8349 }
8350
8351 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
8352 int vp_idx, bool startqp)
8353 {
8354 int rsp_id = 0;
8355 int req_id = 0;
8356 int i;
8357 struct qla_hw_data *ha = vha->hw;
8358 uint16_t qpair_id = 0;
8359 struct qla_qpair *qpair = NULL;
8360 struct qla_msix_entry *msix;
8361
8362 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
8363 ql_log(ql_log_warn, vha, 0x00181,
8364 "FW/Driver is not multi-queue capable.\n");
8365 return NULL;
8366 }
8367
8368 if (ql2xmqsupport || ql2xnvmeenable) {
8369 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
8370 if (qpair == NULL) {
8371 ql_log(ql_log_warn, vha, 0x0182,
8372 "Failed to allocate memory for queue pair.\n");
8373 return NULL;
8374 }
8375 memset(qpair, 0, sizeof(struct qla_qpair));
8376
8377 qpair->hw = vha->hw;
8378 qpair->vha = vha;
8379 qpair->qp_lock_ptr = &qpair->qp_lock;
8380 spin_lock_init(&qpair->qp_lock);
8381 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
8382
8383 /* Assign available que pair id */
8384 mutex_lock(&ha->mq_lock);
8385 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
8386 if (ha->num_qpairs >= ha->max_qpairs) {
8387 mutex_unlock(&ha->mq_lock);
8388 ql_log(ql_log_warn, vha, 0x0183,
8389 "No resources to create additional q pair.\n");
8390 goto fail_qid_map;
8391 }
8392 ha->num_qpairs++;
8393 set_bit(qpair_id, ha->qpair_qid_map);
8394 ha->queue_pair_map[qpair_id] = qpair;
8395 qpair->id = qpair_id;
8396 qpair->vp_idx = vp_idx;
8397 qpair->fw_started = ha->flags.fw_started;
8398 INIT_LIST_HEAD(&qpair->hints_list);
8399 INIT_LIST_HEAD(&qpair->nvme_done_list);
8400 qpair->chip_reset = ha->base_qpair->chip_reset;
8401 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
8402 qpair->enable_explicit_conf =
8403 ha->base_qpair->enable_explicit_conf;
8404
8405 for (i = 0; i < ha->msix_count; i++) {
8406 msix = &ha->msix_entries[i];
8407 if (msix->in_use)
8408 continue;
8409 qpair->msix = msix;
8410 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
8411 "Vector %x selected for qpair\n", msix->vector);
8412 break;
8413 }
8414 if (!qpair->msix) {
8415 ql_log(ql_log_warn, vha, 0x0184,
8416 "Out of MSI-X vectors!.\n");
8417 goto fail_msix;
8418 }
8419
8420 qpair->msix->in_use = 1;
8421 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
8422 qpair->pdev = ha->pdev;
8423 if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
8424 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
8425
8426 mutex_unlock(&ha->mq_lock);
8427
8428 /* Create response queue first */
8429 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
8430 if (!rsp_id) {
8431 ql_log(ql_log_warn, vha, 0x0185,
8432 "Failed to create response queue.\n");
8433 goto fail_rsp;
8434 }
8435
8436 qpair->rsp = ha->rsp_q_map[rsp_id];
8437
8438 /* Create request queue */
8439 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
8440 startqp);
8441 if (!req_id) {
8442 ql_log(ql_log_warn, vha, 0x0186,
8443 "Failed to create request queue.\n");
8444 goto fail_req;
8445 }
8446
8447 qpair->req = ha->req_q_map[req_id];
8448 qpair->rsp->req = qpair->req;
8449 qpair->rsp->qpair = qpair;
8450 /* init qpair to this cpu. Will adjust at run time. */
8451 qla_cpu_update(qpair, smp_processor_id());
8452
8453 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
8454 if (ha->fw_attributes & BIT_4)
8455 qpair->difdix_supported = 1;
8456 }
8457
8458 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
8459 if (!qpair->srb_mempool) {
8460 ql_log(ql_log_warn, vha, 0xd036,
8461 "Failed to create srb mempool for qpair %d\n",
8462 qpair->id);
8463 goto fail_mempool;
8464 }
8465
8466 /* Mark as online */
8467 qpair->online = 1;
8468
8469 if (!vha->flags.qpairs_available)
8470 vha->flags.qpairs_available = 1;
8471
8472 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
8473 "Request/Response queue pair created, id %d\n",
8474 qpair->id);
8475 ql_dbg(ql_dbg_init, vha, 0x0187,
8476 "Request/Response queue pair created, id %d\n",
8477 qpair->id);
8478 }
8479 return qpair;
8480
8481 fail_mempool:
8482 fail_req:
8483 qla25xx_delete_rsp_que(vha, qpair->rsp);
8484 fail_rsp:
8485 mutex_lock(&ha->mq_lock);
8486 qpair->msix->in_use = 0;
8487 list_del(&qpair->qp_list_elem);
8488 if (list_empty(&vha->qp_list))
8489 vha->flags.qpairs_available = 0;
8490 fail_msix:
8491 ha->queue_pair_map[qpair_id] = NULL;
8492 clear_bit(qpair_id, ha->qpair_qid_map);
8493 ha->num_qpairs--;
8494 mutex_unlock(&ha->mq_lock);
8495 fail_qid_map:
8496 kfree(qpair);
8497 return NULL;
8498 }
8499
8500 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
8501 {
8502 int ret = QLA_FUNCTION_FAILED;
8503 struct qla_hw_data *ha = qpair->hw;
8504
8505 qpair->delete_in_progress = 1;
8506 while (atomic_read(&qpair->ref_count))
8507 msleep(500);
8508
8509 ret = qla25xx_delete_req_que(vha, qpair->req);
8510 if (ret != QLA_SUCCESS)
8511 goto fail;
8512
8513 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
8514 if (ret != QLA_SUCCESS)
8515 goto fail;
8516
8517 mutex_lock(&ha->mq_lock);
8518 ha->queue_pair_map[qpair->id] = NULL;
8519 clear_bit(qpair->id, ha->qpair_qid_map);
8520 ha->num_qpairs--;
8521 list_del(&qpair->qp_list_elem);
8522 if (list_empty(&vha->qp_list)) {
8523 vha->flags.qpairs_available = 0;
8524 vha->flags.qpairs_req_created = 0;
8525 vha->flags.qpairs_rsp_created = 0;
8526 }
8527 mempool_destroy(qpair->srb_mempool);
8528 kfree(qpair);
8529 mutex_unlock(&ha->mq_lock);
8530
8531 return QLA_SUCCESS;
8532 fail:
8533 return ret;
8534 }
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