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Merge branch 'overlayfs-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mszer...
[mirror_ubuntu-hirsute-kernel.git] / drivers / scsi / qla2xxx / qla_init.c
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_gbl.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/vmalloc.h>
13
14 #include "qla_devtbl.h"
15
16 #ifdef CONFIG_SPARC
17 #include <asm/prom.h>
18 #endif
19
20 #include <target/target_core_base.h>
21 #include "qla_target.h"
22
23 /*
24 * QLogic ISP2x00 Hardware Support Function Prototypes.
25 */
26 static int qla2x00_isp_firmware(scsi_qla_host_t *);
27 static int qla2x00_setup_chip(scsi_qla_host_t *);
28 static int qla2x00_fw_ready(scsi_qla_host_t *);
29 static int qla2x00_configure_hba(scsi_qla_host_t *);
30 static int qla2x00_configure_loop(scsi_qla_host_t *);
31 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
32 static int qla2x00_configure_fabric(scsi_qla_host_t *);
33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
34 static int qla2x00_restart_isp(scsi_qla_host_t *);
35
36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
37 static int qla84xx_init_chip(scsi_qla_host_t *);
38 static int qla25xx_init_queues(struct qla_hw_data *);
39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *);
40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *,
41 struct event_arg *);
42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
43 struct event_arg *);
44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
45
46 /* SRB Extensions ---------------------------------------------------------- */
47
48 void
49 qla2x00_sp_timeout(struct timer_list *t)
50 {
51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
52 struct srb_iocb *iocb;
53 scsi_qla_host_t *vha = sp->vha;
54 struct req_que *req;
55 unsigned long flags;
56
57 spin_lock_irqsave(&vha->hw->hardware_lock, flags);
58 req = vha->hw->req_q_map[0];
59 req->outstanding_cmds[sp->handle] = NULL;
60 iocb = &sp->u.iocb_cmd;
61 iocb->timeout(sp);
62 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
63 }
64
65 void
66 qla2x00_sp_free(void *ptr)
67 {
68 srb_t *sp = ptr;
69 struct srb_iocb *iocb = &sp->u.iocb_cmd;
70
71 del_timer(&iocb->timer);
72 qla2x00_rel_sp(sp);
73 }
74
75 /* Asynchronous Login/Logout Routines -------------------------------------- */
76
77 unsigned long
78 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
79 {
80 unsigned long tmo;
81 struct qla_hw_data *ha = vha->hw;
82
83 /* Firmware should use switch negotiated r_a_tov for timeout. */
84 tmo = ha->r_a_tov / 10 * 2;
85 if (IS_QLAFX00(ha)) {
86 tmo = FX00_DEF_RATOV * 2;
87 } else if (!IS_FWI2_CAPABLE(ha)) {
88 /*
89 * Except for earlier ISPs where the timeout is seeded from the
90 * initialization control block.
91 */
92 tmo = ha->login_timeout;
93 }
94 return tmo;
95 }
96
97 void
98 qla2x00_async_iocb_timeout(void *data)
99 {
100 srb_t *sp = data;
101 fc_port_t *fcport = sp->fcport;
102 struct srb_iocb *lio = &sp->u.iocb_cmd;
103
104 if (fcport) {
105 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
106 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
107 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
108
109 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
110 } else {
111 pr_info("Async-%s timeout - hdl=%x.\n",
112 sp->name, sp->handle);
113 }
114
115 switch (sp->type) {
116 case SRB_LOGIN_CMD:
117 /* Retry as needed. */
118 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
119 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
120 QLA_LOGIO_LOGIN_RETRIED : 0;
121 sp->done(sp, QLA_FUNCTION_TIMEOUT);
122 break;
123 case SRB_LOGOUT_CMD:
124 case SRB_CT_PTHRU_CMD:
125 case SRB_MB_IOCB:
126 case SRB_NACK_PLOGI:
127 case SRB_NACK_PRLI:
128 case SRB_NACK_LOGO:
129 case SRB_CTRL_VP:
130 sp->done(sp, QLA_FUNCTION_TIMEOUT);
131 break;
132 }
133 }
134
135 static void
136 qla2x00_async_login_sp_done(void *ptr, int res)
137 {
138 srb_t *sp = ptr;
139 struct scsi_qla_host *vha = sp->vha;
140 struct srb_iocb *lio = &sp->u.iocb_cmd;
141 struct event_arg ea;
142
143 ql_dbg(ql_dbg_disc, vha, 0x20dd,
144 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
145
146 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
147
148 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
149 memset(&ea, 0, sizeof(ea));
150 ea.event = FCME_PLOGI_DONE;
151 ea.fcport = sp->fcport;
152 ea.data[0] = lio->u.logio.data[0];
153 ea.data[1] = lio->u.logio.data[1];
154 ea.iop[0] = lio->u.logio.iop[0];
155 ea.iop[1] = lio->u.logio.iop[1];
156 ea.sp = sp;
157 qla2x00_fcport_event_handler(vha, &ea);
158 }
159
160 sp->free(sp);
161 }
162
163 int
164 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
165 uint16_t *data)
166 {
167 srb_t *sp;
168 struct srb_iocb *lio;
169 int rval = QLA_FUNCTION_FAILED;
170
171 if (!vha->flags.online)
172 goto done;
173
174 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
175 if (!sp)
176 goto done;
177
178 fcport->flags |= FCF_ASYNC_SENT;
179 fcport->logout_completed = 0;
180
181 fcport->disc_state = DSC_LOGIN_PEND;
182 sp->type = SRB_LOGIN_CMD;
183 sp->name = "login";
184 sp->gen1 = fcport->rscn_gen;
185 sp->gen2 = fcport->login_gen;
186 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
187
188 lio = &sp->u.iocb_cmd;
189 lio->timeout = qla2x00_async_iocb_timeout;
190 sp->done = qla2x00_async_login_sp_done;
191 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
192
193 if (fcport->fc4f_nvme)
194 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
195
196 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
197 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
198 rval = qla2x00_start_sp(sp);
199 if (rval != QLA_SUCCESS) {
200 fcport->flags |= FCF_LOGIN_NEEDED;
201 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
202 goto done_free_sp;
203 }
204
205 ql_dbg(ql_dbg_disc, vha, 0x2072,
206 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x "
207 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id,
208 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
209 fcport->login_retry);
210 return rval;
211
212 done_free_sp:
213 sp->free(sp);
214 fcport->flags &= ~FCF_ASYNC_SENT;
215 done:
216 fcport->flags &= ~FCF_ASYNC_ACTIVE;
217 return rval;
218 }
219
220 static void
221 qla2x00_async_logout_sp_done(void *ptr, int res)
222 {
223 srb_t *sp = ptr;
224
225 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
226 sp->fcport->login_gen++;
227 qlt_logo_completion_handler(sp->fcport, res);
228 sp->free(sp);
229 }
230
231 int
232 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
233 {
234 srb_t *sp;
235 struct srb_iocb *lio;
236 int rval = QLA_FUNCTION_FAILED;
237
238 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
239 return rval;
240
241 fcport->flags |= FCF_ASYNC_SENT;
242 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
243 if (!sp)
244 goto done;
245
246 sp->type = SRB_LOGOUT_CMD;
247 sp->name = "logout";
248 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
249
250 lio = &sp->u.iocb_cmd;
251 lio->timeout = qla2x00_async_iocb_timeout;
252 sp->done = qla2x00_async_logout_sp_done;
253 rval = qla2x00_start_sp(sp);
254 if (rval != QLA_SUCCESS)
255 goto done_free_sp;
256
257 ql_dbg(ql_dbg_disc, vha, 0x2070,
258 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n",
259 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
260 fcport->d_id.b.area, fcport->d_id.b.al_pa,
261 fcport->port_name);
262 return rval;
263
264 done_free_sp:
265 sp->free(sp);
266 done:
267 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
268 return rval;
269 }
270
271 void
272 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
273 uint16_t *data)
274 {
275 fcport->flags &= ~FCF_ASYNC_ACTIVE;
276 /* Don't re-login in target mode */
277 if (!fcport->tgt_session)
278 qla2x00_mark_device_lost(vha, fcport, 1, 0);
279 qlt_logo_completion_handler(fcport, data[0]);
280 }
281
282 static void
283 qla2x00_async_prlo_sp_done(void *s, int res)
284 {
285 srb_t *sp = (srb_t *)s;
286 struct srb_iocb *lio = &sp->u.iocb_cmd;
287 struct scsi_qla_host *vha = sp->vha;
288
289 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
290 if (!test_bit(UNLOADING, &vha->dpc_flags))
291 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
292 lio->u.logio.data);
293 sp->free(sp);
294 }
295
296 int
297 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
298 {
299 srb_t *sp;
300 struct srb_iocb *lio;
301 int rval;
302
303 rval = QLA_FUNCTION_FAILED;
304 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
305 if (!sp)
306 goto done;
307
308 sp->type = SRB_PRLO_CMD;
309 sp->name = "prlo";
310 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
311
312 lio = &sp->u.iocb_cmd;
313 lio->timeout = qla2x00_async_iocb_timeout;
314 sp->done = qla2x00_async_prlo_sp_done;
315 rval = qla2x00_start_sp(sp);
316 if (rval != QLA_SUCCESS)
317 goto done_free_sp;
318
319 ql_dbg(ql_dbg_disc, vha, 0x2070,
320 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
321 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
322 fcport->d_id.b.area, fcport->d_id.b.al_pa);
323 return rval;
324
325 done_free_sp:
326 sp->free(sp);
327 done:
328 fcport->flags &= ~FCF_ASYNC_ACTIVE;
329 return rval;
330 }
331
332 static
333 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
334 {
335 struct fc_port *fcport = ea->fcport;
336
337 ql_dbg(ql_dbg_disc, vha, 0x20d2,
338 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
339 __func__, fcport->port_name, fcport->disc_state,
340 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
341 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
342
343 if (ea->data[0] != MBS_COMMAND_COMPLETE) {
344 ql_dbg(ql_dbg_disc, vha, 0x2066,
345 "%s %8phC: adisc fail: post delete\n",
346 __func__, ea->fcport->port_name);
347 qlt_schedule_sess_for_deletion(ea->fcport);
348 return;
349 }
350
351 if (ea->fcport->disc_state == DSC_DELETE_PEND)
352 return;
353
354 if (ea->sp->gen2 != ea->fcport->login_gen) {
355 /* target side must have changed it. */
356 ql_dbg(ql_dbg_disc, vha, 0x20d3,
357 "%s %8phC generation changed\n",
358 __func__, ea->fcport->port_name);
359 return;
360 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
361 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n",
362 __func__, __LINE__, ea->fcport->port_name);
363 qla24xx_post_gidpn_work(vha, ea->fcport);
364 return;
365 }
366
367 __qla24xx_handle_gpdb_event(vha, ea);
368 }
369
370 static void
371 qla2x00_async_adisc_sp_done(void *ptr, int res)
372 {
373 srb_t *sp = ptr;
374 struct scsi_qla_host *vha = sp->vha;
375 struct event_arg ea;
376 struct srb_iocb *lio = &sp->u.iocb_cmd;
377
378 ql_dbg(ql_dbg_disc, vha, 0x2066,
379 "Async done-%s res %x %8phC\n",
380 sp->name, res, sp->fcport->port_name);
381
382 sp->fcport->flags &= ~FCF_ASYNC_SENT;
383
384 memset(&ea, 0, sizeof(ea));
385 ea.event = FCME_ADISC_DONE;
386 ea.rc = res;
387 ea.data[0] = lio->u.logio.data[0];
388 ea.data[1] = lio->u.logio.data[1];
389 ea.iop[0] = lio->u.logio.iop[0];
390 ea.iop[1] = lio->u.logio.iop[1];
391 ea.fcport = sp->fcport;
392 ea.sp = sp;
393
394 qla2x00_fcport_event_handler(vha, &ea);
395
396 sp->free(sp);
397 }
398
399 int
400 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
401 uint16_t *data)
402 {
403 srb_t *sp;
404 struct srb_iocb *lio;
405 int rval;
406
407 rval = QLA_FUNCTION_FAILED;
408 fcport->flags |= FCF_ASYNC_SENT;
409 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
410 if (!sp)
411 goto done;
412
413 sp->type = SRB_ADISC_CMD;
414 sp->name = "adisc";
415 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
416
417 lio = &sp->u.iocb_cmd;
418 lio->timeout = qla2x00_async_iocb_timeout;
419 sp->done = qla2x00_async_adisc_sp_done;
420 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
421 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
422 rval = qla2x00_start_sp(sp);
423 if (rval != QLA_SUCCESS)
424 goto done_free_sp;
425
426 ql_dbg(ql_dbg_disc, vha, 0x206f,
427 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
428 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
429 return rval;
430
431 done_free_sp:
432 sp->free(sp);
433 done:
434 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
435 qla2x00_post_async_adisc_work(vha, fcport, data);
436 return rval;
437 }
438
439 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
440 struct event_arg *ea)
441 {
442 fc_port_t *fcport, *conflict_fcport;
443 struct get_name_list_extended *e;
444 u16 i, n, found = 0, loop_id;
445 port_id_t id;
446 u64 wwn;
447 u16 data[2];
448 u8 current_login_state;
449
450 fcport = ea->fcport;
451 ql_dbg(ql_dbg_disc, vha, 0xffff,
452 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n",
453 __func__, fcport->port_name, fcport->disc_state,
454 fcport->fw_login_state, ea->rc,
455 fcport->login_gen, fcport->last_login_gen,
456 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id);
457
458 if (fcport->disc_state == DSC_DELETE_PEND)
459 return;
460
461 if (ea->rc) { /* rval */
462 if (fcport->login_retry == 0) {
463 fcport->login_retry = vha->hw->login_retry_count;
464 ql_dbg(ql_dbg_disc, vha, 0x20de,
465 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
466 fcport->port_name, fcport->login_retry);
467 }
468 return;
469 }
470
471 if (fcport->last_rscn_gen != fcport->rscn_gen) {
472 ql_dbg(ql_dbg_disc, vha, 0x20df,
473 "%s %8phC rscn gen changed rscn %d|%d \n",
474 __func__, fcport->port_name,
475 fcport->last_rscn_gen, fcport->rscn_gen);
476 qla24xx_post_gidpn_work(vha, fcport);
477 return;
478 } else if (fcport->last_login_gen != fcport->login_gen) {
479 ql_dbg(ql_dbg_disc, vha, 0x20e0,
480 "%s %8phC login gen changed\n",
481 __func__, fcport->port_name);
482 return;
483 }
484
485 n = ea->data[0] / sizeof(struct get_name_list_extended);
486
487 ql_dbg(ql_dbg_disc, vha, 0x20e1,
488 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
489 __func__, __LINE__, fcport->port_name, n,
490 fcport->d_id.b.domain, fcport->d_id.b.area,
491 fcport->d_id.b.al_pa, fcport->loop_id);
492
493 for (i = 0; i < n; i++) {
494 e = &vha->gnl.l[i];
495 wwn = wwn_to_u64(e->port_name);
496
497 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
498 continue;
499
500 found = 1;
501 id.b.domain = e->port_id[2];
502 id.b.area = e->port_id[1];
503 id.b.al_pa = e->port_id[0];
504 id.b.rsvd_1 = 0;
505
506 loop_id = le16_to_cpu(e->nport_handle);
507 loop_id = (loop_id & 0x7fff);
508
509 ql_dbg(ql_dbg_disc, vha, 0x20e2,
510 "%s found %8phC CLS [%d|%d] ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n",
511 __func__, fcport->port_name,
512 e->current_login_state, fcport->fw_login_state,
513 id.b.domain, id.b.area, id.b.al_pa,
514 fcport->d_id.b.domain, fcport->d_id.b.area,
515 fcport->d_id.b.al_pa, loop_id, fcport->loop_id);
516
517 if ((id.b24 != fcport->d_id.b24) ||
518 ((fcport->loop_id != FC_NO_LOOP_ID) &&
519 (fcport->loop_id != loop_id))) {
520 ql_dbg(ql_dbg_disc, vha, 0x20e3,
521 "%s %d %8phC post del sess\n",
522 __func__, __LINE__, fcport->port_name);
523 qlt_schedule_sess_for_deletion(fcport);
524 return;
525 }
526
527 fcport->loop_id = loop_id;
528
529 wwn = wwn_to_u64(fcport->port_name);
530 qlt_find_sess_invalidate_other(vha, wwn,
531 id, loop_id, &conflict_fcport);
532
533 if (conflict_fcport) {
534 /*
535 * Another share fcport share the same loop_id &
536 * nport id. Conflict fcport needs to finish
537 * cleanup before this fcport can proceed to login.
538 */
539 conflict_fcport->conflict = fcport;
540 fcport->login_pause = 1;
541 }
542
543 if (fcport->fc4f_nvme)
544 current_login_state = e->current_login_state >> 4;
545 else
546 current_login_state = e->current_login_state & 0xf;
547
548 switch (current_login_state) {
549 case DSC_LS_PRLI_COMP:
550 ql_dbg(ql_dbg_disc, vha, 0x20e4,
551 "%s %d %8phC post gpdb\n",
552 __func__, __LINE__, fcport->port_name);
553
554 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
555 fcport->port_type = FCT_INITIATOR;
556 else
557 fcport->port_type = FCT_TARGET;
558
559 data[0] = data[1] = 0;
560 qla2x00_post_async_adisc_work(vha, fcport, data);
561 break;
562 case DSC_LS_PORT_UNAVAIL:
563 default:
564 if (fcport->loop_id == FC_NO_LOOP_ID) {
565 qla2x00_find_new_loop_id(vha, fcport);
566 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
567 }
568 ql_dbg(ql_dbg_disc, vha, 0x20e5,
569 "%s %d %8phC\n",
570 __func__, __LINE__, fcport->port_name);
571 qla24xx_fcport_handle_login(vha, fcport);
572 break;
573 }
574 }
575
576 if (!found) {
577 /* fw has no record of this port */
578 for (i = 0; i < n; i++) {
579 e = &vha->gnl.l[i];
580 id.b.domain = e->port_id[0];
581 id.b.area = e->port_id[1];
582 id.b.al_pa = e->port_id[2];
583 id.b.rsvd_1 = 0;
584 loop_id = le16_to_cpu(e->nport_handle);
585
586 if (fcport->d_id.b24 == id.b24) {
587 conflict_fcport =
588 qla2x00_find_fcport_by_wwpn(vha,
589 e->port_name, 0);
590 ql_dbg(ql_dbg_disc, vha, 0x20e6,
591 "%s %d %8phC post del sess\n",
592 __func__, __LINE__,
593 conflict_fcport->port_name);
594 qlt_schedule_sess_for_deletion
595 (conflict_fcport);
596 }
597
598 /* FW already picked this loop id for another fcport */
599 if (fcport->loop_id == loop_id)
600 fcport->loop_id = FC_NO_LOOP_ID;
601 }
602 qla24xx_fcport_handle_login(vha, fcport);
603 }
604 } /* gnl_event */
605
606 static void
607 qla24xx_async_gnl_sp_done(void *s, int res)
608 {
609 struct srb *sp = s;
610 struct scsi_qla_host *vha = sp->vha;
611 unsigned long flags;
612 struct fc_port *fcport = NULL, *tf;
613 u16 i, n = 0, loop_id;
614 struct event_arg ea;
615 struct get_name_list_extended *e;
616 u64 wwn;
617 struct list_head h;
618 bool found = false;
619
620 ql_dbg(ql_dbg_disc, vha, 0x20e7,
621 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
622 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
623 sp->u.iocb_cmd.u.mbx.in_mb[2]);
624
625 memset(&ea, 0, sizeof(ea));
626 ea.sp = sp;
627 ea.rc = res;
628 ea.event = FCME_GNL_DONE;
629
630 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
631 sizeof(struct get_name_list_extended)) {
632 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
633 sizeof(struct get_name_list_extended);
634 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
635 }
636
637 for (i = 0; i < n; i++) {
638 e = &vha->gnl.l[i];
639 loop_id = le16_to_cpu(e->nport_handle);
640 /* mask out reserve bit */
641 loop_id = (loop_id & 0x7fff);
642 set_bit(loop_id, vha->hw->loop_id_map);
643 wwn = wwn_to_u64(e->port_name);
644
645 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8,
646 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n",
647 __func__, (void *)&wwn, e->port_id[2], e->port_id[1],
648 e->port_id[0], e->current_login_state, e->last_login_state,
649 (loop_id & 0x7fff));
650 }
651
652 spin_lock_irqsave(&vha->gnl.fcports_lock, flags);
653
654 INIT_LIST_HEAD(&h);
655 fcport = tf = NULL;
656 if (!list_empty(&vha->gnl.fcports))
657 list_splice_init(&vha->gnl.fcports, &h);
658
659 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
660 list_del_init(&fcport->gnl_entry);
661 spin_lock(&vha->hw->tgt.sess_lock);
662 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
663 spin_unlock(&vha->hw->tgt.sess_lock);
664 ea.fcport = fcport;
665
666 qla2x00_fcport_event_handler(vha, &ea);
667 }
668 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags);
669
670 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
671 /* create new fcport if fw has knowledge of new sessions */
672 for (i = 0; i < n; i++) {
673 port_id_t id;
674 u64 wwnn;
675
676 e = &vha->gnl.l[i];
677 wwn = wwn_to_u64(e->port_name);
678
679 found = false;
680 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
681 if (!memcmp((u8 *)&wwn, fcport->port_name,
682 WWN_SIZE)) {
683 found = true;
684 break;
685 }
686 }
687
688 id.b.domain = e->port_id[2];
689 id.b.area = e->port_id[1];
690 id.b.al_pa = e->port_id[0];
691 id.b.rsvd_1 = 0;
692
693 if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
694 ql_dbg(ql_dbg_disc, vha, 0x2065,
695 "%s %d %8phC %06x post new sess\n",
696 __func__, __LINE__, (u8 *)&wwn, id.b24);
697 wwnn = wwn_to_u64(e->node_name);
698 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
699 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN);
700 }
701 }
702
703 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
704
705 sp->free(sp);
706 }
707
708 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
709 {
710 srb_t *sp;
711 struct srb_iocb *mbx;
712 int rval = QLA_FUNCTION_FAILED;
713 unsigned long flags;
714 u16 *mb;
715
716 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
717 return rval;
718
719 ql_dbg(ql_dbg_disc, vha, 0x20d9,
720 "Async-gnlist WWPN %8phC \n", fcport->port_name);
721
722 spin_lock_irqsave(&vha->gnl.fcports_lock, flags);
723 if (!list_empty(&fcport->gnl_entry)) {
724 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags);
725 rval = QLA_SUCCESS;
726 goto done;
727 }
728
729 spin_lock(&vha->hw->tgt.sess_lock);
730 fcport->disc_state = DSC_GNL;
731 fcport->last_rscn_gen = fcport->rscn_gen;
732 fcport->last_login_gen = fcport->login_gen;
733 spin_unlock(&vha->hw->tgt.sess_lock);
734
735 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
736 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags);
737
738 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
739 if (!sp)
740 goto done;
741
742 fcport->flags |= FCF_ASYNC_SENT;
743 sp->type = SRB_MB_IOCB;
744 sp->name = "gnlist";
745 sp->gen1 = fcport->rscn_gen;
746 sp->gen2 = fcport->login_gen;
747
748 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
749
750 mb = sp->u.iocb_cmd.u.mbx.out_mb;
751 mb[0] = MBC_PORT_NODE_NAME_LIST;
752 mb[1] = BIT_2 | BIT_3;
753 mb[2] = MSW(vha->gnl.ldma);
754 mb[3] = LSW(vha->gnl.ldma);
755 mb[6] = MSW(MSD(vha->gnl.ldma));
756 mb[7] = LSW(MSD(vha->gnl.ldma));
757 mb[8] = vha->gnl.size;
758 mb[9] = vha->vp_idx;
759
760 mbx = &sp->u.iocb_cmd;
761 mbx->timeout = qla2x00_async_iocb_timeout;
762
763 sp->done = qla24xx_async_gnl_sp_done;
764
765 rval = qla2x00_start_sp(sp);
766 if (rval != QLA_SUCCESS)
767 goto done_free_sp;
768
769 ql_dbg(ql_dbg_disc, vha, 0x20da,
770 "Async-%s - OUT WWPN %8phC hndl %x\n",
771 sp->name, fcport->port_name, sp->handle);
772
773 return rval;
774
775 done_free_sp:
776 sp->free(sp);
777 fcport->flags &= ~FCF_ASYNC_SENT;
778 done:
779 return rval;
780 }
781
782 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
783 {
784 struct qla_work_evt *e;
785
786 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
787 if (!e)
788 return QLA_FUNCTION_FAILED;
789
790 e->u.fcport.fcport = fcport;
791 fcport->flags |= FCF_ASYNC_ACTIVE;
792 return qla2x00_post_work(vha, e);
793 }
794
795 static
796 void qla24xx_async_gpdb_sp_done(void *s, int res)
797 {
798 struct srb *sp = s;
799 struct scsi_qla_host *vha = sp->vha;
800 struct qla_hw_data *ha = vha->hw;
801 fc_port_t *fcport = sp->fcport;
802 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
803 struct event_arg ea;
804
805 ql_dbg(ql_dbg_disc, vha, 0x20db,
806 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
807 sp->name, res, fcport->port_name, mb[1], mb[2]);
808
809 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
810
811 memset(&ea, 0, sizeof(ea));
812 ea.event = FCME_GPDB_DONE;
813 ea.fcport = fcport;
814 ea.sp = sp;
815
816 qla2x00_fcport_event_handler(vha, &ea);
817
818 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
819 sp->u.iocb_cmd.u.mbx.in_dma);
820
821 sp->free(sp);
822 }
823
824 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
825 {
826 struct qla_work_evt *e;
827
828 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
829 if (!e)
830 return QLA_FUNCTION_FAILED;
831
832 e->u.fcport.fcport = fcport;
833
834 return qla2x00_post_work(vha, e);
835 }
836
837 static void
838 qla2x00_async_prli_sp_done(void *ptr, int res)
839 {
840 srb_t *sp = ptr;
841 struct scsi_qla_host *vha = sp->vha;
842 struct srb_iocb *lio = &sp->u.iocb_cmd;
843 struct event_arg ea;
844
845 ql_dbg(ql_dbg_disc, vha, 0x2129,
846 "%s %8phC res %d \n", __func__,
847 sp->fcport->port_name, res);
848
849 sp->fcport->flags &= ~FCF_ASYNC_SENT;
850
851 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
852 memset(&ea, 0, sizeof(ea));
853 ea.event = FCME_PRLI_DONE;
854 ea.fcport = sp->fcport;
855 ea.data[0] = lio->u.logio.data[0];
856 ea.data[1] = lio->u.logio.data[1];
857 ea.iop[0] = lio->u.logio.iop[0];
858 ea.iop[1] = lio->u.logio.iop[1];
859 ea.sp = sp;
860
861 qla2x00_fcport_event_handler(vha, &ea);
862 }
863
864 sp->free(sp);
865 }
866
867 int
868 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
869 {
870 srb_t *sp;
871 struct srb_iocb *lio;
872 int rval = QLA_FUNCTION_FAILED;
873
874 if (!vha->flags.online)
875 return rval;
876
877 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
878 fcport->fw_login_state == DSC_LS_PLOGI_COMP ||
879 fcport->fw_login_state == DSC_LS_PRLI_PEND)
880 return rval;
881
882 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
883 if (!sp)
884 return rval;
885
886 fcport->flags |= FCF_ASYNC_SENT;
887 fcport->logout_completed = 0;
888
889 sp->type = SRB_PRLI_CMD;
890 sp->name = "prli";
891 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
892
893 lio = &sp->u.iocb_cmd;
894 lio->timeout = qla2x00_async_iocb_timeout;
895 sp->done = qla2x00_async_prli_sp_done;
896 lio->u.logio.flags = 0;
897
898 if (fcport->fc4f_nvme)
899 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
900
901 rval = qla2x00_start_sp(sp);
902 if (rval != QLA_SUCCESS) {
903 fcport->flags |= FCF_LOGIN_NEEDED;
904 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
905 goto done_free_sp;
906 }
907
908 ql_dbg(ql_dbg_disc, vha, 0x211b,
909 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d.\n",
910 fcport->port_name, sp->handle, fcport->loop_id,
911 fcport->d_id.b24, fcport->login_retry);
912
913 return rval;
914
915 done_free_sp:
916 sp->free(sp);
917 fcport->flags &= ~FCF_ASYNC_SENT;
918 return rval;
919 }
920
921 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
922 {
923 struct qla_work_evt *e;
924
925 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
926 if (!e)
927 return QLA_FUNCTION_FAILED;
928
929 e->u.fcport.fcport = fcport;
930 e->u.fcport.opt = opt;
931 fcport->flags |= FCF_ASYNC_ACTIVE;
932 return qla2x00_post_work(vha, e);
933 }
934
935 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
936 {
937 srb_t *sp;
938 struct srb_iocb *mbx;
939 int rval = QLA_FUNCTION_FAILED;
940 u16 *mb;
941 dma_addr_t pd_dma;
942 struct port_database_24xx *pd;
943 struct qla_hw_data *ha = vha->hw;
944
945 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
946 return rval;
947
948 fcport->disc_state = DSC_GPDB;
949
950 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
951 if (!sp)
952 goto done;
953
954 fcport->flags |= FCF_ASYNC_SENT;
955 sp->type = SRB_MB_IOCB;
956 sp->name = "gpdb";
957 sp->gen1 = fcport->rscn_gen;
958 sp->gen2 = fcport->login_gen;
959 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
960
961 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
962 if (pd == NULL) {
963 ql_log(ql_log_warn, vha, 0xd043,
964 "Failed to allocate port database structure.\n");
965 goto done_free_sp;
966 }
967
968 mb = sp->u.iocb_cmd.u.mbx.out_mb;
969 mb[0] = MBC_GET_PORT_DATABASE;
970 mb[1] = fcport->loop_id;
971 mb[2] = MSW(pd_dma);
972 mb[3] = LSW(pd_dma);
973 mb[6] = MSW(MSD(pd_dma));
974 mb[7] = LSW(MSD(pd_dma));
975 mb[9] = vha->vp_idx;
976 mb[10] = opt;
977
978 mbx = &sp->u.iocb_cmd;
979 mbx->timeout = qla2x00_async_iocb_timeout;
980 mbx->u.mbx.in = (void *)pd;
981 mbx->u.mbx.in_dma = pd_dma;
982
983 sp->done = qla24xx_async_gpdb_sp_done;
984
985 rval = qla2x00_start_sp(sp);
986 if (rval != QLA_SUCCESS)
987 goto done_free_sp;
988
989 ql_dbg(ql_dbg_disc, vha, 0x20dc,
990 "Async-%s %8phC hndl %x opt %x\n",
991 sp->name, fcport->port_name, sp->handle, opt);
992
993 return rval;
994
995 done_free_sp:
996 if (pd)
997 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
998
999 sp->free(sp);
1000 fcport->flags &= ~FCF_ASYNC_SENT;
1001 done:
1002 qla24xx_post_gpdb_work(vha, fcport, opt);
1003 return rval;
1004 }
1005
1006 static
1007 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1008 {
1009 unsigned long flags;
1010
1011 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1012 ea->fcport->login_gen++;
1013 ea->fcport->deleted = 0;
1014 ea->fcport->logout_on_delete = 1;
1015
1016 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1017 vha->fcport_count++;
1018 ea->fcport->login_succ = 1;
1019
1020 if (!IS_IIDMA_CAPABLE(vha->hw) ||
1021 !vha->hw->flags.gpsc_supported) {
1022 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1023 "%s %d %8phC post upd_fcport fcp_cnt %d\n",
1024 __func__, __LINE__, ea->fcport->port_name,
1025 vha->fcport_count);
1026
1027 qla24xx_post_upd_fcport_work(vha, ea->fcport);
1028 } else {
1029 if (ea->fcport->id_changed) {
1030 ea->fcport->id_changed = 0;
1031 ql_dbg(ql_dbg_disc, vha, 0x20d7,
1032 "%s %d %8phC post gfpnid fcp_cnt %d\n",
1033 __func__, __LINE__, ea->fcport->port_name,
1034 vha->fcport_count);
1035 qla24xx_post_gfpnid_work(vha, ea->fcport);
1036 } else {
1037 ql_dbg(ql_dbg_disc, vha, 0x20d7,
1038 "%s %d %8phC post gpsc fcp_cnt %d\n",
1039 __func__, __LINE__, ea->fcport->port_name,
1040 vha->fcport_count);
1041 qla24xx_post_gpsc_work(vha, ea->fcport);
1042 }
1043 }
1044 } else if (ea->fcport->login_succ) {
1045 /*
1046 * We have an existing session. A late RSCN delivery
1047 * must have triggered the session to be re-validate.
1048 * Session is still valid.
1049 */
1050 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1051 "%s %d %8phC session revalidate success\n",
1052 __func__, __LINE__, ea->fcport->port_name);
1053 ea->fcport->disc_state = DSC_LOGIN_COMPLETE;
1054 }
1055 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1056 }
1057
1058 static
1059 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1060 {
1061 fc_port_t *fcport = ea->fcport;
1062 struct port_database_24xx *pd;
1063 struct srb *sp = ea->sp;
1064 uint8_t ls;
1065
1066 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1067
1068 fcport->flags &= ~FCF_ASYNC_SENT;
1069
1070 ql_dbg(ql_dbg_disc, vha, 0x20d2,
1071 "%s %8phC DS %d LS %d rc %d\n", __func__, fcport->port_name,
1072 fcport->disc_state, pd->current_login_state, ea->rc);
1073
1074 if (fcport->disc_state == DSC_DELETE_PEND)
1075 return;
1076
1077 if (fcport->fc4f_nvme)
1078 ls = pd->current_login_state >> 4;
1079 else
1080 ls = pd->current_login_state & 0xf;
1081
1082 switch (ls) {
1083 case PDS_PRLI_COMPLETE:
1084 __qla24xx_parse_gpdb(vha, fcport, pd);
1085 break;
1086 case PDS_PLOGI_PENDING:
1087 case PDS_PLOGI_COMPLETE:
1088 case PDS_PRLI_PENDING:
1089 case PDS_PRLI2_PENDING:
1090 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC relogin needed\n",
1091 __func__, __LINE__, fcport->port_name);
1092 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1093 return;
1094 case PDS_LOGO_PENDING:
1095 case PDS_PORT_UNAVAILABLE:
1096 default:
1097 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1098 __func__, __LINE__, fcport->port_name);
1099 qlt_schedule_sess_for_deletion(fcport);
1100 return;
1101 }
1102 __qla24xx_handle_gpdb_event(vha, ea);
1103 } /* gpdb event */
1104
1105 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1106 {
1107 u8 login = 0;
1108 int rc;
1109
1110 if (qla_tgt_mode_enabled(vha))
1111 return;
1112
1113 if (qla_dual_mode_enabled(vha)) {
1114 if (N2N_TOPO(vha->hw)) {
1115 u64 mywwn, wwn;
1116
1117 mywwn = wwn_to_u64(vha->port_name);
1118 wwn = wwn_to_u64(fcport->port_name);
1119 if (mywwn > wwn)
1120 login = 1;
1121 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1122 && time_after_eq(jiffies,
1123 fcport->plogi_nack_done_deadline))
1124 login = 1;
1125 } else {
1126 login = 1;
1127 }
1128 } else {
1129 /* initiator mode */
1130 login = 1;
1131 }
1132
1133 if (login) {
1134 if (fcport->loop_id == FC_NO_LOOP_ID) {
1135 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1136 rc = qla2x00_find_new_loop_id(vha, fcport);
1137 if (rc) {
1138 ql_dbg(ql_dbg_disc, vha, 0x20e6,
1139 "%s %d %8phC post del sess - out of loopid\n",
1140 __func__, __LINE__, fcport->port_name);
1141 fcport->scan_state = 0;
1142 qlt_schedule_sess_for_deletion(fcport);
1143 return;
1144 }
1145 }
1146 ql_dbg(ql_dbg_disc, vha, 0x20bf,
1147 "%s %d %8phC post login\n",
1148 __func__, __LINE__, fcport->port_name);
1149 qla2x00_post_async_login_work(vha, fcport, NULL);
1150 }
1151 }
1152
1153 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1154 {
1155 u16 data[2];
1156 u64 wwn;
1157
1158 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1159 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d retry %d lid %d scan %d\n",
1160 __func__, fcport->port_name, fcport->disc_state,
1161 fcport->fw_login_state, fcport->login_pause, fcport->flags,
1162 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1163 fcport->login_gen, fcport->login_retry,
1164 fcport->loop_id, fcport->scan_state);
1165
1166 if (fcport->login_retry == 0)
1167 return 0;
1168
1169 if (fcport->scan_state != QLA_FCPORT_FOUND)
1170 return 0;
1171
1172 if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1173 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1174 (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1175 return 0;
1176
1177 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1178 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1179 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1180 return 0;
1181 }
1182 }
1183
1184 /* for pure Target Mode. Login will not be initiated */
1185 if (vha->host->active_mode == MODE_TARGET)
1186 return 0;
1187
1188 if (fcport->flags & FCF_ASYNC_SENT) {
1189 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1190 return 0;
1191 }
1192
1193 fcport->login_retry--;
1194
1195 switch (fcport->disc_state) {
1196 case DSC_DELETED:
1197 wwn = wwn_to_u64(fcport->node_name);
1198 if (wwn == 0) {
1199 ql_dbg(ql_dbg_disc, vha, 0xffff,
1200 "%s %d %8phC post GNNID\n",
1201 __func__, __LINE__, fcport->port_name);
1202 qla24xx_post_gnnid_work(vha, fcport);
1203 } else if (fcport->loop_id == FC_NO_LOOP_ID) {
1204 ql_dbg(ql_dbg_disc, vha, 0x20bd,
1205 "%s %d %8phC post gnl\n",
1206 __func__, __LINE__, fcport->port_name);
1207 qla24xx_post_gnl_work(vha, fcport);
1208 } else {
1209 qla_chk_n2n_b4_login(vha, fcport);
1210 }
1211 break;
1212
1213 case DSC_GNL:
1214 if (fcport->login_pause) {
1215 fcport->last_rscn_gen = fcport->rscn_gen;
1216 fcport->last_login_gen = fcport->login_gen;
1217 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1218 break;
1219 }
1220
1221 qla_chk_n2n_b4_login(vha, fcport);
1222 break;
1223
1224 case DSC_LOGIN_FAILED:
1225 ql_dbg(ql_dbg_disc, vha, 0x20d0,
1226 "%s %d %8phC post gidpn\n",
1227 __func__, __LINE__, fcport->port_name);
1228 if (N2N_TOPO(vha->hw))
1229 qla_chk_n2n_b4_login(vha, fcport);
1230 else
1231 qla24xx_post_gidpn_work(vha, fcport);
1232 break;
1233
1234 case DSC_LOGIN_COMPLETE:
1235 /* recheck login state */
1236 ql_dbg(ql_dbg_disc, vha, 0x20d1,
1237 "%s %d %8phC post adisc\n",
1238 __func__, __LINE__, fcport->port_name);
1239 data[0] = data[1] = 0;
1240 qla2x00_post_async_adisc_work(vha, fcport, data);
1241 break;
1242
1243 default:
1244 break;
1245 }
1246
1247 return 0;
1248 }
1249
1250 static
1251 void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea)
1252 {
1253 fcport->rscn_gen++;
1254
1255 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c,
1256 "%s %8phC DS %d LS %d\n",
1257 __func__, fcport->port_name, fcport->disc_state,
1258 fcport->fw_login_state);
1259
1260 if (fcport->flags & FCF_ASYNC_SENT)
1261 return;
1262
1263 switch (fcport->disc_state) {
1264 case DSC_DELETED:
1265 case DSC_LOGIN_COMPLETE:
1266 qla24xx_post_gpnid_work(fcport->vha, &ea->id);
1267 break;
1268 default:
1269 break;
1270 }
1271 }
1272
1273 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1274 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1275 {
1276 struct qla_work_evt *e;
1277 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1278 if (!e)
1279 return QLA_FUNCTION_FAILED;
1280
1281 e->u.new_sess.id = *id;
1282 e->u.new_sess.pla = pla;
1283 e->u.new_sess.fc4_type = fc4_type;
1284 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1285 if (node_name)
1286 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1287
1288 return qla2x00_post_work(vha, e);
1289 }
1290
1291 static
1292 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1293 struct event_arg *ea)
1294 {
1295 fc_port_t *fcport = ea->fcport;
1296
1297 ql_dbg(ql_dbg_disc, vha, 0x2102,
1298 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1299 __func__, fcport->port_name, fcport->disc_state,
1300 fcport->fw_login_state, fcport->login_pause,
1301 fcport->deleted, fcport->conflict,
1302 fcport->last_rscn_gen, fcport->rscn_gen,
1303 fcport->last_login_gen, fcport->login_gen,
1304 fcport->flags);
1305
1306 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1307 (fcport->fw_login_state == DSC_LS_PRLI_PEND))
1308 return;
1309
1310 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1311 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1312 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1313 return;
1314 }
1315 }
1316
1317 if (fcport->flags & FCF_ASYNC_SENT) {
1318 fcport->login_retry++;
1319 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1320 return;
1321 }
1322
1323 if (fcport->disc_state == DSC_DELETE_PEND) {
1324 fcport->login_retry++;
1325 return;
1326 }
1327
1328 if (fcport->last_rscn_gen != fcport->rscn_gen) {
1329 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n",
1330 __func__, __LINE__, fcport->port_name);
1331
1332 qla24xx_post_gidpn_work(vha, fcport);
1333 return;
1334 }
1335
1336 qla24xx_fcport_handle_login(vha, fcport);
1337 }
1338
1339 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea)
1340 {
1341 fc_port_t *f, *tf;
1342 uint32_t id = 0, mask, rid;
1343 unsigned long flags;
1344
1345 switch (ea->event) {
1346 case FCME_RSCN:
1347 case FCME_GIDPN_DONE:
1348 case FCME_GPSC_DONE:
1349 case FCME_GPNID_DONE:
1350 case FCME_GNNID_DONE:
1351 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
1352 test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags))
1353 return;
1354 break;
1355 default:
1356 break;
1357 }
1358
1359 switch (ea->event) {
1360 case FCME_RELOGIN:
1361 if (test_bit(UNLOADING, &vha->dpc_flags))
1362 return;
1363
1364 qla24xx_handle_relogin_event(vha, ea);
1365 break;
1366 case FCME_RSCN:
1367 if (test_bit(UNLOADING, &vha->dpc_flags))
1368 return;
1369 switch (ea->id.b.rsvd_1) {
1370 case RSCN_PORT_ADDR:
1371 spin_lock_irqsave(&vha->work_lock, flags);
1372 if (vha->scan.scan_flags == 0) {
1373 ql_dbg(ql_dbg_disc, vha, 0xffff,
1374 "%s: schedule\n", __func__);
1375 vha->scan.scan_flags |= SF_QUEUED;
1376 schedule_delayed_work(&vha->scan.scan_work, 5);
1377 }
1378 spin_unlock_irqrestore(&vha->work_lock, flags);
1379
1380 break;
1381 case RSCN_AREA_ADDR:
1382 case RSCN_DOM_ADDR:
1383 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) {
1384 mask = 0xffff00;
1385 ql_dbg(ql_dbg_async, vha, 0x5044,
1386 "RSCN: Area 0x%06x was affected\n",
1387 ea->id.b24);
1388 } else {
1389 mask = 0xff0000;
1390 ql_dbg(ql_dbg_async, vha, 0x507a,
1391 "RSCN: Domain 0x%06x was affected\n",
1392 ea->id.b24);
1393 }
1394
1395 rid = ea->id.b24 & mask;
1396 list_for_each_entry_safe(f, tf, &vha->vp_fcports,
1397 list) {
1398 id = f->d_id.b24 & mask;
1399 if (rid == id) {
1400 ea->fcport = f;
1401 qla24xx_handle_rscn_event(f, ea);
1402 }
1403 }
1404 break;
1405 case RSCN_FAB_ADDR:
1406 default:
1407 ql_log(ql_log_warn, vha, 0xd045,
1408 "RSCN: Fabric was affected. Addr format %d\n",
1409 ea->id.b.rsvd_1);
1410 qla2x00_mark_all_devices_lost(vha, 1);
1411 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1412 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1413 }
1414 break;
1415 case FCME_GIDPN_DONE:
1416 qla24xx_handle_gidpn_event(vha, ea);
1417 break;
1418 case FCME_GNL_DONE:
1419 qla24xx_handle_gnl_done_event(vha, ea);
1420 break;
1421 case FCME_GPSC_DONE:
1422 qla24xx_handle_gpsc_event(vha, ea);
1423 break;
1424 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */
1425 qla24xx_handle_plogi_done_event(vha, ea);
1426 break;
1427 case FCME_PRLI_DONE:
1428 qla24xx_handle_prli_done_event(vha, ea);
1429 break;
1430 case FCME_GPDB_DONE:
1431 qla24xx_handle_gpdb_event(vha, ea);
1432 break;
1433 case FCME_GPNID_DONE:
1434 qla24xx_handle_gpnid_event(vha, ea);
1435 break;
1436 case FCME_GFFID_DONE:
1437 qla24xx_handle_gffid_event(vha, ea);
1438 break;
1439 case FCME_ADISC_DONE:
1440 qla24xx_handle_adisc_event(vha, ea);
1441 break;
1442 case FCME_GNNID_DONE:
1443 qla24xx_handle_gnnid_event(vha, ea);
1444 break;
1445 case FCME_GFPNID_DONE:
1446 qla24xx_handle_gfpnid_event(vha, ea);
1447 break;
1448 default:
1449 BUG_ON(1);
1450 break;
1451 }
1452 }
1453
1454 static void
1455 qla2x00_tmf_iocb_timeout(void *data)
1456 {
1457 srb_t *sp = data;
1458 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1459
1460 tmf->u.tmf.comp_status = CS_TIMEOUT;
1461 complete(&tmf->u.tmf.comp);
1462 }
1463
1464 static void
1465 qla2x00_tmf_sp_done(void *ptr, int res)
1466 {
1467 srb_t *sp = ptr;
1468 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1469
1470 complete(&tmf->u.tmf.comp);
1471 }
1472
1473 int
1474 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
1475 uint32_t tag)
1476 {
1477 struct scsi_qla_host *vha = fcport->vha;
1478 struct srb_iocb *tm_iocb;
1479 srb_t *sp;
1480 int rval = QLA_FUNCTION_FAILED;
1481
1482 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1483 if (!sp)
1484 goto done;
1485
1486 tm_iocb = &sp->u.iocb_cmd;
1487 sp->type = SRB_TM_CMD;
1488 sp->name = "tmf";
1489 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1490 tm_iocb->u.tmf.flags = flags;
1491 tm_iocb->u.tmf.lun = lun;
1492 tm_iocb->u.tmf.data = tag;
1493 sp->done = qla2x00_tmf_sp_done;
1494 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1495 init_completion(&tm_iocb->u.tmf.comp);
1496
1497 rval = qla2x00_start_sp(sp);
1498 if (rval != QLA_SUCCESS)
1499 goto done_free_sp;
1500
1501 ql_dbg(ql_dbg_taskm, vha, 0x802f,
1502 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1503 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1504 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1505
1506 wait_for_completion(&tm_iocb->u.tmf.comp);
1507
1508 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ?
1509 QLA_SUCCESS : QLA_FUNCTION_FAILED;
1510
1511 if ((rval != QLA_SUCCESS) || tm_iocb->u.tmf.data) {
1512 ql_dbg(ql_dbg_taskm, vha, 0x8030,
1513 "TM IOCB failed (%x).\n", rval);
1514 }
1515
1516 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1517 flags = tm_iocb->u.tmf.flags;
1518 lun = (uint16_t)tm_iocb->u.tmf.lun;
1519
1520 /* Issue Marker IOCB */
1521 qla2x00_marker(vha, vha->hw->req_q_map[0],
1522 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
1523 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1524 }
1525
1526 done_free_sp:
1527 sp->free(sp);
1528 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1529 done:
1530 return rval;
1531 }
1532
1533 static void
1534 qla24xx_abort_iocb_timeout(void *data)
1535 {
1536 srb_t *sp = data;
1537 struct srb_iocb *abt = &sp->u.iocb_cmd;
1538
1539 abt->u.abt.comp_status = CS_TIMEOUT;
1540 complete(&abt->u.abt.comp);
1541 }
1542
1543 static void
1544 qla24xx_abort_sp_done(void *ptr, int res)
1545 {
1546 srb_t *sp = ptr;
1547 struct srb_iocb *abt = &sp->u.iocb_cmd;
1548
1549 del_timer(&sp->u.iocb_cmd.timer);
1550 complete(&abt->u.abt.comp);
1551 }
1552
1553 int
1554 qla24xx_async_abort_cmd(srb_t *cmd_sp)
1555 {
1556 scsi_qla_host_t *vha = cmd_sp->vha;
1557 fc_port_t *fcport = cmd_sp->fcport;
1558 struct srb_iocb *abt_iocb;
1559 srb_t *sp;
1560 int rval = QLA_FUNCTION_FAILED;
1561
1562 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1563 if (!sp)
1564 goto done;
1565
1566 abt_iocb = &sp->u.iocb_cmd;
1567 sp->type = SRB_ABT_CMD;
1568 sp->name = "abort";
1569 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1570 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
1571
1572 if (vha->flags.qpairs_available && cmd_sp->qpair)
1573 abt_iocb->u.abt.req_que_no =
1574 cpu_to_le16(cmd_sp->qpair->req->id);
1575 else
1576 abt_iocb->u.abt.req_que_no = cpu_to_le16(vha->req->id);
1577
1578 sp->done = qla24xx_abort_sp_done;
1579 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
1580 init_completion(&abt_iocb->u.abt.comp);
1581
1582 rval = qla2x00_start_sp(sp);
1583 if (rval != QLA_SUCCESS)
1584 goto done_free_sp;
1585
1586 ql_dbg(ql_dbg_async, vha, 0x507c,
1587 "Abort command issued - hdl=%x, target_id=%x\n",
1588 cmd_sp->handle, fcport->tgt_id);
1589
1590 wait_for_completion(&abt_iocb->u.abt.comp);
1591
1592 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
1593 QLA_SUCCESS : QLA_FUNCTION_FAILED;
1594
1595 done_free_sp:
1596 sp->free(sp);
1597 done:
1598 return rval;
1599 }
1600
1601 int
1602 qla24xx_async_abort_command(srb_t *sp)
1603 {
1604 unsigned long flags = 0;
1605
1606 uint32_t handle;
1607 fc_port_t *fcport = sp->fcport;
1608 struct scsi_qla_host *vha = fcport->vha;
1609 struct qla_hw_data *ha = vha->hw;
1610 struct req_que *req = vha->req;
1611
1612 if (vha->flags.qpairs_available && sp->qpair)
1613 req = sp->qpair->req;
1614
1615 spin_lock_irqsave(&ha->hardware_lock, flags);
1616 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1617 if (req->outstanding_cmds[handle] == sp)
1618 break;
1619 }
1620 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1621 if (handle == req->num_outstanding_cmds) {
1622 /* Command not found. */
1623 return QLA_FUNCTION_FAILED;
1624 }
1625 if (sp->type == SRB_FXIOCB_DCMD)
1626 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1627 FXDISC_ABORT_IOCTL);
1628
1629 return qla24xx_async_abort_cmd(sp);
1630 }
1631
1632 static void
1633 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1634 {
1635 switch (ea->data[0]) {
1636 case MBS_COMMAND_COMPLETE:
1637 ql_dbg(ql_dbg_disc, vha, 0x2118,
1638 "%s %d %8phC post gpdb\n",
1639 __func__, __LINE__, ea->fcport->port_name);
1640
1641 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1642 ea->fcport->logout_on_delete = 1;
1643 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1644 break;
1645 default:
1646 if (ea->fcport->n2n_flag) {
1647 ql_dbg(ql_dbg_disc, vha, 0x2118,
1648 "%s %d %8phC post fc4 prli\n",
1649 __func__, __LINE__, ea->fcport->port_name);
1650 ea->fcport->fc4f_nvme = 0;
1651 ea->fcport->n2n_flag = 0;
1652 qla24xx_post_prli_work(vha, ea->fcport);
1653 }
1654 ql_dbg(ql_dbg_disc, vha, 0x2119,
1655 "%s %d %8phC unhandle event of %x\n",
1656 __func__, __LINE__, ea->fcport->port_name, ea->data[0]);
1657 break;
1658 }
1659 }
1660
1661 static void
1662 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1663 {
1664 port_id_t cid; /* conflict Nport id */
1665 u16 lid;
1666 struct fc_port *conflict_fcport;
1667 unsigned long flags;
1668 struct fc_port *fcport = ea->fcport;
1669
1670 ql_dbg(ql_dbg_disc, vha, 0xffff,
1671 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
1672 __func__, fcport->port_name, fcport->disc_state,
1673 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
1674 ea->sp->gen2, fcport->rscn_gen|ea->sp->gen1,
1675 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
1676
1677 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1678 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
1679 ql_dbg(ql_dbg_disc, vha, 0x20ea,
1680 "%s %d %8phC Remote is trying to login\n",
1681 __func__, __LINE__, fcport->port_name);
1682 return;
1683 }
1684
1685 if (fcport->disc_state == DSC_DELETE_PEND)
1686 return;
1687
1688 if (ea->sp->gen2 != fcport->login_gen) {
1689 /* target side must have changed it. */
1690 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1691 "%s %8phC generation changed\n",
1692 __func__, fcport->port_name);
1693 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1694 return;
1695 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1696 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n",
1697 __func__, __LINE__, fcport->port_name);
1698 qla24xx_post_gidpn_work(vha, fcport);
1699 return;
1700 }
1701
1702 switch (ea->data[0]) {
1703 case MBS_COMMAND_COMPLETE:
1704 /*
1705 * Driver must validate login state - If PRLI not complete,
1706 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
1707 * requests.
1708 */
1709 if (ea->fcport->fc4f_nvme) {
1710 ql_dbg(ql_dbg_disc, vha, 0x2117,
1711 "%s %d %8phC post prli\n",
1712 __func__, __LINE__, ea->fcport->port_name);
1713 qla24xx_post_prli_work(vha, ea->fcport);
1714 } else {
1715 ql_dbg(ql_dbg_disc, vha, 0x20ea,
1716 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n",
1717 __func__, __LINE__, ea->fcport->port_name,
1718 ea->fcport->loop_id, ea->fcport->d_id.b24);
1719
1720 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
1721 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1722 ea->fcport->loop_id = FC_NO_LOOP_ID;
1723 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1724 ea->fcport->logout_on_delete = 1;
1725 ea->fcport->send_els_logo = 0;
1726 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP;
1727 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1728
1729 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1730 }
1731 break;
1732 case MBS_COMMAND_ERROR:
1733 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
1734 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
1735
1736 ea->fcport->flags &= ~FCF_ASYNC_SENT;
1737 ea->fcport->disc_state = DSC_LOGIN_FAILED;
1738 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
1739 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1740 else
1741 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0);
1742 break;
1743 case MBS_LOOP_ID_USED:
1744 /* data[1] = IO PARAM 1 = nport ID */
1745 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
1746 cid.b.area = (ea->iop[1] >> 8) & 0xff;
1747 cid.b.al_pa = ea->iop[1] & 0xff;
1748 cid.b.rsvd_1 = 0;
1749
1750 ql_dbg(ql_dbg_disc, vha, 0x20ec,
1751 "%s %d %8phC LoopID 0x%x in use post gnl\n",
1752 __func__, __LINE__, ea->fcport->port_name,
1753 ea->fcport->loop_id);
1754
1755 if (IS_SW_RESV_ADDR(cid)) {
1756 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
1757 ea->fcport->loop_id = FC_NO_LOOP_ID;
1758 } else {
1759 qla2x00_clear_loop_id(ea->fcport);
1760 }
1761 qla24xx_post_gnl_work(vha, ea->fcport);
1762 break;
1763 case MBS_PORT_ID_USED:
1764 ql_dbg(ql_dbg_disc, vha, 0x20ed,
1765 "%s %d %8phC NPortId %02x%02x%02x inuse post gidpn\n",
1766 __func__, __LINE__, ea->fcport->port_name,
1767 ea->fcport->d_id.b.domain, ea->fcport->d_id.b.area,
1768 ea->fcport->d_id.b.al_pa);
1769
1770 lid = ea->iop[1] & 0xffff;
1771 qlt_find_sess_invalidate_other(vha,
1772 wwn_to_u64(ea->fcport->port_name),
1773 ea->fcport->d_id, lid, &conflict_fcport);
1774
1775 if (conflict_fcport) {
1776 /*
1777 * Another fcport share the same loop_id/nport id.
1778 * Conflict fcport needs to finish cleanup before this
1779 * fcport can proceed to login.
1780 */
1781 conflict_fcport->conflict = ea->fcport;
1782 ea->fcport->login_pause = 1;
1783
1784 ql_dbg(ql_dbg_disc, vha, 0x20ed,
1785 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
1786 __func__, __LINE__, ea->fcport->port_name,
1787 ea->fcport->d_id.b24, lid);
1788 qla2x00_clear_loop_id(ea->fcport);
1789 qla24xx_post_gidpn_work(vha, ea->fcport);
1790 } else {
1791 ql_dbg(ql_dbg_disc, vha, 0x20ed,
1792 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
1793 __func__, __LINE__, ea->fcport->port_name,
1794 ea->fcport->d_id.b24, lid);
1795
1796 qla2x00_clear_loop_id(ea->fcport);
1797 set_bit(lid, vha->hw->loop_id_map);
1798 ea->fcport->loop_id = lid;
1799 ea->fcport->keep_nport_handle = 0;
1800 qlt_schedule_sess_for_deletion(ea->fcport);
1801 }
1802 break;
1803 }
1804 return;
1805 }
1806
1807 void
1808 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
1809 uint16_t *data)
1810 {
1811 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1812 qlt_logo_completion_handler(fcport, data[0]);
1813 fcport->login_gen++;
1814 fcport->flags &= ~FCF_ASYNC_ACTIVE;
1815 return;
1816 }
1817
1818 void
1819 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
1820 uint16_t *data)
1821 {
1822 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1823 if (data[0] == MBS_COMMAND_COMPLETE) {
1824 qla2x00_update_fcport(vha, fcport);
1825
1826 return;
1827 }
1828
1829 /* Retry login. */
1830 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
1831 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1832 else
1833 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1834
1835 return;
1836 }
1837
1838 /****************************************************************************/
1839 /* QLogic ISP2x00 Hardware Support Functions. */
1840 /****************************************************************************/
1841
1842 static int
1843 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
1844 {
1845 int rval = QLA_SUCCESS;
1846 struct qla_hw_data *ha = vha->hw;
1847 uint32_t idc_major_ver, idc_minor_ver;
1848 uint16_t config[4];
1849
1850 qla83xx_idc_lock(vha, 0);
1851
1852 /* SV: TODO: Assign initialization timeout from
1853 * flash-info / other param
1854 */
1855 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
1856 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
1857
1858 /* Set our fcoe function presence */
1859 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
1860 ql_dbg(ql_dbg_p3p, vha, 0xb077,
1861 "Error while setting DRV-Presence.\n");
1862 rval = QLA_FUNCTION_FAILED;
1863 goto exit;
1864 }
1865
1866 /* Decide the reset ownership */
1867 qla83xx_reset_ownership(vha);
1868
1869 /*
1870 * On first protocol driver load:
1871 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
1872 * register.
1873 * Others: Check compatibility with current IDC Major version.
1874 */
1875 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
1876 if (ha->flags.nic_core_reset_owner) {
1877 /* Set IDC Major version */
1878 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
1879 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
1880
1881 /* Clearing IDC-Lock-Recovery register */
1882 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
1883 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
1884 /*
1885 * Clear further IDC participation if we are not compatible with
1886 * the current IDC Major Version.
1887 */
1888 ql_log(ql_log_warn, vha, 0xb07d,
1889 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
1890 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
1891 __qla83xx_clear_drv_presence(vha);
1892 rval = QLA_FUNCTION_FAILED;
1893 goto exit;
1894 }
1895 /* Each function sets its supported Minor version. */
1896 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
1897 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
1898 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
1899
1900 if (ha->flags.nic_core_reset_owner) {
1901 memset(config, 0, sizeof(config));
1902 if (!qla81xx_get_port_config(vha, config))
1903 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
1904 QLA8XXX_DEV_READY);
1905 }
1906
1907 rval = qla83xx_idc_state_handler(vha);
1908
1909 exit:
1910 qla83xx_idc_unlock(vha, 0);
1911
1912 return rval;
1913 }
1914
1915 /*
1916 * qla2x00_initialize_adapter
1917 * Initialize board.
1918 *
1919 * Input:
1920 * ha = adapter block pointer.
1921 *
1922 * Returns:
1923 * 0 = success
1924 */
1925 int
1926 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
1927 {
1928 int rval;
1929 struct qla_hw_data *ha = vha->hw;
1930 struct req_que *req = ha->req_q_map[0];
1931
1932 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
1933 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
1934
1935 /* Clear adapter flags. */
1936 vha->flags.online = 0;
1937 ha->flags.chip_reset_done = 0;
1938 vha->flags.reset_active = 0;
1939 ha->flags.pci_channel_io_perm_failure = 0;
1940 ha->flags.eeh_busy = 0;
1941 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
1942 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1943 atomic_set(&vha->loop_state, LOOP_DOWN);
1944 vha->device_flags = DFLG_NO_CABLE;
1945 vha->dpc_flags = 0;
1946 vha->flags.management_server_logged_in = 0;
1947 vha->marker_needed = 0;
1948 ha->isp_abort_cnt = 0;
1949 ha->beacon_blink_led = 0;
1950
1951 set_bit(0, ha->req_qid_map);
1952 set_bit(0, ha->rsp_qid_map);
1953
1954 ql_dbg(ql_dbg_init, vha, 0x0040,
1955 "Configuring PCI space...\n");
1956 rval = ha->isp_ops->pci_config(vha);
1957 if (rval) {
1958 ql_log(ql_log_warn, vha, 0x0044,
1959 "Unable to configure PCI space.\n");
1960 return (rval);
1961 }
1962
1963 ha->isp_ops->reset_chip(vha);
1964
1965 rval = qla2xxx_get_flash_info(vha);
1966 if (rval) {
1967 ql_log(ql_log_fatal, vha, 0x004f,
1968 "Unable to validate FLASH data.\n");
1969 return rval;
1970 }
1971
1972 if (IS_QLA8044(ha)) {
1973 qla8044_read_reset_template(vha);
1974
1975 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
1976 * If DONRESET_BIT0 is set, drivers should not set dev_state
1977 * to NEED_RESET. But if NEED_RESET is set, drivers should
1978 * should honor the reset. */
1979 if (ql2xdontresethba == 1)
1980 qla8044_set_idc_dontreset(vha);
1981 }
1982
1983 ha->isp_ops->get_flash_version(vha, req->ring);
1984 ql_dbg(ql_dbg_init, vha, 0x0061,
1985 "Configure NVRAM parameters...\n");
1986
1987 ha->isp_ops->nvram_config(vha);
1988
1989 if (ha->flags.disable_serdes) {
1990 /* Mask HBA via NVRAM settings? */
1991 ql_log(ql_log_info, vha, 0x0077,
1992 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
1993 return QLA_FUNCTION_FAILED;
1994 }
1995
1996 ql_dbg(ql_dbg_init, vha, 0x0078,
1997 "Verifying loaded RISC code...\n");
1998
1999 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2000 rval = ha->isp_ops->chip_diag(vha);
2001 if (rval)
2002 return (rval);
2003 rval = qla2x00_setup_chip(vha);
2004 if (rval)
2005 return (rval);
2006 }
2007
2008 if (IS_QLA84XX(ha)) {
2009 ha->cs84xx = qla84xx_get_chip(vha);
2010 if (!ha->cs84xx) {
2011 ql_log(ql_log_warn, vha, 0x00d0,
2012 "Unable to configure ISP84XX.\n");
2013 return QLA_FUNCTION_FAILED;
2014 }
2015 }
2016
2017 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2018 rval = qla2x00_init_rings(vha);
2019
2020 ha->flags.chip_reset_done = 1;
2021
2022 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2023 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
2024 rval = qla84xx_init_chip(vha);
2025 if (rval != QLA_SUCCESS) {
2026 ql_log(ql_log_warn, vha, 0x00d4,
2027 "Unable to initialize ISP84XX.\n");
2028 qla84xx_put_chip(vha);
2029 }
2030 }
2031
2032 /* Load the NIC Core f/w if we are the first protocol driver. */
2033 if (IS_QLA8031(ha)) {
2034 rval = qla83xx_nic_core_fw_load(vha);
2035 if (rval)
2036 ql_log(ql_log_warn, vha, 0x0124,
2037 "Error in initializing NIC Core f/w.\n");
2038 }
2039
2040 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2041 qla24xx_read_fcp_prio_cfg(vha);
2042
2043 if (IS_P3P_TYPE(ha))
2044 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2045 else
2046 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2047
2048 return (rval);
2049 }
2050
2051 /**
2052 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2053 * @ha: HA context
2054 *
2055 * Returns 0 on success.
2056 */
2057 int
2058 qla2100_pci_config(scsi_qla_host_t *vha)
2059 {
2060 uint16_t w;
2061 unsigned long flags;
2062 struct qla_hw_data *ha = vha->hw;
2063 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2064
2065 pci_set_master(ha->pdev);
2066 pci_try_set_mwi(ha->pdev);
2067
2068 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2069 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2070 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2071
2072 pci_disable_rom(ha->pdev);
2073
2074 /* Get PCI bus information. */
2075 spin_lock_irqsave(&ha->hardware_lock, flags);
2076 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
2077 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2078
2079 return QLA_SUCCESS;
2080 }
2081
2082 /**
2083 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2084 * @ha: HA context
2085 *
2086 * Returns 0 on success.
2087 */
2088 int
2089 qla2300_pci_config(scsi_qla_host_t *vha)
2090 {
2091 uint16_t w;
2092 unsigned long flags = 0;
2093 uint32_t cnt;
2094 struct qla_hw_data *ha = vha->hw;
2095 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2096
2097 pci_set_master(ha->pdev);
2098 pci_try_set_mwi(ha->pdev);
2099
2100 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2101 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2102
2103 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2104 w &= ~PCI_COMMAND_INTX_DISABLE;
2105 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2106
2107 /*
2108 * If this is a 2300 card and not 2312, reset the
2109 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2110 * the 2310 also reports itself as a 2300 so we need to get the
2111 * fb revision level -- a 6 indicates it really is a 2300 and
2112 * not a 2310.
2113 */
2114 if (IS_QLA2300(ha)) {
2115 spin_lock_irqsave(&ha->hardware_lock, flags);
2116
2117 /* Pause RISC. */
2118 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
2119 for (cnt = 0; cnt < 30000; cnt++) {
2120 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
2121 break;
2122
2123 udelay(10);
2124 }
2125
2126 /* Select FPM registers. */
2127 WRT_REG_WORD(&reg->ctrl_status, 0x20);
2128 RD_REG_WORD(&reg->ctrl_status);
2129
2130 /* Get the fb rev level */
2131 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2132
2133 if (ha->fb_rev == FPM_2300)
2134 pci_clear_mwi(ha->pdev);
2135
2136 /* Deselect FPM registers. */
2137 WRT_REG_WORD(&reg->ctrl_status, 0x0);
2138 RD_REG_WORD(&reg->ctrl_status);
2139
2140 /* Release RISC module. */
2141 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2142 for (cnt = 0; cnt < 30000; cnt++) {
2143 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
2144 break;
2145
2146 udelay(10);
2147 }
2148
2149 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2150 }
2151
2152 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2153
2154 pci_disable_rom(ha->pdev);
2155
2156 /* Get PCI bus information. */
2157 spin_lock_irqsave(&ha->hardware_lock, flags);
2158 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
2159 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2160
2161 return QLA_SUCCESS;
2162 }
2163
2164 /**
2165 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2166 * @ha: HA context
2167 *
2168 * Returns 0 on success.
2169 */
2170 int
2171 qla24xx_pci_config(scsi_qla_host_t *vha)
2172 {
2173 uint16_t w;
2174 unsigned long flags = 0;
2175 struct qla_hw_data *ha = vha->hw;
2176 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2177
2178 pci_set_master(ha->pdev);
2179 pci_try_set_mwi(ha->pdev);
2180
2181 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2182 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2183 w &= ~PCI_COMMAND_INTX_DISABLE;
2184 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2185
2186 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2187
2188 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
2189 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2190 pcix_set_mmrbc(ha->pdev, 2048);
2191
2192 /* PCIe -- adjust Maximum Read Request Size (2048). */
2193 if (pci_is_pcie(ha->pdev))
2194 pcie_set_readrq(ha->pdev, 4096);
2195
2196 pci_disable_rom(ha->pdev);
2197
2198 ha->chip_revision = ha->pdev->revision;
2199
2200 /* Get PCI bus information. */
2201 spin_lock_irqsave(&ha->hardware_lock, flags);
2202 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
2203 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2204
2205 return QLA_SUCCESS;
2206 }
2207
2208 /**
2209 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
2210 * @ha: HA context
2211 *
2212 * Returns 0 on success.
2213 */
2214 int
2215 qla25xx_pci_config(scsi_qla_host_t *vha)
2216 {
2217 uint16_t w;
2218 struct qla_hw_data *ha = vha->hw;
2219
2220 pci_set_master(ha->pdev);
2221 pci_try_set_mwi(ha->pdev);
2222
2223 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2224 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2225 w &= ~PCI_COMMAND_INTX_DISABLE;
2226 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2227
2228 /* PCIe -- adjust Maximum Read Request Size (2048). */
2229 if (pci_is_pcie(ha->pdev))
2230 pcie_set_readrq(ha->pdev, 4096);
2231
2232 pci_disable_rom(ha->pdev);
2233
2234 ha->chip_revision = ha->pdev->revision;
2235
2236 return QLA_SUCCESS;
2237 }
2238
2239 /**
2240 * qla2x00_isp_firmware() - Choose firmware image.
2241 * @ha: HA context
2242 *
2243 * Returns 0 on success.
2244 */
2245 static int
2246 qla2x00_isp_firmware(scsi_qla_host_t *vha)
2247 {
2248 int rval;
2249 uint16_t loop_id, topo, sw_cap;
2250 uint8_t domain, area, al_pa;
2251 struct qla_hw_data *ha = vha->hw;
2252
2253 /* Assume loading risc code */
2254 rval = QLA_FUNCTION_FAILED;
2255
2256 if (ha->flags.disable_risc_code_load) {
2257 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
2258
2259 /* Verify checksum of loaded RISC code. */
2260 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
2261 if (rval == QLA_SUCCESS) {
2262 /* And, verify we are not in ROM code. */
2263 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
2264 &area, &domain, &topo, &sw_cap);
2265 }
2266 }
2267
2268 if (rval)
2269 ql_dbg(ql_dbg_init, vha, 0x007a,
2270 "**** Load RISC code ****.\n");
2271
2272 return (rval);
2273 }
2274
2275 /**
2276 * qla2x00_reset_chip() - Reset ISP chip.
2277 * @ha: HA context
2278 *
2279 * Returns 0 on success.
2280 */
2281 void
2282 qla2x00_reset_chip(scsi_qla_host_t *vha)
2283 {
2284 unsigned long flags = 0;
2285 struct qla_hw_data *ha = vha->hw;
2286 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2287 uint32_t cnt;
2288 uint16_t cmd;
2289
2290 if (unlikely(pci_channel_offline(ha->pdev)))
2291 return;
2292
2293 ha->isp_ops->disable_intrs(ha);
2294
2295 spin_lock_irqsave(&ha->hardware_lock, flags);
2296
2297 /* Turn off master enable */
2298 cmd = 0;
2299 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2300 cmd &= ~PCI_COMMAND_MASTER;
2301 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2302
2303 if (!IS_QLA2100(ha)) {
2304 /* Pause RISC. */
2305 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
2306 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2307 for (cnt = 0; cnt < 30000; cnt++) {
2308 if ((RD_REG_WORD(&reg->hccr) &
2309 HCCR_RISC_PAUSE) != 0)
2310 break;
2311 udelay(100);
2312 }
2313 } else {
2314 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2315 udelay(10);
2316 }
2317
2318 /* Select FPM registers. */
2319 WRT_REG_WORD(&reg->ctrl_status, 0x20);
2320 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2321
2322 /* FPM Soft Reset. */
2323 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
2324 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2325
2326 /* Toggle Fpm Reset. */
2327 if (!IS_QLA2200(ha)) {
2328 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
2329 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2330 }
2331
2332 /* Select frame buffer registers. */
2333 WRT_REG_WORD(&reg->ctrl_status, 0x10);
2334 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2335
2336 /* Reset frame buffer FIFOs. */
2337 if (IS_QLA2200(ha)) {
2338 WRT_FB_CMD_REG(ha, reg, 0xa000);
2339 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
2340 } else {
2341 WRT_FB_CMD_REG(ha, reg, 0x00fc);
2342
2343 /* Read back fb_cmd until zero or 3 seconds max */
2344 for (cnt = 0; cnt < 3000; cnt++) {
2345 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2346 break;
2347 udelay(100);
2348 }
2349 }
2350
2351 /* Select RISC module registers. */
2352 WRT_REG_WORD(&reg->ctrl_status, 0);
2353 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2354
2355 /* Reset RISC processor. */
2356 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2357 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2358
2359 /* Release RISC processor. */
2360 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2361 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2362 }
2363
2364 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
2365 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
2366
2367 /* Reset ISP chip. */
2368 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2369
2370 /* Wait for RISC to recover from reset. */
2371 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2372 /*
2373 * It is necessary to for a delay here since the card doesn't
2374 * respond to PCI reads during a reset. On some architectures
2375 * this will result in an MCA.
2376 */
2377 udelay(20);
2378 for (cnt = 30000; cnt; cnt--) {
2379 if ((RD_REG_WORD(&reg->ctrl_status) &
2380 CSR_ISP_SOFT_RESET) == 0)
2381 break;
2382 udelay(100);
2383 }
2384 } else
2385 udelay(10);
2386
2387 /* Reset RISC processor. */
2388 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2389
2390 WRT_REG_WORD(&reg->semaphore, 0);
2391
2392 /* Release RISC processor. */
2393 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2394 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2395
2396 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2397 for (cnt = 0; cnt < 30000; cnt++) {
2398 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
2399 break;
2400
2401 udelay(100);
2402 }
2403 } else
2404 udelay(100);
2405
2406 /* Turn on master enable */
2407 cmd |= PCI_COMMAND_MASTER;
2408 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2409
2410 /* Disable RISC pause on FPM parity error. */
2411 if (!IS_QLA2100(ha)) {
2412 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
2413 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2414 }
2415
2416 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2417 }
2418
2419 /**
2420 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2421 *
2422 * Returns 0 on success.
2423 */
2424 static int
2425 qla81xx_reset_mpi(scsi_qla_host_t *vha)
2426 {
2427 uint16_t mb[4] = {0x1010, 0, 1, 0};
2428
2429 if (!IS_QLA81XX(vha->hw))
2430 return QLA_SUCCESS;
2431
2432 return qla81xx_write_mpi_register(vha, mb);
2433 }
2434
2435 /**
2436 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
2437 * @ha: HA context
2438 *
2439 * Returns 0 on success.
2440 */
2441 static inline int
2442 qla24xx_reset_risc(scsi_qla_host_t *vha)
2443 {
2444 unsigned long flags = 0;
2445 struct qla_hw_data *ha = vha->hw;
2446 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2447 uint32_t cnt;
2448 uint16_t wd;
2449 static int abts_cnt; /* ISP abort retry counts */
2450 int rval = QLA_SUCCESS;
2451
2452 spin_lock_irqsave(&ha->hardware_lock, flags);
2453
2454 /* Reset RISC. */
2455 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2456 for (cnt = 0; cnt < 30000; cnt++) {
2457 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2458 break;
2459
2460 udelay(10);
2461 }
2462
2463 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
2464 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2465
2466 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2467 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2468 RD_REG_DWORD(&reg->hccr),
2469 RD_REG_DWORD(&reg->ctrl_status),
2470 (RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
2471
2472 WRT_REG_DWORD(&reg->ctrl_status,
2473 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2474 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
2475
2476 udelay(100);
2477
2478 /* Wait for firmware to complete NVRAM accesses. */
2479 RD_REG_WORD(&reg->mailbox0);
2480 for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&
2481 rval == QLA_SUCCESS; cnt--) {
2482 barrier();
2483 if (cnt)
2484 udelay(5);
2485 else
2486 rval = QLA_FUNCTION_TIMEOUT;
2487 }
2488
2489 if (rval == QLA_SUCCESS)
2490 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2491
2492 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2493 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2494 RD_REG_DWORD(&reg->hccr),
2495 RD_REG_DWORD(&reg->mailbox0));
2496
2497 /* Wait for soft-reset to complete. */
2498 RD_REG_DWORD(&reg->ctrl_status);
2499 for (cnt = 0; cnt < 60; cnt++) {
2500 barrier();
2501 if ((RD_REG_DWORD(&reg->ctrl_status) &
2502 CSRX_ISP_SOFT_RESET) == 0)
2503 break;
2504
2505 udelay(5);
2506 }
2507 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
2508 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2509
2510 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2511 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2512 RD_REG_DWORD(&reg->hccr),
2513 RD_REG_DWORD(&reg->ctrl_status));
2514
2515 /* If required, do an MPI FW reset now */
2516 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2517 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2518 if (++abts_cnt < 5) {
2519 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2520 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2521 } else {
2522 /*
2523 * We exhausted the ISP abort retries. We have to
2524 * set the board offline.
2525 */
2526 abts_cnt = 0;
2527 vha->flags.online = 0;
2528 }
2529 }
2530 }
2531
2532 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
2533 RD_REG_DWORD(&reg->hccr);
2534
2535 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
2536 RD_REG_DWORD(&reg->hccr);
2537
2538 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
2539 RD_REG_DWORD(&reg->hccr);
2540
2541 RD_REG_WORD(&reg->mailbox0);
2542 for (cnt = 60; RD_REG_WORD(&reg->mailbox0) != 0 &&
2543 rval == QLA_SUCCESS; cnt--) {
2544 barrier();
2545 if (cnt)
2546 udelay(5);
2547 else
2548 rval = QLA_FUNCTION_TIMEOUT;
2549 }
2550 if (rval == QLA_SUCCESS)
2551 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
2552
2553 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2554 "Host Risc 0x%x, mailbox0 0x%x\n",
2555 RD_REG_DWORD(&reg->hccr),
2556 RD_REG_WORD(&reg->mailbox0));
2557
2558 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2559
2560 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
2561 "Driver in %s mode\n",
2562 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
2563
2564 if (IS_NOPOLLING_TYPE(ha))
2565 ha->isp_ops->enable_intrs(ha);
2566
2567 return rval;
2568 }
2569
2570 static void
2571 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
2572 {
2573 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2574
2575 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2576 *data = RD_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET);
2577
2578 }
2579
2580 static void
2581 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
2582 {
2583 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2584
2585 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2586 WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
2587 }
2588
2589 static void
2590 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
2591 {
2592 uint32_t wd32 = 0;
2593 uint delta_msec = 100;
2594 uint elapsed_msec = 0;
2595 uint timeout_msec;
2596 ulong n;
2597
2598 if (vha->hw->pdev->subsystem_device != 0x0175 &&
2599 vha->hw->pdev->subsystem_device != 0x0240)
2600 return;
2601
2602 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2603 udelay(100);
2604
2605 attempt:
2606 timeout_msec = TIMEOUT_SEMAPHORE;
2607 n = timeout_msec / delta_msec;
2608 while (n--) {
2609 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
2610 qla25xx_read_risc_sema_reg(vha, &wd32);
2611 if (wd32 & RISC_SEMAPHORE)
2612 break;
2613 msleep(delta_msec);
2614 elapsed_msec += delta_msec;
2615 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2616 goto force;
2617 }
2618
2619 if (!(wd32 & RISC_SEMAPHORE))
2620 goto force;
2621
2622 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2623 goto acquired;
2624
2625 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
2626 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
2627 n = timeout_msec / delta_msec;
2628 while (n--) {
2629 qla25xx_read_risc_sema_reg(vha, &wd32);
2630 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2631 break;
2632 msleep(delta_msec);
2633 elapsed_msec += delta_msec;
2634 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2635 goto force;
2636 }
2637
2638 if (wd32 & RISC_SEMAPHORE_FORCE)
2639 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
2640
2641 goto attempt;
2642
2643 force:
2644 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
2645
2646 acquired:
2647 return;
2648 }
2649
2650 /**
2651 * qla24xx_reset_chip() - Reset ISP24xx chip.
2652 * @ha: HA context
2653 *
2654 * Returns 0 on success.
2655 */
2656 void
2657 qla24xx_reset_chip(scsi_qla_host_t *vha)
2658 {
2659 struct qla_hw_data *ha = vha->hw;
2660
2661 if (pci_channel_offline(ha->pdev) &&
2662 ha->flags.pci_channel_io_perm_failure) {
2663 return;
2664 }
2665
2666 ha->isp_ops->disable_intrs(ha);
2667
2668 qla25xx_manipulate_risc_semaphore(vha);
2669
2670 /* Perform RISC reset. */
2671 qla24xx_reset_risc(vha);
2672 }
2673
2674 /**
2675 * qla2x00_chip_diag() - Test chip for proper operation.
2676 * @ha: HA context
2677 *
2678 * Returns 0 on success.
2679 */
2680 int
2681 qla2x00_chip_diag(scsi_qla_host_t *vha)
2682 {
2683 int rval;
2684 struct qla_hw_data *ha = vha->hw;
2685 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2686 unsigned long flags = 0;
2687 uint16_t data;
2688 uint32_t cnt;
2689 uint16_t mb[5];
2690 struct req_que *req = ha->req_q_map[0];
2691
2692 /* Assume a failed state */
2693 rval = QLA_FUNCTION_FAILED;
2694
2695 ql_dbg(ql_dbg_init, vha, 0x007b,
2696 "Testing device at %lx.\n", (u_long)&reg->flash_address);
2697
2698 spin_lock_irqsave(&ha->hardware_lock, flags);
2699
2700 /* Reset ISP chip. */
2701 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2702
2703 /*
2704 * We need to have a delay here since the card will not respond while
2705 * in reset causing an MCA on some architectures.
2706 */
2707 udelay(20);
2708 data = qla2x00_debounce_register(&reg->ctrl_status);
2709 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
2710 udelay(5);
2711 data = RD_REG_WORD(&reg->ctrl_status);
2712 barrier();
2713 }
2714
2715 if (!cnt)
2716 goto chip_diag_failed;
2717
2718 ql_dbg(ql_dbg_init, vha, 0x007c,
2719 "Reset register cleared by chip reset.\n");
2720
2721 /* Reset RISC processor. */
2722 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2723 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2724
2725 /* Workaround for QLA2312 PCI parity error */
2726 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2727 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
2728 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
2729 udelay(5);
2730 data = RD_MAILBOX_REG(ha, reg, 0);
2731 barrier();
2732 }
2733 } else
2734 udelay(10);
2735
2736 if (!cnt)
2737 goto chip_diag_failed;
2738
2739 /* Check product ID of chip */
2740 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
2741
2742 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
2743 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
2744 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
2745 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
2746 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
2747 mb[3] != PROD_ID_3) {
2748 ql_log(ql_log_warn, vha, 0x0062,
2749 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
2750 mb[1], mb[2], mb[3]);
2751
2752 goto chip_diag_failed;
2753 }
2754 ha->product_id[0] = mb[1];
2755 ha->product_id[1] = mb[2];
2756 ha->product_id[2] = mb[3];
2757 ha->product_id[3] = mb[4];
2758
2759 /* Adjust fw RISC transfer size */
2760 if (req->length > 1024)
2761 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
2762 else
2763 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
2764 req->length;
2765
2766 if (IS_QLA2200(ha) &&
2767 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
2768 /* Limit firmware transfer size with a 2200A */
2769 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
2770
2771 ha->device_type |= DT_ISP2200A;
2772 ha->fw_transfer_size = 128;
2773 }
2774
2775 /* Wrap Incoming Mailboxes Test. */
2776 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2777
2778 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
2779 rval = qla2x00_mbx_reg_test(vha);
2780 if (rval)
2781 ql_log(ql_log_warn, vha, 0x0080,
2782 "Failed mailbox send register test.\n");
2783 else
2784 /* Flag a successful rval */
2785 rval = QLA_SUCCESS;
2786 spin_lock_irqsave(&ha->hardware_lock, flags);
2787
2788 chip_diag_failed:
2789 if (rval)
2790 ql_log(ql_log_info, vha, 0x0081,
2791 "Chip diagnostics **** FAILED ****.\n");
2792
2793 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2794
2795 return (rval);
2796 }
2797
2798 /**
2799 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
2800 * @ha: HA context
2801 *
2802 * Returns 0 on success.
2803 */
2804 int
2805 qla24xx_chip_diag(scsi_qla_host_t *vha)
2806 {
2807 int rval;
2808 struct qla_hw_data *ha = vha->hw;
2809 struct req_que *req = ha->req_q_map[0];
2810
2811 if (IS_P3P_TYPE(ha))
2812 return QLA_SUCCESS;
2813
2814 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
2815
2816 rval = qla2x00_mbx_reg_test(vha);
2817 if (rval) {
2818 ql_log(ql_log_warn, vha, 0x0082,
2819 "Failed mailbox send register test.\n");
2820 } else {
2821 /* Flag a successful rval */
2822 rval = QLA_SUCCESS;
2823 }
2824
2825 return rval;
2826 }
2827
2828 static void
2829 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
2830 {
2831 int rval;
2832 dma_addr_t tc_dma;
2833 void *tc;
2834 struct qla_hw_data *ha = vha->hw;
2835
2836 if (ha->eft) {
2837 ql_dbg(ql_dbg_init, vha, 0x00bd,
2838 "%s: Offload Mem is already allocated.\n",
2839 __func__);
2840 return;
2841 }
2842
2843 if (IS_FWI2_CAPABLE(ha)) {
2844 /* Allocate memory for Fibre Channel Event Buffer. */
2845 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
2846 !IS_QLA27XX(ha))
2847 goto try_eft;
2848
2849 if (ha->fce)
2850 dma_free_coherent(&ha->pdev->dev,
2851 FCE_SIZE, ha->fce, ha->fce_dma);
2852
2853 /* Allocate memory for Fibre Channel Event Buffer. */
2854 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
2855 GFP_KERNEL);
2856 if (!tc) {
2857 ql_log(ql_log_warn, vha, 0x00be,
2858 "Unable to allocate (%d KB) for FCE.\n",
2859 FCE_SIZE / 1024);
2860 goto try_eft;
2861 }
2862
2863 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
2864 ha->fce_mb, &ha->fce_bufs);
2865 if (rval) {
2866 ql_log(ql_log_warn, vha, 0x00bf,
2867 "Unable to initialize FCE (%d).\n", rval);
2868 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
2869 tc_dma);
2870 ha->flags.fce_enabled = 0;
2871 goto try_eft;
2872 }
2873 ql_dbg(ql_dbg_init, vha, 0x00c0,
2874 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
2875
2876 ha->flags.fce_enabled = 1;
2877 ha->fce_dma = tc_dma;
2878 ha->fce = tc;
2879
2880 try_eft:
2881 if (ha->eft)
2882 dma_free_coherent(&ha->pdev->dev,
2883 EFT_SIZE, ha->eft, ha->eft_dma);
2884
2885 /* Allocate memory for Extended Trace Buffer. */
2886 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
2887 GFP_KERNEL);
2888 if (!tc) {
2889 ql_log(ql_log_warn, vha, 0x00c1,
2890 "Unable to allocate (%d KB) for EFT.\n",
2891 EFT_SIZE / 1024);
2892 goto eft_err;
2893 }
2894
2895 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
2896 if (rval) {
2897 ql_log(ql_log_warn, vha, 0x00c2,
2898 "Unable to initialize EFT (%d).\n", rval);
2899 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
2900 tc_dma);
2901 goto eft_err;
2902 }
2903 ql_dbg(ql_dbg_init, vha, 0x00c3,
2904 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
2905
2906 ha->eft_dma = tc_dma;
2907 ha->eft = tc;
2908 }
2909
2910 eft_err:
2911 return;
2912 }
2913
2914 void
2915 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
2916 {
2917 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
2918 eft_size, fce_size, mq_size;
2919 struct qla_hw_data *ha = vha->hw;
2920 struct req_que *req = ha->req_q_map[0];
2921 struct rsp_que *rsp = ha->rsp_q_map[0];
2922 struct qla2xxx_fw_dump *fw_dump;
2923
2924 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
2925 req_q_size = rsp_q_size = 0;
2926
2927 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2928 fixed_size = sizeof(struct qla2100_fw_dump);
2929 } else if (IS_QLA23XX(ha)) {
2930 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
2931 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
2932 sizeof(uint16_t);
2933 } else if (IS_FWI2_CAPABLE(ha)) {
2934 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
2935 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
2936 else if (IS_QLA81XX(ha))
2937 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
2938 else if (IS_QLA25XX(ha))
2939 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
2940 else
2941 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
2942
2943 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
2944 sizeof(uint32_t);
2945 if (ha->mqenable) {
2946 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
2947 mq_size = sizeof(struct qla2xxx_mq_chain);
2948 /*
2949 * Allocate maximum buffer size for all queues.
2950 * Resizing must be done at end-of-dump processing.
2951 */
2952 mq_size += ha->max_req_queues *
2953 (req->length * sizeof(request_t));
2954 mq_size += ha->max_rsp_queues *
2955 (rsp->length * sizeof(response_t));
2956 }
2957 if (ha->tgt.atio_ring)
2958 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
2959 /* Allocate memory for Fibre Channel Event Buffer. */
2960 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
2961 !IS_QLA27XX(ha))
2962 goto try_eft;
2963
2964 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
2965 try_eft:
2966 ql_dbg(ql_dbg_init, vha, 0x00c3,
2967 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
2968 eft_size = EFT_SIZE;
2969 }
2970
2971 if (IS_QLA27XX(ha)) {
2972 if (!ha->fw_dump_template) {
2973 ql_log(ql_log_warn, vha, 0x00ba,
2974 "Failed missing fwdump template\n");
2975 return;
2976 }
2977 dump_size = qla27xx_fwdt_calculate_dump_size(vha);
2978 ql_dbg(ql_dbg_init, vha, 0x00fa,
2979 "-> allocating fwdump (%x bytes)...\n", dump_size);
2980 goto allocate;
2981 }
2982
2983 req_q_size = req->length * sizeof(request_t);
2984 rsp_q_size = rsp->length * sizeof(response_t);
2985 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
2986 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
2987 ha->chain_offset = dump_size;
2988 dump_size += mq_size + fce_size;
2989
2990 if (ha->exchoffld_buf)
2991 dump_size += sizeof(struct qla2xxx_offld_chain) +
2992 ha->exchoffld_size;
2993 if (ha->exlogin_buf)
2994 dump_size += sizeof(struct qla2xxx_offld_chain) +
2995 ha->exlogin_size;
2996
2997 allocate:
2998 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) {
2999 fw_dump = vmalloc(dump_size);
3000 if (!fw_dump) {
3001 ql_log(ql_log_warn, vha, 0x00c4,
3002 "Unable to allocate (%d KB) for firmware dump.\n",
3003 dump_size / 1024);
3004 } else {
3005 if (ha->fw_dump)
3006 vfree(ha->fw_dump);
3007 ha->fw_dump = fw_dump;
3008
3009 ha->fw_dump_len = dump_size;
3010 ql_dbg(ql_dbg_init, vha, 0x00c5,
3011 "Allocated (%d KB) for firmware dump.\n",
3012 dump_size / 1024);
3013
3014 if (IS_QLA27XX(ha))
3015 return;
3016
3017 ha->fw_dump->signature[0] = 'Q';
3018 ha->fw_dump->signature[1] = 'L';
3019 ha->fw_dump->signature[2] = 'G';
3020 ha->fw_dump->signature[3] = 'C';
3021 ha->fw_dump->version = htonl(1);
3022
3023 ha->fw_dump->fixed_size = htonl(fixed_size);
3024 ha->fw_dump->mem_size = htonl(mem_size);
3025 ha->fw_dump->req_q_size = htonl(req_q_size);
3026 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3027
3028 ha->fw_dump->eft_size = htonl(eft_size);
3029 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
3030 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
3031
3032 ha->fw_dump->header_size =
3033 htonl(offsetof(struct qla2xxx_fw_dump, isp));
3034 }
3035 }
3036 }
3037
3038 static int
3039 qla81xx_mpi_sync(scsi_qla_host_t *vha)
3040 {
3041 #define MPS_MASK 0xe0
3042 int rval;
3043 uint16_t dc;
3044 uint32_t dw;
3045
3046 if (!IS_QLA81XX(vha->hw))
3047 return QLA_SUCCESS;
3048
3049 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3050 if (rval != QLA_SUCCESS) {
3051 ql_log(ql_log_warn, vha, 0x0105,
3052 "Unable to acquire semaphore.\n");
3053 goto done;
3054 }
3055
3056 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3057 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3058 if (rval != QLA_SUCCESS) {
3059 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
3060 goto done_release;
3061 }
3062
3063 dc &= MPS_MASK;
3064 if (dc == (dw & MPS_MASK))
3065 goto done_release;
3066
3067 dw &= ~MPS_MASK;
3068 dw |= dc;
3069 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3070 if (rval != QLA_SUCCESS) {
3071 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
3072 }
3073
3074 done_release:
3075 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3076 if (rval != QLA_SUCCESS) {
3077 ql_log(ql_log_warn, vha, 0x006d,
3078 "Unable to release semaphore.\n");
3079 }
3080
3081 done:
3082 return rval;
3083 }
3084
3085 int
3086 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3087 {
3088 /* Don't try to reallocate the array */
3089 if (req->outstanding_cmds)
3090 return QLA_SUCCESS;
3091
3092 if (!IS_FWI2_CAPABLE(ha))
3093 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3094 else {
3095 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3096 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
3097 else
3098 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
3099 }
3100
3101 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
3102 req->num_outstanding_cmds, GFP_KERNEL);
3103
3104 if (!req->outstanding_cmds) {
3105 /*
3106 * Try to allocate a minimal size just so we can get through
3107 * initialization.
3108 */
3109 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
3110 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
3111 req->num_outstanding_cmds, GFP_KERNEL);
3112
3113 if (!req->outstanding_cmds) {
3114 ql_log(ql_log_fatal, NULL, 0x0126,
3115 "Failed to allocate memory for "
3116 "outstanding_cmds for req_que %p.\n", req);
3117 req->num_outstanding_cmds = 0;
3118 return QLA_FUNCTION_FAILED;
3119 }
3120 }
3121
3122 return QLA_SUCCESS;
3123 }
3124
3125 #define PRINT_FIELD(_field, _flag, _str) { \
3126 if (a0->_field & _flag) {\
3127 if (p) {\
3128 strcat(ptr, "|");\
3129 ptr++;\
3130 leftover--;\
3131 } \
3132 len = snprintf(ptr, leftover, "%s", _str); \
3133 p = 1;\
3134 leftover -= len;\
3135 ptr += len; \
3136 } \
3137 }
3138
3139 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
3140 {
3141 #define STR_LEN 64
3142 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
3143 u8 str[STR_LEN], *ptr, p;
3144 int leftover, len;
3145
3146 memset(str, 0, STR_LEN);
3147 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
3148 ql_dbg(ql_dbg_init, vha, 0x015a,
3149 "SFP MFG Name: %s\n", str);
3150
3151 memset(str, 0, STR_LEN);
3152 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
3153 ql_dbg(ql_dbg_init, vha, 0x015c,
3154 "SFP Part Name: %s\n", str);
3155
3156 /* media */
3157 memset(str, 0, STR_LEN);
3158 ptr = str;
3159 leftover = STR_LEN;
3160 p = len = 0;
3161 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
3162 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
3163 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
3164 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
3165 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
3166 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
3167 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
3168 ql_dbg(ql_dbg_init, vha, 0x0160,
3169 "SFP Media: %s\n", str);
3170
3171 /* link length */
3172 memset(str, 0, STR_LEN);
3173 ptr = str;
3174 leftover = STR_LEN;
3175 p = len = 0;
3176 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
3177 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
3178 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
3179 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
3180 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
3181 ql_dbg(ql_dbg_init, vha, 0x0196,
3182 "SFP Link Length: %s\n", str);
3183
3184 memset(str, 0, STR_LEN);
3185 ptr = str;
3186 leftover = STR_LEN;
3187 p = len = 0;
3188 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
3189 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
3190 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
3191 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
3192 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
3193 ql_dbg(ql_dbg_init, vha, 0x016e,
3194 "SFP FC Link Tech: %s\n", str);
3195
3196 if (a0->length_km)
3197 ql_dbg(ql_dbg_init, vha, 0x016f,
3198 "SFP Distant: %d km\n", a0->length_km);
3199 if (a0->length_100m)
3200 ql_dbg(ql_dbg_init, vha, 0x0170,
3201 "SFP Distant: %d m\n", a0->length_100m*100);
3202 if (a0->length_50um_10m)
3203 ql_dbg(ql_dbg_init, vha, 0x0189,
3204 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
3205 if (a0->length_62um_10m)
3206 ql_dbg(ql_dbg_init, vha, 0x018a,
3207 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
3208 if (a0->length_om4_10m)
3209 ql_dbg(ql_dbg_init, vha, 0x0194,
3210 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
3211 if (a0->length_om3_10m)
3212 ql_dbg(ql_dbg_init, vha, 0x0195,
3213 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
3214 }
3215
3216
3217 /*
3218 * Return Code:
3219 * QLA_SUCCESS: no action
3220 * QLA_INTERFACE_ERROR: SFP is not there.
3221 * QLA_FUNCTION_FAILED: detected New SFP
3222 */
3223 int
3224 qla24xx_detect_sfp(scsi_qla_host_t *vha)
3225 {
3226 int rc = QLA_SUCCESS;
3227 struct sff_8247_a0 *a;
3228 struct qla_hw_data *ha = vha->hw;
3229
3230 if (!AUTO_DETECT_SFP_SUPPORT(vha))
3231 goto out;
3232
3233 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3234 if (rc)
3235 goto out;
3236
3237 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3238 qla2xxx_print_sfp_info(vha);
3239
3240 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) {
3241 /* long range */
3242 ha->flags.detected_lr_sfp = 1;
3243
3244 if (a->length_km > 5 || a->length_100m > 50)
3245 ha->long_range_distance = LR_DISTANCE_10K;
3246 else
3247 ha->long_range_distance = LR_DISTANCE_5K;
3248
3249 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting)
3250 ql_dbg(ql_dbg_async, vha, 0x507b,
3251 "Detected Long Range SFP.\n");
3252 } else {
3253 /* short range */
3254 ha->flags.detected_lr_sfp = 0;
3255 if (ha->flags.using_lr_setting)
3256 ql_dbg(ql_dbg_async, vha, 0x5084,
3257 "Detected Short Range SFP.\n");
3258 }
3259
3260 if (!vha->flags.init_done)
3261 rc = QLA_SUCCESS;
3262 out:
3263 return rc;
3264 }
3265
3266 /**
3267 * qla2x00_setup_chip() - Load and start RISC firmware.
3268 * @ha: HA context
3269 *
3270 * Returns 0 on success.
3271 */
3272 static int
3273 qla2x00_setup_chip(scsi_qla_host_t *vha)
3274 {
3275 int rval;
3276 uint32_t srisc_address = 0;
3277 struct qla_hw_data *ha = vha->hw;
3278 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3279 unsigned long flags;
3280 uint16_t fw_major_version;
3281
3282 if (IS_P3P_TYPE(ha)) {
3283 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3284 if (rval == QLA_SUCCESS) {
3285 qla2x00_stop_firmware(vha);
3286 goto enable_82xx_npiv;
3287 } else
3288 goto failed;
3289 }
3290
3291 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3292 /* Disable SRAM, Instruction RAM and GP RAM parity. */
3293 spin_lock_irqsave(&ha->hardware_lock, flags);
3294 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
3295 RD_REG_WORD(&reg->hccr);
3296 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3297 }
3298
3299 qla81xx_mpi_sync(vha);
3300
3301 /* Load firmware sequences */
3302 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3303 if (rval == QLA_SUCCESS) {
3304 ql_dbg(ql_dbg_init, vha, 0x00c9,
3305 "Verifying Checksum of loaded RISC code.\n");
3306
3307 rval = qla2x00_verify_checksum(vha, srisc_address);
3308 if (rval == QLA_SUCCESS) {
3309 /* Start firmware execution. */
3310 ql_dbg(ql_dbg_init, vha, 0x00ca,
3311 "Starting firmware.\n");
3312
3313 if (ql2xexlogins)
3314 ha->flags.exlogins_enabled = 1;
3315
3316 if (qla_is_exch_offld_enabled(vha))
3317 ha->flags.exchoffld_enabled = 1;
3318
3319 rval = qla2x00_execute_fw(vha, srisc_address);
3320 /* Retrieve firmware information. */
3321 if (rval == QLA_SUCCESS) {
3322 qla24xx_detect_sfp(vha);
3323
3324 rval = qla2x00_set_exlogins_buffer(vha);
3325 if (rval != QLA_SUCCESS)
3326 goto failed;
3327
3328 rval = qla2x00_set_exchoffld_buffer(vha);
3329 if (rval != QLA_SUCCESS)
3330 goto failed;
3331
3332 enable_82xx_npiv:
3333 fw_major_version = ha->fw_major_version;
3334 if (IS_P3P_TYPE(ha))
3335 qla82xx_check_md_needed(vha);
3336 else
3337 rval = qla2x00_get_fw_version(vha);
3338 if (rval != QLA_SUCCESS)
3339 goto failed;
3340 ha->flags.npiv_supported = 0;
3341 if (IS_QLA2XXX_MIDTYPE(ha) &&
3342 (ha->fw_attributes & BIT_2)) {
3343 ha->flags.npiv_supported = 1;
3344 if ((!ha->max_npiv_vports) ||
3345 ((ha->max_npiv_vports + 1) %
3346 MIN_MULTI_ID_FABRIC))
3347 ha->max_npiv_vports =
3348 MIN_MULTI_ID_FABRIC - 1;
3349 }
3350 qla2x00_get_resource_cnts(vha);
3351
3352 /*
3353 * Allocate the array of outstanding commands
3354 * now that we know the firmware resources.
3355 */
3356 rval = qla2x00_alloc_outstanding_cmds(ha,
3357 vha->req);
3358 if (rval != QLA_SUCCESS)
3359 goto failed;
3360
3361 if (!fw_major_version && !(IS_P3P_TYPE(ha)))
3362 qla2x00_alloc_offload_mem(vha);
3363
3364 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
3365 qla2x00_alloc_fw_dump(vha);
3366
3367 } else {
3368 goto failed;
3369 }
3370 } else {
3371 ql_log(ql_log_fatal, vha, 0x00cd,
3372 "ISP Firmware failed checksum.\n");
3373 goto failed;
3374 }
3375 } else
3376 goto failed;
3377
3378 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3379 /* Enable proper parity. */
3380 spin_lock_irqsave(&ha->hardware_lock, flags);
3381 if (IS_QLA2300(ha))
3382 /* SRAM parity */
3383 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
3384 else
3385 /* SRAM, Instruction RAM and GP RAM parity */
3386 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
3387 RD_REG_WORD(&reg->hccr);
3388 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3389 }
3390
3391 if (IS_QLA27XX(ha))
3392 ha->flags.fac_supported = 1;
3393 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
3394 uint32_t size;
3395
3396 rval = qla81xx_fac_get_sector_size(vha, &size);
3397 if (rval == QLA_SUCCESS) {
3398 ha->flags.fac_supported = 1;
3399 ha->fdt_block_size = size << 2;
3400 } else {
3401 ql_log(ql_log_warn, vha, 0x00ce,
3402 "Unsupported FAC firmware (%d.%02d.%02d).\n",
3403 ha->fw_major_version, ha->fw_minor_version,
3404 ha->fw_subminor_version);
3405
3406 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3407 ha->flags.fac_supported = 0;
3408 rval = QLA_SUCCESS;
3409 }
3410 }
3411 }
3412 failed:
3413 if (rval) {
3414 ql_log(ql_log_fatal, vha, 0x00cf,
3415 "Setup chip ****FAILED****.\n");
3416 }
3417
3418 return (rval);
3419 }
3420
3421 /**
3422 * qla2x00_init_response_q_entries() - Initializes response queue entries.
3423 * @ha: HA context
3424 *
3425 * Beginning of request ring has initialization control block already built
3426 * by nvram config routine.
3427 *
3428 * Returns 0 on success.
3429 */
3430 void
3431 qla2x00_init_response_q_entries(struct rsp_que *rsp)
3432 {
3433 uint16_t cnt;
3434 response_t *pkt;
3435
3436 rsp->ring_ptr = rsp->ring;
3437 rsp->ring_index = 0;
3438 rsp->status_srb = NULL;
3439 pkt = rsp->ring_ptr;
3440 for (cnt = 0; cnt < rsp->length; cnt++) {
3441 pkt->signature = RESPONSE_PROCESSED;
3442 pkt++;
3443 }
3444 }
3445
3446 /**
3447 * qla2x00_update_fw_options() - Read and process firmware options.
3448 * @ha: HA context
3449 *
3450 * Returns 0 on success.
3451 */
3452 void
3453 qla2x00_update_fw_options(scsi_qla_host_t *vha)
3454 {
3455 uint16_t swing, emphasis, tx_sens, rx_sens;
3456 struct qla_hw_data *ha = vha->hw;
3457
3458 memset(ha->fw_options, 0, sizeof(ha->fw_options));
3459 qla2x00_get_fw_options(vha, ha->fw_options);
3460
3461 if (IS_QLA2100(ha) || IS_QLA2200(ha))
3462 return;
3463
3464 /* Serial Link options. */
3465 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
3466 "Serial link options.\n");
3467 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
3468 (uint8_t *)&ha->fw_seriallink_options,
3469 sizeof(ha->fw_seriallink_options));
3470
3471 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
3472 if (ha->fw_seriallink_options[3] & BIT_2) {
3473 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
3474
3475 /* 1G settings */
3476 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
3477 emphasis = (ha->fw_seriallink_options[2] &
3478 (BIT_4 | BIT_3)) >> 3;
3479 tx_sens = ha->fw_seriallink_options[0] &
3480 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3481 rx_sens = (ha->fw_seriallink_options[0] &
3482 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3483 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
3484 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3485 if (rx_sens == 0x0)
3486 rx_sens = 0x3;
3487 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
3488 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3489 ha->fw_options[10] |= BIT_5 |
3490 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3491 (tx_sens & (BIT_1 | BIT_0));
3492
3493 /* 2G settings */
3494 swing = (ha->fw_seriallink_options[2] &
3495 (BIT_7 | BIT_6 | BIT_5)) >> 5;
3496 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
3497 tx_sens = ha->fw_seriallink_options[1] &
3498 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3499 rx_sens = (ha->fw_seriallink_options[1] &
3500 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3501 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
3502 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3503 if (rx_sens == 0x0)
3504 rx_sens = 0x3;
3505 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
3506 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3507 ha->fw_options[11] |= BIT_5 |
3508 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3509 (tx_sens & (BIT_1 | BIT_0));
3510 }
3511
3512 /* FCP2 options. */
3513 /* Return command IOCBs without waiting for an ABTS to complete. */
3514 ha->fw_options[3] |= BIT_13;
3515
3516 /* LED scheme. */
3517 if (ha->flags.enable_led_scheme)
3518 ha->fw_options[2] |= BIT_12;
3519
3520 /* Detect ISP6312. */
3521 if (IS_QLA6312(ha))
3522 ha->fw_options[2] |= BIT_13;
3523
3524 /* Set Retry FLOGI in case of P2P connection */
3525 if (ha->operating_mode == P2P) {
3526 ha->fw_options[2] |= BIT_3;
3527 ql_dbg(ql_dbg_disc, vha, 0x2100,
3528 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3529 __func__, ha->fw_options[2]);
3530 }
3531
3532 /* Update firmware options. */
3533 qla2x00_set_fw_options(vha, ha->fw_options);
3534 }
3535
3536 void
3537 qla24xx_update_fw_options(scsi_qla_host_t *vha)
3538 {
3539 int rval;
3540 struct qla_hw_data *ha = vha->hw;
3541
3542 if (IS_P3P_TYPE(ha))
3543 return;
3544
3545 /* Hold status IOCBs until ABTS response received. */
3546 if (ql2xfwholdabts)
3547 ha->fw_options[3] |= BIT_12;
3548
3549 /* Set Retry FLOGI in case of P2P connection */
3550 if (ha->operating_mode == P2P) {
3551 ha->fw_options[2] |= BIT_3;
3552 ql_dbg(ql_dbg_disc, vha, 0x2101,
3553 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3554 __func__, ha->fw_options[2]);
3555 }
3556
3557 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
3558 if (ql2xmvasynctoatio &&
3559 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) {
3560 if (qla_tgt_mode_enabled(vha) ||
3561 qla_dual_mode_enabled(vha))
3562 ha->fw_options[2] |= BIT_11;
3563 else
3564 ha->fw_options[2] &= ~BIT_11;
3565 }
3566
3567 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3568 /*
3569 * Tell FW to track each exchange to prevent
3570 * driver from using stale exchange.
3571 */
3572 if (qla_tgt_mode_enabled(vha) ||
3573 qla_dual_mode_enabled(vha))
3574 ha->fw_options[2] |= BIT_4;
3575 else
3576 ha->fw_options[2] &= ~BIT_4;
3577
3578 /* Reserve 1/2 of emergency exchanges for ELS.*/
3579 if (qla2xuseresexchforels)
3580 ha->fw_options[2] |= BIT_8;
3581 else
3582 ha->fw_options[2] &= ~BIT_8;
3583 }
3584
3585 ql_dbg(ql_dbg_init, vha, 0x00e8,
3586 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
3587 __func__, ha->fw_options[1], ha->fw_options[2],
3588 ha->fw_options[3], vha->host->active_mode);
3589
3590 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
3591 qla2x00_set_fw_options(vha, ha->fw_options);
3592
3593 /* Update Serial Link options. */
3594 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
3595 return;
3596
3597 rval = qla2x00_set_serdes_params(vha,
3598 le16_to_cpu(ha->fw_seriallink_options24[1]),
3599 le16_to_cpu(ha->fw_seriallink_options24[2]),
3600 le16_to_cpu(ha->fw_seriallink_options24[3]));
3601 if (rval != QLA_SUCCESS) {
3602 ql_log(ql_log_warn, vha, 0x0104,
3603 "Unable to update Serial Link options (%x).\n", rval);
3604 }
3605 }
3606
3607 void
3608 qla2x00_config_rings(struct scsi_qla_host *vha)
3609 {
3610 struct qla_hw_data *ha = vha->hw;
3611 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3612 struct req_que *req = ha->req_q_map[0];
3613 struct rsp_que *rsp = ha->rsp_q_map[0];
3614
3615 /* Setup ring parameters in initialization control block. */
3616 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
3617 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
3618 ha->init_cb->request_q_length = cpu_to_le16(req->length);
3619 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
3620 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3621 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3622 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3623 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
3624
3625 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
3626 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
3627 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
3628 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
3629 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
3630 }
3631
3632 void
3633 qla24xx_config_rings(struct scsi_qla_host *vha)
3634 {
3635 struct qla_hw_data *ha = vha->hw;
3636 device_reg_t *reg = ISP_QUE_REG(ha, 0);
3637 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
3638 struct qla_msix_entry *msix;
3639 struct init_cb_24xx *icb;
3640 uint16_t rid = 0;
3641 struct req_que *req = ha->req_q_map[0];
3642 struct rsp_que *rsp = ha->rsp_q_map[0];
3643
3644 /* Setup ring parameters in initialization control block. */
3645 icb = (struct init_cb_24xx *)ha->init_cb;
3646 icb->request_q_outpointer = cpu_to_le16(0);
3647 icb->response_q_inpointer = cpu_to_le16(0);
3648 icb->request_q_length = cpu_to_le16(req->length);
3649 icb->response_q_length = cpu_to_le16(rsp->length);
3650 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3651 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3652 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3653 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
3654
3655 /* Setup ATIO queue dma pointers for target mode */
3656 icb->atio_q_inpointer = cpu_to_le16(0);
3657 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
3658 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
3659 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
3660
3661 if (IS_SHADOW_REG_CAPABLE(ha))
3662 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
3663
3664 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3665 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
3666 icb->rid = cpu_to_le16(rid);
3667 if (ha->flags.msix_enabled) {
3668 msix = &ha->msix_entries[1];
3669 ql_dbg(ql_dbg_init, vha, 0x0019,
3670 "Registering vector 0x%x for base que.\n",
3671 msix->entry);
3672 icb->msix = cpu_to_le16(msix->entry);
3673 }
3674 /* Use alternate PCI bus number */
3675 if (MSB(rid))
3676 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
3677 /* Use alternate PCI devfn */
3678 if (LSB(rid))
3679 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
3680
3681 /* Use Disable MSIX Handshake mode for capable adapters */
3682 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
3683 (ha->flags.msix_enabled)) {
3684 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
3685 ha->flags.disable_msix_handshake = 1;
3686 ql_dbg(ql_dbg_init, vha, 0x00fe,
3687 "MSIX Handshake Disable Mode turned on.\n");
3688 } else {
3689 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
3690 }
3691 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
3692
3693 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
3694 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
3695 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
3696 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
3697 } else {
3698 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
3699 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
3700 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
3701 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
3702 }
3703 qlt_24xx_config_rings(vha);
3704
3705 /* PCI posting */
3706 RD_REG_DWORD(&ioreg->hccr);
3707 }
3708
3709 /**
3710 * qla2x00_init_rings() - Initializes firmware.
3711 * @ha: HA context
3712 *
3713 * Beginning of request ring has initialization control block already built
3714 * by nvram config routine.
3715 *
3716 * Returns 0 on success.
3717 */
3718 int
3719 qla2x00_init_rings(scsi_qla_host_t *vha)
3720 {
3721 int rval;
3722 unsigned long flags = 0;
3723 int cnt, que;
3724 struct qla_hw_data *ha = vha->hw;
3725 struct req_que *req;
3726 struct rsp_que *rsp;
3727 struct mid_init_cb_24xx *mid_init_cb =
3728 (struct mid_init_cb_24xx *) ha->init_cb;
3729
3730 spin_lock_irqsave(&ha->hardware_lock, flags);
3731
3732 /* Clear outstanding commands array. */
3733 for (que = 0; que < ha->max_req_queues; que++) {
3734 req = ha->req_q_map[que];
3735 if (!req || !test_bit(que, ha->req_qid_map))
3736 continue;
3737 req->out_ptr = (void *)(req->ring + req->length);
3738 *req->out_ptr = 0;
3739 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
3740 req->outstanding_cmds[cnt] = NULL;
3741
3742 req->current_outstanding_cmd = 1;
3743
3744 /* Initialize firmware. */
3745 req->ring_ptr = req->ring;
3746 req->ring_index = 0;
3747 req->cnt = req->length;
3748 }
3749
3750 for (que = 0; que < ha->max_rsp_queues; que++) {
3751 rsp = ha->rsp_q_map[que];
3752 if (!rsp || !test_bit(que, ha->rsp_qid_map))
3753 continue;
3754 rsp->in_ptr = (void *)(rsp->ring + rsp->length);
3755 *rsp->in_ptr = 0;
3756 /* Initialize response queue entries */
3757 if (IS_QLAFX00(ha))
3758 qlafx00_init_response_q_entries(rsp);
3759 else
3760 qla2x00_init_response_q_entries(rsp);
3761 }
3762
3763 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
3764 ha->tgt.atio_ring_index = 0;
3765 /* Initialize ATIO queue entries */
3766 qlt_init_atio_q_entries(vha);
3767
3768 ha->isp_ops->config_rings(vha);
3769
3770 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3771
3772 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
3773
3774 if (IS_QLAFX00(ha)) {
3775 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
3776 goto next_check;
3777 }
3778
3779 /* Update any ISP specific firmware options before initialization. */
3780 ha->isp_ops->update_fw_options(vha);
3781
3782 if (ha->flags.npiv_supported) {
3783 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
3784 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
3785 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
3786 }
3787
3788 if (IS_FWI2_CAPABLE(ha)) {
3789 mid_init_cb->options = cpu_to_le16(BIT_1);
3790 mid_init_cb->init_cb.execution_throttle =
3791 cpu_to_le16(ha->cur_fw_xcb_count);
3792 ha->flags.dport_enabled =
3793 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0;
3794 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
3795 (ha->flags.dport_enabled) ? "enabled" : "disabled");
3796 /* FA-WWPN Status */
3797 ha->flags.fawwpn_enabled =
3798 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0;
3799 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
3800 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
3801 }
3802
3803 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
3804 next_check:
3805 if (rval) {
3806 ql_log(ql_log_fatal, vha, 0x00d2,
3807 "Init Firmware **** FAILED ****.\n");
3808 } else {
3809 ql_dbg(ql_dbg_init, vha, 0x00d3,
3810 "Init Firmware -- success.\n");
3811 QLA_FW_STARTED(ha);
3812 }
3813
3814 return (rval);
3815 }
3816
3817 /**
3818 * qla2x00_fw_ready() - Waits for firmware ready.
3819 * @ha: HA context
3820 *
3821 * Returns 0 on success.
3822 */
3823 static int
3824 qla2x00_fw_ready(scsi_qla_host_t *vha)
3825 {
3826 int rval;
3827 unsigned long wtime, mtime, cs84xx_time;
3828 uint16_t min_wait; /* Minimum wait time if loop is down */
3829 uint16_t wait_time; /* Wait time if loop is coming ready */
3830 uint16_t state[6];
3831 struct qla_hw_data *ha = vha->hw;
3832
3833 if (IS_QLAFX00(vha->hw))
3834 return qlafx00_fw_ready(vha);
3835
3836 rval = QLA_SUCCESS;
3837
3838 /* Time to wait for loop down */
3839 if (IS_P3P_TYPE(ha))
3840 min_wait = 30;
3841 else
3842 min_wait = 20;
3843
3844 /*
3845 * Firmware should take at most one RATOV to login, plus 5 seconds for
3846 * our own processing.
3847 */
3848 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
3849 wait_time = min_wait;
3850 }
3851
3852 /* Min wait time if loop down */
3853 mtime = jiffies + (min_wait * HZ);
3854
3855 /* wait time before firmware ready */
3856 wtime = jiffies + (wait_time * HZ);
3857
3858 /* Wait for ISP to finish LIP */
3859 if (!vha->flags.init_done)
3860 ql_log(ql_log_info, vha, 0x801e,
3861 "Waiting for LIP to complete.\n");
3862
3863 do {
3864 memset(state, -1, sizeof(state));
3865 rval = qla2x00_get_firmware_state(vha, state);
3866 if (rval == QLA_SUCCESS) {
3867 if (state[0] < FSTATE_LOSS_OF_SYNC) {
3868 vha->device_flags &= ~DFLG_NO_CABLE;
3869 }
3870 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
3871 ql_dbg(ql_dbg_taskm, vha, 0x801f,
3872 "fw_state=%x 84xx=%x.\n", state[0],
3873 state[2]);
3874 if ((state[2] & FSTATE_LOGGED_IN) &&
3875 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
3876 ql_dbg(ql_dbg_taskm, vha, 0x8028,
3877 "Sending verify iocb.\n");
3878
3879 cs84xx_time = jiffies;
3880 rval = qla84xx_init_chip(vha);
3881 if (rval != QLA_SUCCESS) {
3882 ql_log(ql_log_warn,
3883 vha, 0x8007,
3884 "Init chip failed.\n");
3885 break;
3886 }
3887
3888 /* Add time taken to initialize. */
3889 cs84xx_time = jiffies - cs84xx_time;
3890 wtime += cs84xx_time;
3891 mtime += cs84xx_time;
3892 ql_dbg(ql_dbg_taskm, vha, 0x8008,
3893 "Increasing wait time by %ld. "
3894 "New time %ld.\n", cs84xx_time,
3895 wtime);
3896 }
3897 } else if (state[0] == FSTATE_READY) {
3898 ql_dbg(ql_dbg_taskm, vha, 0x8037,
3899 "F/W Ready - OK.\n");
3900
3901 qla2x00_get_retry_cnt(vha, &ha->retry_count,
3902 &ha->login_timeout, &ha->r_a_tov);
3903
3904 rval = QLA_SUCCESS;
3905 break;
3906 }
3907
3908 rval = QLA_FUNCTION_FAILED;
3909
3910 if (atomic_read(&vha->loop_down_timer) &&
3911 state[0] != FSTATE_READY) {
3912 /* Loop down. Timeout on min_wait for states
3913 * other than Wait for Login.
3914 */
3915 if (time_after_eq(jiffies, mtime)) {
3916 ql_log(ql_log_info, vha, 0x8038,
3917 "Cable is unplugged...\n");
3918
3919 vha->device_flags |= DFLG_NO_CABLE;
3920 break;
3921 }
3922 }
3923 } else {
3924 /* Mailbox cmd failed. Timeout on min_wait. */
3925 if (time_after_eq(jiffies, mtime) ||
3926 ha->flags.isp82xx_fw_hung)
3927 break;
3928 }
3929
3930 if (time_after_eq(jiffies, wtime))
3931 break;
3932
3933 /* Delay for a while */
3934 msleep(500);
3935 } while (1);
3936
3937 ql_dbg(ql_dbg_taskm, vha, 0x803a,
3938 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
3939 state[1], state[2], state[3], state[4], state[5], jiffies);
3940
3941 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
3942 ql_log(ql_log_warn, vha, 0x803b,
3943 "Firmware ready **** FAILED ****.\n");
3944 }
3945
3946 return (rval);
3947 }
3948
3949 /*
3950 * qla2x00_configure_hba
3951 * Setup adapter context.
3952 *
3953 * Input:
3954 * ha = adapter state pointer.
3955 *
3956 * Returns:
3957 * 0 = success
3958 *
3959 * Context:
3960 * Kernel context.
3961 */
3962 static int
3963 qla2x00_configure_hba(scsi_qla_host_t *vha)
3964 {
3965 int rval;
3966 uint16_t loop_id;
3967 uint16_t topo;
3968 uint16_t sw_cap;
3969 uint8_t al_pa;
3970 uint8_t area;
3971 uint8_t domain;
3972 char connect_type[22];
3973 struct qla_hw_data *ha = vha->hw;
3974 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
3975 port_id_t id;
3976 unsigned long flags;
3977
3978 /* Get host addresses. */
3979 rval = qla2x00_get_adapter_id(vha,
3980 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
3981 if (rval != QLA_SUCCESS) {
3982 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
3983 IS_CNA_CAPABLE(ha) ||
3984 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
3985 ql_dbg(ql_dbg_disc, vha, 0x2008,
3986 "Loop is in a transition state.\n");
3987 } else {
3988 ql_log(ql_log_warn, vha, 0x2009,
3989 "Unable to get host loop ID.\n");
3990 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
3991 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
3992 ql_log(ql_log_warn, vha, 0x1151,
3993 "Doing link init.\n");
3994 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
3995 return rval;
3996 }
3997 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3998 }
3999 return (rval);
4000 }
4001
4002 if (topo == 4) {
4003 ql_log(ql_log_info, vha, 0x200a,
4004 "Cannot get topology - retrying.\n");
4005 return (QLA_FUNCTION_FAILED);
4006 }
4007
4008 vha->loop_id = loop_id;
4009
4010 /* initialize */
4011 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
4012 ha->operating_mode = LOOP;
4013 ha->switch_cap = 0;
4014
4015 switch (topo) {
4016 case 0:
4017 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
4018 ha->current_topology = ISP_CFG_NL;
4019 strcpy(connect_type, "(Loop)");
4020 break;
4021
4022 case 1:
4023 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
4024 ha->switch_cap = sw_cap;
4025 ha->current_topology = ISP_CFG_FL;
4026 strcpy(connect_type, "(FL_Port)");
4027 break;
4028
4029 case 2:
4030 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
4031 ha->operating_mode = P2P;
4032 ha->current_topology = ISP_CFG_N;
4033 strcpy(connect_type, "(N_Port-to-N_Port)");
4034 break;
4035
4036 case 3:
4037 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
4038 ha->switch_cap = sw_cap;
4039 ha->operating_mode = P2P;
4040 ha->current_topology = ISP_CFG_F;
4041 strcpy(connect_type, "(F_Port)");
4042 break;
4043
4044 default:
4045 ql_dbg(ql_dbg_disc, vha, 0x200f,
4046 "HBA in unknown topology %x, using NL.\n", topo);
4047 ha->current_topology = ISP_CFG_NL;
4048 strcpy(connect_type, "(Loop)");
4049 break;
4050 }
4051
4052 /* Save Host port and loop ID. */
4053 /* byte order - Big Endian */
4054 id.b.domain = domain;
4055 id.b.area = area;
4056 id.b.al_pa = al_pa;
4057 id.b.rsvd_1 = 0;
4058 spin_lock_irqsave(&ha->hardware_lock, flags);
4059 qlt_update_host_map(vha, id);
4060 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4061
4062 if (!vha->flags.init_done)
4063 ql_log(ql_log_info, vha, 0x2010,
4064 "Topology - %s, Host Loop address 0x%x.\n",
4065 connect_type, vha->loop_id);
4066
4067 return(rval);
4068 }
4069
4070 inline void
4071 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
4072 char *def)
4073 {
4074 char *st, *en;
4075 uint16_t index;
4076 struct qla_hw_data *ha = vha->hw;
4077 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
4078 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
4079
4080 if (memcmp(model, BINZERO, len) != 0) {
4081 strncpy(ha->model_number, model, len);
4082 st = en = ha->model_number;
4083 en += len - 1;
4084 while (en > st) {
4085 if (*en != 0x20 && *en != 0x00)
4086 break;
4087 *en-- = '\0';
4088 }
4089
4090 index = (ha->pdev->subsystem_device & 0xff);
4091 if (use_tbl &&
4092 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4093 index < QLA_MODEL_NAMES)
4094 strncpy(ha->model_desc,
4095 qla2x00_model_name[index * 2 + 1],
4096 sizeof(ha->model_desc) - 1);
4097 } else {
4098 index = (ha->pdev->subsystem_device & 0xff);
4099 if (use_tbl &&
4100 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4101 index < QLA_MODEL_NAMES) {
4102 strcpy(ha->model_number,
4103 qla2x00_model_name[index * 2]);
4104 strncpy(ha->model_desc,
4105 qla2x00_model_name[index * 2 + 1],
4106 sizeof(ha->model_desc) - 1);
4107 } else {
4108 strcpy(ha->model_number, def);
4109 }
4110 }
4111 if (IS_FWI2_CAPABLE(ha))
4112 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
4113 sizeof(ha->model_desc));
4114 }
4115
4116 /* On sparc systems, obtain port and node WWN from firmware
4117 * properties.
4118 */
4119 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4120 {
4121 #ifdef CONFIG_SPARC
4122 struct qla_hw_data *ha = vha->hw;
4123 struct pci_dev *pdev = ha->pdev;
4124 struct device_node *dp = pci_device_to_OF_node(pdev);
4125 const u8 *val;
4126 int len;
4127
4128 val = of_get_property(dp, "port-wwn", &len);
4129 if (val && len >= WWN_SIZE)
4130 memcpy(nv->port_name, val, WWN_SIZE);
4131
4132 val = of_get_property(dp, "node-wwn", &len);
4133 if (val && len >= WWN_SIZE)
4134 memcpy(nv->node_name, val, WWN_SIZE);
4135 #endif
4136 }
4137
4138 /*
4139 * NVRAM configuration for ISP 2xxx
4140 *
4141 * Input:
4142 * ha = adapter block pointer.
4143 *
4144 * Output:
4145 * initialization control block in response_ring
4146 * host adapters parameters in host adapter block
4147 *
4148 * Returns:
4149 * 0 = success.
4150 */
4151 int
4152 qla2x00_nvram_config(scsi_qla_host_t *vha)
4153 {
4154 int rval;
4155 uint8_t chksum = 0;
4156 uint16_t cnt;
4157 uint8_t *dptr1, *dptr2;
4158 struct qla_hw_data *ha = vha->hw;
4159 init_cb_t *icb = ha->init_cb;
4160 nvram_t *nv = ha->nvram;
4161 uint8_t *ptr = ha->nvram;
4162 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4163
4164 rval = QLA_SUCCESS;
4165
4166 /* Determine NVRAM starting address. */
4167 ha->nvram_size = sizeof(nvram_t);
4168 ha->nvram_base = 0;
4169 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4170 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
4171 ha->nvram_base = 0x80;
4172
4173 /* Get NVRAM data and calculate checksum. */
4174 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
4175 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
4176 chksum += *ptr++;
4177
4178 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4179 "Contents of NVRAM.\n");
4180 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4181 (uint8_t *)nv, ha->nvram_size);
4182
4183 /* Bad NVRAM data, set defaults parameters. */
4184 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
4185 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
4186 /* Reset NVRAM data. */
4187 ql_log(ql_log_warn, vha, 0x0064,
4188 "Inconsistent NVRAM "
4189 "detected: checksum=0x%x id=%c version=0x%x.\n",
4190 chksum, nv->id[0], nv->nvram_version);
4191 ql_log(ql_log_warn, vha, 0x0065,
4192 "Falling back to "
4193 "functioning (yet invalid -- WWPN) defaults.\n");
4194
4195 /*
4196 * Set default initialization control block.
4197 */
4198 memset(nv, 0, ha->nvram_size);
4199 nv->parameter_block_version = ICB_VERSION;
4200
4201 if (IS_QLA23XX(ha)) {
4202 nv->firmware_options[0] = BIT_2 | BIT_1;
4203 nv->firmware_options[1] = BIT_7 | BIT_5;
4204 nv->add_firmware_options[0] = BIT_5;
4205 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4206 nv->frame_payload_size = 2048;
4207 nv->special_options[1] = BIT_7;
4208 } else if (IS_QLA2200(ha)) {
4209 nv->firmware_options[0] = BIT_2 | BIT_1;
4210 nv->firmware_options[1] = BIT_7 | BIT_5;
4211 nv->add_firmware_options[0] = BIT_5;
4212 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4213 nv->frame_payload_size = 1024;
4214 } else if (IS_QLA2100(ha)) {
4215 nv->firmware_options[0] = BIT_3 | BIT_1;
4216 nv->firmware_options[1] = BIT_5;
4217 nv->frame_payload_size = 1024;
4218 }
4219
4220 nv->max_iocb_allocation = cpu_to_le16(256);
4221 nv->execution_throttle = cpu_to_le16(16);
4222 nv->retry_count = 8;
4223 nv->retry_delay = 1;
4224
4225 nv->port_name[0] = 33;
4226 nv->port_name[3] = 224;
4227 nv->port_name[4] = 139;
4228
4229 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4230
4231 nv->login_timeout = 4;
4232
4233 /*
4234 * Set default host adapter parameters
4235 */
4236 nv->host_p[1] = BIT_2;
4237 nv->reset_delay = 5;
4238 nv->port_down_retry_count = 8;
4239 nv->max_luns_per_target = cpu_to_le16(8);
4240 nv->link_down_timeout = 60;
4241
4242 rval = 1;
4243 }
4244
4245 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
4246 /*
4247 * The SN2 does not provide BIOS emulation which means you can't change
4248 * potentially bogus BIOS settings. Force the use of default settings
4249 * for link rate and frame size. Hope that the rest of the settings
4250 * are valid.
4251 */
4252 if (ia64_platform_is("sn2")) {
4253 nv->frame_payload_size = 2048;
4254 if (IS_QLA23XX(ha))
4255 nv->special_options[1] = BIT_7;
4256 }
4257 #endif
4258
4259 /* Reset Initialization control block */
4260 memset(icb, 0, ha->init_cb_size);
4261
4262 /*
4263 * Setup driver NVRAM options.
4264 */
4265 nv->firmware_options[0] |= (BIT_6 | BIT_1);
4266 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
4267 nv->firmware_options[1] |= (BIT_5 | BIT_0);
4268 nv->firmware_options[1] &= ~BIT_4;
4269
4270 if (IS_QLA23XX(ha)) {
4271 nv->firmware_options[0] |= BIT_2;
4272 nv->firmware_options[0] &= ~BIT_3;
4273 nv->special_options[0] &= ~BIT_6;
4274 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
4275
4276 if (IS_QLA2300(ha)) {
4277 if (ha->fb_rev == FPM_2310) {
4278 strcpy(ha->model_number, "QLA2310");
4279 } else {
4280 strcpy(ha->model_number, "QLA2300");
4281 }
4282 } else {
4283 qla2x00_set_model_info(vha, nv->model_number,
4284 sizeof(nv->model_number), "QLA23xx");
4285 }
4286 } else if (IS_QLA2200(ha)) {
4287 nv->firmware_options[0] |= BIT_2;
4288 /*
4289 * 'Point-to-point preferred, else loop' is not a safe
4290 * connection mode setting.
4291 */
4292 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
4293 (BIT_5 | BIT_4)) {
4294 /* Force 'loop preferred, else point-to-point'. */
4295 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
4296 nv->add_firmware_options[0] |= BIT_5;
4297 }
4298 strcpy(ha->model_number, "QLA22xx");
4299 } else /*if (IS_QLA2100(ha))*/ {
4300 strcpy(ha->model_number, "QLA2100");
4301 }
4302
4303 /*
4304 * Copy over NVRAM RISC parameter block to initialization control block.
4305 */
4306 dptr1 = (uint8_t *)icb;
4307 dptr2 = (uint8_t *)&nv->parameter_block_version;
4308 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
4309 while (cnt--)
4310 *dptr1++ = *dptr2++;
4311
4312 /* Copy 2nd half. */
4313 dptr1 = (uint8_t *)icb->add_firmware_options;
4314 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
4315 while (cnt--)
4316 *dptr1++ = *dptr2++;
4317
4318 /* Use alternate WWN? */
4319 if (nv->host_p[1] & BIT_7) {
4320 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4321 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4322 }
4323
4324 /* Prepare nodename */
4325 if ((icb->firmware_options[1] & BIT_6) == 0) {
4326 /*
4327 * Firmware will apply the following mask if the nodename was
4328 * not provided.
4329 */
4330 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4331 icb->node_name[0] &= 0xF0;
4332 }
4333
4334 /*
4335 * Set host adapter parameters.
4336 */
4337
4338 /*
4339 * BIT_7 in the host-parameters section allows for modification to
4340 * internal driver logging.
4341 */
4342 if (nv->host_p[0] & BIT_7)
4343 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
4344 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
4345 /* Always load RISC code on non ISP2[12]00 chips. */
4346 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
4347 ha->flags.disable_risc_code_load = 0;
4348 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
4349 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
4350 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
4351 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
4352 ha->flags.disable_serdes = 0;
4353
4354 ha->operating_mode =
4355 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
4356
4357 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
4358 sizeof(ha->fw_seriallink_options));
4359
4360 /* save HBA serial number */
4361 ha->serial0 = icb->port_name[5];
4362 ha->serial1 = icb->port_name[6];
4363 ha->serial2 = icb->port_name[7];
4364 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4365 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4366
4367 icb->execution_throttle = cpu_to_le16(0xFFFF);
4368
4369 ha->retry_count = nv->retry_count;
4370
4371 /* Set minimum login_timeout to 4 seconds. */
4372 if (nv->login_timeout != ql2xlogintimeout)
4373 nv->login_timeout = ql2xlogintimeout;
4374 if (nv->login_timeout < 4)
4375 nv->login_timeout = 4;
4376 ha->login_timeout = nv->login_timeout;
4377
4378 /* Set minimum RATOV to 100 tenths of a second. */
4379 ha->r_a_tov = 100;
4380
4381 ha->loop_reset_delay = nv->reset_delay;
4382
4383 /* Link Down Timeout = 0:
4384 *
4385 * When Port Down timer expires we will start returning
4386 * I/O's to OS with "DID_NO_CONNECT".
4387 *
4388 * Link Down Timeout != 0:
4389 *
4390 * The driver waits for the link to come up after link down
4391 * before returning I/Os to OS with "DID_NO_CONNECT".
4392 */
4393 if (nv->link_down_timeout == 0) {
4394 ha->loop_down_abort_time =
4395 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4396 } else {
4397 ha->link_down_timeout = nv->link_down_timeout;
4398 ha->loop_down_abort_time =
4399 (LOOP_DOWN_TIME - ha->link_down_timeout);
4400 }
4401
4402 /*
4403 * Need enough time to try and get the port back.
4404 */
4405 ha->port_down_retry_count = nv->port_down_retry_count;
4406 if (qlport_down_retry)
4407 ha->port_down_retry_count = qlport_down_retry;
4408 /* Set login_retry_count */
4409 ha->login_retry_count = nv->retry_count;
4410 if (ha->port_down_retry_count == nv->port_down_retry_count &&
4411 ha->port_down_retry_count > 3)
4412 ha->login_retry_count = ha->port_down_retry_count;
4413 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4414 ha->login_retry_count = ha->port_down_retry_count;
4415 if (ql2xloginretrycount)
4416 ha->login_retry_count = ql2xloginretrycount;
4417
4418 icb->lun_enables = cpu_to_le16(0);
4419 icb->command_resource_count = 0;
4420 icb->immediate_notify_resource_count = 0;
4421 icb->timeout = cpu_to_le16(0);
4422
4423 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4424 /* Enable RIO */
4425 icb->firmware_options[0] &= ~BIT_3;
4426 icb->add_firmware_options[0] &=
4427 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4428 icb->add_firmware_options[0] |= BIT_2;
4429 icb->response_accumulation_timer = 3;
4430 icb->interrupt_delay_timer = 5;
4431
4432 vha->flags.process_response_queue = 1;
4433 } else {
4434 /* Enable ZIO. */
4435 if (!vha->flags.init_done) {
4436 ha->zio_mode = icb->add_firmware_options[0] &
4437 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4438 ha->zio_timer = icb->interrupt_delay_timer ?
4439 icb->interrupt_delay_timer: 2;
4440 }
4441 icb->add_firmware_options[0] &=
4442 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4443 vha->flags.process_response_queue = 0;
4444 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4445 ha->zio_mode = QLA_ZIO_MODE_6;
4446
4447 ql_log(ql_log_info, vha, 0x0068,
4448 "ZIO mode %d enabled; timer delay (%d us).\n",
4449 ha->zio_mode, ha->zio_timer * 100);
4450
4451 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
4452 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
4453 vha->flags.process_response_queue = 1;
4454 }
4455 }
4456
4457 if (rval) {
4458 ql_log(ql_log_warn, vha, 0x0069,
4459 "NVRAM configuration failed.\n");
4460 }
4461 return (rval);
4462 }
4463
4464 static void
4465 qla2x00_rport_del(void *data)
4466 {
4467 fc_port_t *fcport = data;
4468 struct fc_rport *rport;
4469 unsigned long flags;
4470
4471 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
4472 rport = fcport->drport ? fcport->drport: fcport->rport;
4473 fcport->drport = NULL;
4474 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
4475 if (rport) {
4476 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
4477 "%s %8phN. rport %p roles %x\n",
4478 __func__, fcport->port_name, rport,
4479 rport->roles);
4480
4481 fc_remote_port_delete(rport);
4482 }
4483 }
4484
4485 /**
4486 * qla2x00_alloc_fcport() - Allocate a generic fcport.
4487 * @ha: HA context
4488 * @flags: allocation flags
4489 *
4490 * Returns a pointer to the allocated fcport, or NULL, if none available.
4491 */
4492 fc_port_t *
4493 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
4494 {
4495 fc_port_t *fcport;
4496
4497 fcport = kzalloc(sizeof(fc_port_t), flags);
4498 if (!fcport)
4499 return NULL;
4500
4501 /* Setup fcport template structure. */
4502 fcport->vha = vha;
4503 fcport->port_type = FCT_UNKNOWN;
4504 fcport->loop_id = FC_NO_LOOP_ID;
4505 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
4506 fcport->supported_classes = FC_COS_UNSPECIFIED;
4507
4508 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
4509 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
4510 flags);
4511 fcport->disc_state = DSC_DELETED;
4512 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4513 fcport->deleted = QLA_SESS_DELETED;
4514 fcport->login_retry = vha->hw->login_retry_count;
4515 fcport->login_retry = 5;
4516 fcport->logout_on_delete = 1;
4517
4518 if (!fcport->ct_desc.ct_sns) {
4519 ql_log(ql_log_warn, vha, 0xd049,
4520 "Failed to allocate ct_sns request.\n");
4521 kfree(fcport);
4522 fcport = NULL;
4523 }
4524 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
4525 INIT_LIST_HEAD(&fcport->gnl_entry);
4526 INIT_LIST_HEAD(&fcport->list);
4527
4528 return fcport;
4529 }
4530
4531 void
4532 qla2x00_free_fcport(fc_port_t *fcport)
4533 {
4534 if (fcport->ct_desc.ct_sns) {
4535 dma_free_coherent(&fcport->vha->hw->pdev->dev,
4536 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
4537 fcport->ct_desc.ct_sns_dma);
4538
4539 fcport->ct_desc.ct_sns = NULL;
4540 }
4541 kfree(fcport);
4542 }
4543
4544 /*
4545 * qla2x00_configure_loop
4546 * Updates Fibre Channel Device Database with what is actually on loop.
4547 *
4548 * Input:
4549 * ha = adapter block pointer.
4550 *
4551 * Returns:
4552 * 0 = success.
4553 * 1 = error.
4554 * 2 = database was full and device was not configured.
4555 */
4556 static int
4557 qla2x00_configure_loop(scsi_qla_host_t *vha)
4558 {
4559 int rval;
4560 unsigned long flags, save_flags;
4561 struct qla_hw_data *ha = vha->hw;
4562 rval = QLA_SUCCESS;
4563
4564 /* Get Initiator ID */
4565 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
4566 rval = qla2x00_configure_hba(vha);
4567 if (rval != QLA_SUCCESS) {
4568 ql_dbg(ql_dbg_disc, vha, 0x2013,
4569 "Unable to configure HBA.\n");
4570 return (rval);
4571 }
4572 }
4573
4574 save_flags = flags = vha->dpc_flags;
4575 ql_dbg(ql_dbg_disc, vha, 0x2014,
4576 "Configure loop -- dpc flags = 0x%lx.\n", flags);
4577
4578 /*
4579 * If we have both an RSCN and PORT UPDATE pending then handle them
4580 * both at the same time.
4581 */
4582 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4583 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
4584
4585 qla2x00_get_data_rate(vha);
4586
4587 /* Determine what we need to do */
4588 if (ha->current_topology == ISP_CFG_FL &&
4589 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4590
4591 set_bit(RSCN_UPDATE, &flags);
4592
4593 } else if (ha->current_topology == ISP_CFG_F &&
4594 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4595
4596 set_bit(RSCN_UPDATE, &flags);
4597 clear_bit(LOCAL_LOOP_UPDATE, &flags);
4598
4599 } else if (ha->current_topology == ISP_CFG_N) {
4600 clear_bit(RSCN_UPDATE, &flags);
4601 if (ha->flags.rida_fmt2) {
4602 /* With Rida Format 2, the login is already triggered.
4603 * We know who is on the other side of the wire.
4604 * No need to login to do login to find out or drop into
4605 * qla2x00_configure_local_loop().
4606 */
4607 clear_bit(LOCAL_LOOP_UPDATE, &flags);
4608 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4609 } else {
4610 if (qla_tgt_mode_enabled(vha)) {
4611 /* allow the other side to start the login */
4612 clear_bit(LOCAL_LOOP_UPDATE, &flags);
4613 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4614 }
4615 }
4616 } else if (ha->current_topology == ISP_CFG_NL) {
4617 clear_bit(RSCN_UPDATE, &flags);
4618 set_bit(LOCAL_LOOP_UPDATE, &flags);
4619 } else if (!vha->flags.online ||
4620 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
4621 set_bit(RSCN_UPDATE, &flags);
4622 set_bit(LOCAL_LOOP_UPDATE, &flags);
4623 }
4624
4625 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
4626 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4627 ql_dbg(ql_dbg_disc, vha, 0x2015,
4628 "Loop resync needed, failing.\n");
4629 rval = QLA_FUNCTION_FAILED;
4630 } else
4631 rval = qla2x00_configure_local_loop(vha);
4632 }
4633
4634 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
4635 if (LOOP_TRANSITION(vha)) {
4636 ql_dbg(ql_dbg_disc, vha, 0x2099,
4637 "Needs RSCN update and loop transition.\n");
4638 rval = QLA_FUNCTION_FAILED;
4639 }
4640 else
4641 rval = qla2x00_configure_fabric(vha);
4642 }
4643
4644 if (rval == QLA_SUCCESS) {
4645 if (atomic_read(&vha->loop_down_timer) ||
4646 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4647 rval = QLA_FUNCTION_FAILED;
4648 } else {
4649 atomic_set(&vha->loop_state, LOOP_READY);
4650 ql_dbg(ql_dbg_disc, vha, 0x2069,
4651 "LOOP READY.\n");
4652 ha->flags.fw_init_done = 1;
4653
4654 /*
4655 * Process any ATIO queue entries that came in
4656 * while we weren't online.
4657 */
4658 if (qla_tgt_mode_enabled(vha) ||
4659 qla_dual_mode_enabled(vha)) {
4660 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) {
4661 spin_lock_irqsave(&ha->tgt.atio_lock,
4662 flags);
4663 qlt_24xx_process_atio_queue(vha, 0);
4664 spin_unlock_irqrestore(
4665 &ha->tgt.atio_lock, flags);
4666 } else {
4667 spin_lock_irqsave(&ha->hardware_lock,
4668 flags);
4669 qlt_24xx_process_atio_queue(vha, 1);
4670 spin_unlock_irqrestore(
4671 &ha->hardware_lock, flags);
4672 }
4673 }
4674 }
4675 }
4676
4677 if (rval) {
4678 ql_dbg(ql_dbg_disc, vha, 0x206a,
4679 "%s *** FAILED ***.\n", __func__);
4680 } else {
4681 ql_dbg(ql_dbg_disc, vha, 0x206b,
4682 "%s: exiting normally.\n", __func__);
4683 }
4684
4685 /* Restore state if a resync event occurred during processing */
4686 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4687 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
4688 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4689 if (test_bit(RSCN_UPDATE, &save_flags)) {
4690 set_bit(RSCN_UPDATE, &vha->dpc_flags);
4691 }
4692 }
4693
4694 return (rval);
4695 }
4696
4697 /*
4698 * N2N Login
4699 * Updates Fibre Channel Device Database with local loop devices.
4700 *
4701 * Input:
4702 * ha = adapter block pointer.
4703 *
4704 * Returns:
4705 */
4706 static int qla24xx_n2n_handle_login(struct scsi_qla_host *vha,
4707 fc_port_t *fcport)
4708 {
4709 struct qla_hw_data *ha = vha->hw;
4710 int res = QLA_SUCCESS, rval;
4711 int greater_wwpn = 0;
4712 int logged_in = 0;
4713
4714 if (ha->current_topology != ISP_CFG_N)
4715 return res;
4716
4717 if (wwn_to_u64(vha->port_name) >
4718 wwn_to_u64(vha->n2n_port_name)) {
4719 ql_dbg(ql_dbg_disc, vha, 0x2002,
4720 "HBA WWPN is greater %llx > target %llx\n",
4721 wwn_to_u64(vha->port_name),
4722 wwn_to_u64(vha->n2n_port_name));
4723 greater_wwpn = 1;
4724 fcport->d_id.b24 = vha->n2n_id;
4725 }
4726
4727 fcport->loop_id = vha->loop_id;
4728 fcport->fc4f_nvme = 0;
4729 fcport->query = 1;
4730
4731 ql_dbg(ql_dbg_disc, vha, 0x4001,
4732 "Initiate N2N login handler: HBA port_id=%06x loopid=%d\n",
4733 fcport->d_id.b24, vha->loop_id);
4734
4735 /* Fill in member data. */
4736 if (!greater_wwpn) {
4737 rval = qla2x00_get_port_database(vha, fcport, 0);
4738 ql_dbg(ql_dbg_disc, vha, 0x1051,
4739 "Remote login-state (%x/%x) port_id=%06x loop_id=%x, rval=%d\n",
4740 fcport->current_login_state, fcport->last_login_state,
4741 fcport->d_id.b24, fcport->loop_id, rval);
4742
4743 if (((fcport->current_login_state & 0xf) == 0x4) ||
4744 ((fcport->current_login_state & 0xf) == 0x6))
4745 logged_in = 1;
4746 }
4747
4748 if (logged_in || greater_wwpn) {
4749 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
4750 qla_nvme_register_hba(vha);
4751
4752 /* Set connected N_Port d_id */
4753 if (vha->flags.nvme_enabled)
4754 fcport->fc4f_nvme = 1;
4755
4756 fcport->scan_state = QLA_FCPORT_FOUND;
4757 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4758 fcport->disc_state = DSC_GNL;
4759 fcport->n2n_flag = 1;
4760 fcport->flags = 3;
4761 vha->hw->flags.gpsc_supported = 0;
4762
4763 if (greater_wwpn) {
4764 ql_dbg(ql_dbg_disc, vha, 0x20e5,
4765 "%s %d PLOGI ELS %8phC\n",
4766 __func__, __LINE__, fcport->port_name);
4767
4768 res = qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
4769 fcport, fcport->d_id);
4770 }
4771
4772 if (res != QLA_SUCCESS) {
4773 ql_log(ql_log_info, vha, 0xd04d,
4774 "PLOGI Failed: portid=%06x - retrying\n",
4775 fcport->d_id.b24);
4776 res = QLA_SUCCESS;
4777 } else {
4778 /* State 0x6 means FCP PRLI complete */
4779 if ((fcport->current_login_state & 0xf) == 0x6) {
4780 ql_dbg(ql_dbg_disc, vha, 0x2118,
4781 "%s %d %8phC post GPDB work\n",
4782 __func__, __LINE__, fcport->port_name);
4783 fcport->chip_reset =
4784 vha->hw->base_qpair->chip_reset;
4785 qla24xx_post_gpdb_work(vha, fcport, 0);
4786 } else {
4787 ql_dbg(ql_dbg_disc, vha, 0x2118,
4788 "%s %d %8phC post NVMe PRLI\n",
4789 __func__, __LINE__, fcport->port_name);
4790 qla24xx_post_prli_work(vha, fcport);
4791 }
4792 }
4793 } else {
4794 /* Wait for next database change */
4795 set_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags);
4796 }
4797
4798 return res;
4799 }
4800
4801 /*
4802 * qla2x00_configure_local_loop
4803 * Updates Fibre Channel Device Database with local loop devices.
4804 *
4805 * Input:
4806 * ha = adapter block pointer.
4807 *
4808 * Returns:
4809 * 0 = success.
4810 */
4811 static int
4812 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
4813 {
4814 int rval, rval2;
4815 int found_devs;
4816 int found;
4817 fc_port_t *fcport, *new_fcport;
4818
4819 uint16_t index;
4820 uint16_t entries;
4821 char *id_iter;
4822 uint16_t loop_id;
4823 uint8_t domain, area, al_pa;
4824 struct qla_hw_data *ha = vha->hw;
4825 unsigned long flags;
4826
4827 found_devs = 0;
4828 new_fcport = NULL;
4829 entries = MAX_FIBRE_DEVICES_LOOP;
4830
4831 /* Get list of logged in devices. */
4832 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
4833 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
4834 &entries);
4835 if (rval != QLA_SUCCESS)
4836 goto cleanup_allocation;
4837
4838 ql_dbg(ql_dbg_disc, vha, 0x2011,
4839 "Entries in ID list (%d).\n", entries);
4840 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
4841 (uint8_t *)ha->gid_list,
4842 entries * sizeof(struct gid_list_info));
4843
4844 list_for_each_entry(fcport, &vha->vp_fcports, list) {
4845 fcport->scan_state = QLA_FCPORT_SCAN;
4846 }
4847
4848 /* Allocate temporary fcport for any new fcports discovered. */
4849 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4850 if (new_fcport == NULL) {
4851 ql_log(ql_log_warn, vha, 0x2012,
4852 "Memory allocation failed for fcport.\n");
4853 rval = QLA_MEMORY_ALLOC_FAILED;
4854 goto cleanup_allocation;
4855 }
4856 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
4857
4858 /* Inititae N2N login. */
4859 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) {
4860 rval = qla24xx_n2n_handle_login(vha, new_fcport);
4861 if (rval != QLA_SUCCESS)
4862 goto cleanup_allocation;
4863 return QLA_SUCCESS;
4864 }
4865
4866 /* Add devices to port list. */
4867 id_iter = (char *)ha->gid_list;
4868 for (index = 0; index < entries; index++) {
4869 domain = ((struct gid_list_info *)id_iter)->domain;
4870 area = ((struct gid_list_info *)id_iter)->area;
4871 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
4872 if (IS_QLA2100(ha) || IS_QLA2200(ha))
4873 loop_id = (uint16_t)
4874 ((struct gid_list_info *)id_iter)->loop_id_2100;
4875 else
4876 loop_id = le16_to_cpu(
4877 ((struct gid_list_info *)id_iter)->loop_id);
4878 id_iter += ha->gid_list_info_size;
4879
4880 /* Bypass reserved domain fields. */
4881 if ((domain & 0xf0) == 0xf0)
4882 continue;
4883
4884 /* Bypass if not same domain and area of adapter. */
4885 if (area && domain &&
4886 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
4887 continue;
4888
4889 /* Bypass invalid local loop ID. */
4890 if (loop_id > LAST_LOCAL_LOOP_ID)
4891 continue;
4892
4893 memset(new_fcport->port_name, 0, WWN_SIZE);
4894
4895 /* Fill in member data. */
4896 new_fcport->d_id.b.domain = domain;
4897 new_fcport->d_id.b.area = area;
4898 new_fcport->d_id.b.al_pa = al_pa;
4899 new_fcport->loop_id = loop_id;
4900 new_fcport->scan_state = QLA_FCPORT_FOUND;
4901
4902 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
4903 if (rval2 != QLA_SUCCESS) {
4904 ql_dbg(ql_dbg_disc, vha, 0x2097,
4905 "Failed to retrieve fcport information "
4906 "-- get_port_database=%x, loop_id=0x%04x.\n",
4907 rval2, new_fcport->loop_id);
4908 /* Skip retry if N2N */
4909 if (ha->current_topology != ISP_CFG_N) {
4910 ql_dbg(ql_dbg_disc, vha, 0x2105,
4911 "Scheduling resync.\n");
4912 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4913 continue;
4914 }
4915 }
4916
4917 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4918 /* Check for matching device in port list. */
4919 found = 0;
4920 fcport = NULL;
4921 list_for_each_entry(fcport, &vha->vp_fcports, list) {
4922 if (memcmp(new_fcport->port_name, fcport->port_name,
4923 WWN_SIZE))
4924 continue;
4925
4926 fcport->flags &= ~FCF_FABRIC_DEVICE;
4927 fcport->loop_id = new_fcport->loop_id;
4928 fcport->port_type = new_fcport->port_type;
4929 fcport->d_id.b24 = new_fcport->d_id.b24;
4930 memcpy(fcport->node_name, new_fcport->node_name,
4931 WWN_SIZE);
4932 fcport->scan_state = QLA_FCPORT_FOUND;
4933 found++;
4934 break;
4935 }
4936
4937 if (!found) {
4938 /* New device, add to fcports list. */
4939 list_add_tail(&new_fcport->list, &vha->vp_fcports);
4940
4941 /* Allocate a new replacement fcport. */
4942 fcport = new_fcport;
4943
4944 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4945
4946 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4947
4948 if (new_fcport == NULL) {
4949 ql_log(ql_log_warn, vha, 0xd031,
4950 "Failed to allocate memory for fcport.\n");
4951 rval = QLA_MEMORY_ALLOC_FAILED;
4952 goto cleanup_allocation;
4953 }
4954 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4955 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
4956 }
4957
4958 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4959
4960 /* Base iIDMA settings on HBA port speed. */
4961 fcport->fp_speed = ha->link_data_rate;
4962
4963 found_devs++;
4964 }
4965
4966 list_for_each_entry(fcport, &vha->vp_fcports, list) {
4967 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4968 break;
4969
4970 if (fcport->scan_state == QLA_FCPORT_SCAN) {
4971 if ((qla_dual_mode_enabled(vha) ||
4972 qla_ini_mode_enabled(vha)) &&
4973 atomic_read(&fcport->state) == FCS_ONLINE) {
4974 qla2x00_mark_device_lost(vha, fcport,
4975 ql2xplogiabsentdevice, 0);
4976 if (fcport->loop_id != FC_NO_LOOP_ID &&
4977 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
4978 fcport->port_type != FCT_INITIATOR &&
4979 fcport->port_type != FCT_BROADCAST) {
4980 ql_dbg(ql_dbg_disc, vha, 0x20f0,
4981 "%s %d %8phC post del sess\n",
4982 __func__, __LINE__,
4983 fcport->port_name);
4984
4985 qlt_schedule_sess_for_deletion(fcport);
4986 continue;
4987 }
4988 }
4989 }
4990
4991 if (fcport->scan_state == QLA_FCPORT_FOUND)
4992 qla24xx_fcport_handle_login(vha, fcport);
4993 }
4994
4995 cleanup_allocation:
4996 kfree(new_fcport);
4997
4998 if (rval != QLA_SUCCESS) {
4999 ql_dbg(ql_dbg_disc, vha, 0x2098,
5000 "Configure local loop error exit: rval=%x.\n", rval);
5001 }
5002
5003 return (rval);
5004 }
5005
5006 static void
5007 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5008 {
5009 int rval;
5010 uint16_t mb[MAILBOX_REGISTER_COUNT];
5011 struct qla_hw_data *ha = vha->hw;
5012
5013 if (!IS_IIDMA_CAPABLE(ha))
5014 return;
5015
5016 if (atomic_read(&fcport->state) != FCS_ONLINE)
5017 return;
5018
5019 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
5020 fcport->fp_speed > ha->link_data_rate)
5021 return;
5022
5023 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
5024 mb);
5025 if (rval != QLA_SUCCESS) {
5026 ql_dbg(ql_dbg_disc, vha, 0x2004,
5027 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
5028 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
5029 } else {
5030 ql_dbg(ql_dbg_disc, vha, 0x2005,
5031 "iIDMA adjusted to %s GB/s on %8phN.\n",
5032 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
5033 fcport->port_name);
5034 }
5035 }
5036
5037 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
5038 static void
5039 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
5040 {
5041 struct fc_rport_identifiers rport_ids;
5042 struct fc_rport *rport;
5043 unsigned long flags;
5044
5045 rport_ids.node_name = wwn_to_u64(fcport->node_name);
5046 rport_ids.port_name = wwn_to_u64(fcport->port_name);
5047 rport_ids.port_id = fcport->d_id.b.domain << 16 |
5048 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
5049 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5050 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
5051 if (!rport) {
5052 ql_log(ql_log_warn, vha, 0x2006,
5053 "Unable to allocate fc remote port.\n");
5054 return;
5055 }
5056
5057 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5058 *((fc_port_t **)rport->dd_data) = fcport;
5059 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5060
5061 rport->supported_classes = fcport->supported_classes;
5062
5063 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5064 if (fcport->port_type == FCT_INITIATOR)
5065 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
5066 if (fcport->port_type == FCT_TARGET)
5067 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
5068
5069 ql_dbg(ql_dbg_disc, vha, 0x20ee,
5070 "%s %8phN. rport %p is %s mode\n",
5071 __func__, fcport->port_name, rport,
5072 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini");
5073
5074 fc_remote_port_rolechg(rport, rport_ids.roles);
5075 }
5076
5077 /*
5078 * qla2x00_update_fcport
5079 * Updates device on list.
5080 *
5081 * Input:
5082 * ha = adapter block pointer.
5083 * fcport = port structure pointer.
5084 *
5085 * Return:
5086 * 0 - Success
5087 * BIT_0 - error
5088 *
5089 * Context:
5090 * Kernel context.
5091 */
5092 void
5093 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5094 {
5095 fcport->vha = vha;
5096
5097 if (IS_SW_RESV_ADDR(fcport->d_id))
5098 return;
5099
5100 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5101 __func__, fcport->port_name);
5102
5103 if (IS_QLAFX00(vha->hw)) {
5104 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5105 goto reg_port;
5106 }
5107 fcport->login_retry = 0;
5108 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
5109 fcport->disc_state = DSC_LOGIN_COMPLETE;
5110 fcport->deleted = 0;
5111 fcport->logout_on_delete = 1;
5112
5113 if (fcport->fc4f_nvme) {
5114 qla_nvme_register_remote(vha, fcport);
5115 return;
5116 }
5117
5118 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5119 qla2x00_iidma_fcport(vha, fcport);
5120 qla24xx_update_fcport_fcp_prio(vha, fcport);
5121
5122 reg_port:
5123 switch (vha->host->active_mode) {
5124 case MODE_INITIATOR:
5125 qla2x00_reg_remote_port(vha, fcport);
5126 break;
5127 case MODE_TARGET:
5128 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5129 !vha->vha_tgt.qla_tgt->tgt_stopped)
5130 qlt_fc_port_added(vha, fcport);
5131 break;
5132 case MODE_DUAL:
5133 qla2x00_reg_remote_port(vha, fcport);
5134 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5135 !vha->vha_tgt.qla_tgt->tgt_stopped)
5136 qlt_fc_port_added(vha, fcport);
5137 break;
5138 default:
5139 break;
5140 }
5141 }
5142
5143 /*
5144 * qla2x00_configure_fabric
5145 * Setup SNS devices with loop ID's.
5146 *
5147 * Input:
5148 * ha = adapter block pointer.
5149 *
5150 * Returns:
5151 * 0 = success.
5152 * BIT_0 = error
5153 */
5154 static int
5155 qla2x00_configure_fabric(scsi_qla_host_t *vha)
5156 {
5157 int rval;
5158 fc_port_t *fcport;
5159 uint16_t mb[MAILBOX_REGISTER_COUNT];
5160 uint16_t loop_id;
5161 LIST_HEAD(new_fcports);
5162 struct qla_hw_data *ha = vha->hw;
5163 int discovery_gen;
5164
5165 /* If FL port exists, then SNS is present */
5166 if (IS_FWI2_CAPABLE(ha))
5167 loop_id = NPH_F_PORT;
5168 else
5169 loop_id = SNS_FL_PORT;
5170 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
5171 if (rval != QLA_SUCCESS) {
5172 ql_dbg(ql_dbg_disc, vha, 0x20a0,
5173 "MBX_GET_PORT_NAME failed, No FL Port.\n");
5174
5175 vha->device_flags &= ~SWITCH_FOUND;
5176 return (QLA_SUCCESS);
5177 }
5178 vha->device_flags |= SWITCH_FOUND;
5179
5180
5181 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
5182 rval = qla2x00_send_change_request(vha, 0x3, 0);
5183 if (rval != QLA_SUCCESS)
5184 ql_log(ql_log_warn, vha, 0x121,
5185 "Failed to enable receiving of RSCN requests: 0x%x.\n",
5186 rval);
5187 }
5188
5189
5190 do {
5191 qla2x00_mgmt_svr_login(vha);
5192
5193 /* FDMI support. */
5194 if (ql2xfdmienable &&
5195 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
5196 qla2x00_fdmi_register(vha);
5197
5198 /* Ensure we are logged into the SNS. */
5199 loop_id = NPH_SNS_LID(ha);
5200 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
5201 0xfc, mb, BIT_1|BIT_0);
5202 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5203 ql_dbg(ql_dbg_disc, vha, 0x20a1,
5204 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
5205 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
5206 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5207 return rval;
5208 }
5209 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
5210 if (qla2x00_rft_id(vha)) {
5211 /* EMPTY */
5212 ql_dbg(ql_dbg_disc, vha, 0x20a2,
5213 "Register FC-4 TYPE failed.\n");
5214 if (test_bit(LOOP_RESYNC_NEEDED,
5215 &vha->dpc_flags))
5216 break;
5217 }
5218 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
5219 /* EMPTY */
5220 ql_dbg(ql_dbg_disc, vha, 0x209a,
5221 "Register FC-4 Features failed.\n");
5222 if (test_bit(LOOP_RESYNC_NEEDED,
5223 &vha->dpc_flags))
5224 break;
5225 }
5226 if (vha->flags.nvme_enabled) {
5227 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
5228 ql_dbg(ql_dbg_disc, vha, 0x2049,
5229 "Register NVME FC Type Features failed.\n");
5230 }
5231 }
5232 if (qla2x00_rnn_id(vha)) {
5233 /* EMPTY */
5234 ql_dbg(ql_dbg_disc, vha, 0x2104,
5235 "Register Node Name failed.\n");
5236 if (test_bit(LOOP_RESYNC_NEEDED,
5237 &vha->dpc_flags))
5238 break;
5239 } else if (qla2x00_rsnn_nn(vha)) {
5240 /* EMPTY */
5241 ql_dbg(ql_dbg_disc, vha, 0x209b,
5242 "Register Symbolic Node Name failed.\n");
5243 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5244 break;
5245 }
5246 }
5247
5248
5249 /* Mark the time right before querying FW for connected ports.
5250 * This process is long, asynchronous and by the time it's done,
5251 * collected information might not be accurate anymore. E.g.
5252 * disconnected port might have re-connected and a brand new
5253 * session has been created. In this case session's generation
5254 * will be newer than discovery_gen. */
5255 qlt_do_generation_tick(vha, &discovery_gen);
5256
5257 if (USE_ASYNC_SCAN(ha)) {
5258 rval = QLA_SUCCESS;
5259 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI);
5260 if (rval)
5261 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5262 } else {
5263 list_for_each_entry(fcport, &vha->vp_fcports, list)
5264 fcport->scan_state = QLA_FCPORT_SCAN;
5265
5266 rval = qla2x00_find_all_fabric_devs(vha);
5267 }
5268 if (rval != QLA_SUCCESS)
5269 break;
5270 } while (0);
5271
5272 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
5273 qla_nvme_register_hba(vha);
5274
5275 if (rval)
5276 ql_dbg(ql_dbg_disc, vha, 0x2068,
5277 "Configure fabric error exit rval=%d.\n", rval);
5278
5279 return (rval);
5280 }
5281
5282 /*
5283 * qla2x00_find_all_fabric_devs
5284 *
5285 * Input:
5286 * ha = adapter block pointer.
5287 * dev = database device entry pointer.
5288 *
5289 * Returns:
5290 * 0 = success.
5291 *
5292 * Context:
5293 * Kernel context.
5294 */
5295 static int
5296 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
5297 {
5298 int rval;
5299 uint16_t loop_id;
5300 fc_port_t *fcport, *new_fcport;
5301 int found;
5302
5303 sw_info_t *swl;
5304 int swl_idx;
5305 int first_dev, last_dev;
5306 port_id_t wrap = {}, nxt_d_id;
5307 struct qla_hw_data *ha = vha->hw;
5308 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5309 unsigned long flags;
5310
5311 rval = QLA_SUCCESS;
5312
5313 /* Try GID_PT to get device list, else GAN. */
5314 if (!ha->swl)
5315 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
5316 GFP_KERNEL);
5317 swl = ha->swl;
5318 if (!swl) {
5319 /*EMPTY*/
5320 ql_dbg(ql_dbg_disc, vha, 0x209c,
5321 "GID_PT allocations failed, fallback on GA_NXT.\n");
5322 } else {
5323 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
5324 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
5325 swl = NULL;
5326 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5327 return rval;
5328 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
5329 swl = NULL;
5330 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5331 return rval;
5332 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
5333 swl = NULL;
5334 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5335 return rval;
5336 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
5337 swl = NULL;
5338 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5339 return rval;
5340 }
5341
5342 /* If other queries succeeded probe for FC-4 type */
5343 if (swl) {
5344 qla2x00_gff_id(vha, swl);
5345 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5346 return rval;
5347 }
5348 }
5349 swl_idx = 0;
5350
5351 /* Allocate temporary fcport for any new fcports discovered. */
5352 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5353 if (new_fcport == NULL) {
5354 ql_log(ql_log_warn, vha, 0x209d,
5355 "Failed to allocate memory for fcport.\n");
5356 return (QLA_MEMORY_ALLOC_FAILED);
5357 }
5358 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5359 /* Set start port ID scan at adapter ID. */
5360 first_dev = 1;
5361 last_dev = 0;
5362
5363 /* Starting free loop ID. */
5364 loop_id = ha->min_external_loopid;
5365 for (; loop_id <= ha->max_loop_id; loop_id++) {
5366 if (qla2x00_is_reserved_id(vha, loop_id))
5367 continue;
5368
5369 if (ha->current_topology == ISP_CFG_FL &&
5370 (atomic_read(&vha->loop_down_timer) ||
5371 LOOP_TRANSITION(vha))) {
5372 atomic_set(&vha->loop_down_timer, 0);
5373 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5374 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5375 break;
5376 }
5377
5378 if (swl != NULL) {
5379 if (last_dev) {
5380 wrap.b24 = new_fcport->d_id.b24;
5381 } else {
5382 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
5383 memcpy(new_fcport->node_name,
5384 swl[swl_idx].node_name, WWN_SIZE);
5385 memcpy(new_fcport->port_name,
5386 swl[swl_idx].port_name, WWN_SIZE);
5387 memcpy(new_fcport->fabric_port_name,
5388 swl[swl_idx].fabric_port_name, WWN_SIZE);
5389 new_fcport->fp_speed = swl[swl_idx].fp_speed;
5390 new_fcport->fc4_type = swl[swl_idx].fc4_type;
5391
5392 new_fcport->nvme_flag = 0;
5393 new_fcport->fc4f_nvme = 0;
5394 if (vha->flags.nvme_enabled &&
5395 swl[swl_idx].fc4f_nvme) {
5396 new_fcport->fc4f_nvme =
5397 swl[swl_idx].fc4f_nvme;
5398 ql_log(ql_log_info, vha, 0x2131,
5399 "FOUND: NVME port %8phC as FC Type 28h\n",
5400 new_fcport->port_name);
5401 }
5402
5403 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
5404 last_dev = 1;
5405 }
5406 swl_idx++;
5407 }
5408 } else {
5409 /* Send GA_NXT to the switch */
5410 rval = qla2x00_ga_nxt(vha, new_fcport);
5411 if (rval != QLA_SUCCESS) {
5412 ql_log(ql_log_warn, vha, 0x209e,
5413 "SNS scan failed -- assuming "
5414 "zero-entry result.\n");
5415 rval = QLA_SUCCESS;
5416 break;
5417 }
5418 }
5419
5420 /* If wrap on switch device list, exit. */
5421 if (first_dev) {
5422 wrap.b24 = new_fcport->d_id.b24;
5423 first_dev = 0;
5424 } else if (new_fcport->d_id.b24 == wrap.b24) {
5425 ql_dbg(ql_dbg_disc, vha, 0x209f,
5426 "Device wrap (%02x%02x%02x).\n",
5427 new_fcport->d_id.b.domain,
5428 new_fcport->d_id.b.area,
5429 new_fcport->d_id.b.al_pa);
5430 break;
5431 }
5432
5433 /* Bypass if same physical adapter. */
5434 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
5435 continue;
5436
5437 /* Bypass virtual ports of the same host. */
5438 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
5439 continue;
5440
5441 /* Bypass if same domain and area of adapter. */
5442 if (((new_fcport->d_id.b24 & 0xffff00) ==
5443 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
5444 ISP_CFG_FL)
5445 continue;
5446
5447 /* Bypass reserved domain fields. */
5448 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
5449 continue;
5450
5451 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
5452 if (ql2xgffidenable &&
5453 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
5454 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
5455 continue;
5456
5457 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5458
5459 /* Locate matching device in database. */
5460 found = 0;
5461 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5462 if (memcmp(new_fcport->port_name, fcport->port_name,
5463 WWN_SIZE))
5464 continue;
5465
5466 fcport->scan_state = QLA_FCPORT_FOUND;
5467
5468 found++;
5469
5470 /* Update port state. */
5471 memcpy(fcport->fabric_port_name,
5472 new_fcport->fabric_port_name, WWN_SIZE);
5473 fcport->fp_speed = new_fcport->fp_speed;
5474
5475 /*
5476 * If address the same and state FCS_ONLINE
5477 * (or in target mode), nothing changed.
5478 */
5479 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
5480 (atomic_read(&fcport->state) == FCS_ONLINE ||
5481 (vha->host->active_mode == MODE_TARGET))) {
5482 break;
5483 }
5484
5485 /*
5486 * If device was not a fabric device before.
5487 */
5488 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
5489 fcport->d_id.b24 = new_fcport->d_id.b24;
5490 qla2x00_clear_loop_id(fcport);
5491 fcport->flags |= (FCF_FABRIC_DEVICE |
5492 FCF_LOGIN_NEEDED);
5493 break;
5494 }
5495
5496 /*
5497 * Port ID changed or device was marked to be updated;
5498 * Log it out if still logged in and mark it for
5499 * relogin later.
5500 */
5501 if (qla_tgt_mode_enabled(base_vha)) {
5502 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
5503 "port changed FC ID, %8phC"
5504 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
5505 fcport->port_name,
5506 fcport->d_id.b.domain,
5507 fcport->d_id.b.area,
5508 fcport->d_id.b.al_pa,
5509 fcport->loop_id,
5510 new_fcport->d_id.b.domain,
5511 new_fcport->d_id.b.area,
5512 new_fcport->d_id.b.al_pa);
5513 fcport->d_id.b24 = new_fcport->d_id.b24;
5514 break;
5515 }
5516
5517 fcport->d_id.b24 = new_fcport->d_id.b24;
5518 fcport->flags |= FCF_LOGIN_NEEDED;
5519 break;
5520 }
5521
5522 if (found) {
5523 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5524 continue;
5525 }
5526 /* If device was not in our fcports list, then add it. */
5527 new_fcport->scan_state = QLA_FCPORT_FOUND;
5528 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5529
5530 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5531
5532
5533 /* Allocate a new replacement fcport. */
5534 nxt_d_id.b24 = new_fcport->d_id.b24;
5535 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5536 if (new_fcport == NULL) {
5537 ql_log(ql_log_warn, vha, 0xd032,
5538 "Memory allocation failed for fcport.\n");
5539 return (QLA_MEMORY_ALLOC_FAILED);
5540 }
5541 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5542 new_fcport->d_id.b24 = nxt_d_id.b24;
5543 }
5544
5545 qla2x00_free_fcport(new_fcport);
5546
5547 /*
5548 * Logout all previous fabric dev marked lost, except FCP2 devices.
5549 */
5550 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5551 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5552 break;
5553
5554 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
5555 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
5556 continue;
5557
5558 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5559 if ((qla_dual_mode_enabled(vha) ||
5560 qla_ini_mode_enabled(vha)) &&
5561 atomic_read(&fcport->state) == FCS_ONLINE) {
5562 qla2x00_mark_device_lost(vha, fcport,
5563 ql2xplogiabsentdevice, 0);
5564 if (fcport->loop_id != FC_NO_LOOP_ID &&
5565 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5566 fcport->port_type != FCT_INITIATOR &&
5567 fcport->port_type != FCT_BROADCAST) {
5568 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5569 "%s %d %8phC post del sess\n",
5570 __func__, __LINE__,
5571 fcport->port_name);
5572 qlt_schedule_sess_for_deletion(fcport);
5573 continue;
5574 }
5575 }
5576 }
5577
5578 if (fcport->scan_state == QLA_FCPORT_FOUND)
5579 qla24xx_fcport_handle_login(vha, fcport);
5580 }
5581 return (rval);
5582 }
5583
5584 /*
5585 * qla2x00_find_new_loop_id
5586 * Scan through our port list and find a new usable loop ID.
5587 *
5588 * Input:
5589 * ha: adapter state pointer.
5590 * dev: port structure pointer.
5591 *
5592 * Returns:
5593 * qla2x00 local function return status code.
5594 *
5595 * Context:
5596 * Kernel context.
5597 */
5598 int
5599 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
5600 {
5601 int rval;
5602 struct qla_hw_data *ha = vha->hw;
5603 unsigned long flags = 0;
5604
5605 rval = QLA_SUCCESS;
5606
5607 spin_lock_irqsave(&ha->vport_slock, flags);
5608
5609 dev->loop_id = find_first_zero_bit(ha->loop_id_map,
5610 LOOPID_MAP_SIZE);
5611 if (dev->loop_id >= LOOPID_MAP_SIZE ||
5612 qla2x00_is_reserved_id(vha, dev->loop_id)) {
5613 dev->loop_id = FC_NO_LOOP_ID;
5614 rval = QLA_FUNCTION_FAILED;
5615 } else
5616 set_bit(dev->loop_id, ha->loop_id_map);
5617
5618 spin_unlock_irqrestore(&ha->vport_slock, flags);
5619
5620 if (rval == QLA_SUCCESS)
5621 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
5622 "Assigning new loopid=%x, portid=%x.\n",
5623 dev->loop_id, dev->d_id.b24);
5624 else
5625 ql_log(ql_log_warn, dev->vha, 0x2087,
5626 "No loop_id's available, portid=%x.\n",
5627 dev->d_id.b24);
5628
5629 return (rval);
5630 }
5631
5632
5633 /*
5634 * qla2x00_fabric_login
5635 * Issue fabric login command.
5636 *
5637 * Input:
5638 * ha = adapter block pointer.
5639 * device = pointer to FC device type structure.
5640 *
5641 * Returns:
5642 * 0 - Login successfully
5643 * 1 - Login failed
5644 * 2 - Initiator device
5645 * 3 - Fatal error
5646 */
5647 int
5648 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
5649 uint16_t *next_loopid)
5650 {
5651 int rval;
5652 int retry;
5653 uint16_t tmp_loopid;
5654 uint16_t mb[MAILBOX_REGISTER_COUNT];
5655 struct qla_hw_data *ha = vha->hw;
5656
5657 retry = 0;
5658 tmp_loopid = 0;
5659
5660 for (;;) {
5661 ql_dbg(ql_dbg_disc, vha, 0x2000,
5662 "Trying Fabric Login w/loop id 0x%04x for port "
5663 "%02x%02x%02x.\n",
5664 fcport->loop_id, fcport->d_id.b.domain,
5665 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5666
5667 /* Login fcport on switch. */
5668 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
5669 fcport->d_id.b.domain, fcport->d_id.b.area,
5670 fcport->d_id.b.al_pa, mb, BIT_0);
5671 if (rval != QLA_SUCCESS) {
5672 return rval;
5673 }
5674 if (mb[0] == MBS_PORT_ID_USED) {
5675 /*
5676 * Device has another loop ID. The firmware team
5677 * recommends the driver perform an implicit login with
5678 * the specified ID again. The ID we just used is save
5679 * here so we return with an ID that can be tried by
5680 * the next login.
5681 */
5682 retry++;
5683 tmp_loopid = fcport->loop_id;
5684 fcport->loop_id = mb[1];
5685
5686 ql_dbg(ql_dbg_disc, vha, 0x2001,
5687 "Fabric Login: port in use - next loop "
5688 "id=0x%04x, port id= %02x%02x%02x.\n",
5689 fcport->loop_id, fcport->d_id.b.domain,
5690 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5691
5692 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
5693 /*
5694 * Login succeeded.
5695 */
5696 if (retry) {
5697 /* A retry occurred before. */
5698 *next_loopid = tmp_loopid;
5699 } else {
5700 /*
5701 * No retry occurred before. Just increment the
5702 * ID value for next login.
5703 */
5704 *next_loopid = (fcport->loop_id + 1);
5705 }
5706
5707 if (mb[1] & BIT_0) {
5708 fcport->port_type = FCT_INITIATOR;
5709 } else {
5710 fcport->port_type = FCT_TARGET;
5711 if (mb[1] & BIT_1) {
5712 fcport->flags |= FCF_FCP2_DEVICE;
5713 }
5714 }
5715
5716 if (mb[10] & BIT_0)
5717 fcport->supported_classes |= FC_COS_CLASS2;
5718 if (mb[10] & BIT_1)
5719 fcport->supported_classes |= FC_COS_CLASS3;
5720
5721 if (IS_FWI2_CAPABLE(ha)) {
5722 if (mb[10] & BIT_7)
5723 fcport->flags |=
5724 FCF_CONF_COMP_SUPPORTED;
5725 }
5726
5727 rval = QLA_SUCCESS;
5728 break;
5729 } else if (mb[0] == MBS_LOOP_ID_USED) {
5730 /*
5731 * Loop ID already used, try next loop ID.
5732 */
5733 fcport->loop_id++;
5734 rval = qla2x00_find_new_loop_id(vha, fcport);
5735 if (rval != QLA_SUCCESS) {
5736 /* Ran out of loop IDs to use */
5737 break;
5738 }
5739 } else if (mb[0] == MBS_COMMAND_ERROR) {
5740 /*
5741 * Firmware possibly timed out during login. If NO
5742 * retries are left to do then the device is declared
5743 * dead.
5744 */
5745 *next_loopid = fcport->loop_id;
5746 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
5747 fcport->d_id.b.domain, fcport->d_id.b.area,
5748 fcport->d_id.b.al_pa);
5749 qla2x00_mark_device_lost(vha, fcport, 1, 0);
5750
5751 rval = 1;
5752 break;
5753 } else {
5754 /*
5755 * unrecoverable / not handled error
5756 */
5757 ql_dbg(ql_dbg_disc, vha, 0x2002,
5758 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
5759 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
5760 fcport->d_id.b.area, fcport->d_id.b.al_pa,
5761 fcport->loop_id, jiffies);
5762
5763 *next_loopid = fcport->loop_id;
5764 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
5765 fcport->d_id.b.domain, fcport->d_id.b.area,
5766 fcport->d_id.b.al_pa);
5767 qla2x00_clear_loop_id(fcport);
5768 fcport->login_retry = 0;
5769
5770 rval = 3;
5771 break;
5772 }
5773 }
5774
5775 return (rval);
5776 }
5777
5778 /*
5779 * qla2x00_local_device_login
5780 * Issue local device login command.
5781 *
5782 * Input:
5783 * ha = adapter block pointer.
5784 * loop_id = loop id of device to login to.
5785 *
5786 * Returns (Where's the #define!!!!):
5787 * 0 - Login successfully
5788 * 1 - Login failed
5789 * 3 - Fatal error
5790 */
5791 int
5792 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
5793 {
5794 int rval;
5795 uint16_t mb[MAILBOX_REGISTER_COUNT];
5796
5797 memset(mb, 0, sizeof(mb));
5798 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
5799 if (rval == QLA_SUCCESS) {
5800 /* Interrogate mailbox registers for any errors */
5801 if (mb[0] == MBS_COMMAND_ERROR)
5802 rval = 1;
5803 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
5804 /* device not in PCB table */
5805 rval = 3;
5806 }
5807
5808 return (rval);
5809 }
5810
5811 /*
5812 * qla2x00_loop_resync
5813 * Resync with fibre channel devices.
5814 *
5815 * Input:
5816 * ha = adapter block pointer.
5817 *
5818 * Returns:
5819 * 0 = success
5820 */
5821 int
5822 qla2x00_loop_resync(scsi_qla_host_t *vha)
5823 {
5824 int rval = QLA_SUCCESS;
5825 uint32_t wait_time;
5826 struct req_que *req;
5827 struct rsp_que *rsp;
5828
5829 req = vha->req;
5830 rsp = req->rsp;
5831
5832 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
5833 if (vha->flags.online) {
5834 if (!(rval = qla2x00_fw_ready(vha))) {
5835 /* Wait at most MAX_TARGET RSCNs for a stable link. */
5836 wait_time = 256;
5837 do {
5838 if (!IS_QLAFX00(vha->hw)) {
5839 /*
5840 * Issue a marker after FW becomes
5841 * ready.
5842 */
5843 qla2x00_marker(vha, req, rsp, 0, 0,
5844 MK_SYNC_ALL);
5845 vha->marker_needed = 0;
5846 }
5847
5848 /* Remap devices on Loop. */
5849 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5850
5851 if (IS_QLAFX00(vha->hw))
5852 qlafx00_configure_devices(vha);
5853 else
5854 qla2x00_configure_loop(vha);
5855
5856 wait_time--;
5857 } while (!atomic_read(&vha->loop_down_timer) &&
5858 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
5859 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
5860 &vha->dpc_flags)));
5861 }
5862 }
5863
5864 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
5865 return (QLA_FUNCTION_FAILED);
5866
5867 if (rval)
5868 ql_dbg(ql_dbg_disc, vha, 0x206c,
5869 "%s *** FAILED ***.\n", __func__);
5870
5871 return (rval);
5872 }
5873
5874 /*
5875 * qla2x00_perform_loop_resync
5876 * Description: This function will set the appropriate flags and call
5877 * qla2x00_loop_resync. If successful loop will be resynced
5878 * Arguments : scsi_qla_host_t pointer
5879 * returm : Success or Failure
5880 */
5881
5882 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
5883 {
5884 int32_t rval = 0;
5885
5886 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
5887 /*Configure the flags so that resync happens properly*/
5888 atomic_set(&ha->loop_down_timer, 0);
5889 if (!(ha->device_flags & DFLG_NO_CABLE)) {
5890 atomic_set(&ha->loop_state, LOOP_UP);
5891 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
5892 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
5893 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
5894
5895 rval = qla2x00_loop_resync(ha);
5896 } else
5897 atomic_set(&ha->loop_state, LOOP_DEAD);
5898
5899 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
5900 }
5901
5902 return rval;
5903 }
5904
5905 void
5906 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
5907 {
5908 fc_port_t *fcport;
5909 struct scsi_qla_host *vha;
5910 struct qla_hw_data *ha = base_vha->hw;
5911 unsigned long flags;
5912
5913 spin_lock_irqsave(&ha->vport_slock, flags);
5914 /* Go with deferred removal of rport references. */
5915 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
5916 atomic_inc(&vha->vref_count);
5917 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5918 if (fcport->drport &&
5919 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
5920 spin_unlock_irqrestore(&ha->vport_slock, flags);
5921 qla2x00_rport_del(fcport);
5922
5923 spin_lock_irqsave(&ha->vport_slock, flags);
5924 }
5925 }
5926 atomic_dec(&vha->vref_count);
5927 wake_up(&vha->vref_waitq);
5928 }
5929 spin_unlock_irqrestore(&ha->vport_slock, flags);
5930 }
5931
5932 /* Assumes idc_lock always held on entry */
5933 void
5934 qla83xx_reset_ownership(scsi_qla_host_t *vha)
5935 {
5936 struct qla_hw_data *ha = vha->hw;
5937 uint32_t drv_presence, drv_presence_mask;
5938 uint32_t dev_part_info1, dev_part_info2, class_type;
5939 uint32_t class_type_mask = 0x3;
5940 uint16_t fcoe_other_function = 0xffff, i;
5941
5942 if (IS_QLA8044(ha)) {
5943 drv_presence = qla8044_rd_direct(vha,
5944 QLA8044_CRB_DRV_ACTIVE_INDEX);
5945 dev_part_info1 = qla8044_rd_direct(vha,
5946 QLA8044_CRB_DEV_PART_INFO_INDEX);
5947 dev_part_info2 = qla8044_rd_direct(vha,
5948 QLA8044_CRB_DEV_PART_INFO2);
5949 } else {
5950 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5951 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
5952 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
5953 }
5954 for (i = 0; i < 8; i++) {
5955 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
5956 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
5957 (i != ha->portnum)) {
5958 fcoe_other_function = i;
5959 break;
5960 }
5961 }
5962 if (fcoe_other_function == 0xffff) {
5963 for (i = 0; i < 8; i++) {
5964 class_type = ((dev_part_info2 >> (i * 4)) &
5965 class_type_mask);
5966 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
5967 ((i + 8) != ha->portnum)) {
5968 fcoe_other_function = i + 8;
5969 break;
5970 }
5971 }
5972 }
5973 /*
5974 * Prepare drv-presence mask based on fcoe functions present.
5975 * However consider only valid physical fcoe function numbers (0-15).
5976 */
5977 drv_presence_mask = ~((1 << (ha->portnum)) |
5978 ((fcoe_other_function == 0xffff) ?
5979 0 : (1 << (fcoe_other_function))));
5980
5981 /* We are the reset owner iff:
5982 * - No other protocol drivers present.
5983 * - This is the lowest among fcoe functions. */
5984 if (!(drv_presence & drv_presence_mask) &&
5985 (ha->portnum < fcoe_other_function)) {
5986 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
5987 "This host is Reset owner.\n");
5988 ha->flags.nic_core_reset_owner = 1;
5989 }
5990 }
5991
5992 static int
5993 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
5994 {
5995 int rval = QLA_SUCCESS;
5996 struct qla_hw_data *ha = vha->hw;
5997 uint32_t drv_ack;
5998
5999 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6000 if (rval == QLA_SUCCESS) {
6001 drv_ack |= (1 << ha->portnum);
6002 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6003 }
6004
6005 return rval;
6006 }
6007
6008 static int
6009 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
6010 {
6011 int rval = QLA_SUCCESS;
6012 struct qla_hw_data *ha = vha->hw;
6013 uint32_t drv_ack;
6014
6015 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6016 if (rval == QLA_SUCCESS) {
6017 drv_ack &= ~(1 << ha->portnum);
6018 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6019 }
6020
6021 return rval;
6022 }
6023
6024 static const char *
6025 qla83xx_dev_state_to_string(uint32_t dev_state)
6026 {
6027 switch (dev_state) {
6028 case QLA8XXX_DEV_COLD:
6029 return "COLD/RE-INIT";
6030 case QLA8XXX_DEV_INITIALIZING:
6031 return "INITIALIZING";
6032 case QLA8XXX_DEV_READY:
6033 return "READY";
6034 case QLA8XXX_DEV_NEED_RESET:
6035 return "NEED RESET";
6036 case QLA8XXX_DEV_NEED_QUIESCENT:
6037 return "NEED QUIESCENT";
6038 case QLA8XXX_DEV_FAILED:
6039 return "FAILED";
6040 case QLA8XXX_DEV_QUIESCENT:
6041 return "QUIESCENT";
6042 default:
6043 return "Unknown";
6044 }
6045 }
6046
6047 /* Assumes idc-lock always held on entry */
6048 void
6049 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
6050 {
6051 struct qla_hw_data *ha = vha->hw;
6052 uint32_t idc_audit_reg = 0, duration_secs = 0;
6053
6054 switch (audit_type) {
6055 case IDC_AUDIT_TIMESTAMP:
6056 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
6057 idc_audit_reg = (ha->portnum) |
6058 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
6059 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6060 break;
6061
6062 case IDC_AUDIT_COMPLETION:
6063 duration_secs = ((jiffies_to_msecs(jiffies) -
6064 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
6065 idc_audit_reg = (ha->portnum) |
6066 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
6067 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6068 break;
6069
6070 default:
6071 ql_log(ql_log_warn, vha, 0xb078,
6072 "Invalid audit type specified.\n");
6073 break;
6074 }
6075 }
6076
6077 /* Assumes idc_lock always held on entry */
6078 static int
6079 qla83xx_initiating_reset(scsi_qla_host_t *vha)
6080 {
6081 struct qla_hw_data *ha = vha->hw;
6082 uint32_t idc_control, dev_state;
6083
6084 __qla83xx_get_idc_control(vha, &idc_control);
6085 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
6086 ql_log(ql_log_info, vha, 0xb080,
6087 "NIC Core reset has been disabled. idc-control=0x%x\n",
6088 idc_control);
6089 return QLA_FUNCTION_FAILED;
6090 }
6091
6092 /* Set NEED-RESET iff in READY state and we are the reset-owner */
6093 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6094 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
6095 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
6096 QLA8XXX_DEV_NEED_RESET);
6097 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
6098 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6099 } else {
6100 const char *state = qla83xx_dev_state_to_string(dev_state);
6101 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
6102
6103 /* SV: XXX: Is timeout required here? */
6104 /* Wait for IDC state change READY -> NEED_RESET */
6105 while (dev_state == QLA8XXX_DEV_READY) {
6106 qla83xx_idc_unlock(vha, 0);
6107 msleep(200);
6108 qla83xx_idc_lock(vha, 0);
6109 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6110 }
6111 }
6112
6113 /* Send IDC ack by writing to drv-ack register */
6114 __qla83xx_set_drv_ack(vha);
6115
6116 return QLA_SUCCESS;
6117 }
6118
6119 int
6120 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
6121 {
6122 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6123 }
6124
6125 int
6126 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
6127 {
6128 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6129 }
6130
6131 static int
6132 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
6133 {
6134 uint32_t drv_presence = 0;
6135 struct qla_hw_data *ha = vha->hw;
6136
6137 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6138 if (drv_presence & (1 << ha->portnum))
6139 return QLA_SUCCESS;
6140 else
6141 return QLA_TEST_FAILED;
6142 }
6143
6144 int
6145 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
6146 {
6147 int rval = QLA_SUCCESS;
6148 struct qla_hw_data *ha = vha->hw;
6149
6150 ql_dbg(ql_dbg_p3p, vha, 0xb058,
6151 "Entered %s().\n", __func__);
6152
6153 if (vha->device_flags & DFLG_DEV_FAILED) {
6154 ql_log(ql_log_warn, vha, 0xb059,
6155 "Device in unrecoverable FAILED state.\n");
6156 return QLA_FUNCTION_FAILED;
6157 }
6158
6159 qla83xx_idc_lock(vha, 0);
6160
6161 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
6162 ql_log(ql_log_warn, vha, 0xb05a,
6163 "Function=0x%x has been removed from IDC participation.\n",
6164 ha->portnum);
6165 rval = QLA_FUNCTION_FAILED;
6166 goto exit;
6167 }
6168
6169 qla83xx_reset_ownership(vha);
6170
6171 rval = qla83xx_initiating_reset(vha);
6172
6173 /*
6174 * Perform reset if we are the reset-owner,
6175 * else wait till IDC state changes to READY/FAILED.
6176 */
6177 if (rval == QLA_SUCCESS) {
6178 rval = qla83xx_idc_state_handler(vha);
6179
6180 if (rval == QLA_SUCCESS)
6181 ha->flags.nic_core_hung = 0;
6182 __qla83xx_clear_drv_ack(vha);
6183 }
6184
6185 exit:
6186 qla83xx_idc_unlock(vha, 0);
6187
6188 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
6189
6190 return rval;
6191 }
6192
6193 int
6194 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
6195 {
6196 struct qla_hw_data *ha = vha->hw;
6197 int rval = QLA_FUNCTION_FAILED;
6198
6199 if (!IS_MCTP_CAPABLE(ha)) {
6200 /* This message can be removed from the final version */
6201 ql_log(ql_log_info, vha, 0x506d,
6202 "This board is not MCTP capable\n");
6203 return rval;
6204 }
6205
6206 if (!ha->mctp_dump) {
6207 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
6208 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
6209
6210 if (!ha->mctp_dump) {
6211 ql_log(ql_log_warn, vha, 0x506e,
6212 "Failed to allocate memory for mctp dump\n");
6213 return rval;
6214 }
6215 }
6216
6217 #define MCTP_DUMP_STR_ADDR 0x00000000
6218 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
6219 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
6220 if (rval != QLA_SUCCESS) {
6221 ql_log(ql_log_warn, vha, 0x506f,
6222 "Failed to capture mctp dump\n");
6223 } else {
6224 ql_log(ql_log_info, vha, 0x5070,
6225 "Mctp dump capture for host (%ld/%p).\n",
6226 vha->host_no, ha->mctp_dump);
6227 ha->mctp_dumped = 1;
6228 }
6229
6230 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
6231 ha->flags.nic_core_reset_hdlr_active = 1;
6232 rval = qla83xx_restart_nic_firmware(vha);
6233 if (rval)
6234 /* NIC Core reset failed. */
6235 ql_log(ql_log_warn, vha, 0x5071,
6236 "Failed to restart nic firmware\n");
6237 else
6238 ql_dbg(ql_dbg_p3p, vha, 0xb084,
6239 "Restarted NIC firmware successfully.\n");
6240 ha->flags.nic_core_reset_hdlr_active = 0;
6241 }
6242
6243 return rval;
6244
6245 }
6246
6247 /*
6248 * qla2x00_quiesce_io
6249 * Description: This function will block the new I/Os
6250 * Its not aborting any I/Os as context
6251 * is not destroyed during quiescence
6252 * Arguments: scsi_qla_host_t
6253 * return : void
6254 */
6255 void
6256 qla2x00_quiesce_io(scsi_qla_host_t *vha)
6257 {
6258 struct qla_hw_data *ha = vha->hw;
6259 struct scsi_qla_host *vp;
6260
6261 ql_dbg(ql_dbg_dpc, vha, 0x401d,
6262 "Quiescing I/O - ha=%p.\n", ha);
6263
6264 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
6265 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6266 atomic_set(&vha->loop_state, LOOP_DOWN);
6267 qla2x00_mark_all_devices_lost(vha, 0);
6268 list_for_each_entry(vp, &ha->vp_list, list)
6269 qla2x00_mark_all_devices_lost(vp, 0);
6270 } else {
6271 if (!atomic_read(&vha->loop_down_timer))
6272 atomic_set(&vha->loop_down_timer,
6273 LOOP_DOWN_TIME);
6274 }
6275 /* Wait for pending cmds to complete */
6276 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
6277 }
6278
6279 void
6280 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
6281 {
6282 struct qla_hw_data *ha = vha->hw;
6283 struct scsi_qla_host *vp;
6284 unsigned long flags;
6285 fc_port_t *fcport;
6286 u16 i;
6287
6288 /* For ISP82XX, driver waits for completion of the commands.
6289 * online flag should be set.
6290 */
6291 if (!(IS_P3P_TYPE(ha)))
6292 vha->flags.online = 0;
6293 ha->flags.chip_reset_done = 0;
6294 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
6295 vha->qla_stats.total_isp_aborts++;
6296
6297 ql_log(ql_log_info, vha, 0x00af,
6298 "Performing ISP error recovery - ha=%p.\n", ha);
6299
6300 /* For ISP82XX, reset_chip is just disabling interrupts.
6301 * Driver waits for the completion of the commands.
6302 * the interrupts need to be enabled.
6303 */
6304 if (!(IS_P3P_TYPE(ha)))
6305 ha->isp_ops->reset_chip(vha);
6306
6307 SAVE_TOPO(ha);
6308 ha->flags.rida_fmt2 = 0;
6309 ha->flags.n2n_ae = 0;
6310 ha->flags.lip_ae = 0;
6311 ha->current_topology = 0;
6312 ha->flags.fw_started = 0;
6313 ha->flags.fw_init_done = 0;
6314 ha->base_qpair->chip_reset++;
6315 for (i = 0; i < ha->max_qpairs; i++) {
6316 if (ha->queue_pair_map[i])
6317 ha->queue_pair_map[i]->chip_reset =
6318 ha->base_qpair->chip_reset;
6319 }
6320
6321 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
6322 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6323 atomic_set(&vha->loop_state, LOOP_DOWN);
6324 qla2x00_mark_all_devices_lost(vha, 0);
6325
6326 spin_lock_irqsave(&ha->vport_slock, flags);
6327 list_for_each_entry(vp, &ha->vp_list, list) {
6328 atomic_inc(&vp->vref_count);
6329 spin_unlock_irqrestore(&ha->vport_slock, flags);
6330
6331 qla2x00_mark_all_devices_lost(vp, 0);
6332
6333 spin_lock_irqsave(&ha->vport_slock, flags);
6334 atomic_dec(&vp->vref_count);
6335 }
6336 spin_unlock_irqrestore(&ha->vport_slock, flags);
6337 } else {
6338 if (!atomic_read(&vha->loop_down_timer))
6339 atomic_set(&vha->loop_down_timer,
6340 LOOP_DOWN_TIME);
6341 }
6342
6343 /* Clear all async request states across all VPs. */
6344 list_for_each_entry(fcport, &vha->vp_fcports, list)
6345 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6346 spin_lock_irqsave(&ha->vport_slock, flags);
6347 list_for_each_entry(vp, &ha->vp_list, list) {
6348 atomic_inc(&vp->vref_count);
6349 spin_unlock_irqrestore(&ha->vport_slock, flags);
6350
6351 list_for_each_entry(fcport, &vp->vp_fcports, list)
6352 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6353
6354 spin_lock_irqsave(&ha->vport_slock, flags);
6355 atomic_dec(&vp->vref_count);
6356 }
6357 spin_unlock_irqrestore(&ha->vport_slock, flags);
6358
6359 if (!ha->flags.eeh_busy) {
6360 /* Make sure for ISP 82XX IO DMA is complete */
6361 if (IS_P3P_TYPE(ha)) {
6362 qla82xx_chip_reset_cleanup(vha);
6363 ql_log(ql_log_info, vha, 0x00b4,
6364 "Done chip reset cleanup.\n");
6365
6366 /* Done waiting for pending commands.
6367 * Reset the online flag.
6368 */
6369 vha->flags.online = 0;
6370 }
6371
6372 /* Requeue all commands in outstanding command list. */
6373 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6374 }
6375 /* memory barrier */
6376 wmb();
6377 }
6378
6379 /*
6380 * qla2x00_abort_isp
6381 * Resets ISP and aborts all outstanding commands.
6382 *
6383 * Input:
6384 * ha = adapter block pointer.
6385 *
6386 * Returns:
6387 * 0 = success
6388 */
6389 int
6390 qla2x00_abort_isp(scsi_qla_host_t *vha)
6391 {
6392 int rval;
6393 uint8_t status = 0;
6394 struct qla_hw_data *ha = vha->hw;
6395 struct scsi_qla_host *vp;
6396 struct req_que *req = ha->req_q_map[0];
6397 unsigned long flags;
6398
6399 if (vha->flags.online) {
6400 qla2x00_abort_isp_cleanup(vha);
6401
6402 if (IS_QLA8031(ha)) {
6403 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
6404 "Clearing fcoe driver presence.\n");
6405 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
6406 ql_dbg(ql_dbg_p3p, vha, 0xb073,
6407 "Error while clearing DRV-Presence.\n");
6408 }
6409
6410 if (unlikely(pci_channel_offline(ha->pdev) &&
6411 ha->flags.pci_channel_io_perm_failure)) {
6412 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6413 status = 0;
6414 return status;
6415 }
6416
6417 ha->isp_ops->get_flash_version(vha, req->ring);
6418
6419 ha->isp_ops->nvram_config(vha);
6420
6421 if (!qla2x00_restart_isp(vha)) {
6422 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6423
6424 if (!atomic_read(&vha->loop_down_timer)) {
6425 /*
6426 * Issue marker command only when we are going
6427 * to start the I/O .
6428 */
6429 vha->marker_needed = 1;
6430 }
6431
6432 vha->flags.online = 1;
6433
6434 ha->isp_ops->enable_intrs(ha);
6435
6436 ha->isp_abort_cnt = 0;
6437 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6438
6439 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
6440 qla2x00_get_fw_version(vha);
6441 if (ha->fce) {
6442 ha->flags.fce_enabled = 1;
6443 memset(ha->fce, 0,
6444 fce_calc_size(ha->fce_bufs));
6445 rval = qla2x00_enable_fce_trace(vha,
6446 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
6447 &ha->fce_bufs);
6448 if (rval) {
6449 ql_log(ql_log_warn, vha, 0x8033,
6450 "Unable to reinitialize FCE "
6451 "(%d).\n", rval);
6452 ha->flags.fce_enabled = 0;
6453 }
6454 }
6455
6456 if (ha->eft) {
6457 memset(ha->eft, 0, EFT_SIZE);
6458 rval = qla2x00_enable_eft_trace(vha,
6459 ha->eft_dma, EFT_NUM_BUFFERS);
6460 if (rval) {
6461 ql_log(ql_log_warn, vha, 0x8034,
6462 "Unable to reinitialize EFT "
6463 "(%d).\n", rval);
6464 }
6465 }
6466 } else { /* failed the ISP abort */
6467 vha->flags.online = 1;
6468 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
6469 if (ha->isp_abort_cnt == 0) {
6470 ql_log(ql_log_fatal, vha, 0x8035,
6471 "ISP error recover failed - "
6472 "board disabled.\n");
6473 /*
6474 * The next call disables the board
6475 * completely.
6476 */
6477 ha->isp_ops->reset_adapter(vha);
6478 vha->flags.online = 0;
6479 clear_bit(ISP_ABORT_RETRY,
6480 &vha->dpc_flags);
6481 status = 0;
6482 } else { /* schedule another ISP abort */
6483 ha->isp_abort_cnt--;
6484 ql_dbg(ql_dbg_taskm, vha, 0x8020,
6485 "ISP abort - retry remaining %d.\n",
6486 ha->isp_abort_cnt);
6487 status = 1;
6488 }
6489 } else {
6490 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
6491 ql_dbg(ql_dbg_taskm, vha, 0x8021,
6492 "ISP error recovery - retrying (%d) "
6493 "more times.\n", ha->isp_abort_cnt);
6494 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6495 status = 1;
6496 }
6497 }
6498
6499 }
6500
6501 if (!status) {
6502 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
6503 qla2x00_configure_hba(vha);
6504 spin_lock_irqsave(&ha->vport_slock, flags);
6505 list_for_each_entry(vp, &ha->vp_list, list) {
6506 if (vp->vp_idx) {
6507 atomic_inc(&vp->vref_count);
6508 spin_unlock_irqrestore(&ha->vport_slock, flags);
6509
6510 qla2x00_vp_abort_isp(vp);
6511
6512 spin_lock_irqsave(&ha->vport_slock, flags);
6513 atomic_dec(&vp->vref_count);
6514 }
6515 }
6516 spin_unlock_irqrestore(&ha->vport_slock, flags);
6517
6518 if (IS_QLA8031(ha)) {
6519 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
6520 "Setting back fcoe driver presence.\n");
6521 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
6522 ql_dbg(ql_dbg_p3p, vha, 0xb074,
6523 "Error while setting DRV-Presence.\n");
6524 }
6525 } else {
6526 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
6527 __func__);
6528 }
6529
6530 return(status);
6531 }
6532
6533 /*
6534 * qla2x00_restart_isp
6535 * restarts the ISP after a reset
6536 *
6537 * Input:
6538 * ha = adapter block pointer.
6539 *
6540 * Returns:
6541 * 0 = success
6542 */
6543 static int
6544 qla2x00_restart_isp(scsi_qla_host_t *vha)
6545 {
6546 int status = 0;
6547 struct qla_hw_data *ha = vha->hw;
6548 struct req_que *req = ha->req_q_map[0];
6549 struct rsp_que *rsp = ha->rsp_q_map[0];
6550
6551 /* If firmware needs to be loaded */
6552 if (qla2x00_isp_firmware(vha)) {
6553 vha->flags.online = 0;
6554 status = ha->isp_ops->chip_diag(vha);
6555 if (!status)
6556 status = qla2x00_setup_chip(vha);
6557 }
6558
6559 if (!status && !(status = qla2x00_init_rings(vha))) {
6560 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6561 ha->flags.chip_reset_done = 1;
6562
6563 /* Initialize the queues in use */
6564 qla25xx_init_queues(ha);
6565
6566 status = qla2x00_fw_ready(vha);
6567 if (!status) {
6568 /* Issue a marker after FW becomes ready. */
6569 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
6570 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6571 }
6572
6573 /* if no cable then assume it's good */
6574 if ((vha->device_flags & DFLG_NO_CABLE))
6575 status = 0;
6576 }
6577 return (status);
6578 }
6579
6580 static int
6581 qla25xx_init_queues(struct qla_hw_data *ha)
6582 {
6583 struct rsp_que *rsp = NULL;
6584 struct req_que *req = NULL;
6585 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6586 int ret = -1;
6587 int i;
6588
6589 for (i = 1; i < ha->max_rsp_queues; i++) {
6590 rsp = ha->rsp_q_map[i];
6591 if (rsp && test_bit(i, ha->rsp_qid_map)) {
6592 rsp->options &= ~BIT_0;
6593 ret = qla25xx_init_rsp_que(base_vha, rsp);
6594 if (ret != QLA_SUCCESS)
6595 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
6596 "%s Rsp que: %d init failed.\n",
6597 __func__, rsp->id);
6598 else
6599 ql_dbg(ql_dbg_init, base_vha, 0x0100,
6600 "%s Rsp que: %d inited.\n",
6601 __func__, rsp->id);
6602 }
6603 }
6604 for (i = 1; i < ha->max_req_queues; i++) {
6605 req = ha->req_q_map[i];
6606 if (req && test_bit(i, ha->req_qid_map)) {
6607 /* Clear outstanding commands array. */
6608 req->options &= ~BIT_0;
6609 ret = qla25xx_init_req_que(base_vha, req);
6610 if (ret != QLA_SUCCESS)
6611 ql_dbg(ql_dbg_init, base_vha, 0x0101,
6612 "%s Req que: %d init failed.\n",
6613 __func__, req->id);
6614 else
6615 ql_dbg(ql_dbg_init, base_vha, 0x0102,
6616 "%s Req que: %d inited.\n",
6617 __func__, req->id);
6618 }
6619 }
6620 return ret;
6621 }
6622
6623 /*
6624 * qla2x00_reset_adapter
6625 * Reset adapter.
6626 *
6627 * Input:
6628 * ha = adapter block pointer.
6629 */
6630 void
6631 qla2x00_reset_adapter(scsi_qla_host_t *vha)
6632 {
6633 unsigned long flags = 0;
6634 struct qla_hw_data *ha = vha->hw;
6635 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6636
6637 vha->flags.online = 0;
6638 ha->isp_ops->disable_intrs(ha);
6639
6640 spin_lock_irqsave(&ha->hardware_lock, flags);
6641 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
6642 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
6643 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
6644 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
6645 spin_unlock_irqrestore(&ha->hardware_lock, flags);
6646 }
6647
6648 void
6649 qla24xx_reset_adapter(scsi_qla_host_t *vha)
6650 {
6651 unsigned long flags = 0;
6652 struct qla_hw_data *ha = vha->hw;
6653 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
6654
6655 if (IS_P3P_TYPE(ha))
6656 return;
6657
6658 vha->flags.online = 0;
6659 ha->isp_ops->disable_intrs(ha);
6660
6661 spin_lock_irqsave(&ha->hardware_lock, flags);
6662 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
6663 RD_REG_DWORD(&reg->hccr);
6664 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
6665 RD_REG_DWORD(&reg->hccr);
6666 spin_unlock_irqrestore(&ha->hardware_lock, flags);
6667
6668 if (IS_NOPOLLING_TYPE(ha))
6669 ha->isp_ops->enable_intrs(ha);
6670 }
6671
6672 /* On sparc systems, obtain port and node WWN from firmware
6673 * properties.
6674 */
6675 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
6676 struct nvram_24xx *nv)
6677 {
6678 #ifdef CONFIG_SPARC
6679 struct qla_hw_data *ha = vha->hw;
6680 struct pci_dev *pdev = ha->pdev;
6681 struct device_node *dp = pci_device_to_OF_node(pdev);
6682 const u8 *val;
6683 int len;
6684
6685 val = of_get_property(dp, "port-wwn", &len);
6686 if (val && len >= WWN_SIZE)
6687 memcpy(nv->port_name, val, WWN_SIZE);
6688
6689 val = of_get_property(dp, "node-wwn", &len);
6690 if (val && len >= WWN_SIZE)
6691 memcpy(nv->node_name, val, WWN_SIZE);
6692 #endif
6693 }
6694
6695 int
6696 qla24xx_nvram_config(scsi_qla_host_t *vha)
6697 {
6698 int rval;
6699 struct init_cb_24xx *icb;
6700 struct nvram_24xx *nv;
6701 uint32_t *dptr;
6702 uint8_t *dptr1, *dptr2;
6703 uint32_t chksum;
6704 uint16_t cnt;
6705 struct qla_hw_data *ha = vha->hw;
6706
6707 rval = QLA_SUCCESS;
6708 icb = (struct init_cb_24xx *)ha->init_cb;
6709 nv = ha->nvram;
6710
6711 /* Determine NVRAM starting address. */
6712 if (ha->port_no == 0) {
6713 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
6714 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
6715 } else {
6716 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
6717 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
6718 }
6719
6720 ha->nvram_size = sizeof(struct nvram_24xx);
6721 ha->vpd_size = FA_NVRAM_VPD_SIZE;
6722
6723 /* Get VPD data into cache */
6724 ha->vpd = ha->nvram + VPD_OFFSET;
6725 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
6726 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
6727
6728 /* Get NVRAM data into cache and calculate checksum. */
6729 dptr = (uint32_t *)nv;
6730 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
6731 ha->nvram_size);
6732 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
6733 chksum += le32_to_cpu(*dptr);
6734
6735 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
6736 "Contents of NVRAM\n");
6737 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
6738 (uint8_t *)nv, ha->nvram_size);
6739
6740 /* Bad NVRAM data, set defaults parameters. */
6741 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
6742 || nv->id[3] != ' ' ||
6743 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
6744 /* Reset NVRAM data. */
6745 ql_log(ql_log_warn, vha, 0x006b,
6746 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
6747 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
6748 ql_log(ql_log_warn, vha, 0x006c,
6749 "Falling back to functioning (yet invalid -- WWPN) "
6750 "defaults.\n");
6751
6752 /*
6753 * Set default initialization control block.
6754 */
6755 memset(nv, 0, ha->nvram_size);
6756 nv->nvram_version = cpu_to_le16(ICB_VERSION);
6757 nv->version = cpu_to_le16(ICB_VERSION);
6758 nv->frame_payload_size = 2048;
6759 nv->execution_throttle = cpu_to_le16(0xFFFF);
6760 nv->exchange_count = cpu_to_le16(0);
6761 nv->hard_address = cpu_to_le16(124);
6762 nv->port_name[0] = 0x21;
6763 nv->port_name[1] = 0x00 + ha->port_no + 1;
6764 nv->port_name[2] = 0x00;
6765 nv->port_name[3] = 0xe0;
6766 nv->port_name[4] = 0x8b;
6767 nv->port_name[5] = 0x1c;
6768 nv->port_name[6] = 0x55;
6769 nv->port_name[7] = 0x86;
6770 nv->node_name[0] = 0x20;
6771 nv->node_name[1] = 0x00;
6772 nv->node_name[2] = 0x00;
6773 nv->node_name[3] = 0xe0;
6774 nv->node_name[4] = 0x8b;
6775 nv->node_name[5] = 0x1c;
6776 nv->node_name[6] = 0x55;
6777 nv->node_name[7] = 0x86;
6778 qla24xx_nvram_wwn_from_ofw(vha, nv);
6779 nv->login_retry_count = cpu_to_le16(8);
6780 nv->interrupt_delay_timer = cpu_to_le16(0);
6781 nv->login_timeout = cpu_to_le16(0);
6782 nv->firmware_options_1 =
6783 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
6784 nv->firmware_options_2 = cpu_to_le32(2 << 4);
6785 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
6786 nv->firmware_options_3 = cpu_to_le32(2 << 13);
6787 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
6788 nv->efi_parameters = cpu_to_le32(0);
6789 nv->reset_delay = 5;
6790 nv->max_luns_per_target = cpu_to_le16(128);
6791 nv->port_down_retry_count = cpu_to_le16(30);
6792 nv->link_down_timeout = cpu_to_le16(30);
6793
6794 rval = 1;
6795 }
6796
6797 if (qla_tgt_mode_enabled(vha)) {
6798 /* Don't enable full login after initial LIP */
6799 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
6800 /* Don't enable LIP full login for initiator */
6801 nv->host_p &= cpu_to_le32(~BIT_10);
6802 }
6803
6804 qlt_24xx_config_nvram_stage1(vha, nv);
6805
6806 /* Reset Initialization control block */
6807 memset(icb, 0, ha->init_cb_size);
6808
6809 /* Copy 1st segment. */
6810 dptr1 = (uint8_t *)icb;
6811 dptr2 = (uint8_t *)&nv->version;
6812 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
6813 while (cnt--)
6814 *dptr1++ = *dptr2++;
6815
6816 icb->login_retry_count = nv->login_retry_count;
6817 icb->link_down_on_nos = nv->link_down_on_nos;
6818
6819 /* Copy 2nd segment. */
6820 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
6821 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
6822 cnt = (uint8_t *)&icb->reserved_3 -
6823 (uint8_t *)&icb->interrupt_delay_timer;
6824 while (cnt--)
6825 *dptr1++ = *dptr2++;
6826
6827 /*
6828 * Setup driver NVRAM options.
6829 */
6830 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
6831 "QLA2462");
6832
6833 qlt_24xx_config_nvram_stage2(vha, icb);
6834
6835 if (nv->host_p & cpu_to_le32(BIT_15)) {
6836 /* Use alternate WWN? */
6837 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
6838 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
6839 }
6840
6841 /* Prepare nodename */
6842 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
6843 /*
6844 * Firmware will apply the following mask if the nodename was
6845 * not provided.
6846 */
6847 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
6848 icb->node_name[0] &= 0xF0;
6849 }
6850
6851 /* Set host adapter parameters. */
6852 ha->flags.disable_risc_code_load = 0;
6853 ha->flags.enable_lip_reset = 0;
6854 ha->flags.enable_lip_full_login =
6855 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
6856 ha->flags.enable_target_reset =
6857 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
6858 ha->flags.enable_led_scheme = 0;
6859 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
6860
6861 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
6862 (BIT_6 | BIT_5 | BIT_4)) >> 4;
6863
6864 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
6865 sizeof(ha->fw_seriallink_options24));
6866
6867 /* save HBA serial number */
6868 ha->serial0 = icb->port_name[5];
6869 ha->serial1 = icb->port_name[6];
6870 ha->serial2 = icb->port_name[7];
6871 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
6872 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
6873
6874 icb->execution_throttle = cpu_to_le16(0xFFFF);
6875
6876 ha->retry_count = le16_to_cpu(nv->login_retry_count);
6877
6878 /* Set minimum login_timeout to 4 seconds. */
6879 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
6880 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
6881 if (le16_to_cpu(nv->login_timeout) < 4)
6882 nv->login_timeout = cpu_to_le16(4);
6883 ha->login_timeout = le16_to_cpu(nv->login_timeout);
6884
6885 /* Set minimum RATOV to 100 tenths of a second. */
6886 ha->r_a_tov = 100;
6887
6888 ha->loop_reset_delay = nv->reset_delay;
6889
6890 /* Link Down Timeout = 0:
6891 *
6892 * When Port Down timer expires we will start returning
6893 * I/O's to OS with "DID_NO_CONNECT".
6894 *
6895 * Link Down Timeout != 0:
6896 *
6897 * The driver waits for the link to come up after link down
6898 * before returning I/Os to OS with "DID_NO_CONNECT".
6899 */
6900 if (le16_to_cpu(nv->link_down_timeout) == 0) {
6901 ha->loop_down_abort_time =
6902 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
6903 } else {
6904 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
6905 ha->loop_down_abort_time =
6906 (LOOP_DOWN_TIME - ha->link_down_timeout);
6907 }
6908
6909 /* Need enough time to try and get the port back. */
6910 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
6911 if (qlport_down_retry)
6912 ha->port_down_retry_count = qlport_down_retry;
6913
6914 /* Set login_retry_count */
6915 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
6916 if (ha->port_down_retry_count ==
6917 le16_to_cpu(nv->port_down_retry_count) &&
6918 ha->port_down_retry_count > 3)
6919 ha->login_retry_count = ha->port_down_retry_count;
6920 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
6921 ha->login_retry_count = ha->port_down_retry_count;
6922 if (ql2xloginretrycount)
6923 ha->login_retry_count = ql2xloginretrycount;
6924
6925 /* Enable ZIO. */
6926 if (!vha->flags.init_done) {
6927 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
6928 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
6929 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
6930 le16_to_cpu(icb->interrupt_delay_timer): 2;
6931 }
6932 icb->firmware_options_2 &= cpu_to_le32(
6933 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
6934 vha->flags.process_response_queue = 0;
6935 if (ha->zio_mode != QLA_ZIO_DISABLED) {
6936 ha->zio_mode = QLA_ZIO_MODE_6;
6937
6938 ql_log(ql_log_info, vha, 0x006f,
6939 "ZIO mode %d enabled; timer delay (%d us).\n",
6940 ha->zio_mode, ha->zio_timer * 100);
6941
6942 icb->firmware_options_2 |= cpu_to_le32(
6943 (uint32_t)ha->zio_mode);
6944 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
6945 vha->flags.process_response_queue = 1;
6946 }
6947
6948 if (rval) {
6949 ql_log(ql_log_warn, vha, 0x0070,
6950 "NVRAM configuration failed.\n");
6951 }
6952 return (rval);
6953 }
6954
6955 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha)
6956 {
6957 struct qla27xx_image_status pri_image_status, sec_image_status;
6958 uint8_t valid_pri_image, valid_sec_image;
6959 uint32_t *wptr;
6960 uint32_t cnt, chksum, size;
6961 struct qla_hw_data *ha = vha->hw;
6962
6963 valid_pri_image = valid_sec_image = 1;
6964 ha->active_image = 0;
6965 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t);
6966
6967 if (!ha->flt_region_img_status_pri) {
6968 valid_pri_image = 0;
6969 goto check_sec_image;
6970 }
6971
6972 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status),
6973 ha->flt_region_img_status_pri, size);
6974
6975 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
6976 ql_dbg(ql_dbg_init, vha, 0x018b,
6977 "Primary image signature (0x%x) not valid\n",
6978 pri_image_status.signature);
6979 valid_pri_image = 0;
6980 goto check_sec_image;
6981 }
6982
6983 wptr = (uint32_t *)(&pri_image_status);
6984 cnt = size;
6985
6986 for (chksum = 0; cnt--; wptr++)
6987 chksum += le32_to_cpu(*wptr);
6988
6989 if (chksum) {
6990 ql_dbg(ql_dbg_init, vha, 0x018c,
6991 "Checksum validation failed for primary image (0x%x)\n",
6992 chksum);
6993 valid_pri_image = 0;
6994 }
6995
6996 check_sec_image:
6997 if (!ha->flt_region_img_status_sec) {
6998 valid_sec_image = 0;
6999 goto check_valid_image;
7000 }
7001
7002 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
7003 ha->flt_region_img_status_sec, size);
7004
7005 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
7006 ql_dbg(ql_dbg_init, vha, 0x018d,
7007 "Secondary image signature(0x%x) not valid\n",
7008 sec_image_status.signature);
7009 valid_sec_image = 0;
7010 goto check_valid_image;
7011 }
7012
7013 wptr = (uint32_t *)(&sec_image_status);
7014 cnt = size;
7015 for (chksum = 0; cnt--; wptr++)
7016 chksum += le32_to_cpu(*wptr);
7017 if (chksum) {
7018 ql_dbg(ql_dbg_init, vha, 0x018e,
7019 "Checksum validation failed for secondary image (0x%x)\n",
7020 chksum);
7021 valid_sec_image = 0;
7022 }
7023
7024 check_valid_image:
7025 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1))
7026 ha->active_image = QLA27XX_PRIMARY_IMAGE;
7027 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) {
7028 if (!ha->active_image ||
7029 pri_image_status.generation_number <
7030 sec_image_status.generation_number)
7031 ha->active_image = QLA27XX_SECONDARY_IMAGE;
7032 }
7033
7034 ql_dbg(ql_dbg_init, vha, 0x018f, "%s image\n",
7035 ha->active_image == 0 ? "default bootld and fw" :
7036 ha->active_image == 1 ? "primary" :
7037 ha->active_image == 2 ? "secondary" :
7038 "Invalid");
7039
7040 return ha->active_image;
7041 }
7042
7043 static int
7044 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
7045 uint32_t faddr)
7046 {
7047 int rval = QLA_SUCCESS;
7048 int segments, fragment;
7049 uint32_t *dcode, dlen;
7050 uint32_t risc_addr;
7051 uint32_t risc_size;
7052 uint32_t i;
7053 struct qla_hw_data *ha = vha->hw;
7054 struct req_que *req = ha->req_q_map[0];
7055
7056 ql_dbg(ql_dbg_init, vha, 0x008b,
7057 "FW: Loading firmware from flash (%x).\n", faddr);
7058
7059 rval = QLA_SUCCESS;
7060
7061 segments = FA_RISC_CODE_SEGMENTS;
7062 dcode = (uint32_t *)req->ring;
7063 *srisc_addr = 0;
7064
7065 if (IS_QLA27XX(ha) &&
7066 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE)
7067 faddr = ha->flt_region_fw_sec;
7068
7069 /* Validate firmware image by checking version. */
7070 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
7071 for (i = 0; i < 4; i++)
7072 dcode[i] = be32_to_cpu(dcode[i]);
7073 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7074 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
7075 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7076 dcode[3] == 0)) {
7077 ql_log(ql_log_fatal, vha, 0x008c,
7078 "Unable to verify the integrity of flash firmware "
7079 "image.\n");
7080 ql_log(ql_log_fatal, vha, 0x008d,
7081 "Firmware data: %08x %08x %08x %08x.\n",
7082 dcode[0], dcode[1], dcode[2], dcode[3]);
7083
7084 return QLA_FUNCTION_FAILED;
7085 }
7086
7087 while (segments && rval == QLA_SUCCESS) {
7088 /* Read segment's load information. */
7089 qla24xx_read_flash_data(vha, dcode, faddr, 4);
7090
7091 risc_addr = be32_to_cpu(dcode[2]);
7092 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
7093 risc_size = be32_to_cpu(dcode[3]);
7094
7095 fragment = 0;
7096 while (risc_size > 0 && rval == QLA_SUCCESS) {
7097 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
7098 if (dlen > risc_size)
7099 dlen = risc_size;
7100
7101 ql_dbg(ql_dbg_init, vha, 0x008e,
7102 "Loading risc segment@ risc addr %x "
7103 "number of dwords 0x%x offset 0x%x.\n",
7104 risc_addr, dlen, faddr);
7105
7106 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
7107 for (i = 0; i < dlen; i++)
7108 dcode[i] = swab32(dcode[i]);
7109
7110 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7111 dlen);
7112 if (rval) {
7113 ql_log(ql_log_fatal, vha, 0x008f,
7114 "Failed to load segment %d of firmware.\n",
7115 fragment);
7116 return QLA_FUNCTION_FAILED;
7117 }
7118
7119 faddr += dlen;
7120 risc_addr += dlen;
7121 risc_size -= dlen;
7122 fragment++;
7123 }
7124
7125 /* Next segment. */
7126 segments--;
7127 }
7128
7129 if (!IS_QLA27XX(ha))
7130 return rval;
7131
7132 if (ha->fw_dump_template)
7133 vfree(ha->fw_dump_template);
7134 ha->fw_dump_template = NULL;
7135 ha->fw_dump_template_len = 0;
7136
7137 ql_dbg(ql_dbg_init, vha, 0x0161,
7138 "Loading fwdump template from %x\n", faddr);
7139 qla24xx_read_flash_data(vha, dcode, faddr, 7);
7140 risc_size = be32_to_cpu(dcode[2]);
7141 ql_dbg(ql_dbg_init, vha, 0x0162,
7142 "-> array size %x dwords\n", risc_size);
7143 if (risc_size == 0 || risc_size == ~0)
7144 goto default_template;
7145
7146 dlen = (risc_size - 8) * sizeof(*dcode);
7147 ql_dbg(ql_dbg_init, vha, 0x0163,
7148 "-> template allocating %x bytes...\n", dlen);
7149 ha->fw_dump_template = vmalloc(dlen);
7150 if (!ha->fw_dump_template) {
7151 ql_log(ql_log_warn, vha, 0x0164,
7152 "Failed fwdump template allocate %x bytes.\n", risc_size);
7153 goto default_template;
7154 }
7155
7156 faddr += 7;
7157 risc_size -= 8;
7158 dcode = ha->fw_dump_template;
7159 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
7160 for (i = 0; i < risc_size; i++)
7161 dcode[i] = le32_to_cpu(dcode[i]);
7162
7163 if (!qla27xx_fwdt_template_valid(dcode)) {
7164 ql_log(ql_log_warn, vha, 0x0165,
7165 "Failed fwdump template validate\n");
7166 goto default_template;
7167 }
7168
7169 dlen = qla27xx_fwdt_template_size(dcode);
7170 ql_dbg(ql_dbg_init, vha, 0x0166,
7171 "-> template size %x bytes\n", dlen);
7172 if (dlen > risc_size * sizeof(*dcode)) {
7173 ql_log(ql_log_warn, vha, 0x0167,
7174 "Failed fwdump template exceeds array by %zx bytes\n",
7175 (size_t)(dlen - risc_size * sizeof(*dcode)));
7176 goto default_template;
7177 }
7178 ha->fw_dump_template_len = dlen;
7179 return rval;
7180
7181 default_template:
7182 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n");
7183 if (ha->fw_dump_template)
7184 vfree(ha->fw_dump_template);
7185 ha->fw_dump_template = NULL;
7186 ha->fw_dump_template_len = 0;
7187
7188 dlen = qla27xx_fwdt_template_default_size();
7189 ql_dbg(ql_dbg_init, vha, 0x0169,
7190 "-> template allocating %x bytes...\n", dlen);
7191 ha->fw_dump_template = vmalloc(dlen);
7192 if (!ha->fw_dump_template) {
7193 ql_log(ql_log_warn, vha, 0x016a,
7194 "Failed fwdump template allocate %x bytes.\n", risc_size);
7195 goto failed_template;
7196 }
7197
7198 dcode = ha->fw_dump_template;
7199 risc_size = dlen / sizeof(*dcode);
7200 memcpy(dcode, qla27xx_fwdt_template_default(), dlen);
7201 for (i = 0; i < risc_size; i++)
7202 dcode[i] = be32_to_cpu(dcode[i]);
7203
7204 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7205 ql_log(ql_log_warn, vha, 0x016b,
7206 "Failed fwdump template validate\n");
7207 goto failed_template;
7208 }
7209
7210 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7211 ql_dbg(ql_dbg_init, vha, 0x016c,
7212 "-> template size %x bytes\n", dlen);
7213 ha->fw_dump_template_len = dlen;
7214 return rval;
7215
7216 failed_template:
7217 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n");
7218 if (ha->fw_dump_template)
7219 vfree(ha->fw_dump_template);
7220 ha->fw_dump_template = NULL;
7221 ha->fw_dump_template_len = 0;
7222 return rval;
7223 }
7224
7225 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
7226
7227 int
7228 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7229 {
7230 int rval;
7231 int i, fragment;
7232 uint16_t *wcode, *fwcode;
7233 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
7234 struct fw_blob *blob;
7235 struct qla_hw_data *ha = vha->hw;
7236 struct req_que *req = ha->req_q_map[0];
7237
7238 /* Load firmware blob. */
7239 blob = qla2x00_request_firmware(vha);
7240 if (!blob) {
7241 ql_log(ql_log_info, vha, 0x0083,
7242 "Firmware image unavailable.\n");
7243 ql_log(ql_log_info, vha, 0x0084,
7244 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
7245 return QLA_FUNCTION_FAILED;
7246 }
7247
7248 rval = QLA_SUCCESS;
7249
7250 wcode = (uint16_t *)req->ring;
7251 *srisc_addr = 0;
7252 fwcode = (uint16_t *)blob->fw->data;
7253 fwclen = 0;
7254
7255 /* Validate firmware image by checking version. */
7256 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7257 ql_log(ql_log_fatal, vha, 0x0085,
7258 "Unable to verify integrity of firmware image (%zd).\n",
7259 blob->fw->size);
7260 goto fail_fw_integrity;
7261 }
7262 for (i = 0; i < 4; i++)
7263 wcode[i] = be16_to_cpu(fwcode[i + 4]);
7264 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
7265 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
7266 wcode[2] == 0 && wcode[3] == 0)) {
7267 ql_log(ql_log_fatal, vha, 0x0086,
7268 "Unable to verify integrity of firmware image.\n");
7269 ql_log(ql_log_fatal, vha, 0x0087,
7270 "Firmware data: %04x %04x %04x %04x.\n",
7271 wcode[0], wcode[1], wcode[2], wcode[3]);
7272 goto fail_fw_integrity;
7273 }
7274
7275 seg = blob->segs;
7276 while (*seg && rval == QLA_SUCCESS) {
7277 risc_addr = *seg;
7278 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
7279 risc_size = be16_to_cpu(fwcode[3]);
7280
7281 /* Validate firmware image size. */
7282 fwclen += risc_size * sizeof(uint16_t);
7283 if (blob->fw->size < fwclen) {
7284 ql_log(ql_log_fatal, vha, 0x0088,
7285 "Unable to verify integrity of firmware image "
7286 "(%zd).\n", blob->fw->size);
7287 goto fail_fw_integrity;
7288 }
7289
7290 fragment = 0;
7291 while (risc_size > 0 && rval == QLA_SUCCESS) {
7292 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
7293 if (wlen > risc_size)
7294 wlen = risc_size;
7295 ql_dbg(ql_dbg_init, vha, 0x0089,
7296 "Loading risc segment@ risc addr %x number of "
7297 "words 0x%x.\n", risc_addr, wlen);
7298
7299 for (i = 0; i < wlen; i++)
7300 wcode[i] = swab16(fwcode[i]);
7301
7302 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7303 wlen);
7304 if (rval) {
7305 ql_log(ql_log_fatal, vha, 0x008a,
7306 "Failed to load segment %d of firmware.\n",
7307 fragment);
7308 break;
7309 }
7310
7311 fwcode += wlen;
7312 risc_addr += wlen;
7313 risc_size -= wlen;
7314 fragment++;
7315 }
7316
7317 /* Next segment. */
7318 seg++;
7319 }
7320 return rval;
7321
7322 fail_fw_integrity:
7323 return QLA_FUNCTION_FAILED;
7324 }
7325
7326 static int
7327 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7328 {
7329 int rval;
7330 int segments, fragment;
7331 uint32_t *dcode, dlen;
7332 uint32_t risc_addr;
7333 uint32_t risc_size;
7334 uint32_t i;
7335 struct fw_blob *blob;
7336 const uint32_t *fwcode;
7337 uint32_t fwclen;
7338 struct qla_hw_data *ha = vha->hw;
7339 struct req_que *req = ha->req_q_map[0];
7340
7341 /* Load firmware blob. */
7342 blob = qla2x00_request_firmware(vha);
7343 if (!blob) {
7344 ql_log(ql_log_warn, vha, 0x0090,
7345 "Firmware image unavailable.\n");
7346 ql_log(ql_log_warn, vha, 0x0091,
7347 "Firmware images can be retrieved from: "
7348 QLA_FW_URL ".\n");
7349
7350 return QLA_FUNCTION_FAILED;
7351 }
7352
7353 ql_dbg(ql_dbg_init, vha, 0x0092,
7354 "FW: Loading via request-firmware.\n");
7355
7356 rval = QLA_SUCCESS;
7357
7358 segments = FA_RISC_CODE_SEGMENTS;
7359 dcode = (uint32_t *)req->ring;
7360 *srisc_addr = 0;
7361 fwcode = (uint32_t *)blob->fw->data;
7362 fwclen = 0;
7363
7364 /* Validate firmware image by checking version. */
7365 if (blob->fw->size < 8 * sizeof(uint32_t)) {
7366 ql_log(ql_log_fatal, vha, 0x0093,
7367 "Unable to verify integrity of firmware image (%zd).\n",
7368 blob->fw->size);
7369 return QLA_FUNCTION_FAILED;
7370 }
7371 for (i = 0; i < 4; i++)
7372 dcode[i] = be32_to_cpu(fwcode[i + 4]);
7373 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7374 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
7375 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7376 dcode[3] == 0)) {
7377 ql_log(ql_log_fatal, vha, 0x0094,
7378 "Unable to verify integrity of firmware image (%zd).\n",
7379 blob->fw->size);
7380 ql_log(ql_log_fatal, vha, 0x0095,
7381 "Firmware data: %08x %08x %08x %08x.\n",
7382 dcode[0], dcode[1], dcode[2], dcode[3]);
7383 return QLA_FUNCTION_FAILED;
7384 }
7385
7386 while (segments && rval == QLA_SUCCESS) {
7387 risc_addr = be32_to_cpu(fwcode[2]);
7388 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
7389 risc_size = be32_to_cpu(fwcode[3]);
7390
7391 /* Validate firmware image size. */
7392 fwclen += risc_size * sizeof(uint32_t);
7393 if (blob->fw->size < fwclen) {
7394 ql_log(ql_log_fatal, vha, 0x0096,
7395 "Unable to verify integrity of firmware image "
7396 "(%zd).\n", blob->fw->size);
7397 return QLA_FUNCTION_FAILED;
7398 }
7399
7400 fragment = 0;
7401 while (risc_size > 0 && rval == QLA_SUCCESS) {
7402 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
7403 if (dlen > risc_size)
7404 dlen = risc_size;
7405
7406 ql_dbg(ql_dbg_init, vha, 0x0097,
7407 "Loading risc segment@ risc addr %x "
7408 "number of dwords 0x%x.\n", risc_addr, dlen);
7409
7410 for (i = 0; i < dlen; i++)
7411 dcode[i] = swab32(fwcode[i]);
7412
7413 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7414 dlen);
7415 if (rval) {
7416 ql_log(ql_log_fatal, vha, 0x0098,
7417 "Failed to load segment %d of firmware.\n",
7418 fragment);
7419 return QLA_FUNCTION_FAILED;
7420 }
7421
7422 fwcode += dlen;
7423 risc_addr += dlen;
7424 risc_size -= dlen;
7425 fragment++;
7426 }
7427
7428 /* Next segment. */
7429 segments--;
7430 }
7431
7432 if (!IS_QLA27XX(ha))
7433 return rval;
7434
7435 if (ha->fw_dump_template)
7436 vfree(ha->fw_dump_template);
7437 ha->fw_dump_template = NULL;
7438 ha->fw_dump_template_len = 0;
7439
7440 ql_dbg(ql_dbg_init, vha, 0x171,
7441 "Loading fwdump template from %x\n",
7442 (uint32_t)((void *)fwcode - (void *)blob->fw->data));
7443 risc_size = be32_to_cpu(fwcode[2]);
7444 ql_dbg(ql_dbg_init, vha, 0x172,
7445 "-> array size %x dwords\n", risc_size);
7446 if (risc_size == 0 || risc_size == ~0)
7447 goto default_template;
7448
7449 dlen = (risc_size - 8) * sizeof(*fwcode);
7450 ql_dbg(ql_dbg_init, vha, 0x0173,
7451 "-> template allocating %x bytes...\n", dlen);
7452 ha->fw_dump_template = vmalloc(dlen);
7453 if (!ha->fw_dump_template) {
7454 ql_log(ql_log_warn, vha, 0x0174,
7455 "Failed fwdump template allocate %x bytes.\n", risc_size);
7456 goto default_template;
7457 }
7458
7459 fwcode += 7;
7460 risc_size -= 8;
7461 dcode = ha->fw_dump_template;
7462 for (i = 0; i < risc_size; i++)
7463 dcode[i] = le32_to_cpu(fwcode[i]);
7464
7465 if (!qla27xx_fwdt_template_valid(dcode)) {
7466 ql_log(ql_log_warn, vha, 0x0175,
7467 "Failed fwdump template validate\n");
7468 goto default_template;
7469 }
7470
7471 dlen = qla27xx_fwdt_template_size(dcode);
7472 ql_dbg(ql_dbg_init, vha, 0x0176,
7473 "-> template size %x bytes\n", dlen);
7474 if (dlen > risc_size * sizeof(*fwcode)) {
7475 ql_log(ql_log_warn, vha, 0x0177,
7476 "Failed fwdump template exceeds array by %zx bytes\n",
7477 (size_t)(dlen - risc_size * sizeof(*fwcode)));
7478 goto default_template;
7479 }
7480 ha->fw_dump_template_len = dlen;
7481 return rval;
7482
7483 default_template:
7484 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n");
7485 if (ha->fw_dump_template)
7486 vfree(ha->fw_dump_template);
7487 ha->fw_dump_template = NULL;
7488 ha->fw_dump_template_len = 0;
7489
7490 dlen = qla27xx_fwdt_template_default_size();
7491 ql_dbg(ql_dbg_init, vha, 0x0179,
7492 "-> template allocating %x bytes...\n", dlen);
7493 ha->fw_dump_template = vmalloc(dlen);
7494 if (!ha->fw_dump_template) {
7495 ql_log(ql_log_warn, vha, 0x017a,
7496 "Failed fwdump template allocate %x bytes.\n", risc_size);
7497 goto failed_template;
7498 }
7499
7500 dcode = ha->fw_dump_template;
7501 risc_size = dlen / sizeof(*fwcode);
7502 fwcode = qla27xx_fwdt_template_default();
7503 for (i = 0; i < risc_size; i++)
7504 dcode[i] = be32_to_cpu(fwcode[i]);
7505
7506 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7507 ql_log(ql_log_warn, vha, 0x017b,
7508 "Failed fwdump template validate\n");
7509 goto failed_template;
7510 }
7511
7512 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7513 ql_dbg(ql_dbg_init, vha, 0x017c,
7514 "-> template size %x bytes\n", dlen);
7515 ha->fw_dump_template_len = dlen;
7516 return rval;
7517
7518 failed_template:
7519 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n");
7520 if (ha->fw_dump_template)
7521 vfree(ha->fw_dump_template);
7522 ha->fw_dump_template = NULL;
7523 ha->fw_dump_template_len = 0;
7524 return rval;
7525 }
7526
7527 int
7528 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7529 {
7530 int rval;
7531
7532 if (ql2xfwloadbin == 1)
7533 return qla81xx_load_risc(vha, srisc_addr);
7534
7535 /*
7536 * FW Load priority:
7537 * 1) Firmware via request-firmware interface (.bin file).
7538 * 2) Firmware residing in flash.
7539 */
7540 rval = qla24xx_load_risc_blob(vha, srisc_addr);
7541 if (rval == QLA_SUCCESS)
7542 return rval;
7543
7544 return qla24xx_load_risc_flash(vha, srisc_addr,
7545 vha->hw->flt_region_fw);
7546 }
7547
7548 int
7549 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7550 {
7551 int rval;
7552 struct qla_hw_data *ha = vha->hw;
7553
7554 if (ql2xfwloadbin == 2)
7555 goto try_blob_fw;
7556
7557 /*
7558 * FW Load priority:
7559 * 1) Firmware residing in flash.
7560 * 2) Firmware via request-firmware interface (.bin file).
7561 * 3) Golden-Firmware residing in flash -- limited operation.
7562 */
7563 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
7564 if (rval == QLA_SUCCESS)
7565 return rval;
7566
7567 try_blob_fw:
7568 rval = qla24xx_load_risc_blob(vha, srisc_addr);
7569 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
7570 return rval;
7571
7572 ql_log(ql_log_info, vha, 0x0099,
7573 "Attempting to fallback to golden firmware.\n");
7574 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
7575 if (rval != QLA_SUCCESS)
7576 return rval;
7577
7578 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
7579 ha->flags.running_gold_fw = 1;
7580 return rval;
7581 }
7582
7583 void
7584 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
7585 {
7586 int ret, retries;
7587 struct qla_hw_data *ha = vha->hw;
7588
7589 if (ha->flags.pci_channel_io_perm_failure)
7590 return;
7591 if (!IS_FWI2_CAPABLE(ha))
7592 return;
7593 if (!ha->fw_major_version)
7594 return;
7595 if (!ha->flags.fw_started)
7596 return;
7597
7598 ret = qla2x00_stop_firmware(vha);
7599 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
7600 ret != QLA_INVALID_COMMAND && retries ; retries--) {
7601 ha->isp_ops->reset_chip(vha);
7602 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
7603 continue;
7604 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
7605 continue;
7606 ql_log(ql_log_info, vha, 0x8015,
7607 "Attempting retry of stop-firmware command.\n");
7608 ret = qla2x00_stop_firmware(vha);
7609 }
7610
7611 QLA_FW_STOPPED(ha);
7612 ha->flags.fw_init_done = 0;
7613 }
7614
7615 int
7616 qla24xx_configure_vhba(scsi_qla_host_t *vha)
7617 {
7618 int rval = QLA_SUCCESS;
7619 int rval2;
7620 uint16_t mb[MAILBOX_REGISTER_COUNT];
7621 struct qla_hw_data *ha = vha->hw;
7622 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7623 struct req_que *req;
7624 struct rsp_que *rsp;
7625
7626 if (!vha->vp_idx)
7627 return -EINVAL;
7628
7629 rval = qla2x00_fw_ready(base_vha);
7630 if (vha->qpair)
7631 req = vha->qpair->req;
7632 else
7633 req = ha->req_q_map[0];
7634 rsp = req->rsp;
7635
7636 if (rval == QLA_SUCCESS) {
7637 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7638 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
7639 }
7640
7641 vha->flags.management_server_logged_in = 0;
7642
7643 /* Login to SNS first */
7644 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
7645 BIT_1);
7646 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
7647 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
7648 ql_dbg(ql_dbg_init, vha, 0x0120,
7649 "Failed SNS login: loop_id=%x, rval2=%d\n",
7650 NPH_SNS, rval2);
7651 else
7652 ql_dbg(ql_dbg_init, vha, 0x0103,
7653 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
7654 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
7655 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
7656 return (QLA_FUNCTION_FAILED);
7657 }
7658
7659 atomic_set(&vha->loop_down_timer, 0);
7660 atomic_set(&vha->loop_state, LOOP_UP);
7661 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
7662 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
7663 rval = qla2x00_loop_resync(base_vha);
7664
7665 return rval;
7666 }
7667
7668 /* 84XX Support **************************************************************/
7669
7670 static LIST_HEAD(qla_cs84xx_list);
7671 static DEFINE_MUTEX(qla_cs84xx_mutex);
7672
7673 static struct qla_chip_state_84xx *
7674 qla84xx_get_chip(struct scsi_qla_host *vha)
7675 {
7676 struct qla_chip_state_84xx *cs84xx;
7677 struct qla_hw_data *ha = vha->hw;
7678
7679 mutex_lock(&qla_cs84xx_mutex);
7680
7681 /* Find any shared 84xx chip. */
7682 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
7683 if (cs84xx->bus == ha->pdev->bus) {
7684 kref_get(&cs84xx->kref);
7685 goto done;
7686 }
7687 }
7688
7689 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
7690 if (!cs84xx)
7691 goto done;
7692
7693 kref_init(&cs84xx->kref);
7694 spin_lock_init(&cs84xx->access_lock);
7695 mutex_init(&cs84xx->fw_update_mutex);
7696 cs84xx->bus = ha->pdev->bus;
7697
7698 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
7699 done:
7700 mutex_unlock(&qla_cs84xx_mutex);
7701 return cs84xx;
7702 }
7703
7704 static void
7705 __qla84xx_chip_release(struct kref *kref)
7706 {
7707 struct qla_chip_state_84xx *cs84xx =
7708 container_of(kref, struct qla_chip_state_84xx, kref);
7709
7710 mutex_lock(&qla_cs84xx_mutex);
7711 list_del(&cs84xx->list);
7712 mutex_unlock(&qla_cs84xx_mutex);
7713 kfree(cs84xx);
7714 }
7715
7716 void
7717 qla84xx_put_chip(struct scsi_qla_host *vha)
7718 {
7719 struct qla_hw_data *ha = vha->hw;
7720 if (ha->cs84xx)
7721 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
7722 }
7723
7724 static int
7725 qla84xx_init_chip(scsi_qla_host_t *vha)
7726 {
7727 int rval;
7728 uint16_t status[2];
7729 struct qla_hw_data *ha = vha->hw;
7730
7731 mutex_lock(&ha->cs84xx->fw_update_mutex);
7732
7733 rval = qla84xx_verify_chip(vha, status);
7734
7735 mutex_unlock(&ha->cs84xx->fw_update_mutex);
7736
7737 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
7738 QLA_SUCCESS;
7739 }
7740
7741 /* 81XX Support **************************************************************/
7742
7743 int
7744 qla81xx_nvram_config(scsi_qla_host_t *vha)
7745 {
7746 int rval;
7747 struct init_cb_81xx *icb;
7748 struct nvram_81xx *nv;
7749 uint32_t *dptr;
7750 uint8_t *dptr1, *dptr2;
7751 uint32_t chksum;
7752 uint16_t cnt;
7753 struct qla_hw_data *ha = vha->hw;
7754
7755 rval = QLA_SUCCESS;
7756 icb = (struct init_cb_81xx *)ha->init_cb;
7757 nv = ha->nvram;
7758
7759 /* Determine NVRAM starting address. */
7760 ha->nvram_size = sizeof(struct nvram_81xx);
7761 ha->vpd_size = FA_NVRAM_VPD_SIZE;
7762 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
7763 ha->vpd_size = FA_VPD_SIZE_82XX;
7764
7765 /* Get VPD data into cache */
7766 ha->vpd = ha->nvram + VPD_OFFSET;
7767 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
7768 ha->vpd_size);
7769
7770 /* Get NVRAM data into cache and calculate checksum. */
7771 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
7772 ha->nvram_size);
7773 dptr = (uint32_t *)nv;
7774 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7775 chksum += le32_to_cpu(*dptr);
7776
7777 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
7778 "Contents of NVRAM:\n");
7779 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
7780 (uint8_t *)nv, ha->nvram_size);
7781
7782 /* Bad NVRAM data, set defaults parameters. */
7783 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
7784 || nv->id[3] != ' ' ||
7785 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
7786 /* Reset NVRAM data. */
7787 ql_log(ql_log_info, vha, 0x0073,
7788 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7789 "version=0x%x.\n", chksum, nv->id[0],
7790 le16_to_cpu(nv->nvram_version));
7791 ql_log(ql_log_info, vha, 0x0074,
7792 "Falling back to functioning (yet invalid -- WWPN) "
7793 "defaults.\n");
7794
7795 /*
7796 * Set default initialization control block.
7797 */
7798 memset(nv, 0, ha->nvram_size);
7799 nv->nvram_version = cpu_to_le16(ICB_VERSION);
7800 nv->version = cpu_to_le16(ICB_VERSION);
7801 nv->frame_payload_size = 2048;
7802 nv->execution_throttle = cpu_to_le16(0xFFFF);
7803 nv->exchange_count = cpu_to_le16(0);
7804 nv->port_name[0] = 0x21;
7805 nv->port_name[1] = 0x00 + ha->port_no + 1;
7806 nv->port_name[2] = 0x00;
7807 nv->port_name[3] = 0xe0;
7808 nv->port_name[4] = 0x8b;
7809 nv->port_name[5] = 0x1c;
7810 nv->port_name[6] = 0x55;
7811 nv->port_name[7] = 0x86;
7812 nv->node_name[0] = 0x20;
7813 nv->node_name[1] = 0x00;
7814 nv->node_name[2] = 0x00;
7815 nv->node_name[3] = 0xe0;
7816 nv->node_name[4] = 0x8b;
7817 nv->node_name[5] = 0x1c;
7818 nv->node_name[6] = 0x55;
7819 nv->node_name[7] = 0x86;
7820 nv->login_retry_count = cpu_to_le16(8);
7821 nv->interrupt_delay_timer = cpu_to_le16(0);
7822 nv->login_timeout = cpu_to_le16(0);
7823 nv->firmware_options_1 =
7824 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7825 nv->firmware_options_2 = cpu_to_le32(2 << 4);
7826 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7827 nv->firmware_options_3 = cpu_to_le32(2 << 13);
7828 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7829 nv->efi_parameters = cpu_to_le32(0);
7830 nv->reset_delay = 5;
7831 nv->max_luns_per_target = cpu_to_le16(128);
7832 nv->port_down_retry_count = cpu_to_le16(30);
7833 nv->link_down_timeout = cpu_to_le16(180);
7834 nv->enode_mac[0] = 0x00;
7835 nv->enode_mac[1] = 0xC0;
7836 nv->enode_mac[2] = 0xDD;
7837 nv->enode_mac[3] = 0x04;
7838 nv->enode_mac[4] = 0x05;
7839 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
7840
7841 rval = 1;
7842 }
7843
7844 if (IS_T10_PI_CAPABLE(ha))
7845 nv->frame_payload_size &= ~7;
7846
7847 qlt_81xx_config_nvram_stage1(vha, nv);
7848
7849 /* Reset Initialization control block */
7850 memset(icb, 0, ha->init_cb_size);
7851
7852 /* Copy 1st segment. */
7853 dptr1 = (uint8_t *)icb;
7854 dptr2 = (uint8_t *)&nv->version;
7855 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7856 while (cnt--)
7857 *dptr1++ = *dptr2++;
7858
7859 icb->login_retry_count = nv->login_retry_count;
7860
7861 /* Copy 2nd segment. */
7862 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7863 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7864 cnt = (uint8_t *)&icb->reserved_5 -
7865 (uint8_t *)&icb->interrupt_delay_timer;
7866 while (cnt--)
7867 *dptr1++ = *dptr2++;
7868
7869 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
7870 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
7871 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
7872 icb->enode_mac[0] = 0x00;
7873 icb->enode_mac[1] = 0xC0;
7874 icb->enode_mac[2] = 0xDD;
7875 icb->enode_mac[3] = 0x04;
7876 icb->enode_mac[4] = 0x05;
7877 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
7878 }
7879
7880 /* Use extended-initialization control block. */
7881 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
7882
7883 /*
7884 * Setup driver NVRAM options.
7885 */
7886 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
7887 "QLE8XXX");
7888
7889 qlt_81xx_config_nvram_stage2(vha, icb);
7890
7891 /* Use alternate WWN? */
7892 if (nv->host_p & cpu_to_le32(BIT_15)) {
7893 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7894 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7895 }
7896
7897 /* Prepare nodename */
7898 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
7899 /*
7900 * Firmware will apply the following mask if the nodename was
7901 * not provided.
7902 */
7903 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7904 icb->node_name[0] &= 0xF0;
7905 }
7906
7907 /* Set host adapter parameters. */
7908 ha->flags.disable_risc_code_load = 0;
7909 ha->flags.enable_lip_reset = 0;
7910 ha->flags.enable_lip_full_login =
7911 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
7912 ha->flags.enable_target_reset =
7913 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
7914 ha->flags.enable_led_scheme = 0;
7915 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
7916
7917 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7918 (BIT_6 | BIT_5 | BIT_4)) >> 4;
7919
7920 /* save HBA serial number */
7921 ha->serial0 = icb->port_name[5];
7922 ha->serial1 = icb->port_name[6];
7923 ha->serial2 = icb->port_name[7];
7924 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7925 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
7926
7927 icb->execution_throttle = cpu_to_le16(0xFFFF);
7928
7929 ha->retry_count = le16_to_cpu(nv->login_retry_count);
7930
7931 /* Set minimum login_timeout to 4 seconds. */
7932 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7933 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7934 if (le16_to_cpu(nv->login_timeout) < 4)
7935 nv->login_timeout = cpu_to_le16(4);
7936 ha->login_timeout = le16_to_cpu(nv->login_timeout);
7937
7938 /* Set minimum RATOV to 100 tenths of a second. */
7939 ha->r_a_tov = 100;
7940
7941 ha->loop_reset_delay = nv->reset_delay;
7942
7943 /* Link Down Timeout = 0:
7944 *
7945 * When Port Down timer expires we will start returning
7946 * I/O's to OS with "DID_NO_CONNECT".
7947 *
7948 * Link Down Timeout != 0:
7949 *
7950 * The driver waits for the link to come up after link down
7951 * before returning I/Os to OS with "DID_NO_CONNECT".
7952 */
7953 if (le16_to_cpu(nv->link_down_timeout) == 0) {
7954 ha->loop_down_abort_time =
7955 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7956 } else {
7957 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
7958 ha->loop_down_abort_time =
7959 (LOOP_DOWN_TIME - ha->link_down_timeout);
7960 }
7961
7962 /* Need enough time to try and get the port back. */
7963 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7964 if (qlport_down_retry)
7965 ha->port_down_retry_count = qlport_down_retry;
7966
7967 /* Set login_retry_count */
7968 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
7969 if (ha->port_down_retry_count ==
7970 le16_to_cpu(nv->port_down_retry_count) &&
7971 ha->port_down_retry_count > 3)
7972 ha->login_retry_count = ha->port_down_retry_count;
7973 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7974 ha->login_retry_count = ha->port_down_retry_count;
7975 if (ql2xloginretrycount)
7976 ha->login_retry_count = ql2xloginretrycount;
7977
7978 /* if not running MSI-X we need handshaking on interrupts */
7979 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha)))
7980 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
7981
7982 /* Enable ZIO. */
7983 if (!vha->flags.init_done) {
7984 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7985 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7986 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7987 le16_to_cpu(icb->interrupt_delay_timer): 2;
7988 }
7989 icb->firmware_options_2 &= cpu_to_le32(
7990 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
7991 vha->flags.process_response_queue = 0;
7992 if (ha->zio_mode != QLA_ZIO_DISABLED) {
7993 ha->zio_mode = QLA_ZIO_MODE_6;
7994
7995 ql_log(ql_log_info, vha, 0x0075,
7996 "ZIO mode %d enabled; timer delay (%d us).\n",
7997 ha->zio_mode,
7998 ha->zio_timer * 100);
7999
8000 icb->firmware_options_2 |= cpu_to_le32(
8001 (uint32_t)ha->zio_mode);
8002 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8003 vha->flags.process_response_queue = 1;
8004 }
8005
8006 /* enable RIDA Format2 */
8007 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha))
8008 icb->firmware_options_3 |= BIT_0;
8009
8010 if (IS_QLA27XX(ha)) {
8011 icb->firmware_options_3 |= BIT_8;
8012 ql_dbg(ql_log_info, vha, 0x0075,
8013 "Enabling direct connection.\n");
8014 }
8015
8016 if (rval) {
8017 ql_log(ql_log_warn, vha, 0x0076,
8018 "NVRAM configuration failed.\n");
8019 }
8020 return (rval);
8021 }
8022
8023 int
8024 qla82xx_restart_isp(scsi_qla_host_t *vha)
8025 {
8026 int status, rval;
8027 struct qla_hw_data *ha = vha->hw;
8028 struct req_que *req = ha->req_q_map[0];
8029 struct rsp_que *rsp = ha->rsp_q_map[0];
8030 struct scsi_qla_host *vp;
8031 unsigned long flags;
8032
8033 status = qla2x00_init_rings(vha);
8034 if (!status) {
8035 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8036 ha->flags.chip_reset_done = 1;
8037
8038 status = qla2x00_fw_ready(vha);
8039 if (!status) {
8040 /* Issue a marker after FW becomes ready. */
8041 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
8042 vha->flags.online = 1;
8043 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8044 }
8045
8046 /* if no cable then assume it's good */
8047 if ((vha->device_flags & DFLG_NO_CABLE))
8048 status = 0;
8049 }
8050
8051 if (!status) {
8052 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8053
8054 if (!atomic_read(&vha->loop_down_timer)) {
8055 /*
8056 * Issue marker command only when we are going
8057 * to start the I/O .
8058 */
8059 vha->marker_needed = 1;
8060 }
8061
8062 ha->isp_ops->enable_intrs(ha);
8063
8064 ha->isp_abort_cnt = 0;
8065 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
8066
8067 /* Update the firmware version */
8068 status = qla82xx_check_md_needed(vha);
8069
8070 if (ha->fce) {
8071 ha->flags.fce_enabled = 1;
8072 memset(ha->fce, 0,
8073 fce_calc_size(ha->fce_bufs));
8074 rval = qla2x00_enable_fce_trace(vha,
8075 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
8076 &ha->fce_bufs);
8077 if (rval) {
8078 ql_log(ql_log_warn, vha, 0x8001,
8079 "Unable to reinitialize FCE (%d).\n",
8080 rval);
8081 ha->flags.fce_enabled = 0;
8082 }
8083 }
8084
8085 if (ha->eft) {
8086 memset(ha->eft, 0, EFT_SIZE);
8087 rval = qla2x00_enable_eft_trace(vha,
8088 ha->eft_dma, EFT_NUM_BUFFERS);
8089 if (rval) {
8090 ql_log(ql_log_warn, vha, 0x8010,
8091 "Unable to reinitialize EFT (%d).\n",
8092 rval);
8093 }
8094 }
8095 }
8096
8097 if (!status) {
8098 ql_dbg(ql_dbg_taskm, vha, 0x8011,
8099 "qla82xx_restart_isp succeeded.\n");
8100
8101 spin_lock_irqsave(&ha->vport_slock, flags);
8102 list_for_each_entry(vp, &ha->vp_list, list) {
8103 if (vp->vp_idx) {
8104 atomic_inc(&vp->vref_count);
8105 spin_unlock_irqrestore(&ha->vport_slock, flags);
8106
8107 qla2x00_vp_abort_isp(vp);
8108
8109 spin_lock_irqsave(&ha->vport_slock, flags);
8110 atomic_dec(&vp->vref_count);
8111 }
8112 }
8113 spin_unlock_irqrestore(&ha->vport_slock, flags);
8114
8115 } else {
8116 ql_log(ql_log_warn, vha, 0x8016,
8117 "qla82xx_restart_isp **** FAILED ****.\n");
8118 }
8119
8120 return status;
8121 }
8122
8123 void
8124 qla81xx_update_fw_options(scsi_qla_host_t *vha)
8125 {
8126 struct qla_hw_data *ha = vha->hw;
8127
8128 /* Hold status IOCBs until ABTS response received. */
8129 if (ql2xfwholdabts)
8130 ha->fw_options[3] |= BIT_12;
8131
8132 /* Set Retry FLOGI in case of P2P connection */
8133 if (ha->operating_mode == P2P) {
8134 ha->fw_options[2] |= BIT_3;
8135 ql_dbg(ql_dbg_disc, vha, 0x2103,
8136 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
8137 __func__, ha->fw_options[2]);
8138 }
8139
8140 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
8141 if (ql2xmvasynctoatio) {
8142 if (qla_tgt_mode_enabled(vha) ||
8143 qla_dual_mode_enabled(vha))
8144 ha->fw_options[2] |= BIT_11;
8145 else
8146 ha->fw_options[2] &= ~BIT_11;
8147 }
8148
8149 if (qla_tgt_mode_enabled(vha) ||
8150 qla_dual_mode_enabled(vha)) {
8151 /* FW auto send SCSI status during */
8152 ha->fw_options[1] |= BIT_8;
8153 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8;
8154
8155 /* FW perform Exchange validation */
8156 ha->fw_options[2] |= BIT_4;
8157 } else {
8158 ha->fw_options[1] &= ~BIT_8;
8159 ha->fw_options[10] &= 0x00ff;
8160
8161 ha->fw_options[2] &= ~BIT_4;
8162 }
8163
8164 if (ql2xetsenable) {
8165 /* Enable ETS Burst. */
8166 memset(ha->fw_options, 0, sizeof(ha->fw_options));
8167 ha->fw_options[2] |= BIT_9;
8168 }
8169
8170 ql_dbg(ql_dbg_init, vha, 0x00e9,
8171 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
8172 __func__, ha->fw_options[1], ha->fw_options[2],
8173 ha->fw_options[3], vha->host->active_mode);
8174
8175 qla2x00_set_fw_options(vha, ha->fw_options);
8176 }
8177
8178 /*
8179 * qla24xx_get_fcp_prio
8180 * Gets the fcp cmd priority value for the logged in port.
8181 * Looks for a match of the port descriptors within
8182 * each of the fcp prio config entries. If a match is found,
8183 * the tag (priority) value is returned.
8184 *
8185 * Input:
8186 * vha = scsi host structure pointer.
8187 * fcport = port structure pointer.
8188 *
8189 * Return:
8190 * non-zero (if found)
8191 * -1 (if not found)
8192 *
8193 * Context:
8194 * Kernel context
8195 */
8196 static int
8197 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8198 {
8199 int i, entries;
8200 uint8_t pid_match, wwn_match;
8201 int priority;
8202 uint32_t pid1, pid2;
8203 uint64_t wwn1, wwn2;
8204 struct qla_fcp_prio_entry *pri_entry;
8205 struct qla_hw_data *ha = vha->hw;
8206
8207 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
8208 return -1;
8209
8210 priority = -1;
8211 entries = ha->fcp_prio_cfg->num_entries;
8212 pri_entry = &ha->fcp_prio_cfg->entry[0];
8213
8214 for (i = 0; i < entries; i++) {
8215 pid_match = wwn_match = 0;
8216
8217 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
8218 pri_entry++;
8219 continue;
8220 }
8221
8222 /* check source pid for a match */
8223 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
8224 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
8225 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
8226 if (pid1 == INVALID_PORT_ID)
8227 pid_match++;
8228 else if (pid1 == pid2)
8229 pid_match++;
8230 }
8231
8232 /* check destination pid for a match */
8233 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
8234 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
8235 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
8236 if (pid1 == INVALID_PORT_ID)
8237 pid_match++;
8238 else if (pid1 == pid2)
8239 pid_match++;
8240 }
8241
8242 /* check source WWN for a match */
8243 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
8244 wwn1 = wwn_to_u64(vha->port_name);
8245 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
8246 if (wwn2 == (uint64_t)-1)
8247 wwn_match++;
8248 else if (wwn1 == wwn2)
8249 wwn_match++;
8250 }
8251
8252 /* check destination WWN for a match */
8253 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
8254 wwn1 = wwn_to_u64(fcport->port_name);
8255 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
8256 if (wwn2 == (uint64_t)-1)
8257 wwn_match++;
8258 else if (wwn1 == wwn2)
8259 wwn_match++;
8260 }
8261
8262 if (pid_match == 2 || wwn_match == 2) {
8263 /* Found a matching entry */
8264 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
8265 priority = pri_entry->tag;
8266 break;
8267 }
8268
8269 pri_entry++;
8270 }
8271
8272 return priority;
8273 }
8274
8275 /*
8276 * qla24xx_update_fcport_fcp_prio
8277 * Activates fcp priority for the logged in fc port
8278 *
8279 * Input:
8280 * vha = scsi host structure pointer.
8281 * fcp = port structure pointer.
8282 *
8283 * Return:
8284 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8285 *
8286 * Context:
8287 * Kernel context.
8288 */
8289 int
8290 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8291 {
8292 int ret;
8293 int priority;
8294 uint16_t mb[5];
8295
8296 if (fcport->port_type != FCT_TARGET ||
8297 fcport->loop_id == FC_NO_LOOP_ID)
8298 return QLA_FUNCTION_FAILED;
8299
8300 priority = qla24xx_get_fcp_prio(vha, fcport);
8301 if (priority < 0)
8302 return QLA_FUNCTION_FAILED;
8303
8304 if (IS_P3P_TYPE(vha->hw)) {
8305 fcport->fcp_prio = priority & 0xf;
8306 return QLA_SUCCESS;
8307 }
8308
8309 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
8310 if (ret == QLA_SUCCESS) {
8311 if (fcport->fcp_prio != priority)
8312 ql_dbg(ql_dbg_user, vha, 0x709e,
8313 "Updated FCP_CMND priority - value=%d loop_id=%d "
8314 "port_id=%02x%02x%02x.\n", priority,
8315 fcport->loop_id, fcport->d_id.b.domain,
8316 fcport->d_id.b.area, fcport->d_id.b.al_pa);
8317 fcport->fcp_prio = priority & 0xf;
8318 } else
8319 ql_dbg(ql_dbg_user, vha, 0x704f,
8320 "Unable to update FCP_CMND priority - ret=0x%x for "
8321 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
8322 fcport->d_id.b.domain, fcport->d_id.b.area,
8323 fcport->d_id.b.al_pa);
8324 return ret;
8325 }
8326
8327 /*
8328 * qla24xx_update_all_fcp_prio
8329 * Activates fcp priority for all the logged in ports
8330 *
8331 * Input:
8332 * ha = adapter block pointer.
8333 *
8334 * Return:
8335 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8336 *
8337 * Context:
8338 * Kernel context.
8339 */
8340 int
8341 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
8342 {
8343 int ret;
8344 fc_port_t *fcport;
8345
8346 ret = QLA_FUNCTION_FAILED;
8347 /* We need to set priority for all logged in ports */
8348 list_for_each_entry(fcport, &vha->vp_fcports, list)
8349 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
8350
8351 return ret;
8352 }
8353
8354 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
8355 int vp_idx, bool startqp)
8356 {
8357 int rsp_id = 0;
8358 int req_id = 0;
8359 int i;
8360 struct qla_hw_data *ha = vha->hw;
8361 uint16_t qpair_id = 0;
8362 struct qla_qpair *qpair = NULL;
8363 struct qla_msix_entry *msix;
8364
8365 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
8366 ql_log(ql_log_warn, vha, 0x00181,
8367 "FW/Driver is not multi-queue capable.\n");
8368 return NULL;
8369 }
8370
8371 if (ql2xmqsupport || ql2xnvmeenable) {
8372 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
8373 if (qpair == NULL) {
8374 ql_log(ql_log_warn, vha, 0x0182,
8375 "Failed to allocate memory for queue pair.\n");
8376 return NULL;
8377 }
8378 memset(qpair, 0, sizeof(struct qla_qpair));
8379
8380 qpair->hw = vha->hw;
8381 qpair->vha = vha;
8382 qpair->qp_lock_ptr = &qpair->qp_lock;
8383 spin_lock_init(&qpair->qp_lock);
8384 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
8385
8386 /* Assign available que pair id */
8387 mutex_lock(&ha->mq_lock);
8388 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
8389 if (ha->num_qpairs >= ha->max_qpairs) {
8390 mutex_unlock(&ha->mq_lock);
8391 ql_log(ql_log_warn, vha, 0x0183,
8392 "No resources to create additional q pair.\n");
8393 goto fail_qid_map;
8394 }
8395 ha->num_qpairs++;
8396 set_bit(qpair_id, ha->qpair_qid_map);
8397 ha->queue_pair_map[qpair_id] = qpair;
8398 qpair->id = qpair_id;
8399 qpair->vp_idx = vp_idx;
8400 qpair->fw_started = ha->flags.fw_started;
8401 INIT_LIST_HEAD(&qpair->hints_list);
8402 INIT_LIST_HEAD(&qpair->nvme_done_list);
8403 qpair->chip_reset = ha->base_qpair->chip_reset;
8404 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
8405 qpair->enable_explicit_conf =
8406 ha->base_qpair->enable_explicit_conf;
8407
8408 for (i = 0; i < ha->msix_count; i++) {
8409 msix = &ha->msix_entries[i];
8410 if (msix->in_use)
8411 continue;
8412 qpair->msix = msix;
8413 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
8414 "Vector %x selected for qpair\n", msix->vector);
8415 break;
8416 }
8417 if (!qpair->msix) {
8418 ql_log(ql_log_warn, vha, 0x0184,
8419 "Out of MSI-X vectors!.\n");
8420 goto fail_msix;
8421 }
8422
8423 qpair->msix->in_use = 1;
8424 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
8425 qpair->pdev = ha->pdev;
8426 if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
8427 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
8428
8429 mutex_unlock(&ha->mq_lock);
8430
8431 /* Create response queue first */
8432 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
8433 if (!rsp_id) {
8434 ql_log(ql_log_warn, vha, 0x0185,
8435 "Failed to create response queue.\n");
8436 goto fail_rsp;
8437 }
8438
8439 qpair->rsp = ha->rsp_q_map[rsp_id];
8440
8441 /* Create request queue */
8442 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
8443 startqp);
8444 if (!req_id) {
8445 ql_log(ql_log_warn, vha, 0x0186,
8446 "Failed to create request queue.\n");
8447 goto fail_req;
8448 }
8449
8450 qpair->req = ha->req_q_map[req_id];
8451 qpair->rsp->req = qpair->req;
8452 qpair->rsp->qpair = qpair;
8453 /* init qpair to this cpu. Will adjust at run time. */
8454 qla_cpu_update(qpair, smp_processor_id());
8455
8456 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
8457 if (ha->fw_attributes & BIT_4)
8458 qpair->difdix_supported = 1;
8459 }
8460
8461 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
8462 if (!qpair->srb_mempool) {
8463 ql_log(ql_log_warn, vha, 0xd036,
8464 "Failed to create srb mempool for qpair %d\n",
8465 qpair->id);
8466 goto fail_mempool;
8467 }
8468
8469 /* Mark as online */
8470 qpair->online = 1;
8471
8472 if (!vha->flags.qpairs_available)
8473 vha->flags.qpairs_available = 1;
8474
8475 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
8476 "Request/Response queue pair created, id %d\n",
8477 qpair->id);
8478 ql_dbg(ql_dbg_init, vha, 0x0187,
8479 "Request/Response queue pair created, id %d\n",
8480 qpair->id);
8481 }
8482 return qpair;
8483
8484 fail_mempool:
8485 fail_req:
8486 qla25xx_delete_rsp_que(vha, qpair->rsp);
8487 fail_rsp:
8488 mutex_lock(&ha->mq_lock);
8489 qpair->msix->in_use = 0;
8490 list_del(&qpair->qp_list_elem);
8491 if (list_empty(&vha->qp_list))
8492 vha->flags.qpairs_available = 0;
8493 fail_msix:
8494 ha->queue_pair_map[qpair_id] = NULL;
8495 clear_bit(qpair_id, ha->qpair_qid_map);
8496 ha->num_qpairs--;
8497 mutex_unlock(&ha->mq_lock);
8498 fail_qid_map:
8499 kfree(qpair);
8500 return NULL;
8501 }
8502
8503 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
8504 {
8505 int ret = QLA_FUNCTION_FAILED;
8506 struct qla_hw_data *ha = qpair->hw;
8507
8508 qpair->delete_in_progress = 1;
8509 while (atomic_read(&qpair->ref_count))
8510 msleep(500);
8511
8512 ret = qla25xx_delete_req_que(vha, qpair->req);
8513 if (ret != QLA_SUCCESS)
8514 goto fail;
8515
8516 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
8517 if (ret != QLA_SUCCESS)
8518 goto fail;
8519
8520 mutex_lock(&ha->mq_lock);
8521 ha->queue_pair_map[qpair->id] = NULL;
8522 clear_bit(qpair->id, ha->qpair_qid_map);
8523 ha->num_qpairs--;
8524 list_del(&qpair->qp_list_elem);
8525 if (list_empty(&vha->qp_list)) {
8526 vha->flags.qpairs_available = 0;
8527 vha->flags.qpairs_req_created = 0;
8528 vha->flags.qpairs_rsp_created = 0;
8529 }
8530 mempool_destroy(qpair->srb_mempool);
8531 kfree(qpair);
8532 mutex_unlock(&ha->mq_lock);
8533
8534 return QLA_SUCCESS;
8535 fail:
8536 return ret;
8537 }
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