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[mirror_ubuntu-artful-kernel.git] / drivers / scsi / qla2xxx / qla_mr.c
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2013 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include <linux/delay.h>
9 #include <linux/pci.h>
10 #include <linux/ratelimit.h>
11 #include <linux/vmalloc.h>
12 #include <scsi/scsi_tcq.h>
13 #include <linux/utsname.h>
14
15
16 /* QLAFX00 specific Mailbox implementation functions */
17
18 /*
19 * qlafx00_mailbox_command
20 * Issue mailbox command and waits for completion.
21 *
22 * Input:
23 * ha = adapter block pointer.
24 * mcp = driver internal mbx struct pointer.
25 *
26 * Output:
27 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
28 *
29 * Returns:
30 * 0 : QLA_SUCCESS = cmd performed success
31 * 1 : QLA_FUNCTION_FAILED (error encountered)
32 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
33 *
34 * Context:
35 * Kernel context.
36 */
37 static int
38 qlafx00_mailbox_command(scsi_qla_host_t *vha, struct mbx_cmd_32 *mcp)
39
40 {
41 int rval;
42 unsigned long flags = 0;
43 device_reg_t __iomem *reg;
44 uint8_t abort_active;
45 uint8_t io_lock_on;
46 uint16_t command = 0;
47 uint32_t *iptr;
48 uint32_t __iomem *optr;
49 uint32_t cnt;
50 uint32_t mboxes;
51 unsigned long wait_time;
52 struct qla_hw_data *ha = vha->hw;
53 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
54
55 if (ha->pdev->error_state > pci_channel_io_frozen) {
56 ql_log(ql_log_warn, vha, 0x115c,
57 "error_state is greater than pci_channel_io_frozen, "
58 "exiting.\n");
59 return QLA_FUNCTION_TIMEOUT;
60 }
61
62 if (vha->device_flags & DFLG_DEV_FAILED) {
63 ql_log(ql_log_warn, vha, 0x115f,
64 "Device in failed state, exiting.\n");
65 return QLA_FUNCTION_TIMEOUT;
66 }
67
68 reg = ha->iobase;
69 io_lock_on = base_vha->flags.init_done;
70
71 rval = QLA_SUCCESS;
72 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
73
74 if (ha->flags.pci_channel_io_perm_failure) {
75 ql_log(ql_log_warn, vha, 0x1175,
76 "Perm failure on EEH timeout MBX, exiting.\n");
77 return QLA_FUNCTION_TIMEOUT;
78 }
79
80 if (ha->flags.isp82xx_fw_hung) {
81 /* Setting Link-Down error */
82 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
83 ql_log(ql_log_warn, vha, 0x1176,
84 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
85 rval = QLA_FUNCTION_FAILED;
86 goto premature_exit;
87 }
88
89 /*
90 * Wait for active mailbox commands to finish by waiting at most tov
91 * seconds. This is to serialize actual issuing of mailbox cmds during
92 * non ISP abort time.
93 */
94 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
95 /* Timeout occurred. Return error. */
96 ql_log(ql_log_warn, vha, 0x1177,
97 "Cmd access timeout, cmd=0x%x, Exiting.\n",
98 mcp->mb[0]);
99 return QLA_FUNCTION_TIMEOUT;
100 }
101
102 ha->flags.mbox_busy = 1;
103 /* Save mailbox command for debug */
104 ha->mcp32 = mcp;
105
106 ql_dbg(ql_dbg_mbx, vha, 0x1178,
107 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
108
109 spin_lock_irqsave(&ha->hardware_lock, flags);
110
111 /* Load mailbox registers. */
112 optr = (uint32_t __iomem *)&reg->ispfx00.mailbox0;
113
114 iptr = mcp->mb;
115 command = mcp->mb[0];
116 mboxes = mcp->out_mb;
117
118 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
119 if (mboxes & BIT_0)
120 WRT_REG_DWORD(optr, *iptr);
121
122 mboxes >>= 1;
123 optr++;
124 iptr++;
125 }
126
127 /* Issue set host interrupt command to send cmd out. */
128 ha->flags.mbox_int = 0;
129 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
130
131 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1172,
132 (uint8_t *)mcp->mb, 16);
133 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1173,
134 ((uint8_t *)mcp->mb + 0x10), 16);
135 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1174,
136 ((uint8_t *)mcp->mb + 0x20), 8);
137
138 /* Unlock mbx registers and wait for interrupt */
139 ql_dbg(ql_dbg_mbx, vha, 0x1179,
140 "Going to unlock irq & waiting for interrupts. "
141 "jiffies=%lx.\n", jiffies);
142
143 /* Wait for mbx cmd completion until timeout */
144 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
145 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
146
147 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
148 spin_unlock_irqrestore(&ha->hardware_lock, flags);
149
150 wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
151 } else {
152 ql_dbg(ql_dbg_mbx, vha, 0x112c,
153 "Cmd=%x Polling Mode.\n", command);
154
155 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
156 spin_unlock_irqrestore(&ha->hardware_lock, flags);
157
158 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
159 while (!ha->flags.mbox_int) {
160 if (time_after(jiffies, wait_time))
161 break;
162
163 /* Check for pending interrupts. */
164 qla2x00_poll(ha->rsp_q_map[0]);
165
166 if (!ha->flags.mbox_int &&
167 !(IS_QLA2200(ha) &&
168 command == MBC_LOAD_RISC_RAM_EXTENDED))
169 usleep_range(10000, 11000);
170 } /* while */
171 ql_dbg(ql_dbg_mbx, vha, 0x112d,
172 "Waited %d sec.\n",
173 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
174 }
175
176 /* Check whether we timed out */
177 if (ha->flags.mbox_int) {
178 uint32_t *iptr2;
179
180 ql_dbg(ql_dbg_mbx, vha, 0x112e,
181 "Cmd=%x completed.\n", command);
182
183 /* Got interrupt. Clear the flag. */
184 ha->flags.mbox_int = 0;
185 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
186
187 if (ha->mailbox_out32[0] != MBS_COMMAND_COMPLETE)
188 rval = QLA_FUNCTION_FAILED;
189
190 /* Load return mailbox registers. */
191 iptr2 = mcp->mb;
192 iptr = (uint32_t *)&ha->mailbox_out32[0];
193 mboxes = mcp->in_mb;
194 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
195 if (mboxes & BIT_0)
196 *iptr2 = *iptr;
197
198 mboxes >>= 1;
199 iptr2++;
200 iptr++;
201 }
202 } else {
203
204 rval = QLA_FUNCTION_TIMEOUT;
205 }
206
207 ha->flags.mbox_busy = 0;
208
209 /* Clean up */
210 ha->mcp32 = NULL;
211
212 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
213 ql_dbg(ql_dbg_mbx, vha, 0x113a,
214 "checking for additional resp interrupt.\n");
215
216 /* polling mode for non isp_abort commands. */
217 qla2x00_poll(ha->rsp_q_map[0]);
218 }
219
220 if (rval == QLA_FUNCTION_TIMEOUT &&
221 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
222 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
223 ha->flags.eeh_busy) {
224 /* not in dpc. schedule it for dpc to take over. */
225 ql_dbg(ql_dbg_mbx, vha, 0x115d,
226 "Timeout, schedule isp_abort_needed.\n");
227
228 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
229 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
230 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
231
232 ql_log(ql_log_info, base_vha, 0x115e,
233 "Mailbox cmd timeout occurred, cmd=0x%x, "
234 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
235 "abort.\n", command, mcp->mb[0],
236 ha->flags.eeh_busy);
237 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
238 qla2xxx_wake_dpc(vha);
239 }
240 } else if (!abort_active) {
241 /* call abort directly since we are in the DPC thread */
242 ql_dbg(ql_dbg_mbx, vha, 0x1160,
243 "Timeout, calling abort_isp.\n");
244
245 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
246 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
247 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
248
249 ql_log(ql_log_info, base_vha, 0x1161,
250 "Mailbox cmd timeout occurred, cmd=0x%x, "
251 "mb[0]=0x%x. Scheduling ISP abort ",
252 command, mcp->mb[0]);
253
254 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
255 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
256 if (ha->isp_ops->abort_isp(vha)) {
257 /* Failed. retry later. */
258 set_bit(ISP_ABORT_NEEDED,
259 &vha->dpc_flags);
260 }
261 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
262 ql_dbg(ql_dbg_mbx, vha, 0x1162,
263 "Finished abort_isp.\n");
264 }
265 }
266 }
267
268 premature_exit:
269 /* Allow next mbx cmd to come in. */
270 complete(&ha->mbx_cmd_comp);
271
272 if (rval) {
273 ql_log(ql_log_warn, base_vha, 0x1163,
274 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, "
275 "mb[3]=%x, cmd=%x ****.\n",
276 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
277 } else {
278 ql_dbg(ql_dbg_mbx, base_vha, 0x1164, "Done %s.\n", __func__);
279 }
280
281 return rval;
282 }
283
284 /*
285 * qlafx00_driver_shutdown
286 * Indicate a driver shutdown to firmware.
287 *
288 * Input:
289 * ha = adapter block pointer.
290 *
291 * Returns:
292 * local function return status code.
293 *
294 * Context:
295 * Kernel context.
296 */
297 int
298 qlafx00_driver_shutdown(scsi_qla_host_t *vha, int tmo)
299 {
300 int rval;
301 struct mbx_cmd_32 mc;
302 struct mbx_cmd_32 *mcp = &mc;
303
304 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1166,
305 "Entered %s.\n", __func__);
306
307 mcp->mb[0] = MBC_MR_DRV_SHUTDOWN;
308 mcp->out_mb = MBX_0;
309 mcp->in_mb = MBX_0;
310 if (tmo)
311 mcp->tov = tmo;
312 else
313 mcp->tov = MBX_TOV_SECONDS;
314 mcp->flags = 0;
315 rval = qlafx00_mailbox_command(vha, mcp);
316
317 if (rval != QLA_SUCCESS) {
318 ql_dbg(ql_dbg_mbx, vha, 0x1167,
319 "Failed=%x.\n", rval);
320 } else {
321 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1168,
322 "Done %s.\n", __func__);
323 }
324
325 return rval;
326 }
327
328 /*
329 * qlafx00_get_firmware_state
330 * Get adapter firmware state.
331 *
332 * Input:
333 * ha = adapter block pointer.
334 * TARGET_QUEUE_LOCK must be released.
335 * ADAPTER_STATE_LOCK must be released.
336 *
337 * Returns:
338 * qla7xxx local function return status code.
339 *
340 * Context:
341 * Kernel context.
342 */
343 static int
344 qlafx00_get_firmware_state(scsi_qla_host_t *vha, uint32_t *states)
345 {
346 int rval;
347 struct mbx_cmd_32 mc;
348 struct mbx_cmd_32 *mcp = &mc;
349
350 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1169,
351 "Entered %s.\n", __func__);
352
353 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
354 mcp->out_mb = MBX_0;
355 mcp->in_mb = MBX_1|MBX_0;
356 mcp->tov = MBX_TOV_SECONDS;
357 mcp->flags = 0;
358 rval = qlafx00_mailbox_command(vha, mcp);
359
360 /* Return firmware states. */
361 states[0] = mcp->mb[1];
362
363 if (rval != QLA_SUCCESS) {
364 ql_dbg(ql_dbg_mbx, vha, 0x116a,
365 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
366 } else {
367 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116b,
368 "Done %s.\n", __func__);
369 }
370 return rval;
371 }
372
373 /*
374 * qlafx00_init_firmware
375 * Initialize adapter firmware.
376 *
377 * Input:
378 * ha = adapter block pointer.
379 * dptr = Initialization control block pointer.
380 * size = size of initialization control block.
381 * TARGET_QUEUE_LOCK must be released.
382 * ADAPTER_STATE_LOCK must be released.
383 *
384 * Returns:
385 * qlafx00 local function return status code.
386 *
387 * Context:
388 * Kernel context.
389 */
390 int
391 qlafx00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
392 {
393 int rval;
394 struct mbx_cmd_32 mc;
395 struct mbx_cmd_32 *mcp = &mc;
396 struct qla_hw_data *ha = vha->hw;
397
398 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116c,
399 "Entered %s.\n", __func__);
400
401 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
402
403 mcp->mb[1] = 0;
404 mcp->mb[2] = MSD(ha->init_cb_dma);
405 mcp->mb[3] = LSD(ha->init_cb_dma);
406
407 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
408 mcp->in_mb = MBX_0;
409 mcp->buf_size = size;
410 mcp->flags = MBX_DMA_OUT;
411 mcp->tov = MBX_TOV_SECONDS;
412 rval = qlafx00_mailbox_command(vha, mcp);
413
414 if (rval != QLA_SUCCESS) {
415 ql_dbg(ql_dbg_mbx, vha, 0x116d,
416 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
417 } else {
418 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116e,
419 "Done %s.\n", __func__);
420 }
421 return rval;
422 }
423
424 /*
425 * qlafx00_mbx_reg_test
426 */
427 static int
428 qlafx00_mbx_reg_test(scsi_qla_host_t *vha)
429 {
430 int rval;
431 struct mbx_cmd_32 mc;
432 struct mbx_cmd_32 *mcp = &mc;
433
434 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116f,
435 "Entered %s.\n", __func__);
436
437
438 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
439 mcp->mb[1] = 0xAAAA;
440 mcp->mb[2] = 0x5555;
441 mcp->mb[3] = 0xAA55;
442 mcp->mb[4] = 0x55AA;
443 mcp->mb[5] = 0xA5A5;
444 mcp->mb[6] = 0x5A5A;
445 mcp->mb[7] = 0x2525;
446 mcp->mb[8] = 0xBBBB;
447 mcp->mb[9] = 0x6666;
448 mcp->mb[10] = 0xBB66;
449 mcp->mb[11] = 0x66BB;
450 mcp->mb[12] = 0xB6B6;
451 mcp->mb[13] = 0x6B6B;
452 mcp->mb[14] = 0x3636;
453 mcp->mb[15] = 0xCCCC;
454
455
456 mcp->out_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
457 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
458 mcp->in_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
459 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
460 mcp->buf_size = 0;
461 mcp->flags = MBX_DMA_OUT;
462 mcp->tov = MBX_TOV_SECONDS;
463 rval = qlafx00_mailbox_command(vha, mcp);
464 if (rval == QLA_SUCCESS) {
465 if (mcp->mb[17] != 0xAAAA || mcp->mb[18] != 0x5555 ||
466 mcp->mb[19] != 0xAA55 || mcp->mb[20] != 0x55AA)
467 rval = QLA_FUNCTION_FAILED;
468 if (mcp->mb[21] != 0xA5A5 || mcp->mb[22] != 0x5A5A ||
469 mcp->mb[23] != 0x2525 || mcp->mb[24] != 0xBBBB)
470 rval = QLA_FUNCTION_FAILED;
471 if (mcp->mb[25] != 0x6666 || mcp->mb[26] != 0xBB66 ||
472 mcp->mb[27] != 0x66BB || mcp->mb[28] != 0xB6B6)
473 rval = QLA_FUNCTION_FAILED;
474 if (mcp->mb[29] != 0x6B6B || mcp->mb[30] != 0x3636 ||
475 mcp->mb[31] != 0xCCCC)
476 rval = QLA_FUNCTION_FAILED;
477 }
478
479 if (rval != QLA_SUCCESS) {
480 ql_dbg(ql_dbg_mbx, vha, 0x1170,
481 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
482 } else {
483 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1171,
484 "Done %s.\n", __func__);
485 }
486 return rval;
487 }
488
489 /**
490 * qlafx00_pci_config() - Setup ISPFx00 PCI configuration registers.
491 * @ha: HA context
492 *
493 * Returns 0 on success.
494 */
495 int
496 qlafx00_pci_config(scsi_qla_host_t *vha)
497 {
498 uint16_t w;
499 struct qla_hw_data *ha = vha->hw;
500
501 pci_set_master(ha->pdev);
502 pci_try_set_mwi(ha->pdev);
503
504 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
505 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
506 w &= ~PCI_COMMAND_INTX_DISABLE;
507 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
508
509 /* PCIe -- adjust Maximum Read Request Size (2048). */
510 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
511 pcie_set_readrq(ha->pdev, 2048);
512
513 ha->chip_revision = ha->pdev->revision;
514
515 return QLA_SUCCESS;
516 }
517
518 /**
519 * qlafx00_warm_reset() - Perform warm reset of iSA(CPUs being reset on SOC).
520 * @ha: HA context
521 *
522 */
523 static inline void
524 qlafx00_soc_cpu_reset(scsi_qla_host_t *vha)
525 {
526 unsigned long flags = 0;
527 struct qla_hw_data *ha = vha->hw;
528 int i, core;
529 uint32_t cnt;
530
531 /* Set all 4 cores in reset */
532 for (i = 0; i < 4; i++) {
533 QLAFX00_SET_HBA_SOC_REG(ha,
534 (SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01));
535 }
536
537 /* Set all 4 core Clock gating control */
538 for (i = 0; i < 4; i++) {
539 QLAFX00_SET_HBA_SOC_REG(ha,
540 (SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101));
541 }
542
543 /* Reset all units in Fabric */
544 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x11F0101));
545
546 /* Reset all interrupt control registers */
547 for (i = 0; i < 115; i++) {
548 QLAFX00_SET_HBA_SOC_REG(ha,
549 (SOC_INTERRUPT_SOURCE_I_CONTROL_REG + 4*i), (0x0));
550 }
551
552 /* Reset Timers control registers. per core */
553 for (core = 0; core < 4; core++)
554 for (i = 0; i < 8; i++)
555 QLAFX00_SET_HBA_SOC_REG(ha,
556 (SOC_CORE_TIMER_REG + 0x100*core + 4*i), (0x0));
557
558 /* Reset per core IRQ ack register */
559 for (core = 0; core < 4; core++)
560 QLAFX00_SET_HBA_SOC_REG(ha,
561 (SOC_IRQ_ACK_REG + 0x100*core), (0x3FF));
562
563 /* Set Fabric control and config to defaults */
564 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONTROL_REG, (0x2));
565 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONFIG_REG, (0x3));
566
567 spin_lock_irqsave(&ha->hardware_lock, flags);
568
569 /* Kick in Fabric units */
570 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x0));
571
572 /* Kick in Core0 to start boot process */
573 QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00));
574
575 /* Wait 10secs for soft-reset to complete. */
576 for (cnt = 10; cnt; cnt--) {
577 msleep(1000);
578 barrier();
579 }
580 spin_unlock_irqrestore(&ha->hardware_lock, flags);
581 }
582
583 /**
584 * qlafx00_soft_reset() - Soft Reset ISPFx00.
585 * @ha: HA context
586 *
587 * Returns 0 on success.
588 */
589 void
590 qlafx00_soft_reset(scsi_qla_host_t *vha)
591 {
592 struct qla_hw_data *ha = vha->hw;
593
594 if (unlikely(pci_channel_offline(ha->pdev) &&
595 ha->flags.pci_channel_io_perm_failure))
596 return;
597
598 ha->isp_ops->disable_intrs(ha);
599 qlafx00_soc_cpu_reset(vha);
600 ha->isp_ops->enable_intrs(ha);
601 }
602
603 /**
604 * qlafx00_chip_diag() - Test ISPFx00 for proper operation.
605 * @ha: HA context
606 *
607 * Returns 0 on success.
608 */
609 int
610 qlafx00_chip_diag(scsi_qla_host_t *vha)
611 {
612 int rval = 0;
613 struct qla_hw_data *ha = vha->hw;
614 struct req_que *req = ha->req_q_map[0];
615
616 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
617
618 rval = qlafx00_mbx_reg_test(vha);
619 if (rval) {
620 ql_log(ql_log_warn, vha, 0x1165,
621 "Failed mailbox send register test\n");
622 } else {
623 /* Flag a successful rval */
624 rval = QLA_SUCCESS;
625 }
626 return rval;
627 }
628
629 void
630 qlafx00_config_rings(struct scsi_qla_host *vha)
631 {
632 struct qla_hw_data *ha = vha->hw;
633 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
634 struct init_cb_fx *icb;
635 struct req_que *req = ha->req_q_map[0];
636 struct rsp_que *rsp = ha->rsp_q_map[0];
637
638 /* Setup ring parameters in initialization control block. */
639 icb = (struct init_cb_fx *)ha->init_cb;
640 icb->request_q_outpointer = __constant_cpu_to_le16(0);
641 icb->response_q_inpointer = __constant_cpu_to_le16(0);
642 icb->request_q_length = cpu_to_le16(req->length);
643 icb->response_q_length = cpu_to_le16(rsp->length);
644 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
645 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
646 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
647 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
648
649 WRT_REG_DWORD(&reg->req_q_in, 0);
650 WRT_REG_DWORD(&reg->req_q_out, 0);
651
652 WRT_REG_DWORD(&reg->rsp_q_in, 0);
653 WRT_REG_DWORD(&reg->rsp_q_out, 0);
654
655 /* PCI posting */
656 RD_REG_DWORD(&reg->rsp_q_out);
657 }
658
659 char *
660 qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str)
661 {
662 struct qla_hw_data *ha = vha->hw;
663 int pcie_reg;
664
665 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
666 if (pcie_reg) {
667 strcpy(str, "PCIe iSA");
668 return str;
669 }
670 return str;
671 }
672
673 char *
674 qlafx00_fw_version_str(struct scsi_qla_host *vha, char *str)
675 {
676 struct qla_hw_data *ha = vha->hw;
677
678 sprintf(str, "%s", ha->mr.fw_version);
679 return str;
680 }
681
682 void
683 qlafx00_enable_intrs(struct qla_hw_data *ha)
684 {
685 unsigned long flags = 0;
686
687 spin_lock_irqsave(&ha->hardware_lock, flags);
688 ha->interrupts_on = 1;
689 QLAFX00_ENABLE_ICNTRL_REG(ha);
690 spin_unlock_irqrestore(&ha->hardware_lock, flags);
691 }
692
693 void
694 qlafx00_disable_intrs(struct qla_hw_data *ha)
695 {
696 unsigned long flags = 0;
697
698 spin_lock_irqsave(&ha->hardware_lock, flags);
699 ha->interrupts_on = 0;
700 QLAFX00_DISABLE_ICNTRL_REG(ha);
701 spin_unlock_irqrestore(&ha->hardware_lock, flags);
702 }
703
704 static void
705 qlafx00_tmf_iocb_timeout(void *data)
706 {
707 srb_t *sp = (srb_t *)data;
708 struct srb_iocb *tmf = &sp->u.iocb_cmd;
709
710 tmf->u.tmf.comp_status = cpu_to_le16((uint16_t)CS_TIMEOUT);
711 complete(&tmf->u.tmf.comp);
712 }
713
714 static void
715 qlafx00_tmf_sp_done(void *data, void *ptr, int res)
716 {
717 srb_t *sp = (srb_t *)ptr;
718 struct srb_iocb *tmf = &sp->u.iocb_cmd;
719
720 complete(&tmf->u.tmf.comp);
721 }
722
723 static int
724 qlafx00_async_tm_cmd(fc_port_t *fcport, uint32_t flags,
725 uint32_t lun, uint32_t tag)
726 {
727 scsi_qla_host_t *vha = fcport->vha;
728 struct srb_iocb *tm_iocb;
729 srb_t *sp;
730 int rval = QLA_FUNCTION_FAILED;
731
732 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
733 if (!sp)
734 goto done;
735
736 tm_iocb = &sp->u.iocb_cmd;
737 sp->type = SRB_TM_CMD;
738 sp->name = "tmf";
739 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
740 tm_iocb->u.tmf.flags = flags;
741 tm_iocb->u.tmf.lun = lun;
742 tm_iocb->u.tmf.data = tag;
743 sp->done = qlafx00_tmf_sp_done;
744 tm_iocb->timeout = qlafx00_tmf_iocb_timeout;
745 init_completion(&tm_iocb->u.tmf.comp);
746
747 rval = qla2x00_start_sp(sp);
748 if (rval != QLA_SUCCESS)
749 goto done_free_sp;
750
751 ql_dbg(ql_dbg_async, vha, 0x507b,
752 "Task management command issued target_id=%x\n",
753 fcport->tgt_id);
754
755 wait_for_completion(&tm_iocb->u.tmf.comp);
756
757 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ?
758 QLA_SUCCESS : QLA_FUNCTION_FAILED;
759
760 done_free_sp:
761 sp->free(vha, sp);
762 done:
763 return rval;
764 }
765
766 int
767 qlafx00_abort_target(fc_port_t *fcport, unsigned int l, int tag)
768 {
769 return qlafx00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
770 }
771
772 int
773 qlafx00_lun_reset(fc_port_t *fcport, unsigned int l, int tag)
774 {
775 return qlafx00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
776 }
777
778 int
779 qlafx00_loop_reset(scsi_qla_host_t *vha)
780 {
781 int ret;
782 struct fc_port *fcport;
783 struct qla_hw_data *ha = vha->hw;
784
785 if (ql2xtargetreset) {
786 list_for_each_entry(fcport, &vha->vp_fcports, list) {
787 if (fcport->port_type != FCT_TARGET)
788 continue;
789
790 ret = ha->isp_ops->target_reset(fcport, 0, 0);
791 if (ret != QLA_SUCCESS) {
792 ql_dbg(ql_dbg_taskm, vha, 0x803d,
793 "Bus Reset failed: Reset=%d "
794 "d_id=%x.\n", ret, fcport->d_id.b24);
795 }
796 }
797 }
798 return QLA_SUCCESS;
799 }
800
801 int
802 qlafx00_iospace_config(struct qla_hw_data *ha)
803 {
804 if (pci_request_selected_regions(ha->pdev, ha->bars,
805 QLA2XXX_DRIVER_NAME)) {
806 ql_log_pci(ql_log_fatal, ha->pdev, 0x014e,
807 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
808 pci_name(ha->pdev));
809 goto iospace_error_exit;
810 }
811
812 /* Use MMIO operations for all accesses. */
813 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
814 ql_log_pci(ql_log_warn, ha->pdev, 0x014f,
815 "Invalid pci I/O region size (%s).\n",
816 pci_name(ha->pdev));
817 goto iospace_error_exit;
818 }
819 if (pci_resource_len(ha->pdev, 0) < BAR0_LEN_FX00) {
820 ql_log_pci(ql_log_warn, ha->pdev, 0x0127,
821 "Invalid PCI mem BAR0 region size (%s), aborting\n",
822 pci_name(ha->pdev));
823 goto iospace_error_exit;
824 }
825
826 ha->cregbase =
827 ioremap_nocache(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00);
828 if (!ha->cregbase) {
829 ql_log_pci(ql_log_fatal, ha->pdev, 0x0128,
830 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
831 goto iospace_error_exit;
832 }
833
834 if (!(pci_resource_flags(ha->pdev, 2) & IORESOURCE_MEM)) {
835 ql_log_pci(ql_log_warn, ha->pdev, 0x0129,
836 "region #2 not an MMIO resource (%s), aborting\n",
837 pci_name(ha->pdev));
838 goto iospace_error_exit;
839 }
840 if (pci_resource_len(ha->pdev, 2) < BAR2_LEN_FX00) {
841 ql_log_pci(ql_log_warn, ha->pdev, 0x012a,
842 "Invalid PCI mem BAR2 region size (%s), aborting\n",
843 pci_name(ha->pdev));
844 goto iospace_error_exit;
845 }
846
847 ha->iobase =
848 ioremap_nocache(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00);
849 if (!ha->iobase) {
850 ql_log_pci(ql_log_fatal, ha->pdev, 0x012b,
851 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
852 goto iospace_error_exit;
853 }
854
855 /* Determine queue resources */
856 ha->max_req_queues = ha->max_rsp_queues = 1;
857
858 ql_log_pci(ql_log_info, ha->pdev, 0x012c,
859 "Bars 0x%x, iobase0 0x%p, iobase2 0x%p\n",
860 ha->bars, ha->cregbase, ha->iobase);
861
862 return 0;
863
864 iospace_error_exit:
865 return -ENOMEM;
866 }
867
868 static void
869 qlafx00_save_queue_ptrs(struct scsi_qla_host *vha)
870 {
871 struct qla_hw_data *ha = vha->hw;
872 struct req_que *req = ha->req_q_map[0];
873 struct rsp_que *rsp = ha->rsp_q_map[0];
874
875 req->length_fx00 = req->length;
876 req->ring_fx00 = req->ring;
877 req->dma_fx00 = req->dma;
878
879 rsp->length_fx00 = rsp->length;
880 rsp->ring_fx00 = rsp->ring;
881 rsp->dma_fx00 = rsp->dma;
882
883 ql_dbg(ql_dbg_init, vha, 0x012d,
884 "req: %p, ring_fx00: %p, length_fx00: 0x%x,"
885 "req->dma_fx00: 0x%llx\n", req, req->ring_fx00,
886 req->length_fx00, (u64)req->dma_fx00);
887
888 ql_dbg(ql_dbg_init, vha, 0x012e,
889 "rsp: %p, ring_fx00: %p, length_fx00: 0x%x,"
890 "rsp->dma_fx00: 0x%llx\n", rsp, rsp->ring_fx00,
891 rsp->length_fx00, (u64)rsp->dma_fx00);
892 }
893
894 static int
895 qlafx00_config_queues(struct scsi_qla_host *vha)
896 {
897 struct qla_hw_data *ha = vha->hw;
898 struct req_que *req = ha->req_q_map[0];
899 struct rsp_que *rsp = ha->rsp_q_map[0];
900 dma_addr_t bar2_hdl = pci_resource_start(ha->pdev, 2);
901
902 req->length = ha->req_que_len;
903 req->ring = (void *)ha->iobase + ha->req_que_off;
904 req->dma = bar2_hdl + ha->req_que_off;
905 if ((!req->ring) || (req->length == 0)) {
906 ql_log_pci(ql_log_info, ha->pdev, 0x012f,
907 "Unable to allocate memory for req_ring\n");
908 return QLA_FUNCTION_FAILED;
909 }
910
911 ql_dbg(ql_dbg_init, vha, 0x0130,
912 "req: %p req_ring pointer %p req len 0x%x "
913 "req off 0x%x\n, req->dma: 0x%llx",
914 req, req->ring, req->length,
915 ha->req_que_off, (u64)req->dma);
916
917 rsp->length = ha->rsp_que_len;
918 rsp->ring = (void *)ha->iobase + ha->rsp_que_off;
919 rsp->dma = bar2_hdl + ha->rsp_que_off;
920 if ((!rsp->ring) || (rsp->length == 0)) {
921 ql_log_pci(ql_log_info, ha->pdev, 0x0131,
922 "Unable to allocate memory for rsp_ring\n");
923 return QLA_FUNCTION_FAILED;
924 }
925
926 ql_dbg(ql_dbg_init, vha, 0x0132,
927 "rsp: %p rsp_ring pointer %p rsp len 0x%x "
928 "rsp off 0x%x, rsp->dma: 0x%llx\n",
929 rsp, rsp->ring, rsp->length,
930 ha->rsp_que_off, (u64)rsp->dma);
931
932 return QLA_SUCCESS;
933 }
934
935 static int
936 qlafx00_init_fw_ready(scsi_qla_host_t *vha)
937 {
938 int rval = 0;
939 unsigned long wtime;
940 uint16_t wait_time; /* Wait time */
941 struct qla_hw_data *ha = vha->hw;
942 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
943 uint32_t aenmbx, aenmbx7 = 0;
944 uint32_t state[5];
945 bool done = false;
946
947 /* 30 seconds wait - Adjust if required */
948 wait_time = 30;
949
950 /* wait time before firmware ready */
951 wtime = jiffies + (wait_time * HZ);
952 do {
953 aenmbx = RD_REG_DWORD(&reg->aenmailbox0);
954 barrier();
955 ql_dbg(ql_dbg_mbx, vha, 0x0133,
956 "aenmbx: 0x%x\n", aenmbx);
957
958 switch (aenmbx) {
959 case MBA_FW_NOT_STARTED:
960 case MBA_FW_STARTING:
961 break;
962
963 case MBA_SYSTEM_ERR:
964 case MBA_REQ_TRANSFER_ERR:
965 case MBA_RSP_TRANSFER_ERR:
966 case MBA_FW_INIT_FAILURE:
967 qlafx00_soft_reset(vha);
968 break;
969
970 case MBA_FW_RESTART_CMPLT:
971 /* Set the mbx and rqstq intr code */
972 aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
973 ha->mbx_intr_code = MSW(aenmbx7);
974 ha->rqstq_intr_code = LSW(aenmbx7);
975 ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
976 ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
977 ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
978 ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
979 WRT_REG_DWORD(&reg->aenmailbox0, 0);
980 RD_REG_DWORD_RELAXED(&reg->aenmailbox0);
981 ql_dbg(ql_dbg_init, vha, 0x0134,
982 "f/w returned mbx_intr_code: 0x%x, "
983 "rqstq_intr_code: 0x%x\n",
984 ha->mbx_intr_code, ha->rqstq_intr_code);
985 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
986 rval = QLA_SUCCESS;
987 done = true;
988 break;
989
990 default:
991 /* If fw is apparently not ready. In order to continue,
992 * we might need to issue Mbox cmd, but the problem is
993 * that the DoorBell vector values that come with the
994 * 8060 AEN are most likely gone by now (and thus no
995 * bell would be rung on the fw side when mbox cmd is
996 * issued). We have to therefore grab the 8060 AEN
997 * shadow regs (filled in by FW when the last 8060
998 * AEN was being posted).
999 * Do the following to determine what is needed in
1000 * order to get the FW ready:
1001 * 1. reload the 8060 AEN values from the shadow regs
1002 * 2. clear int status to get rid of possible pending
1003 * interrupts
1004 * 3. issue Get FW State Mbox cmd to determine fw state
1005 * Set the mbx and rqstq intr code from Shadow Regs
1006 */
1007 aenmbx7 = RD_REG_DWORD(&reg->initval7);
1008 ha->mbx_intr_code = MSW(aenmbx7);
1009 ha->rqstq_intr_code = LSW(aenmbx7);
1010 ha->req_que_off = RD_REG_DWORD(&reg->initval1);
1011 ha->rsp_que_off = RD_REG_DWORD(&reg->initval3);
1012 ha->req_que_len = RD_REG_DWORD(&reg->initval5);
1013 ha->rsp_que_len = RD_REG_DWORD(&reg->initval6);
1014 ql_dbg(ql_dbg_init, vha, 0x0135,
1015 "f/w returned mbx_intr_code: 0x%x, "
1016 "rqstq_intr_code: 0x%x\n",
1017 ha->mbx_intr_code, ha->rqstq_intr_code);
1018 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1019
1020 /* Get the FW state */
1021 rval = qlafx00_get_firmware_state(vha, state);
1022 if (rval != QLA_SUCCESS) {
1023 /* Retry if timer has not expired */
1024 break;
1025 }
1026
1027 if (state[0] == FSTATE_FX00_CONFIG_WAIT) {
1028 /* Firmware is waiting to be
1029 * initialized by driver
1030 */
1031 rval = QLA_SUCCESS;
1032 done = true;
1033 break;
1034 }
1035
1036 /* Issue driver shutdown and wait until f/w recovers.
1037 * Driver should continue to poll until 8060 AEN is
1038 * received indicating firmware recovery.
1039 */
1040 ql_dbg(ql_dbg_init, vha, 0x0136,
1041 "Sending Driver shutdown fw_state 0x%x\n",
1042 state[0]);
1043
1044 rval = qlafx00_driver_shutdown(vha, 10);
1045 if (rval != QLA_SUCCESS) {
1046 rval = QLA_FUNCTION_FAILED;
1047 break;
1048 }
1049 msleep(500);
1050
1051 wtime = jiffies + (wait_time * HZ);
1052 break;
1053 }
1054
1055 if (!done) {
1056 if (time_after_eq(jiffies, wtime)) {
1057 ql_dbg(ql_dbg_init, vha, 0x0137,
1058 "Init f/w failed: aen[7]: 0x%x\n",
1059 RD_REG_DWORD(&reg->aenmailbox7));
1060 rval = QLA_FUNCTION_FAILED;
1061 done = true;
1062 break;
1063 }
1064 /* Delay for a while */
1065 msleep(500);
1066 }
1067 } while (!done);
1068
1069 if (rval)
1070 ql_dbg(ql_dbg_init, vha, 0x0138,
1071 "%s **** FAILED ****.\n", __func__);
1072 else
1073 ql_dbg(ql_dbg_init, vha, 0x0139,
1074 "%s **** SUCCESS ****.\n", __func__);
1075
1076 return rval;
1077 }
1078
1079 /*
1080 * qlafx00_fw_ready() - Waits for firmware ready.
1081 * @ha: HA context
1082 *
1083 * Returns 0 on success.
1084 */
1085 int
1086 qlafx00_fw_ready(scsi_qla_host_t *vha)
1087 {
1088 int rval;
1089 unsigned long wtime;
1090 uint16_t wait_time; /* Wait time if loop is coming ready */
1091 uint32_t state[5];
1092
1093 rval = QLA_SUCCESS;
1094
1095 wait_time = 10;
1096
1097 /* wait time before firmware ready */
1098 wtime = jiffies + (wait_time * HZ);
1099
1100 /* Wait for ISP to finish init */
1101 if (!vha->flags.init_done)
1102 ql_dbg(ql_dbg_init, vha, 0x013a,
1103 "Waiting for init to complete...\n");
1104
1105 do {
1106 rval = qlafx00_get_firmware_state(vha, state);
1107
1108 if (rval == QLA_SUCCESS) {
1109 if (state[0] == FSTATE_FX00_INITIALIZED) {
1110 ql_dbg(ql_dbg_init, vha, 0x013b,
1111 "fw_state=%x\n", state[0]);
1112 rval = QLA_SUCCESS;
1113 break;
1114 }
1115 }
1116 rval = QLA_FUNCTION_FAILED;
1117
1118 if (time_after_eq(jiffies, wtime))
1119 break;
1120
1121 /* Delay for a while */
1122 msleep(500);
1123
1124 ql_dbg(ql_dbg_init, vha, 0x013c,
1125 "fw_state=%x curr time=%lx.\n", state[0], jiffies);
1126 } while (1);
1127
1128
1129 if (rval)
1130 ql_dbg(ql_dbg_init, vha, 0x013d,
1131 "Firmware ready **** FAILED ****.\n");
1132 else
1133 ql_dbg(ql_dbg_init, vha, 0x013e,
1134 "Firmware ready **** SUCCESS ****.\n");
1135
1136 return rval;
1137 }
1138
1139 static int
1140 qlafx00_find_all_targets(scsi_qla_host_t *vha,
1141 struct list_head *new_fcports)
1142 {
1143 int rval;
1144 uint16_t tgt_id;
1145 fc_port_t *fcport, *new_fcport;
1146 int found;
1147 struct qla_hw_data *ha = vha->hw;
1148
1149 rval = QLA_SUCCESS;
1150
1151 if (!test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags))
1152 return QLA_FUNCTION_FAILED;
1153
1154 if ((atomic_read(&vha->loop_down_timer) ||
1155 STATE_TRANSITION(vha))) {
1156 atomic_set(&vha->loop_down_timer, 0);
1157 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1158 return QLA_FUNCTION_FAILED;
1159 }
1160
1161 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x2088,
1162 "Listing Target bit map...\n");
1163 ql_dump_buffer(ql_dbg_disc + ql_dbg_init, vha,
1164 0x2089, (uint8_t *)ha->gid_list, 32);
1165
1166 /* Allocate temporary rmtport for any new rmtports discovered. */
1167 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1168 if (new_fcport == NULL)
1169 return QLA_MEMORY_ALLOC_FAILED;
1170
1171 for_each_set_bit(tgt_id, (void *)ha->gid_list,
1172 QLAFX00_TGT_NODE_LIST_SIZE) {
1173
1174 /* Send get target node info */
1175 new_fcport->tgt_id = tgt_id;
1176 rval = qlafx00_fx_disc(vha, new_fcport,
1177 FXDISC_GET_TGT_NODE_INFO);
1178 if (rval != QLA_SUCCESS) {
1179 ql_log(ql_log_warn, vha, 0x208a,
1180 "Target info scan failed -- assuming zero-entry "
1181 "result...\n");
1182 continue;
1183 }
1184
1185 /* Locate matching device in database. */
1186 found = 0;
1187 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1188 if (memcmp(new_fcport->port_name,
1189 fcport->port_name, WWN_SIZE))
1190 continue;
1191
1192 found++;
1193
1194 /*
1195 * If tgt_id is same and state FCS_ONLINE, nothing
1196 * changed.
1197 */
1198 if (fcport->tgt_id == new_fcport->tgt_id &&
1199 atomic_read(&fcport->state) == FCS_ONLINE)
1200 break;
1201
1202 /*
1203 * Tgt ID changed or device was marked to be updated.
1204 */
1205 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x208b,
1206 "TGT-ID Change(%s): Present tgt id: "
1207 "0x%x state: 0x%x "
1208 "wwnn = %llx wwpn = %llx.\n",
1209 __func__, fcport->tgt_id,
1210 atomic_read(&fcport->state),
1211 (unsigned long long)wwn_to_u64(fcport->node_name),
1212 (unsigned long long)wwn_to_u64(fcport->port_name));
1213
1214 ql_log(ql_log_info, vha, 0x208c,
1215 "TGT-ID Announce(%s): Discovered tgt "
1216 "id 0x%x wwnn = %llx "
1217 "wwpn = %llx.\n", __func__, new_fcport->tgt_id,
1218 (unsigned long long)
1219 wwn_to_u64(new_fcport->node_name),
1220 (unsigned long long)
1221 wwn_to_u64(new_fcport->port_name));
1222
1223 if (atomic_read(&fcport->state) != FCS_ONLINE) {
1224 fcport->old_tgt_id = fcport->tgt_id;
1225 fcport->tgt_id = new_fcport->tgt_id;
1226 ql_log(ql_log_info, vha, 0x208d,
1227 "TGT-ID: New fcport Added: %p\n", fcport);
1228 qla2x00_update_fcport(vha, fcport);
1229 } else {
1230 ql_log(ql_log_info, vha, 0x208e,
1231 " Existing TGT-ID %x did not get "
1232 " offline event from firmware.\n",
1233 fcport->old_tgt_id);
1234 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1235 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1236 kfree(new_fcport);
1237 return rval;
1238 }
1239 break;
1240 }
1241
1242 if (found)
1243 continue;
1244
1245 /* If device was not in our fcports list, then add it. */
1246 list_add_tail(&new_fcport->list, new_fcports);
1247
1248 /* Allocate a new replacement fcport. */
1249 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1250 if (new_fcport == NULL)
1251 return QLA_MEMORY_ALLOC_FAILED;
1252 }
1253
1254 kfree(new_fcport);
1255 return rval;
1256 }
1257
1258 /*
1259 * qlafx00_configure_all_targets
1260 * Setup target devices with node ID's.
1261 *
1262 * Input:
1263 * ha = adapter block pointer.
1264 *
1265 * Returns:
1266 * 0 = success.
1267 * BIT_0 = error
1268 */
1269 static int
1270 qlafx00_configure_all_targets(scsi_qla_host_t *vha)
1271 {
1272 int rval;
1273 fc_port_t *fcport, *rmptemp;
1274 LIST_HEAD(new_fcports);
1275
1276 rval = qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1277 FXDISC_GET_TGT_NODE_LIST);
1278 if (rval != QLA_SUCCESS) {
1279 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1280 return rval;
1281 }
1282
1283 rval = qlafx00_find_all_targets(vha, &new_fcports);
1284 if (rval != QLA_SUCCESS) {
1285 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1286 return rval;
1287 }
1288
1289 /*
1290 * Delete all previous devices marked lost.
1291 */
1292 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1293 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1294 break;
1295
1296 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
1297 if (fcport->port_type != FCT_INITIATOR)
1298 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1299 }
1300 }
1301
1302 /*
1303 * Add the new devices to our devices list.
1304 */
1305 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1306 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1307 break;
1308
1309 qla2x00_update_fcport(vha, fcport);
1310 list_move_tail(&fcport->list, &vha->vp_fcports);
1311 ql_log(ql_log_info, vha, 0x208f,
1312 "Attach new target id 0x%x wwnn = %llx "
1313 "wwpn = %llx.\n",
1314 fcport->tgt_id,
1315 (unsigned long long)wwn_to_u64(fcport->node_name),
1316 (unsigned long long)wwn_to_u64(fcport->port_name));
1317 }
1318
1319 /* Free all new device structures not processed. */
1320 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1321 list_del(&fcport->list);
1322 kfree(fcport);
1323 }
1324
1325 return rval;
1326 }
1327
1328 /*
1329 * qlafx00_configure_devices
1330 * Updates Fibre Channel Device Database with what is actually on loop.
1331 *
1332 * Input:
1333 * ha = adapter block pointer.
1334 *
1335 * Returns:
1336 * 0 = success.
1337 * 1 = error.
1338 * 2 = database was full and device was not configured.
1339 */
1340 int
1341 qlafx00_configure_devices(scsi_qla_host_t *vha)
1342 {
1343 int rval;
1344 unsigned long flags, save_flags;
1345 rval = QLA_SUCCESS;
1346
1347 save_flags = flags = vha->dpc_flags;
1348
1349 ql_dbg(ql_dbg_disc, vha, 0x2090,
1350 "Configure devices -- dpc flags =0x%lx\n", flags);
1351
1352 rval = qlafx00_configure_all_targets(vha);
1353
1354 if (rval == QLA_SUCCESS) {
1355 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1356 rval = QLA_FUNCTION_FAILED;
1357 } else {
1358 atomic_set(&vha->loop_state, LOOP_READY);
1359 ql_log(ql_log_info, vha, 0x2091,
1360 "Device Ready\n");
1361 }
1362 }
1363
1364 if (rval) {
1365 ql_dbg(ql_dbg_disc, vha, 0x2092,
1366 "%s *** FAILED ***.\n", __func__);
1367 } else {
1368 ql_dbg(ql_dbg_disc, vha, 0x2093,
1369 "%s: exiting normally.\n", __func__);
1370 }
1371 return rval;
1372 }
1373
1374 static void
1375 qlafx00_abort_isp_cleanup(scsi_qla_host_t *vha)
1376 {
1377 struct qla_hw_data *ha = vha->hw;
1378 fc_port_t *fcport;
1379
1380 vha->flags.online = 0;
1381 ha->flags.chip_reset_done = 0;
1382 ha->mr.fw_hbt_en = 0;
1383 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1384 vha->qla_stats.total_isp_aborts++;
1385
1386 ql_log(ql_log_info, vha, 0x013f,
1387 "Performing ISP error recovery - ha = %p.\n", ha);
1388
1389 ha->isp_ops->reset_chip(vha);
1390
1391 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1392 atomic_set(&vha->loop_state, LOOP_DOWN);
1393 atomic_set(&vha->loop_down_timer,
1394 QLAFX00_LOOP_DOWN_TIME);
1395 } else {
1396 if (!atomic_read(&vha->loop_down_timer))
1397 atomic_set(&vha->loop_down_timer,
1398 QLAFX00_LOOP_DOWN_TIME);
1399 }
1400
1401 /* Clear all async request states across all VPs. */
1402 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1403 fcport->flags = 0;
1404 if (atomic_read(&fcport->state) == FCS_ONLINE)
1405 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1406 }
1407
1408 if (!ha->flags.eeh_busy) {
1409 /* Requeue all commands in outstanding command list. */
1410 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
1411 }
1412
1413 qla2x00_free_irqs(vha);
1414 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1415
1416 /* Clear the Interrupts */
1417 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1418
1419 ql_log(ql_log_info, vha, 0x0140,
1420 "%s Done done - ha=%p.\n", __func__, ha);
1421 }
1422
1423 /**
1424 * qlafx00_init_response_q_entries() - Initializes response queue entries.
1425 * @ha: HA context
1426 *
1427 * Beginning of request ring has initialization control block already built
1428 * by nvram config routine.
1429 *
1430 * Returns 0 on success.
1431 */
1432 void
1433 qlafx00_init_response_q_entries(struct rsp_que *rsp)
1434 {
1435 uint16_t cnt;
1436 response_t *pkt;
1437
1438 rsp->ring_ptr = rsp->ring;
1439 rsp->ring_index = 0;
1440 rsp->status_srb = NULL;
1441 pkt = rsp->ring_ptr;
1442 for (cnt = 0; cnt < rsp->length; cnt++) {
1443 pkt->signature = RESPONSE_PROCESSED;
1444 WRT_REG_DWORD((void __iomem *)&pkt->signature,
1445 RESPONSE_PROCESSED);
1446 pkt++;
1447 }
1448 }
1449
1450 int
1451 qlafx00_rescan_isp(scsi_qla_host_t *vha)
1452 {
1453 uint32_t status = QLA_FUNCTION_FAILED;
1454 struct qla_hw_data *ha = vha->hw;
1455 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1456 uint32_t aenmbx7;
1457
1458 qla2x00_request_irqs(ha, ha->rsp_q_map[0]);
1459
1460 aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
1461 ha->mbx_intr_code = MSW(aenmbx7);
1462 ha->rqstq_intr_code = LSW(aenmbx7);
1463 ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
1464 ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
1465 ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
1466 ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
1467
1468 ql_dbg(ql_dbg_disc, vha, 0x2094,
1469 "fw returned mbx_intr_code: 0x%x, rqstq_intr_code: 0x%x "
1470 " Req que offset 0x%x Rsp que offset 0x%x\n",
1471 ha->mbx_intr_code, ha->rqstq_intr_code,
1472 ha->req_que_off, ha->rsp_que_len);
1473
1474 /* Clear the Interrupts */
1475 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1476
1477 status = qla2x00_init_rings(vha);
1478 if (!status) {
1479 vha->flags.online = 1;
1480
1481 /* if no cable then assume it's good */
1482 if ((vha->device_flags & DFLG_NO_CABLE))
1483 status = 0;
1484 /* Register system information */
1485 if (qlafx00_fx_disc(vha,
1486 &vha->hw->mr.fcport, FXDISC_REG_HOST_INFO))
1487 ql_dbg(ql_dbg_disc, vha, 0x2095,
1488 "failed to register host info\n");
1489 }
1490 scsi_unblock_requests(vha->host);
1491 return status;
1492 }
1493
1494 void
1495 qlafx00_timer_routine(scsi_qla_host_t *vha)
1496 {
1497 struct qla_hw_data *ha = vha->hw;
1498 uint32_t fw_heart_beat;
1499 uint32_t aenmbx0;
1500 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1501
1502 /* Check firmware health */
1503 if (ha->mr.fw_hbt_cnt)
1504 ha->mr.fw_hbt_cnt--;
1505 else {
1506 if ((!ha->flags.mr_reset_hdlr_active) &&
1507 (!test_bit(UNLOADING, &vha->dpc_flags)) &&
1508 (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
1509 (ha->mr.fw_hbt_en)) {
1510 fw_heart_beat = RD_REG_DWORD(&reg->fwheartbeat);
1511 if (fw_heart_beat != ha->mr.old_fw_hbt_cnt) {
1512 ha->mr.old_fw_hbt_cnt = fw_heart_beat;
1513 ha->mr.fw_hbt_miss_cnt = 0;
1514 } else {
1515 ha->mr.fw_hbt_miss_cnt++;
1516 if (ha->mr.fw_hbt_miss_cnt ==
1517 QLAFX00_HEARTBEAT_MISS_CNT) {
1518 set_bit(ISP_ABORT_NEEDED,
1519 &vha->dpc_flags);
1520 qla2xxx_wake_dpc(vha);
1521 ha->mr.fw_hbt_miss_cnt = 0;
1522 }
1523 }
1524 }
1525 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
1526 }
1527
1528 if (test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags)) {
1529 /* Reset recovery to be performed in timer routine */
1530 aenmbx0 = RD_REG_DWORD(&reg->aenmailbox0);
1531 if (ha->mr.fw_reset_timer_exp) {
1532 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1533 qla2xxx_wake_dpc(vha);
1534 ha->mr.fw_reset_timer_exp = 0;
1535 } else if (aenmbx0 == MBA_FW_RESTART_CMPLT) {
1536 /* Wake up DPC to rescan the targets */
1537 set_bit(FX00_TARGET_SCAN, &vha->dpc_flags);
1538 clear_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1539 qla2xxx_wake_dpc(vha);
1540 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1541 } else if ((aenmbx0 == MBA_FW_STARTING) &&
1542 (!ha->mr.fw_hbt_en)) {
1543 ha->mr.fw_hbt_en = 1;
1544 } else if (!ha->mr.fw_reset_timer_tick) {
1545 if (aenmbx0 == ha->mr.old_aenmbx0_state)
1546 ha->mr.fw_reset_timer_exp = 1;
1547 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1548 } else if (aenmbx0 == 0xFFFFFFFF) {
1549 uint32_t data0, data1;
1550
1551 data0 = QLAFX00_RD_REG(ha,
1552 QLAFX00_BAR1_BASE_ADDR_REG);
1553 data1 = QLAFX00_RD_REG(ha,
1554 QLAFX00_PEX0_WIN0_BASE_ADDR_REG);
1555
1556 data0 &= 0xffff0000;
1557 data1 &= 0x0000ffff;
1558
1559 QLAFX00_WR_REG(ha,
1560 QLAFX00_PEX0_WIN0_BASE_ADDR_REG,
1561 (data0 | data1));
1562 } else if ((aenmbx0 & 0xFF00) == MBA_FW_POLL_STATE) {
1563 ha->mr.fw_reset_timer_tick =
1564 QLAFX00_MAX_RESET_INTERVAL;
1565 } else if (aenmbx0 == MBA_FW_RESET_FCT) {
1566 ha->mr.fw_reset_timer_tick =
1567 QLAFX00_MAX_RESET_INTERVAL;
1568 }
1569 ha->mr.old_aenmbx0_state = aenmbx0;
1570 ha->mr.fw_reset_timer_tick--;
1571 }
1572 }
1573
1574 /*
1575 * qlfx00a_reset_initialize
1576 * Re-initialize after a iSA device reset.
1577 *
1578 * Input:
1579 * ha = adapter block pointer.
1580 *
1581 * Returns:
1582 * 0 = success
1583 */
1584 int
1585 qlafx00_reset_initialize(scsi_qla_host_t *vha)
1586 {
1587 struct qla_hw_data *ha = vha->hw;
1588
1589 if (vha->device_flags & DFLG_DEV_FAILED) {
1590 ql_dbg(ql_dbg_init, vha, 0x0142,
1591 "Device in failed state\n");
1592 return QLA_SUCCESS;
1593 }
1594
1595 ha->flags.mr_reset_hdlr_active = 1;
1596
1597 if (vha->flags.online) {
1598 scsi_block_requests(vha->host);
1599 qlafx00_abort_isp_cleanup(vha);
1600 }
1601
1602 ql_log(ql_log_info, vha, 0x0143,
1603 "(%s): succeeded.\n", __func__);
1604 ha->flags.mr_reset_hdlr_active = 0;
1605 return QLA_SUCCESS;
1606 }
1607
1608 /*
1609 * qlafx00_abort_isp
1610 * Resets ISP and aborts all outstanding commands.
1611 *
1612 * Input:
1613 * ha = adapter block pointer.
1614 *
1615 * Returns:
1616 * 0 = success
1617 */
1618 int
1619 qlafx00_abort_isp(scsi_qla_host_t *vha)
1620 {
1621 struct qla_hw_data *ha = vha->hw;
1622
1623 if (vha->flags.online) {
1624 if (unlikely(pci_channel_offline(ha->pdev) &&
1625 ha->flags.pci_channel_io_perm_failure)) {
1626 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1627 return QLA_SUCCESS;
1628 }
1629
1630 scsi_block_requests(vha->host);
1631 qlafx00_abort_isp_cleanup(vha);
1632 } else {
1633 scsi_block_requests(vha->host);
1634 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1635 vha->qla_stats.total_isp_aborts++;
1636 ha->isp_ops->reset_chip(vha);
1637 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1638 /* Clear the Interrupts */
1639 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1640 }
1641
1642 ql_log(ql_log_info, vha, 0x0145,
1643 "(%s): succeeded.\n", __func__);
1644
1645 return QLA_SUCCESS;
1646 }
1647
1648 static inline fc_port_t*
1649 qlafx00_get_fcport(struct scsi_qla_host *vha, int tgt_id)
1650 {
1651 fc_port_t *fcport;
1652
1653 /* Check for matching device in remote port list. */
1654 fcport = NULL;
1655 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1656 if (fcport->tgt_id == tgt_id) {
1657 ql_dbg(ql_dbg_async, vha, 0x5072,
1658 "Matching fcport(%p) found with TGT-ID: 0x%x "
1659 "and Remote TGT_ID: 0x%x\n",
1660 fcport, fcport->tgt_id, tgt_id);
1661 break;
1662 }
1663 }
1664 return fcport;
1665 }
1666
1667 static void
1668 qlafx00_tgt_detach(struct scsi_qla_host *vha, int tgt_id)
1669 {
1670 fc_port_t *fcport;
1671
1672 ql_log(ql_log_info, vha, 0x5073,
1673 "Detach TGT-ID: 0x%x\n", tgt_id);
1674
1675 fcport = qlafx00_get_fcport(vha, tgt_id);
1676 if (!fcport)
1677 return;
1678
1679 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1680
1681 return;
1682 }
1683
1684 int
1685 qlafx00_process_aen(struct scsi_qla_host *vha, struct qla_work_evt *evt)
1686 {
1687 int rval = 0;
1688 uint32_t aen_code, aen_data;
1689
1690 aen_code = FCH_EVT_VENDOR_UNIQUE;
1691 aen_data = evt->u.aenfx.evtcode;
1692
1693 switch (evt->u.aenfx.evtcode) {
1694 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
1695 if (evt->u.aenfx.mbx[1] == 0) {
1696 if (evt->u.aenfx.mbx[2] == 1) {
1697 if (!vha->flags.fw_tgt_reported)
1698 vha->flags.fw_tgt_reported = 1;
1699 atomic_set(&vha->loop_down_timer, 0);
1700 atomic_set(&vha->loop_state, LOOP_UP);
1701 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1702 qla2xxx_wake_dpc(vha);
1703 } else if (evt->u.aenfx.mbx[2] == 2) {
1704 qlafx00_tgt_detach(vha, evt->u.aenfx.mbx[3]);
1705 }
1706 } else if (evt->u.aenfx.mbx[1] == 0xffff) {
1707 if (evt->u.aenfx.mbx[2] == 1) {
1708 if (!vha->flags.fw_tgt_reported)
1709 vha->flags.fw_tgt_reported = 1;
1710 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1711 } else if (evt->u.aenfx.mbx[2] == 2) {
1712 vha->device_flags |= DFLG_NO_CABLE;
1713 qla2x00_mark_all_devices_lost(vha, 1);
1714 }
1715 }
1716 break;
1717 case QLAFX00_MBA_LINK_UP:
1718 aen_code = FCH_EVT_LINKUP;
1719 aen_data = 0;
1720 break;
1721 case QLAFX00_MBA_LINK_DOWN:
1722 aen_code = FCH_EVT_LINKDOWN;
1723 aen_data = 0;
1724 break;
1725 }
1726
1727 fc_host_post_event(vha->host, fc_get_event_number(),
1728 aen_code, aen_data);
1729
1730 return rval;
1731 }
1732
1733 static void
1734 qlafx00_update_host_attr(scsi_qla_host_t *vha, struct port_info_data *pinfo)
1735 {
1736 u64 port_name = 0, node_name = 0;
1737
1738 port_name = (unsigned long long)wwn_to_u64(pinfo->port_name);
1739 node_name = (unsigned long long)wwn_to_u64(pinfo->node_name);
1740
1741 fc_host_node_name(vha->host) = node_name;
1742 fc_host_port_name(vha->host) = port_name;
1743 if (!pinfo->port_type)
1744 vha->hw->current_topology = ISP_CFG_F;
1745 if (pinfo->link_status == QLAFX00_LINK_STATUS_UP)
1746 atomic_set(&vha->loop_state, LOOP_READY);
1747 else if (pinfo->link_status == QLAFX00_LINK_STATUS_DOWN)
1748 atomic_set(&vha->loop_state, LOOP_DOWN);
1749 vha->hw->link_data_rate = (uint16_t)pinfo->link_config;
1750 }
1751
1752 static void
1753 qla2x00_fxdisc_iocb_timeout(void *data)
1754 {
1755 srb_t *sp = (srb_t *)data;
1756 struct srb_iocb *lio = &sp->u.iocb_cmd;
1757
1758 complete(&lio->u.fxiocb.fxiocb_comp);
1759 }
1760
1761 static void
1762 qla2x00_fxdisc_sp_done(void *data, void *ptr, int res)
1763 {
1764 srb_t *sp = (srb_t *)ptr;
1765 struct srb_iocb *lio = &sp->u.iocb_cmd;
1766
1767 complete(&lio->u.fxiocb.fxiocb_comp);
1768 }
1769
1770 int
1771 qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type)
1772 {
1773 srb_t *sp;
1774 struct srb_iocb *fdisc;
1775 int rval = QLA_FUNCTION_FAILED;
1776 struct qla_hw_data *ha = vha->hw;
1777 struct host_system_info *phost_info;
1778 struct register_host_info *preg_hsi;
1779 struct new_utsname *p_sysid = NULL;
1780 struct timeval tv;
1781
1782 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1783 if (!sp)
1784 goto done;
1785
1786 fdisc = &sp->u.iocb_cmd;
1787 switch (fx_type) {
1788 case FXDISC_GET_CONFIG_INFO:
1789 fdisc->u.fxiocb.flags =
1790 SRB_FXDISC_RESP_DMA_VALID;
1791 fdisc->u.fxiocb.rsp_len = sizeof(struct config_info_data);
1792 break;
1793 case FXDISC_GET_PORT_INFO:
1794 fdisc->u.fxiocb.flags =
1795 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1796 fdisc->u.fxiocb.rsp_len = QLAFX00_PORT_DATA_INFO;
1797 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->port_id);
1798 break;
1799 case FXDISC_GET_TGT_NODE_INFO:
1800 fdisc->u.fxiocb.flags =
1801 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1802 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_INFO;
1803 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->tgt_id);
1804 break;
1805 case FXDISC_GET_TGT_NODE_LIST:
1806 fdisc->u.fxiocb.flags =
1807 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1808 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_LIST_SIZE;
1809 break;
1810 case FXDISC_REG_HOST_INFO:
1811 fdisc->u.fxiocb.flags = SRB_FXDISC_REQ_DMA_VALID;
1812 fdisc->u.fxiocb.req_len = sizeof(struct register_host_info);
1813 p_sysid = utsname();
1814 if (!p_sysid) {
1815 ql_log(ql_log_warn, vha, 0x303c,
1816 "Not able to get the system informtion\n");
1817 goto done_free_sp;
1818 }
1819 break;
1820 default:
1821 break;
1822 }
1823
1824 if (fdisc->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
1825 fdisc->u.fxiocb.req_addr = dma_alloc_coherent(&ha->pdev->dev,
1826 fdisc->u.fxiocb.req_len,
1827 &fdisc->u.fxiocb.req_dma_handle, GFP_KERNEL);
1828 if (!fdisc->u.fxiocb.req_addr)
1829 goto done_free_sp;
1830
1831 if (fx_type == FXDISC_REG_HOST_INFO) {
1832 preg_hsi = (struct register_host_info *)
1833 fdisc->u.fxiocb.req_addr;
1834 phost_info = &preg_hsi->hsi;
1835 memset(preg_hsi, 0, sizeof(struct register_host_info));
1836 phost_info->os_type = OS_TYPE_LINUX;
1837 strncpy(phost_info->sysname,
1838 p_sysid->sysname, SYSNAME_LENGTH);
1839 strncpy(phost_info->nodename,
1840 p_sysid->nodename, NODENAME_LENGTH);
1841 strncpy(phost_info->release,
1842 p_sysid->release, RELEASE_LENGTH);
1843 strncpy(phost_info->version,
1844 p_sysid->version, VERSION_LENGTH);
1845 strncpy(phost_info->machine,
1846 p_sysid->machine, MACHINE_LENGTH);
1847 strncpy(phost_info->domainname,
1848 p_sysid->domainname, DOMNAME_LENGTH);
1849 strncpy(phost_info->hostdriver,
1850 QLA2XXX_VERSION, VERSION_LENGTH);
1851 do_gettimeofday(&tv);
1852 preg_hsi->utc = (uint64_t)tv.tv_sec;
1853 ql_dbg(ql_dbg_init, vha, 0x0149,
1854 "ISP%04X: Host registration with firmware\n",
1855 ha->pdev->device);
1856 ql_dbg(ql_dbg_init, vha, 0x014a,
1857 "os_type = '%d', sysname = '%s', nodname = '%s'\n",
1858 phost_info->os_type,
1859 phost_info->sysname,
1860 phost_info->nodename);
1861 ql_dbg(ql_dbg_init, vha, 0x014b,
1862 "release = '%s', version = '%s'\n",
1863 phost_info->release,
1864 phost_info->version);
1865 ql_dbg(ql_dbg_init, vha, 0x014c,
1866 "machine = '%s' "
1867 "domainname = '%s', hostdriver = '%s'\n",
1868 phost_info->machine,
1869 phost_info->domainname,
1870 phost_info->hostdriver);
1871 ql_dump_buffer(ql_dbg_init + ql_dbg_disc, vha, 0x014d,
1872 (uint8_t *)phost_info,
1873 sizeof(struct host_system_info));
1874 }
1875 }
1876
1877 if (fdisc->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
1878 fdisc->u.fxiocb.rsp_addr = dma_alloc_coherent(&ha->pdev->dev,
1879 fdisc->u.fxiocb.rsp_len,
1880 &fdisc->u.fxiocb.rsp_dma_handle, GFP_KERNEL);
1881 if (!fdisc->u.fxiocb.rsp_addr)
1882 goto done_unmap_req;
1883 }
1884
1885 sp->type = SRB_FXIOCB_DCMD;
1886 sp->name = "fxdisc";
1887 qla2x00_init_timer(sp, FXDISC_TIMEOUT);
1888 fdisc->timeout = qla2x00_fxdisc_iocb_timeout;
1889 fdisc->u.fxiocb.req_func_type = cpu_to_le16(fx_type);
1890 sp->done = qla2x00_fxdisc_sp_done;
1891
1892 rval = qla2x00_start_sp(sp);
1893 if (rval != QLA_SUCCESS)
1894 goto done_unmap_dma;
1895
1896 wait_for_completion(&fdisc->u.fxiocb.fxiocb_comp);
1897
1898 if (fx_type == FXDISC_GET_CONFIG_INFO) {
1899 struct config_info_data *pinfo =
1900 (struct config_info_data *) fdisc->u.fxiocb.rsp_addr;
1901 memcpy(&vha->hw->mr.product_name, pinfo->product_name,
1902 sizeof(vha->hw->mr.product_name));
1903 memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name,
1904 sizeof(vha->hw->mr.symbolic_name));
1905 memcpy(&vha->hw->mr.serial_num, pinfo->serial_num,
1906 sizeof(vha->hw->mr.serial_num));
1907 memcpy(&vha->hw->mr.hw_version, pinfo->hw_version,
1908 sizeof(vha->hw->mr.hw_version));
1909 memcpy(&vha->hw->mr.fw_version, pinfo->fw_version,
1910 sizeof(vha->hw->mr.fw_version));
1911 strim(vha->hw->mr.fw_version);
1912 memcpy(&vha->hw->mr.uboot_version, pinfo->uboot_version,
1913 sizeof(vha->hw->mr.uboot_version));
1914 memcpy(&vha->hw->mr.fru_serial_num, pinfo->fru_serial_num,
1915 sizeof(vha->hw->mr.fru_serial_num));
1916 } else if (fx_type == FXDISC_GET_PORT_INFO) {
1917 struct port_info_data *pinfo =
1918 (struct port_info_data *) fdisc->u.fxiocb.rsp_addr;
1919 memcpy(vha->node_name, pinfo->node_name, WWN_SIZE);
1920 memcpy(vha->port_name, pinfo->port_name, WWN_SIZE);
1921 vha->d_id.b.domain = pinfo->port_id[0];
1922 vha->d_id.b.area = pinfo->port_id[1];
1923 vha->d_id.b.al_pa = pinfo->port_id[2];
1924 qlafx00_update_host_attr(vha, pinfo);
1925 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0141,
1926 (uint8_t *)pinfo, 16);
1927 } else if (fx_type == FXDISC_GET_TGT_NODE_INFO) {
1928 struct qlafx00_tgt_node_info *pinfo =
1929 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1930 memcpy(fcport->node_name, pinfo->tgt_node_wwnn, WWN_SIZE);
1931 memcpy(fcport->port_name, pinfo->tgt_node_wwpn, WWN_SIZE);
1932 fcport->port_type = FCT_TARGET;
1933 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0144,
1934 (uint8_t *)pinfo, 16);
1935 } else if (fx_type == FXDISC_GET_TGT_NODE_LIST) {
1936 struct qlafx00_tgt_node_info *pinfo =
1937 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1938 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146,
1939 (uint8_t *)pinfo, 16);
1940 memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE);
1941 }
1942 rval = le32_to_cpu(fdisc->u.fxiocb.result);
1943
1944 done_unmap_dma:
1945 if (fdisc->u.fxiocb.rsp_addr)
1946 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.rsp_len,
1947 fdisc->u.fxiocb.rsp_addr, fdisc->u.fxiocb.rsp_dma_handle);
1948
1949 done_unmap_req:
1950 if (fdisc->u.fxiocb.req_addr)
1951 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.req_len,
1952 fdisc->u.fxiocb.req_addr, fdisc->u.fxiocb.req_dma_handle);
1953 done_free_sp:
1954 sp->free(vha, sp);
1955 done:
1956 return rval;
1957 }
1958
1959 static void
1960 qlafx00_abort_iocb_timeout(void *data)
1961 {
1962 srb_t *sp = (srb_t *)data;
1963 struct srb_iocb *abt = &sp->u.iocb_cmd;
1964
1965 abt->u.abt.comp_status = cpu_to_le16((uint16_t)CS_TIMEOUT);
1966 complete(&abt->u.abt.comp);
1967 }
1968
1969 static void
1970 qlafx00_abort_sp_done(void *data, void *ptr, int res)
1971 {
1972 srb_t *sp = (srb_t *)ptr;
1973 struct srb_iocb *abt = &sp->u.iocb_cmd;
1974
1975 complete(&abt->u.abt.comp);
1976 }
1977
1978 static int
1979 qlafx00_async_abt_cmd(srb_t *cmd_sp)
1980 {
1981 scsi_qla_host_t *vha = cmd_sp->fcport->vha;
1982 fc_port_t *fcport = cmd_sp->fcport;
1983 struct srb_iocb *abt_iocb;
1984 srb_t *sp;
1985 int rval = QLA_FUNCTION_FAILED;
1986
1987 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1988 if (!sp)
1989 goto done;
1990
1991 abt_iocb = &sp->u.iocb_cmd;
1992 sp->type = SRB_ABT_CMD;
1993 sp->name = "abort";
1994 qla2x00_init_timer(sp, FXDISC_TIMEOUT);
1995 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
1996 sp->done = qlafx00_abort_sp_done;
1997 abt_iocb->timeout = qlafx00_abort_iocb_timeout;
1998 init_completion(&abt_iocb->u.abt.comp);
1999
2000 rval = qla2x00_start_sp(sp);
2001 if (rval != QLA_SUCCESS)
2002 goto done_free_sp;
2003
2004 ql_dbg(ql_dbg_async, vha, 0x507c,
2005 "Abort command issued - hdl=%x, target_id=%x\n",
2006 cmd_sp->handle, fcport->tgt_id);
2007
2008 wait_for_completion(&abt_iocb->u.abt.comp);
2009
2010 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
2011 QLA_SUCCESS : QLA_FUNCTION_FAILED;
2012
2013 done_free_sp:
2014 sp->free(vha, sp);
2015 done:
2016 return rval;
2017 }
2018
2019 int
2020 qlafx00_abort_command(srb_t *sp)
2021 {
2022 unsigned long flags = 0;
2023
2024 uint32_t handle;
2025 fc_port_t *fcport = sp->fcport;
2026 struct scsi_qla_host *vha = fcport->vha;
2027 struct qla_hw_data *ha = vha->hw;
2028 struct req_que *req = vha->req;
2029
2030 spin_lock_irqsave(&ha->hardware_lock, flags);
2031 for (handle = 1; handle < DEFAULT_OUTSTANDING_COMMANDS; handle++) {
2032 if (req->outstanding_cmds[handle] == sp)
2033 break;
2034 }
2035 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2036 if (handle == DEFAULT_OUTSTANDING_COMMANDS) {
2037 /* Command not found. */
2038 return QLA_FUNCTION_FAILED;
2039 }
2040 return qlafx00_async_abt_cmd(sp);
2041 }
2042
2043 /*
2044 * qlafx00_initialize_adapter
2045 * Initialize board.
2046 *
2047 * Input:
2048 * ha = adapter block pointer.
2049 *
2050 * Returns:
2051 * 0 = success
2052 */
2053 int
2054 qlafx00_initialize_adapter(scsi_qla_host_t *vha)
2055 {
2056 int rval;
2057 struct qla_hw_data *ha = vha->hw;
2058
2059 /* Clear adapter flags. */
2060 vha->flags.online = 0;
2061 ha->flags.chip_reset_done = 0;
2062 vha->flags.reset_active = 0;
2063 ha->flags.pci_channel_io_perm_failure = 0;
2064 ha->flags.eeh_busy = 0;
2065 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2066 atomic_set(&vha->loop_state, LOOP_DOWN);
2067 vha->device_flags = DFLG_NO_CABLE;
2068 vha->dpc_flags = 0;
2069 vha->flags.management_server_logged_in = 0;
2070 vha->marker_needed = 0;
2071 ha->isp_abort_cnt = 0;
2072 ha->beacon_blink_led = 0;
2073
2074 set_bit(0, ha->req_qid_map);
2075 set_bit(0, ha->rsp_qid_map);
2076
2077 ql_dbg(ql_dbg_init, vha, 0x0147,
2078 "Configuring PCI space...\n");
2079
2080 rval = ha->isp_ops->pci_config(vha);
2081 if (rval) {
2082 ql_log(ql_log_warn, vha, 0x0148,
2083 "Unable to configure PCI space.\n");
2084 return rval;
2085 }
2086
2087 rval = qlafx00_init_fw_ready(vha);
2088 if (rval != QLA_SUCCESS)
2089 return rval;
2090
2091 qlafx00_save_queue_ptrs(vha);
2092
2093 rval = qlafx00_config_queues(vha);
2094 if (rval != QLA_SUCCESS)
2095 return rval;
2096
2097 /*
2098 * Allocate the array of outstanding commands
2099 * now that we know the firmware resources.
2100 */
2101 rval = qla2x00_alloc_outstanding_cmds(ha, vha->req);
2102 if (rval != QLA_SUCCESS)
2103 return rval;
2104
2105 rval = qla2x00_init_rings(vha);
2106 ha->flags.chip_reset_done = 1;
2107
2108 return rval;
2109 }
2110
2111 uint32_t
2112 qlafx00_fw_state_show(struct device *dev, struct device_attribute *attr,
2113 char *buf)
2114 {
2115 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2116 int rval = QLA_FUNCTION_FAILED;
2117 uint32_t state[1];
2118
2119 if (qla2x00_reset_active(vha))
2120 ql_log(ql_log_warn, vha, 0x70ce,
2121 "ISP reset active.\n");
2122 else if (!vha->hw->flags.eeh_busy) {
2123 rval = qlafx00_get_firmware_state(vha, state);
2124 }
2125 if (rval != QLA_SUCCESS)
2126 memset(state, -1, sizeof(state));
2127
2128 return state[0];
2129 }
2130
2131 void
2132 qlafx00_get_host_speed(struct Scsi_Host *shost)
2133 {
2134 struct qla_hw_data *ha = ((struct scsi_qla_host *)
2135 (shost_priv(shost)))->hw;
2136 u32 speed = FC_PORTSPEED_UNKNOWN;
2137
2138 switch (ha->link_data_rate) {
2139 case QLAFX00_PORT_SPEED_2G:
2140 speed = FC_PORTSPEED_2GBIT;
2141 break;
2142 case QLAFX00_PORT_SPEED_4G:
2143 speed = FC_PORTSPEED_4GBIT;
2144 break;
2145 case QLAFX00_PORT_SPEED_8G:
2146 speed = FC_PORTSPEED_8GBIT;
2147 break;
2148 case QLAFX00_PORT_SPEED_10G:
2149 speed = FC_PORTSPEED_10GBIT;
2150 break;
2151 }
2152 fc_host_speed(shost) = speed;
2153 }
2154
2155 /** QLAFX00 specific ISR implementation functions */
2156
2157 static inline void
2158 qlafx00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
2159 uint32_t sense_len, struct rsp_que *rsp, int res)
2160 {
2161 struct scsi_qla_host *vha = sp->fcport->vha;
2162 struct scsi_cmnd *cp = GET_CMD_SP(sp);
2163 uint32_t track_sense_len;
2164
2165 SET_FW_SENSE_LEN(sp, sense_len);
2166
2167 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2168 sense_len = SCSI_SENSE_BUFFERSIZE;
2169
2170 SET_CMD_SENSE_LEN(sp, sense_len);
2171 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2172 track_sense_len = sense_len;
2173
2174 if (sense_len > par_sense_len)
2175 sense_len = par_sense_len;
2176
2177 memcpy(cp->sense_buffer, sense_data, sense_len);
2178
2179 SET_FW_SENSE_LEN(sp, GET_FW_SENSE_LEN(sp) - sense_len);
2180
2181 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2182 track_sense_len -= sense_len;
2183 SET_CMD_SENSE_LEN(sp, track_sense_len);
2184
2185 ql_dbg(ql_dbg_io, vha, 0x304d,
2186 "sense_len=0x%x par_sense_len=0x%x track_sense_len=0x%x.\n",
2187 sense_len, par_sense_len, track_sense_len);
2188 if (GET_FW_SENSE_LEN(sp) > 0) {
2189 rsp->status_srb = sp;
2190 cp->result = res;
2191 }
2192
2193 if (sense_len) {
2194 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3039,
2195 "Check condition Sense data, nexus%ld:%d:%d cmd=%p.\n",
2196 sp->fcport->vha->host_no, cp->device->id, cp->device->lun,
2197 cp);
2198 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3049,
2199 cp->sense_buffer, sense_len);
2200 }
2201 }
2202
2203 static void
2204 qlafx00_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2205 struct tsk_mgmt_entry_fx00 *pkt, srb_t *sp,
2206 __le16 sstatus, __le16 cpstatus)
2207 {
2208 struct srb_iocb *tmf;
2209
2210 tmf = &sp->u.iocb_cmd;
2211 if (cpstatus != cpu_to_le16((uint16_t)CS_COMPLETE) ||
2212 (sstatus & cpu_to_le16((uint16_t)SS_RESPONSE_INFO_LEN_VALID)))
2213 cpstatus = cpu_to_le16((uint16_t)CS_INCOMPLETE);
2214 tmf->u.tmf.comp_status = cpstatus;
2215 sp->done(vha, sp, 0);
2216 }
2217
2218 static void
2219 qlafx00_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2220 struct abort_iocb_entry_fx00 *pkt)
2221 {
2222 const char func[] = "ABT_IOCB";
2223 srb_t *sp;
2224 struct srb_iocb *abt;
2225
2226 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2227 if (!sp)
2228 return;
2229
2230 abt = &sp->u.iocb_cmd;
2231 abt->u.abt.comp_status = pkt->tgt_id_sts;
2232 sp->done(vha, sp, 0);
2233 }
2234
2235 static void
2236 qlafx00_ioctl_iosb_entry(scsi_qla_host_t *vha, struct req_que *req,
2237 struct ioctl_iocb_entry_fx00 *pkt)
2238 {
2239 const char func[] = "IOSB_IOCB";
2240 srb_t *sp;
2241 struct fc_bsg_job *bsg_job;
2242 struct srb_iocb *iocb_job;
2243 int res;
2244 struct qla_mt_iocb_rsp_fx00 fstatus;
2245 uint8_t *fw_sts_ptr;
2246
2247 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2248 if (!sp)
2249 return;
2250
2251 if (sp->type == SRB_FXIOCB_DCMD) {
2252 iocb_job = &sp->u.iocb_cmd;
2253 iocb_job->u.fxiocb.seq_number = pkt->seq_no;
2254 iocb_job->u.fxiocb.fw_flags = pkt->fw_iotcl_flags;
2255 iocb_job->u.fxiocb.result = pkt->status;
2256 if (iocb_job->u.fxiocb.flags & SRB_FXDISC_RSP_DWRD_VALID)
2257 iocb_job->u.fxiocb.req_data =
2258 pkt->dataword_r;
2259 } else {
2260 bsg_job = sp->u.bsg_job;
2261
2262 memset(&fstatus, 0, sizeof(struct qla_mt_iocb_rsp_fx00));
2263
2264 fstatus.reserved_1 = pkt->reserved_0;
2265 fstatus.func_type = pkt->comp_func_num;
2266 fstatus.ioctl_flags = pkt->fw_iotcl_flags;
2267 fstatus.ioctl_data = pkt->dataword_r;
2268 fstatus.adapid = pkt->adapid;
2269 fstatus.adapid_hi = pkt->adapid_hi;
2270 fstatus.reserved_2 = pkt->reserved_1;
2271 fstatus.res_count = pkt->residuallen;
2272 fstatus.status = pkt->status;
2273 fstatus.seq_number = pkt->seq_no;
2274 memcpy(fstatus.reserved_3,
2275 pkt->reserved_2, 20 * sizeof(uint8_t));
2276
2277 fw_sts_ptr = ((uint8_t *)bsg_job->req->sense) +
2278 sizeof(struct fc_bsg_reply);
2279
2280 memcpy(fw_sts_ptr, (uint8_t *)&fstatus,
2281 sizeof(struct qla_mt_iocb_rsp_fx00));
2282 bsg_job->reply_len = sizeof(struct fc_bsg_reply) +
2283 sizeof(struct qla_mt_iocb_rsp_fx00) + sizeof(uint8_t);
2284
2285 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2286 sp->fcport->vha, 0x5080,
2287 (uint8_t *)pkt, sizeof(struct ioctl_iocb_entry_fx00));
2288
2289 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2290 sp->fcport->vha, 0x5074,
2291 (uint8_t *)fw_sts_ptr, sizeof(struct qla_mt_iocb_rsp_fx00));
2292
2293 res = bsg_job->reply->result = DID_OK << 16;
2294 bsg_job->reply->reply_payload_rcv_len =
2295 bsg_job->reply_payload.payload_len;
2296 }
2297 sp->done(vha, sp, res);
2298 }
2299
2300 /**
2301 * qlafx00_status_entry() - Process a Status IOCB entry.
2302 * @ha: SCSI driver HA context
2303 * @pkt: Entry pointer
2304 */
2305 static void
2306 qlafx00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
2307 {
2308 srb_t *sp;
2309 fc_port_t *fcport;
2310 struct scsi_cmnd *cp;
2311 struct sts_entry_fx00 *sts;
2312 __le16 comp_status;
2313 __le16 scsi_status;
2314 uint16_t ox_id;
2315 __le16 lscsi_status;
2316 int32_t resid;
2317 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2318 fw_resid_len;
2319 uint8_t *rsp_info = NULL, *sense_data = NULL;
2320 struct qla_hw_data *ha = vha->hw;
2321 uint32_t hindex, handle;
2322 uint16_t que;
2323 struct req_que *req;
2324 int logit = 1;
2325 int res = 0;
2326
2327 sts = (struct sts_entry_fx00 *) pkt;
2328
2329 comp_status = sts->comp_status;
2330 scsi_status = sts->scsi_status & cpu_to_le16((uint16_t)SS_MASK);
2331 hindex = sts->handle;
2332 handle = LSW(hindex);
2333
2334 que = MSW(hindex);
2335 req = ha->req_q_map[que];
2336
2337 /* Validate handle. */
2338 if (handle < req->num_outstanding_cmds)
2339 sp = req->outstanding_cmds[handle];
2340 else
2341 sp = NULL;
2342
2343 if (sp == NULL) {
2344 ql_dbg(ql_dbg_io, vha, 0x3034,
2345 "Invalid status handle (0x%x).\n", handle);
2346
2347 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2348 qla2xxx_wake_dpc(vha);
2349 return;
2350 }
2351
2352 if (sp->type == SRB_TM_CMD) {
2353 req->outstanding_cmds[handle] = NULL;
2354 qlafx00_tm_iocb_entry(vha, req, pkt, sp,
2355 scsi_status, comp_status);
2356 return;
2357 }
2358
2359 /* Fast path completion. */
2360 if (comp_status == CS_COMPLETE && scsi_status == 0) {
2361 qla2x00_do_host_ramp_up(vha);
2362 qla2x00_process_completed_request(vha, req, handle);
2363 return;
2364 }
2365
2366 req->outstanding_cmds[handle] = NULL;
2367 cp = GET_CMD_SP(sp);
2368 if (cp == NULL) {
2369 ql_dbg(ql_dbg_io, vha, 0x3048,
2370 "Command already returned (0x%x/%p).\n",
2371 handle, sp);
2372
2373 return;
2374 }
2375
2376 lscsi_status = scsi_status & cpu_to_le16((uint16_t)STATUS_MASK);
2377
2378 fcport = sp->fcport;
2379
2380 ox_id = 0;
2381 sense_len = par_sense_len = rsp_info_len = resid_len =
2382 fw_resid_len = 0;
2383 if (scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))
2384 sense_len = sts->sense_len;
2385 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2386 | (uint16_t)SS_RESIDUAL_OVER)))
2387 resid_len = le32_to_cpu(sts->residual_len);
2388 if (comp_status == cpu_to_le16((uint16_t)CS_DATA_UNDERRUN))
2389 fw_resid_len = le32_to_cpu(sts->residual_len);
2390 rsp_info = sense_data = sts->data;
2391 par_sense_len = sizeof(sts->data);
2392
2393 /* Check for overrun. */
2394 if (comp_status == CS_COMPLETE &&
2395 scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_OVER))
2396 comp_status = cpu_to_le16((uint16_t)CS_DATA_OVERRUN);
2397
2398 /*
2399 * Based on Host and scsi status generate status code for Linux
2400 */
2401 switch (le16_to_cpu(comp_status)) {
2402 case CS_COMPLETE:
2403 case CS_QUEUE_FULL:
2404 if (scsi_status == 0) {
2405 res = DID_OK << 16;
2406 break;
2407 }
2408 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2409 | (uint16_t)SS_RESIDUAL_OVER))) {
2410 resid = resid_len;
2411 scsi_set_resid(cp, resid);
2412
2413 if (!lscsi_status &&
2414 ((unsigned)(scsi_bufflen(cp) - resid) <
2415 cp->underflow)) {
2416 ql_dbg(ql_dbg_io, fcport->vha, 0x3050,
2417 "Mid-layer underflow "
2418 "detected (0x%x of 0x%x bytes).\n",
2419 resid, scsi_bufflen(cp));
2420
2421 res = DID_ERROR << 16;
2422 break;
2423 }
2424 }
2425 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
2426
2427 if (lscsi_status ==
2428 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
2429 ql_dbg(ql_dbg_io, fcport->vha, 0x3051,
2430 "QUEUE FULL detected.\n");
2431 break;
2432 }
2433 logit = 0;
2434 if (lscsi_status != cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
2435 break;
2436
2437 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2438 if (!(scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
2439 break;
2440
2441 qlafx00_handle_sense(sp, sense_data, par_sense_len, sense_len,
2442 rsp, res);
2443 break;
2444
2445 case CS_DATA_UNDERRUN:
2446 /* Use F/W calculated residual length. */
2447 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2448 resid = fw_resid_len;
2449 else
2450 resid = resid_len;
2451 scsi_set_resid(cp, resid);
2452 if (scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_UNDER)) {
2453 if ((IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2454 && fw_resid_len != resid_len) {
2455 ql_dbg(ql_dbg_io, fcport->vha, 0x3052,
2456 "Dropped frame(s) detected "
2457 "(0x%x of 0x%x bytes).\n",
2458 resid, scsi_bufflen(cp));
2459
2460 res = DID_ERROR << 16 |
2461 le16_to_cpu(lscsi_status);
2462 goto check_scsi_status;
2463 }
2464
2465 if (!lscsi_status &&
2466 ((unsigned)(scsi_bufflen(cp) - resid) <
2467 cp->underflow)) {
2468 ql_dbg(ql_dbg_io, fcport->vha, 0x3053,
2469 "Mid-layer underflow "
2470 "detected (0x%x of 0x%x bytes, "
2471 "cp->underflow: 0x%x).\n",
2472 resid, scsi_bufflen(cp), cp->underflow);
2473
2474 res = DID_ERROR << 16;
2475 break;
2476 }
2477 } else if (lscsi_status !=
2478 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL) &&
2479 lscsi_status != cpu_to_le16((uint16_t)SAM_STAT_BUSY)) {
2480 /*
2481 * scsi status of task set and busy are considered
2482 * to be task not completed.
2483 */
2484
2485 ql_dbg(ql_dbg_io, fcport->vha, 0x3054,
2486 "Dropped frame(s) detected (0x%x "
2487 "of 0x%x bytes).\n", resid,
2488 scsi_bufflen(cp));
2489
2490 res = DID_ERROR << 16 | le16_to_cpu(lscsi_status);
2491 goto check_scsi_status;
2492 } else {
2493 ql_dbg(ql_dbg_io, fcport->vha, 0x3055,
2494 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2495 scsi_status, lscsi_status);
2496 }
2497
2498 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
2499 logit = 0;
2500
2501 check_scsi_status:
2502 /*
2503 * Check to see if SCSI Status is non zero. If so report SCSI
2504 * Status.
2505 */
2506 if (lscsi_status != 0) {
2507 if (lscsi_status ==
2508 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
2509 ql_dbg(ql_dbg_io, fcport->vha, 0x3056,
2510 "QUEUE FULL detected.\n");
2511 logit = 1;
2512 break;
2513 }
2514 if (lscsi_status !=
2515 cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
2516 break;
2517
2518 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2519 if (!(scsi_status &
2520 cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
2521 break;
2522
2523 qlafx00_handle_sense(sp, sense_data, par_sense_len,
2524 sense_len, rsp, res);
2525 }
2526 break;
2527
2528 case CS_PORT_LOGGED_OUT:
2529 case CS_PORT_CONFIG_CHG:
2530 case CS_PORT_BUSY:
2531 case CS_INCOMPLETE:
2532 case CS_PORT_UNAVAILABLE:
2533 case CS_TIMEOUT:
2534 case CS_RESET:
2535
2536 /*
2537 * We are going to have the fc class block the rport
2538 * while we try to recover so instruct the mid layer
2539 * to requeue until the class decides how to handle this.
2540 */
2541 res = DID_TRANSPORT_DISRUPTED << 16;
2542
2543 ql_dbg(ql_dbg_io, fcport->vha, 0x3057,
2544 "Port down status: port-state=0x%x.\n",
2545 atomic_read(&fcport->state));
2546
2547 if (atomic_read(&fcport->state) == FCS_ONLINE)
2548 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
2549 break;
2550
2551 case CS_ABORTED:
2552 res = DID_RESET << 16;
2553 break;
2554
2555 default:
2556 res = DID_ERROR << 16;
2557 break;
2558 }
2559
2560 if (logit)
2561 ql_dbg(ql_dbg_io, fcport->vha, 0x3058,
2562 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%d "
2563 "tgt_id: 0x%x lscsi_status: 0x%x cdb=%10phN len=0x%x "
2564 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sense_len=0x%x, "
2565 "par_sense_len=0x%x, rsp_info_len=0x%x\n",
2566 comp_status, scsi_status, res, vha->host_no,
2567 cp->device->id, cp->device->lun, fcport->tgt_id,
2568 lscsi_status, cp->cmnd, scsi_bufflen(cp),
2569 rsp_info_len, resid_len, fw_resid_len, sense_len,
2570 par_sense_len, rsp_info_len);
2571
2572 if (!res)
2573 qla2x00_do_host_ramp_up(vha);
2574
2575 if (rsp->status_srb == NULL)
2576 sp->done(ha, sp, res);
2577 }
2578
2579 /**
2580 * qlafx00_status_cont_entry() - Process a Status Continuations entry.
2581 * @ha: SCSI driver HA context
2582 * @pkt: Entry pointer
2583 *
2584 * Extended sense data.
2585 */
2586 static void
2587 qlafx00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
2588 {
2589 uint8_t sense_sz = 0;
2590 struct qla_hw_data *ha = rsp->hw;
2591 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
2592 srb_t *sp = rsp->status_srb;
2593 struct scsi_cmnd *cp;
2594 uint32_t sense_len;
2595 uint8_t *sense_ptr;
2596
2597 if (!sp) {
2598 ql_dbg(ql_dbg_io, vha, 0x3037,
2599 "no SP, sp = %p\n", sp);
2600 return;
2601 }
2602
2603 if (!GET_FW_SENSE_LEN(sp)) {
2604 ql_dbg(ql_dbg_io, vha, 0x304b,
2605 "no fw sense data, sp = %p\n", sp);
2606 return;
2607 }
2608 cp = GET_CMD_SP(sp);
2609 if (cp == NULL) {
2610 ql_log(ql_log_warn, vha, 0x303b,
2611 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
2612
2613 rsp->status_srb = NULL;
2614 return;
2615 }
2616
2617 if (!GET_CMD_SENSE_LEN(sp)) {
2618 ql_dbg(ql_dbg_io, vha, 0x304c,
2619 "no sense data, sp = %p\n", sp);
2620 } else {
2621 sense_len = GET_CMD_SENSE_LEN(sp);
2622 sense_ptr = GET_CMD_SENSE_PTR(sp);
2623 ql_dbg(ql_dbg_io, vha, 0x304f,
2624 "sp=%p sense_len=0x%x sense_ptr=%p.\n",
2625 sp, sense_len, sense_ptr);
2626
2627 if (sense_len > sizeof(pkt->data))
2628 sense_sz = sizeof(pkt->data);
2629 else
2630 sense_sz = sense_len;
2631
2632 /* Move sense data. */
2633 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304e,
2634 (uint8_t *)pkt, sizeof(sts_cont_entry_t));
2635 memcpy(sense_ptr, pkt->data, sense_sz);
2636 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304a,
2637 sense_ptr, sense_sz);
2638
2639 sense_len -= sense_sz;
2640 sense_ptr += sense_sz;
2641
2642 SET_CMD_SENSE_PTR(sp, sense_ptr);
2643 SET_CMD_SENSE_LEN(sp, sense_len);
2644 }
2645 sense_len = GET_FW_SENSE_LEN(sp);
2646 sense_len = (sense_len > sizeof(pkt->data)) ?
2647 (sense_len - sizeof(pkt->data)) : 0;
2648 SET_FW_SENSE_LEN(sp, sense_len);
2649
2650 /* Place command on done queue. */
2651 if (sense_len == 0) {
2652 rsp->status_srb = NULL;
2653 sp->done(ha, sp, cp->result);
2654 }
2655 }
2656
2657 /**
2658 * qlafx00_multistatus_entry() - Process Multi response queue entries.
2659 * @ha: SCSI driver HA context
2660 */
2661 static void
2662 qlafx00_multistatus_entry(struct scsi_qla_host *vha,
2663 struct rsp_que *rsp, void *pkt)
2664 {
2665 srb_t *sp;
2666 struct multi_sts_entry_fx00 *stsmfx;
2667 struct qla_hw_data *ha = vha->hw;
2668 uint32_t handle, hindex, handle_count, i;
2669 uint16_t que;
2670 struct req_que *req;
2671 __le32 *handle_ptr;
2672
2673 stsmfx = (struct multi_sts_entry_fx00 *) pkt;
2674
2675 handle_count = stsmfx->handle_count;
2676
2677 if (handle_count > MAX_HANDLE_COUNT) {
2678 ql_dbg(ql_dbg_io, vha, 0x3035,
2679 "Invalid handle count (0x%x).\n", handle_count);
2680 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2681 qla2xxx_wake_dpc(vha);
2682 return;
2683 }
2684
2685 handle_ptr = &stsmfx->handles[0];
2686
2687 for (i = 0; i < handle_count; i++) {
2688 hindex = le32_to_cpu(*handle_ptr);
2689 handle = LSW(hindex);
2690 que = MSW(hindex);
2691 req = ha->req_q_map[que];
2692
2693 /* Validate handle. */
2694 if (handle < req->num_outstanding_cmds)
2695 sp = req->outstanding_cmds[handle];
2696 else
2697 sp = NULL;
2698
2699 if (sp == NULL) {
2700 ql_dbg(ql_dbg_io, vha, 0x3044,
2701 "Invalid status handle (0x%x).\n", handle);
2702 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2703 qla2xxx_wake_dpc(vha);
2704 return;
2705 }
2706 qla2x00_process_completed_request(vha, req, handle);
2707 handle_ptr++;
2708 }
2709 }
2710
2711 /**
2712 * qlafx00_error_entry() - Process an error entry.
2713 * @ha: SCSI driver HA context
2714 * @pkt: Entry pointer
2715 */
2716 static void
2717 qlafx00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp,
2718 struct sts_entry_fx00 *pkt, uint8_t estatus, uint8_t etype)
2719 {
2720 srb_t *sp;
2721 struct qla_hw_data *ha = vha->hw;
2722 const char func[] = "ERROR-IOCB";
2723 uint16_t que = MSW(pkt->handle);
2724 struct req_que *req = NULL;
2725 int res = DID_ERROR << 16;
2726
2727 ql_dbg(ql_dbg_async, vha, 0x507f,
2728 "type of error status in response: 0x%x\n", estatus);
2729
2730 req = ha->req_q_map[que];
2731
2732 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2733 if (sp) {
2734 sp->done(ha, sp, res);
2735 return;
2736 }
2737
2738 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2739 qla2xxx_wake_dpc(vha);
2740 }
2741
2742 /**
2743 * qlafx00_process_response_queue() - Process response queue entries.
2744 * @ha: SCSI driver HA context
2745 */
2746 static void
2747 qlafx00_process_response_queue(struct scsi_qla_host *vha,
2748 struct rsp_que *rsp)
2749 {
2750 struct sts_entry_fx00 *pkt;
2751 response_t *lptr;
2752
2753 if (!vha->flags.online)
2754 return;
2755
2756 while (RD_REG_DWORD((void __iomem *)&(rsp->ring_ptr->signature)) !=
2757 RESPONSE_PROCESSED) {
2758 lptr = rsp->ring_ptr;
2759 memcpy_fromio(rsp->rsp_pkt, (void __iomem *)lptr,
2760 sizeof(rsp->rsp_pkt));
2761 pkt = (struct sts_entry_fx00 *)rsp->rsp_pkt;
2762
2763 rsp->ring_index++;
2764 if (rsp->ring_index == rsp->length) {
2765 rsp->ring_index = 0;
2766 rsp->ring_ptr = rsp->ring;
2767 } else {
2768 rsp->ring_ptr++;
2769 }
2770
2771 if (pkt->entry_status != 0 &&
2772 pkt->entry_type != IOCTL_IOSB_TYPE_FX00) {
2773 qlafx00_error_entry(vha, rsp,
2774 (struct sts_entry_fx00 *)pkt, pkt->entry_status,
2775 pkt->entry_type);
2776 goto next_iter;
2777 continue;
2778 }
2779
2780 switch (pkt->entry_type) {
2781 case STATUS_TYPE_FX00:
2782 qlafx00_status_entry(vha, rsp, pkt);
2783 break;
2784
2785 case STATUS_CONT_TYPE_FX00:
2786 qlafx00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2787 break;
2788
2789 case MULTI_STATUS_TYPE_FX00:
2790 qlafx00_multistatus_entry(vha, rsp, pkt);
2791 break;
2792
2793 case ABORT_IOCB_TYPE_FX00:
2794 qlafx00_abort_iocb_entry(vha, rsp->req,
2795 (struct abort_iocb_entry_fx00 *)pkt);
2796 break;
2797
2798 case IOCTL_IOSB_TYPE_FX00:
2799 qlafx00_ioctl_iosb_entry(vha, rsp->req,
2800 (struct ioctl_iocb_entry_fx00 *)pkt);
2801 break;
2802 default:
2803 /* Type Not Supported. */
2804 ql_dbg(ql_dbg_async, vha, 0x5081,
2805 "Received unknown response pkt type %x "
2806 "entry status=%x.\n",
2807 pkt->entry_type, pkt->entry_status);
2808 break;
2809 }
2810 next_iter:
2811 WRT_REG_DWORD((void __iomem *)&lptr->signature,
2812 RESPONSE_PROCESSED);
2813 wmb();
2814 }
2815
2816 /* Adjust ring index */
2817 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
2818 }
2819
2820 /**
2821 * qlafx00_async_event() - Process aynchronous events.
2822 * @ha: SCSI driver HA context
2823 */
2824 static void
2825 qlafx00_async_event(scsi_qla_host_t *vha)
2826 {
2827 struct qla_hw_data *ha = vha->hw;
2828 struct device_reg_fx00 __iomem *reg;
2829 int data_size = 1;
2830
2831 reg = &ha->iobase->ispfx00;
2832 /* Setup to process RIO completion. */
2833 switch (ha->aenmb[0]) {
2834 case QLAFX00_MBA_SYSTEM_ERR: /* System Error */
2835 ql_log(ql_log_warn, vha, 0x5079,
2836 "ISP System Error - mbx1=%x\n", ha->aenmb[0]);
2837 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2838 break;
2839
2840 case QLAFX00_MBA_SHUTDOWN_RQSTD: /* Shutdown requested */
2841 ql_dbg(ql_dbg_async, vha, 0x5076,
2842 "Asynchronous FW shutdown requested.\n");
2843 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2844 qla2xxx_wake_dpc(vha);
2845 break;
2846
2847 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
2848 ha->aenmb[1] = RD_REG_WORD(&reg->aenmailbox1);
2849 ha->aenmb[2] = RD_REG_WORD(&reg->aenmailbox2);
2850 ha->aenmb[3] = RD_REG_WORD(&reg->aenmailbox3);
2851 ql_dbg(ql_dbg_async, vha, 0x5077,
2852 "Asynchronous port Update received "
2853 "aenmb[0]: %x, aenmb[1]: %x, aenmb[2]: %x, aenmb[3]: %x\n",
2854 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3]);
2855 data_size = 4;
2856 break;
2857 default:
2858 ha->aenmb[1] = RD_REG_WORD(&reg->aenmailbox1);
2859 ha->aenmb[2] = RD_REG_WORD(&reg->aenmailbox2);
2860 ha->aenmb[3] = RD_REG_WORD(&reg->aenmailbox3);
2861 ha->aenmb[4] = RD_REG_WORD(&reg->aenmailbox4);
2862 ha->aenmb[5] = RD_REG_WORD(&reg->aenmailbox5);
2863 ha->aenmb[6] = RD_REG_WORD(&reg->aenmailbox6);
2864 ha->aenmb[7] = RD_REG_WORD(&reg->aenmailbox7);
2865 ql_dbg(ql_dbg_async, vha, 0x5078,
2866 "AEN:%04x %04x %04x %04x :%04x %04x %04x %04x\n",
2867 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3],
2868 ha->aenmb[4], ha->aenmb[5], ha->aenmb[6], ha->aenmb[7]);
2869 break;
2870 }
2871 qlafx00_post_aenfx_work(vha, ha->aenmb[0],
2872 (uint32_t *)ha->aenmb, data_size);
2873 }
2874
2875 /**
2876 *
2877 * qlafx00x_mbx_completion() - Process mailbox command completions.
2878 * @ha: SCSI driver HA context
2879 * @mb16: Mailbox16 register
2880 */
2881 static void
2882 qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0)
2883 {
2884 uint16_t cnt;
2885 uint16_t __iomem *wptr;
2886 struct qla_hw_data *ha = vha->hw;
2887 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
2888
2889 if (!ha->mcp32)
2890 ql_dbg(ql_dbg_async, vha, 0x507e, "MBX pointer ERROR.\n");
2891
2892 /* Load return mailbox registers. */
2893 ha->flags.mbox_int = 1;
2894 ha->mailbox_out32[0] = mb0;
2895 wptr = (uint16_t __iomem *)&reg->mailbox17;
2896
2897 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
2898 ha->mailbox_out32[cnt] = RD_REG_WORD(wptr);
2899 wptr++;
2900 }
2901 }
2902
2903 /**
2904 * qlafx00_intr_handler() - Process interrupts for the ISPFX00.
2905 * @irq:
2906 * @dev_id: SCSI driver HA context
2907 *
2908 * Called by system whenever the host adapter generates an interrupt.
2909 *
2910 * Returns handled flag.
2911 */
2912 irqreturn_t
2913 qlafx00_intr_handler(int irq, void *dev_id)
2914 {
2915 scsi_qla_host_t *vha;
2916 struct qla_hw_data *ha;
2917 struct device_reg_fx00 __iomem *reg;
2918 int status;
2919 unsigned long iter;
2920 uint32_t stat;
2921 uint32_t mb[8];
2922 struct rsp_que *rsp;
2923 unsigned long flags;
2924 uint32_t clr_intr = 0;
2925
2926 rsp = (struct rsp_que *) dev_id;
2927 if (!rsp) {
2928 ql_log(ql_log_info, NULL, 0x507d,
2929 "%s: NULL response queue pointer.\n", __func__);
2930 return IRQ_NONE;
2931 }
2932
2933 ha = rsp->hw;
2934 reg = &ha->iobase->ispfx00;
2935 status = 0;
2936
2937 if (unlikely(pci_channel_offline(ha->pdev)))
2938 return IRQ_HANDLED;
2939
2940 spin_lock_irqsave(&ha->hardware_lock, flags);
2941 vha = pci_get_drvdata(ha->pdev);
2942 for (iter = 50; iter--; clr_intr = 0) {
2943 stat = QLAFX00_RD_INTR_REG(ha);
2944 if ((stat & QLAFX00_HST_INT_STS_BITS) == 0)
2945 break;
2946
2947 switch (stat & QLAFX00_HST_INT_STS_BITS) {
2948 case QLAFX00_INTR_MB_CMPLT:
2949 case QLAFX00_INTR_MB_RSP_CMPLT:
2950 case QLAFX00_INTR_MB_ASYNC_CMPLT:
2951 case QLAFX00_INTR_ALL_CMPLT:
2952 mb[0] = RD_REG_WORD(&reg->mailbox16);
2953 qlafx00_mbx_completion(vha, mb[0]);
2954 status |= MBX_INTERRUPT;
2955 clr_intr |= QLAFX00_INTR_MB_CMPLT;
2956 break;
2957 case QLAFX00_INTR_ASYNC_CMPLT:
2958 case QLAFX00_INTR_RSP_ASYNC_CMPLT:
2959 ha->aenmb[0] = RD_REG_WORD(&reg->aenmailbox0);
2960 qlafx00_async_event(vha);
2961 clr_intr |= QLAFX00_INTR_ASYNC_CMPLT;
2962 break;
2963 case QLAFX00_INTR_RSP_CMPLT:
2964 qlafx00_process_response_queue(vha, rsp);
2965 clr_intr |= QLAFX00_INTR_RSP_CMPLT;
2966 break;
2967 default:
2968 ql_dbg(ql_dbg_async, vha, 0x507a,
2969 "Unrecognized interrupt type (%d).\n", stat);
2970 break;
2971 }
2972 QLAFX00_CLR_INTR_REG(ha, clr_intr);
2973 QLAFX00_RD_INTR_REG(ha);
2974 }
2975
2976 qla2x00_handle_mbx_completion(ha, status);
2977 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2978
2979 return IRQ_HANDLED;
2980 }
2981
2982 /** QLAFX00 specific IOCB implementation functions */
2983
2984 static inline cont_a64_entry_t *
2985 qlafx00_prep_cont_type1_iocb(struct req_que *req,
2986 cont_a64_entry_t *lcont_pkt)
2987 {
2988 cont_a64_entry_t *cont_pkt;
2989
2990 /* Adjust ring index. */
2991 req->ring_index++;
2992 if (req->ring_index == req->length) {
2993 req->ring_index = 0;
2994 req->ring_ptr = req->ring;
2995 } else {
2996 req->ring_ptr++;
2997 }
2998
2999 cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
3000
3001 /* Load packet defaults. */
3002 lcont_pkt->entry_type = CONTINUE_A64_TYPE_FX00;
3003
3004 return cont_pkt;
3005 }
3006
3007 static inline void
3008 qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt,
3009 uint16_t tot_dsds, struct cmd_type_7_fx00 *lcmd_pkt)
3010 {
3011 uint16_t avail_dsds;
3012 __le32 *cur_dsd;
3013 scsi_qla_host_t *vha;
3014 struct scsi_cmnd *cmd;
3015 struct scatterlist *sg;
3016 int i, cont;
3017 struct req_que *req;
3018 cont_a64_entry_t lcont_pkt;
3019 cont_a64_entry_t *cont_pkt;
3020
3021 vha = sp->fcport->vha;
3022 req = vha->req;
3023
3024 cmd = GET_CMD_SP(sp);
3025 cont = 0;
3026 cont_pkt = NULL;
3027
3028 /* Update entry type to indicate Command Type 3 IOCB */
3029 lcmd_pkt->entry_type = FX00_COMMAND_TYPE_7;
3030
3031 /* No data transfer */
3032 if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
3033 lcmd_pkt->byte_count = __constant_cpu_to_le32(0);
3034 return;
3035 }
3036
3037 /* Set transfer direction */
3038 if (cmd->sc_data_direction == DMA_TO_DEVICE) {
3039 lcmd_pkt->cntrl_flags = TMF_WRITE_DATA;
3040 vha->qla_stats.output_bytes += scsi_bufflen(cmd);
3041 } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
3042 lcmd_pkt->cntrl_flags = TMF_READ_DATA;
3043 vha->qla_stats.input_bytes += scsi_bufflen(cmd);
3044 }
3045
3046 /* One DSD is available in the Command Type 3 IOCB */
3047 avail_dsds = 1;
3048 cur_dsd = (__le32 *)&lcmd_pkt->dseg_0_address;
3049
3050 /* Load data segments */
3051 scsi_for_each_sg(cmd, sg, tot_dsds, i) {
3052 dma_addr_t sle_dma;
3053
3054 /* Allocate additional continuation packets? */
3055 if (avail_dsds == 0) {
3056 /*
3057 * Five DSDs are available in the Continuation
3058 * Type 1 IOCB.
3059 */
3060 memset(&lcont_pkt, 0, REQUEST_ENTRY_SIZE);
3061 cont_pkt =
3062 qlafx00_prep_cont_type1_iocb(req, &lcont_pkt);
3063 cur_dsd = (__le32 *)lcont_pkt.dseg_0_address;
3064 avail_dsds = 5;
3065 cont = 1;
3066 }
3067
3068 sle_dma = sg_dma_address(sg);
3069 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3070 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3071 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3072 avail_dsds--;
3073 if (avail_dsds == 0 && cont == 1) {
3074 cont = 0;
3075 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3076 REQUEST_ENTRY_SIZE);
3077 }
3078
3079 }
3080 if (avail_dsds != 0 && cont == 1) {
3081 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3082 REQUEST_ENTRY_SIZE);
3083 }
3084 }
3085
3086 /**
3087 * qlafx00_start_scsi() - Send a SCSI command to the ISP
3088 * @sp: command to send to the ISP
3089 *
3090 * Returns non-zero if a failure occurred, else zero.
3091 */
3092 int
3093 qlafx00_start_scsi(srb_t *sp)
3094 {
3095 int ret, nseg;
3096 unsigned long flags;
3097 uint32_t index;
3098 uint32_t handle;
3099 uint16_t cnt;
3100 uint16_t req_cnt;
3101 uint16_t tot_dsds;
3102 struct req_que *req = NULL;
3103 struct rsp_que *rsp = NULL;
3104 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
3105 struct scsi_qla_host *vha = sp->fcport->vha;
3106 struct qla_hw_data *ha = vha->hw;
3107 struct cmd_type_7_fx00 *cmd_pkt;
3108 struct cmd_type_7_fx00 lcmd_pkt;
3109 struct scsi_lun llun;
3110 char tag[2];
3111
3112 /* Setup device pointers. */
3113 ret = 0;
3114
3115 rsp = ha->rsp_q_map[0];
3116 req = vha->req;
3117
3118 /* So we know we haven't pci_map'ed anything yet */
3119 tot_dsds = 0;
3120
3121 /* Forcing marker needed for now */
3122 vha->marker_needed = 0;
3123
3124 /* Send marker if required */
3125 if (vha->marker_needed != 0) {
3126 if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
3127 QLA_SUCCESS)
3128 return QLA_FUNCTION_FAILED;
3129 vha->marker_needed = 0;
3130 }
3131
3132 /* Acquire ring specific lock */
3133 spin_lock_irqsave(&ha->hardware_lock, flags);
3134
3135 /* Check for room in outstanding command list. */
3136 handle = req->current_outstanding_cmd;
3137 for (index = 1; index < req->num_outstanding_cmds; index++) {
3138 handle++;
3139 if (handle == req->num_outstanding_cmds)
3140 handle = 1;
3141 if (!req->outstanding_cmds[handle])
3142 break;
3143 }
3144 if (index == req->num_outstanding_cmds)
3145 goto queuing_error;
3146
3147 /* Map the sg table so we have an accurate count of sg entries needed */
3148 if (scsi_sg_count(cmd)) {
3149 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
3150 scsi_sg_count(cmd), cmd->sc_data_direction);
3151 if (unlikely(!nseg))
3152 goto queuing_error;
3153 } else
3154 nseg = 0;
3155
3156 tot_dsds = nseg;
3157 req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
3158 if (req->cnt < (req_cnt + 2)) {
3159 cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
3160
3161 if (req->ring_index < cnt)
3162 req->cnt = cnt - req->ring_index;
3163 else
3164 req->cnt = req->length -
3165 (req->ring_index - cnt);
3166 if (req->cnt < (req_cnt + 2))
3167 goto queuing_error;
3168 }
3169
3170 /* Build command packet. */
3171 req->current_outstanding_cmd = handle;
3172 req->outstanding_cmds[handle] = sp;
3173 sp->handle = handle;
3174 cmd->host_scribble = (unsigned char *)(unsigned long)handle;
3175 req->cnt -= req_cnt;
3176
3177 cmd_pkt = (struct cmd_type_7_fx00 *)req->ring_ptr;
3178
3179 memset(&lcmd_pkt, 0, REQUEST_ENTRY_SIZE);
3180
3181 lcmd_pkt.handle = MAKE_HANDLE(req->id, sp->handle);
3182 lcmd_pkt.handle_hi = 0;
3183 lcmd_pkt.dseg_count = cpu_to_le16(tot_dsds);
3184 lcmd_pkt.tgt_idx = cpu_to_le16(sp->fcport->tgt_id);
3185
3186 int_to_scsilun(cmd->device->lun, &llun);
3187 host_to_adap((uint8_t *)&llun, (uint8_t *)&lcmd_pkt.lun,
3188 sizeof(lcmd_pkt.lun));
3189
3190 /* Update tagged queuing modifier -- default is TSK_SIMPLE (0). */
3191 if (scsi_populate_tag_msg(cmd, tag)) {
3192 switch (tag[0]) {
3193 case HEAD_OF_QUEUE_TAG:
3194 lcmd_pkt.task = TSK_HEAD_OF_QUEUE;
3195 break;
3196 case ORDERED_QUEUE_TAG:
3197 lcmd_pkt.task = TSK_ORDERED;
3198 break;
3199 }
3200 }
3201
3202 /* Load SCSI command packet. */
3203 host_to_adap(cmd->cmnd, lcmd_pkt.fcp_cdb, sizeof(lcmd_pkt.fcp_cdb));
3204 lcmd_pkt.byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
3205
3206 /* Build IOCB segments */
3207 qlafx00_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, &lcmd_pkt);
3208
3209 /* Set total data segment count. */
3210 lcmd_pkt.entry_count = (uint8_t)req_cnt;
3211
3212 /* Specify response queue number where completion should happen */
3213 lcmd_pkt.entry_status = (uint8_t) rsp->id;
3214
3215 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302e,
3216 (uint8_t *)cmd->cmnd, cmd->cmd_len);
3217 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3032,
3218 (uint8_t *)&lcmd_pkt, REQUEST_ENTRY_SIZE);
3219
3220 memcpy_toio((void __iomem *)cmd_pkt, &lcmd_pkt, REQUEST_ENTRY_SIZE);
3221 wmb();
3222
3223 /* Adjust ring index. */
3224 req->ring_index++;
3225 if (req->ring_index == req->length) {
3226 req->ring_index = 0;
3227 req->ring_ptr = req->ring;
3228 } else
3229 req->ring_ptr++;
3230
3231 sp->flags |= SRB_DMA_VALID;
3232
3233 /* Set chip new ring index. */
3234 WRT_REG_DWORD(req->req_q_in, req->ring_index);
3235 QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
3236
3237 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3238 return QLA_SUCCESS;
3239
3240 queuing_error:
3241 if (tot_dsds)
3242 scsi_dma_unmap(cmd);
3243
3244 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3245
3246 return QLA_FUNCTION_FAILED;
3247 }
3248
3249 void
3250 qlafx00_tm_iocb(srb_t *sp, struct tsk_mgmt_entry_fx00 *ptm_iocb)
3251 {
3252 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3253 scsi_qla_host_t *vha = sp->fcport->vha;
3254 struct req_que *req = vha->req;
3255 struct tsk_mgmt_entry_fx00 tm_iocb;
3256 struct scsi_lun llun;
3257
3258 memset(&tm_iocb, 0, sizeof(struct tsk_mgmt_entry_fx00));
3259 tm_iocb.entry_type = TSK_MGMT_IOCB_TYPE_FX00;
3260 tm_iocb.entry_count = 1;
3261 tm_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3262 tm_iocb.handle_hi = 0;
3263 tm_iocb.timeout = cpu_to_le16(qla2x00_get_async_timeout(vha) + 2);
3264 tm_iocb.tgt_id = cpu_to_le16(sp->fcport->tgt_id);
3265 tm_iocb.control_flags = cpu_to_le32(fxio->u.tmf.flags);
3266 if (tm_iocb.control_flags == cpu_to_le32((uint32_t)TCF_LUN_RESET)) {
3267 int_to_scsilun(fxio->u.tmf.lun, &llun);
3268 host_to_adap((uint8_t *)&llun, (uint8_t *)&tm_iocb.lun,
3269 sizeof(struct scsi_lun));
3270 }
3271
3272 memcpy((void *)ptm_iocb, &tm_iocb,
3273 sizeof(struct tsk_mgmt_entry_fx00));
3274 wmb();
3275 }
3276
3277 void
3278 qlafx00_abort_iocb(srb_t *sp, struct abort_iocb_entry_fx00 *pabt_iocb)
3279 {
3280 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3281 scsi_qla_host_t *vha = sp->fcport->vha;
3282 struct req_que *req = vha->req;
3283 struct abort_iocb_entry_fx00 abt_iocb;
3284
3285 memset(&abt_iocb, 0, sizeof(struct abort_iocb_entry_fx00));
3286 abt_iocb.entry_type = ABORT_IOCB_TYPE_FX00;
3287 abt_iocb.entry_count = 1;
3288 abt_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3289 abt_iocb.abort_handle =
3290 cpu_to_le32(MAKE_HANDLE(req->id, fxio->u.abt.cmd_hndl));
3291 abt_iocb.tgt_id_sts = cpu_to_le16(sp->fcport->tgt_id);
3292 abt_iocb.req_que_no = cpu_to_le16(req->id);
3293
3294 memcpy((void *)pabt_iocb, &abt_iocb,
3295 sizeof(struct abort_iocb_entry_fx00));
3296 wmb();
3297 }
3298
3299 void
3300 qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
3301 {
3302 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3303 struct qla_mt_iocb_rqst_fx00 *piocb_rqst;
3304 struct fc_bsg_job *bsg_job;
3305 struct fxdisc_entry_fx00 fx_iocb;
3306 uint8_t entry_cnt = 1;
3307
3308 memset(&fx_iocb, 0, sizeof(struct fxdisc_entry_fx00));
3309 fx_iocb.entry_type = FX00_IOCB_TYPE;
3310 fx_iocb.handle = cpu_to_le32(sp->handle);
3311 fx_iocb.entry_count = entry_cnt;
3312
3313 if (sp->type == SRB_FXIOCB_DCMD) {
3314 fx_iocb.func_num =
3315 sp->u.iocb_cmd.u.fxiocb.req_func_type;
3316 fx_iocb.adapid = fxio->u.fxiocb.adapter_id;
3317 fx_iocb.adapid_hi = fxio->u.fxiocb.adapter_id_hi;
3318 fx_iocb.reserved_0 = fxio->u.fxiocb.reserved_0;
3319 fx_iocb.reserved_1 = fxio->u.fxiocb.reserved_1;
3320 fx_iocb.dataword_extra = fxio->u.fxiocb.req_data_extra;
3321
3322 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
3323 fx_iocb.req_dsdcnt = cpu_to_le16(1);
3324 fx_iocb.req_xfrcnt =
3325 cpu_to_le16(fxio->u.fxiocb.req_len);
3326 fx_iocb.dseg_rq_address[0] =
3327 cpu_to_le32(LSD(fxio->u.fxiocb.req_dma_handle));
3328 fx_iocb.dseg_rq_address[1] =
3329 cpu_to_le32(MSD(fxio->u.fxiocb.req_dma_handle));
3330 fx_iocb.dseg_rq_len =
3331 cpu_to_le32(fxio->u.fxiocb.req_len);
3332 }
3333
3334 if (fxio->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
3335 fx_iocb.rsp_dsdcnt = cpu_to_le16(1);
3336 fx_iocb.rsp_xfrcnt =
3337 cpu_to_le16(fxio->u.fxiocb.rsp_len);
3338 fx_iocb.dseg_rsp_address[0] =
3339 cpu_to_le32(LSD(fxio->u.fxiocb.rsp_dma_handle));
3340 fx_iocb.dseg_rsp_address[1] =
3341 cpu_to_le32(MSD(fxio->u.fxiocb.rsp_dma_handle));
3342 fx_iocb.dseg_rsp_len =
3343 cpu_to_le32(fxio->u.fxiocb.rsp_len);
3344 }
3345
3346 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DWRD_VALID) {
3347 fx_iocb.dataword = fxio->u.fxiocb.req_data;
3348 }
3349 fx_iocb.flags = fxio->u.fxiocb.flags;
3350 } else {
3351 struct scatterlist *sg;
3352 bsg_job = sp->u.bsg_job;
3353 piocb_rqst = (struct qla_mt_iocb_rqst_fx00 *)
3354 &bsg_job->request->rqst_data.h_vendor.vendor_cmd[1];
3355
3356 fx_iocb.func_num = piocb_rqst->func_type;
3357 fx_iocb.adapid = piocb_rqst->adapid;
3358 fx_iocb.adapid_hi = piocb_rqst->adapid_hi;
3359 fx_iocb.reserved_0 = piocb_rqst->reserved_0;
3360 fx_iocb.reserved_1 = piocb_rqst->reserved_1;
3361 fx_iocb.dataword_extra = piocb_rqst->dataword_extra;
3362 fx_iocb.dataword = piocb_rqst->dataword;
3363 fx_iocb.req_xfrcnt = piocb_rqst->req_len;
3364 fx_iocb.rsp_xfrcnt = piocb_rqst->rsp_len;
3365
3366 if (piocb_rqst->flags & SRB_FXDISC_REQ_DMA_VALID) {
3367 int avail_dsds, tot_dsds;
3368 cont_a64_entry_t lcont_pkt;
3369 cont_a64_entry_t *cont_pkt = NULL;
3370 __le32 *cur_dsd;
3371 int index = 0, cont = 0;
3372
3373 fx_iocb.req_dsdcnt =
3374 cpu_to_le16(bsg_job->request_payload.sg_cnt);
3375 tot_dsds =
3376 bsg_job->request_payload.sg_cnt;
3377 cur_dsd = (__le32 *)&fx_iocb.dseg_rq_address[0];
3378 avail_dsds = 1;
3379 for_each_sg(bsg_job->request_payload.sg_list, sg,
3380 tot_dsds, index) {
3381 dma_addr_t sle_dma;
3382
3383 /* Allocate additional continuation packets? */
3384 if (avail_dsds == 0) {
3385 /*
3386 * Five DSDs are available in the Cont.
3387 * Type 1 IOCB.
3388 */
3389 memset(&lcont_pkt, 0,
3390 REQUEST_ENTRY_SIZE);
3391 cont_pkt =
3392 qlafx00_prep_cont_type1_iocb(
3393 sp->fcport->vha->req,
3394 &lcont_pkt);
3395 cur_dsd = (__le32 *)
3396 lcont_pkt.dseg_0_address;
3397 avail_dsds = 5;
3398 cont = 1;
3399 entry_cnt++;
3400 }
3401
3402 sle_dma = sg_dma_address(sg);
3403 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3404 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3405 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3406 avail_dsds--;
3407
3408 if (avail_dsds == 0 && cont == 1) {
3409 cont = 0;
3410 memcpy_toio(
3411 (void __iomem *)cont_pkt,
3412 &lcont_pkt, REQUEST_ENTRY_SIZE);
3413 ql_dump_buffer(
3414 ql_dbg_user + ql_dbg_verbose,
3415 sp->fcport->vha, 0x3042,
3416 (uint8_t *)&lcont_pkt,
3417 REQUEST_ENTRY_SIZE);
3418 }
3419 }
3420 if (avail_dsds != 0 && cont == 1) {
3421 memcpy_toio((void __iomem *)cont_pkt,
3422 &lcont_pkt, REQUEST_ENTRY_SIZE);
3423 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3424 sp->fcport->vha, 0x3043,
3425 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3426 }
3427 }
3428
3429 if (piocb_rqst->flags & SRB_FXDISC_RESP_DMA_VALID) {
3430 int avail_dsds, tot_dsds;
3431 cont_a64_entry_t lcont_pkt;
3432 cont_a64_entry_t *cont_pkt = NULL;
3433 __le32 *cur_dsd;
3434 int index = 0, cont = 0;
3435
3436 fx_iocb.rsp_dsdcnt =
3437 cpu_to_le16(bsg_job->reply_payload.sg_cnt);
3438 tot_dsds = bsg_job->reply_payload.sg_cnt;
3439 cur_dsd = (__le32 *)&fx_iocb.dseg_rsp_address[0];
3440 avail_dsds = 1;
3441
3442 for_each_sg(bsg_job->reply_payload.sg_list, sg,
3443 tot_dsds, index) {
3444 dma_addr_t sle_dma;
3445
3446 /* Allocate additional continuation packets? */
3447 if (avail_dsds == 0) {
3448 /*
3449 * Five DSDs are available in the Cont.
3450 * Type 1 IOCB.
3451 */
3452 memset(&lcont_pkt, 0,
3453 REQUEST_ENTRY_SIZE);
3454 cont_pkt =
3455 qlafx00_prep_cont_type1_iocb(
3456 sp->fcport->vha->req,
3457 &lcont_pkt);
3458 cur_dsd = (__le32 *)
3459 lcont_pkt.dseg_0_address;
3460 avail_dsds = 5;
3461 cont = 1;
3462 entry_cnt++;
3463 }
3464
3465 sle_dma = sg_dma_address(sg);
3466 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3467 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3468 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3469 avail_dsds--;
3470
3471 if (avail_dsds == 0 && cont == 1) {
3472 cont = 0;
3473 memcpy_toio((void __iomem *)cont_pkt,
3474 &lcont_pkt,
3475 REQUEST_ENTRY_SIZE);
3476 ql_dump_buffer(
3477 ql_dbg_user + ql_dbg_verbose,
3478 sp->fcport->vha, 0x3045,
3479 (uint8_t *)&lcont_pkt,
3480 REQUEST_ENTRY_SIZE);
3481 }
3482 }
3483 if (avail_dsds != 0 && cont == 1) {
3484 memcpy_toio((void __iomem *)cont_pkt,
3485 &lcont_pkt, REQUEST_ENTRY_SIZE);
3486 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3487 sp->fcport->vha, 0x3046,
3488 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3489 }
3490 }
3491
3492 if (piocb_rqst->flags & SRB_FXDISC_REQ_DWRD_VALID)
3493 fx_iocb.dataword = piocb_rqst->dataword;
3494 fx_iocb.flags = piocb_rqst->flags;
3495 fx_iocb.entry_count = entry_cnt;
3496 }
3497
3498 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3499 sp->fcport->vha, 0x3047,
3500 (uint8_t *)&fx_iocb, sizeof(struct fxdisc_entry_fx00));
3501
3502 memcpy((void *)pfxiocb, &fx_iocb,
3503 sizeof(struct fxdisc_entry_fx00));
3504 wmb();
3505 }
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