2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
9 #include <linux/moduleparam.h>
10 #include <linux/vmalloc.h>
11 #include <linux/delay.h>
12 #include <linux/kthread.h>
13 #include <linux/mutex.h>
14 #include <linux/kobject.h>
15 #include <linux/slab.h>
16 #include <linux/blk-mq-pci.h>
17 #include <linux/refcount.h>
19 #include <scsi/scsi_tcq.h>
20 #include <scsi/scsicam.h>
21 #include <scsi/scsi_transport.h>
22 #include <scsi/scsi_transport_fc.h>
24 #include "qla_target.h"
29 char qla2x00_version_str
[40];
31 static int apidev_major
;
34 * SRB allocation cache
36 struct kmem_cache
*srb_cachep
;
39 * CT6 CTX allocation cache
41 static struct kmem_cache
*ctx_cachep
;
43 * error level for logging
45 uint ql_errlev
= 0x8001;
47 static int ql2xenableclass2
;
48 module_param(ql2xenableclass2
, int, S_IRUGO
|S_IRUSR
);
49 MODULE_PARM_DESC(ql2xenableclass2
,
50 "Specify if Class 2 operations are supported from the very "
51 "beginning. Default is 0 - class 2 not supported.");
54 int ql2xlogintimeout
= 20;
55 module_param(ql2xlogintimeout
, int, S_IRUGO
);
56 MODULE_PARM_DESC(ql2xlogintimeout
,
57 "Login timeout value in seconds.");
59 int qlport_down_retry
;
60 module_param(qlport_down_retry
, int, S_IRUGO
);
61 MODULE_PARM_DESC(qlport_down_retry
,
62 "Maximum number of command retries to a port that returns "
63 "a PORT-DOWN status.");
65 int ql2xplogiabsentdevice
;
66 module_param(ql2xplogiabsentdevice
, int, S_IRUGO
|S_IWUSR
);
67 MODULE_PARM_DESC(ql2xplogiabsentdevice
,
68 "Option to enable PLOGI to devices that are not present after "
69 "a Fabric scan. This is needed for several broken switches. "
70 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
72 int ql2xloginretrycount
;
73 module_param(ql2xloginretrycount
, int, S_IRUGO
);
74 MODULE_PARM_DESC(ql2xloginretrycount
,
75 "Specify an alternate value for the NVRAM login retry count.");
77 int ql2xallocfwdump
= 1;
78 module_param(ql2xallocfwdump
, int, S_IRUGO
);
79 MODULE_PARM_DESC(ql2xallocfwdump
,
80 "Option to enable allocation of memory for a firmware dump "
81 "during HBA initialization. Memory allocation requirements "
82 "vary by ISP type. Default is 1 - allocate memory.");
84 int ql2xextended_error_logging
;
85 module_param(ql2xextended_error_logging
, int, S_IRUGO
|S_IWUSR
);
86 module_param_named(logging
, ql2xextended_error_logging
, int, S_IRUGO
|S_IWUSR
);
87 MODULE_PARM_DESC(ql2xextended_error_logging
,
88 "Option to enable extended error logging,\n"
89 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n"
90 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
91 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n"
92 "\t\t0x02000000 - Async events. 0x01000000 - Timer routines.\n"
93 "\t\t0x00800000 - User space. 0x00400000 - Task Management.\n"
94 "\t\t0x00200000 - AER/EEH. 0x00100000 - Multi Q.\n"
95 "\t\t0x00080000 - P3P Specific. 0x00040000 - Virtual Port.\n"
96 "\t\t0x00020000 - Buffer Dump. 0x00010000 - Misc.\n"
97 "\t\t0x00008000 - Verbose. 0x00004000 - Target.\n"
98 "\t\t0x00002000 - Target Mgmt. 0x00001000 - Target TMF.\n"
99 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
100 "\t\t0x1e400000 - Preferred value for capturing essential "
101 "debug information (equivalent to old "
102 "ql2xextended_error_logging=1).\n"
103 "\t\tDo LOGICAL OR of the value to enable more than one level");
105 int ql2xshiftctondsd
= 6;
106 module_param(ql2xshiftctondsd
, int, S_IRUGO
);
107 MODULE_PARM_DESC(ql2xshiftctondsd
,
108 "Set to control shifting of command type processing "
109 "based on total number of SG elements.");
111 int ql2xfdmienable
= 1;
112 module_param(ql2xfdmienable
, int, S_IRUGO
|S_IWUSR
);
113 module_param_named(fdmi
, ql2xfdmienable
, int, S_IRUGO
|S_IWUSR
);
114 MODULE_PARM_DESC(ql2xfdmienable
,
115 "Enables FDMI registrations. "
116 "0 - no FDMI. Default is 1 - perform FDMI.");
118 #define MAX_Q_DEPTH 64
119 static int ql2xmaxqdepth
= MAX_Q_DEPTH
;
120 module_param(ql2xmaxqdepth
, int, S_IRUGO
|S_IWUSR
);
121 MODULE_PARM_DESC(ql2xmaxqdepth
,
122 "Maximum queue depth to set for each LUN. "
125 #if (IS_ENABLED(CONFIG_NVME_FC))
128 int ql2xenabledif
= 2;
130 module_param(ql2xenabledif
, int, S_IRUGO
);
131 MODULE_PARM_DESC(ql2xenabledif
,
132 " Enable T10-CRC-DIF:\n"
134 " 0 -- No DIF Support\n"
135 " 1 -- Enable DIF for all types\n"
136 " 2 -- Enable DIF for all types, except Type 0.\n");
138 #if (IS_ENABLED(CONFIG_NVME_FC))
139 int ql2xnvmeenable
= 1;
143 module_param(ql2xnvmeenable
, int, 0644);
144 MODULE_PARM_DESC(ql2xnvmeenable
,
145 "Enables NVME support. "
146 "0 - no NVMe. Default is Y");
148 int ql2xenablehba_err_chk
= 2;
149 module_param(ql2xenablehba_err_chk
, int, S_IRUGO
|S_IWUSR
);
150 MODULE_PARM_DESC(ql2xenablehba_err_chk
,
151 " Enable T10-CRC-DIF Error isolation by HBA:\n"
153 " 0 -- Error isolation disabled\n"
154 " 1 -- Error isolation enabled only for DIX Type 0\n"
155 " 2 -- Error isolation enabled for all Types\n");
157 int ql2xiidmaenable
= 1;
158 module_param(ql2xiidmaenable
, int, S_IRUGO
);
159 MODULE_PARM_DESC(ql2xiidmaenable
,
160 "Enables iIDMA settings "
161 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
163 int ql2xmqsupport
= 1;
164 module_param(ql2xmqsupport
, int, S_IRUGO
);
165 MODULE_PARM_DESC(ql2xmqsupport
,
166 "Enable on demand multiple queue pairs support "
167 "Default is 1 for supported. "
168 "Set it to 0 to turn off mq qpair support.");
171 module_param(ql2xfwloadbin
, int, S_IRUGO
|S_IWUSR
);
172 module_param_named(fwload
, ql2xfwloadbin
, int, S_IRUGO
|S_IWUSR
);
173 MODULE_PARM_DESC(ql2xfwloadbin
,
174 "Option to specify location from which to load ISP firmware:.\n"
175 " 2 -- load firmware via the request_firmware() (hotplug).\n"
177 " 1 -- load firmware from flash.\n"
178 " 0 -- use default semantics.\n");
181 module_param(ql2xetsenable
, int, S_IRUGO
);
182 MODULE_PARM_DESC(ql2xetsenable
,
183 "Enables firmware ETS burst."
184 "Default is 0 - skip ETS enablement.");
187 module_param(ql2xdbwr
, int, S_IRUGO
|S_IWUSR
);
188 MODULE_PARM_DESC(ql2xdbwr
,
189 "Option to specify scheme for request queue posting.\n"
190 " 0 -- Regular doorbell.\n"
191 " 1 -- CAMRAM doorbell (faster).\n");
193 int ql2xtargetreset
= 1;
194 module_param(ql2xtargetreset
, int, S_IRUGO
);
195 MODULE_PARM_DESC(ql2xtargetreset
,
196 "Enable target reset."
197 "Default is 1 - use hw defaults.");
200 module_param(ql2xgffidenable
, int, S_IRUGO
);
201 MODULE_PARM_DESC(ql2xgffidenable
,
202 "Enables GFF_ID checks of port type. "
203 "Default is 0 - Do not use GFF_ID information.");
205 int ql2xasynctmfenable
= 1;
206 module_param(ql2xasynctmfenable
, int, S_IRUGO
);
207 MODULE_PARM_DESC(ql2xasynctmfenable
,
208 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
209 "Default is 1 - Issue TM IOCBs via mailbox mechanism.");
211 int ql2xdontresethba
;
212 module_param(ql2xdontresethba
, int, S_IRUGO
|S_IWUSR
);
213 MODULE_PARM_DESC(ql2xdontresethba
,
214 "Option to specify reset behaviour.\n"
215 " 0 (Default) -- Reset on failure.\n"
216 " 1 -- Do not reset on failure.\n");
218 uint64_t ql2xmaxlun
= MAX_LUNS
;
219 module_param(ql2xmaxlun
, ullong
, S_IRUGO
);
220 MODULE_PARM_DESC(ql2xmaxlun
,
221 "Defines the maximum LU number to register with the SCSI "
222 "midlayer. Default is 65535.");
224 int ql2xmdcapmask
= 0x1F;
225 module_param(ql2xmdcapmask
, int, S_IRUGO
);
226 MODULE_PARM_DESC(ql2xmdcapmask
,
227 "Set the Minidump driver capture mask level. "
228 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
230 int ql2xmdenable
= 1;
231 module_param(ql2xmdenable
, int, S_IRUGO
);
232 MODULE_PARM_DESC(ql2xmdenable
,
233 "Enable/disable MiniDump. "
234 "0 - MiniDump disabled. "
235 "1 (Default) - MiniDump enabled.");
238 module_param(ql2xexlogins
, uint
, S_IRUGO
|S_IWUSR
);
239 MODULE_PARM_DESC(ql2xexlogins
,
240 "Number of extended Logins. "
241 "0 (Default)- Disabled.");
243 int ql2xexchoffld
= 1024;
244 module_param(ql2xexchoffld
, uint
, 0644);
245 MODULE_PARM_DESC(ql2xexchoffld
,
246 "Number of target exchanges.");
248 int ql2xiniexchg
= 1024;
249 module_param(ql2xiniexchg
, uint
, 0644);
250 MODULE_PARM_DESC(ql2xiniexchg
,
251 "Number of initiator exchanges.");
254 module_param(ql2xfwholdabts
, int, S_IRUGO
);
255 MODULE_PARM_DESC(ql2xfwholdabts
,
256 "Allow FW to hold status IOCB until ABTS rsp received. "
257 "0 (Default) Do not set fw option. "
258 "1 - Set fw option to hold ABTS.");
260 int ql2xmvasynctoatio
= 1;
261 module_param(ql2xmvasynctoatio
, int, S_IRUGO
|S_IWUSR
);
262 MODULE_PARM_DESC(ql2xmvasynctoatio
,
263 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
264 "0 (Default). Do not move IOCBs"
267 int ql2xautodetectsfp
= 1;
268 module_param(ql2xautodetectsfp
, int, 0444);
269 MODULE_PARM_DESC(ql2xautodetectsfp
,
270 "Detect SFP range and set appropriate distance.\n"
271 "1 (Default): Enable\n");
273 int ql2xenablemsix
= 1;
274 module_param(ql2xenablemsix
, int, 0444);
275 MODULE_PARM_DESC(ql2xenablemsix
,
276 "Set to enable MSI or MSI-X interrupt mechanism.\n"
277 " Default is 1, enable MSI-X interrupt mechanism.\n"
278 " 0 -- enable traditional pin-based mechanism.\n"
279 " 1 -- enable MSI-X interrupt mechanism.\n"
280 " 2 -- enable MSI interrupt mechanism.\n");
282 int qla2xuseresexchforels
;
283 module_param(qla2xuseresexchforels
, int, 0444);
284 MODULE_PARM_DESC(qla2xuseresexchforels
,
285 "Reserve 1/2 of emergency exchanges for ELS.\n"
286 " 0 (default): disabled");
288 static int ql2xprotmask
;
289 module_param(ql2xprotmask
, int, 0644);
290 MODULE_PARM_DESC(ql2xprotmask
,
291 "Override DIF/DIX protection capabilities mask\n"
292 "Default is 0 which sets protection mask based on "
293 "capabilities reported by HBA firmware.\n");
295 static int ql2xprotguard
;
296 module_param(ql2xprotguard
, int, 0644);
297 MODULE_PARM_DESC(ql2xprotguard
, "Override choice of DIX checksum\n"
298 " 0 -- Let HBA firmware decide\n"
299 " 1 -- Force T10 CRC\n"
300 " 2 -- Force IP checksum\n");
302 int ql2xdifbundlinginternalbuffers
;
303 module_param(ql2xdifbundlinginternalbuffers
, int, 0644);
304 MODULE_PARM_DESC(ql2xdifbundlinginternalbuffers
,
305 "Force using internal buffers for DIF information\n"
306 "0 (Default). Based on check.\n"
307 "1 Force using internal buffers\n");
309 static void qla2x00_clear_drv_active(struct qla_hw_data
*);
310 static void qla2x00_free_device(scsi_qla_host_t
*);
311 static int qla2xxx_map_queues(struct Scsi_Host
*shost
);
312 static void qla2x00_destroy_deferred_work(struct qla_hw_data
*);
315 static struct scsi_transport_template
*qla2xxx_transport_template
= NULL
;
316 struct scsi_transport_template
*qla2xxx_transport_vport_template
= NULL
;
318 /* TODO Convert to inlines
324 qla2x00_start_timer(scsi_qla_host_t
*vha
, unsigned long interval
)
326 timer_setup(&vha
->timer
, qla2x00_timer
, 0);
327 vha
->timer
.expires
= jiffies
+ interval
* HZ
;
328 add_timer(&vha
->timer
);
329 vha
->timer_active
= 1;
333 qla2x00_restart_timer(scsi_qla_host_t
*vha
, unsigned long interval
)
335 /* Currently used for 82XX only. */
336 if (vha
->device_flags
& DFLG_DEV_FAILED
) {
337 ql_dbg(ql_dbg_timer
, vha
, 0x600d,
338 "Device in a failed state, returning.\n");
342 mod_timer(&vha
->timer
, jiffies
+ interval
* HZ
);
345 static __inline__
void
346 qla2x00_stop_timer(scsi_qla_host_t
*vha
)
348 del_timer_sync(&vha
->timer
);
349 vha
->timer_active
= 0;
352 static int qla2x00_do_dpc(void *data
);
354 static void qla2x00_rst_aen(scsi_qla_host_t
*);
356 static int qla2x00_mem_alloc(struct qla_hw_data
*, uint16_t, uint16_t,
357 struct req_que
**, struct rsp_que
**);
358 static void qla2x00_free_fw_dump(struct qla_hw_data
*);
359 static void qla2x00_mem_free(struct qla_hw_data
*);
360 int qla2xxx_mqueuecommand(struct Scsi_Host
*host
, struct scsi_cmnd
*cmd
,
361 struct qla_qpair
*qpair
);
363 /* -------------------------------------------------------------------------- */
364 static void qla_init_base_qpair(struct scsi_qla_host
*vha
, struct req_que
*req
,
367 struct qla_hw_data
*ha
= vha
->hw
;
369 rsp
->qpair
= ha
->base_qpair
;
371 ha
->base_qpair
->hw
= ha
;
372 ha
->base_qpair
->req
= req
;
373 ha
->base_qpair
->rsp
= rsp
;
374 ha
->base_qpair
->vha
= vha
;
375 ha
->base_qpair
->qp_lock_ptr
= &ha
->hardware_lock
;
376 ha
->base_qpair
->use_shadow_reg
= IS_SHADOW_REG_CAPABLE(ha
) ? 1 : 0;
377 ha
->base_qpair
->msix
= &ha
->msix_entries
[QLA_MSIX_RSP_Q
];
378 ha
->base_qpair
->srb_mempool
= ha
->srb_mempool
;
379 INIT_LIST_HEAD(&ha
->base_qpair
->hints_list
);
380 ha
->base_qpair
->enable_class_2
= ql2xenableclass2
;
381 /* init qpair to this cpu. Will adjust at run time. */
382 qla_cpu_update(rsp
->qpair
, raw_smp_processor_id());
383 ha
->base_qpair
->pdev
= ha
->pdev
;
385 if (IS_QLA27XX(ha
) || IS_QLA83XX(ha
) || IS_QLA28XX(ha
))
386 ha
->base_qpair
->reqq_start_iocbs
= qla_83xx_start_iocbs
;
389 static int qla2x00_alloc_queues(struct qla_hw_data
*ha
, struct req_que
*req
,
392 scsi_qla_host_t
*vha
= pci_get_drvdata(ha
->pdev
);
394 ha
->req_q_map
= kcalloc(ha
->max_req_queues
, sizeof(struct req_que
*),
396 if (!ha
->req_q_map
) {
397 ql_log(ql_log_fatal
, vha
, 0x003b,
398 "Unable to allocate memory for request queue ptrs.\n");
402 ha
->rsp_q_map
= kcalloc(ha
->max_rsp_queues
, sizeof(struct rsp_que
*),
404 if (!ha
->rsp_q_map
) {
405 ql_log(ql_log_fatal
, vha
, 0x003c,
406 "Unable to allocate memory for response queue ptrs.\n");
410 ha
->base_qpair
= kzalloc(sizeof(struct qla_qpair
), GFP_KERNEL
);
411 if (ha
->base_qpair
== NULL
) {
412 ql_log(ql_log_warn
, vha
, 0x00e0,
413 "Failed to allocate base queue pair memory.\n");
414 goto fail_base_qpair
;
417 qla_init_base_qpair(vha
, req
, rsp
);
419 if ((ql2xmqsupport
|| ql2xnvmeenable
) && ha
->max_qpairs
) {
420 ha
->queue_pair_map
= kcalloc(ha
->max_qpairs
, sizeof(struct qla_qpair
*),
422 if (!ha
->queue_pair_map
) {
423 ql_log(ql_log_fatal
, vha
, 0x0180,
424 "Unable to allocate memory for queue pair ptrs.\n");
430 * Make sure we record at least the request and response queue zero in
431 * case we need to free them if part of the probe fails.
433 ha
->rsp_q_map
[0] = rsp
;
434 ha
->req_q_map
[0] = req
;
435 set_bit(0, ha
->rsp_qid_map
);
436 set_bit(0, ha
->req_qid_map
);
440 kfree(ha
->base_qpair
);
441 ha
->base_qpair
= NULL
;
443 kfree(ha
->rsp_q_map
);
444 ha
->rsp_q_map
= NULL
;
446 kfree(ha
->req_q_map
);
447 ha
->req_q_map
= NULL
;
452 static void qla2x00_free_req_que(struct qla_hw_data
*ha
, struct req_que
*req
)
454 if (IS_QLAFX00(ha
)) {
455 if (req
&& req
->ring_fx00
)
456 dma_free_coherent(&ha
->pdev
->dev
,
457 (req
->length_fx00
+ 1) * sizeof(request_t
),
458 req
->ring_fx00
, req
->dma_fx00
);
459 } else if (req
&& req
->ring
)
460 dma_free_coherent(&ha
->pdev
->dev
,
461 (req
->length
+ 1) * sizeof(request_t
),
462 req
->ring
, req
->dma
);
465 kfree(req
->outstanding_cmds
);
470 static void qla2x00_free_rsp_que(struct qla_hw_data
*ha
, struct rsp_que
*rsp
)
472 if (IS_QLAFX00(ha
)) {
473 if (rsp
&& rsp
->ring_fx00
)
474 dma_free_coherent(&ha
->pdev
->dev
,
475 (rsp
->length_fx00
+ 1) * sizeof(request_t
),
476 rsp
->ring_fx00
, rsp
->dma_fx00
);
477 } else if (rsp
&& rsp
->ring
) {
478 dma_free_coherent(&ha
->pdev
->dev
,
479 (rsp
->length
+ 1) * sizeof(response_t
),
480 rsp
->ring
, rsp
->dma
);
485 static void qla2x00_free_queues(struct qla_hw_data
*ha
)
492 if (ha
->queue_pair_map
) {
493 kfree(ha
->queue_pair_map
);
494 ha
->queue_pair_map
= NULL
;
496 if (ha
->base_qpair
) {
497 kfree(ha
->base_qpair
);
498 ha
->base_qpair
= NULL
;
501 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
502 for (cnt
= 0; cnt
< ha
->max_req_queues
; cnt
++) {
503 if (!test_bit(cnt
, ha
->req_qid_map
))
506 req
= ha
->req_q_map
[cnt
];
507 clear_bit(cnt
, ha
->req_qid_map
);
508 ha
->req_q_map
[cnt
] = NULL
;
510 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
511 qla2x00_free_req_que(ha
, req
);
512 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
514 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
516 kfree(ha
->req_q_map
);
517 ha
->req_q_map
= NULL
;
520 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
521 for (cnt
= 0; cnt
< ha
->max_rsp_queues
; cnt
++) {
522 if (!test_bit(cnt
, ha
->rsp_qid_map
))
525 rsp
= ha
->rsp_q_map
[cnt
];
526 clear_bit(cnt
, ha
->rsp_qid_map
);
527 ha
->rsp_q_map
[cnt
] = NULL
;
528 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
529 qla2x00_free_rsp_que(ha
, rsp
);
530 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
532 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
534 kfree(ha
->rsp_q_map
);
535 ha
->rsp_q_map
= NULL
;
539 qla2x00_pci_info_str(struct scsi_qla_host
*vha
, char *str
, size_t str_len
)
541 struct qla_hw_data
*ha
= vha
->hw
;
542 static const char *const pci_bus_modes
[] = {
543 "33", "66", "100", "133",
547 pci_bus
= (ha
->pci_attr
& (BIT_9
| BIT_10
)) >> 9;
549 snprintf(str
, str_len
, "PCI-X (%s MHz)",
550 pci_bus_modes
[pci_bus
]);
552 pci_bus
= (ha
->pci_attr
& BIT_8
) >> 8;
553 snprintf(str
, str_len
, "PCI (%s MHz)", pci_bus_modes
[pci_bus
]);
560 qla24xx_pci_info_str(struct scsi_qla_host
*vha
, char *str
, size_t str_len
)
562 static const char *const pci_bus_modes
[] = {
563 "33", "66", "100", "133",
565 struct qla_hw_data
*ha
= vha
->hw
;
568 if (pci_is_pcie(ha
->pdev
)) {
569 uint32_t lstat
, lspeed
, lwidth
;
570 const char *speed_str
;
572 pcie_capability_read_dword(ha
->pdev
, PCI_EXP_LNKCAP
, &lstat
);
573 lspeed
= lstat
& PCI_EXP_LNKCAP_SLS
;
574 lwidth
= (lstat
& PCI_EXP_LNKCAP_MLW
) >> 4;
578 speed_str
= "2.5GT/s";
581 speed_str
= "5.0GT/s";
584 speed_str
= "8.0GT/s";
587 speed_str
= "<unknown>";
590 snprintf(str
, str_len
, "PCIe (%s x%d)", speed_str
, lwidth
);
595 pci_bus
= (ha
->pci_attr
& CSRX_PCIX_BUS_MODE_MASK
) >> 8;
596 if (pci_bus
== 0 || pci_bus
== 8)
597 snprintf(str
, str_len
, "PCI (%s MHz)",
598 pci_bus_modes
[pci_bus
>> 3]);
600 snprintf(str
, str_len
, "PCI-X Mode %d (%s MHz)",
602 pci_bus_modes
[pci_bus
& 3]);
608 qla2x00_fw_version_str(struct scsi_qla_host
*vha
, char *str
, size_t size
)
611 struct qla_hw_data
*ha
= vha
->hw
;
613 snprintf(str
, size
, "%d.%02d.%02d ", ha
->fw_major_version
,
614 ha
->fw_minor_version
, ha
->fw_subminor_version
);
616 if (ha
->fw_attributes
& BIT_9
) {
621 switch (ha
->fw_attributes
& 0xFF) {
635 sprintf(un_str
, "(%x)", ha
->fw_attributes
);
639 if (ha
->fw_attributes
& 0x100)
646 qla24xx_fw_version_str(struct scsi_qla_host
*vha
, char *str
, size_t size
)
648 struct qla_hw_data
*ha
= vha
->hw
;
650 snprintf(str
, size
, "%d.%02d.%02d (%x)", ha
->fw_major_version
,
651 ha
->fw_minor_version
, ha
->fw_subminor_version
, ha
->fw_attributes
);
655 void qla2x00_sp_free_dma(srb_t
*sp
)
657 struct qla_hw_data
*ha
= sp
->vha
->hw
;
658 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
659 void *ctx
= GET_CMD_CTX_SP(sp
);
661 if (sp
->flags
& SRB_DMA_VALID
) {
663 sp
->flags
&= ~SRB_DMA_VALID
;
666 if (sp
->flags
& SRB_CRC_PROT_DMA_VALID
) {
667 dma_unmap_sg(&ha
->pdev
->dev
, scsi_prot_sglist(cmd
),
668 scsi_prot_sg_count(cmd
), cmd
->sc_data_direction
);
669 sp
->flags
&= ~SRB_CRC_PROT_DMA_VALID
;
675 if (sp
->flags
& SRB_CRC_CTX_DSD_VALID
) {
676 /* List assured to be having elements */
677 qla2x00_clean_dsd_pool(ha
, ctx
);
678 sp
->flags
&= ~SRB_CRC_CTX_DSD_VALID
;
681 if (sp
->flags
& SRB_CRC_CTX_DMA_VALID
) {
682 struct crc_context
*ctx0
= ctx
;
684 dma_pool_free(ha
->dl_dma_pool
, ctx0
, ctx0
->crc_ctx_dma
);
685 sp
->flags
&= ~SRB_CRC_CTX_DMA_VALID
;
688 if (sp
->flags
& SRB_FCP_CMND_DMA_VALID
) {
689 struct ct6_dsd
*ctx1
= ctx
;
691 dma_pool_free(ha
->fcp_cmnd_dma_pool
, ctx1
->fcp_cmnd
,
693 list_splice(&ctx1
->dsd_list
, &ha
->gbl_dsd_list
);
694 ha
->gbl_dsd_inuse
-= ctx1
->dsd_use_cnt
;
695 ha
->gbl_dsd_avail
+= ctx1
->dsd_use_cnt
;
696 mempool_free(ctx1
, ha
->ctx_mempool
);
700 void qla2x00_sp_compl(srb_t
*sp
, int res
)
702 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
703 struct completion
*comp
= sp
->comp
;
705 if (WARN_ON_ONCE(atomic_read(&sp
->ref_count
) == 0))
708 atomic_dec(&sp
->ref_count
);
718 void qla2xxx_qpair_sp_free_dma(srb_t
*sp
)
720 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
721 struct qla_hw_data
*ha
= sp
->fcport
->vha
->hw
;
722 void *ctx
= GET_CMD_CTX_SP(sp
);
724 if (sp
->flags
& SRB_DMA_VALID
) {
726 sp
->flags
&= ~SRB_DMA_VALID
;
729 if (sp
->flags
& SRB_CRC_PROT_DMA_VALID
) {
730 dma_unmap_sg(&ha
->pdev
->dev
, scsi_prot_sglist(cmd
),
731 scsi_prot_sg_count(cmd
), cmd
->sc_data_direction
);
732 sp
->flags
&= ~SRB_CRC_PROT_DMA_VALID
;
738 if (sp
->flags
& SRB_CRC_CTX_DSD_VALID
) {
739 /* List assured to be having elements */
740 qla2x00_clean_dsd_pool(ha
, ctx
);
741 sp
->flags
&= ~SRB_CRC_CTX_DSD_VALID
;
744 if (sp
->flags
& SRB_DIF_BUNDL_DMA_VALID
) {
745 struct crc_context
*difctx
= ctx
;
746 struct dsd_dma
*dif_dsd
, *nxt_dsd
;
748 list_for_each_entry_safe(dif_dsd
, nxt_dsd
,
749 &difctx
->ldif_dma_hndl_list
, list
) {
750 list_del(&dif_dsd
->list
);
751 dma_pool_free(ha
->dif_bundl_pool
, dif_dsd
->dsd_addr
,
752 dif_dsd
->dsd_list_dma
);
754 difctx
->no_dif_bundl
--;
757 list_for_each_entry_safe(dif_dsd
, nxt_dsd
,
758 &difctx
->ldif_dsd_list
, list
) {
759 list_del(&dif_dsd
->list
);
760 dma_pool_free(ha
->dl_dma_pool
, dif_dsd
->dsd_addr
,
761 dif_dsd
->dsd_list_dma
);
763 difctx
->no_ldif_dsd
--;
766 if (difctx
->no_ldif_dsd
) {
767 ql_dbg(ql_dbg_tgt
+ql_dbg_verbose
, sp
->vha
, 0xe022,
768 "%s: difctx->no_ldif_dsd=%x\n",
769 __func__
, difctx
->no_ldif_dsd
);
772 if (difctx
->no_dif_bundl
) {
773 ql_dbg(ql_dbg_tgt
+ql_dbg_verbose
, sp
->vha
, 0xe022,
774 "%s: difctx->no_dif_bundl=%x\n",
775 __func__
, difctx
->no_dif_bundl
);
777 sp
->flags
&= ~SRB_DIF_BUNDL_DMA_VALID
;
780 if (sp
->flags
& SRB_FCP_CMND_DMA_VALID
) {
781 struct ct6_dsd
*ctx1
= ctx
;
783 dma_pool_free(ha
->fcp_cmnd_dma_pool
, ctx1
->fcp_cmnd
,
785 list_splice(&ctx1
->dsd_list
, &ha
->gbl_dsd_list
);
786 ha
->gbl_dsd_inuse
-= ctx1
->dsd_use_cnt
;
787 ha
->gbl_dsd_avail
+= ctx1
->dsd_use_cnt
;
788 mempool_free(ctx1
, ha
->ctx_mempool
);
789 sp
->flags
&= ~SRB_FCP_CMND_DMA_VALID
;
792 if (sp
->flags
& SRB_CRC_CTX_DMA_VALID
) {
793 struct crc_context
*ctx0
= ctx
;
795 dma_pool_free(ha
->dl_dma_pool
, ctx
, ctx0
->crc_ctx_dma
);
796 sp
->flags
&= ~SRB_CRC_CTX_DMA_VALID
;
800 void qla2xxx_qpair_sp_compl(srb_t
*sp
, int res
)
802 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
803 struct completion
*comp
= sp
->comp
;
805 if (WARN_ON_ONCE(atomic_read(&sp
->ref_count
) == 0))
808 atomic_dec(&sp
->ref_count
);
819 qla2xxx_queuecommand(struct Scsi_Host
*host
, struct scsi_cmnd
*cmd
)
821 scsi_qla_host_t
*vha
= shost_priv(host
);
822 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
823 struct fc_rport
*rport
= starget_to_rport(scsi_target(cmd
->device
));
824 struct qla_hw_data
*ha
= vha
->hw
;
825 struct scsi_qla_host
*base_vha
= pci_get_drvdata(ha
->pdev
);
829 if (unlikely(test_bit(UNLOADING
, &base_vha
->dpc_flags
)) ||
830 WARN_ON_ONCE(!rport
)) {
831 cmd
->result
= DID_NO_CONNECT
<< 16;
832 goto qc24_fail_command
;
838 struct qla_qpair
*qpair
= NULL
;
840 tag
= blk_mq_unique_tag(cmd
->request
);
841 hwq
= blk_mq_unique_tag_to_hwq(tag
);
842 qpair
= ha
->queue_pair_map
[hwq
];
845 return qla2xxx_mqueuecommand(host
, cmd
, qpair
);
848 if (ha
->flags
.eeh_busy
) {
849 if (ha
->flags
.pci_channel_io_perm_failure
) {
850 ql_dbg(ql_dbg_aer
, vha
, 0x9010,
851 "PCI Channel IO permanent failure, exiting "
853 cmd
->result
= DID_NO_CONNECT
<< 16;
855 ql_dbg(ql_dbg_aer
, vha
, 0x9011,
856 "EEH_Busy, Requeuing the cmd=%p.\n", cmd
);
857 cmd
->result
= DID_REQUEUE
<< 16;
859 goto qc24_fail_command
;
862 rval
= fc_remote_port_chkready(rport
);
865 ql_dbg(ql_dbg_io
+ ql_dbg_verbose
, vha
, 0x3003,
866 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
868 goto qc24_fail_command
;
871 if (!vha
->flags
.difdix_supported
&&
872 scsi_get_prot_op(cmd
) != SCSI_PROT_NORMAL
) {
873 ql_dbg(ql_dbg_io
, vha
, 0x3004,
874 "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
876 cmd
->result
= DID_NO_CONNECT
<< 16;
877 goto qc24_fail_command
;
881 cmd
->result
= DID_NO_CONNECT
<< 16;
882 goto qc24_fail_command
;
885 if (atomic_read(&fcport
->state
) != FCS_ONLINE
) {
886 if (atomic_read(&fcport
->state
) == FCS_DEVICE_DEAD
||
887 atomic_read(&base_vha
->loop_state
) == LOOP_DEAD
) {
888 ql_dbg(ql_dbg_io
, vha
, 0x3005,
889 "Returning DNC, fcport_state=%d loop_state=%d.\n",
890 atomic_read(&fcport
->state
),
891 atomic_read(&base_vha
->loop_state
));
892 cmd
->result
= DID_NO_CONNECT
<< 16;
893 goto qc24_fail_command
;
895 goto qc24_target_busy
;
899 * Return target busy if we've received a non-zero retry_delay_timer
902 if (fcport
->retry_delay_timestamp
== 0) {
903 /* retry delay not set */
904 } else if (time_after(jiffies
, fcport
->retry_delay_timestamp
))
905 fcport
->retry_delay_timestamp
= 0;
907 goto qc24_target_busy
;
909 sp
= scsi_cmd_priv(cmd
);
910 qla2xxx_init_sp(sp
, vha
, vha
->hw
->base_qpair
, fcport
);
912 sp
->u
.scmd
.cmd
= cmd
;
913 sp
->type
= SRB_SCSI_CMD
;
914 atomic_set(&sp
->ref_count
, 1);
915 CMD_SP(cmd
) = (void *)sp
;
916 sp
->free
= qla2x00_sp_free_dma
;
917 sp
->done
= qla2x00_sp_compl
;
919 rval
= ha
->isp_ops
->start_scsi(sp
);
920 if (rval
!= QLA_SUCCESS
) {
921 ql_dbg(ql_dbg_io
+ ql_dbg_verbose
, vha
, 0x3013,
922 "Start scsi failed rval=%d for cmd=%p.\n", rval
, cmd
);
923 goto qc24_host_busy_free_sp
;
928 qc24_host_busy_free_sp
:
932 return SCSI_MLQUEUE_TARGET_BUSY
;
940 /* For MQ supported I/O */
942 qla2xxx_mqueuecommand(struct Scsi_Host
*host
, struct scsi_cmnd
*cmd
,
943 struct qla_qpair
*qpair
)
945 scsi_qla_host_t
*vha
= shost_priv(host
);
946 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
947 struct fc_rport
*rport
= starget_to_rport(scsi_target(cmd
->device
));
948 struct qla_hw_data
*ha
= vha
->hw
;
949 struct scsi_qla_host
*base_vha
= pci_get_drvdata(ha
->pdev
);
953 rval
= rport
? fc_remote_port_chkready(rport
) : FC_PORTSTATE_OFFLINE
;
956 ql_dbg(ql_dbg_io
+ ql_dbg_verbose
, vha
, 0x3076,
957 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
959 goto qc24_fail_command
;
963 cmd
->result
= DID_NO_CONNECT
<< 16;
964 goto qc24_fail_command
;
967 if (atomic_read(&fcport
->state
) != FCS_ONLINE
) {
968 if (atomic_read(&fcport
->state
) == FCS_DEVICE_DEAD
||
969 atomic_read(&base_vha
->loop_state
) == LOOP_DEAD
) {
970 ql_dbg(ql_dbg_io
, vha
, 0x3077,
971 "Returning DNC, fcport_state=%d loop_state=%d.\n",
972 atomic_read(&fcport
->state
),
973 atomic_read(&base_vha
->loop_state
));
974 cmd
->result
= DID_NO_CONNECT
<< 16;
975 goto qc24_fail_command
;
977 goto qc24_target_busy
;
981 * Return target busy if we've received a non-zero retry_delay_timer
984 if (fcport
->retry_delay_timestamp
== 0) {
985 /* retry delay not set */
986 } else if (time_after(jiffies
, fcport
->retry_delay_timestamp
))
987 fcport
->retry_delay_timestamp
= 0;
989 goto qc24_target_busy
;
991 sp
= scsi_cmd_priv(cmd
);
992 qla2xxx_init_sp(sp
, vha
, qpair
, fcport
);
994 sp
->u
.scmd
.cmd
= cmd
;
995 sp
->type
= SRB_SCSI_CMD
;
996 atomic_set(&sp
->ref_count
, 1);
997 CMD_SP(cmd
) = (void *)sp
;
998 sp
->free
= qla2xxx_qpair_sp_free_dma
;
999 sp
->done
= qla2xxx_qpair_sp_compl
;
1002 rval
= ha
->isp_ops
->start_scsi_mq(sp
);
1003 if (rval
!= QLA_SUCCESS
) {
1004 ql_dbg(ql_dbg_io
+ ql_dbg_verbose
, vha
, 0x3078,
1005 "Start scsi failed rval=%d for cmd=%p.\n", rval
, cmd
);
1006 if (rval
== QLA_INTERFACE_ERROR
)
1007 goto qc24_fail_command
;
1008 goto qc24_host_busy_free_sp
;
1013 qc24_host_busy_free_sp
:
1017 return SCSI_MLQUEUE_TARGET_BUSY
;
1020 cmd
->scsi_done(cmd
);
1026 * qla2x00_eh_wait_on_command
1027 * Waits for the command to be returned by the Firmware for some
1031 * cmd = Scsi Command to wait on.
1034 * Completed in time : QLA_SUCCESS
1035 * Did not complete in time : QLA_FUNCTION_FAILED
1038 qla2x00_eh_wait_on_command(struct scsi_cmnd
*cmd
)
1040 #define ABORT_POLLING_PERIOD 1000
1041 #define ABORT_WAIT_ITER ((2 * 1000) / (ABORT_POLLING_PERIOD))
1042 unsigned long wait_iter
= ABORT_WAIT_ITER
;
1043 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1044 struct qla_hw_data
*ha
= vha
->hw
;
1045 int ret
= QLA_SUCCESS
;
1047 if (unlikely(pci_channel_offline(ha
->pdev
)) || ha
->flags
.eeh_busy
) {
1048 ql_dbg(ql_dbg_taskm
, vha
, 0x8005,
1049 "Return:eh_wait.\n");
1053 while (CMD_SP(cmd
) && wait_iter
--) {
1054 msleep(ABORT_POLLING_PERIOD
);
1057 ret
= QLA_FUNCTION_FAILED
;
1063 * qla2x00_wait_for_hba_online
1064 * Wait till the HBA is online after going through
1065 * <= MAX_RETRIES_OF_ISP_ABORT or
1066 * finally HBA is disabled ie marked offline
1069 * ha - pointer to host adapter structure
1072 * Does context switching-Release SPIN_LOCK
1073 * (if any) before calling this routine.
1076 * Success (Adapter is online) : 0
1077 * Failed (Adapter is offline/disabled) : 1
1080 qla2x00_wait_for_hba_online(scsi_qla_host_t
*vha
)
1083 unsigned long wait_online
;
1084 struct qla_hw_data
*ha
= vha
->hw
;
1085 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
1087 wait_online
= jiffies
+ (MAX_LOOP_TIMEOUT
* HZ
);
1088 while (((test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) ||
1089 test_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
) ||
1090 test_bit(ISP_ABORT_RETRY
, &base_vha
->dpc_flags
) ||
1091 ha
->dpc_active
) && time_before(jiffies
, wait_online
)) {
1095 if (base_vha
->flags
.online
)
1096 return_status
= QLA_SUCCESS
;
1098 return_status
= QLA_FUNCTION_FAILED
;
1100 return (return_status
);
1103 static inline int test_fcport_count(scsi_qla_host_t
*vha
)
1105 struct qla_hw_data
*ha
= vha
->hw
;
1106 unsigned long flags
;
1109 spin_lock_irqsave(&ha
->tgt
.sess_lock
, flags
);
1110 ql_dbg(ql_dbg_init
, vha
, 0x00ec,
1111 "tgt %p, fcport_count=%d\n",
1112 vha
, vha
->fcport_count
);
1113 res
= (vha
->fcport_count
== 0);
1114 spin_unlock_irqrestore(&ha
->tgt
.sess_lock
, flags
);
1120 * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1121 * it has dependency on UNLOADING flag to stop device discovery
1124 qla2x00_wait_for_sess_deletion(scsi_qla_host_t
*vha
)
1126 qla2x00_mark_all_devices_lost(vha
, 0);
1128 wait_event_timeout(vha
->fcport_waitQ
, test_fcport_count(vha
), 10*HZ
);
1132 * qla2x00_wait_for_hba_ready
1133 * Wait till the HBA is ready before doing driver unload
1136 * ha - pointer to host adapter structure
1139 * Does context switching-Release SPIN_LOCK
1140 * (if any) before calling this routine.
1144 qla2x00_wait_for_hba_ready(scsi_qla_host_t
*vha
)
1146 struct qla_hw_data
*ha
= vha
->hw
;
1147 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
1149 while ((qla2x00_reset_active(vha
) || ha
->dpc_active
||
1150 ha
->flags
.mbox_busy
) ||
1151 test_bit(FX00_RESET_RECOVERY
, &vha
->dpc_flags
) ||
1152 test_bit(FX00_TARGET_SCAN
, &vha
->dpc_flags
)) {
1153 if (test_bit(UNLOADING
, &base_vha
->dpc_flags
))
1160 qla2x00_wait_for_chip_reset(scsi_qla_host_t
*vha
)
1163 unsigned long wait_reset
;
1164 struct qla_hw_data
*ha
= vha
->hw
;
1165 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
1167 wait_reset
= jiffies
+ (MAX_LOOP_TIMEOUT
* HZ
);
1168 while (((test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) ||
1169 test_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
) ||
1170 test_bit(ISP_ABORT_RETRY
, &base_vha
->dpc_flags
) ||
1171 ha
->dpc_active
) && time_before(jiffies
, wait_reset
)) {
1175 if (!test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
) &&
1176 ha
->flags
.chip_reset_done
)
1179 if (ha
->flags
.chip_reset_done
)
1180 return_status
= QLA_SUCCESS
;
1182 return_status
= QLA_FUNCTION_FAILED
;
1184 return return_status
;
1188 sp_get(struct srb
*sp
)
1190 if (!refcount_inc_not_zero((refcount_t
*)&sp
->ref_count
))
1197 #define ISP_REG_DISCONNECT 0xffffffffU
1198 /**************************************************************************
1199 * qla2x00_isp_reg_stat
1202 * Read the host status register of ISP before aborting the command.
1205 * ha = pointer to host adapter structure.
1209 * Either true or false.
1211 * Note: Return true if there is register disconnect.
1212 **************************************************************************/
1214 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data
*ha
)
1216 struct device_reg_24xx __iomem
*reg
= &ha
->iobase
->isp24
;
1217 struct device_reg_82xx __iomem
*reg82
= &ha
->iobase
->isp82
;
1219 if (IS_P3P_TYPE(ha
))
1220 return ((RD_REG_DWORD(®82
->host_int
)) == ISP_REG_DISCONNECT
);
1222 return ((RD_REG_DWORD(®
->host_status
)) ==
1223 ISP_REG_DISCONNECT
);
1226 /**************************************************************************
1230 * The abort function will abort the specified command.
1233 * cmd = Linux SCSI command packet to be aborted.
1236 * Either SUCCESS or FAILED.
1239 * Only return FAILED if command not returned by firmware.
1240 **************************************************************************/
1242 qla2xxx_eh_abort(struct scsi_cmnd
*cmd
)
1244 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1245 DECLARE_COMPLETION_ONSTACK(comp
);
1251 struct qla_hw_data
*ha
= vha
->hw
;
1253 if (qla2x00_isp_reg_stat(ha
)) {
1254 ql_log(ql_log_info
, vha
, 0x8042,
1255 "PCI/Register disconnect, exiting.\n");
1259 ret
= fc_block_scsi_eh(cmd
);
1263 sp
= scsi_cmd_priv(cmd
);
1265 if (sp
->fcport
&& sp
->fcport
->deleted
)
1268 /* Return if the command has already finished. */
1272 id
= cmd
->device
->id
;
1273 lun
= cmd
->device
->lun
;
1275 ql_dbg(ql_dbg_taskm
, vha
, 0x8002,
1276 "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1277 vha
->host_no
, id
, lun
, sp
, cmd
, sp
->handle
);
1279 rval
= ha
->isp_ops
->abort_command(sp
);
1280 ql_dbg(ql_dbg_taskm
, vha
, 0x8003,
1281 "Abort command mbx cmd=%p, rval=%x.\n", cmd
, rval
);
1286 * The command has been aborted. That means that the firmware
1287 * won't report a completion.
1289 sp
->done(sp
, DID_ABORT
<< 16);
1292 case QLA_FUNCTION_PARAMETER_ERROR
: {
1293 /* Wait for the command completion. */
1294 uint32_t ratov
= ha
->r_a_tov
/10;
1295 uint32_t ratov_j
= msecs_to_jiffies(4 * ratov
* 1000);
1297 WARN_ON_ONCE(sp
->comp
);
1299 if (!wait_for_completion_timeout(&comp
, ratov_j
)) {
1300 ql_dbg(ql_dbg_taskm
, vha
, 0xffff,
1301 "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1302 __func__
, ha
->r_a_tov
);
1311 * Either abort failed or abort and completion raced. Let
1312 * the SCSI core retry the abort in the former case.
1319 atomic_dec(&sp
->ref_count
);
1320 ql_log(ql_log_info
, vha
, 0x801c,
1321 "Abort command issued nexus=%ld:%d:%llu -- %x.\n",
1322 vha
->host_no
, id
, lun
, ret
);
1328 * Returns: QLA_SUCCESS or QLA_FUNCTION_FAILED.
1331 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t
*vha
, unsigned int t
,
1332 uint64_t l
, enum nexus_wait_type type
)
1334 int cnt
, match
, status
;
1335 unsigned long flags
;
1336 struct qla_hw_data
*ha
= vha
->hw
;
1337 struct req_que
*req
;
1339 struct scsi_cmnd
*cmd
;
1341 status
= QLA_SUCCESS
;
1343 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1345 for (cnt
= 1; status
== QLA_SUCCESS
&&
1346 cnt
< req
->num_outstanding_cmds
; cnt
++) {
1347 sp
= req
->outstanding_cmds
[cnt
];
1350 if (sp
->type
!= SRB_SCSI_CMD
)
1352 if (vha
->vp_idx
!= sp
->vha
->vp_idx
)
1355 cmd
= GET_CMD_SP(sp
);
1361 match
= cmd
->device
->id
== t
;
1364 match
= (cmd
->device
->id
== t
&&
1365 cmd
->device
->lun
== l
);
1371 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1372 status
= qla2x00_eh_wait_on_command(cmd
);
1373 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1375 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1380 static char *reset_errors
[] = {
1383 "Task management failed",
1384 "Waiting for command completions",
1388 __qla2xxx_eh_generic_reset(char *name
, enum nexus_wait_type type
,
1389 struct scsi_cmnd
*cmd
, int (*do_reset
)(struct fc_port
*, uint64_t, int))
1391 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1392 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
1399 err
= fc_block_scsi_eh(cmd
);
1403 if (fcport
->deleted
)
1406 ql_log(ql_log_info
, vha
, 0x8009,
1407 "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name
, vha
->host_no
,
1408 cmd
->device
->id
, cmd
->device
->lun
, cmd
);
1411 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1412 ql_log(ql_log_warn
, vha
, 0x800a,
1413 "Wait for hba online failed for cmd=%p.\n", cmd
);
1414 goto eh_reset_failed
;
1417 if (do_reset(fcport
, cmd
->device
->lun
, 1)
1419 ql_log(ql_log_warn
, vha
, 0x800c,
1420 "do_reset failed for cmd=%p.\n", cmd
);
1421 goto eh_reset_failed
;
1424 if (qla2x00_eh_wait_for_pending_commands(vha
, cmd
->device
->id
,
1425 cmd
->device
->lun
, type
) != QLA_SUCCESS
) {
1426 ql_log(ql_log_warn
, vha
, 0x800d,
1427 "wait for pending cmds failed for cmd=%p.\n", cmd
);
1428 goto eh_reset_failed
;
1431 ql_log(ql_log_info
, vha
, 0x800e,
1432 "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name
,
1433 vha
->host_no
, cmd
->device
->id
, cmd
->device
->lun
, cmd
);
1438 ql_log(ql_log_info
, vha
, 0x800f,
1439 "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name
,
1440 reset_errors
[err
], vha
->host_no
, cmd
->device
->id
, cmd
->device
->lun
,
1446 qla2xxx_eh_device_reset(struct scsi_cmnd
*cmd
)
1448 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1449 struct qla_hw_data
*ha
= vha
->hw
;
1451 if (qla2x00_isp_reg_stat(ha
)) {
1452 ql_log(ql_log_info
, vha
, 0x803e,
1453 "PCI/Register disconnect, exiting.\n");
1457 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN
, cmd
,
1458 ha
->isp_ops
->lun_reset
);
1462 qla2xxx_eh_target_reset(struct scsi_cmnd
*cmd
)
1464 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1465 struct qla_hw_data
*ha
= vha
->hw
;
1467 if (qla2x00_isp_reg_stat(ha
)) {
1468 ql_log(ql_log_info
, vha
, 0x803f,
1469 "PCI/Register disconnect, exiting.\n");
1473 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET
, cmd
,
1474 ha
->isp_ops
->target_reset
);
1477 /**************************************************************************
1478 * qla2xxx_eh_bus_reset
1481 * The bus reset function will reset the bus and abort any executing
1485 * cmd = Linux SCSI command packet of the command that cause the
1489 * SUCCESS/FAILURE (defined as macro in scsi.h).
1491 **************************************************************************/
1493 qla2xxx_eh_bus_reset(struct scsi_cmnd
*cmd
)
1495 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1496 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
1500 struct qla_hw_data
*ha
= vha
->hw
;
1502 if (qla2x00_isp_reg_stat(ha
)) {
1503 ql_log(ql_log_info
, vha
, 0x8040,
1504 "PCI/Register disconnect, exiting.\n");
1508 id
= cmd
->device
->id
;
1509 lun
= cmd
->device
->lun
;
1515 ret
= fc_block_scsi_eh(cmd
);
1520 if (qla2x00_chip_is_down(vha
))
1523 ql_log(ql_log_info
, vha
, 0x8012,
1524 "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha
->host_no
, id
, lun
);
1526 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1527 ql_log(ql_log_fatal
, vha
, 0x8013,
1528 "Wait for hba online failed board disabled.\n");
1529 goto eh_bus_reset_done
;
1532 if (qla2x00_loop_reset(vha
) == QLA_SUCCESS
)
1536 goto eh_bus_reset_done
;
1538 /* Flush outstanding commands. */
1539 if (qla2x00_eh_wait_for_pending_commands(vha
, 0, 0, WAIT_HOST
) !=
1541 ql_log(ql_log_warn
, vha
, 0x8014,
1542 "Wait for pending commands failed.\n");
1547 ql_log(ql_log_warn
, vha
, 0x802b,
1548 "BUS RESET %s nexus=%ld:%d:%llu.\n",
1549 (ret
== FAILED
) ? "FAILED" : "SUCCEEDED", vha
->host_no
, id
, lun
);
1554 /**************************************************************************
1555 * qla2xxx_eh_host_reset
1558 * The reset function will reset the Adapter.
1561 * cmd = Linux SCSI command packet of the command that cause the
1565 * Either SUCCESS or FAILED.
1568 **************************************************************************/
1570 qla2xxx_eh_host_reset(struct scsi_cmnd
*cmd
)
1572 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1573 struct qla_hw_data
*ha
= vha
->hw
;
1577 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
1579 if (qla2x00_isp_reg_stat(ha
)) {
1580 ql_log(ql_log_info
, vha
, 0x8041,
1581 "PCI/Register disconnect, exiting.\n");
1582 schedule_work(&ha
->board_disable
);
1586 id
= cmd
->device
->id
;
1587 lun
= cmd
->device
->lun
;
1589 ql_log(ql_log_info
, vha
, 0x8018,
1590 "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha
->host_no
, id
, lun
);
1593 * No point in issuing another reset if one is active. Also do not
1594 * attempt a reset if we are updating flash.
1596 if (qla2x00_reset_active(vha
) || ha
->optrom_state
!= QLA_SWAITING
)
1597 goto eh_host_reset_lock
;
1599 if (vha
!= base_vha
) {
1600 if (qla2x00_vp_abort_isp(vha
))
1601 goto eh_host_reset_lock
;
1603 if (IS_P3P_TYPE(vha
->hw
)) {
1604 if (!qla82xx_fcoe_ctx_reset(vha
)) {
1605 /* Ctx reset success */
1607 goto eh_host_reset_lock
;
1609 /* fall thru if ctx reset failed */
1612 flush_workqueue(ha
->wq
);
1614 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1615 if (ha
->isp_ops
->abort_isp(base_vha
)) {
1616 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1617 /* failed. schedule dpc to try */
1618 set_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
);
1620 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1621 ql_log(ql_log_warn
, vha
, 0x802a,
1622 "wait for hba online failed.\n");
1623 goto eh_host_reset_lock
;
1626 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1629 /* Waiting for command to be returned to OS.*/
1630 if (qla2x00_eh_wait_for_pending_commands(vha
, 0, 0, WAIT_HOST
) ==
1635 ql_log(ql_log_info
, vha
, 0x8017,
1636 "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1637 (ret
== FAILED
) ? "FAILED" : "SUCCEEDED", vha
->host_no
, id
, lun
);
1643 * qla2x00_loop_reset
1647 * ha = adapter block pointer.
1653 qla2x00_loop_reset(scsi_qla_host_t
*vha
)
1656 struct fc_port
*fcport
;
1657 struct qla_hw_data
*ha
= vha
->hw
;
1659 if (IS_QLAFX00(ha
)) {
1660 return qlafx00_loop_reset(vha
);
1663 if (ql2xtargetreset
== 1 && ha
->flags
.enable_target_reset
) {
1664 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
1665 if (fcport
->port_type
!= FCT_TARGET
)
1668 ret
= ha
->isp_ops
->target_reset(fcport
, 0, 0);
1669 if (ret
!= QLA_SUCCESS
) {
1670 ql_dbg(ql_dbg_taskm
, vha
, 0x802c,
1671 "Bus Reset failed: Reset=%d "
1672 "d_id=%x.\n", ret
, fcport
->d_id
.b24
);
1678 if (ha
->flags
.enable_lip_full_login
&& !IS_CNA_CAPABLE(ha
)) {
1679 atomic_set(&vha
->loop_state
, LOOP_DOWN
);
1680 atomic_set(&vha
->loop_down_timer
, LOOP_DOWN_TIME
);
1681 qla2x00_mark_all_devices_lost(vha
, 0);
1682 ret
= qla2x00_full_login_lip(vha
);
1683 if (ret
!= QLA_SUCCESS
) {
1684 ql_dbg(ql_dbg_taskm
, vha
, 0x802d,
1685 "full_login_lip=%d.\n", ret
);
1689 if (ha
->flags
.enable_lip_reset
) {
1690 ret
= qla2x00_lip_reset(vha
);
1691 if (ret
!= QLA_SUCCESS
)
1692 ql_dbg(ql_dbg_taskm
, vha
, 0x802e,
1693 "lip_reset failed (%d).\n", ret
);
1696 /* Issue marker command only when we are going to start the I/O */
1697 vha
->marker_needed
= 1;
1702 static void qla2x00_abort_srb(struct qla_qpair
*qp
, srb_t
*sp
, const int res
,
1703 unsigned long *flags
)
1704 __releases(qp
->qp_lock_ptr
)
1705 __acquires(qp
->qp_lock_ptr
)
1707 DECLARE_COMPLETION_ONSTACK(comp
);
1708 scsi_qla_host_t
*vha
= qp
->vha
;
1709 struct qla_hw_data
*ha
= vha
->hw
;
1715 if (sp
->type
== SRB_NVME_CMD
|| sp
->type
== SRB_NVME_LS
||
1716 (sp
->type
== SRB_SCSI_CMD
&& !ha
->flags
.eeh_busy
&&
1717 !test_bit(ABORT_ISP_ACTIVE
, &vha
->dpc_flags
) &&
1718 !qla2x00_isp_reg_stat(ha
))) {
1720 spin_unlock_irqrestore(qp
->qp_lock_ptr
, *flags
);
1721 rval
= ha
->isp_ops
->abort_command(sp
);
1727 case QLA_FUNCTION_PARAMETER_ERROR
:
1728 wait_for_completion(&comp
);
1732 spin_lock_irqsave(qp
->qp_lock_ptr
, *flags
);
1736 atomic_dec(&sp
->ref_count
);
1740 __qla2x00_abort_all_cmds(struct qla_qpair
*qp
, int res
)
1743 unsigned long flags
;
1745 scsi_qla_host_t
*vha
= qp
->vha
;
1746 struct qla_hw_data
*ha
= vha
->hw
;
1747 struct req_que
*req
;
1748 struct qla_tgt
*tgt
= vha
->vha_tgt
.qla_tgt
;
1749 struct qla_tgt_cmd
*cmd
;
1753 spin_lock_irqsave(qp
->qp_lock_ptr
, flags
);
1755 for (cnt
= 1; cnt
< req
->num_outstanding_cmds
; cnt
++) {
1756 sp
= req
->outstanding_cmds
[cnt
];
1758 req
->outstanding_cmds
[cnt
] = NULL
;
1759 switch (sp
->cmd_type
) {
1761 qla2x00_abort_srb(qp
, sp
, res
, &flags
);
1764 if (!vha
->hw
->tgt
.tgt_ops
|| !tgt
||
1765 qla_ini_mode_enabled(vha
)) {
1766 ql_dbg(ql_dbg_tgt_mgt
, vha
, 0xf003,
1767 "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1771 cmd
= (struct qla_tgt_cmd
*)sp
;
1774 case TYPE_TGT_TMCMD
:
1775 /* Skip task management functions. */
1782 spin_unlock_irqrestore(qp
->qp_lock_ptr
, flags
);
1786 qla2x00_abort_all_cmds(scsi_qla_host_t
*vha
, int res
)
1789 struct qla_hw_data
*ha
= vha
->hw
;
1791 /* Continue only if initialization complete. */
1792 if (!ha
->base_qpair
)
1794 __qla2x00_abort_all_cmds(ha
->base_qpair
, res
);
1796 if (!ha
->queue_pair_map
)
1798 for (que
= 0; que
< ha
->max_qpairs
; que
++) {
1799 if (!ha
->queue_pair_map
[que
])
1802 __qla2x00_abort_all_cmds(ha
->queue_pair_map
[que
], res
);
1807 qla2xxx_slave_alloc(struct scsi_device
*sdev
)
1809 struct fc_rport
*rport
= starget_to_rport(scsi_target(sdev
));
1811 if (!rport
|| fc_remote_port_chkready(rport
))
1814 sdev
->hostdata
= *(fc_port_t
**)rport
->dd_data
;
1820 qla2xxx_slave_configure(struct scsi_device
*sdev
)
1822 scsi_qla_host_t
*vha
= shost_priv(sdev
->host
);
1823 struct req_que
*req
= vha
->req
;
1825 if (IS_T10_PI_CAPABLE(vha
->hw
))
1826 blk_queue_update_dma_alignment(sdev
->request_queue
, 0x7);
1828 scsi_change_queue_depth(sdev
, req
->max_q_depth
);
1833 qla2xxx_slave_destroy(struct scsi_device
*sdev
)
1835 sdev
->hostdata
= NULL
;
1839 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1842 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1843 * supported addressing method.
1846 qla2x00_config_dma_addressing(struct qla_hw_data
*ha
)
1848 /* Assume a 32bit DMA mask. */
1849 ha
->flags
.enable_64bit_addressing
= 0;
1851 if (!dma_set_mask(&ha
->pdev
->dev
, DMA_BIT_MASK(64))) {
1852 /* Any upper-dword bits set? */
1853 if (MSD(dma_get_required_mask(&ha
->pdev
->dev
)) &&
1854 !pci_set_consistent_dma_mask(ha
->pdev
, DMA_BIT_MASK(64))) {
1855 /* Ok, a 64bit DMA mask is applicable. */
1856 ha
->flags
.enable_64bit_addressing
= 1;
1857 ha
->isp_ops
->calc_req_entries
= qla2x00_calc_iocbs_64
;
1858 ha
->isp_ops
->build_iocbs
= qla2x00_build_scsi_iocbs_64
;
1863 dma_set_mask(&ha
->pdev
->dev
, DMA_BIT_MASK(32));
1864 pci_set_consistent_dma_mask(ha
->pdev
, DMA_BIT_MASK(32));
1868 qla2x00_enable_intrs(struct qla_hw_data
*ha
)
1870 unsigned long flags
= 0;
1871 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
1873 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1874 ha
->interrupts_on
= 1;
1875 /* enable risc and host interrupts */
1876 WRT_REG_WORD(®
->ictrl
, ICR_EN_INT
| ICR_EN_RISC
);
1877 RD_REG_WORD(®
->ictrl
);
1878 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1883 qla2x00_disable_intrs(struct qla_hw_data
*ha
)
1885 unsigned long flags
= 0;
1886 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
1888 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1889 ha
->interrupts_on
= 0;
1890 /* disable risc and host interrupts */
1891 WRT_REG_WORD(®
->ictrl
, 0);
1892 RD_REG_WORD(®
->ictrl
);
1893 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1897 qla24xx_enable_intrs(struct qla_hw_data
*ha
)
1899 unsigned long flags
= 0;
1900 struct device_reg_24xx __iomem
*reg
= &ha
->iobase
->isp24
;
1902 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1903 ha
->interrupts_on
= 1;
1904 WRT_REG_DWORD(®
->ictrl
, ICRX_EN_RISC_INT
);
1905 RD_REG_DWORD(®
->ictrl
);
1906 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1910 qla24xx_disable_intrs(struct qla_hw_data
*ha
)
1912 unsigned long flags
= 0;
1913 struct device_reg_24xx __iomem
*reg
= &ha
->iobase
->isp24
;
1915 if (IS_NOPOLLING_TYPE(ha
))
1917 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1918 ha
->interrupts_on
= 0;
1919 WRT_REG_DWORD(®
->ictrl
, 0);
1920 RD_REG_DWORD(®
->ictrl
);
1921 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1925 qla2x00_iospace_config(struct qla_hw_data
*ha
)
1927 resource_size_t pio
;
1930 if (pci_request_selected_regions(ha
->pdev
, ha
->bars
,
1931 QLA2XXX_DRIVER_NAME
)) {
1932 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0011,
1933 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1934 pci_name(ha
->pdev
));
1935 goto iospace_error_exit
;
1937 if (!(ha
->bars
& 1))
1940 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1941 pio
= pci_resource_start(ha
->pdev
, 0);
1942 if (pci_resource_flags(ha
->pdev
, 0) & IORESOURCE_IO
) {
1943 if (pci_resource_len(ha
->pdev
, 0) < MIN_IOBASE_LEN
) {
1944 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0012,
1945 "Invalid pci I/O region size (%s).\n",
1946 pci_name(ha
->pdev
));
1950 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0013,
1951 "Region #0 no a PIO resource (%s).\n",
1952 pci_name(ha
->pdev
));
1955 ha
->pio_address
= pio
;
1956 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0014,
1957 "PIO address=%llu.\n",
1958 (unsigned long long)ha
->pio_address
);
1961 /* Use MMIO operations for all accesses. */
1962 if (!(pci_resource_flags(ha
->pdev
, 1) & IORESOURCE_MEM
)) {
1963 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0015,
1964 "Region #1 not an MMIO resource (%s), aborting.\n",
1965 pci_name(ha
->pdev
));
1966 goto iospace_error_exit
;
1968 if (pci_resource_len(ha
->pdev
, 1) < MIN_IOBASE_LEN
) {
1969 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0016,
1970 "Invalid PCI mem region size (%s), aborting.\n",
1971 pci_name(ha
->pdev
));
1972 goto iospace_error_exit
;
1975 ha
->iobase
= ioremap(pci_resource_start(ha
->pdev
, 1), MIN_IOBASE_LEN
);
1977 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0017,
1978 "Cannot remap MMIO (%s), aborting.\n",
1979 pci_name(ha
->pdev
));
1980 goto iospace_error_exit
;
1983 /* Determine queue resources */
1984 ha
->max_req_queues
= ha
->max_rsp_queues
= 1;
1985 ha
->msix_count
= QLA_BASE_VECTORS
;
1986 if (!ql2xmqsupport
|| !ql2xnvmeenable
||
1987 (!IS_QLA25XX(ha
) && !IS_QLA81XX(ha
)))
1990 ha
->mqiobase
= ioremap(pci_resource_start(ha
->pdev
, 3),
1991 pci_resource_len(ha
->pdev
, 3));
1993 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0018,
1994 "MQIO Base=%p.\n", ha
->mqiobase
);
1995 /* Read MSIX vector size of the board */
1996 pci_read_config_word(ha
->pdev
, QLA_PCI_MSIX_CONTROL
, &msix
);
1997 ha
->msix_count
= msix
+ 1;
1998 /* Max queues are bounded by available msix vectors */
1999 /* MB interrupt uses 1 vector */
2000 ha
->max_req_queues
= ha
->msix_count
- 1;
2001 ha
->max_rsp_queues
= ha
->max_req_queues
;
2002 /* Queue pairs is the max value minus the base queue pair */
2003 ha
->max_qpairs
= ha
->max_rsp_queues
- 1;
2004 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0188,
2005 "Max no of queues pairs: %d.\n", ha
->max_qpairs
);
2007 ql_log_pci(ql_log_info
, ha
->pdev
, 0x001a,
2008 "MSI-X vector count: %d.\n", ha
->msix_count
);
2010 ql_log_pci(ql_log_info
, ha
->pdev
, 0x001b,
2011 "BAR 3 not enabled.\n");
2014 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x001c,
2015 "MSIX Count: %d.\n", ha
->msix_count
);
2024 qla83xx_iospace_config(struct qla_hw_data
*ha
)
2028 if (pci_request_selected_regions(ha
->pdev
, ha
->bars
,
2029 QLA2XXX_DRIVER_NAME
)) {
2030 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0117,
2031 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2032 pci_name(ha
->pdev
));
2034 goto iospace_error_exit
;
2037 /* Use MMIO operations for all accesses. */
2038 if (!(pci_resource_flags(ha
->pdev
, 0) & IORESOURCE_MEM
)) {
2039 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0118,
2040 "Invalid pci I/O region size (%s).\n",
2041 pci_name(ha
->pdev
));
2042 goto iospace_error_exit
;
2044 if (pci_resource_len(ha
->pdev
, 0) < MIN_IOBASE_LEN
) {
2045 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0119,
2046 "Invalid PCI mem region size (%s), aborting\n",
2047 pci_name(ha
->pdev
));
2048 goto iospace_error_exit
;
2051 ha
->iobase
= ioremap(pci_resource_start(ha
->pdev
, 0), MIN_IOBASE_LEN
);
2053 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x011a,
2054 "Cannot remap MMIO (%s), aborting.\n",
2055 pci_name(ha
->pdev
));
2056 goto iospace_error_exit
;
2059 /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2060 /* 83XX 26XX always use MQ type access for queues
2061 * - mbar 2, a.k.a region 4 */
2062 ha
->max_req_queues
= ha
->max_rsp_queues
= 1;
2063 ha
->msix_count
= QLA_BASE_VECTORS
;
2064 ha
->mqiobase
= ioremap(pci_resource_start(ha
->pdev
, 4),
2065 pci_resource_len(ha
->pdev
, 4));
2067 if (!ha
->mqiobase
) {
2068 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x011d,
2069 "BAR2/region4 not enabled\n");
2073 ha
->msixbase
= ioremap(pci_resource_start(ha
->pdev
, 2),
2074 pci_resource_len(ha
->pdev
, 2));
2076 /* Read MSIX vector size of the board */
2077 pci_read_config_word(ha
->pdev
,
2078 QLA_83XX_PCI_MSIX_CONTROL
, &msix
);
2079 ha
->msix_count
= (msix
& PCI_MSIX_FLAGS_QSIZE
) + 1;
2081 * By default, driver uses at least two msix vectors
2084 if (ql2xmqsupport
|| ql2xnvmeenable
) {
2085 /* MB interrupt uses 1 vector */
2086 ha
->max_req_queues
= ha
->msix_count
- 1;
2088 /* ATIOQ needs 1 vector. That's 1 less QPair */
2089 if (QLA_TGT_MODE_ENABLED())
2090 ha
->max_req_queues
--;
2092 ha
->max_rsp_queues
= ha
->max_req_queues
;
2094 /* Queue pairs is the max value minus
2095 * the base queue pair */
2096 ha
->max_qpairs
= ha
->max_req_queues
- 1;
2097 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x00e3,
2098 "Max no of queues pairs: %d.\n", ha
->max_qpairs
);
2100 ql_log_pci(ql_log_info
, ha
->pdev
, 0x011c,
2101 "MSI-X vector count: %d.\n", ha
->msix_count
);
2103 ql_log_pci(ql_log_info
, ha
->pdev
, 0x011e,
2104 "BAR 1 not enabled.\n");
2107 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x011f,
2108 "MSIX Count: %d.\n", ha
->msix_count
);
2115 static struct isp_operations qla2100_isp_ops
= {
2116 .pci_config
= qla2100_pci_config
,
2117 .reset_chip
= qla2x00_reset_chip
,
2118 .chip_diag
= qla2x00_chip_diag
,
2119 .config_rings
= qla2x00_config_rings
,
2120 .reset_adapter
= qla2x00_reset_adapter
,
2121 .nvram_config
= qla2x00_nvram_config
,
2122 .update_fw_options
= qla2x00_update_fw_options
,
2123 .load_risc
= qla2x00_load_risc
,
2124 .pci_info_str
= qla2x00_pci_info_str
,
2125 .fw_version_str
= qla2x00_fw_version_str
,
2126 .intr_handler
= qla2100_intr_handler
,
2127 .enable_intrs
= qla2x00_enable_intrs
,
2128 .disable_intrs
= qla2x00_disable_intrs
,
2129 .abort_command
= qla2x00_abort_command
,
2130 .target_reset
= qla2x00_abort_target
,
2131 .lun_reset
= qla2x00_lun_reset
,
2132 .fabric_login
= qla2x00_login_fabric
,
2133 .fabric_logout
= qla2x00_fabric_logout
,
2134 .calc_req_entries
= qla2x00_calc_iocbs_32
,
2135 .build_iocbs
= qla2x00_build_scsi_iocbs_32
,
2136 .prep_ms_iocb
= qla2x00_prep_ms_iocb
,
2137 .prep_ms_fdmi_iocb
= qla2x00_prep_ms_fdmi_iocb
,
2138 .read_nvram
= qla2x00_read_nvram_data
,
2139 .write_nvram
= qla2x00_write_nvram_data
,
2140 .fw_dump
= qla2100_fw_dump
,
2143 .beacon_blink
= NULL
,
2144 .read_optrom
= qla2x00_read_optrom_data
,
2145 .write_optrom
= qla2x00_write_optrom_data
,
2146 .get_flash_version
= qla2x00_get_flash_version
,
2147 .start_scsi
= qla2x00_start_scsi
,
2148 .start_scsi_mq
= NULL
,
2149 .abort_isp
= qla2x00_abort_isp
,
2150 .iospace_config
= qla2x00_iospace_config
,
2151 .initialize_adapter
= qla2x00_initialize_adapter
,
2154 static struct isp_operations qla2300_isp_ops
= {
2155 .pci_config
= qla2300_pci_config
,
2156 .reset_chip
= qla2x00_reset_chip
,
2157 .chip_diag
= qla2x00_chip_diag
,
2158 .config_rings
= qla2x00_config_rings
,
2159 .reset_adapter
= qla2x00_reset_adapter
,
2160 .nvram_config
= qla2x00_nvram_config
,
2161 .update_fw_options
= qla2x00_update_fw_options
,
2162 .load_risc
= qla2x00_load_risc
,
2163 .pci_info_str
= qla2x00_pci_info_str
,
2164 .fw_version_str
= qla2x00_fw_version_str
,
2165 .intr_handler
= qla2300_intr_handler
,
2166 .enable_intrs
= qla2x00_enable_intrs
,
2167 .disable_intrs
= qla2x00_disable_intrs
,
2168 .abort_command
= qla2x00_abort_command
,
2169 .target_reset
= qla2x00_abort_target
,
2170 .lun_reset
= qla2x00_lun_reset
,
2171 .fabric_login
= qla2x00_login_fabric
,
2172 .fabric_logout
= qla2x00_fabric_logout
,
2173 .calc_req_entries
= qla2x00_calc_iocbs_32
,
2174 .build_iocbs
= qla2x00_build_scsi_iocbs_32
,
2175 .prep_ms_iocb
= qla2x00_prep_ms_iocb
,
2176 .prep_ms_fdmi_iocb
= qla2x00_prep_ms_fdmi_iocb
,
2177 .read_nvram
= qla2x00_read_nvram_data
,
2178 .write_nvram
= qla2x00_write_nvram_data
,
2179 .fw_dump
= qla2300_fw_dump
,
2180 .beacon_on
= qla2x00_beacon_on
,
2181 .beacon_off
= qla2x00_beacon_off
,
2182 .beacon_blink
= qla2x00_beacon_blink
,
2183 .read_optrom
= qla2x00_read_optrom_data
,
2184 .write_optrom
= qla2x00_write_optrom_data
,
2185 .get_flash_version
= qla2x00_get_flash_version
,
2186 .start_scsi
= qla2x00_start_scsi
,
2187 .start_scsi_mq
= NULL
,
2188 .abort_isp
= qla2x00_abort_isp
,
2189 .iospace_config
= qla2x00_iospace_config
,
2190 .initialize_adapter
= qla2x00_initialize_adapter
,
2193 static struct isp_operations qla24xx_isp_ops
= {
2194 .pci_config
= qla24xx_pci_config
,
2195 .reset_chip
= qla24xx_reset_chip
,
2196 .chip_diag
= qla24xx_chip_diag
,
2197 .config_rings
= qla24xx_config_rings
,
2198 .reset_adapter
= qla24xx_reset_adapter
,
2199 .nvram_config
= qla24xx_nvram_config
,
2200 .update_fw_options
= qla24xx_update_fw_options
,
2201 .load_risc
= qla24xx_load_risc
,
2202 .pci_info_str
= qla24xx_pci_info_str
,
2203 .fw_version_str
= qla24xx_fw_version_str
,
2204 .intr_handler
= qla24xx_intr_handler
,
2205 .enable_intrs
= qla24xx_enable_intrs
,
2206 .disable_intrs
= qla24xx_disable_intrs
,
2207 .abort_command
= qla24xx_abort_command
,
2208 .target_reset
= qla24xx_abort_target
,
2209 .lun_reset
= qla24xx_lun_reset
,
2210 .fabric_login
= qla24xx_login_fabric
,
2211 .fabric_logout
= qla24xx_fabric_logout
,
2212 .calc_req_entries
= NULL
,
2213 .build_iocbs
= NULL
,
2214 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2215 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2216 .read_nvram
= qla24xx_read_nvram_data
,
2217 .write_nvram
= qla24xx_write_nvram_data
,
2218 .fw_dump
= qla24xx_fw_dump
,
2219 .beacon_on
= qla24xx_beacon_on
,
2220 .beacon_off
= qla24xx_beacon_off
,
2221 .beacon_blink
= qla24xx_beacon_blink
,
2222 .read_optrom
= qla24xx_read_optrom_data
,
2223 .write_optrom
= qla24xx_write_optrom_data
,
2224 .get_flash_version
= qla24xx_get_flash_version
,
2225 .start_scsi
= qla24xx_start_scsi
,
2226 .start_scsi_mq
= NULL
,
2227 .abort_isp
= qla2x00_abort_isp
,
2228 .iospace_config
= qla2x00_iospace_config
,
2229 .initialize_adapter
= qla2x00_initialize_adapter
,
2232 static struct isp_operations qla25xx_isp_ops
= {
2233 .pci_config
= qla25xx_pci_config
,
2234 .reset_chip
= qla24xx_reset_chip
,
2235 .chip_diag
= qla24xx_chip_diag
,
2236 .config_rings
= qla24xx_config_rings
,
2237 .reset_adapter
= qla24xx_reset_adapter
,
2238 .nvram_config
= qla24xx_nvram_config
,
2239 .update_fw_options
= qla24xx_update_fw_options
,
2240 .load_risc
= qla24xx_load_risc
,
2241 .pci_info_str
= qla24xx_pci_info_str
,
2242 .fw_version_str
= qla24xx_fw_version_str
,
2243 .intr_handler
= qla24xx_intr_handler
,
2244 .enable_intrs
= qla24xx_enable_intrs
,
2245 .disable_intrs
= qla24xx_disable_intrs
,
2246 .abort_command
= qla24xx_abort_command
,
2247 .target_reset
= qla24xx_abort_target
,
2248 .lun_reset
= qla24xx_lun_reset
,
2249 .fabric_login
= qla24xx_login_fabric
,
2250 .fabric_logout
= qla24xx_fabric_logout
,
2251 .calc_req_entries
= NULL
,
2252 .build_iocbs
= NULL
,
2253 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2254 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2255 .read_nvram
= qla25xx_read_nvram_data
,
2256 .write_nvram
= qla25xx_write_nvram_data
,
2257 .fw_dump
= qla25xx_fw_dump
,
2258 .beacon_on
= qla24xx_beacon_on
,
2259 .beacon_off
= qla24xx_beacon_off
,
2260 .beacon_blink
= qla24xx_beacon_blink
,
2261 .read_optrom
= qla25xx_read_optrom_data
,
2262 .write_optrom
= qla24xx_write_optrom_data
,
2263 .get_flash_version
= qla24xx_get_flash_version
,
2264 .start_scsi
= qla24xx_dif_start_scsi
,
2265 .start_scsi_mq
= qla2xxx_dif_start_scsi_mq
,
2266 .abort_isp
= qla2x00_abort_isp
,
2267 .iospace_config
= qla2x00_iospace_config
,
2268 .initialize_adapter
= qla2x00_initialize_adapter
,
2271 static struct isp_operations qla81xx_isp_ops
= {
2272 .pci_config
= qla25xx_pci_config
,
2273 .reset_chip
= qla24xx_reset_chip
,
2274 .chip_diag
= qla24xx_chip_diag
,
2275 .config_rings
= qla24xx_config_rings
,
2276 .reset_adapter
= qla24xx_reset_adapter
,
2277 .nvram_config
= qla81xx_nvram_config
,
2278 .update_fw_options
= qla81xx_update_fw_options
,
2279 .load_risc
= qla81xx_load_risc
,
2280 .pci_info_str
= qla24xx_pci_info_str
,
2281 .fw_version_str
= qla24xx_fw_version_str
,
2282 .intr_handler
= qla24xx_intr_handler
,
2283 .enable_intrs
= qla24xx_enable_intrs
,
2284 .disable_intrs
= qla24xx_disable_intrs
,
2285 .abort_command
= qla24xx_abort_command
,
2286 .target_reset
= qla24xx_abort_target
,
2287 .lun_reset
= qla24xx_lun_reset
,
2288 .fabric_login
= qla24xx_login_fabric
,
2289 .fabric_logout
= qla24xx_fabric_logout
,
2290 .calc_req_entries
= NULL
,
2291 .build_iocbs
= NULL
,
2292 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2293 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2295 .write_nvram
= NULL
,
2296 .fw_dump
= qla81xx_fw_dump
,
2297 .beacon_on
= qla24xx_beacon_on
,
2298 .beacon_off
= qla24xx_beacon_off
,
2299 .beacon_blink
= qla83xx_beacon_blink
,
2300 .read_optrom
= qla25xx_read_optrom_data
,
2301 .write_optrom
= qla24xx_write_optrom_data
,
2302 .get_flash_version
= qla24xx_get_flash_version
,
2303 .start_scsi
= qla24xx_dif_start_scsi
,
2304 .start_scsi_mq
= qla2xxx_dif_start_scsi_mq
,
2305 .abort_isp
= qla2x00_abort_isp
,
2306 .iospace_config
= qla2x00_iospace_config
,
2307 .initialize_adapter
= qla2x00_initialize_adapter
,
2310 static struct isp_operations qla82xx_isp_ops
= {
2311 .pci_config
= qla82xx_pci_config
,
2312 .reset_chip
= qla82xx_reset_chip
,
2313 .chip_diag
= qla24xx_chip_diag
,
2314 .config_rings
= qla82xx_config_rings
,
2315 .reset_adapter
= qla24xx_reset_adapter
,
2316 .nvram_config
= qla81xx_nvram_config
,
2317 .update_fw_options
= qla24xx_update_fw_options
,
2318 .load_risc
= qla82xx_load_risc
,
2319 .pci_info_str
= qla24xx_pci_info_str
,
2320 .fw_version_str
= qla24xx_fw_version_str
,
2321 .intr_handler
= qla82xx_intr_handler
,
2322 .enable_intrs
= qla82xx_enable_intrs
,
2323 .disable_intrs
= qla82xx_disable_intrs
,
2324 .abort_command
= qla24xx_abort_command
,
2325 .target_reset
= qla24xx_abort_target
,
2326 .lun_reset
= qla24xx_lun_reset
,
2327 .fabric_login
= qla24xx_login_fabric
,
2328 .fabric_logout
= qla24xx_fabric_logout
,
2329 .calc_req_entries
= NULL
,
2330 .build_iocbs
= NULL
,
2331 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2332 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2333 .read_nvram
= qla24xx_read_nvram_data
,
2334 .write_nvram
= qla24xx_write_nvram_data
,
2335 .fw_dump
= qla82xx_fw_dump
,
2336 .beacon_on
= qla82xx_beacon_on
,
2337 .beacon_off
= qla82xx_beacon_off
,
2338 .beacon_blink
= NULL
,
2339 .read_optrom
= qla82xx_read_optrom_data
,
2340 .write_optrom
= qla82xx_write_optrom_data
,
2341 .get_flash_version
= qla82xx_get_flash_version
,
2342 .start_scsi
= qla82xx_start_scsi
,
2343 .start_scsi_mq
= NULL
,
2344 .abort_isp
= qla82xx_abort_isp
,
2345 .iospace_config
= qla82xx_iospace_config
,
2346 .initialize_adapter
= qla2x00_initialize_adapter
,
2349 static struct isp_operations qla8044_isp_ops
= {
2350 .pci_config
= qla82xx_pci_config
,
2351 .reset_chip
= qla82xx_reset_chip
,
2352 .chip_diag
= qla24xx_chip_diag
,
2353 .config_rings
= qla82xx_config_rings
,
2354 .reset_adapter
= qla24xx_reset_adapter
,
2355 .nvram_config
= qla81xx_nvram_config
,
2356 .update_fw_options
= qla24xx_update_fw_options
,
2357 .load_risc
= qla82xx_load_risc
,
2358 .pci_info_str
= qla24xx_pci_info_str
,
2359 .fw_version_str
= qla24xx_fw_version_str
,
2360 .intr_handler
= qla8044_intr_handler
,
2361 .enable_intrs
= qla82xx_enable_intrs
,
2362 .disable_intrs
= qla82xx_disable_intrs
,
2363 .abort_command
= qla24xx_abort_command
,
2364 .target_reset
= qla24xx_abort_target
,
2365 .lun_reset
= qla24xx_lun_reset
,
2366 .fabric_login
= qla24xx_login_fabric
,
2367 .fabric_logout
= qla24xx_fabric_logout
,
2368 .calc_req_entries
= NULL
,
2369 .build_iocbs
= NULL
,
2370 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2371 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2373 .write_nvram
= NULL
,
2374 .fw_dump
= qla8044_fw_dump
,
2375 .beacon_on
= qla82xx_beacon_on
,
2376 .beacon_off
= qla82xx_beacon_off
,
2377 .beacon_blink
= NULL
,
2378 .read_optrom
= qla8044_read_optrom_data
,
2379 .write_optrom
= qla8044_write_optrom_data
,
2380 .get_flash_version
= qla82xx_get_flash_version
,
2381 .start_scsi
= qla82xx_start_scsi
,
2382 .start_scsi_mq
= NULL
,
2383 .abort_isp
= qla8044_abort_isp
,
2384 .iospace_config
= qla82xx_iospace_config
,
2385 .initialize_adapter
= qla2x00_initialize_adapter
,
2388 static struct isp_operations qla83xx_isp_ops
= {
2389 .pci_config
= qla25xx_pci_config
,
2390 .reset_chip
= qla24xx_reset_chip
,
2391 .chip_diag
= qla24xx_chip_diag
,
2392 .config_rings
= qla24xx_config_rings
,
2393 .reset_adapter
= qla24xx_reset_adapter
,
2394 .nvram_config
= qla81xx_nvram_config
,
2395 .update_fw_options
= qla81xx_update_fw_options
,
2396 .load_risc
= qla81xx_load_risc
,
2397 .pci_info_str
= qla24xx_pci_info_str
,
2398 .fw_version_str
= qla24xx_fw_version_str
,
2399 .intr_handler
= qla24xx_intr_handler
,
2400 .enable_intrs
= qla24xx_enable_intrs
,
2401 .disable_intrs
= qla24xx_disable_intrs
,
2402 .abort_command
= qla24xx_abort_command
,
2403 .target_reset
= qla24xx_abort_target
,
2404 .lun_reset
= qla24xx_lun_reset
,
2405 .fabric_login
= qla24xx_login_fabric
,
2406 .fabric_logout
= qla24xx_fabric_logout
,
2407 .calc_req_entries
= NULL
,
2408 .build_iocbs
= NULL
,
2409 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2410 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2412 .write_nvram
= NULL
,
2413 .fw_dump
= qla83xx_fw_dump
,
2414 .beacon_on
= qla24xx_beacon_on
,
2415 .beacon_off
= qla24xx_beacon_off
,
2416 .beacon_blink
= qla83xx_beacon_blink
,
2417 .read_optrom
= qla25xx_read_optrom_data
,
2418 .write_optrom
= qla24xx_write_optrom_data
,
2419 .get_flash_version
= qla24xx_get_flash_version
,
2420 .start_scsi
= qla24xx_dif_start_scsi
,
2421 .start_scsi_mq
= qla2xxx_dif_start_scsi_mq
,
2422 .abort_isp
= qla2x00_abort_isp
,
2423 .iospace_config
= qla83xx_iospace_config
,
2424 .initialize_adapter
= qla2x00_initialize_adapter
,
2427 static struct isp_operations qlafx00_isp_ops
= {
2428 .pci_config
= qlafx00_pci_config
,
2429 .reset_chip
= qlafx00_soft_reset
,
2430 .chip_diag
= qlafx00_chip_diag
,
2431 .config_rings
= qlafx00_config_rings
,
2432 .reset_adapter
= qlafx00_soft_reset
,
2433 .nvram_config
= NULL
,
2434 .update_fw_options
= NULL
,
2436 .pci_info_str
= qlafx00_pci_info_str
,
2437 .fw_version_str
= qlafx00_fw_version_str
,
2438 .intr_handler
= qlafx00_intr_handler
,
2439 .enable_intrs
= qlafx00_enable_intrs
,
2440 .disable_intrs
= qlafx00_disable_intrs
,
2441 .abort_command
= qla24xx_async_abort_command
,
2442 .target_reset
= qlafx00_abort_target
,
2443 .lun_reset
= qlafx00_lun_reset
,
2444 .fabric_login
= NULL
,
2445 .fabric_logout
= NULL
,
2446 .calc_req_entries
= NULL
,
2447 .build_iocbs
= NULL
,
2448 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2449 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2450 .read_nvram
= qla24xx_read_nvram_data
,
2451 .write_nvram
= qla24xx_write_nvram_data
,
2453 .beacon_on
= qla24xx_beacon_on
,
2454 .beacon_off
= qla24xx_beacon_off
,
2455 .beacon_blink
= NULL
,
2456 .read_optrom
= qla24xx_read_optrom_data
,
2457 .write_optrom
= qla24xx_write_optrom_data
,
2458 .get_flash_version
= qla24xx_get_flash_version
,
2459 .start_scsi
= qlafx00_start_scsi
,
2460 .start_scsi_mq
= NULL
,
2461 .abort_isp
= qlafx00_abort_isp
,
2462 .iospace_config
= qlafx00_iospace_config
,
2463 .initialize_adapter
= qlafx00_initialize_adapter
,
2466 static struct isp_operations qla27xx_isp_ops
= {
2467 .pci_config
= qla25xx_pci_config
,
2468 .reset_chip
= qla24xx_reset_chip
,
2469 .chip_diag
= qla24xx_chip_diag
,
2470 .config_rings
= qla24xx_config_rings
,
2471 .reset_adapter
= qla24xx_reset_adapter
,
2472 .nvram_config
= qla81xx_nvram_config
,
2473 .update_fw_options
= qla24xx_update_fw_options
,
2474 .load_risc
= qla81xx_load_risc
,
2475 .pci_info_str
= qla24xx_pci_info_str
,
2476 .fw_version_str
= qla24xx_fw_version_str
,
2477 .intr_handler
= qla24xx_intr_handler
,
2478 .enable_intrs
= qla24xx_enable_intrs
,
2479 .disable_intrs
= qla24xx_disable_intrs
,
2480 .abort_command
= qla24xx_abort_command
,
2481 .target_reset
= qla24xx_abort_target
,
2482 .lun_reset
= qla24xx_lun_reset
,
2483 .fabric_login
= qla24xx_login_fabric
,
2484 .fabric_logout
= qla24xx_fabric_logout
,
2485 .calc_req_entries
= NULL
,
2486 .build_iocbs
= NULL
,
2487 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2488 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2490 .write_nvram
= NULL
,
2491 .fw_dump
= qla27xx_fwdump
,
2492 .beacon_on
= qla24xx_beacon_on
,
2493 .beacon_off
= qla24xx_beacon_off
,
2494 .beacon_blink
= qla83xx_beacon_blink
,
2495 .read_optrom
= qla25xx_read_optrom_data
,
2496 .write_optrom
= qla24xx_write_optrom_data
,
2497 .get_flash_version
= qla24xx_get_flash_version
,
2498 .start_scsi
= qla24xx_dif_start_scsi
,
2499 .start_scsi_mq
= qla2xxx_dif_start_scsi_mq
,
2500 .abort_isp
= qla2x00_abort_isp
,
2501 .iospace_config
= qla83xx_iospace_config
,
2502 .initialize_adapter
= qla2x00_initialize_adapter
,
2506 qla2x00_set_isp_flags(struct qla_hw_data
*ha
)
2508 ha
->device_type
= DT_EXTENDED_IDS
;
2509 switch (ha
->pdev
->device
) {
2510 case PCI_DEVICE_ID_QLOGIC_ISP2100
:
2511 ha
->isp_type
|= DT_ISP2100
;
2512 ha
->device_type
&= ~DT_EXTENDED_IDS
;
2513 ha
->fw_srisc_address
= RISC_START_ADDRESS_2100
;
2515 case PCI_DEVICE_ID_QLOGIC_ISP2200
:
2516 ha
->isp_type
|= DT_ISP2200
;
2517 ha
->device_type
&= ~DT_EXTENDED_IDS
;
2518 ha
->fw_srisc_address
= RISC_START_ADDRESS_2100
;
2520 case PCI_DEVICE_ID_QLOGIC_ISP2300
:
2521 ha
->isp_type
|= DT_ISP2300
;
2522 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2523 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2525 case PCI_DEVICE_ID_QLOGIC_ISP2312
:
2526 ha
->isp_type
|= DT_ISP2312
;
2527 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2528 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2530 case PCI_DEVICE_ID_QLOGIC_ISP2322
:
2531 ha
->isp_type
|= DT_ISP2322
;
2532 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2533 if (ha
->pdev
->subsystem_vendor
== 0x1028 &&
2534 ha
->pdev
->subsystem_device
== 0x0170)
2535 ha
->device_type
|= DT_OEM_001
;
2536 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2538 case PCI_DEVICE_ID_QLOGIC_ISP6312
:
2539 ha
->isp_type
|= DT_ISP6312
;
2540 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2542 case PCI_DEVICE_ID_QLOGIC_ISP6322
:
2543 ha
->isp_type
|= DT_ISP6322
;
2544 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2546 case PCI_DEVICE_ID_QLOGIC_ISP2422
:
2547 ha
->isp_type
|= DT_ISP2422
;
2548 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2549 ha
->device_type
|= DT_FWI2
;
2550 ha
->device_type
|= DT_IIDMA
;
2551 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2553 case PCI_DEVICE_ID_QLOGIC_ISP2432
:
2554 ha
->isp_type
|= DT_ISP2432
;
2555 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2556 ha
->device_type
|= DT_FWI2
;
2557 ha
->device_type
|= DT_IIDMA
;
2558 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2560 case PCI_DEVICE_ID_QLOGIC_ISP8432
:
2561 ha
->isp_type
|= DT_ISP8432
;
2562 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2563 ha
->device_type
|= DT_FWI2
;
2564 ha
->device_type
|= DT_IIDMA
;
2565 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2567 case PCI_DEVICE_ID_QLOGIC_ISP5422
:
2568 ha
->isp_type
|= DT_ISP5422
;
2569 ha
->device_type
|= DT_FWI2
;
2570 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2572 case PCI_DEVICE_ID_QLOGIC_ISP5432
:
2573 ha
->isp_type
|= DT_ISP5432
;
2574 ha
->device_type
|= DT_FWI2
;
2575 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2577 case PCI_DEVICE_ID_QLOGIC_ISP2532
:
2578 ha
->isp_type
|= DT_ISP2532
;
2579 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2580 ha
->device_type
|= DT_FWI2
;
2581 ha
->device_type
|= DT_IIDMA
;
2582 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2584 case PCI_DEVICE_ID_QLOGIC_ISP8001
:
2585 ha
->isp_type
|= DT_ISP8001
;
2586 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2587 ha
->device_type
|= DT_FWI2
;
2588 ha
->device_type
|= DT_IIDMA
;
2589 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2591 case PCI_DEVICE_ID_QLOGIC_ISP8021
:
2592 ha
->isp_type
|= DT_ISP8021
;
2593 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2594 ha
->device_type
|= DT_FWI2
;
2595 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2596 /* Initialize 82XX ISP flags */
2597 qla82xx_init_flags(ha
);
2599 case PCI_DEVICE_ID_QLOGIC_ISP8044
:
2600 ha
->isp_type
|= DT_ISP8044
;
2601 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2602 ha
->device_type
|= DT_FWI2
;
2603 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2604 /* Initialize 82XX ISP flags */
2605 qla82xx_init_flags(ha
);
2607 case PCI_DEVICE_ID_QLOGIC_ISP2031
:
2608 ha
->isp_type
|= DT_ISP2031
;
2609 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2610 ha
->device_type
|= DT_FWI2
;
2611 ha
->device_type
|= DT_IIDMA
;
2612 ha
->device_type
|= DT_T10_PI
;
2613 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2615 case PCI_DEVICE_ID_QLOGIC_ISP8031
:
2616 ha
->isp_type
|= DT_ISP8031
;
2617 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2618 ha
->device_type
|= DT_FWI2
;
2619 ha
->device_type
|= DT_IIDMA
;
2620 ha
->device_type
|= DT_T10_PI
;
2621 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2623 case PCI_DEVICE_ID_QLOGIC_ISPF001
:
2624 ha
->isp_type
|= DT_ISPFX00
;
2626 case PCI_DEVICE_ID_QLOGIC_ISP2071
:
2627 ha
->isp_type
|= DT_ISP2071
;
2628 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2629 ha
->device_type
|= DT_FWI2
;
2630 ha
->device_type
|= DT_IIDMA
;
2631 ha
->device_type
|= DT_T10_PI
;
2632 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2634 case PCI_DEVICE_ID_QLOGIC_ISP2271
:
2635 ha
->isp_type
|= DT_ISP2271
;
2636 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2637 ha
->device_type
|= DT_FWI2
;
2638 ha
->device_type
|= DT_IIDMA
;
2639 ha
->device_type
|= DT_T10_PI
;
2640 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2642 case PCI_DEVICE_ID_QLOGIC_ISP2261
:
2643 ha
->isp_type
|= DT_ISP2261
;
2644 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2645 ha
->device_type
|= DT_FWI2
;
2646 ha
->device_type
|= DT_IIDMA
;
2647 ha
->device_type
|= DT_T10_PI
;
2648 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2650 case PCI_DEVICE_ID_QLOGIC_ISP2081
:
2651 case PCI_DEVICE_ID_QLOGIC_ISP2089
:
2652 ha
->isp_type
|= DT_ISP2081
;
2653 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2654 ha
->device_type
|= DT_FWI2
;
2655 ha
->device_type
|= DT_IIDMA
;
2656 ha
->device_type
|= DT_T10_PI
;
2657 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2659 case PCI_DEVICE_ID_QLOGIC_ISP2281
:
2660 case PCI_DEVICE_ID_QLOGIC_ISP2289
:
2661 ha
->isp_type
|= DT_ISP2281
;
2662 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2663 ha
->device_type
|= DT_FWI2
;
2664 ha
->device_type
|= DT_IIDMA
;
2665 ha
->device_type
|= DT_T10_PI
;
2666 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2671 ha
->port_no
= ha
->portnum
& 1;
2673 /* Get adapter physical port no from interrupt pin register. */
2674 pci_read_config_byte(ha
->pdev
, PCI_INTERRUPT_PIN
, &ha
->port_no
);
2675 if (IS_QLA25XX(ha
) || IS_QLA2031(ha
) ||
2676 IS_QLA27XX(ha
) || IS_QLA28XX(ha
))
2679 ha
->port_no
= !(ha
->port_no
& 1);
2682 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x000b,
2683 "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2684 ha
->device_type
, ha
->port_no
, ha
->fw_srisc_address
);
2688 qla2xxx_scan_start(struct Scsi_Host
*shost
)
2690 scsi_qla_host_t
*vha
= shost_priv(shost
);
2692 if (vha
->hw
->flags
.running_gold_fw
)
2695 set_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
);
2696 set_bit(LOCAL_LOOP_UPDATE
, &vha
->dpc_flags
);
2697 set_bit(RSCN_UPDATE
, &vha
->dpc_flags
);
2698 set_bit(NPIV_CONFIG_NEEDED
, &vha
->dpc_flags
);
2702 qla2xxx_scan_finished(struct Scsi_Host
*shost
, unsigned long time
)
2704 scsi_qla_host_t
*vha
= shost_priv(shost
);
2706 if (test_bit(UNLOADING
, &vha
->dpc_flags
))
2710 if (time
> vha
->hw
->loop_reset_delay
* HZ
)
2713 return atomic_read(&vha
->loop_state
) == LOOP_READY
;
2716 static void qla2x00_iocb_work_fn(struct work_struct
*work
)
2718 struct scsi_qla_host
*vha
= container_of(work
,
2719 struct scsi_qla_host
, iocb_work
);
2720 struct qla_hw_data
*ha
= vha
->hw
;
2721 struct scsi_qla_host
*base_vha
= pci_get_drvdata(ha
->pdev
);
2723 unsigned long flags
;
2725 if (test_bit(UNLOADING
, &base_vha
->dpc_flags
))
2728 while (!list_empty(&vha
->work_list
) && i
> 0) {
2729 qla2x00_do_work(vha
);
2733 spin_lock_irqsave(&vha
->work_lock
, flags
);
2734 clear_bit(IOCB_WORK_ACTIVE
, &vha
->dpc_flags
);
2735 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
2739 * PCI driver interface
2742 qla2x00_probe_one(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
2745 struct Scsi_Host
*host
;
2746 scsi_qla_host_t
*base_vha
= NULL
;
2747 struct qla_hw_data
*ha
;
2749 char fw_str
[30], wq_name
[30];
2750 struct scsi_host_template
*sht
;
2751 int bars
, mem_only
= 0;
2752 uint16_t req_length
= 0, rsp_length
= 0;
2753 struct req_que
*req
= NULL
;
2754 struct rsp_que
*rsp
= NULL
;
2757 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
| IORESOURCE_IO
);
2758 sht
= &qla2xxx_driver_template
;
2759 if (pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2422
||
2760 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2432
||
2761 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8432
||
2762 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP5422
||
2763 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP5432
||
2764 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2532
||
2765 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8001
||
2766 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8021
||
2767 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2031
||
2768 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8031
||
2769 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISPF001
||
2770 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8044
||
2771 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2071
||
2772 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2271
||
2773 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2261
||
2774 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2081
||
2775 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2281
||
2776 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2089
||
2777 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2289
) {
2778 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2780 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0007,
2781 "Mem only adapter.\n");
2783 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0008,
2784 "Bars=%d.\n", bars
);
2787 if (pci_enable_device_mem(pdev
))
2790 if (pci_enable_device(pdev
))
2794 /* This may fail but that's ok */
2795 pci_enable_pcie_error_reporting(pdev
);
2797 /* Turn off T10-DIF when FC-NVMe is enabled */
2801 ha
= kzalloc(sizeof(struct qla_hw_data
), GFP_KERNEL
);
2803 ql_log_pci(ql_log_fatal
, pdev
, 0x0009,
2804 "Unable to allocate memory for ha.\n");
2805 goto disable_device
;
2807 ql_dbg_pci(ql_dbg_init
, pdev
, 0x000a,
2808 "Memory allocated for ha=%p.\n", ha
);
2810 INIT_LIST_HEAD(&ha
->tgt
.q_full_list
);
2811 spin_lock_init(&ha
->tgt
.q_full_lock
);
2812 spin_lock_init(&ha
->tgt
.sess_lock
);
2813 spin_lock_init(&ha
->tgt
.atio_lock
);
2815 atomic_set(&ha
->nvme_active_aen_cnt
, 0);
2817 /* Clear our data area */
2819 ha
->mem_only
= mem_only
;
2820 spin_lock_init(&ha
->hardware_lock
);
2821 spin_lock_init(&ha
->vport_slock
);
2822 mutex_init(&ha
->selflogin_lock
);
2823 mutex_init(&ha
->optrom_mutex
);
2825 /* Set ISP-type information. */
2826 qla2x00_set_isp_flags(ha
);
2828 /* Set EEH reset type to fundamental if required by hba */
2829 if (IS_QLA24XX(ha
) || IS_QLA25XX(ha
) || IS_QLA81XX(ha
) ||
2830 IS_QLA83XX(ha
) || IS_QLA27XX(ha
) || IS_QLA28XX(ha
))
2831 pdev
->needs_freset
= 1;
2833 ha
->prev_topology
= 0;
2834 ha
->init_cb_size
= sizeof(init_cb_t
);
2835 ha
->link_data_rate
= PORT_SPEED_UNKNOWN
;
2836 ha
->optrom_size
= OPTROM_SIZE_2300
;
2837 ha
->max_exchg
= FW_MAX_EXCHANGES_CNT
;
2838 atomic_set(&ha
->num_pend_mbx_stage1
, 0);
2839 atomic_set(&ha
->num_pend_mbx_stage2
, 0);
2840 atomic_set(&ha
->num_pend_mbx_stage3
, 0);
2841 atomic_set(&ha
->zio_threshold
, DEFAULT_ZIO_THRESHOLD
);
2842 ha
->last_zio_threshold
= DEFAULT_ZIO_THRESHOLD
;
2844 /* Assign ISP specific operations. */
2845 if (IS_QLA2100(ha
)) {
2846 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2847 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_2100
;
2848 req_length
= REQUEST_ENTRY_CNT_2100
;
2849 rsp_length
= RESPONSE_ENTRY_CNT_2100
;
2850 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2100
;
2851 ha
->gid_list_info_size
= 4;
2852 ha
->flash_conf_off
= ~0;
2853 ha
->flash_data_off
= ~0;
2854 ha
->nvram_conf_off
= ~0;
2855 ha
->nvram_data_off
= ~0;
2856 ha
->isp_ops
= &qla2100_isp_ops
;
2857 } else if (IS_QLA2200(ha
)) {
2858 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2859 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_2200
;
2860 req_length
= REQUEST_ENTRY_CNT_2200
;
2861 rsp_length
= RESPONSE_ENTRY_CNT_2100
;
2862 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2100
;
2863 ha
->gid_list_info_size
= 4;
2864 ha
->flash_conf_off
= ~0;
2865 ha
->flash_data_off
= ~0;
2866 ha
->nvram_conf_off
= ~0;
2867 ha
->nvram_data_off
= ~0;
2868 ha
->isp_ops
= &qla2100_isp_ops
;
2869 } else if (IS_QLA23XX(ha
)) {
2870 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2871 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2872 req_length
= REQUEST_ENTRY_CNT_2200
;
2873 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2874 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2875 ha
->gid_list_info_size
= 6;
2876 if (IS_QLA2322(ha
) || IS_QLA6322(ha
))
2877 ha
->optrom_size
= OPTROM_SIZE_2322
;
2878 ha
->flash_conf_off
= ~0;
2879 ha
->flash_data_off
= ~0;
2880 ha
->nvram_conf_off
= ~0;
2881 ha
->nvram_data_off
= ~0;
2882 ha
->isp_ops
= &qla2300_isp_ops
;
2883 } else if (IS_QLA24XX_TYPE(ha
)) {
2884 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2885 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2886 req_length
= REQUEST_ENTRY_CNT_24XX
;
2887 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2888 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2889 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2890 ha
->init_cb_size
= sizeof(struct mid_init_cb_24xx
);
2891 ha
->gid_list_info_size
= 8;
2892 ha
->optrom_size
= OPTROM_SIZE_24XX
;
2893 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA24XX
;
2894 ha
->isp_ops
= &qla24xx_isp_ops
;
2895 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2896 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2897 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2898 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2899 } else if (IS_QLA25XX(ha
)) {
2900 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2901 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2902 req_length
= REQUEST_ENTRY_CNT_24XX
;
2903 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2904 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2905 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2906 ha
->init_cb_size
= sizeof(struct mid_init_cb_24xx
);
2907 ha
->gid_list_info_size
= 8;
2908 ha
->optrom_size
= OPTROM_SIZE_25XX
;
2909 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2910 ha
->isp_ops
= &qla25xx_isp_ops
;
2911 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2912 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2913 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2914 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2915 } else if (IS_QLA81XX(ha
)) {
2916 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2917 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2918 req_length
= REQUEST_ENTRY_CNT_24XX
;
2919 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2920 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2921 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2922 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2923 ha
->gid_list_info_size
= 8;
2924 ha
->optrom_size
= OPTROM_SIZE_81XX
;
2925 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2926 ha
->isp_ops
= &qla81xx_isp_ops
;
2927 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_81XX
;
2928 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_81XX
;
2929 ha
->nvram_conf_off
= ~0;
2930 ha
->nvram_data_off
= ~0;
2931 } else if (IS_QLA82XX(ha
)) {
2932 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2933 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2934 req_length
= REQUEST_ENTRY_CNT_82XX
;
2935 rsp_length
= RESPONSE_ENTRY_CNT_82XX
;
2936 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2937 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2938 ha
->gid_list_info_size
= 8;
2939 ha
->optrom_size
= OPTROM_SIZE_82XX
;
2940 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2941 ha
->isp_ops
= &qla82xx_isp_ops
;
2942 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2943 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2944 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2945 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2946 } else if (IS_QLA8044(ha
)) {
2947 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2948 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2949 req_length
= REQUEST_ENTRY_CNT_82XX
;
2950 rsp_length
= RESPONSE_ENTRY_CNT_82XX
;
2951 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2952 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2953 ha
->gid_list_info_size
= 8;
2954 ha
->optrom_size
= OPTROM_SIZE_83XX
;
2955 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2956 ha
->isp_ops
= &qla8044_isp_ops
;
2957 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2958 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2959 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2960 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2961 } else if (IS_QLA83XX(ha
)) {
2962 ha
->portnum
= PCI_FUNC(ha
->pdev
->devfn
);
2963 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2964 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2965 req_length
= REQUEST_ENTRY_CNT_83XX
;
2966 rsp_length
= RESPONSE_ENTRY_CNT_83XX
;
2967 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2968 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2969 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2970 ha
->gid_list_info_size
= 8;
2971 ha
->optrom_size
= OPTROM_SIZE_83XX
;
2972 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2973 ha
->isp_ops
= &qla83xx_isp_ops
;
2974 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_81XX
;
2975 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_81XX
;
2976 ha
->nvram_conf_off
= ~0;
2977 ha
->nvram_data_off
= ~0;
2978 } else if (IS_QLAFX00(ha
)) {
2979 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_FX00
;
2980 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_FX00
;
2981 ha
->aen_mbx_count
= AEN_MAILBOX_REGISTER_COUNT_FX00
;
2982 req_length
= REQUEST_ENTRY_CNT_FX00
;
2983 rsp_length
= RESPONSE_ENTRY_CNT_FX00
;
2984 ha
->isp_ops
= &qlafx00_isp_ops
;
2985 ha
->port_down_retry_count
= 30; /* default value */
2986 ha
->mr
.fw_hbt_cnt
= QLAFX00_HEARTBEAT_INTERVAL
;
2987 ha
->mr
.fw_reset_timer_tick
= QLAFX00_RESET_INTERVAL
;
2988 ha
->mr
.fw_critemp_timer_tick
= QLAFX00_CRITEMP_INTERVAL
;
2989 ha
->mr
.fw_hbt_en
= 1;
2990 ha
->mr
.host_info_resend
= false;
2991 ha
->mr
.hinfo_resend_timer_tick
= QLAFX00_HINFO_RESEND_INTERVAL
;
2992 } else if (IS_QLA27XX(ha
)) {
2993 ha
->portnum
= PCI_FUNC(ha
->pdev
->devfn
);
2994 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2995 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2996 req_length
= REQUEST_ENTRY_CNT_83XX
;
2997 rsp_length
= RESPONSE_ENTRY_CNT_83XX
;
2998 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2999 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
3000 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
3001 ha
->gid_list_info_size
= 8;
3002 ha
->optrom_size
= OPTROM_SIZE_83XX
;
3003 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
3004 ha
->isp_ops
= &qla27xx_isp_ops
;
3005 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_81XX
;
3006 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_81XX
;
3007 ha
->nvram_conf_off
= ~0;
3008 ha
->nvram_data_off
= ~0;
3009 } else if (IS_QLA28XX(ha
)) {
3010 ha
->portnum
= PCI_FUNC(ha
->pdev
->devfn
);
3011 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
3012 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
3013 req_length
= REQUEST_ENTRY_CNT_24XX
;
3014 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
3015 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
3016 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
3017 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
3018 ha
->gid_list_info_size
= 8;
3019 ha
->optrom_size
= OPTROM_SIZE_28XX
;
3020 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
3021 ha
->isp_ops
= &qla27xx_isp_ops
;
3022 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_28XX
;
3023 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_28XX
;
3024 ha
->nvram_conf_off
= ~0;
3025 ha
->nvram_data_off
= ~0;
3028 ql_dbg_pci(ql_dbg_init
, pdev
, 0x001e,
3029 "mbx_count=%d, req_length=%d, "
3030 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
3031 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
3032 "max_fibre_devices=%d.\n",
3033 ha
->mbx_count
, req_length
, rsp_length
, ha
->max_loop_id
,
3034 ha
->init_cb_size
, ha
->gid_list_info_size
, ha
->optrom_size
,
3035 ha
->nvram_npiv_size
, ha
->max_fibre_devices
);
3036 ql_dbg_pci(ql_dbg_init
, pdev
, 0x001f,
3037 "isp_ops=%p, flash_conf_off=%d, "
3038 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3039 ha
->isp_ops
, ha
->flash_conf_off
, ha
->flash_data_off
,
3040 ha
->nvram_conf_off
, ha
->nvram_data_off
);
3042 /* Configure PCI I/O space */
3043 ret
= ha
->isp_ops
->iospace_config(ha
);
3045 goto iospace_config_failed
;
3047 ql_log_pci(ql_log_info
, pdev
, 0x001d,
3048 "Found an ISP%04X irq %d iobase 0x%p.\n",
3049 pdev
->device
, pdev
->irq
, ha
->iobase
);
3050 mutex_init(&ha
->vport_lock
);
3051 mutex_init(&ha
->mq_lock
);
3052 init_completion(&ha
->mbx_cmd_comp
);
3053 complete(&ha
->mbx_cmd_comp
);
3054 init_completion(&ha
->mbx_intr_comp
);
3055 init_completion(&ha
->dcbx_comp
);
3056 init_completion(&ha
->lb_portup_comp
);
3058 set_bit(0, (unsigned long *) ha
->vp_idx_map
);
3060 qla2x00_config_dma_addressing(ha
);
3061 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0020,
3062 "64 Bit addressing is %s.\n",
3063 ha
->flags
.enable_64bit_addressing
? "enable" :
3065 ret
= qla2x00_mem_alloc(ha
, req_length
, rsp_length
, &req
, &rsp
);
3067 ql_log_pci(ql_log_fatal
, pdev
, 0x0031,
3068 "Failed to allocate memory for adapter, aborting.\n");
3070 goto probe_hw_failed
;
3073 req
->max_q_depth
= MAX_Q_DEPTH
;
3074 if (ql2xmaxqdepth
!= 0 && ql2xmaxqdepth
<= 0xffffU
)
3075 req
->max_q_depth
= ql2xmaxqdepth
;
3078 base_vha
= qla2x00_create_host(sht
, ha
);
3081 goto probe_hw_failed
;
3084 pci_set_drvdata(pdev
, base_vha
);
3085 set_bit(PFLG_DRIVER_PROBING
, &base_vha
->pci_flags
);
3087 host
= base_vha
->host
;
3088 base_vha
->req
= req
;
3089 if (IS_QLA2XXX_MIDTYPE(ha
))
3090 base_vha
->mgmt_svr_loop_id
=
3091 qla2x00_reserve_mgmt_server_loop_id(base_vha
);
3093 base_vha
->mgmt_svr_loop_id
= MANAGEMENT_SERVER
+
3096 /* Setup fcport template structure. */
3097 ha
->mr
.fcport
.vha
= base_vha
;
3098 ha
->mr
.fcport
.port_type
= FCT_UNKNOWN
;
3099 ha
->mr
.fcport
.loop_id
= FC_NO_LOOP_ID
;
3100 qla2x00_set_fcport_state(&ha
->mr
.fcport
, FCS_UNCONFIGURED
);
3101 ha
->mr
.fcport
.supported_classes
= FC_COS_UNSPECIFIED
;
3102 ha
->mr
.fcport
.scan_state
= 1;
3104 /* Set the SG table size based on ISP type */
3105 if (!IS_FWI2_CAPABLE(ha
)) {
3107 host
->sg_tablesize
= 32;
3109 if (!IS_QLA82XX(ha
))
3110 host
->sg_tablesize
= QLA_SG_ALL
;
3112 host
->max_id
= ha
->max_fibre_devices
;
3113 host
->cmd_per_lun
= 3;
3114 host
->unique_id
= host
->host_no
;
3115 if (IS_T10_PI_CAPABLE(ha
) && ql2xenabledif
)
3116 host
->max_cmd_len
= 32;
3118 host
->max_cmd_len
= MAX_CMDSZ
;
3119 host
->max_channel
= MAX_BUSES
- 1;
3120 /* Older HBAs support only 16-bit LUNs */
3121 if (!IS_QLAFX00(ha
) && !IS_FWI2_CAPABLE(ha
) &&
3122 ql2xmaxlun
> 0xffff)
3123 host
->max_lun
= 0xffff;
3125 host
->max_lun
= ql2xmaxlun
;
3126 host
->transportt
= qla2xxx_transport_template
;
3127 sht
->vendor_id
= (SCSI_NL_VID_TYPE_PCI
| PCI_VENDOR_ID_QLOGIC
);
3129 ql_dbg(ql_dbg_init
, base_vha
, 0x0033,
3130 "max_id=%d this_id=%d "
3131 "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3132 "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host
->max_id
,
3133 host
->this_id
, host
->cmd_per_lun
, host
->unique_id
,
3134 host
->max_cmd_len
, host
->max_channel
, host
->max_lun
,
3135 host
->transportt
, sht
->vendor_id
);
3137 INIT_WORK(&base_vha
->iocb_work
, qla2x00_iocb_work_fn
);
3139 /* Set up the irqs */
3140 ret
= qla2x00_request_irqs(ha
, rsp
);
3144 /* Alloc arrays of request and response ring ptrs */
3145 ret
= qla2x00_alloc_queues(ha
, req
, rsp
);
3147 ql_log(ql_log_fatal
, base_vha
, 0x003d,
3148 "Failed to allocate memory for queue pointers..."
3155 /* number of hardware queues supported by blk/scsi-mq*/
3156 host
->nr_hw_queues
= ha
->max_qpairs
;
3158 ql_dbg(ql_dbg_init
, base_vha
, 0x0192,
3159 "blk/scsi-mq enabled, HW queues = %d.\n", host
->nr_hw_queues
);
3161 if (ql2xnvmeenable
) {
3162 host
->nr_hw_queues
= ha
->max_qpairs
;
3163 ql_dbg(ql_dbg_init
, base_vha
, 0x0194,
3164 "FC-NVMe support is enabled, HW queues=%d\n",
3165 host
->nr_hw_queues
);
3167 ql_dbg(ql_dbg_init
, base_vha
, 0x0193,
3168 "blk/scsi-mq disabled.\n");
3172 qlt_probe_one_stage1(base_vha
, ha
);
3174 pci_save_state(pdev
);
3176 /* Assign back pointers */
3180 if (IS_QLAFX00(ha
)) {
3181 ha
->rsp_q_map
[0] = rsp
;
3182 ha
->req_q_map
[0] = req
;
3183 set_bit(0, ha
->req_qid_map
);
3184 set_bit(0, ha
->rsp_qid_map
);
3187 /* FWI2-capable only. */
3188 req
->req_q_in
= &ha
->iobase
->isp24
.req_q_in
;
3189 req
->req_q_out
= &ha
->iobase
->isp24
.req_q_out
;
3190 rsp
->rsp_q_in
= &ha
->iobase
->isp24
.rsp_q_in
;
3191 rsp
->rsp_q_out
= &ha
->iobase
->isp24
.rsp_q_out
;
3192 if (ha
->mqenable
|| IS_QLA83XX(ha
) || IS_QLA27XX(ha
) ||
3194 req
->req_q_in
= &ha
->mqiobase
->isp25mq
.req_q_in
;
3195 req
->req_q_out
= &ha
->mqiobase
->isp25mq
.req_q_out
;
3196 rsp
->rsp_q_in
= &ha
->mqiobase
->isp25mq
.rsp_q_in
;
3197 rsp
->rsp_q_out
= &ha
->mqiobase
->isp25mq
.rsp_q_out
;
3200 if (IS_QLAFX00(ha
)) {
3201 req
->req_q_in
= &ha
->iobase
->ispfx00
.req_q_in
;
3202 req
->req_q_out
= &ha
->iobase
->ispfx00
.req_q_out
;
3203 rsp
->rsp_q_in
= &ha
->iobase
->ispfx00
.rsp_q_in
;
3204 rsp
->rsp_q_out
= &ha
->iobase
->ispfx00
.rsp_q_out
;
3207 if (IS_P3P_TYPE(ha
)) {
3208 req
->req_q_out
= &ha
->iobase
->isp82
.req_q_out
[0];
3209 rsp
->rsp_q_in
= &ha
->iobase
->isp82
.rsp_q_in
[0];
3210 rsp
->rsp_q_out
= &ha
->iobase
->isp82
.rsp_q_out
[0];
3213 ql_dbg(ql_dbg_multiq
, base_vha
, 0xc009,
3214 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3215 ha
->rsp_q_map
, ha
->req_q_map
, rsp
->req
, req
->rsp
);
3216 ql_dbg(ql_dbg_multiq
, base_vha
, 0xc00a,
3217 "req->req_q_in=%p req->req_q_out=%p "
3218 "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3219 req
->req_q_in
, req
->req_q_out
,
3220 rsp
->rsp_q_in
, rsp
->rsp_q_out
);
3221 ql_dbg(ql_dbg_init
, base_vha
, 0x003e,
3222 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3223 ha
->rsp_q_map
, ha
->req_q_map
, rsp
->req
, req
->rsp
);
3224 ql_dbg(ql_dbg_init
, base_vha
, 0x003f,
3225 "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3226 req
->req_q_in
, req
->req_q_out
, rsp
->rsp_q_in
, rsp
->rsp_q_out
);
3228 ha
->wq
= alloc_workqueue("qla2xxx_wq", 0, 0);
3230 if (ha
->isp_ops
->initialize_adapter(base_vha
)) {
3231 ql_log(ql_log_fatal
, base_vha
, 0x00d6,
3232 "Failed to initialize adapter - Adapter flags %x.\n",
3233 base_vha
->device_flags
);
3235 if (IS_QLA82XX(ha
)) {
3236 qla82xx_idc_lock(ha
);
3237 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
3238 QLA8XXX_DEV_FAILED
);
3239 qla82xx_idc_unlock(ha
);
3240 ql_log(ql_log_fatal
, base_vha
, 0x00d7,
3241 "HW State: FAILED.\n");
3242 } else if (IS_QLA8044(ha
)) {
3243 qla8044_idc_lock(ha
);
3244 qla8044_wr_direct(base_vha
,
3245 QLA8044_CRB_DEV_STATE_INDEX
,
3246 QLA8XXX_DEV_FAILED
);
3247 qla8044_idc_unlock(ha
);
3248 ql_log(ql_log_fatal
, base_vha
, 0x0150,
3249 "HW State: FAILED.\n");
3257 host
->can_queue
= QLAFX00_MAX_CANQUEUE
;
3259 host
->can_queue
= req
->num_outstanding_cmds
- 10;
3261 ql_dbg(ql_dbg_init
, base_vha
, 0x0032,
3262 "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3263 host
->can_queue
, base_vha
->req
,
3264 base_vha
->mgmt_svr_loop_id
, host
->sg_tablesize
);
3267 bool startit
= false;
3269 if (QLA_TGT_MODE_ENABLED())
3272 if (ql2x_ini_mode
== QLA2XXX_INI_MODE_ENABLED
)
3275 /* Create start of day qpairs for Block MQ */
3276 for (i
= 0; i
< ha
->max_qpairs
; i
++)
3277 qla2xxx_create_qpair(base_vha
, 5, 0, startit
);
3280 if (ha
->flags
.running_gold_fw
)
3284 * Startup the kernel thread for this host adapter
3286 ha
->dpc_thread
= kthread_create(qla2x00_do_dpc
, ha
,
3287 "%s_dpc", base_vha
->host_str
);
3288 if (IS_ERR(ha
->dpc_thread
)) {
3289 ql_log(ql_log_fatal
, base_vha
, 0x00ed,
3290 "Failed to start DPC thread.\n");
3291 ret
= PTR_ERR(ha
->dpc_thread
);
3292 ha
->dpc_thread
= NULL
;
3295 ql_dbg(ql_dbg_init
, base_vha
, 0x00ee,
3296 "DPC thread started successfully.\n");
3299 * If we're not coming up in initiator mode, we might sit for
3300 * a while without waking up the dpc thread, which leads to a
3301 * stuck process warning. So just kick the dpc once here and
3302 * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3304 qla2xxx_wake_dpc(base_vha
);
3306 INIT_WORK(&ha
->board_disable
, qla2x00_disable_board_on_pci_error
);
3308 if (IS_QLA8031(ha
) || IS_MCTP_CAPABLE(ha
)) {
3309 sprintf(wq_name
, "qla2xxx_%lu_dpc_lp_wq", base_vha
->host_no
);
3310 ha
->dpc_lp_wq
= create_singlethread_workqueue(wq_name
);
3311 INIT_WORK(&ha
->idc_aen
, qla83xx_service_idc_aen
);
3313 sprintf(wq_name
, "qla2xxx_%lu_dpc_hp_wq", base_vha
->host_no
);
3314 ha
->dpc_hp_wq
= create_singlethread_workqueue(wq_name
);
3315 INIT_WORK(&ha
->nic_core_reset
, qla83xx_nic_core_reset_work
);
3316 INIT_WORK(&ha
->idc_state_handler
,
3317 qla83xx_idc_state_handler_work
);
3318 INIT_WORK(&ha
->nic_core_unrecoverable
,
3319 qla83xx_nic_core_unrecoverable_work
);
3323 list_add_tail(&base_vha
->list
, &ha
->vp_list
);
3324 base_vha
->host
->irq
= ha
->pdev
->irq
;
3326 /* Initialized the timer */
3327 qla2x00_start_timer(base_vha
, WATCH_INTERVAL
);
3328 ql_dbg(ql_dbg_init
, base_vha
, 0x00ef,
3329 "Started qla2x00_timer with "
3330 "interval=%d.\n", WATCH_INTERVAL
);
3331 ql_dbg(ql_dbg_init
, base_vha
, 0x00f0,
3332 "Detected hba at address=%p.\n",
3335 if (IS_T10_PI_CAPABLE(ha
) && ql2xenabledif
) {
3336 if (ha
->fw_attributes
& BIT_4
) {
3337 int prot
= 0, guard
;
3339 base_vha
->flags
.difdix_supported
= 1;
3340 ql_dbg(ql_dbg_init
, base_vha
, 0x00f1,
3341 "Registering for DIF/DIX type 1 and 3 protection.\n");
3342 if (ql2xenabledif
== 1)
3343 prot
= SHOST_DIX_TYPE0_PROTECTION
;
3345 scsi_host_set_prot(host
, ql2xprotmask
);
3347 scsi_host_set_prot(host
,
3348 prot
| SHOST_DIF_TYPE1_PROTECTION
3349 | SHOST_DIF_TYPE2_PROTECTION
3350 | SHOST_DIF_TYPE3_PROTECTION
3351 | SHOST_DIX_TYPE1_PROTECTION
3352 | SHOST_DIX_TYPE2_PROTECTION
3353 | SHOST_DIX_TYPE3_PROTECTION
);
3355 guard
= SHOST_DIX_GUARD_CRC
;
3357 if (IS_PI_IPGUARD_CAPABLE(ha
) &&
3358 (ql2xenabledif
> 1 || IS_PI_DIFB_DIX0_CAPABLE(ha
)))
3359 guard
|= SHOST_DIX_GUARD_IP
;
3362 scsi_host_set_guard(host
, ql2xprotguard
);
3364 scsi_host_set_guard(host
, guard
);
3366 base_vha
->flags
.difdix_supported
= 0;
3369 ha
->isp_ops
->enable_intrs(ha
);
3371 if (IS_QLAFX00(ha
)) {
3372 ret
= qlafx00_fx_disc(base_vha
,
3373 &base_vha
->hw
->mr
.fcport
, FXDISC_GET_CONFIG_INFO
);
3374 host
->sg_tablesize
= (ha
->mr
.extended_io_enabled
) ?
3378 ret
= scsi_add_host(host
, &pdev
->dev
);
3382 base_vha
->flags
.init_done
= 1;
3383 base_vha
->flags
.online
= 1;
3384 ha
->prev_minidump_failed
= 0;
3386 ql_dbg(ql_dbg_init
, base_vha
, 0x00f2,
3387 "Init done and hba is online.\n");
3389 if (qla_ini_mode_enabled(base_vha
) ||
3390 qla_dual_mode_enabled(base_vha
))
3391 scsi_scan_host(host
);
3393 ql_dbg(ql_dbg_init
, base_vha
, 0x0122,
3394 "skipping scsi_scan_host() for non-initiator port\n");
3396 qla2x00_alloc_sysfs_attr(base_vha
);
3398 if (IS_QLAFX00(ha
)) {
3399 ret
= qlafx00_fx_disc(base_vha
,
3400 &base_vha
->hw
->mr
.fcport
, FXDISC_GET_PORT_INFO
);
3402 /* Register system information */
3403 ret
= qlafx00_fx_disc(base_vha
,
3404 &base_vha
->hw
->mr
.fcport
, FXDISC_REG_HOST_INFO
);
3407 qla2x00_init_host_attr(base_vha
);
3409 qla2x00_dfs_setup(base_vha
);
3411 ql_log(ql_log_info
, base_vha
, 0x00fb,
3412 "QLogic %s - %s.\n", ha
->model_number
, ha
->model_desc
);
3413 ql_log(ql_log_info
, base_vha
, 0x00fc,
3414 "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3415 pdev
->device
, ha
->isp_ops
->pci_info_str(base_vha
, pci_info
,
3417 pci_name(pdev
), ha
->flags
.enable_64bit_addressing
? '+' : '-',
3419 ha
->isp_ops
->fw_version_str(base_vha
, fw_str
, sizeof(fw_str
)));
3421 qlt_add_target(ha
, base_vha
);
3423 clear_bit(PFLG_DRIVER_PROBING
, &base_vha
->pci_flags
);
3425 if (test_bit(UNLOADING
, &base_vha
->dpc_flags
))
3428 if (ha
->flags
.detected_lr_sfp
) {
3429 ql_log(ql_log_info
, base_vha
, 0xffff,
3430 "Reset chip to pick up LR SFP setting\n");
3431 set_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
);
3432 qla2xxx_wake_dpc(base_vha
);
3438 if (base_vha
->timer_active
)
3439 qla2x00_stop_timer(base_vha
);
3440 base_vha
->flags
.online
= 0;
3441 if (ha
->dpc_thread
) {
3442 struct task_struct
*t
= ha
->dpc_thread
;
3444 ha
->dpc_thread
= NULL
;
3448 qla2x00_free_device(base_vha
);
3449 scsi_host_put(base_vha
->host
);
3451 * Need to NULL out local req/rsp after
3452 * qla2x00_free_device => qla2x00_free_queues frees
3453 * what these are pointing to. Or else we'll
3454 * fall over below in qla2x00_free_req/rsp_que.
3460 qla2x00_mem_free(ha
);
3461 qla2x00_free_req_que(ha
, req
);
3462 qla2x00_free_rsp_que(ha
, rsp
);
3463 qla2x00_clear_drv_active(ha
);
3465 iospace_config_failed
:
3466 if (IS_P3P_TYPE(ha
)) {
3467 if (!ha
->nx_pcibase
)
3468 iounmap((device_reg_t
*)ha
->nx_pcibase
);
3470 iounmap((device_reg_t
*)ha
->nxdb_wr_ptr
);
3473 iounmap(ha
->iobase
);
3475 iounmap(ha
->cregbase
);
3477 pci_release_selected_regions(ha
->pdev
, ha
->bars
);
3481 pci_disable_device(pdev
);
3486 qla2x00_shutdown(struct pci_dev
*pdev
)
3488 scsi_qla_host_t
*vha
;
3489 struct qla_hw_data
*ha
;
3491 vha
= pci_get_drvdata(pdev
);
3494 ql_log(ql_log_info
, vha
, 0xfffa,
3495 "Adapter shutdown\n");
3498 * Prevent future board_disable and wait
3499 * until any pending board_disable has completed.
3501 set_bit(PFLG_DRIVER_REMOVING
, &vha
->pci_flags
);
3502 cancel_work_sync(&ha
->board_disable
);
3504 if (!atomic_read(&pdev
->enable_cnt
))
3507 /* Notify ISPFX00 firmware */
3509 qlafx00_driver_shutdown(vha
, 20);
3511 /* Turn-off FCE trace */
3512 if (ha
->flags
.fce_enabled
) {
3513 qla2x00_disable_fce_trace(vha
, NULL
, NULL
);
3514 ha
->flags
.fce_enabled
= 0;
3517 /* Turn-off EFT trace */
3519 qla2x00_disable_eft_trace(vha
);
3521 if (IS_QLA25XX(ha
) || IS_QLA2031(ha
) || IS_QLA27XX(ha
) ||
3523 if (ha
->flags
.fw_started
)
3524 qla2x00_abort_isp_cleanup(vha
);
3526 /* Stop currently executing firmware. */
3527 qla2x00_try_to_stop_firmware(vha
);
3530 /* Turn adapter off line */
3531 vha
->flags
.online
= 0;
3533 /* turn-off interrupts on the card */
3534 if (ha
->interrupts_on
) {
3535 vha
->flags
.init_done
= 0;
3536 ha
->isp_ops
->disable_intrs(ha
);
3539 qla2x00_free_irqs(vha
);
3541 qla2x00_free_fw_dump(ha
);
3543 pci_disable_device(pdev
);
3544 ql_log(ql_log_info
, vha
, 0xfffe,
3545 "Adapter shutdown successfully.\n");
3548 /* Deletes all the virtual ports for a given ha */
3550 qla2x00_delete_all_vps(struct qla_hw_data
*ha
, scsi_qla_host_t
*base_vha
)
3552 scsi_qla_host_t
*vha
;
3553 unsigned long flags
;
3555 mutex_lock(&ha
->vport_lock
);
3556 while (ha
->cur_vport_count
) {
3557 spin_lock_irqsave(&ha
->vport_slock
, flags
);
3559 BUG_ON(base_vha
->list
.next
== &ha
->vp_list
);
3560 /* This assumes first entry in ha->vp_list is always base vha */
3561 vha
= list_first_entry(&base_vha
->list
, scsi_qla_host_t
, list
);
3562 scsi_host_get(vha
->host
);
3564 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
3565 mutex_unlock(&ha
->vport_lock
);
3567 qla_nvme_delete(vha
);
3569 fc_vport_terminate(vha
->fc_vport
);
3570 scsi_host_put(vha
->host
);
3572 mutex_lock(&ha
->vport_lock
);
3574 mutex_unlock(&ha
->vport_lock
);
3577 /* Stops all deferred work threads */
3579 qla2x00_destroy_deferred_work(struct qla_hw_data
*ha
)
3581 /* Cancel all work and destroy DPC workqueues */
3582 if (ha
->dpc_lp_wq
) {
3583 cancel_work_sync(&ha
->idc_aen
);
3584 destroy_workqueue(ha
->dpc_lp_wq
);
3585 ha
->dpc_lp_wq
= NULL
;
3588 if (ha
->dpc_hp_wq
) {
3589 cancel_work_sync(&ha
->nic_core_reset
);
3590 cancel_work_sync(&ha
->idc_state_handler
);
3591 cancel_work_sync(&ha
->nic_core_unrecoverable
);
3592 destroy_workqueue(ha
->dpc_hp_wq
);
3593 ha
->dpc_hp_wq
= NULL
;
3596 /* Kill the kernel thread for this host */
3597 if (ha
->dpc_thread
) {
3598 struct task_struct
*t
= ha
->dpc_thread
;
3601 * qla2xxx_wake_dpc checks for ->dpc_thread
3602 * so we need to zero it out.
3604 ha
->dpc_thread
= NULL
;
3610 qla2x00_unmap_iobases(struct qla_hw_data
*ha
)
3612 if (IS_QLA82XX(ha
)) {
3614 iounmap((device_reg_t
*)ha
->nx_pcibase
);
3616 iounmap((device_reg_t
*)ha
->nxdb_wr_ptr
);
3619 iounmap(ha
->iobase
);
3622 iounmap(ha
->cregbase
);
3625 iounmap(ha
->mqiobase
);
3627 if ((IS_QLA83XX(ha
) || IS_QLA27XX(ha
) || IS_QLA28XX(ha
)) &&
3629 iounmap(ha
->msixbase
);
3634 qla2x00_clear_drv_active(struct qla_hw_data
*ha
)
3636 if (IS_QLA8044(ha
)) {
3637 qla8044_idc_lock(ha
);
3638 qla8044_clear_drv_active(ha
);
3639 qla8044_idc_unlock(ha
);
3640 } else if (IS_QLA82XX(ha
)) {
3641 qla82xx_idc_lock(ha
);
3642 qla82xx_clear_drv_active(ha
);
3643 qla82xx_idc_unlock(ha
);
3648 qla2x00_remove_one(struct pci_dev
*pdev
)
3650 scsi_qla_host_t
*base_vha
;
3651 struct qla_hw_data
*ha
;
3653 base_vha
= pci_get_drvdata(pdev
);
3655 ql_log(ql_log_info
, base_vha
, 0xb079,
3656 "Removing driver\n");
3658 /* Indicate device removal to prevent future board_disable and wait
3659 * until any pending board_disable has completed. */
3660 set_bit(PFLG_DRIVER_REMOVING
, &base_vha
->pci_flags
);
3661 cancel_work_sync(&ha
->board_disable
);
3664 * If the PCI device is disabled then there was a PCI-disconnect and
3665 * qla2x00_disable_board_on_pci_error has taken care of most of the
3668 if (!atomic_read(&pdev
->enable_cnt
)) {
3669 dma_free_coherent(&ha
->pdev
->dev
, base_vha
->gnl
.size
,
3670 base_vha
->gnl
.l
, base_vha
->gnl
.ldma
);
3672 scsi_host_put(base_vha
->host
);
3674 pci_set_drvdata(pdev
, NULL
);
3677 qla2x00_wait_for_hba_ready(base_vha
);
3679 if (IS_QLA25XX(ha
) || IS_QLA2031(ha
) || IS_QLA27XX(ha
) ||
3681 if (ha
->flags
.fw_started
)
3682 qla2x00_abort_isp_cleanup(base_vha
);
3683 } else if (!IS_QLAFX00(ha
)) {
3684 if (IS_QLA8031(ha
)) {
3685 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07e,
3686 "Clearing fcoe driver presence.\n");
3687 if (qla83xx_clear_drv_presence(base_vha
) != QLA_SUCCESS
)
3688 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb079,
3689 "Error while clearing DRV-Presence.\n");
3692 qla2x00_try_to_stop_firmware(base_vha
);
3695 qla2x00_wait_for_sess_deletion(base_vha
);
3698 * if UNLOAD flag is already set, then continue unload,
3699 * where it was set first.
3701 if (test_bit(UNLOADING
, &base_vha
->dpc_flags
))
3704 set_bit(UNLOADING
, &base_vha
->dpc_flags
);
3706 qla_nvme_delete(base_vha
);
3708 dma_free_coherent(&ha
->pdev
->dev
,
3709 base_vha
->gnl
.size
, base_vha
->gnl
.l
, base_vha
->gnl
.ldma
);
3711 vfree(base_vha
->scan
.l
);
3714 qlafx00_driver_shutdown(base_vha
, 20);
3716 qla2x00_delete_all_vps(ha
, base_vha
);
3718 qla2x00_dfs_remove(base_vha
);
3720 qla84xx_put_chip(base_vha
);
3723 if (base_vha
->timer_active
)
3724 qla2x00_stop_timer(base_vha
);
3726 base_vha
->flags
.online
= 0;
3728 /* free DMA memory */
3729 if (ha
->exlogin_buf
)
3730 qla2x00_free_exlogin_buffer(ha
);
3732 /* free DMA memory */
3733 if (ha
->exchoffld_buf
)
3734 qla2x00_free_exchoffld_buffer(ha
);
3736 qla2x00_destroy_deferred_work(ha
);
3738 qlt_remove_target(ha
, base_vha
);
3740 qla2x00_free_sysfs_attr(base_vha
, true);
3742 fc_remove_host(base_vha
->host
);
3743 qlt_remove_target_resources(ha
);
3745 scsi_remove_host(base_vha
->host
);
3747 qla2x00_free_device(base_vha
);
3749 qla2x00_clear_drv_active(ha
);
3751 scsi_host_put(base_vha
->host
);
3753 qla2x00_unmap_iobases(ha
);
3755 pci_release_selected_regions(ha
->pdev
, ha
->bars
);
3758 pci_disable_pcie_error_reporting(pdev
);
3760 pci_disable_device(pdev
);
3764 qla2x00_free_device(scsi_qla_host_t
*vha
)
3766 struct qla_hw_data
*ha
= vha
->hw
;
3768 qla2x00_abort_all_cmds(vha
, DID_NO_CONNECT
<< 16);
3771 if (vha
->timer_active
)
3772 qla2x00_stop_timer(vha
);
3774 qla25xx_delete_queues(vha
);
3775 vha
->flags
.online
= 0;
3777 /* turn-off interrupts on the card */
3778 if (ha
->interrupts_on
) {
3779 vha
->flags
.init_done
= 0;
3780 ha
->isp_ops
->disable_intrs(ha
);
3783 qla2x00_free_fcports(vha
);
3785 qla2x00_free_irqs(vha
);
3787 /* Flush the work queue and remove it */
3789 flush_workqueue(ha
->wq
);
3790 destroy_workqueue(ha
->wq
);
3795 qla2x00_mem_free(ha
);
3797 qla82xx_md_free(vha
);
3799 qla2x00_free_queues(ha
);
3802 void qla2x00_free_fcports(struct scsi_qla_host
*vha
)
3804 fc_port_t
*fcport
, *tfcport
;
3806 list_for_each_entry_safe(fcport
, tfcport
, &vha
->vp_fcports
, list
)
3807 qla2x00_free_fcport(fcport
);
3811 qla2x00_schedule_rport_del(struct scsi_qla_host
*vha
, fc_port_t
*fcport
,
3814 struct fc_rport
*rport
;
3815 scsi_qla_host_t
*base_vha
;
3816 unsigned long flags
;
3821 rport
= fcport
->rport
;
3823 base_vha
= pci_get_drvdata(vha
->hw
->pdev
);
3824 spin_lock_irqsave(vha
->host
->host_lock
, flags
);
3825 fcport
->drport
= rport
;
3826 spin_unlock_irqrestore(vha
->host
->host_lock
, flags
);
3827 qlt_do_generation_tick(vha
, &base_vha
->total_fcport_update_gen
);
3828 set_bit(FCPORT_UPDATE_NEEDED
, &base_vha
->dpc_flags
);
3829 qla2xxx_wake_dpc(base_vha
);
3834 ql_dbg(ql_dbg_disc
, fcport
->vha
, 0x2109,
3835 "%s %8phN. rport %p roles %x\n",
3836 __func__
, fcport
->port_name
, rport
,
3838 fc_remote_port_delete(rport
);
3840 qlt_do_generation_tick(vha
, &now
);
3845 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3847 * Input: ha = adapter block pointer. fcport = port structure pointer.
3853 void qla2x00_mark_device_lost(scsi_qla_host_t
*vha
, fc_port_t
*fcport
,
3854 int do_login
, int defer
)
3856 if (IS_QLAFX00(vha
->hw
)) {
3857 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3858 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3862 if (atomic_read(&fcport
->state
) == FCS_ONLINE
&&
3863 vha
->vp_idx
== fcport
->vha
->vp_idx
) {
3864 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3865 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3868 * We may need to retry the login, so don't change the state of the
3869 * port but do the retries.
3871 if (atomic_read(&fcport
->state
) != FCS_DEVICE_DEAD
)
3872 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3877 set_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
);
3881 * qla2x00_mark_all_devices_lost
3882 * Updates fcport state when device goes offline.
3885 * ha = adapter block pointer.
3886 * fcport = port structure pointer.
3894 qla2x00_mark_all_devices_lost(scsi_qla_host_t
*vha
, int defer
)
3898 ql_dbg(ql_dbg_disc
, vha
, 0x20f1,
3899 "Mark all dev lost\n");
3901 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
3902 fcport
->scan_state
= 0;
3903 qlt_schedule_sess_for_deletion(fcport
);
3905 if (vha
->vp_idx
!= 0 && vha
->vp_idx
!= fcport
->vha
->vp_idx
)
3909 * No point in marking the device as lost, if the device is
3912 if (atomic_read(&fcport
->state
) == FCS_DEVICE_DEAD
)
3914 if (atomic_read(&fcport
->state
) == FCS_ONLINE
) {
3915 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3917 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3918 else if (vha
->vp_idx
== fcport
->vha
->vp_idx
)
3919 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3924 static void qla2x00_set_reserved_loop_ids(struct qla_hw_data
*ha
)
3928 if (IS_FWI2_CAPABLE(ha
))
3931 for (i
= 0; i
< SNS_FIRST_LOOP_ID
; i
++)
3932 set_bit(i
, ha
->loop_id_map
);
3933 set_bit(MANAGEMENT_SERVER
, ha
->loop_id_map
);
3934 set_bit(BROADCAST
, ha
->loop_id_map
);
3939 * Allocates adapter memory.
3946 qla2x00_mem_alloc(struct qla_hw_data
*ha
, uint16_t req_len
, uint16_t rsp_len
,
3947 struct req_que
**req
, struct rsp_que
**rsp
)
3951 ha
->init_cb
= dma_alloc_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
,
3952 &ha
->init_cb_dma
, GFP_KERNEL
);
3956 if (qlt_mem_alloc(ha
) < 0)
3957 goto fail_free_init_cb
;
3959 ha
->gid_list
= dma_alloc_coherent(&ha
->pdev
->dev
,
3960 qla2x00_gid_list_size(ha
), &ha
->gid_list_dma
, GFP_KERNEL
);
3962 goto fail_free_tgt_mem
;
3964 ha
->srb_mempool
= mempool_create_slab_pool(SRB_MIN_REQ
, srb_cachep
);
3965 if (!ha
->srb_mempool
)
3966 goto fail_free_gid_list
;
3968 if (IS_P3P_TYPE(ha
)) {
3969 /* Allocate cache for CT6 Ctx. */
3971 ctx_cachep
= kmem_cache_create("qla2xxx_ctx",
3972 sizeof(struct ct6_dsd
), 0,
3973 SLAB_HWCACHE_ALIGN
, NULL
);
3975 goto fail_free_srb_mempool
;
3977 ha
->ctx_mempool
= mempool_create_slab_pool(SRB_MIN_REQ
,
3979 if (!ha
->ctx_mempool
)
3980 goto fail_free_srb_mempool
;
3981 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0021,
3982 "ctx_cachep=%p ctx_mempool=%p.\n",
3983 ctx_cachep
, ha
->ctx_mempool
);
3986 /* Get memory for cached NVRAM */
3987 ha
->nvram
= kzalloc(MAX_NVRAM_SIZE
, GFP_KERNEL
);
3989 goto fail_free_ctx_mempool
;
3991 snprintf(name
, sizeof(name
), "%s_%d", QLA2XXX_DRIVER_NAME
,
3993 ha
->s_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
3994 DMA_POOL_SIZE
, 8, 0);
3995 if (!ha
->s_dma_pool
)
3996 goto fail_free_nvram
;
3998 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0022,
3999 "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
4000 ha
->init_cb
, ha
->gid_list
, ha
->srb_mempool
, ha
->s_dma_pool
);
4002 if (IS_P3P_TYPE(ha
) || ql2xenabledif
) {
4003 ha
->dl_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
4004 DSD_LIST_DMA_POOL_SIZE
, 8, 0);
4005 if (!ha
->dl_dma_pool
) {
4006 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0023,
4007 "Failed to allocate memory for dl_dma_pool.\n");
4008 goto fail_s_dma_pool
;
4011 ha
->fcp_cmnd_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
4012 FCP_CMND_DMA_POOL_SIZE
, 8, 0);
4013 if (!ha
->fcp_cmnd_dma_pool
) {
4014 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0024,
4015 "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
4016 goto fail_dl_dma_pool
;
4019 if (ql2xenabledif
) {
4020 u64 bufsize
= DIF_BUNDLING_DMA_POOL_SIZE
;
4021 struct dsd_dma
*dsd
, *nxt
;
4023 /* Creata a DMA pool of buffers for DIF bundling */
4024 ha
->dif_bundl_pool
= dma_pool_create(name
,
4025 &ha
->pdev
->dev
, DIF_BUNDLING_DMA_POOL_SIZE
, 8, 0);
4026 if (!ha
->dif_bundl_pool
) {
4027 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0024,
4028 "%s: failed create dif_bundl_pool\n",
4030 goto fail_dif_bundl_dma_pool
;
4033 INIT_LIST_HEAD(&ha
->pool
.good
.head
);
4034 INIT_LIST_HEAD(&ha
->pool
.unusable
.head
);
4035 ha
->pool
.good
.count
= 0;
4036 ha
->pool
.unusable
.count
= 0;
4037 for (i
= 0; i
< 128; i
++) {
4038 dsd
= kzalloc(sizeof(*dsd
), GFP_ATOMIC
);
4040 ql_dbg_pci(ql_dbg_init
, ha
->pdev
,
4041 0xe0ee, "%s: failed alloc dsd\n",
4045 ha
->dif_bundle_kallocs
++;
4047 dsd
->dsd_addr
= dma_pool_alloc(
4048 ha
->dif_bundl_pool
, GFP_ATOMIC
,
4049 &dsd
->dsd_list_dma
);
4050 if (!dsd
->dsd_addr
) {
4051 ql_dbg_pci(ql_dbg_init
, ha
->pdev
,
4053 "%s: failed alloc ->dsd_addr\n",
4056 ha
->dif_bundle_kallocs
--;
4059 ha
->dif_bundle_dma_allocs
++;
4062 * if DMA buffer crosses 4G boundary,
4063 * put it on bad list
4065 if (MSD(dsd
->dsd_list_dma
) ^
4066 MSD(dsd
->dsd_list_dma
+ bufsize
)) {
4067 list_add_tail(&dsd
->list
,
4068 &ha
->pool
.unusable
.head
);
4069 ha
->pool
.unusable
.count
++;
4071 list_add_tail(&dsd
->list
,
4072 &ha
->pool
.good
.head
);
4073 ha
->pool
.good
.count
++;
4077 /* return the good ones back to the pool */
4078 list_for_each_entry_safe(dsd
, nxt
,
4079 &ha
->pool
.good
.head
, list
) {
4080 list_del(&dsd
->list
);
4081 dma_pool_free(ha
->dif_bundl_pool
,
4082 dsd
->dsd_addr
, dsd
->dsd_list_dma
);
4083 ha
->dif_bundle_dma_allocs
--;
4085 ha
->dif_bundle_kallocs
--;
4088 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0024,
4089 "%s: dif dma pool (good=%u unusable=%u)\n",
4090 __func__
, ha
->pool
.good
.count
,
4091 ha
->pool
.unusable
.count
);
4094 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0025,
4095 "dl_dma_pool=%p fcp_cmnd_dma_pool=%p dif_bundl_pool=%p.\n",
4096 ha
->dl_dma_pool
, ha
->fcp_cmnd_dma_pool
,
4097 ha
->dif_bundl_pool
);
4100 /* Allocate memory for SNS commands */
4101 if (IS_QLA2100(ha
) || IS_QLA2200(ha
)) {
4102 /* Get consistent memory allocated for SNS commands */
4103 ha
->sns_cmd
= dma_alloc_coherent(&ha
->pdev
->dev
,
4104 sizeof(struct sns_cmd_pkt
), &ha
->sns_cmd_dma
, GFP_KERNEL
);
4107 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0026,
4108 "sns_cmd: %p.\n", ha
->sns_cmd
);
4110 /* Get consistent memory allocated for MS IOCB */
4111 ha
->ms_iocb
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
4115 /* Get consistent memory allocated for CT SNS commands */
4116 ha
->ct_sns
= dma_alloc_coherent(&ha
->pdev
->dev
,
4117 sizeof(struct ct_sns_pkt
), &ha
->ct_sns_dma
, GFP_KERNEL
);
4119 goto fail_free_ms_iocb
;
4120 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0027,
4121 "ms_iocb=%p ct_sns=%p.\n",
4122 ha
->ms_iocb
, ha
->ct_sns
);
4125 /* Allocate memory for request ring */
4126 *req
= kzalloc(sizeof(struct req_que
), GFP_KERNEL
);
4128 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0028,
4129 "Failed to allocate memory for req.\n");
4132 (*req
)->length
= req_len
;
4133 (*req
)->ring
= dma_alloc_coherent(&ha
->pdev
->dev
,
4134 ((*req
)->length
+ 1) * sizeof(request_t
),
4135 &(*req
)->dma
, GFP_KERNEL
);
4136 if (!(*req
)->ring
) {
4137 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0029,
4138 "Failed to allocate memory for req_ring.\n");
4141 /* Allocate memory for response ring */
4142 *rsp
= kzalloc(sizeof(struct rsp_que
), GFP_KERNEL
);
4144 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002a,
4145 "Failed to allocate memory for rsp.\n");
4149 (*rsp
)->length
= rsp_len
;
4150 (*rsp
)->ring
= dma_alloc_coherent(&ha
->pdev
->dev
,
4151 ((*rsp
)->length
+ 1) * sizeof(response_t
),
4152 &(*rsp
)->dma
, GFP_KERNEL
);
4153 if (!(*rsp
)->ring
) {
4154 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002b,
4155 "Failed to allocate memory for rsp_ring.\n");
4160 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002c,
4161 "req=%p req->length=%d req->ring=%p rsp=%p "
4162 "rsp->length=%d rsp->ring=%p.\n",
4163 *req
, (*req
)->length
, (*req
)->ring
, *rsp
, (*rsp
)->length
,
4165 /* Allocate memory for NVRAM data for vports */
4166 if (ha
->nvram_npiv_size
) {
4167 ha
->npiv_info
= kcalloc(ha
->nvram_npiv_size
,
4168 sizeof(struct qla_npiv_entry
),
4170 if (!ha
->npiv_info
) {
4171 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002d,
4172 "Failed to allocate memory for npiv_info.\n");
4173 goto fail_npiv_info
;
4176 ha
->npiv_info
= NULL
;
4178 /* Get consistent memory allocated for EX-INIT-CB. */
4179 if (IS_CNA_CAPABLE(ha
) || IS_QLA2031(ha
) || IS_QLA27XX(ha
) ||
4181 ha
->ex_init_cb
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
4182 &ha
->ex_init_cb_dma
);
4183 if (!ha
->ex_init_cb
)
4184 goto fail_ex_init_cb
;
4185 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002e,
4186 "ex_init_cb=%p.\n", ha
->ex_init_cb
);
4189 INIT_LIST_HEAD(&ha
->gbl_dsd_list
);
4191 /* Get consistent memory allocated for Async Port-Database. */
4192 if (!IS_FWI2_CAPABLE(ha
)) {
4193 ha
->async_pd
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
4197 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002f,
4198 "async_pd=%p.\n", ha
->async_pd
);
4201 INIT_LIST_HEAD(&ha
->vp_list
);
4203 /* Allocate memory for our loop_id bitmap */
4204 ha
->loop_id_map
= kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE
),
4207 if (!ha
->loop_id_map
)
4208 goto fail_loop_id_map
;
4210 qla2x00_set_reserved_loop_ids(ha
);
4211 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0123,
4212 "loop_id_map=%p.\n", ha
->loop_id_map
);
4215 ha
->sfp_data
= dma_alloc_coherent(&ha
->pdev
->dev
,
4216 SFP_DEV_SIZE
, &ha
->sfp_data_dma
, GFP_KERNEL
);
4217 if (!ha
->sfp_data
) {
4218 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x011b,
4219 "Unable to allocate memory for SFP read-data.\n");
4223 ha
->flt
= dma_alloc_coherent(&ha
->pdev
->dev
,
4224 sizeof(struct qla_flt_header
) + FLT_REGIONS_SIZE
, &ha
->flt_dma
,
4227 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x011b,
4228 "Unable to allocate memory for FLT.\n");
4229 goto fail_flt_buffer
;
4235 dma_free_coherent(&ha
->pdev
->dev
, SFP_DEV_SIZE
,
4236 ha
->sfp_data
, ha
->sfp_data_dma
);
4238 kfree(ha
->loop_id_map
);
4240 dma_pool_free(ha
->s_dma_pool
, ha
->async_pd
, ha
->async_pd_dma
);
4242 dma_pool_free(ha
->s_dma_pool
, ha
->ex_init_cb
, ha
->ex_init_cb_dma
);
4244 kfree(ha
->npiv_info
);
4246 dma_free_coherent(&ha
->pdev
->dev
, ((*rsp
)->length
+ 1) *
4247 sizeof(response_t
), (*rsp
)->ring
, (*rsp
)->dma
);
4248 (*rsp
)->ring
= NULL
;
4254 dma_free_coherent(&ha
->pdev
->dev
, ((*req
)->length
+ 1) *
4255 sizeof(request_t
), (*req
)->ring
, (*req
)->dma
);
4256 (*req
)->ring
= NULL
;
4262 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct ct_sns_pkt
),
4263 ha
->ct_sns
, ha
->ct_sns_dma
);
4267 dma_pool_free(ha
->s_dma_pool
, ha
->ms_iocb
, ha
->ms_iocb_dma
);
4269 ha
->ms_iocb_dma
= 0;
4272 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct sns_cmd_pkt
),
4273 ha
->sns_cmd
, ha
->sns_cmd_dma
);
4275 if (ql2xenabledif
) {
4276 struct dsd_dma
*dsd
, *nxt
;
4278 list_for_each_entry_safe(dsd
, nxt
, &ha
->pool
.unusable
.head
,
4280 list_del(&dsd
->list
);
4281 dma_pool_free(ha
->dif_bundl_pool
, dsd
->dsd_addr
,
4283 ha
->dif_bundle_dma_allocs
--;
4285 ha
->dif_bundle_kallocs
--;
4286 ha
->pool
.unusable
.count
--;
4288 dma_pool_destroy(ha
->dif_bundl_pool
);
4289 ha
->dif_bundl_pool
= NULL
;
4292 fail_dif_bundl_dma_pool
:
4293 if (IS_QLA82XX(ha
) || ql2xenabledif
) {
4294 dma_pool_destroy(ha
->fcp_cmnd_dma_pool
);
4295 ha
->fcp_cmnd_dma_pool
= NULL
;
4298 if (IS_QLA82XX(ha
) || ql2xenabledif
) {
4299 dma_pool_destroy(ha
->dl_dma_pool
);
4300 ha
->dl_dma_pool
= NULL
;
4303 dma_pool_destroy(ha
->s_dma_pool
);
4304 ha
->s_dma_pool
= NULL
;
4308 fail_free_ctx_mempool
:
4309 mempool_destroy(ha
->ctx_mempool
);
4310 ha
->ctx_mempool
= NULL
;
4311 fail_free_srb_mempool
:
4312 mempool_destroy(ha
->srb_mempool
);
4313 ha
->srb_mempool
= NULL
;
4315 dma_free_coherent(&ha
->pdev
->dev
, qla2x00_gid_list_size(ha
),
4318 ha
->gid_list
= NULL
;
4319 ha
->gid_list_dma
= 0;
4323 dma_free_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
, ha
->init_cb
,
4326 ha
->init_cb_dma
= 0;
4328 ql_log(ql_log_fatal
, NULL
, 0x0030,
4329 "Memory allocation failure.\n");
4334 qla2x00_set_exlogins_buffer(scsi_qla_host_t
*vha
)
4337 uint16_t size
, max_cnt
, temp
;
4338 struct qla_hw_data
*ha
= vha
->hw
;
4340 /* Return if we don't need to alloacate any extended logins */
4344 if (!IS_EXLOGIN_OFFLD_CAPABLE(ha
))
4347 ql_log(ql_log_info
, vha
, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins
);
4349 rval
= qla_get_exlogin_status(vha
, &size
, &max_cnt
);
4350 if (rval
!= QLA_SUCCESS
) {
4351 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0xd029,
4352 "Failed to get exlogin status.\n");
4356 temp
= (ql2xexlogins
> max_cnt
) ? max_cnt
: ql2xexlogins
;
4359 if (temp
!= ha
->exlogin_size
) {
4360 qla2x00_free_exlogin_buffer(ha
);
4361 ha
->exlogin_size
= temp
;
4363 ql_log(ql_log_info
, vha
, 0xd024,
4364 "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4365 max_cnt
, size
, temp
);
4367 ql_log(ql_log_info
, vha
, 0xd025,
4368 "EXLOGIN: requested size=0x%x\n", ha
->exlogin_size
);
4370 /* Get consistent memory for extended logins */
4371 ha
->exlogin_buf
= dma_alloc_coherent(&ha
->pdev
->dev
,
4372 ha
->exlogin_size
, &ha
->exlogin_buf_dma
, GFP_KERNEL
);
4373 if (!ha
->exlogin_buf
) {
4374 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0xd02a,
4375 "Failed to allocate memory for exlogin_buf_dma.\n");
4380 /* Now configure the dma buffer */
4381 rval
= qla_set_exlogin_mem_cfg(vha
, ha
->exlogin_buf_dma
);
4383 ql_log(ql_log_fatal
, vha
, 0xd033,
4384 "Setup extended login buffer ****FAILED****.\n");
4385 qla2x00_free_exlogin_buffer(ha
);
4392 * qla2x00_free_exlogin_buffer
4395 * ha = adapter block pointer
4398 qla2x00_free_exlogin_buffer(struct qla_hw_data
*ha
)
4400 if (ha
->exlogin_buf
) {
4401 dma_free_coherent(&ha
->pdev
->dev
, ha
->exlogin_size
,
4402 ha
->exlogin_buf
, ha
->exlogin_buf_dma
);
4403 ha
->exlogin_buf
= NULL
;
4404 ha
->exlogin_size
= 0;
4409 qla2x00_number_of_exch(scsi_qla_host_t
*vha
, u32
*ret_cnt
, u16 max_cnt
)
4412 struct init_cb_81xx
*icb
= (struct init_cb_81xx
*)&vha
->hw
->init_cb
;
4413 *ret_cnt
= FW_DEF_EXCHANGES_CNT
;
4415 if (max_cnt
> vha
->hw
->max_exchg
)
4416 max_cnt
= vha
->hw
->max_exchg
;
4418 if (qla_ini_mode_enabled(vha
)) {
4419 if (vha
->ql2xiniexchg
> max_cnt
)
4420 vha
->ql2xiniexchg
= max_cnt
;
4422 if (vha
->ql2xiniexchg
> FW_DEF_EXCHANGES_CNT
)
4423 *ret_cnt
= vha
->ql2xiniexchg
;
4425 } else if (qla_tgt_mode_enabled(vha
)) {
4426 if (vha
->ql2xexchoffld
> max_cnt
) {
4427 vha
->ql2xexchoffld
= max_cnt
;
4428 icb
->exchange_count
= cpu_to_le16(vha
->ql2xexchoffld
);
4431 if (vha
->ql2xexchoffld
> FW_DEF_EXCHANGES_CNT
)
4432 *ret_cnt
= vha
->ql2xexchoffld
;
4433 } else if (qla_dual_mode_enabled(vha
)) {
4434 temp
= vha
->ql2xiniexchg
+ vha
->ql2xexchoffld
;
4435 if (temp
> max_cnt
) {
4436 vha
->ql2xiniexchg
-= (temp
- max_cnt
)/2;
4437 vha
->ql2xexchoffld
-= (((temp
- max_cnt
)/2) + 1);
4439 icb
->exchange_count
= cpu_to_le16(vha
->ql2xexchoffld
);
4442 if (temp
> FW_DEF_EXCHANGES_CNT
)
4448 qla2x00_set_exchoffld_buffer(scsi_qla_host_t
*vha
)
4452 u32 actual_cnt
, totsz
;
4453 struct qla_hw_data
*ha
= vha
->hw
;
4455 if (!ha
->flags
.exchoffld_enabled
)
4458 if (!IS_EXCHG_OFFLD_CAPABLE(ha
))
4462 rval
= qla_get_exchoffld_status(vha
, &size
, &max_cnt
);
4463 if (rval
!= QLA_SUCCESS
) {
4464 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0xd012,
4465 "Failed to get exlogin status.\n");
4469 qla2x00_number_of_exch(vha
, &actual_cnt
, max_cnt
);
4470 ql_log(ql_log_info
, vha
, 0xd014,
4471 "Actual exchange offload count: %d.\n", actual_cnt
);
4473 totsz
= actual_cnt
* size
;
4475 if (totsz
!= ha
->exchoffld_size
) {
4476 qla2x00_free_exchoffld_buffer(ha
);
4477 if (actual_cnt
<= FW_DEF_EXCHANGES_CNT
) {
4478 ha
->exchoffld_size
= 0;
4479 ha
->flags
.exchoffld_enabled
= 0;
4483 ha
->exchoffld_size
= totsz
;
4485 ql_log(ql_log_info
, vha
, 0xd016,
4486 "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4487 max_cnt
, actual_cnt
, size
, totsz
);
4489 ql_log(ql_log_info
, vha
, 0xd017,
4490 "Exchange Buffers requested size = 0x%x\n",
4491 ha
->exchoffld_size
);
4493 /* Get consistent memory for extended logins */
4494 ha
->exchoffld_buf
= dma_alloc_coherent(&ha
->pdev
->dev
,
4495 ha
->exchoffld_size
, &ha
->exchoffld_buf_dma
, GFP_KERNEL
);
4496 if (!ha
->exchoffld_buf
) {
4497 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0xd013,
4498 "Failed to allocate memory for Exchange Offload.\n");
4501 (FW_DEF_EXCHANGES_CNT
+ REDUCE_EXCHANGES_CNT
)) {
4502 ha
->max_exchg
-= REDUCE_EXCHANGES_CNT
;
4503 } else if (ha
->max_exchg
>
4504 (FW_DEF_EXCHANGES_CNT
+ 512)) {
4505 ha
->max_exchg
-= 512;
4507 ha
->flags
.exchoffld_enabled
= 0;
4508 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0xd013,
4509 "Disabling Exchange offload due to lack of memory\n");
4511 ha
->exchoffld_size
= 0;
4515 } else if (!ha
->exchoffld_buf
|| (actual_cnt
<= FW_DEF_EXCHANGES_CNT
)) {
4516 /* pathological case */
4517 qla2x00_free_exchoffld_buffer(ha
);
4518 ha
->exchoffld_size
= 0;
4519 ha
->flags
.exchoffld_enabled
= 0;
4520 ql_log(ql_log_info
, vha
, 0xd016,
4521 "Exchange offload not enable: offld size=%d, actual count=%d entry sz=0x%x, total sz=0x%x.\n",
4522 ha
->exchoffld_size
, actual_cnt
, size
, totsz
);
4526 /* Now configure the dma buffer */
4527 rval
= qla_set_exchoffld_mem_cfg(vha
);
4529 ql_log(ql_log_fatal
, vha
, 0xd02e,
4530 "Setup exchange offload buffer ****FAILED****.\n");
4531 qla2x00_free_exchoffld_buffer(ha
);
4533 /* re-adjust number of target exchange */
4534 struct init_cb_81xx
*icb
= (struct init_cb_81xx
*)ha
->init_cb
;
4536 if (qla_ini_mode_enabled(vha
))
4537 icb
->exchange_count
= 0;
4539 icb
->exchange_count
= cpu_to_le16(vha
->ql2xexchoffld
);
4546 * qla2x00_free_exchoffld_buffer
4549 * ha = adapter block pointer
4552 qla2x00_free_exchoffld_buffer(struct qla_hw_data
*ha
)
4554 if (ha
->exchoffld_buf
) {
4555 dma_free_coherent(&ha
->pdev
->dev
, ha
->exchoffld_size
,
4556 ha
->exchoffld_buf
, ha
->exchoffld_buf_dma
);
4557 ha
->exchoffld_buf
= NULL
;
4558 ha
->exchoffld_size
= 0;
4563 * qla2x00_free_fw_dump
4564 * Frees fw dump stuff.
4567 * ha = adapter block pointer
4570 qla2x00_free_fw_dump(struct qla_hw_data
*ha
)
4572 struct fwdt
*fwdt
= ha
->fwdt
;
4576 dma_free_coherent(&ha
->pdev
->dev
,
4577 FCE_SIZE
, ha
->fce
, ha
->fce_dma
);
4580 dma_free_coherent(&ha
->pdev
->dev
,
4581 EFT_SIZE
, ha
->eft
, ha
->eft_dma
);
4591 ha
->fw_dump_cap_flags
= 0;
4592 ha
->fw_dump_reading
= 0;
4594 ha
->fw_dump_len
= 0;
4596 for (j
= 0; j
< 2; j
++, fwdt
++) {
4598 vfree(fwdt
->template);
4599 fwdt
->template = NULL
;
4606 * Frees all adapter allocated memory.
4609 * ha = adapter block pointer.
4612 qla2x00_mem_free(struct qla_hw_data
*ha
)
4614 qla2x00_free_fw_dump(ha
);
4617 dma_free_coherent(&ha
->pdev
->dev
, MCTP_DUMP_SIZE
, ha
->mctp_dump
,
4619 ha
->mctp_dump
= NULL
;
4621 mempool_destroy(ha
->srb_mempool
);
4622 ha
->srb_mempool
= NULL
;
4625 dma_free_coherent(&ha
->pdev
->dev
, DCBX_TLV_DATA_SIZE
,
4626 ha
->dcbx_tlv
, ha
->dcbx_tlv_dma
);
4627 ha
->dcbx_tlv
= NULL
;
4630 dma_free_coherent(&ha
->pdev
->dev
, XGMAC_DATA_SIZE
,
4631 ha
->xgmac_data
, ha
->xgmac_data_dma
);
4632 ha
->xgmac_data
= NULL
;
4635 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct sns_cmd_pkt
),
4636 ha
->sns_cmd
, ha
->sns_cmd_dma
);
4638 ha
->sns_cmd_dma
= 0;
4641 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct ct_sns_pkt
),
4642 ha
->ct_sns
, ha
->ct_sns_dma
);
4647 dma_free_coherent(&ha
->pdev
->dev
, SFP_DEV_SIZE
, ha
->sfp_data
,
4649 ha
->sfp_data
= NULL
;
4652 dma_free_coherent(&ha
->pdev
->dev
, SFP_DEV_SIZE
,
4653 ha
->flt
, ha
->flt_dma
);
4658 dma_pool_free(ha
->s_dma_pool
, ha
->ms_iocb
, ha
->ms_iocb_dma
);
4660 ha
->ms_iocb_dma
= 0;
4663 dma_pool_free(ha
->s_dma_pool
,
4664 ha
->ex_init_cb
, ha
->ex_init_cb_dma
);
4665 ha
->ex_init_cb
= NULL
;
4666 ha
->ex_init_cb_dma
= 0;
4669 dma_pool_free(ha
->s_dma_pool
, ha
->async_pd
, ha
->async_pd_dma
);
4670 ha
->async_pd
= NULL
;
4671 ha
->async_pd_dma
= 0;
4673 dma_pool_destroy(ha
->s_dma_pool
);
4674 ha
->s_dma_pool
= NULL
;
4677 dma_free_coherent(&ha
->pdev
->dev
, qla2x00_gid_list_size(ha
),
4678 ha
->gid_list
, ha
->gid_list_dma
);
4679 ha
->gid_list
= NULL
;
4680 ha
->gid_list_dma
= 0;
4682 if (IS_QLA82XX(ha
)) {
4683 if (!list_empty(&ha
->gbl_dsd_list
)) {
4684 struct dsd_dma
*dsd_ptr
, *tdsd_ptr
;
4686 /* clean up allocated prev pool */
4687 list_for_each_entry_safe(dsd_ptr
,
4688 tdsd_ptr
, &ha
->gbl_dsd_list
, list
) {
4689 dma_pool_free(ha
->dl_dma_pool
,
4690 dsd_ptr
->dsd_addr
, dsd_ptr
->dsd_list_dma
);
4691 list_del(&dsd_ptr
->list
);
4697 dma_pool_destroy(ha
->dl_dma_pool
);
4698 ha
->dl_dma_pool
= NULL
;
4700 dma_pool_destroy(ha
->fcp_cmnd_dma_pool
);
4701 ha
->fcp_cmnd_dma_pool
= NULL
;
4703 mempool_destroy(ha
->ctx_mempool
);
4704 ha
->ctx_mempool
= NULL
;
4706 if (ql2xenabledif
&& ha
->dif_bundl_pool
) {
4707 struct dsd_dma
*dsd
, *nxt
;
4709 list_for_each_entry_safe(dsd
, nxt
, &ha
->pool
.unusable
.head
,
4711 list_del(&dsd
->list
);
4712 dma_pool_free(ha
->dif_bundl_pool
, dsd
->dsd_addr
,
4714 ha
->dif_bundle_dma_allocs
--;
4716 ha
->dif_bundle_kallocs
--;
4717 ha
->pool
.unusable
.count
--;
4719 list_for_each_entry_safe(dsd
, nxt
, &ha
->pool
.good
.head
, list
) {
4720 list_del(&dsd
->list
);
4721 dma_pool_free(ha
->dif_bundl_pool
, dsd
->dsd_addr
,
4723 ha
->dif_bundle_dma_allocs
--;
4725 ha
->dif_bundle_kallocs
--;
4729 dma_pool_destroy(ha
->dif_bundl_pool
);
4730 ha
->dif_bundl_pool
= NULL
;
4735 dma_free_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
,
4736 ha
->init_cb
, ha
->init_cb_dma
);
4738 ha
->init_cb_dma
= 0;
4740 vfree(ha
->optrom_buffer
);
4741 ha
->optrom_buffer
= NULL
;
4744 kfree(ha
->npiv_info
);
4745 ha
->npiv_info
= NULL
;
4748 kfree(ha
->loop_id_map
);
4749 ha
->loop_id_map
= NULL
;
4752 struct scsi_qla_host
*qla2x00_create_host(struct scsi_host_template
*sht
,
4753 struct qla_hw_data
*ha
)
4755 struct Scsi_Host
*host
;
4756 struct scsi_qla_host
*vha
= NULL
;
4758 host
= scsi_host_alloc(sht
, sizeof(scsi_qla_host_t
));
4760 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0107,
4761 "Failed to allocate host from the scsi layer, aborting.\n");
4765 /* Clear our data area */
4766 vha
= shost_priv(host
);
4767 memset(vha
, 0, sizeof(scsi_qla_host_t
));
4770 vha
->host_no
= host
->host_no
;
4773 vha
->qlini_mode
= ql2x_ini_mode
;
4774 vha
->ql2xexchoffld
= ql2xexchoffld
;
4775 vha
->ql2xiniexchg
= ql2xiniexchg
;
4777 INIT_LIST_HEAD(&vha
->vp_fcports
);
4778 INIT_LIST_HEAD(&vha
->work_list
);
4779 INIT_LIST_HEAD(&vha
->list
);
4780 INIT_LIST_HEAD(&vha
->qla_cmd_list
);
4781 INIT_LIST_HEAD(&vha
->qla_sess_op_cmd_list
);
4782 INIT_LIST_HEAD(&vha
->logo_list
);
4783 INIT_LIST_HEAD(&vha
->plogi_ack_list
);
4784 INIT_LIST_HEAD(&vha
->qp_list
);
4785 INIT_LIST_HEAD(&vha
->gnl
.fcports
);
4786 INIT_LIST_HEAD(&vha
->gpnid_list
);
4787 INIT_WORK(&vha
->iocb_work
, qla2x00_iocb_work_fn
);
4789 spin_lock_init(&vha
->work_lock
);
4790 spin_lock_init(&vha
->cmd_list_lock
);
4791 init_waitqueue_head(&vha
->fcport_waitQ
);
4792 init_waitqueue_head(&vha
->vref_waitq
);
4794 vha
->gnl
.size
= sizeof(struct get_name_list_extended
) *
4795 (ha
->max_loop_id
+ 1);
4796 vha
->gnl
.l
= dma_alloc_coherent(&ha
->pdev
->dev
,
4797 vha
->gnl
.size
, &vha
->gnl
.ldma
, GFP_KERNEL
);
4799 ql_log(ql_log_fatal
, vha
, 0xd04a,
4800 "Alloc failed for name list.\n");
4801 scsi_host_put(vha
->host
);
4805 /* todo: what about ext login? */
4806 vha
->scan
.size
= ha
->max_fibre_devices
* sizeof(struct fab_scan_rp
);
4807 vha
->scan
.l
= vmalloc(vha
->scan
.size
);
4809 ql_log(ql_log_fatal
, vha
, 0xd04a,
4810 "Alloc failed for scan database.\n");
4811 dma_free_coherent(&ha
->pdev
->dev
, vha
->gnl
.size
,
4812 vha
->gnl
.l
, vha
->gnl
.ldma
);
4813 scsi_host_put(vha
->host
);
4816 INIT_DELAYED_WORK(&vha
->scan
.scan_work
, qla_scan_work_fn
);
4818 sprintf(vha
->host_str
, "%s_%ld", QLA2XXX_DRIVER_NAME
, vha
->host_no
);
4819 ql_dbg(ql_dbg_init
, vha
, 0x0041,
4820 "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4821 vha
->host
, vha
->hw
, vha
,
4822 dev_name(&(ha
->pdev
->dev
)));
4827 struct qla_work_evt
*
4828 qla2x00_alloc_work(struct scsi_qla_host
*vha
, enum qla_work_type type
)
4830 struct qla_work_evt
*e
;
4833 QLA_VHA_MARK_BUSY(vha
, bail
);
4837 e
= kzalloc(sizeof(struct qla_work_evt
), GFP_ATOMIC
);
4839 QLA_VHA_MARK_NOT_BUSY(vha
);
4843 INIT_LIST_HEAD(&e
->list
);
4845 e
->flags
= QLA_EVT_FLAG_FREE
;
4850 qla2x00_post_work(struct scsi_qla_host
*vha
, struct qla_work_evt
*e
)
4852 unsigned long flags
;
4855 spin_lock_irqsave(&vha
->work_lock
, flags
);
4856 list_add_tail(&e
->list
, &vha
->work_list
);
4858 if (!test_and_set_bit(IOCB_WORK_ACTIVE
, &vha
->dpc_flags
))
4861 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
4864 queue_work(vha
->hw
->wq
, &vha
->iocb_work
);
4870 qla2x00_post_aen_work(struct scsi_qla_host
*vha
, enum fc_host_event_code code
,
4873 struct qla_work_evt
*e
;
4875 e
= qla2x00_alloc_work(vha
, QLA_EVT_AEN
);
4877 return QLA_FUNCTION_FAILED
;
4879 e
->u
.aen
.code
= code
;
4880 e
->u
.aen
.data
= data
;
4881 return qla2x00_post_work(vha
, e
);
4885 qla2x00_post_idc_ack_work(struct scsi_qla_host
*vha
, uint16_t *mb
)
4887 struct qla_work_evt
*e
;
4889 e
= qla2x00_alloc_work(vha
, QLA_EVT_IDC_ACK
);
4891 return QLA_FUNCTION_FAILED
;
4893 memcpy(e
->u
.idc_ack
.mb
, mb
, QLA_IDC_ACK_REGS
* sizeof(uint16_t));
4894 return qla2x00_post_work(vha
, e
);
4897 #define qla2x00_post_async_work(name, type) \
4898 int qla2x00_post_async_##name##_work( \
4899 struct scsi_qla_host *vha, \
4900 fc_port_t *fcport, uint16_t *data) \
4902 struct qla_work_evt *e; \
4904 e = qla2x00_alloc_work(vha, type); \
4906 return QLA_FUNCTION_FAILED; \
4908 e->u.logio.fcport = fcport; \
4910 e->u.logio.data[0] = data[0]; \
4911 e->u.logio.data[1] = data[1]; \
4913 fcport->flags |= FCF_ASYNC_ACTIVE; \
4914 return qla2x00_post_work(vha, e); \
4917 qla2x00_post_async_work(login
, QLA_EVT_ASYNC_LOGIN
);
4918 qla2x00_post_async_work(logout
, QLA_EVT_ASYNC_LOGOUT
);
4919 qla2x00_post_async_work(logout_done
, QLA_EVT_ASYNC_LOGOUT_DONE
);
4920 qla2x00_post_async_work(adisc
, QLA_EVT_ASYNC_ADISC
);
4921 qla2x00_post_async_work(prlo
, QLA_EVT_ASYNC_PRLO
);
4922 qla2x00_post_async_work(prlo_done
, QLA_EVT_ASYNC_PRLO_DONE
);
4925 qla2x00_post_uevent_work(struct scsi_qla_host
*vha
, u32 code
)
4927 struct qla_work_evt
*e
;
4929 e
= qla2x00_alloc_work(vha
, QLA_EVT_UEVENT
);
4931 return QLA_FUNCTION_FAILED
;
4933 e
->u
.uevent
.code
= code
;
4934 return qla2x00_post_work(vha
, e
);
4938 qla2x00_uevent_emit(struct scsi_qla_host
*vha
, u32 code
)
4940 char event_string
[40];
4941 char *envp
[] = { event_string
, NULL
};
4944 case QLA_UEVENT_CODE_FW_DUMP
:
4945 snprintf(event_string
, sizeof(event_string
), "FW_DUMP=%ld",
4952 kobject_uevent_env(&vha
->hw
->pdev
->dev
.kobj
, KOBJ_CHANGE
, envp
);
4956 qlafx00_post_aenfx_work(struct scsi_qla_host
*vha
, uint32_t evtcode
,
4957 uint32_t *data
, int cnt
)
4959 struct qla_work_evt
*e
;
4961 e
= qla2x00_alloc_work(vha
, QLA_EVT_AENFX
);
4963 return QLA_FUNCTION_FAILED
;
4965 e
->u
.aenfx
.evtcode
= evtcode
;
4966 e
->u
.aenfx
.count
= cnt
;
4967 memcpy(e
->u
.aenfx
.mbx
, data
, sizeof(*data
) * cnt
);
4968 return qla2x00_post_work(vha
, e
);
4971 void qla24xx_sched_upd_fcport(fc_port_t
*fcport
)
4973 unsigned long flags
;
4975 if (IS_SW_RESV_ADDR(fcport
->d_id
))
4978 spin_lock_irqsave(&fcport
->vha
->work_lock
, flags
);
4979 if (fcport
->disc_state
== DSC_UPD_FCPORT
) {
4980 spin_unlock_irqrestore(&fcport
->vha
->work_lock
, flags
);
4983 fcport
->jiffies_at_registration
= jiffies
;
4984 fcport
->sec_since_registration
= 0;
4985 fcport
->next_disc_state
= DSC_DELETED
;
4986 fcport
->disc_state
= DSC_UPD_FCPORT
;
4987 spin_unlock_irqrestore(&fcport
->vha
->work_lock
, flags
);
4989 queue_work(system_unbound_wq
, &fcport
->reg_work
);
4993 void qla24xx_create_new_sess(struct scsi_qla_host
*vha
, struct qla_work_evt
*e
)
4995 unsigned long flags
;
4996 fc_port_t
*fcport
= NULL
, *tfcp
;
4997 struct qlt_plogi_ack_t
*pla
=
4998 (struct qlt_plogi_ack_t
*)e
->u
.new_sess
.pla
;
4999 uint8_t free_fcport
= 0;
5001 ql_dbg(ql_dbg_disc
, vha
, 0xffff,
5002 "%s %d %8phC enter\n",
5003 __func__
, __LINE__
, e
->u
.new_sess
.port_name
);
5005 spin_lock_irqsave(&vha
->hw
->tgt
.sess_lock
, flags
);
5006 fcport
= qla2x00_find_fcport_by_wwpn(vha
, e
->u
.new_sess
.port_name
, 1);
5008 fcport
->d_id
= e
->u
.new_sess
.id
;
5010 fcport
->fw_login_state
= DSC_LS_PLOGI_PEND
;
5011 memcpy(fcport
->node_name
,
5012 pla
->iocb
.u
.isp24
.u
.plogi
.node_name
,
5014 qlt_plogi_ack_link(vha
, pla
, fcport
, QLT_PLOGI_LINK_SAME_WWN
);
5015 /* we took an extra ref_count to prevent PLOGI ACK when
5016 * fcport/sess has not been created.
5021 spin_unlock_irqrestore(&vha
->hw
->tgt
.sess_lock
, flags
);
5022 fcport
= qla2x00_alloc_fcport(vha
, GFP_KERNEL
);
5024 fcport
->d_id
= e
->u
.new_sess
.id
;
5025 fcport
->flags
|= FCF_FABRIC_DEVICE
;
5026 fcport
->fw_login_state
= DSC_LS_PLOGI_PEND
;
5027 if (e
->u
.new_sess
.fc4_type
== FS_FC4TYPE_FCP
)
5028 fcport
->fc4_type
= FC4_TYPE_FCP_SCSI
;
5030 if (e
->u
.new_sess
.fc4_type
== FS_FC4TYPE_NVME
) {
5031 fcport
->fc4_type
= FC4_TYPE_OTHER
;
5032 fcport
->fc4f_nvme
= FC4_TYPE_NVME
;
5035 memcpy(fcport
->port_name
, e
->u
.new_sess
.port_name
,
5038 ql_dbg(ql_dbg_disc
, vha
, 0xffff,
5039 "%s %8phC mem alloc fail.\n",
5040 __func__
, e
->u
.new_sess
.port_name
);
5043 list_del(&pla
->list
);
5044 kmem_cache_free(qla_tgt_plogi_cachep
, pla
);
5049 spin_lock_irqsave(&vha
->hw
->tgt
.sess_lock
, flags
);
5050 /* search again to make sure no one else got ahead */
5051 tfcp
= qla2x00_find_fcport_by_wwpn(vha
,
5052 e
->u
.new_sess
.port_name
, 1);
5054 /* should rarily happen */
5055 ql_dbg(ql_dbg_disc
, vha
, 0xffff,
5056 "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
5057 __func__
, tfcp
->port_name
, tfcp
->disc_state
,
5058 tfcp
->fw_login_state
);
5062 list_add_tail(&fcport
->list
, &vha
->vp_fcports
);
5066 qlt_plogi_ack_link(vha
, pla
, fcport
,
5067 QLT_PLOGI_LINK_SAME_WWN
);
5071 spin_unlock_irqrestore(&vha
->hw
->tgt
.sess_lock
, flags
);
5074 fcport
->id_changed
= 1;
5075 fcport
->scan_state
= QLA_FCPORT_FOUND
;
5076 fcport
->chip_reset
= vha
->hw
->base_qpair
->chip_reset
;
5077 memcpy(fcport
->node_name
, e
->u
.new_sess
.node_name
, WWN_SIZE
);
5080 if (pla
->iocb
.u
.isp24
.status_subcode
== ELS_PRLI
) {
5083 fcport
->fw_login_state
= DSC_LS_PRLI_PEND
;
5087 pla
->iocb
.u
.isp24
.nport_handle
);
5088 fcport
->fw_login_state
= DSC_LS_PRLI_PEND
;
5091 pla
->iocb
.u
.isp24
.u
.prli
.wd3_lo
);
5094 fcport
->conf_compl_supported
= 1;
5096 if ((wd3_lo
& BIT_4
) == 0)
5097 fcport
->port_type
= FCT_INITIATOR
;
5099 fcport
->port_type
= FCT_TARGET
;
5101 qlt_plogi_ack_unref(vha
, pla
);
5103 fc_port_t
*dfcp
= NULL
;
5105 spin_lock_irqsave(&vha
->hw
->tgt
.sess_lock
, flags
);
5106 tfcp
= qla2x00_find_fcport_by_nportid(vha
,
5107 &e
->u
.new_sess
.id
, 1);
5108 if (tfcp
&& (tfcp
!= fcport
)) {
5110 * We have a conflict fcport with same NportID.
5112 ql_dbg(ql_dbg_disc
, vha
, 0xffff,
5113 "%s %8phC found conflict b4 add. DS %d LS %d\n",
5114 __func__
, tfcp
->port_name
, tfcp
->disc_state
,
5115 tfcp
->fw_login_state
);
5117 switch (tfcp
->disc_state
) {
5120 case DSC_DELETE_PEND
:
5121 fcport
->login_pause
= 1;
5122 tfcp
->conflict
= fcport
;
5125 fcport
->login_pause
= 1;
5126 tfcp
->conflict
= fcport
;
5131 spin_unlock_irqrestore(&vha
->hw
->tgt
.sess_lock
, flags
);
5133 qlt_schedule_sess_for_deletion(tfcp
);
5136 if (N2N_TOPO(vha
->hw
))
5137 fcport
->flags
&= ~FCF_FABRIC_DEVICE
;
5139 if (N2N_TOPO(vha
->hw
)) {
5140 if (vha
->flags
.nvme_enabled
) {
5141 fcport
->fc4f_nvme
= 1;
5142 fcport
->n2n_flag
= 1;
5144 fcport
->fw_login_state
= 0;
5146 * wait link init done before sending login
5149 qla24xx_fcport_handle_login(vha
, fcport
);
5155 qla2x00_free_fcport(fcport
);
5157 list_del(&pla
->list
);
5158 kmem_cache_free(qla_tgt_plogi_cachep
, pla
);
5163 static void qla_sp_retry(struct scsi_qla_host
*vha
, struct qla_work_evt
*e
)
5165 struct srb
*sp
= e
->u
.iosb
.sp
;
5168 rval
= qla2x00_start_sp(sp
);
5169 if (rval
!= QLA_SUCCESS
) {
5170 ql_dbg(ql_dbg_disc
, vha
, 0x2043,
5171 "%s: %s: Re-issue IOCB failed (%d).\n",
5172 __func__
, sp
->name
, rval
);
5173 qla24xx_sp_unmap(vha
, sp
);
5178 qla2x00_do_work(struct scsi_qla_host
*vha
)
5180 struct qla_work_evt
*e
, *tmp
;
5181 unsigned long flags
;
5185 spin_lock_irqsave(&vha
->work_lock
, flags
);
5186 list_splice_init(&vha
->work_list
, &work
);
5187 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
5189 list_for_each_entry_safe(e
, tmp
, &work
, list
) {
5193 fc_host_post_event(vha
->host
, fc_get_event_number(),
5194 e
->u
.aen
.code
, e
->u
.aen
.data
);
5196 case QLA_EVT_IDC_ACK
:
5197 qla81xx_idc_ack(vha
, e
->u
.idc_ack
.mb
);
5199 case QLA_EVT_ASYNC_LOGIN
:
5200 qla2x00_async_login(vha
, e
->u
.logio
.fcport
,
5203 case QLA_EVT_ASYNC_LOGOUT
:
5204 rc
= qla2x00_async_logout(vha
, e
->u
.logio
.fcport
);
5206 case QLA_EVT_ASYNC_LOGOUT_DONE
:
5207 qla2x00_async_logout_done(vha
, e
->u
.logio
.fcport
,
5210 case QLA_EVT_ASYNC_ADISC
:
5211 qla2x00_async_adisc(vha
, e
->u
.logio
.fcport
,
5214 case QLA_EVT_UEVENT
:
5215 qla2x00_uevent_emit(vha
, e
->u
.uevent
.code
);
5218 qlafx00_process_aen(vha
, e
);
5221 qla24xx_async_gpnid(vha
, &e
->u
.gpnid
.id
);
5224 qla24xx_sp_unmap(vha
, e
->u
.iosb
.sp
);
5226 case QLA_EVT_RELOGIN
:
5227 qla2x00_relogin(vha
);
5229 case QLA_EVT_NEW_SESS
:
5230 qla24xx_create_new_sess(vha
, e
);
5233 qla24xx_async_gpdb(vha
, e
->u
.fcport
.fcport
,
5237 qla24xx_async_prli(vha
, e
->u
.fcport
.fcport
);
5240 qla24xx_async_gpsc(vha
, e
->u
.fcport
.fcport
);
5243 qla24xx_async_gnl(vha
, e
->u
.fcport
.fcport
);
5246 qla24xx_do_nack_work(vha
, e
);
5248 case QLA_EVT_ASYNC_PRLO
:
5249 rc
= qla2x00_async_prlo(vha
, e
->u
.logio
.fcport
);
5251 case QLA_EVT_ASYNC_PRLO_DONE
:
5252 qla2x00_async_prlo_done(vha
, e
->u
.logio
.fcport
,
5256 qla24xx_async_gpnft(vha
, e
->u
.gpnft
.fc4_type
,
5259 case QLA_EVT_GPNFT_DONE
:
5260 qla24xx_async_gpnft_done(vha
, e
->u
.iosb
.sp
);
5262 case QLA_EVT_GNNFT_DONE
:
5263 qla24xx_async_gnnft_done(vha
, e
->u
.iosb
.sp
);
5266 qla24xx_async_gnnid(vha
, e
->u
.fcport
.fcport
);
5268 case QLA_EVT_GFPNID
:
5269 qla24xx_async_gfpnid(vha
, e
->u
.fcport
.fcport
);
5271 case QLA_EVT_SP_RETRY
:
5272 qla_sp_retry(vha
, e
);
5275 qla_do_iidma_work(vha
, e
->u
.fcport
.fcport
);
5277 case QLA_EVT_ELS_PLOGI
:
5278 qla24xx_els_dcmd2_iocb(vha
, ELS_DCMD_PLOGI
,
5279 e
->u
.fcport
.fcport
, false);
5284 /* put 'work' at head of 'vha->work_list' */
5285 spin_lock_irqsave(&vha
->work_lock
, flags
);
5286 list_splice(&work
, &vha
->work_list
);
5287 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
5290 list_del_init(&e
->list
);
5291 if (e
->flags
& QLA_EVT_FLAG_FREE
)
5294 /* For each work completed decrement vha ref count */
5295 QLA_VHA_MARK_NOT_BUSY(vha
);
5299 int qla24xx_post_relogin_work(struct scsi_qla_host
*vha
)
5301 struct qla_work_evt
*e
;
5303 e
= qla2x00_alloc_work(vha
, QLA_EVT_RELOGIN
);
5306 set_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
);
5307 return QLA_FUNCTION_FAILED
;
5310 return qla2x00_post_work(vha
, e
);
5313 /* Relogins all the fcports of a vport
5314 * Context: dpc thread
5316 void qla2x00_relogin(struct scsi_qla_host
*vha
)
5319 int status
, relogin_needed
= 0;
5320 struct event_arg ea
;
5322 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
5324 * If the port is not ONLINE then try to login
5325 * to it if we haven't run out of retries.
5327 if (atomic_read(&fcport
->state
) != FCS_ONLINE
&&
5328 fcport
->login_retry
) {
5329 if (fcport
->scan_state
!= QLA_FCPORT_FOUND
||
5330 fcport
->disc_state
== DSC_LOGIN_COMPLETE
)
5333 if (fcport
->flags
& (FCF_ASYNC_SENT
|FCF_ASYNC_ACTIVE
) ||
5334 fcport
->disc_state
== DSC_DELETE_PEND
) {
5337 if (vha
->hw
->current_topology
!= ISP_CFG_NL
) {
5338 memset(&ea
, 0, sizeof(ea
));
5339 ea
.event
= FCME_RELOGIN
;
5341 qla2x00_fcport_event_handler(vha
, &ea
);
5342 } else if (vha
->hw
->current_topology
==
5344 fcport
->login_retry
--;
5346 qla2x00_local_device_login(vha
,
5348 if (status
== QLA_SUCCESS
) {
5349 fcport
->old_loop_id
=
5351 ql_dbg(ql_dbg_disc
, vha
, 0x2003,
5352 "Port login OK: logged in ID 0x%x.\n",
5354 qla2x00_update_fcport
5356 } else if (status
== 1) {
5357 set_bit(RELOGIN_NEEDED
,
5359 /* retry the login again */
5360 ql_dbg(ql_dbg_disc
, vha
, 0x2007,
5361 "Retrying %d login again loop_id 0x%x.\n",
5362 fcport
->login_retry
,
5365 fcport
->login_retry
= 0;
5368 if (fcport
->login_retry
== 0 &&
5369 status
!= QLA_SUCCESS
)
5370 qla2x00_clear_loop_id(fcport
);
5374 if (test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
))
5379 set_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
);
5381 ql_dbg(ql_dbg_disc
, vha
, 0x400e,
5385 /* Schedule work on any of the dpc-workqueues */
5387 qla83xx_schedule_work(scsi_qla_host_t
*base_vha
, int work_code
)
5389 struct qla_hw_data
*ha
= base_vha
->hw
;
5391 switch (work_code
) {
5392 case MBA_IDC_AEN
: /* 0x8200 */
5394 queue_work(ha
->dpc_lp_wq
, &ha
->idc_aen
);
5397 case QLA83XX_NIC_CORE_RESET
: /* 0x1 */
5398 if (!ha
->flags
.nic_core_reset_hdlr_active
) {
5400 queue_work(ha
->dpc_hp_wq
, &ha
->nic_core_reset
);
5402 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb05e,
5403 "NIC Core reset is already active. Skip "
5404 "scheduling it again.\n");
5406 case QLA83XX_IDC_STATE_HANDLER
: /* 0x2 */
5408 queue_work(ha
->dpc_hp_wq
, &ha
->idc_state_handler
);
5410 case QLA83XX_NIC_CORE_UNRECOVERABLE
: /* 0x3 */
5412 queue_work(ha
->dpc_hp_wq
, &ha
->nic_core_unrecoverable
);
5415 ql_log(ql_log_warn
, base_vha
, 0xb05f,
5416 "Unknown work-code=0x%x.\n", work_code
);
5422 /* Work: Perform NIC Core Unrecoverable state handling */
5424 qla83xx_nic_core_unrecoverable_work(struct work_struct
*work
)
5426 struct qla_hw_data
*ha
=
5427 container_of(work
, struct qla_hw_data
, nic_core_unrecoverable
);
5428 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
5429 uint32_t dev_state
= 0;
5431 qla83xx_idc_lock(base_vha
, 0);
5432 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
5433 qla83xx_reset_ownership(base_vha
);
5434 if (ha
->flags
.nic_core_reset_owner
) {
5435 ha
->flags
.nic_core_reset_owner
= 0;
5436 qla83xx_wr_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
5437 QLA8XXX_DEV_FAILED
);
5438 ql_log(ql_log_info
, base_vha
, 0xb060, "HW State: FAILED.\n");
5439 qla83xx_schedule_work(base_vha
, QLA83XX_IDC_STATE_HANDLER
);
5441 qla83xx_idc_unlock(base_vha
, 0);
5444 /* Work: Execute IDC state handler */
5446 qla83xx_idc_state_handler_work(struct work_struct
*work
)
5448 struct qla_hw_data
*ha
=
5449 container_of(work
, struct qla_hw_data
, idc_state_handler
);
5450 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
5451 uint32_t dev_state
= 0;
5453 qla83xx_idc_lock(base_vha
, 0);
5454 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
5455 if (dev_state
== QLA8XXX_DEV_FAILED
||
5456 dev_state
== QLA8XXX_DEV_NEED_QUIESCENT
)
5457 qla83xx_idc_state_handler(base_vha
);
5458 qla83xx_idc_unlock(base_vha
, 0);
5462 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t
*base_vha
)
5464 int rval
= QLA_SUCCESS
;
5465 unsigned long heart_beat_wait
= jiffies
+ (1 * HZ
);
5466 uint32_t heart_beat_counter1
, heart_beat_counter2
;
5469 if (time_after(jiffies
, heart_beat_wait
)) {
5470 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07c,
5471 "Nic Core f/w is not alive.\n");
5472 rval
= QLA_FUNCTION_FAILED
;
5476 qla83xx_idc_lock(base_vha
, 0);
5477 qla83xx_rd_reg(base_vha
, QLA83XX_FW_HEARTBEAT
,
5478 &heart_beat_counter1
);
5479 qla83xx_idc_unlock(base_vha
, 0);
5481 qla83xx_idc_lock(base_vha
, 0);
5482 qla83xx_rd_reg(base_vha
, QLA83XX_FW_HEARTBEAT
,
5483 &heart_beat_counter2
);
5484 qla83xx_idc_unlock(base_vha
, 0);
5485 } while (heart_beat_counter1
== heart_beat_counter2
);
5490 /* Work: Perform NIC Core Reset handling */
5492 qla83xx_nic_core_reset_work(struct work_struct
*work
)
5494 struct qla_hw_data
*ha
=
5495 container_of(work
, struct qla_hw_data
, nic_core_reset
);
5496 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
5497 uint32_t dev_state
= 0;
5499 if (IS_QLA2031(ha
)) {
5500 if (qla2xxx_mctp_dump(base_vha
) != QLA_SUCCESS
)
5501 ql_log(ql_log_warn
, base_vha
, 0xb081,
5502 "Failed to dump mctp\n");
5506 if (!ha
->flags
.nic_core_reset_hdlr_active
) {
5507 if (qla83xx_check_nic_core_fw_alive(base_vha
) == QLA_SUCCESS
) {
5508 qla83xx_idc_lock(base_vha
, 0);
5509 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
5511 qla83xx_idc_unlock(base_vha
, 0);
5512 if (dev_state
!= QLA8XXX_DEV_NEED_RESET
) {
5513 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07a,
5514 "Nic Core f/w is alive.\n");
5519 ha
->flags
.nic_core_reset_hdlr_active
= 1;
5520 if (qla83xx_nic_core_reset(base_vha
)) {
5521 /* NIC Core reset failed. */
5522 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb061,
5523 "NIC Core reset failed.\n");
5525 ha
->flags
.nic_core_reset_hdlr_active
= 0;
5529 /* Work: Handle 8200 IDC aens */
5531 qla83xx_service_idc_aen(struct work_struct
*work
)
5533 struct qla_hw_data
*ha
=
5534 container_of(work
, struct qla_hw_data
, idc_aen
);
5535 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
5536 uint32_t dev_state
, idc_control
;
5538 qla83xx_idc_lock(base_vha
, 0);
5539 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
5540 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_CONTROL
, &idc_control
);
5541 qla83xx_idc_unlock(base_vha
, 0);
5542 if (dev_state
== QLA8XXX_DEV_NEED_RESET
) {
5543 if (idc_control
& QLA83XX_IDC_GRACEFUL_RESET
) {
5544 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb062,
5545 "Application requested NIC Core Reset.\n");
5546 qla83xx_schedule_work(base_vha
, QLA83XX_NIC_CORE_RESET
);
5547 } else if (qla83xx_check_nic_core_fw_alive(base_vha
) ==
5549 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07b,
5550 "Other protocol driver requested NIC Core Reset.\n");
5551 qla83xx_schedule_work(base_vha
, QLA83XX_NIC_CORE_RESET
);
5553 } else if (dev_state
== QLA8XXX_DEV_FAILED
||
5554 dev_state
== QLA8XXX_DEV_NEED_QUIESCENT
) {
5555 qla83xx_schedule_work(base_vha
, QLA83XX_IDC_STATE_HANDLER
);
5560 qla83xx_wait_logic(void)
5565 if (!in_interrupt()) {
5567 * Wait about 200ms before retrying again.
5568 * This controls the number of retries for single
5574 for (i
= 0; i
< 20; i
++)
5575 cpu_relax(); /* This a nop instr on i386 */
5580 qla83xx_force_lock_recovery(scsi_qla_host_t
*base_vha
)
5584 uint32_t idc_lck_rcvry_stage_mask
= 0x3;
5585 uint32_t idc_lck_rcvry_owner_mask
= 0x3c;
5586 struct qla_hw_data
*ha
= base_vha
->hw
;
5588 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb086,
5589 "Trying force recovery of the IDC lock.\n");
5591 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
, &data
);
5595 if ((data
& idc_lck_rcvry_stage_mask
) > 0) {
5598 data
= (IDC_LOCK_RECOVERY_STAGE1
) | (ha
->portnum
<< 2);
5599 rval
= qla83xx_wr_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
,
5606 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
,
5611 if (((data
& idc_lck_rcvry_owner_mask
) >> 2) == ha
->portnum
) {
5612 data
&= (IDC_LOCK_RECOVERY_STAGE2
|
5613 ~(idc_lck_rcvry_stage_mask
));
5614 rval
= qla83xx_wr_reg(base_vha
,
5615 QLA83XX_IDC_LOCK_RECOVERY
, data
);
5619 /* Forcefully perform IDC UnLock */
5620 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_UNLOCK
,
5624 /* Clear lock-id by setting 0xff */
5625 rval
= qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
5629 /* Clear lock-recovery by setting 0x0 */
5630 rval
= qla83xx_wr_reg(base_vha
,
5631 QLA83XX_IDC_LOCK_RECOVERY
, 0x0);
5642 qla83xx_idc_lock_recovery(scsi_qla_host_t
*base_vha
)
5644 int rval
= QLA_SUCCESS
;
5645 uint32_t o_drv_lockid
, n_drv_lockid
;
5646 unsigned long lock_recovery_timeout
;
5648 lock_recovery_timeout
= jiffies
+ QLA83XX_MAX_LOCK_RECOVERY_WAIT
;
5650 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &o_drv_lockid
);
5654 /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5655 if (time_after_eq(jiffies
, lock_recovery_timeout
)) {
5656 if (qla83xx_force_lock_recovery(base_vha
) == QLA_SUCCESS
)
5659 return QLA_FUNCTION_FAILED
;
5662 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &n_drv_lockid
);
5666 if (o_drv_lockid
== n_drv_lockid
) {
5667 qla83xx_wait_logic();
5677 qla83xx_idc_lock(scsi_qla_host_t
*base_vha
, uint16_t requester_id
)
5680 uint32_t lock_owner
;
5681 struct qla_hw_data
*ha
= base_vha
->hw
;
5683 /* IDC-lock implementation using driver-lock/lock-id remote registers */
5685 if (qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCK
, &data
)
5688 /* Setting lock-id to our function-number */
5689 qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
5692 qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
5694 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb063,
5695 "Failed to acquire IDC lock, acquired by %d, "
5696 "retrying...\n", lock_owner
);
5698 /* Retry/Perform IDC-Lock recovery */
5699 if (qla83xx_idc_lock_recovery(base_vha
)
5701 qla83xx_wait_logic();
5704 ql_log(ql_log_warn
, base_vha
, 0xb075,
5705 "IDC Lock recovery FAILED.\n");
5714 qla83xx_idc_unlock(scsi_qla_host_t
*base_vha
, uint16_t requester_id
)
5717 uint16_t options
= (requester_id
<< 15) | BIT_7
;
5721 struct qla_hw_data
*ha
= base_vha
->hw
;
5723 /* IDC-unlock implementation using driver-unlock/lock-id
5728 if (qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &data
)
5730 if (data
== ha
->portnum
) {
5731 qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_UNLOCK
, &data
);
5732 /* Clearing lock-id by setting 0xff */
5733 qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, 0xff);
5734 } else if (retry
< 10) {
5735 /* SV: XXX: IDC unlock retrying needed here? */
5737 /* Retry for IDC-unlock */
5738 qla83xx_wait_logic();
5740 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb064,
5741 "Failed to release IDC lock, retrying=%d\n", retry
);
5744 } else if (retry
< 10) {
5745 /* Retry for IDC-unlock */
5746 qla83xx_wait_logic();
5748 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb065,
5749 "Failed to read drv-lockid, retrying=%d\n", retry
);
5756 /* XXX: IDC-unlock implementation using access-control mbx */
5759 if (qla83xx_access_control(base_vha
, options
, 0, 0, NULL
)) {
5761 /* Retry for IDC-unlock */
5762 qla83xx_wait_logic();
5764 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb066,
5765 "Failed to release IDC lock, retrying=%d\n", retry
);
5775 __qla83xx_set_drv_presence(scsi_qla_host_t
*vha
)
5777 int rval
= QLA_SUCCESS
;
5778 struct qla_hw_data
*ha
= vha
->hw
;
5779 uint32_t drv_presence
;
5781 rval
= qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
5782 if (rval
== QLA_SUCCESS
) {
5783 drv_presence
|= (1 << ha
->portnum
);
5784 rval
= qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
5792 qla83xx_set_drv_presence(scsi_qla_host_t
*vha
)
5794 int rval
= QLA_SUCCESS
;
5796 qla83xx_idc_lock(vha
, 0);
5797 rval
= __qla83xx_set_drv_presence(vha
);
5798 qla83xx_idc_unlock(vha
, 0);
5804 __qla83xx_clear_drv_presence(scsi_qla_host_t
*vha
)
5806 int rval
= QLA_SUCCESS
;
5807 struct qla_hw_data
*ha
= vha
->hw
;
5808 uint32_t drv_presence
;
5810 rval
= qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
5811 if (rval
== QLA_SUCCESS
) {
5812 drv_presence
&= ~(1 << ha
->portnum
);
5813 rval
= qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
5821 qla83xx_clear_drv_presence(scsi_qla_host_t
*vha
)
5823 int rval
= QLA_SUCCESS
;
5825 qla83xx_idc_lock(vha
, 0);
5826 rval
= __qla83xx_clear_drv_presence(vha
);
5827 qla83xx_idc_unlock(vha
, 0);
5833 qla83xx_need_reset_handler(scsi_qla_host_t
*vha
)
5835 struct qla_hw_data
*ha
= vha
->hw
;
5836 uint32_t drv_ack
, drv_presence
;
5837 unsigned long ack_timeout
;
5839 /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5840 ack_timeout
= jiffies
+ (ha
->fcoe_reset_timeout
* HZ
);
5842 qla83xx_rd_reg(vha
, QLA83XX_IDC_DRIVER_ACK
, &drv_ack
);
5843 qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
5844 if ((drv_ack
& drv_presence
) == drv_presence
)
5847 if (time_after_eq(jiffies
, ack_timeout
)) {
5848 ql_log(ql_log_warn
, vha
, 0xb067,
5849 "RESET ACK TIMEOUT! drv_presence=0x%x "
5850 "drv_ack=0x%x\n", drv_presence
, drv_ack
);
5852 * The function(s) which did not ack in time are forced
5853 * to withdraw any further participation in the IDC
5856 if (drv_ack
!= drv_presence
)
5857 qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
5862 qla83xx_idc_unlock(vha
, 0);
5864 qla83xx_idc_lock(vha
, 0);
5867 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_COLD
);
5868 ql_log(ql_log_info
, vha
, 0xb068, "HW State: COLD/RE-INIT.\n");
5872 qla83xx_device_bootstrap(scsi_qla_host_t
*vha
)
5874 int rval
= QLA_SUCCESS
;
5875 uint32_t idc_control
;
5877 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_INITIALIZING
);
5878 ql_log(ql_log_info
, vha
, 0xb069, "HW State: INITIALIZING.\n");
5880 /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5881 __qla83xx_get_idc_control(vha
, &idc_control
);
5882 idc_control
&= ~QLA83XX_IDC_GRACEFUL_RESET
;
5883 __qla83xx_set_idc_control(vha
, 0);
5885 qla83xx_idc_unlock(vha
, 0);
5886 rval
= qla83xx_restart_nic_firmware(vha
);
5887 qla83xx_idc_lock(vha
, 0);
5889 if (rval
!= QLA_SUCCESS
) {
5890 ql_log(ql_log_fatal
, vha
, 0xb06a,
5891 "Failed to restart NIC f/w.\n");
5892 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_FAILED
);
5893 ql_log(ql_log_info
, vha
, 0xb06b, "HW State: FAILED.\n");
5895 ql_dbg(ql_dbg_p3p
, vha
, 0xb06c,
5896 "Success in restarting nic f/w.\n");
5897 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_READY
);
5898 ql_log(ql_log_info
, vha
, 0xb06d, "HW State: READY.\n");
5904 /* Assumes idc_lock always held on entry */
5906 qla83xx_idc_state_handler(scsi_qla_host_t
*base_vha
)
5908 struct qla_hw_data
*ha
= base_vha
->hw
;
5909 int rval
= QLA_SUCCESS
;
5910 unsigned long dev_init_timeout
;
5913 /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5914 dev_init_timeout
= jiffies
+ (ha
->fcoe_dev_init_timeout
* HZ
);
5918 if (time_after_eq(jiffies
, dev_init_timeout
)) {
5919 ql_log(ql_log_warn
, base_vha
, 0xb06e,
5920 "Initialization TIMEOUT!\n");
5921 /* Init timeout. Disable further NIC Core
5924 qla83xx_wr_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
5925 QLA8XXX_DEV_FAILED
);
5926 ql_log(ql_log_info
, base_vha
, 0xb06f,
5927 "HW State: FAILED.\n");
5930 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
5931 switch (dev_state
) {
5932 case QLA8XXX_DEV_READY
:
5933 if (ha
->flags
.nic_core_reset_owner
)
5934 qla83xx_idc_audit(base_vha
,
5935 IDC_AUDIT_COMPLETION
);
5936 ha
->flags
.nic_core_reset_owner
= 0;
5937 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb070,
5938 "Reset_owner reset by 0x%x.\n",
5941 case QLA8XXX_DEV_COLD
:
5942 if (ha
->flags
.nic_core_reset_owner
)
5943 rval
= qla83xx_device_bootstrap(base_vha
);
5945 /* Wait for AEN to change device-state */
5946 qla83xx_idc_unlock(base_vha
, 0);
5948 qla83xx_idc_lock(base_vha
, 0);
5951 case QLA8XXX_DEV_INITIALIZING
:
5952 /* Wait for AEN to change device-state */
5953 qla83xx_idc_unlock(base_vha
, 0);
5955 qla83xx_idc_lock(base_vha
, 0);
5957 case QLA8XXX_DEV_NEED_RESET
:
5958 if (!ql2xdontresethba
&& ha
->flags
.nic_core_reset_owner
)
5959 qla83xx_need_reset_handler(base_vha
);
5961 /* Wait for AEN to change device-state */
5962 qla83xx_idc_unlock(base_vha
, 0);
5964 qla83xx_idc_lock(base_vha
, 0);
5966 /* reset timeout value after need reset handler */
5967 dev_init_timeout
= jiffies
+
5968 (ha
->fcoe_dev_init_timeout
* HZ
);
5970 case QLA8XXX_DEV_NEED_QUIESCENT
:
5971 /* XXX: DEBUG for now */
5972 qla83xx_idc_unlock(base_vha
, 0);
5974 qla83xx_idc_lock(base_vha
, 0);
5976 case QLA8XXX_DEV_QUIESCENT
:
5977 /* XXX: DEBUG for now */
5978 if (ha
->flags
.quiesce_owner
)
5981 qla83xx_idc_unlock(base_vha
, 0);
5983 qla83xx_idc_lock(base_vha
, 0);
5984 dev_init_timeout
= jiffies
+
5985 (ha
->fcoe_dev_init_timeout
* HZ
);
5987 case QLA8XXX_DEV_FAILED
:
5988 if (ha
->flags
.nic_core_reset_owner
)
5989 qla83xx_idc_audit(base_vha
,
5990 IDC_AUDIT_COMPLETION
);
5991 ha
->flags
.nic_core_reset_owner
= 0;
5992 __qla83xx_clear_drv_presence(base_vha
);
5993 qla83xx_idc_unlock(base_vha
, 0);
5994 qla8xxx_dev_failed_handler(base_vha
);
5995 rval
= QLA_FUNCTION_FAILED
;
5996 qla83xx_idc_lock(base_vha
, 0);
5998 case QLA8XXX_BAD_VALUE
:
5999 qla83xx_idc_unlock(base_vha
, 0);
6001 qla83xx_idc_lock(base_vha
, 0);
6004 ql_log(ql_log_warn
, base_vha
, 0xb071,
6005 "Unknown Device State: %x.\n", dev_state
);
6006 qla83xx_idc_unlock(base_vha
, 0);
6007 qla8xxx_dev_failed_handler(base_vha
);
6008 rval
= QLA_FUNCTION_FAILED
;
6009 qla83xx_idc_lock(base_vha
, 0);
6019 qla2x00_disable_board_on_pci_error(struct work_struct
*work
)
6021 struct qla_hw_data
*ha
= container_of(work
, struct qla_hw_data
,
6023 struct pci_dev
*pdev
= ha
->pdev
;
6024 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
6027 * if UNLOAD flag is already set, then continue unload,
6028 * where it was set first.
6030 if (test_bit(UNLOADING
, &base_vha
->dpc_flags
))
6033 ql_log(ql_log_warn
, base_vha
, 0x015b,
6034 "Disabling adapter.\n");
6036 if (!atomic_read(&pdev
->enable_cnt
)) {
6037 ql_log(ql_log_info
, base_vha
, 0xfffc,
6038 "PCI device disabled, no action req for PCI error=%lx\n",
6039 base_vha
->pci_flags
);
6043 qla2x00_wait_for_sess_deletion(base_vha
);
6045 set_bit(UNLOADING
, &base_vha
->dpc_flags
);
6047 qla2x00_delete_all_vps(ha
, base_vha
);
6049 qla2x00_abort_all_cmds(base_vha
, DID_NO_CONNECT
<< 16);
6051 qla2x00_dfs_remove(base_vha
);
6053 qla84xx_put_chip(base_vha
);
6055 if (base_vha
->timer_active
)
6056 qla2x00_stop_timer(base_vha
);
6058 base_vha
->flags
.online
= 0;
6060 qla2x00_destroy_deferred_work(ha
);
6063 * Do not try to stop beacon blink as it will issue a mailbox
6066 qla2x00_free_sysfs_attr(base_vha
, false);
6068 fc_remove_host(base_vha
->host
);
6070 scsi_remove_host(base_vha
->host
);
6072 base_vha
->flags
.init_done
= 0;
6073 qla25xx_delete_queues(base_vha
);
6074 qla2x00_free_fcports(base_vha
);
6075 qla2x00_free_irqs(base_vha
);
6076 qla2x00_mem_free(ha
);
6077 qla82xx_md_free(base_vha
);
6078 qla2x00_free_queues(ha
);
6080 qla2x00_unmap_iobases(ha
);
6082 pci_release_selected_regions(ha
->pdev
, ha
->bars
);
6083 pci_disable_pcie_error_reporting(pdev
);
6084 pci_disable_device(pdev
);
6087 * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
6091 /**************************************************************************
6093 * This kernel thread is a task that is schedule by the interrupt handler
6094 * to perform the background processing for interrupts.
6097 * This task always run in the context of a kernel thread. It
6098 * is kick-off by the driver's detect code and starts up
6099 * up one per adapter. It immediately goes to sleep and waits for
6100 * some fibre event. When either the interrupt handler or
6101 * the timer routine detects a event it will one of the task
6102 * bits then wake us up.
6103 **************************************************************************/
6105 qla2x00_do_dpc(void *data
)
6107 scsi_qla_host_t
*base_vha
;
6108 struct qla_hw_data
*ha
;
6110 struct qla_qpair
*qpair
;
6112 ha
= (struct qla_hw_data
*)data
;
6113 base_vha
= pci_get_drvdata(ha
->pdev
);
6115 set_user_nice(current
, MIN_NICE
);
6117 set_current_state(TASK_INTERRUPTIBLE
);
6118 while (!kthread_should_stop()) {
6119 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4000,
6120 "DPC handler sleeping.\n");
6124 if (!base_vha
->flags
.init_done
|| ha
->flags
.mbox_busy
)
6127 if (ha
->flags
.eeh_busy
) {
6128 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4003,
6129 "eeh_busy=%d.\n", ha
->flags
.eeh_busy
);
6135 ql_dbg(ql_dbg_dpc
+ ql_dbg_verbose
, base_vha
, 0x4001,
6136 "DPC handler waking up, dpc_flags=0x%lx.\n",
6137 base_vha
->dpc_flags
);
6139 if (test_bit(UNLOADING
, &base_vha
->dpc_flags
))
6142 if (IS_P3P_TYPE(ha
)) {
6143 if (IS_QLA8044(ha
)) {
6144 if (test_and_clear_bit(ISP_UNRECOVERABLE
,
6145 &base_vha
->dpc_flags
)) {
6146 qla8044_idc_lock(ha
);
6147 qla8044_wr_direct(base_vha
,
6148 QLA8044_CRB_DEV_STATE_INDEX
,
6149 QLA8XXX_DEV_FAILED
);
6150 qla8044_idc_unlock(ha
);
6151 ql_log(ql_log_info
, base_vha
, 0x4004,
6152 "HW State: FAILED.\n");
6153 qla8044_device_state_handler(base_vha
);
6158 if (test_and_clear_bit(ISP_UNRECOVERABLE
,
6159 &base_vha
->dpc_flags
)) {
6160 qla82xx_idc_lock(ha
);
6161 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
6162 QLA8XXX_DEV_FAILED
);
6163 qla82xx_idc_unlock(ha
);
6164 ql_log(ql_log_info
, base_vha
, 0x0151,
6165 "HW State: FAILED.\n");
6166 qla82xx_device_state_handler(base_vha
);
6171 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED
,
6172 &base_vha
->dpc_flags
)) {
6174 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4005,
6175 "FCoE context reset scheduled.\n");
6176 if (!(test_and_set_bit(ABORT_ISP_ACTIVE
,
6177 &base_vha
->dpc_flags
))) {
6178 if (qla82xx_fcoe_ctx_reset(base_vha
)) {
6179 /* FCoE-ctx reset failed.
6180 * Escalate to chip-reset
6182 set_bit(ISP_ABORT_NEEDED
,
6183 &base_vha
->dpc_flags
);
6185 clear_bit(ABORT_ISP_ACTIVE
,
6186 &base_vha
->dpc_flags
);
6189 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4006,
6190 "FCoE context reset end.\n");
6192 } else if (IS_QLAFX00(ha
)) {
6193 if (test_and_clear_bit(ISP_UNRECOVERABLE
,
6194 &base_vha
->dpc_flags
)) {
6195 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4020,
6196 "Firmware Reset Recovery\n");
6197 if (qlafx00_reset_initialize(base_vha
)) {
6198 /* Failed. Abort isp later. */
6199 if (!test_bit(UNLOADING
,
6200 &base_vha
->dpc_flags
)) {
6201 set_bit(ISP_UNRECOVERABLE
,
6202 &base_vha
->dpc_flags
);
6203 ql_dbg(ql_dbg_dpc
, base_vha
,
6205 "Reset Recovery Failed\n");
6210 if (test_and_clear_bit(FX00_TARGET_SCAN
,
6211 &base_vha
->dpc_flags
)) {
6212 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4022,
6213 "ISPFx00 Target Scan scheduled\n");
6214 if (qlafx00_rescan_isp(base_vha
)) {
6215 if (!test_bit(UNLOADING
,
6216 &base_vha
->dpc_flags
))
6217 set_bit(ISP_UNRECOVERABLE
,
6218 &base_vha
->dpc_flags
);
6219 ql_dbg(ql_dbg_dpc
, base_vha
, 0x401e,
6220 "ISPFx00 Target Scan Failed\n");
6222 ql_dbg(ql_dbg_dpc
, base_vha
, 0x401f,
6223 "ISPFx00 Target Scan End\n");
6225 if (test_and_clear_bit(FX00_HOST_INFO_RESEND
,
6226 &base_vha
->dpc_flags
)) {
6227 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4023,
6228 "ISPFx00 Host Info resend scheduled\n");
6229 qlafx00_fx_disc(base_vha
,
6230 &base_vha
->hw
->mr
.fcport
,
6231 FXDISC_REG_HOST_INFO
);
6235 if (test_and_clear_bit(DETECT_SFP_CHANGE
,
6236 &base_vha
->dpc_flags
) &&
6237 !test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) {
6238 qla24xx_detect_sfp(base_vha
);
6240 if (ha
->flags
.detected_lr_sfp
!=
6241 ha
->flags
.using_lr_setting
)
6242 set_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
);
6245 if (test_and_clear_bit
6246 (ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
) &&
6247 !test_bit(UNLOADING
, &base_vha
->dpc_flags
)) {
6248 bool do_reset
= true;
6250 switch (base_vha
->qlini_mode
) {
6251 case QLA2XXX_INI_MODE_ENABLED
:
6253 case QLA2XXX_INI_MODE_DISABLED
:
6254 if (!qla_tgt_mode_enabled(base_vha
) &&
6255 !ha
->flags
.fw_started
)
6258 case QLA2XXX_INI_MODE_DUAL
:
6259 if (!qla_dual_mode_enabled(base_vha
) &&
6260 !ha
->flags
.fw_started
)
6267 if (do_reset
&& !(test_and_set_bit(ABORT_ISP_ACTIVE
,
6268 &base_vha
->dpc_flags
))) {
6269 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4007,
6270 "ISP abort scheduled.\n");
6271 if (ha
->isp_ops
->abort_isp(base_vha
)) {
6272 /* failed. retry later */
6273 set_bit(ISP_ABORT_NEEDED
,
6274 &base_vha
->dpc_flags
);
6276 clear_bit(ABORT_ISP_ACTIVE
,
6277 &base_vha
->dpc_flags
);
6278 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4008,
6279 "ISP abort end.\n");
6283 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED
,
6284 &base_vha
->dpc_flags
)) {
6285 qla2x00_update_fcports(base_vha
);
6289 goto loop_resync_check
;
6291 if (test_bit(ISP_QUIESCE_NEEDED
, &base_vha
->dpc_flags
)) {
6292 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4009,
6293 "Quiescence mode scheduled.\n");
6294 if (IS_P3P_TYPE(ha
)) {
6296 qla82xx_device_state_handler(base_vha
);
6298 qla8044_device_state_handler(base_vha
);
6299 clear_bit(ISP_QUIESCE_NEEDED
,
6300 &base_vha
->dpc_flags
);
6301 if (!ha
->flags
.quiesce_owner
) {
6302 qla2x00_perform_loop_resync(base_vha
);
6303 if (IS_QLA82XX(ha
)) {
6304 qla82xx_idc_lock(ha
);
6305 qla82xx_clear_qsnt_ready(
6307 qla82xx_idc_unlock(ha
);
6308 } else if (IS_QLA8044(ha
)) {
6309 qla8044_idc_lock(ha
);
6310 qla8044_clear_qsnt_ready(
6312 qla8044_idc_unlock(ha
);
6316 clear_bit(ISP_QUIESCE_NEEDED
,
6317 &base_vha
->dpc_flags
);
6318 qla2x00_quiesce_io(base_vha
);
6320 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400a,
6321 "Quiescence mode end.\n");
6324 if (test_and_clear_bit(RESET_MARKER_NEEDED
,
6325 &base_vha
->dpc_flags
) &&
6326 (!(test_and_set_bit(RESET_ACTIVE
, &base_vha
->dpc_flags
)))) {
6328 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400b,
6329 "Reset marker scheduled.\n");
6330 qla2x00_rst_aen(base_vha
);
6331 clear_bit(RESET_ACTIVE
, &base_vha
->dpc_flags
);
6332 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400c,
6333 "Reset marker end.\n");
6336 /* Retry each device up to login retry count */
6337 if (test_bit(RELOGIN_NEEDED
, &base_vha
->dpc_flags
) &&
6338 !test_bit(LOOP_RESYNC_NEEDED
, &base_vha
->dpc_flags
) &&
6339 atomic_read(&base_vha
->loop_state
) != LOOP_DOWN
) {
6341 if (!base_vha
->relogin_jif
||
6342 time_after_eq(jiffies
, base_vha
->relogin_jif
)) {
6343 base_vha
->relogin_jif
= jiffies
+ HZ
;
6344 clear_bit(RELOGIN_NEEDED
, &base_vha
->dpc_flags
);
6346 ql_dbg(ql_dbg_disc
, base_vha
, 0x400d,
6347 "Relogin scheduled.\n");
6348 qla24xx_post_relogin_work(base_vha
);
6352 if (test_and_clear_bit(LOOP_RESYNC_NEEDED
,
6353 &base_vha
->dpc_flags
)) {
6355 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400f,
6356 "Loop resync scheduled.\n");
6358 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE
,
6359 &base_vha
->dpc_flags
))) {
6361 qla2x00_loop_resync(base_vha
);
6363 clear_bit(LOOP_RESYNC_ACTIVE
,
6364 &base_vha
->dpc_flags
);
6367 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4010,
6368 "Loop resync end.\n");
6374 if (test_bit(NPIV_CONFIG_NEEDED
, &base_vha
->dpc_flags
) &&
6375 atomic_read(&base_vha
->loop_state
) == LOOP_READY
) {
6376 clear_bit(NPIV_CONFIG_NEEDED
, &base_vha
->dpc_flags
);
6377 qla2xxx_flash_npiv_conf(base_vha
);
6381 if (!ha
->interrupts_on
)
6382 ha
->isp_ops
->enable_intrs(ha
);
6384 if (test_and_clear_bit(BEACON_BLINK_NEEDED
,
6385 &base_vha
->dpc_flags
)) {
6386 if (ha
->beacon_blink_led
== 1)
6387 ha
->isp_ops
->beacon_blink(base_vha
);
6390 /* qpair online check */
6391 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED
,
6392 &base_vha
->dpc_flags
)) {
6393 if (ha
->flags
.eeh_busy
||
6394 ha
->flags
.pci_channel_io_perm_failure
)
6399 mutex_lock(&ha
->mq_lock
);
6400 list_for_each_entry(qpair
, &base_vha
->qp_list
,
6402 qpair
->online
= online
;
6403 mutex_unlock(&ha
->mq_lock
);
6406 if (test_and_clear_bit(SET_NVME_ZIO_THRESHOLD_NEEDED
,
6407 &base_vha
->dpc_flags
)) {
6408 ql_log(ql_log_info
, base_vha
, 0xffffff,
6409 "nvme: SET ZIO Activity exchange threshold to %d.\n",
6410 ha
->nvme_last_rptd_aen
);
6411 if (qla27xx_set_zio_threshold(base_vha
,
6412 ha
->nvme_last_rptd_aen
)) {
6413 ql_log(ql_log_info
, base_vha
, 0xffffff,
6414 "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
6415 ha
->nvme_last_rptd_aen
);
6419 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED
,
6420 &base_vha
->dpc_flags
)) {
6421 ql_log(ql_log_info
, base_vha
, 0xffffff,
6422 "SET ZIO Activity exchange threshold to %d.\n",
6423 ha
->last_zio_threshold
);
6424 qla27xx_set_zio_threshold(base_vha
,
6425 ha
->last_zio_threshold
);
6428 if (!IS_QLAFX00(ha
))
6429 qla2x00_do_dpc_all_vps(base_vha
);
6431 if (test_and_clear_bit(N2N_LINK_RESET
,
6432 &base_vha
->dpc_flags
)) {
6433 qla2x00_lip_reset(base_vha
);
6438 set_current_state(TASK_INTERRUPTIBLE
);
6439 } /* End of while(1) */
6440 __set_current_state(TASK_RUNNING
);
6442 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4011,
6443 "DPC handler exiting.\n");
6446 * Make sure that nobody tries to wake us up again.
6450 /* Cleanup any residual CTX SRBs. */
6451 qla2x00_abort_all_cmds(base_vha
, DID_NO_CONNECT
<< 16);
6457 qla2xxx_wake_dpc(struct scsi_qla_host
*vha
)
6459 struct qla_hw_data
*ha
= vha
->hw
;
6460 struct task_struct
*t
= ha
->dpc_thread
;
6462 if (!test_bit(UNLOADING
, &vha
->dpc_flags
) && t
)
6468 * Processes asynchronous reset.
6471 * ha = adapter block pointer.
6474 qla2x00_rst_aen(scsi_qla_host_t
*vha
)
6476 if (vha
->flags
.online
&& !vha
->flags
.reset_active
&&
6477 !atomic_read(&vha
->loop_down_timer
) &&
6478 !(test_bit(ABORT_ISP_ACTIVE
, &vha
->dpc_flags
))) {
6480 clear_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
);
6483 * Issue marker command only when we are going to start
6486 vha
->marker_needed
= 1;
6487 } while (!atomic_read(&vha
->loop_down_timer
) &&
6488 (test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
)));
6492 /**************************************************************************
6498 * Context: Interrupt
6499 ***************************************************************************/
6501 qla2x00_timer(struct timer_list
*t
)
6503 scsi_qla_host_t
*vha
= from_timer(vha
, t
, timer
);
6504 unsigned long cpu_flags
= 0;
6509 struct qla_hw_data
*ha
= vha
->hw
;
6510 struct req_que
*req
;
6512 if (ha
->flags
.eeh_busy
) {
6513 ql_dbg(ql_dbg_timer
, vha
, 0x6000,
6514 "EEH = %d, restarting timer.\n",
6515 ha
->flags
.eeh_busy
);
6516 qla2x00_restart_timer(vha
, WATCH_INTERVAL
);
6521 * Hardware read to raise pending EEH errors during mailbox waits. If
6522 * the read returns -1 then disable the board.
6524 if (!pci_channel_offline(ha
->pdev
)) {
6525 pci_read_config_word(ha
->pdev
, PCI_VENDOR_ID
, &w
);
6526 qla2x00_check_reg16_for_disconnect(vha
, w
);
6529 /* Make sure qla82xx_watchdog is run only for physical port */
6530 if (!vha
->vp_idx
&& IS_P3P_TYPE(ha
)) {
6531 if (test_bit(ISP_QUIESCE_NEEDED
, &vha
->dpc_flags
))
6534 qla82xx_watchdog(vha
);
6535 else if (IS_QLA8044(ha
))
6536 qla8044_watchdog(vha
);
6539 if (!vha
->vp_idx
&& IS_QLAFX00(ha
))
6540 qlafx00_timer_routine(vha
);
6542 /* Loop down handler. */
6543 if (atomic_read(&vha
->loop_down_timer
) > 0 &&
6544 !(test_bit(ABORT_ISP_ACTIVE
, &vha
->dpc_flags
)) &&
6545 !(test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
))
6546 && vha
->flags
.online
) {
6548 if (atomic_read(&vha
->loop_down_timer
) ==
6549 vha
->loop_down_abort_time
) {
6551 ql_log(ql_log_info
, vha
, 0x6008,
6552 "Loop down - aborting the queues before time expires.\n");
6554 if (!IS_QLA2100(ha
) && vha
->link_down_timeout
)
6555 atomic_set(&vha
->loop_state
, LOOP_DEAD
);
6558 * Schedule an ISP abort to return any FCP2-device
6561 /* NPIV - scan physical port only */
6563 spin_lock_irqsave(&ha
->hardware_lock
,
6565 req
= ha
->req_q_map
[0];
6567 index
< req
->num_outstanding_cmds
;
6571 sp
= req
->outstanding_cmds
[index
];
6574 if (sp
->cmd_type
!= TYPE_SRB
)
6576 if (sp
->type
!= SRB_SCSI_CMD
)
6579 if (!(sfcp
->flags
& FCF_FCP2_DEVICE
))
6583 set_bit(FCOE_CTX_RESET_NEEDED
,
6586 set_bit(ISP_ABORT_NEEDED
,
6590 spin_unlock_irqrestore(&ha
->hardware_lock
,
6596 /* if the loop has been down for 4 minutes, reinit adapter */
6597 if (atomic_dec_and_test(&vha
->loop_down_timer
) != 0) {
6598 if (!(vha
->device_flags
& DFLG_NO_CABLE
)) {
6599 ql_log(ql_log_warn
, vha
, 0x6009,
6600 "Loop down - aborting ISP.\n");
6603 set_bit(FCOE_CTX_RESET_NEEDED
,
6606 set_bit(ISP_ABORT_NEEDED
,
6610 ql_dbg(ql_dbg_timer
, vha
, 0x600a,
6611 "Loop down - seconds remaining %d.\n",
6612 atomic_read(&vha
->loop_down_timer
));
6614 /* Check if beacon LED needs to be blinked for physical host only */
6615 if (!vha
->vp_idx
&& (ha
->beacon_blink_led
== 1)) {
6616 /* There is no beacon_blink function for ISP82xx */
6617 if (!IS_P3P_TYPE(ha
)) {
6618 set_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
);
6623 /* Process any deferred work. */
6624 if (!list_empty(&vha
->work_list
)) {
6625 unsigned long flags
;
6628 spin_lock_irqsave(&vha
->work_lock
, flags
);
6629 if (!test_and_set_bit(IOCB_WORK_ACTIVE
, &vha
->dpc_flags
))
6631 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
6633 queue_work(vha
->hw
->wq
, &vha
->iocb_work
);
6638 * see if the active AEN count has changed from what was last reported.
6641 (atomic_read(&ha
->nvme_active_aen_cnt
) != ha
->nvme_last_rptd_aen
) &&
6642 ha
->zio_mode
== QLA_ZIO_MODE_6
&&
6643 !ha
->flags
.host_shutting_down
) {
6644 ql_log(ql_log_info
, vha
, 0x3002,
6645 "nvme: Sched: Set ZIO exchange threshold to %d.\n",
6646 ha
->nvme_last_rptd_aen
);
6647 ha
->nvme_last_rptd_aen
= atomic_read(&ha
->nvme_active_aen_cnt
);
6648 set_bit(SET_NVME_ZIO_THRESHOLD_NEEDED
, &vha
->dpc_flags
);
6653 (atomic_read(&ha
->zio_threshold
) != ha
->last_zio_threshold
) &&
6654 (ha
->zio_mode
== QLA_ZIO_MODE_6
) &&
6655 (IS_QLA83XX(ha
) || IS_QLA27XX(ha
) || IS_QLA28XX(ha
))) {
6656 ql_log(ql_log_info
, vha
, 0x3002,
6657 "Sched: Set ZIO exchange threshold to %d.\n",
6658 ha
->last_zio_threshold
);
6659 ha
->last_zio_threshold
= atomic_read(&ha
->zio_threshold
);
6660 set_bit(SET_ZIO_THRESHOLD_NEEDED
, &vha
->dpc_flags
);
6664 /* Schedule the DPC routine if needed */
6665 if ((test_bit(ISP_ABORT_NEEDED
, &vha
->dpc_flags
) ||
6666 test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
) ||
6667 test_bit(FCPORT_UPDATE_NEEDED
, &vha
->dpc_flags
) ||
6669 test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
) ||
6670 test_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
) ||
6671 test_bit(ISP_UNRECOVERABLE
, &vha
->dpc_flags
) ||
6672 test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
) ||
6673 test_bit(VP_DPC_NEEDED
, &vha
->dpc_flags
) ||
6674 test_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
))) {
6675 ql_dbg(ql_dbg_timer
, vha
, 0x600b,
6676 "isp_abort_needed=%d loop_resync_needed=%d "
6677 "fcport_update_needed=%d start_dpc=%d "
6678 "reset_marker_needed=%d",
6679 test_bit(ISP_ABORT_NEEDED
, &vha
->dpc_flags
),
6680 test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
),
6681 test_bit(FCPORT_UPDATE_NEEDED
, &vha
->dpc_flags
),
6683 test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
));
6684 ql_dbg(ql_dbg_timer
, vha
, 0x600c,
6685 "beacon_blink_needed=%d isp_unrecoverable=%d "
6686 "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6687 "relogin_needed=%d.\n",
6688 test_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
),
6689 test_bit(ISP_UNRECOVERABLE
, &vha
->dpc_flags
),
6690 test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
),
6691 test_bit(VP_DPC_NEEDED
, &vha
->dpc_flags
),
6692 test_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
));
6693 qla2xxx_wake_dpc(vha
);
6696 qla2x00_restart_timer(vha
, WATCH_INTERVAL
);
6699 /* Firmware interface routines. */
6701 #define FW_ISP21XX 0
6702 #define FW_ISP22XX 1
6703 #define FW_ISP2300 2
6704 #define FW_ISP2322 3
6705 #define FW_ISP24XX 4
6706 #define FW_ISP25XX 5
6707 #define FW_ISP81XX 6
6708 #define FW_ISP82XX 7
6709 #define FW_ISP2031 8
6710 #define FW_ISP8031 9
6711 #define FW_ISP27XX 10
6712 #define FW_ISP28XX 11
6714 #define FW_FILE_ISP21XX "ql2100_fw.bin"
6715 #define FW_FILE_ISP22XX "ql2200_fw.bin"
6716 #define FW_FILE_ISP2300 "ql2300_fw.bin"
6717 #define FW_FILE_ISP2322 "ql2322_fw.bin"
6718 #define FW_FILE_ISP24XX "ql2400_fw.bin"
6719 #define FW_FILE_ISP25XX "ql2500_fw.bin"
6720 #define FW_FILE_ISP81XX "ql8100_fw.bin"
6721 #define FW_FILE_ISP82XX "ql8200_fw.bin"
6722 #define FW_FILE_ISP2031 "ql2600_fw.bin"
6723 #define FW_FILE_ISP8031 "ql8300_fw.bin"
6724 #define FW_FILE_ISP27XX "ql2700_fw.bin"
6725 #define FW_FILE_ISP28XX "ql2800_fw.bin"
6728 static DEFINE_MUTEX(qla_fw_lock
);
6730 static struct fw_blob qla_fw_blobs
[] = {
6731 { .name
= FW_FILE_ISP21XX
, .segs
= { 0x1000, 0 }, },
6732 { .name
= FW_FILE_ISP22XX
, .segs
= { 0x1000, 0 }, },
6733 { .name
= FW_FILE_ISP2300
, .segs
= { 0x800, 0 }, },
6734 { .name
= FW_FILE_ISP2322
, .segs
= { 0x800, 0x1c000, 0x1e000, 0 }, },
6735 { .name
= FW_FILE_ISP24XX
, },
6736 { .name
= FW_FILE_ISP25XX
, },
6737 { .name
= FW_FILE_ISP81XX
, },
6738 { .name
= FW_FILE_ISP82XX
, },
6739 { .name
= FW_FILE_ISP2031
, },
6740 { .name
= FW_FILE_ISP8031
, },
6741 { .name
= FW_FILE_ISP27XX
, },
6742 { .name
= FW_FILE_ISP28XX
, },
6747 qla2x00_request_firmware(scsi_qla_host_t
*vha
)
6749 struct qla_hw_data
*ha
= vha
->hw
;
6750 struct fw_blob
*blob
;
6752 if (IS_QLA2100(ha
)) {
6753 blob
= &qla_fw_blobs
[FW_ISP21XX
];
6754 } else if (IS_QLA2200(ha
)) {
6755 blob
= &qla_fw_blobs
[FW_ISP22XX
];
6756 } else if (IS_QLA2300(ha
) || IS_QLA2312(ha
) || IS_QLA6312(ha
)) {
6757 blob
= &qla_fw_blobs
[FW_ISP2300
];
6758 } else if (IS_QLA2322(ha
) || IS_QLA6322(ha
)) {
6759 blob
= &qla_fw_blobs
[FW_ISP2322
];
6760 } else if (IS_QLA24XX_TYPE(ha
)) {
6761 blob
= &qla_fw_blobs
[FW_ISP24XX
];
6762 } else if (IS_QLA25XX(ha
)) {
6763 blob
= &qla_fw_blobs
[FW_ISP25XX
];
6764 } else if (IS_QLA81XX(ha
)) {
6765 blob
= &qla_fw_blobs
[FW_ISP81XX
];
6766 } else if (IS_QLA82XX(ha
)) {
6767 blob
= &qla_fw_blobs
[FW_ISP82XX
];
6768 } else if (IS_QLA2031(ha
)) {
6769 blob
= &qla_fw_blobs
[FW_ISP2031
];
6770 } else if (IS_QLA8031(ha
)) {
6771 blob
= &qla_fw_blobs
[FW_ISP8031
];
6772 } else if (IS_QLA27XX(ha
)) {
6773 blob
= &qla_fw_blobs
[FW_ISP27XX
];
6774 } else if (IS_QLA28XX(ha
)) {
6775 blob
= &qla_fw_blobs
[FW_ISP28XX
];
6783 mutex_lock(&qla_fw_lock
);
6787 if (request_firmware(&blob
->fw
, blob
->name
, &ha
->pdev
->dev
)) {
6788 ql_log(ql_log_warn
, vha
, 0x0063,
6789 "Failed to load firmware image (%s).\n", blob
->name
);
6795 mutex_unlock(&qla_fw_lock
);
6800 qla2x00_release_firmware(void)
6802 struct fw_blob
*blob
;
6804 mutex_lock(&qla_fw_lock
);
6805 for (blob
= qla_fw_blobs
; blob
->name
; blob
++)
6806 release_firmware(blob
->fw
);
6807 mutex_unlock(&qla_fw_lock
);
6810 static void qla_pci_error_cleanup(scsi_qla_host_t
*vha
)
6812 struct qla_hw_data
*ha
= vha
->hw
;
6813 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
6814 struct qla_qpair
*qpair
= NULL
;
6815 struct scsi_qla_host
*vp
;
6818 unsigned long flags
;
6822 ha
->base_qpair
->chip_reset
= ha
->chip_reset
;
6823 for (i
= 0; i
< ha
->max_qpairs
; i
++) {
6824 if (ha
->queue_pair_map
[i
])
6825 ha
->queue_pair_map
[i
]->chip_reset
=
6826 ha
->base_qpair
->chip_reset
;
6829 /* purge MBox commands */
6830 if (atomic_read(&ha
->num_pend_mbx_stage3
)) {
6831 clear_bit(MBX_INTR_WAIT
, &ha
->mbx_cmd_flags
);
6832 complete(&ha
->mbx_intr_comp
);
6837 while (atomic_read(&ha
->num_pend_mbx_stage3
) ||
6838 atomic_read(&ha
->num_pend_mbx_stage2
) ||
6839 atomic_read(&ha
->num_pend_mbx_stage1
)) {
6846 ha
->flags
.purge_mbox
= 0;
6848 mutex_lock(&ha
->mq_lock
);
6849 list_for_each_entry(qpair
, &base_vha
->qp_list
, qp_list_elem
)
6851 mutex_unlock(&ha
->mq_lock
);
6853 qla2x00_mark_all_devices_lost(vha
, 0);
6855 spin_lock_irqsave(&ha
->vport_slock
, flags
);
6856 list_for_each_entry(vp
, &ha
->vp_list
, list
) {
6857 atomic_inc(&vp
->vref_count
);
6858 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
6859 qla2x00_mark_all_devices_lost(vp
, 0);
6860 spin_lock_irqsave(&ha
->vport_slock
, flags
);
6861 atomic_dec(&vp
->vref_count
);
6863 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
6865 /* Clear all async request states across all VPs. */
6866 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
)
6867 fcport
->flags
&= ~(FCF_LOGIN_NEEDED
| FCF_ASYNC_SENT
);
6869 spin_lock_irqsave(&ha
->vport_slock
, flags
);
6870 list_for_each_entry(vp
, &ha
->vp_list
, list
) {
6871 atomic_inc(&vp
->vref_count
);
6872 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
6873 list_for_each_entry(fcport
, &vp
->vp_fcports
, list
)
6874 fcport
->flags
&= ~(FCF_LOGIN_NEEDED
| FCF_ASYNC_SENT
);
6875 spin_lock_irqsave(&ha
->vport_slock
, flags
);
6876 atomic_dec(&vp
->vref_count
);
6878 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
6882 static pci_ers_result_t
6883 qla2xxx_pci_error_detected(struct pci_dev
*pdev
, pci_channel_state_t state
)
6885 scsi_qla_host_t
*vha
= pci_get_drvdata(pdev
);
6886 struct qla_hw_data
*ha
= vha
->hw
;
6888 ql_dbg(ql_dbg_aer
, vha
, 0x9000,
6889 "PCI error detected, state %x.\n", state
);
6891 if (!atomic_read(&pdev
->enable_cnt
)) {
6892 ql_log(ql_log_info
, vha
, 0xffff,
6893 "PCI device is disabled,state %x\n", state
);
6894 return PCI_ERS_RESULT_NEED_RESET
;
6898 case pci_channel_io_normal
:
6899 ha
->flags
.eeh_busy
= 0;
6900 if (ql2xmqsupport
|| ql2xnvmeenable
) {
6901 set_bit(QPAIR_ONLINE_CHECK_NEEDED
, &vha
->dpc_flags
);
6902 qla2xxx_wake_dpc(vha
);
6904 return PCI_ERS_RESULT_CAN_RECOVER
;
6905 case pci_channel_io_frozen
:
6906 ha
->flags
.eeh_busy
= 1;
6907 qla_pci_error_cleanup(vha
);
6908 return PCI_ERS_RESULT_NEED_RESET
;
6909 case pci_channel_io_perm_failure
:
6910 ha
->flags
.pci_channel_io_perm_failure
= 1;
6911 qla2x00_abort_all_cmds(vha
, DID_NO_CONNECT
<< 16);
6912 if (ql2xmqsupport
|| ql2xnvmeenable
) {
6913 set_bit(QPAIR_ONLINE_CHECK_NEEDED
, &vha
->dpc_flags
);
6914 qla2xxx_wake_dpc(vha
);
6916 return PCI_ERS_RESULT_DISCONNECT
;
6918 return PCI_ERS_RESULT_NEED_RESET
;
6921 static pci_ers_result_t
6922 qla2xxx_pci_mmio_enabled(struct pci_dev
*pdev
)
6924 int risc_paused
= 0;
6926 unsigned long flags
;
6927 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
6928 struct qla_hw_data
*ha
= base_vha
->hw
;
6929 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
6930 struct device_reg_24xx __iomem
*reg24
= &ha
->iobase
->isp24
;
6933 return PCI_ERS_RESULT_RECOVERED
;
6935 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
6936 if (IS_QLA2100(ha
) || IS_QLA2200(ha
)){
6937 stat
= RD_REG_DWORD(®
->hccr
);
6938 if (stat
& HCCR_RISC_PAUSE
)
6940 } else if (IS_QLA23XX(ha
)) {
6941 stat
= RD_REG_DWORD(®
->u
.isp2300
.host_status
);
6942 if (stat
& HSR_RISC_PAUSED
)
6944 } else if (IS_FWI2_CAPABLE(ha
)) {
6945 stat
= RD_REG_DWORD(®24
->host_status
);
6946 if (stat
& HSRX_RISC_PAUSED
)
6949 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
6952 ql_log(ql_log_info
, base_vha
, 0x9003,
6953 "RISC paused -- mmio_enabled, Dumping firmware.\n");
6954 ha
->isp_ops
->fw_dump(base_vha
, 0);
6956 return PCI_ERS_RESULT_NEED_RESET
;
6958 return PCI_ERS_RESULT_RECOVERED
;
6961 static pci_ers_result_t
6962 qla2xxx_pci_slot_reset(struct pci_dev
*pdev
)
6964 pci_ers_result_t ret
= PCI_ERS_RESULT_DISCONNECT
;
6965 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
6966 struct qla_hw_data
*ha
= base_vha
->hw
;
6968 struct qla_qpair
*qpair
= NULL
;
6970 ql_dbg(ql_dbg_aer
, base_vha
, 0x9004,
6973 /* Workaround: qla2xxx driver which access hardware earlier
6974 * needs error state to be pci_channel_io_online.
6975 * Otherwise mailbox command timesout.
6977 pdev
->error_state
= pci_channel_io_normal
;
6979 pci_restore_state(pdev
);
6981 /* pci_restore_state() clears the saved_state flag of the device
6982 * save restored state which resets saved_state flag
6984 pci_save_state(pdev
);
6987 rc
= pci_enable_device_mem(pdev
);
6989 rc
= pci_enable_device(pdev
);
6992 ql_log(ql_log_warn
, base_vha
, 0x9005,
6993 "Can't re-enable PCI device after reset.\n");
6994 goto exit_slot_reset
;
6998 if (ha
->isp_ops
->pci_config(base_vha
))
6999 goto exit_slot_reset
;
7001 mutex_lock(&ha
->mq_lock
);
7002 list_for_each_entry(qpair
, &base_vha
->qp_list
, qp_list_elem
)
7004 mutex_unlock(&ha
->mq_lock
);
7006 base_vha
->flags
.online
= 1;
7007 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
7008 if (ha
->isp_ops
->abort_isp(base_vha
) == QLA_SUCCESS
)
7009 ret
= PCI_ERS_RESULT_RECOVERED
;
7010 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
7014 ql_dbg(ql_dbg_aer
, base_vha
, 0x900e,
7015 "slot_reset return %x.\n", ret
);
7021 qla2xxx_pci_resume(struct pci_dev
*pdev
)
7023 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
7024 struct qla_hw_data
*ha
= base_vha
->hw
;
7027 ql_dbg(ql_dbg_aer
, base_vha
, 0x900f,
7030 ha
->flags
.eeh_busy
= 0;
7032 ret
= qla2x00_wait_for_hba_online(base_vha
);
7033 if (ret
!= QLA_SUCCESS
) {
7034 ql_log(ql_log_fatal
, base_vha
, 0x9002,
7035 "The device failed to resume I/O from slot/link_reset.\n");
7040 qla_pci_reset_prepare(struct pci_dev
*pdev
)
7042 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
7043 struct qla_hw_data
*ha
= base_vha
->hw
;
7044 struct qla_qpair
*qpair
;
7046 ql_log(ql_log_warn
, base_vha
, 0xffff,
7050 * PCI FLR/function reset is about to reset the
7051 * slot. Stop the chip to stop all DMA access.
7052 * It is assumed that pci_reset_done will be called
7053 * after FLR to resume Chip operation.
7055 ha
->flags
.eeh_busy
= 1;
7056 mutex_lock(&ha
->mq_lock
);
7057 list_for_each_entry(qpair
, &base_vha
->qp_list
, qp_list_elem
)
7059 mutex_unlock(&ha
->mq_lock
);
7061 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
7062 qla2x00_abort_isp_cleanup(base_vha
);
7063 qla2x00_abort_all_cmds(base_vha
, DID_RESET
<< 16);
7067 qla_pci_reset_done(struct pci_dev
*pdev
)
7069 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
7070 struct qla_hw_data
*ha
= base_vha
->hw
;
7071 struct qla_qpair
*qpair
;
7073 ql_log(ql_log_warn
, base_vha
, 0xffff,
7077 * FLR just completed by PCI layer. Resume adapter
7079 ha
->flags
.eeh_busy
= 0;
7080 mutex_lock(&ha
->mq_lock
);
7081 list_for_each_entry(qpair
, &base_vha
->qp_list
, qp_list_elem
)
7083 mutex_unlock(&ha
->mq_lock
);
7085 base_vha
->flags
.online
= 1;
7086 ha
->isp_ops
->abort_isp(base_vha
);
7087 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
7090 static int qla2xxx_map_queues(struct Scsi_Host
*shost
)
7093 scsi_qla_host_t
*vha
= (scsi_qla_host_t
*)shost
->hostdata
;
7094 struct blk_mq_queue_map
*qmap
= &shost
->tag_set
.map
[HCTX_TYPE_DEFAULT
];
7096 if (USER_CTRL_IRQ(vha
->hw
) || !vha
->hw
->mqiobase
)
7097 rc
= blk_mq_map_queues(qmap
);
7099 rc
= blk_mq_pci_map_queues(qmap
, vha
->hw
->pdev
, vha
->irq_offset
);
7103 struct scsi_host_template qla2xxx_driver_template
= {
7104 .module
= THIS_MODULE
,
7105 .name
= QLA2XXX_DRIVER_NAME
,
7106 .queuecommand
= qla2xxx_queuecommand
,
7108 .eh_timed_out
= fc_eh_timed_out
,
7109 .eh_abort_handler
= qla2xxx_eh_abort
,
7110 .eh_device_reset_handler
= qla2xxx_eh_device_reset
,
7111 .eh_target_reset_handler
= qla2xxx_eh_target_reset
,
7112 .eh_bus_reset_handler
= qla2xxx_eh_bus_reset
,
7113 .eh_host_reset_handler
= qla2xxx_eh_host_reset
,
7115 .slave_configure
= qla2xxx_slave_configure
,
7117 .slave_alloc
= qla2xxx_slave_alloc
,
7118 .slave_destroy
= qla2xxx_slave_destroy
,
7119 .scan_finished
= qla2xxx_scan_finished
,
7120 .scan_start
= qla2xxx_scan_start
,
7121 .change_queue_depth
= scsi_change_queue_depth
,
7122 .map_queues
= qla2xxx_map_queues
,
7125 .sg_tablesize
= SG_ALL
,
7127 .max_sectors
= 0xFFFF,
7128 .shost_attrs
= qla2x00_host_attrs
,
7130 .supported_mode
= MODE_INITIATOR
,
7131 .track_queue_depth
= 1,
7132 .cmd_size
= sizeof(srb_t
),
7135 static const struct pci_error_handlers qla2xxx_err_handler
= {
7136 .error_detected
= qla2xxx_pci_error_detected
,
7137 .mmio_enabled
= qla2xxx_pci_mmio_enabled
,
7138 .slot_reset
= qla2xxx_pci_slot_reset
,
7139 .resume
= qla2xxx_pci_resume
,
7140 .reset_prepare
= qla_pci_reset_prepare
,
7141 .reset_done
= qla_pci_reset_done
,
7144 static struct pci_device_id qla2xxx_pci_tbl
[] = {
7145 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2100
) },
7146 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2200
) },
7147 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2300
) },
7148 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2312
) },
7149 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2322
) },
7150 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP6312
) },
7151 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP6322
) },
7152 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2422
) },
7153 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2432
) },
7154 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8432
) },
7155 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP5422
) },
7156 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP5432
) },
7157 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2532
) },
7158 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2031
) },
7159 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8001
) },
7160 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8021
) },
7161 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8031
) },
7162 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISPF001
) },
7163 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8044
) },
7164 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2071
) },
7165 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2271
) },
7166 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2261
) },
7167 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2061
) },
7168 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2081
) },
7169 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2281
) },
7170 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2089
) },
7171 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2289
) },
7174 MODULE_DEVICE_TABLE(pci
, qla2xxx_pci_tbl
);
7176 static struct pci_driver qla2xxx_pci_driver
= {
7177 .name
= QLA2XXX_DRIVER_NAME
,
7179 .owner
= THIS_MODULE
,
7181 .id_table
= qla2xxx_pci_tbl
,
7182 .probe
= qla2x00_probe_one
,
7183 .remove
= qla2x00_remove_one
,
7184 .shutdown
= qla2x00_shutdown
,
7185 .err_handler
= &qla2xxx_err_handler
,
7188 static const struct file_operations apidev_fops
= {
7189 .owner
= THIS_MODULE
,
7190 .llseek
= noop_llseek
,
7194 * qla2x00_module_init - Module initialization.
7197 qla2x00_module_init(void)
7201 BUILD_BUG_ON(sizeof(cmd_entry_t
) != 64);
7202 BUILD_BUG_ON(sizeof(cont_a64_entry_t
) != 64);
7203 BUILD_BUG_ON(sizeof(cont_entry_t
) != 64);
7204 BUILD_BUG_ON(sizeof(init_cb_t
) != 96);
7205 BUILD_BUG_ON(sizeof(ms_iocb_entry_t
) != 64);
7206 BUILD_BUG_ON(sizeof(request_t
) != 64);
7207 BUILD_BUG_ON(sizeof(struct access_chip_84xx
) != 64);
7208 BUILD_BUG_ON(sizeof(struct cmd_bidir
) != 64);
7209 BUILD_BUG_ON(sizeof(struct cmd_nvme
) != 64);
7210 BUILD_BUG_ON(sizeof(struct cmd_type_6
) != 64);
7211 BUILD_BUG_ON(sizeof(struct cmd_type_7
) != 64);
7212 BUILD_BUG_ON(sizeof(struct cmd_type_7_fx00
) != 64);
7213 BUILD_BUG_ON(sizeof(struct cmd_type_crc_2
) != 64);
7214 BUILD_BUG_ON(sizeof(struct ct_entry_24xx
) != 64);
7215 BUILD_BUG_ON(sizeof(struct ctio_crc2_to_fw
) != 64);
7216 BUILD_BUG_ON(sizeof(struct els_entry_24xx
) != 64);
7217 BUILD_BUG_ON(sizeof(struct fxdisc_entry_fx00
) != 64);
7218 BUILD_BUG_ON(sizeof(struct init_cb_24xx
) != 128);
7219 BUILD_BUG_ON(sizeof(struct init_cb_81xx
) != 128);
7220 BUILD_BUG_ON(sizeof(struct pt_ls4_request
) != 64);
7221 BUILD_BUG_ON(sizeof(struct sns_cmd_pkt
) != 2064);
7222 BUILD_BUG_ON(sizeof(struct verify_chip_entry_84xx
) != 64);
7223 BUILD_BUG_ON(sizeof(struct vf_evfp_entry_24xx
) != 56);
7225 /* Allocate cache for SRBs. */
7226 srb_cachep
= kmem_cache_create("qla2xxx_srbs", sizeof(srb_t
), 0,
7227 SLAB_HWCACHE_ALIGN
, NULL
);
7228 if (srb_cachep
== NULL
) {
7229 ql_log(ql_log_fatal
, NULL
, 0x0001,
7230 "Unable to allocate SRB cache...Failing load!.\n");
7234 /* Initialize target kmem_cache and mem_pools */
7238 } else if (ret
> 0) {
7240 * If initiator mode is explictly disabled by qlt_init(),
7241 * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
7242 * performing scsi_scan_target() during LOOP UP event.
7244 qla2xxx_transport_functions
.disable_target_scan
= 1;
7245 qla2xxx_transport_vport_functions
.disable_target_scan
= 1;
7248 /* Derive version string. */
7249 strcpy(qla2x00_version_str
, QLA2XXX_VERSION
);
7250 if (ql2xextended_error_logging
)
7251 strcat(qla2x00_version_str
, "-debug");
7252 if (ql2xextended_error_logging
== 1)
7253 ql2xextended_error_logging
= QL_DBG_DEFAULT1_MASK
;
7255 if (ql2x_ini_mode
== QLA2XXX_INI_MODE_DUAL
)
7256 qla_insert_tgt_attrs();
7258 qla2xxx_transport_template
=
7259 fc_attach_transport(&qla2xxx_transport_functions
);
7260 if (!qla2xxx_transport_template
) {
7261 ql_log(ql_log_fatal
, NULL
, 0x0002,
7262 "fc_attach_transport failed...Failing load!.\n");
7267 apidev_major
= register_chrdev(0, QLA2XXX_APIDEV
, &apidev_fops
);
7268 if (apidev_major
< 0) {
7269 ql_log(ql_log_fatal
, NULL
, 0x0003,
7270 "Unable to register char device %s.\n", QLA2XXX_APIDEV
);
7273 qla2xxx_transport_vport_template
=
7274 fc_attach_transport(&qla2xxx_transport_vport_functions
);
7275 if (!qla2xxx_transport_vport_template
) {
7276 ql_log(ql_log_fatal
, NULL
, 0x0004,
7277 "fc_attach_transport vport failed...Failing load!.\n");
7281 ql_log(ql_log_info
, NULL
, 0x0005,
7282 "QLogic Fibre Channel HBA Driver: %s.\n",
7283 qla2x00_version_str
);
7284 ret
= pci_register_driver(&qla2xxx_pci_driver
);
7286 ql_log(ql_log_fatal
, NULL
, 0x0006,
7287 "pci_register_driver failed...ret=%d Failing load!.\n",
7289 goto release_vport_transport
;
7293 release_vport_transport
:
7294 fc_release_transport(qla2xxx_transport_vport_template
);
7297 if (apidev_major
>= 0)
7298 unregister_chrdev(apidev_major
, QLA2XXX_APIDEV
);
7299 fc_release_transport(qla2xxx_transport_template
);
7305 kmem_cache_destroy(srb_cachep
);
7310 * qla2x00_module_exit - Module cleanup.
7313 qla2x00_module_exit(void)
7315 pci_unregister_driver(&qla2xxx_pci_driver
);
7316 qla2x00_release_firmware();
7317 kmem_cache_destroy(ctx_cachep
);
7318 fc_release_transport(qla2xxx_transport_vport_template
);
7319 if (apidev_major
>= 0)
7320 unregister_chrdev(apidev_major
, QLA2XXX_APIDEV
);
7321 fc_release_transport(qla2xxx_transport_template
);
7323 kmem_cache_destroy(srb_cachep
);
7326 module_init(qla2x00_module_init
);
7327 module_exit(qla2x00_module_exit
);
7329 MODULE_AUTHOR("QLogic Corporation");
7330 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
7331 MODULE_LICENSE("GPL");
7332 MODULE_VERSION(QLA2XXX_VERSION
);
7333 MODULE_FIRMWARE(FW_FILE_ISP21XX
);
7334 MODULE_FIRMWARE(FW_FILE_ISP22XX
);
7335 MODULE_FIRMWARE(FW_FILE_ISP2300
);
7336 MODULE_FIRMWARE(FW_FILE_ISP2322
);
7337 MODULE_FIRMWARE(FW_FILE_ISP24XX
);
7338 MODULE_FIRMWARE(FW_FILE_ISP25XX
);