2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2013 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
9 #include <linux/moduleparam.h>
10 #include <linux/vmalloc.h>
11 #include <linux/delay.h>
12 #include <linux/kthread.h>
13 #include <linux/mutex.h>
14 #include <linux/kobject.h>
15 #include <linux/slab.h>
16 #include <scsi/scsi_tcq.h>
17 #include <scsi/scsicam.h>
18 #include <scsi/scsi_transport.h>
19 #include <scsi/scsi_transport_fc.h>
21 #include "qla_target.h"
26 char qla2x00_version_str
[40];
28 static int apidev_major
;
31 * SRB allocation cache
33 static struct kmem_cache
*srb_cachep
;
36 * CT6 CTX allocation cache
38 static struct kmem_cache
*ctx_cachep
;
40 * error level for logging
42 int ql_errlev
= ql_log_all
;
44 static int ql2xenableclass2
;
45 module_param(ql2xenableclass2
, int, S_IRUGO
|S_IRUSR
);
46 MODULE_PARM_DESC(ql2xenableclass2
,
47 "Specify if Class 2 operations are supported from the very "
48 "beginning. Default is 0 - class 2 not supported.");
51 int ql2xlogintimeout
= 20;
52 module_param(ql2xlogintimeout
, int, S_IRUGO
);
53 MODULE_PARM_DESC(ql2xlogintimeout
,
54 "Login timeout value in seconds.");
56 int qlport_down_retry
;
57 module_param(qlport_down_retry
, int, S_IRUGO
);
58 MODULE_PARM_DESC(qlport_down_retry
,
59 "Maximum number of command retries to a port that returns "
60 "a PORT-DOWN status.");
62 int ql2xplogiabsentdevice
;
63 module_param(ql2xplogiabsentdevice
, int, S_IRUGO
|S_IWUSR
);
64 MODULE_PARM_DESC(ql2xplogiabsentdevice
,
65 "Option to enable PLOGI to devices that are not present after "
66 "a Fabric scan. This is needed for several broken switches. "
67 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
69 int ql2xloginretrycount
= 0;
70 module_param(ql2xloginretrycount
, int, S_IRUGO
);
71 MODULE_PARM_DESC(ql2xloginretrycount
,
72 "Specify an alternate value for the NVRAM login retry count.");
74 int ql2xallocfwdump
= 1;
75 module_param(ql2xallocfwdump
, int, S_IRUGO
);
76 MODULE_PARM_DESC(ql2xallocfwdump
,
77 "Option to enable allocation of memory for a firmware dump "
78 "during HBA initialization. Memory allocation requirements "
79 "vary by ISP type. Default is 1 - allocate memory.");
81 int ql2xextended_error_logging
;
82 module_param(ql2xextended_error_logging
, int, S_IRUGO
|S_IWUSR
);
83 MODULE_PARM_DESC(ql2xextended_error_logging
,
84 "Option to enable extended error logging,\n"
85 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n"
86 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
87 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n"
88 "\t\t0x02000000 - Async events. 0x01000000 - Timer routines.\n"
89 "\t\t0x00800000 - User space. 0x00400000 - Task Management.\n"
90 "\t\t0x00200000 - AER/EEH. 0x00100000 - Multi Q.\n"
91 "\t\t0x00080000 - P3P Specific. 0x00040000 - Virtual Port.\n"
92 "\t\t0x00020000 - Buffer Dump. 0x00010000 - Misc.\n"
93 "\t\t0x00008000 - Verbose. 0x00004000 - Target.\n"
94 "\t\t0x00002000 - Target Mgmt. 0x00001000 - Target TMF.\n"
95 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
96 "\t\t0x1e400000 - Preferred value for capturing essential "
97 "debug information (equivalent to old "
98 "ql2xextended_error_logging=1).\n"
99 "\t\tDo LOGICAL OR of the value to enable more than one level");
101 int ql2xshiftctondsd
= 6;
102 module_param(ql2xshiftctondsd
, int, S_IRUGO
);
103 MODULE_PARM_DESC(ql2xshiftctondsd
,
104 "Set to control shifting of command type processing "
105 "based on total number of SG elements.");
107 int ql2xfdmienable
=1;
108 module_param(ql2xfdmienable
, int, S_IRUGO
);
109 MODULE_PARM_DESC(ql2xfdmienable
,
110 "Enables FDMI registrations. "
111 "0 - no FDMI. Default is 1 - perform FDMI.");
113 #define MAX_Q_DEPTH 32
114 static int ql2xmaxqdepth
= MAX_Q_DEPTH
;
115 module_param(ql2xmaxqdepth
, int, S_IRUGO
|S_IWUSR
);
116 MODULE_PARM_DESC(ql2xmaxqdepth
,
117 "Maximum queue depth to set for each LUN. "
120 int ql2xenabledif
= 2;
121 module_param(ql2xenabledif
, int, S_IRUGO
);
122 MODULE_PARM_DESC(ql2xenabledif
,
123 " Enable T10-CRC-DIF "
124 " Default is 0 - No DIF Support. 1 - Enable it"
125 ", 2 - Enable DIF for all types, except Type 0.");
127 int ql2xenablehba_err_chk
= 2;
128 module_param(ql2xenablehba_err_chk
, int, S_IRUGO
|S_IWUSR
);
129 MODULE_PARM_DESC(ql2xenablehba_err_chk
,
130 " Enable T10-CRC-DIF Error isolation by HBA:\n"
132 " 0 -- Error isolation disabled\n"
133 " 1 -- Error isolation enabled only for DIX Type 0\n"
134 " 2 -- Error isolation enabled for all Types\n");
136 int ql2xiidmaenable
=1;
137 module_param(ql2xiidmaenable
, int, S_IRUGO
);
138 MODULE_PARM_DESC(ql2xiidmaenable
,
139 "Enables iIDMA settings "
140 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
142 int ql2xmaxqueues
= 1;
143 module_param(ql2xmaxqueues
, int, S_IRUGO
);
144 MODULE_PARM_DESC(ql2xmaxqueues
,
145 "Enables MQ settings "
146 "Default is 1 for single queue. Set it to number "
147 "of queues in MQ mode.");
149 int ql2xmultique_tag
;
150 module_param(ql2xmultique_tag
, int, S_IRUGO
);
151 MODULE_PARM_DESC(ql2xmultique_tag
,
152 "Enables CPU affinity settings for the driver "
153 "Default is 0 for no affinity of request and response IO. "
154 "Set it to 1 to turn on the cpu affinity.");
157 module_param(ql2xfwloadbin
, int, S_IRUGO
|S_IWUSR
);
158 MODULE_PARM_DESC(ql2xfwloadbin
,
159 "Option to specify location from which to load ISP firmware:.\n"
160 " 2 -- load firmware via the request_firmware() (hotplug).\n"
162 " 1 -- load firmware from flash.\n"
163 " 0 -- use default semantics.\n");
166 module_param(ql2xetsenable
, int, S_IRUGO
);
167 MODULE_PARM_DESC(ql2xetsenable
,
168 "Enables firmware ETS burst."
169 "Default is 0 - skip ETS enablement.");
172 module_param(ql2xdbwr
, int, S_IRUGO
|S_IWUSR
);
173 MODULE_PARM_DESC(ql2xdbwr
,
174 "Option to specify scheme for request queue posting.\n"
175 " 0 -- Regular doorbell.\n"
176 " 1 -- CAMRAM doorbell (faster).\n");
178 int ql2xtargetreset
= 1;
179 module_param(ql2xtargetreset
, int, S_IRUGO
);
180 MODULE_PARM_DESC(ql2xtargetreset
,
181 "Enable target reset."
182 "Default is 1 - use hw defaults.");
185 module_param(ql2xgffidenable
, int, S_IRUGO
);
186 MODULE_PARM_DESC(ql2xgffidenable
,
187 "Enables GFF_ID checks of port type. "
188 "Default is 0 - Do not use GFF_ID information.");
190 int ql2xasynctmfenable
;
191 module_param(ql2xasynctmfenable
, int, S_IRUGO
);
192 MODULE_PARM_DESC(ql2xasynctmfenable
,
193 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
194 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
196 int ql2xdontresethba
;
197 module_param(ql2xdontresethba
, int, S_IRUGO
|S_IWUSR
);
198 MODULE_PARM_DESC(ql2xdontresethba
,
199 "Option to specify reset behaviour.\n"
200 " 0 (Default) -- Reset on failure.\n"
201 " 1 -- Do not reset on failure.\n");
203 uint ql2xmaxlun
= MAX_LUNS
;
204 module_param(ql2xmaxlun
, uint
, S_IRUGO
);
205 MODULE_PARM_DESC(ql2xmaxlun
,
206 "Defines the maximum LU number to register with the SCSI "
207 "midlayer. Default is 65535.");
209 int ql2xmdcapmask
= 0x1F;
210 module_param(ql2xmdcapmask
, int, S_IRUGO
);
211 MODULE_PARM_DESC(ql2xmdcapmask
,
212 "Set the Minidump driver capture mask level. "
213 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
215 int ql2xmdenable
= 1;
216 module_param(ql2xmdenable
, int, S_IRUGO
);
217 MODULE_PARM_DESC(ql2xmdenable
,
218 "Enable/disable MiniDump. "
219 "0 - MiniDump disabled. "
220 "1 (Default) - MiniDump enabled.");
223 * SCSI host template entry points
225 static int qla2xxx_slave_configure(struct scsi_device
* device
);
226 static int qla2xxx_slave_alloc(struct scsi_device
*);
227 static int qla2xxx_scan_finished(struct Scsi_Host
*, unsigned long time
);
228 static void qla2xxx_scan_start(struct Scsi_Host
*);
229 static void qla2xxx_slave_destroy(struct scsi_device
*);
230 static int qla2xxx_queuecommand(struct Scsi_Host
*h
, struct scsi_cmnd
*cmd
);
231 static int qla2xxx_eh_abort(struct scsi_cmnd
*);
232 static int qla2xxx_eh_device_reset(struct scsi_cmnd
*);
233 static int qla2xxx_eh_target_reset(struct scsi_cmnd
*);
234 static int qla2xxx_eh_bus_reset(struct scsi_cmnd
*);
235 static int qla2xxx_eh_host_reset(struct scsi_cmnd
*);
237 static int qla2x00_change_queue_depth(struct scsi_device
*, int, int);
238 static int qla2x00_change_queue_type(struct scsi_device
*, int);
239 static void qla2x00_free_device(scsi_qla_host_t
*);
241 struct scsi_host_template qla2xxx_driver_template
= {
242 .module
= THIS_MODULE
,
243 .name
= QLA2XXX_DRIVER_NAME
,
244 .queuecommand
= qla2xxx_queuecommand
,
246 .eh_abort_handler
= qla2xxx_eh_abort
,
247 .eh_device_reset_handler
= qla2xxx_eh_device_reset
,
248 .eh_target_reset_handler
= qla2xxx_eh_target_reset
,
249 .eh_bus_reset_handler
= qla2xxx_eh_bus_reset
,
250 .eh_host_reset_handler
= qla2xxx_eh_host_reset
,
252 .slave_configure
= qla2xxx_slave_configure
,
254 .slave_alloc
= qla2xxx_slave_alloc
,
255 .slave_destroy
= qla2xxx_slave_destroy
,
256 .scan_finished
= qla2xxx_scan_finished
,
257 .scan_start
= qla2xxx_scan_start
,
258 .change_queue_depth
= qla2x00_change_queue_depth
,
259 .change_queue_type
= qla2x00_change_queue_type
,
262 .use_clustering
= ENABLE_CLUSTERING
,
263 .sg_tablesize
= SG_ALL
,
265 .max_sectors
= 0xFFFF,
266 .shost_attrs
= qla2x00_host_attrs
,
268 .supported_mode
= MODE_INITIATOR
,
271 static struct scsi_transport_template
*qla2xxx_transport_template
= NULL
;
272 struct scsi_transport_template
*qla2xxx_transport_vport_template
= NULL
;
274 /* TODO Convert to inlines
280 qla2x00_start_timer(scsi_qla_host_t
*vha
, void *func
, unsigned long interval
)
282 init_timer(&vha
->timer
);
283 vha
->timer
.expires
= jiffies
+ interval
* HZ
;
284 vha
->timer
.data
= (unsigned long)vha
;
285 vha
->timer
.function
= (void (*)(unsigned long))func
;
286 add_timer(&vha
->timer
);
287 vha
->timer_active
= 1;
291 qla2x00_restart_timer(scsi_qla_host_t
*vha
, unsigned long interval
)
293 /* Currently used for 82XX only. */
294 if (vha
->device_flags
& DFLG_DEV_FAILED
) {
295 ql_dbg(ql_dbg_timer
, vha
, 0x600d,
296 "Device in a failed state, returning.\n");
300 mod_timer(&vha
->timer
, jiffies
+ interval
* HZ
);
303 static __inline__
void
304 qla2x00_stop_timer(scsi_qla_host_t
*vha
)
306 del_timer_sync(&vha
->timer
);
307 vha
->timer_active
= 0;
310 static int qla2x00_do_dpc(void *data
);
312 static void qla2x00_rst_aen(scsi_qla_host_t
*);
314 static int qla2x00_mem_alloc(struct qla_hw_data
*, uint16_t, uint16_t,
315 struct req_que
**, struct rsp_que
**);
316 static void qla2x00_free_fw_dump(struct qla_hw_data
*);
317 static void qla2x00_mem_free(struct qla_hw_data
*);
319 /* -------------------------------------------------------------------------- */
320 static int qla2x00_alloc_queues(struct qla_hw_data
*ha
, struct req_que
*req
,
323 scsi_qla_host_t
*vha
= pci_get_drvdata(ha
->pdev
);
324 ha
->req_q_map
= kzalloc(sizeof(struct req_que
*) * ha
->max_req_queues
,
326 if (!ha
->req_q_map
) {
327 ql_log(ql_log_fatal
, vha
, 0x003b,
328 "Unable to allocate memory for request queue ptrs.\n");
332 ha
->rsp_q_map
= kzalloc(sizeof(struct rsp_que
*) * ha
->max_rsp_queues
,
334 if (!ha
->rsp_q_map
) {
335 ql_log(ql_log_fatal
, vha
, 0x003c,
336 "Unable to allocate memory for response queue ptrs.\n");
340 * Make sure we record at least the request and response queue zero in
341 * case we need to free them if part of the probe fails.
343 ha
->rsp_q_map
[0] = rsp
;
344 ha
->req_q_map
[0] = req
;
345 set_bit(0, ha
->rsp_qid_map
);
346 set_bit(0, ha
->req_qid_map
);
350 kfree(ha
->req_q_map
);
351 ha
->req_q_map
= NULL
;
356 static void qla2x00_free_req_que(struct qla_hw_data
*ha
, struct req_que
*req
)
358 if (IS_QLAFX00(ha
)) {
359 if (req
&& req
->ring_fx00
)
360 dma_free_coherent(&ha
->pdev
->dev
,
361 (req
->length_fx00
+ 1) * sizeof(request_t
),
362 req
->ring_fx00
, req
->dma_fx00
);
363 } else if (req
&& req
->ring
)
364 dma_free_coherent(&ha
->pdev
->dev
,
365 (req
->length
+ 1) * sizeof(request_t
),
366 req
->ring
, req
->dma
);
369 kfree(req
->outstanding_cmds
);
375 static void qla2x00_free_rsp_que(struct qla_hw_data
*ha
, struct rsp_que
*rsp
)
377 if (IS_QLAFX00(ha
)) {
378 if (rsp
&& rsp
->ring
)
379 dma_free_coherent(&ha
->pdev
->dev
,
380 (rsp
->length_fx00
+ 1) * sizeof(request_t
),
381 rsp
->ring_fx00
, rsp
->dma_fx00
);
382 } else if (rsp
&& rsp
->ring
) {
383 dma_free_coherent(&ha
->pdev
->dev
,
384 (rsp
->length
+ 1) * sizeof(response_t
),
385 rsp
->ring
, rsp
->dma
);
391 static void qla2x00_free_queues(struct qla_hw_data
*ha
)
397 for (cnt
= 0; cnt
< ha
->max_req_queues
; cnt
++) {
398 req
= ha
->req_q_map
[cnt
];
399 qla2x00_free_req_que(ha
, req
);
401 kfree(ha
->req_q_map
);
402 ha
->req_q_map
= NULL
;
404 for (cnt
= 0; cnt
< ha
->max_rsp_queues
; cnt
++) {
405 rsp
= ha
->rsp_q_map
[cnt
];
406 qla2x00_free_rsp_que(ha
, rsp
);
408 kfree(ha
->rsp_q_map
);
409 ha
->rsp_q_map
= NULL
;
412 static int qla25xx_setup_mode(struct scsi_qla_host
*vha
)
414 uint16_t options
= 0;
416 struct qla_hw_data
*ha
= vha
->hw
;
418 if (!(ha
->fw_attributes
& BIT_6
)) {
419 ql_log(ql_log_warn
, vha
, 0x00d8,
420 "Firmware is not multi-queue capable.\n");
423 if (ql2xmultique_tag
) {
424 /* create a request queue for IO */
426 req
= qla25xx_create_req_que(ha
, options
, 0, 0, -1,
427 QLA_DEFAULT_QUE_QOS
);
429 ql_log(ql_log_warn
, vha
, 0x00e0,
430 "Failed to create request queue.\n");
433 ha
->wq
= alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM
, 1);
434 vha
->req
= ha
->req_q_map
[req
];
436 for (ques
= 1; ques
< ha
->max_rsp_queues
; ques
++) {
437 ret
= qla25xx_create_rsp_que(ha
, options
, 0, 0, req
);
439 ql_log(ql_log_warn
, vha
, 0x00e8,
440 "Failed to create response queue.\n");
444 ha
->flags
.cpu_affinity_enabled
= 1;
445 ql_dbg(ql_dbg_multiq
, vha
, 0xc007,
446 "CPU affinity mode enalbed, "
447 "no. of response queues:%d no. of request queues:%d.\n",
448 ha
->max_rsp_queues
, ha
->max_req_queues
);
449 ql_dbg(ql_dbg_init
, vha
, 0x00e9,
450 "CPU affinity mode enalbed, "
451 "no. of response queues:%d no. of request queues:%d.\n",
452 ha
->max_rsp_queues
, ha
->max_req_queues
);
456 qla25xx_delete_queues(vha
);
457 destroy_workqueue(ha
->wq
);
459 vha
->req
= ha
->req_q_map
[0];
462 kfree(ha
->req_q_map
);
463 kfree(ha
->rsp_q_map
);
464 ha
->max_req_queues
= ha
->max_rsp_queues
= 1;
469 qla2x00_pci_info_str(struct scsi_qla_host
*vha
, char *str
)
471 struct qla_hw_data
*ha
= vha
->hw
;
472 static char *pci_bus_modes
[] = {
473 "33", "66", "100", "133",
478 pci_bus
= (ha
->pci_attr
& (BIT_9
| BIT_10
)) >> 9;
481 strcat(str
, pci_bus_modes
[pci_bus
]);
483 pci_bus
= (ha
->pci_attr
& BIT_8
) >> 8;
485 strcat(str
, pci_bus_modes
[pci_bus
]);
487 strcat(str
, " MHz)");
493 qla24xx_pci_info_str(struct scsi_qla_host
*vha
, char *str
)
495 static char *pci_bus_modes
[] = { "33", "66", "100", "133", };
496 struct qla_hw_data
*ha
= vha
->hw
;
499 if (pci_is_pcie(ha
->pdev
)) {
501 uint32_t lstat
, lspeed
, lwidth
;
503 pcie_capability_read_dword(ha
->pdev
, PCI_EXP_LNKCAP
, &lstat
);
504 lspeed
= lstat
& PCI_EXP_LNKCAP_SLS
;
505 lwidth
= (lstat
& PCI_EXP_LNKCAP_MLW
) >> 4;
507 strcpy(str
, "PCIe (");
510 strcat(str
, "2.5GT/s ");
513 strcat(str
, "5.0GT/s ");
516 strcat(str
, "8.0GT/s ");
519 strcat(str
, "<unknown> ");
522 snprintf(lwstr
, sizeof(lwstr
), "x%d)", lwidth
);
529 pci_bus
= (ha
->pci_attr
& CSRX_PCIX_BUS_MODE_MASK
) >> 8;
530 if (pci_bus
== 0 || pci_bus
== 8) {
532 strcat(str
, pci_bus_modes
[pci_bus
>> 3]);
536 strcat(str
, "Mode 2");
538 strcat(str
, "Mode 1");
540 strcat(str
, pci_bus_modes
[pci_bus
& ~BIT_2
]);
542 strcat(str
, " MHz)");
548 qla2x00_fw_version_str(struct scsi_qla_host
*vha
, char *str
)
551 struct qla_hw_data
*ha
= vha
->hw
;
553 sprintf(str
, "%d.%02d.%02d ", ha
->fw_major_version
,
554 ha
->fw_minor_version
,
555 ha
->fw_subminor_version
);
557 if (ha
->fw_attributes
& BIT_9
) {
562 switch (ha
->fw_attributes
& 0xFF) {
576 sprintf(un_str
, "(%x)", ha
->fw_attributes
);
580 if (ha
->fw_attributes
& 0x100)
587 qla24xx_fw_version_str(struct scsi_qla_host
*vha
, char *str
)
589 struct qla_hw_data
*ha
= vha
->hw
;
591 sprintf(str
, "%d.%02d.%02d (%x)", ha
->fw_major_version
,
592 ha
->fw_minor_version
, ha
->fw_subminor_version
, ha
->fw_attributes
);
597 qla2x00_sp_free_dma(void *vha
, void *ptr
)
599 srb_t
*sp
= (srb_t
*)ptr
;
600 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
601 struct qla_hw_data
*ha
= sp
->fcport
->vha
->hw
;
602 void *ctx
= GET_CMD_CTX_SP(sp
);
604 if (sp
->flags
& SRB_DMA_VALID
) {
606 sp
->flags
&= ~SRB_DMA_VALID
;
609 if (sp
->flags
& SRB_CRC_PROT_DMA_VALID
) {
610 dma_unmap_sg(&ha
->pdev
->dev
, scsi_prot_sglist(cmd
),
611 scsi_prot_sg_count(cmd
), cmd
->sc_data_direction
);
612 sp
->flags
&= ~SRB_CRC_PROT_DMA_VALID
;
615 if (sp
->flags
& SRB_CRC_CTX_DSD_VALID
) {
616 /* List assured to be having elements */
617 qla2x00_clean_dsd_pool(ha
, sp
);
618 sp
->flags
&= ~SRB_CRC_CTX_DSD_VALID
;
621 if (sp
->flags
& SRB_CRC_CTX_DMA_VALID
) {
622 dma_pool_free(ha
->dl_dma_pool
, ctx
,
623 ((struct crc_context
*)ctx
)->crc_ctx_dma
);
624 sp
->flags
&= ~SRB_CRC_CTX_DMA_VALID
;
627 if (sp
->flags
& SRB_FCP_CMND_DMA_VALID
) {
628 struct ct6_dsd
*ctx1
= (struct ct6_dsd
*)ctx
;
630 dma_pool_free(ha
->fcp_cmnd_dma_pool
, ctx1
->fcp_cmnd
,
632 list_splice(&ctx1
->dsd_list
, &ha
->gbl_dsd_list
);
633 ha
->gbl_dsd_inuse
-= ctx1
->dsd_use_cnt
;
634 ha
->gbl_dsd_avail
+= ctx1
->dsd_use_cnt
;
635 mempool_free(ctx1
, ha
->ctx_mempool
);
640 qla2x00_rel_sp(sp
->fcport
->vha
, sp
);
644 qla2x00_sp_compl(void *data
, void *ptr
, int res
)
646 struct qla_hw_data
*ha
= (struct qla_hw_data
*)data
;
647 srb_t
*sp
= (srb_t
*)ptr
;
648 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
652 if (atomic_read(&sp
->ref_count
) == 0) {
653 ql_dbg(ql_dbg_io
, sp
->fcport
->vha
, 0x3015,
654 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
656 if (ql2xextended_error_logging
& ql_dbg_io
)
660 if (!atomic_dec_and_test(&sp
->ref_count
))
663 qla2x00_sp_free_dma(ha
, sp
);
667 /* If we are SP1 here, we need to still take and release the host_lock as SP1
668 * does not have the changes necessary to avoid taking host->host_lock.
671 qla2xxx_queuecommand(struct Scsi_Host
*host
, struct scsi_cmnd
*cmd
)
673 scsi_qla_host_t
*vha
= shost_priv(host
);
674 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
675 struct fc_rport
*rport
= starget_to_rport(scsi_target(cmd
->device
));
676 struct qla_hw_data
*ha
= vha
->hw
;
677 struct scsi_qla_host
*base_vha
= pci_get_drvdata(ha
->pdev
);
681 if (ha
->flags
.eeh_busy
) {
682 if (ha
->flags
.pci_channel_io_perm_failure
) {
683 ql_dbg(ql_dbg_aer
, vha
, 0x9010,
684 "PCI Channel IO permanent failure, exiting "
686 cmd
->result
= DID_NO_CONNECT
<< 16;
688 ql_dbg(ql_dbg_aer
, vha
, 0x9011,
689 "EEH_Busy, Requeuing the cmd=%p.\n", cmd
);
690 cmd
->result
= DID_REQUEUE
<< 16;
692 goto qc24_fail_command
;
695 rval
= fc_remote_port_chkready(rport
);
698 ql_dbg(ql_dbg_io
+ ql_dbg_verbose
, vha
, 0x3003,
699 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
701 goto qc24_fail_command
;
704 if (!vha
->flags
.difdix_supported
&&
705 scsi_get_prot_op(cmd
) != SCSI_PROT_NORMAL
) {
706 ql_dbg(ql_dbg_io
, vha
, 0x3004,
707 "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
709 cmd
->result
= DID_NO_CONNECT
<< 16;
710 goto qc24_fail_command
;
714 cmd
->result
= DID_NO_CONNECT
<< 16;
715 goto qc24_fail_command
;
718 if (atomic_read(&fcport
->state
) != FCS_ONLINE
) {
719 if (atomic_read(&fcport
->state
) == FCS_DEVICE_DEAD
||
720 atomic_read(&base_vha
->loop_state
) == LOOP_DEAD
) {
721 ql_dbg(ql_dbg_io
, vha
, 0x3005,
722 "Returning DNC, fcport_state=%d loop_state=%d.\n",
723 atomic_read(&fcport
->state
),
724 atomic_read(&base_vha
->loop_state
));
725 cmd
->result
= DID_NO_CONNECT
<< 16;
726 goto qc24_fail_command
;
728 goto qc24_target_busy
;
731 sp
= qla2x00_get_sp(vha
, fcport
, GFP_ATOMIC
);
735 sp
->u
.scmd
.cmd
= cmd
;
736 sp
->type
= SRB_SCSI_CMD
;
737 atomic_set(&sp
->ref_count
, 1);
738 CMD_SP(cmd
) = (void *)sp
;
739 sp
->free
= qla2x00_sp_free_dma
;
740 sp
->done
= qla2x00_sp_compl
;
742 rval
= ha
->isp_ops
->start_scsi(sp
);
743 if (rval
!= QLA_SUCCESS
) {
744 ql_dbg(ql_dbg_io
+ ql_dbg_verbose
, vha
, 0x3013,
745 "Start scsi failed rval=%d for cmd=%p.\n", rval
, cmd
);
746 goto qc24_host_busy_free_sp
;
751 qc24_host_busy_free_sp
:
752 qla2x00_sp_free_dma(ha
, sp
);
755 return SCSI_MLQUEUE_HOST_BUSY
;
758 return SCSI_MLQUEUE_TARGET_BUSY
;
767 * qla2x00_eh_wait_on_command
768 * Waits for the command to be returned by the Firmware for some
772 * cmd = Scsi Command to wait on.
779 qla2x00_eh_wait_on_command(struct scsi_cmnd
*cmd
)
781 #define ABORT_POLLING_PERIOD 1000
782 #define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
783 unsigned long wait_iter
= ABORT_WAIT_ITER
;
784 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
785 struct qla_hw_data
*ha
= vha
->hw
;
786 int ret
= QLA_SUCCESS
;
788 if (unlikely(pci_channel_offline(ha
->pdev
)) || ha
->flags
.eeh_busy
) {
789 ql_dbg(ql_dbg_taskm
, vha
, 0x8005,
790 "Return:eh_wait.\n");
794 while (CMD_SP(cmd
) && wait_iter
--) {
795 msleep(ABORT_POLLING_PERIOD
);
798 ret
= QLA_FUNCTION_FAILED
;
804 * qla2x00_wait_for_hba_online
805 * Wait till the HBA is online after going through
806 * <= MAX_RETRIES_OF_ISP_ABORT or
807 * finally HBA is disabled ie marked offline
810 * ha - pointer to host adapter structure
813 * Does context switching-Release SPIN_LOCK
814 * (if any) before calling this routine.
817 * Success (Adapter is online) : 0
818 * Failed (Adapter is offline/disabled) : 1
821 qla2x00_wait_for_hba_online(scsi_qla_host_t
*vha
)
824 unsigned long wait_online
;
825 struct qla_hw_data
*ha
= vha
->hw
;
826 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
828 wait_online
= jiffies
+ (MAX_LOOP_TIMEOUT
* HZ
);
829 while (((test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) ||
830 test_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
) ||
831 test_bit(ISP_ABORT_RETRY
, &base_vha
->dpc_flags
) ||
832 ha
->dpc_active
) && time_before(jiffies
, wait_online
)) {
836 if (base_vha
->flags
.online
)
837 return_status
= QLA_SUCCESS
;
839 return_status
= QLA_FUNCTION_FAILED
;
841 return (return_status
);
845 * qla2x00_wait_for_reset_ready
846 * Wait till the HBA is online after going through
847 * <= MAX_RETRIES_OF_ISP_ABORT or
848 * finally HBA is disabled ie marked offline or flash
849 * operations are in progress.
852 * ha - pointer to host adapter structure
855 * Does context switching-Release SPIN_LOCK
856 * (if any) before calling this routine.
859 * Success (Adapter is online/no flash ops) : 0
860 * Failed (Adapter is offline/disabled/flash ops in progress) : 1
863 qla2x00_wait_for_reset_ready(scsi_qla_host_t
*vha
)
866 unsigned long wait_online
;
867 struct qla_hw_data
*ha
= vha
->hw
;
868 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
870 wait_online
= jiffies
+ (MAX_LOOP_TIMEOUT
* HZ
);
871 while (((test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) ||
872 test_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
) ||
873 test_bit(ISP_ABORT_RETRY
, &base_vha
->dpc_flags
) ||
874 ha
->optrom_state
!= QLA_SWAITING
||
875 ha
->dpc_active
) && time_before(jiffies
, wait_online
))
878 if (base_vha
->flags
.online
&& ha
->optrom_state
== QLA_SWAITING
)
879 return_status
= QLA_SUCCESS
;
881 return_status
= QLA_FUNCTION_FAILED
;
883 ql_dbg(ql_dbg_taskm
, vha
, 0x8019,
884 "%s return status=%d.\n", __func__
, return_status
);
886 return return_status
;
890 qla2x00_wait_for_chip_reset(scsi_qla_host_t
*vha
)
893 unsigned long wait_reset
;
894 struct qla_hw_data
*ha
= vha
->hw
;
895 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
897 wait_reset
= jiffies
+ (MAX_LOOP_TIMEOUT
* HZ
);
898 while (((test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) ||
899 test_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
) ||
900 test_bit(ISP_ABORT_RETRY
, &base_vha
->dpc_flags
) ||
901 ha
->dpc_active
) && time_before(jiffies
, wait_reset
)) {
905 if (!test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
) &&
906 ha
->flags
.chip_reset_done
)
909 if (ha
->flags
.chip_reset_done
)
910 return_status
= QLA_SUCCESS
;
912 return_status
= QLA_FUNCTION_FAILED
;
914 return return_status
;
918 sp_get(struct srb
*sp
)
920 atomic_inc(&sp
->ref_count
);
923 /**************************************************************************
927 * The abort function will abort the specified command.
930 * cmd = Linux SCSI command packet to be aborted.
933 * Either SUCCESS or FAILED.
936 * Only return FAILED if command not returned by firmware.
937 **************************************************************************/
939 qla2xxx_eh_abort(struct scsi_cmnd
*cmd
)
941 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
944 unsigned int id
, lun
;
947 struct qla_hw_data
*ha
= vha
->hw
;
952 ret
= fc_block_scsi_eh(cmd
);
957 id
= cmd
->device
->id
;
958 lun
= cmd
->device
->lun
;
960 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
961 sp
= (srb_t
*) CMD_SP(cmd
);
963 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
967 ql_dbg(ql_dbg_taskm
, vha
, 0x8002,
968 "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
969 vha
->host_no
, id
, lun
, sp
, cmd
);
971 /* Get a reference to the sp and drop the lock.*/
974 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
975 if (ha
->isp_ops
->abort_command(sp
)) {
977 ql_dbg(ql_dbg_taskm
, vha
, 0x8003,
978 "Abort command mbx failed cmd=%p.\n", cmd
);
980 ql_dbg(ql_dbg_taskm
, vha
, 0x8004,
981 "Abort command mbx success cmd=%p.\n", cmd
);
985 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
987 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
989 /* Did the command return during mailbox execution? */
990 if (ret
== FAILED
&& !CMD_SP(cmd
))
993 /* Wait for the command to be returned. */
995 if (qla2x00_eh_wait_on_command(cmd
) != QLA_SUCCESS
) {
996 ql_log(ql_log_warn
, vha
, 0x8006,
997 "Abort handler timed out cmd=%p.\n", cmd
);
1002 ql_log(ql_log_info
, vha
, 0x801c,
1003 "Abort command issued nexus=%ld:%d:%d -- %d %x.\n",
1004 vha
->host_no
, id
, lun
, wait
, ret
);
1010 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t
*vha
, unsigned int t
,
1011 unsigned int l
, enum nexus_wait_type type
)
1013 int cnt
, match
, status
;
1014 unsigned long flags
;
1015 struct qla_hw_data
*ha
= vha
->hw
;
1016 struct req_que
*req
;
1018 struct scsi_cmnd
*cmd
;
1020 status
= QLA_SUCCESS
;
1022 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1024 for (cnt
= 1; status
== QLA_SUCCESS
&&
1025 cnt
< req
->num_outstanding_cmds
; cnt
++) {
1026 sp
= req
->outstanding_cmds
[cnt
];
1029 if (sp
->type
!= SRB_SCSI_CMD
)
1031 if (vha
->vp_idx
!= sp
->fcport
->vha
->vp_idx
)
1034 cmd
= GET_CMD_SP(sp
);
1040 match
= cmd
->device
->id
== t
;
1043 match
= (cmd
->device
->id
== t
&&
1044 cmd
->device
->lun
== l
);
1050 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1051 status
= qla2x00_eh_wait_on_command(cmd
);
1052 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1054 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1059 static char *reset_errors
[] = {
1062 "Task management failed",
1063 "Waiting for command completions",
1067 __qla2xxx_eh_generic_reset(char *name
, enum nexus_wait_type type
,
1068 struct scsi_cmnd
*cmd
, int (*do_reset
)(struct fc_port
*, unsigned int, int))
1070 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1071 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
1078 err
= fc_block_scsi_eh(cmd
);
1082 ql_log(ql_log_info
, vha
, 0x8009,
1083 "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name
, vha
->host_no
,
1084 cmd
->device
->id
, cmd
->device
->lun
, cmd
);
1087 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1088 ql_log(ql_log_warn
, vha
, 0x800a,
1089 "Wait for hba online failed for cmd=%p.\n", cmd
);
1090 goto eh_reset_failed
;
1093 if (do_reset(fcport
, cmd
->device
->lun
, cmd
->request
->cpu
+ 1)
1095 ql_log(ql_log_warn
, vha
, 0x800c,
1096 "do_reset failed for cmd=%p.\n", cmd
);
1097 goto eh_reset_failed
;
1100 if (qla2x00_eh_wait_for_pending_commands(vha
, cmd
->device
->id
,
1101 cmd
->device
->lun
, type
) != QLA_SUCCESS
) {
1102 ql_log(ql_log_warn
, vha
, 0x800d,
1103 "wait for pending cmds failed for cmd=%p.\n", cmd
);
1104 goto eh_reset_failed
;
1107 ql_log(ql_log_info
, vha
, 0x800e,
1108 "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name
,
1109 vha
->host_no
, cmd
->device
->id
, cmd
->device
->lun
, cmd
);
1114 ql_log(ql_log_info
, vha
, 0x800f,
1115 "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name
,
1116 reset_errors
[err
], vha
->host_no
, cmd
->device
->id
, cmd
->device
->lun
,
1122 qla2xxx_eh_device_reset(struct scsi_cmnd
*cmd
)
1124 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1125 struct qla_hw_data
*ha
= vha
->hw
;
1127 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN
, cmd
,
1128 ha
->isp_ops
->lun_reset
);
1132 qla2xxx_eh_target_reset(struct scsi_cmnd
*cmd
)
1134 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1135 struct qla_hw_data
*ha
= vha
->hw
;
1137 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET
, cmd
,
1138 ha
->isp_ops
->target_reset
);
1141 /**************************************************************************
1142 * qla2xxx_eh_bus_reset
1145 * The bus reset function will reset the bus and abort any executing
1149 * cmd = Linux SCSI command packet of the command that cause the
1153 * SUCCESS/FAILURE (defined as macro in scsi.h).
1155 **************************************************************************/
1157 qla2xxx_eh_bus_reset(struct scsi_cmnd
*cmd
)
1159 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1160 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
1162 unsigned int id
, lun
;
1164 id
= cmd
->device
->id
;
1165 lun
= cmd
->device
->lun
;
1171 ret
= fc_block_scsi_eh(cmd
);
1176 ql_log(ql_log_info
, vha
, 0x8012,
1177 "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha
->host_no
, id
, lun
);
1179 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1180 ql_log(ql_log_fatal
, vha
, 0x8013,
1181 "Wait for hba online failed board disabled.\n");
1182 goto eh_bus_reset_done
;
1185 if (qla2x00_loop_reset(vha
) == QLA_SUCCESS
)
1189 goto eh_bus_reset_done
;
1191 /* Flush outstanding commands. */
1192 if (qla2x00_eh_wait_for_pending_commands(vha
, 0, 0, WAIT_HOST
) !=
1194 ql_log(ql_log_warn
, vha
, 0x8014,
1195 "Wait for pending commands failed.\n");
1200 ql_log(ql_log_warn
, vha
, 0x802b,
1201 "BUS RESET %s nexus=%ld:%d:%d.\n",
1202 (ret
== FAILED
) ? "FAILED" : "SUCCEEDED", vha
->host_no
, id
, lun
);
1207 /**************************************************************************
1208 * qla2xxx_eh_host_reset
1211 * The reset function will reset the Adapter.
1214 * cmd = Linux SCSI command packet of the command that cause the
1218 * Either SUCCESS or FAILED.
1221 **************************************************************************/
1223 qla2xxx_eh_host_reset(struct scsi_cmnd
*cmd
)
1225 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1226 struct qla_hw_data
*ha
= vha
->hw
;
1228 unsigned int id
, lun
;
1229 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
1231 id
= cmd
->device
->id
;
1232 lun
= cmd
->device
->lun
;
1234 ql_log(ql_log_info
, vha
, 0x8018,
1235 "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha
->host_no
, id
, lun
);
1237 if (qla2x00_wait_for_reset_ready(vha
) != QLA_SUCCESS
)
1238 goto eh_host_reset_lock
;
1240 if (vha
!= base_vha
) {
1241 if (qla2x00_vp_abort_isp(vha
))
1242 goto eh_host_reset_lock
;
1244 if (IS_P3P_TYPE(vha
->hw
)) {
1245 if (!qla82xx_fcoe_ctx_reset(vha
)) {
1246 /* Ctx reset success */
1248 goto eh_host_reset_lock
;
1250 /* fall thru if ctx reset failed */
1253 flush_workqueue(ha
->wq
);
1255 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1256 if (ha
->isp_ops
->abort_isp(base_vha
)) {
1257 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1258 /* failed. schedule dpc to try */
1259 set_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
);
1261 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1262 ql_log(ql_log_warn
, vha
, 0x802a,
1263 "wait for hba online failed.\n");
1264 goto eh_host_reset_lock
;
1267 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1270 /* Waiting for command to be returned to OS.*/
1271 if (qla2x00_eh_wait_for_pending_commands(vha
, 0, 0, WAIT_HOST
) ==
1276 ql_log(ql_log_info
, vha
, 0x8017,
1277 "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
1278 (ret
== FAILED
) ? "FAILED" : "SUCCEEDED", vha
->host_no
, id
, lun
);
1284 * qla2x00_loop_reset
1288 * ha = adapter block pointer.
1294 qla2x00_loop_reset(scsi_qla_host_t
*vha
)
1297 struct fc_port
*fcport
;
1298 struct qla_hw_data
*ha
= vha
->hw
;
1300 if (IS_QLAFX00(ha
)) {
1301 return qlafx00_loop_reset(vha
);
1304 if (ql2xtargetreset
== 1 && ha
->flags
.enable_target_reset
) {
1305 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
1306 if (fcport
->port_type
!= FCT_TARGET
)
1309 ret
= ha
->isp_ops
->target_reset(fcport
, 0, 0);
1310 if (ret
!= QLA_SUCCESS
) {
1311 ql_dbg(ql_dbg_taskm
, vha
, 0x802c,
1312 "Bus Reset failed: Reset=%d "
1313 "d_id=%x.\n", ret
, fcport
->d_id
.b24
);
1319 if (ha
->flags
.enable_lip_full_login
&& !IS_CNA_CAPABLE(ha
)) {
1320 atomic_set(&vha
->loop_state
, LOOP_DOWN
);
1321 atomic_set(&vha
->loop_down_timer
, LOOP_DOWN_TIME
);
1322 qla2x00_mark_all_devices_lost(vha
, 0);
1323 ret
= qla2x00_full_login_lip(vha
);
1324 if (ret
!= QLA_SUCCESS
) {
1325 ql_dbg(ql_dbg_taskm
, vha
, 0x802d,
1326 "full_login_lip=%d.\n", ret
);
1330 if (ha
->flags
.enable_lip_reset
) {
1331 ret
= qla2x00_lip_reset(vha
);
1332 if (ret
!= QLA_SUCCESS
)
1333 ql_dbg(ql_dbg_taskm
, vha
, 0x802e,
1334 "lip_reset failed (%d).\n", ret
);
1337 /* Issue marker command only when we are going to start the I/O */
1338 vha
->marker_needed
= 1;
1344 qla2x00_abort_all_cmds(scsi_qla_host_t
*vha
, int res
)
1347 unsigned long flags
;
1349 struct qla_hw_data
*ha
= vha
->hw
;
1350 struct req_que
*req
;
1352 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1353 for (que
= 0; que
< ha
->max_req_queues
; que
++) {
1354 req
= ha
->req_q_map
[que
];
1357 if (!req
->outstanding_cmds
)
1359 for (cnt
= 1; cnt
< req
->num_outstanding_cmds
; cnt
++) {
1360 sp
= req
->outstanding_cmds
[cnt
];
1362 req
->outstanding_cmds
[cnt
] = NULL
;
1363 sp
->done(vha
, sp
, res
);
1367 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1371 qla2xxx_slave_alloc(struct scsi_device
*sdev
)
1373 struct fc_rport
*rport
= starget_to_rport(scsi_target(sdev
));
1375 if (!rport
|| fc_remote_port_chkready(rport
))
1378 sdev
->hostdata
= *(fc_port_t
**)rport
->dd_data
;
1384 qla2xxx_slave_configure(struct scsi_device
*sdev
)
1386 scsi_qla_host_t
*vha
= shost_priv(sdev
->host
);
1387 struct req_que
*req
= vha
->req
;
1389 if (IS_T10_PI_CAPABLE(vha
->hw
))
1390 blk_queue_update_dma_alignment(sdev
->request_queue
, 0x7);
1392 if (sdev
->tagged_supported
)
1393 scsi_activate_tcq(sdev
, req
->max_q_depth
);
1395 scsi_deactivate_tcq(sdev
, req
->max_q_depth
);
1400 qla2xxx_slave_destroy(struct scsi_device
*sdev
)
1402 sdev
->hostdata
= NULL
;
1405 static void qla2x00_handle_queue_full(struct scsi_device
*sdev
, int qdepth
)
1407 fc_port_t
*fcport
= (struct fc_port
*) sdev
->hostdata
;
1409 if (!scsi_track_queue_full(sdev
, qdepth
))
1412 ql_dbg(ql_dbg_io
, fcport
->vha
, 0x3029,
1413 "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
1414 sdev
->queue_depth
, fcport
->vha
->host_no
, sdev
->id
, sdev
->lun
);
1417 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device
*sdev
, int qdepth
)
1419 fc_port_t
*fcport
= sdev
->hostdata
;
1420 struct scsi_qla_host
*vha
= fcport
->vha
;
1421 struct req_que
*req
= NULL
;
1427 if (req
->max_q_depth
<= sdev
->queue_depth
|| req
->max_q_depth
< qdepth
)
1430 if (sdev
->ordered_tags
)
1431 scsi_adjust_queue_depth(sdev
, MSG_ORDERED_TAG
, qdepth
);
1433 scsi_adjust_queue_depth(sdev
, MSG_SIMPLE_TAG
, qdepth
);
1435 ql_dbg(ql_dbg_io
, vha
, 0x302a,
1436 "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
1437 sdev
->queue_depth
, fcport
->vha
->host_no
, sdev
->id
, sdev
->lun
);
1441 qla2x00_change_queue_depth(struct scsi_device
*sdev
, int qdepth
, int reason
)
1444 case SCSI_QDEPTH_DEFAULT
:
1445 scsi_adjust_queue_depth(sdev
, scsi_get_tag_type(sdev
), qdepth
);
1447 case SCSI_QDEPTH_QFULL
:
1448 qla2x00_handle_queue_full(sdev
, qdepth
);
1450 case SCSI_QDEPTH_RAMP_UP
:
1451 qla2x00_adjust_sdev_qdepth_up(sdev
, qdepth
);
1457 return sdev
->queue_depth
;
1461 qla2x00_change_queue_type(struct scsi_device
*sdev
, int tag_type
)
1463 if (sdev
->tagged_supported
) {
1464 scsi_set_tag_type(sdev
, tag_type
);
1466 scsi_activate_tcq(sdev
, sdev
->queue_depth
);
1468 scsi_deactivate_tcq(sdev
, sdev
->queue_depth
);
1476 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1479 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1480 * supported addressing method.
1483 qla2x00_config_dma_addressing(struct qla_hw_data
*ha
)
1485 /* Assume a 32bit DMA mask. */
1486 ha
->flags
.enable_64bit_addressing
= 0;
1488 if (!dma_set_mask(&ha
->pdev
->dev
, DMA_BIT_MASK(64))) {
1489 /* Any upper-dword bits set? */
1490 if (MSD(dma_get_required_mask(&ha
->pdev
->dev
)) &&
1491 !pci_set_consistent_dma_mask(ha
->pdev
, DMA_BIT_MASK(64))) {
1492 /* Ok, a 64bit DMA mask is applicable. */
1493 ha
->flags
.enable_64bit_addressing
= 1;
1494 ha
->isp_ops
->calc_req_entries
= qla2x00_calc_iocbs_64
;
1495 ha
->isp_ops
->build_iocbs
= qla2x00_build_scsi_iocbs_64
;
1500 dma_set_mask(&ha
->pdev
->dev
, DMA_BIT_MASK(32));
1501 pci_set_consistent_dma_mask(ha
->pdev
, DMA_BIT_MASK(32));
1505 qla2x00_enable_intrs(struct qla_hw_data
*ha
)
1507 unsigned long flags
= 0;
1508 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
1510 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1511 ha
->interrupts_on
= 1;
1512 /* enable risc and host interrupts */
1513 WRT_REG_WORD(®
->ictrl
, ICR_EN_INT
| ICR_EN_RISC
);
1514 RD_REG_WORD(®
->ictrl
);
1515 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1520 qla2x00_disable_intrs(struct qla_hw_data
*ha
)
1522 unsigned long flags
= 0;
1523 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
1525 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1526 ha
->interrupts_on
= 0;
1527 /* disable risc and host interrupts */
1528 WRT_REG_WORD(®
->ictrl
, 0);
1529 RD_REG_WORD(®
->ictrl
);
1530 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1534 qla24xx_enable_intrs(struct qla_hw_data
*ha
)
1536 unsigned long flags
= 0;
1537 struct device_reg_24xx __iomem
*reg
= &ha
->iobase
->isp24
;
1539 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1540 ha
->interrupts_on
= 1;
1541 WRT_REG_DWORD(®
->ictrl
, ICRX_EN_RISC_INT
);
1542 RD_REG_DWORD(®
->ictrl
);
1543 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1547 qla24xx_disable_intrs(struct qla_hw_data
*ha
)
1549 unsigned long flags
= 0;
1550 struct device_reg_24xx __iomem
*reg
= &ha
->iobase
->isp24
;
1552 if (IS_NOPOLLING_TYPE(ha
))
1554 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1555 ha
->interrupts_on
= 0;
1556 WRT_REG_DWORD(®
->ictrl
, 0);
1557 RD_REG_DWORD(®
->ictrl
);
1558 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1562 qla2x00_iospace_config(struct qla_hw_data
*ha
)
1564 resource_size_t pio
;
1568 if (pci_request_selected_regions(ha
->pdev
, ha
->bars
,
1569 QLA2XXX_DRIVER_NAME
)) {
1570 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0011,
1571 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1572 pci_name(ha
->pdev
));
1573 goto iospace_error_exit
;
1575 if (!(ha
->bars
& 1))
1578 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1579 pio
= pci_resource_start(ha
->pdev
, 0);
1580 if (pci_resource_flags(ha
->pdev
, 0) & IORESOURCE_IO
) {
1581 if (pci_resource_len(ha
->pdev
, 0) < MIN_IOBASE_LEN
) {
1582 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0012,
1583 "Invalid pci I/O region size (%s).\n",
1584 pci_name(ha
->pdev
));
1588 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0013,
1589 "Region #0 no a PIO resource (%s).\n",
1590 pci_name(ha
->pdev
));
1593 ha
->pio_address
= pio
;
1594 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0014,
1595 "PIO address=%llu.\n",
1596 (unsigned long long)ha
->pio_address
);
1599 /* Use MMIO operations for all accesses. */
1600 if (!(pci_resource_flags(ha
->pdev
, 1) & IORESOURCE_MEM
)) {
1601 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0015,
1602 "Region #1 not an MMIO resource (%s), aborting.\n",
1603 pci_name(ha
->pdev
));
1604 goto iospace_error_exit
;
1606 if (pci_resource_len(ha
->pdev
, 1) < MIN_IOBASE_LEN
) {
1607 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0016,
1608 "Invalid PCI mem region size (%s), aborting.\n",
1609 pci_name(ha
->pdev
));
1610 goto iospace_error_exit
;
1613 ha
->iobase
= ioremap(pci_resource_start(ha
->pdev
, 1), MIN_IOBASE_LEN
);
1615 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0017,
1616 "Cannot remap MMIO (%s), aborting.\n",
1617 pci_name(ha
->pdev
));
1618 goto iospace_error_exit
;
1621 /* Determine queue resources */
1622 ha
->max_req_queues
= ha
->max_rsp_queues
= 1;
1623 if ((ql2xmaxqueues
<= 1 && !ql2xmultique_tag
) ||
1624 (ql2xmaxqueues
> 1 && ql2xmultique_tag
) ||
1625 (!IS_QLA25XX(ha
) && !IS_QLA81XX(ha
)))
1628 ha
->mqiobase
= ioremap(pci_resource_start(ha
->pdev
, 3),
1629 pci_resource_len(ha
->pdev
, 3));
1631 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0018,
1632 "MQIO Base=%p.\n", ha
->mqiobase
);
1633 /* Read MSIX vector size of the board */
1634 pci_read_config_word(ha
->pdev
, QLA_PCI_MSIX_CONTROL
, &msix
);
1635 ha
->msix_count
= msix
;
1636 /* Max queues are bounded by available msix vectors */
1637 /* queue 0 uses two msix vectors */
1638 if (ql2xmultique_tag
) {
1639 cpus
= num_online_cpus();
1640 ha
->max_rsp_queues
= (ha
->msix_count
- 1 > cpus
) ?
1641 (cpus
+ 1) : (ha
->msix_count
- 1);
1642 ha
->max_req_queues
= 2;
1643 } else if (ql2xmaxqueues
> 1) {
1644 ha
->max_req_queues
= ql2xmaxqueues
> QLA_MQ_SIZE
?
1645 QLA_MQ_SIZE
: ql2xmaxqueues
;
1646 ql_dbg_pci(ql_dbg_multiq
, ha
->pdev
, 0xc008,
1647 "QoS mode set, max no of request queues:%d.\n",
1648 ha
->max_req_queues
);
1649 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0019,
1650 "QoS mode set, max no of request queues:%d.\n",
1651 ha
->max_req_queues
);
1653 ql_log_pci(ql_log_info
, ha
->pdev
, 0x001a,
1654 "MSI-X vector count: %d.\n", msix
);
1656 ql_log_pci(ql_log_info
, ha
->pdev
, 0x001b,
1657 "BAR 3 not enabled.\n");
1660 ha
->msix_count
= ha
->max_rsp_queues
+ 1;
1661 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x001c,
1662 "MSIX Count:%d.\n", ha
->msix_count
);
1671 qla83xx_iospace_config(struct qla_hw_data
*ha
)
1676 if (pci_request_selected_regions(ha
->pdev
, ha
->bars
,
1677 QLA2XXX_DRIVER_NAME
)) {
1678 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0117,
1679 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1680 pci_name(ha
->pdev
));
1682 goto iospace_error_exit
;
1685 /* Use MMIO operations for all accesses. */
1686 if (!(pci_resource_flags(ha
->pdev
, 0) & IORESOURCE_MEM
)) {
1687 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0118,
1688 "Invalid pci I/O region size (%s).\n",
1689 pci_name(ha
->pdev
));
1690 goto iospace_error_exit
;
1692 if (pci_resource_len(ha
->pdev
, 0) < MIN_IOBASE_LEN
) {
1693 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0119,
1694 "Invalid PCI mem region size (%s), aborting\n",
1695 pci_name(ha
->pdev
));
1696 goto iospace_error_exit
;
1699 ha
->iobase
= ioremap(pci_resource_start(ha
->pdev
, 0), MIN_IOBASE_LEN
);
1701 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x011a,
1702 "Cannot remap MMIO (%s), aborting.\n",
1703 pci_name(ha
->pdev
));
1704 goto iospace_error_exit
;
1707 /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1708 /* 83XX 26XX always use MQ type access for queues
1709 * - mbar 2, a.k.a region 4 */
1710 ha
->max_req_queues
= ha
->max_rsp_queues
= 1;
1711 ha
->mqiobase
= ioremap(pci_resource_start(ha
->pdev
, 4),
1712 pci_resource_len(ha
->pdev
, 4));
1714 if (!ha
->mqiobase
) {
1715 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x011d,
1716 "BAR2/region4 not enabled\n");
1720 ha
->msixbase
= ioremap(pci_resource_start(ha
->pdev
, 2),
1721 pci_resource_len(ha
->pdev
, 2));
1723 /* Read MSIX vector size of the board */
1724 pci_read_config_word(ha
->pdev
,
1725 QLA_83XX_PCI_MSIX_CONTROL
, &msix
);
1726 ha
->msix_count
= msix
;
1727 /* Max queues are bounded by available msix vectors */
1728 /* queue 0 uses two msix vectors */
1729 if (ql2xmultique_tag
) {
1730 cpus
= num_online_cpus();
1731 ha
->max_rsp_queues
= (ha
->msix_count
- 1 > cpus
) ?
1732 (cpus
+ 1) : (ha
->msix_count
- 1);
1733 ha
->max_req_queues
= 2;
1734 } else if (ql2xmaxqueues
> 1) {
1735 ha
->max_req_queues
= ql2xmaxqueues
> QLA_MQ_SIZE
?
1736 QLA_MQ_SIZE
: ql2xmaxqueues
;
1737 ql_dbg_pci(ql_dbg_multiq
, ha
->pdev
, 0xc00c,
1738 "QoS mode set, max no of request queues:%d.\n",
1739 ha
->max_req_queues
);
1740 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x011b,
1741 "QoS mode set, max no of request queues:%d.\n",
1742 ha
->max_req_queues
);
1744 ql_log_pci(ql_log_info
, ha
->pdev
, 0x011c,
1745 "MSI-X vector count: %d.\n", msix
);
1747 ql_log_pci(ql_log_info
, ha
->pdev
, 0x011e,
1748 "BAR 1 not enabled.\n");
1751 ha
->msix_count
= ha
->max_rsp_queues
+ 1;
1753 qlt_83xx_iospace_config(ha
);
1755 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x011f,
1756 "MSIX Count:%d.\n", ha
->msix_count
);
1763 static struct isp_operations qla2100_isp_ops
= {
1764 .pci_config
= qla2100_pci_config
,
1765 .reset_chip
= qla2x00_reset_chip
,
1766 .chip_diag
= qla2x00_chip_diag
,
1767 .config_rings
= qla2x00_config_rings
,
1768 .reset_adapter
= qla2x00_reset_adapter
,
1769 .nvram_config
= qla2x00_nvram_config
,
1770 .update_fw_options
= qla2x00_update_fw_options
,
1771 .load_risc
= qla2x00_load_risc
,
1772 .pci_info_str
= qla2x00_pci_info_str
,
1773 .fw_version_str
= qla2x00_fw_version_str
,
1774 .intr_handler
= qla2100_intr_handler
,
1775 .enable_intrs
= qla2x00_enable_intrs
,
1776 .disable_intrs
= qla2x00_disable_intrs
,
1777 .abort_command
= qla2x00_abort_command
,
1778 .target_reset
= qla2x00_abort_target
,
1779 .lun_reset
= qla2x00_lun_reset
,
1780 .fabric_login
= qla2x00_login_fabric
,
1781 .fabric_logout
= qla2x00_fabric_logout
,
1782 .calc_req_entries
= qla2x00_calc_iocbs_32
,
1783 .build_iocbs
= qla2x00_build_scsi_iocbs_32
,
1784 .prep_ms_iocb
= qla2x00_prep_ms_iocb
,
1785 .prep_ms_fdmi_iocb
= qla2x00_prep_ms_fdmi_iocb
,
1786 .read_nvram
= qla2x00_read_nvram_data
,
1787 .write_nvram
= qla2x00_write_nvram_data
,
1788 .fw_dump
= qla2100_fw_dump
,
1791 .beacon_blink
= NULL
,
1792 .read_optrom
= qla2x00_read_optrom_data
,
1793 .write_optrom
= qla2x00_write_optrom_data
,
1794 .get_flash_version
= qla2x00_get_flash_version
,
1795 .start_scsi
= qla2x00_start_scsi
,
1796 .abort_isp
= qla2x00_abort_isp
,
1797 .iospace_config
= qla2x00_iospace_config
,
1798 .initialize_adapter
= qla2x00_initialize_adapter
,
1801 static struct isp_operations qla2300_isp_ops
= {
1802 .pci_config
= qla2300_pci_config
,
1803 .reset_chip
= qla2x00_reset_chip
,
1804 .chip_diag
= qla2x00_chip_diag
,
1805 .config_rings
= qla2x00_config_rings
,
1806 .reset_adapter
= qla2x00_reset_adapter
,
1807 .nvram_config
= qla2x00_nvram_config
,
1808 .update_fw_options
= qla2x00_update_fw_options
,
1809 .load_risc
= qla2x00_load_risc
,
1810 .pci_info_str
= qla2x00_pci_info_str
,
1811 .fw_version_str
= qla2x00_fw_version_str
,
1812 .intr_handler
= qla2300_intr_handler
,
1813 .enable_intrs
= qla2x00_enable_intrs
,
1814 .disable_intrs
= qla2x00_disable_intrs
,
1815 .abort_command
= qla2x00_abort_command
,
1816 .target_reset
= qla2x00_abort_target
,
1817 .lun_reset
= qla2x00_lun_reset
,
1818 .fabric_login
= qla2x00_login_fabric
,
1819 .fabric_logout
= qla2x00_fabric_logout
,
1820 .calc_req_entries
= qla2x00_calc_iocbs_32
,
1821 .build_iocbs
= qla2x00_build_scsi_iocbs_32
,
1822 .prep_ms_iocb
= qla2x00_prep_ms_iocb
,
1823 .prep_ms_fdmi_iocb
= qla2x00_prep_ms_fdmi_iocb
,
1824 .read_nvram
= qla2x00_read_nvram_data
,
1825 .write_nvram
= qla2x00_write_nvram_data
,
1826 .fw_dump
= qla2300_fw_dump
,
1827 .beacon_on
= qla2x00_beacon_on
,
1828 .beacon_off
= qla2x00_beacon_off
,
1829 .beacon_blink
= qla2x00_beacon_blink
,
1830 .read_optrom
= qla2x00_read_optrom_data
,
1831 .write_optrom
= qla2x00_write_optrom_data
,
1832 .get_flash_version
= qla2x00_get_flash_version
,
1833 .start_scsi
= qla2x00_start_scsi
,
1834 .abort_isp
= qla2x00_abort_isp
,
1835 .iospace_config
= qla2x00_iospace_config
,
1836 .initialize_adapter
= qla2x00_initialize_adapter
,
1839 static struct isp_operations qla24xx_isp_ops
= {
1840 .pci_config
= qla24xx_pci_config
,
1841 .reset_chip
= qla24xx_reset_chip
,
1842 .chip_diag
= qla24xx_chip_diag
,
1843 .config_rings
= qla24xx_config_rings
,
1844 .reset_adapter
= qla24xx_reset_adapter
,
1845 .nvram_config
= qla24xx_nvram_config
,
1846 .update_fw_options
= qla24xx_update_fw_options
,
1847 .load_risc
= qla24xx_load_risc
,
1848 .pci_info_str
= qla24xx_pci_info_str
,
1849 .fw_version_str
= qla24xx_fw_version_str
,
1850 .intr_handler
= qla24xx_intr_handler
,
1851 .enable_intrs
= qla24xx_enable_intrs
,
1852 .disable_intrs
= qla24xx_disable_intrs
,
1853 .abort_command
= qla24xx_abort_command
,
1854 .target_reset
= qla24xx_abort_target
,
1855 .lun_reset
= qla24xx_lun_reset
,
1856 .fabric_login
= qla24xx_login_fabric
,
1857 .fabric_logout
= qla24xx_fabric_logout
,
1858 .calc_req_entries
= NULL
,
1859 .build_iocbs
= NULL
,
1860 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
1861 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
1862 .read_nvram
= qla24xx_read_nvram_data
,
1863 .write_nvram
= qla24xx_write_nvram_data
,
1864 .fw_dump
= qla24xx_fw_dump
,
1865 .beacon_on
= qla24xx_beacon_on
,
1866 .beacon_off
= qla24xx_beacon_off
,
1867 .beacon_blink
= qla24xx_beacon_blink
,
1868 .read_optrom
= qla24xx_read_optrom_data
,
1869 .write_optrom
= qla24xx_write_optrom_data
,
1870 .get_flash_version
= qla24xx_get_flash_version
,
1871 .start_scsi
= qla24xx_start_scsi
,
1872 .abort_isp
= qla2x00_abort_isp
,
1873 .iospace_config
= qla2x00_iospace_config
,
1874 .initialize_adapter
= qla2x00_initialize_adapter
,
1877 static struct isp_operations qla25xx_isp_ops
= {
1878 .pci_config
= qla25xx_pci_config
,
1879 .reset_chip
= qla24xx_reset_chip
,
1880 .chip_diag
= qla24xx_chip_diag
,
1881 .config_rings
= qla24xx_config_rings
,
1882 .reset_adapter
= qla24xx_reset_adapter
,
1883 .nvram_config
= qla24xx_nvram_config
,
1884 .update_fw_options
= qla24xx_update_fw_options
,
1885 .load_risc
= qla24xx_load_risc
,
1886 .pci_info_str
= qla24xx_pci_info_str
,
1887 .fw_version_str
= qla24xx_fw_version_str
,
1888 .intr_handler
= qla24xx_intr_handler
,
1889 .enable_intrs
= qla24xx_enable_intrs
,
1890 .disable_intrs
= qla24xx_disable_intrs
,
1891 .abort_command
= qla24xx_abort_command
,
1892 .target_reset
= qla24xx_abort_target
,
1893 .lun_reset
= qla24xx_lun_reset
,
1894 .fabric_login
= qla24xx_login_fabric
,
1895 .fabric_logout
= qla24xx_fabric_logout
,
1896 .calc_req_entries
= NULL
,
1897 .build_iocbs
= NULL
,
1898 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
1899 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
1900 .read_nvram
= qla25xx_read_nvram_data
,
1901 .write_nvram
= qla25xx_write_nvram_data
,
1902 .fw_dump
= qla25xx_fw_dump
,
1903 .beacon_on
= qla24xx_beacon_on
,
1904 .beacon_off
= qla24xx_beacon_off
,
1905 .beacon_blink
= qla24xx_beacon_blink
,
1906 .read_optrom
= qla25xx_read_optrom_data
,
1907 .write_optrom
= qla24xx_write_optrom_data
,
1908 .get_flash_version
= qla24xx_get_flash_version
,
1909 .start_scsi
= qla24xx_dif_start_scsi
,
1910 .abort_isp
= qla2x00_abort_isp
,
1911 .iospace_config
= qla2x00_iospace_config
,
1912 .initialize_adapter
= qla2x00_initialize_adapter
,
1915 static struct isp_operations qla81xx_isp_ops
= {
1916 .pci_config
= qla25xx_pci_config
,
1917 .reset_chip
= qla24xx_reset_chip
,
1918 .chip_diag
= qla24xx_chip_diag
,
1919 .config_rings
= qla24xx_config_rings
,
1920 .reset_adapter
= qla24xx_reset_adapter
,
1921 .nvram_config
= qla81xx_nvram_config
,
1922 .update_fw_options
= qla81xx_update_fw_options
,
1923 .load_risc
= qla81xx_load_risc
,
1924 .pci_info_str
= qla24xx_pci_info_str
,
1925 .fw_version_str
= qla24xx_fw_version_str
,
1926 .intr_handler
= qla24xx_intr_handler
,
1927 .enable_intrs
= qla24xx_enable_intrs
,
1928 .disable_intrs
= qla24xx_disable_intrs
,
1929 .abort_command
= qla24xx_abort_command
,
1930 .target_reset
= qla24xx_abort_target
,
1931 .lun_reset
= qla24xx_lun_reset
,
1932 .fabric_login
= qla24xx_login_fabric
,
1933 .fabric_logout
= qla24xx_fabric_logout
,
1934 .calc_req_entries
= NULL
,
1935 .build_iocbs
= NULL
,
1936 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
1937 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
1939 .write_nvram
= NULL
,
1940 .fw_dump
= qla81xx_fw_dump
,
1941 .beacon_on
= qla24xx_beacon_on
,
1942 .beacon_off
= qla24xx_beacon_off
,
1943 .beacon_blink
= qla83xx_beacon_blink
,
1944 .read_optrom
= qla25xx_read_optrom_data
,
1945 .write_optrom
= qla24xx_write_optrom_data
,
1946 .get_flash_version
= qla24xx_get_flash_version
,
1947 .start_scsi
= qla24xx_dif_start_scsi
,
1948 .abort_isp
= qla2x00_abort_isp
,
1949 .iospace_config
= qla2x00_iospace_config
,
1950 .initialize_adapter
= qla2x00_initialize_adapter
,
1953 static struct isp_operations qla82xx_isp_ops
= {
1954 .pci_config
= qla82xx_pci_config
,
1955 .reset_chip
= qla82xx_reset_chip
,
1956 .chip_diag
= qla24xx_chip_diag
,
1957 .config_rings
= qla82xx_config_rings
,
1958 .reset_adapter
= qla24xx_reset_adapter
,
1959 .nvram_config
= qla81xx_nvram_config
,
1960 .update_fw_options
= qla24xx_update_fw_options
,
1961 .load_risc
= qla82xx_load_risc
,
1962 .pci_info_str
= qla24xx_pci_info_str
,
1963 .fw_version_str
= qla24xx_fw_version_str
,
1964 .intr_handler
= qla82xx_intr_handler
,
1965 .enable_intrs
= qla82xx_enable_intrs
,
1966 .disable_intrs
= qla82xx_disable_intrs
,
1967 .abort_command
= qla24xx_abort_command
,
1968 .target_reset
= qla24xx_abort_target
,
1969 .lun_reset
= qla24xx_lun_reset
,
1970 .fabric_login
= qla24xx_login_fabric
,
1971 .fabric_logout
= qla24xx_fabric_logout
,
1972 .calc_req_entries
= NULL
,
1973 .build_iocbs
= NULL
,
1974 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
1975 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
1976 .read_nvram
= qla24xx_read_nvram_data
,
1977 .write_nvram
= qla24xx_write_nvram_data
,
1978 .fw_dump
= qla24xx_fw_dump
,
1979 .beacon_on
= qla82xx_beacon_on
,
1980 .beacon_off
= qla82xx_beacon_off
,
1981 .beacon_blink
= NULL
,
1982 .read_optrom
= qla82xx_read_optrom_data
,
1983 .write_optrom
= qla82xx_write_optrom_data
,
1984 .get_flash_version
= qla82xx_get_flash_version
,
1985 .start_scsi
= qla82xx_start_scsi
,
1986 .abort_isp
= qla82xx_abort_isp
,
1987 .iospace_config
= qla82xx_iospace_config
,
1988 .initialize_adapter
= qla2x00_initialize_adapter
,
1991 static struct isp_operations qla8044_isp_ops
= {
1992 .pci_config
= qla82xx_pci_config
,
1993 .reset_chip
= qla82xx_reset_chip
,
1994 .chip_diag
= qla24xx_chip_diag
,
1995 .config_rings
= qla82xx_config_rings
,
1996 .reset_adapter
= qla24xx_reset_adapter
,
1997 .nvram_config
= qla81xx_nvram_config
,
1998 .update_fw_options
= qla24xx_update_fw_options
,
1999 .load_risc
= qla82xx_load_risc
,
2000 .pci_info_str
= qla24xx_pci_info_str
,
2001 .fw_version_str
= qla24xx_fw_version_str
,
2002 .intr_handler
= qla8044_intr_handler
,
2003 .enable_intrs
= qla82xx_enable_intrs
,
2004 .disable_intrs
= qla82xx_disable_intrs
,
2005 .abort_command
= qla24xx_abort_command
,
2006 .target_reset
= qla24xx_abort_target
,
2007 .lun_reset
= qla24xx_lun_reset
,
2008 .fabric_login
= qla24xx_login_fabric
,
2009 .fabric_logout
= qla24xx_fabric_logout
,
2010 .calc_req_entries
= NULL
,
2011 .build_iocbs
= NULL
,
2012 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2013 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2015 .write_nvram
= NULL
,
2016 .fw_dump
= qla24xx_fw_dump
,
2017 .beacon_on
= qla82xx_beacon_on
,
2018 .beacon_off
= qla82xx_beacon_off
,
2019 .beacon_blink
= NULL
,
2020 .read_optrom
= qla82xx_read_optrom_data
,
2021 .write_optrom
= qla8044_write_optrom_data
,
2022 .get_flash_version
= qla82xx_get_flash_version
,
2023 .start_scsi
= qla82xx_start_scsi
,
2024 .abort_isp
= qla8044_abort_isp
,
2025 .iospace_config
= qla82xx_iospace_config
,
2026 .initialize_adapter
= qla2x00_initialize_adapter
,
2029 static struct isp_operations qla83xx_isp_ops
= {
2030 .pci_config
= qla25xx_pci_config
,
2031 .reset_chip
= qla24xx_reset_chip
,
2032 .chip_diag
= qla24xx_chip_diag
,
2033 .config_rings
= qla24xx_config_rings
,
2034 .reset_adapter
= qla24xx_reset_adapter
,
2035 .nvram_config
= qla81xx_nvram_config
,
2036 .update_fw_options
= qla81xx_update_fw_options
,
2037 .load_risc
= qla81xx_load_risc
,
2038 .pci_info_str
= qla24xx_pci_info_str
,
2039 .fw_version_str
= qla24xx_fw_version_str
,
2040 .intr_handler
= qla24xx_intr_handler
,
2041 .enable_intrs
= qla24xx_enable_intrs
,
2042 .disable_intrs
= qla24xx_disable_intrs
,
2043 .abort_command
= qla24xx_abort_command
,
2044 .target_reset
= qla24xx_abort_target
,
2045 .lun_reset
= qla24xx_lun_reset
,
2046 .fabric_login
= qla24xx_login_fabric
,
2047 .fabric_logout
= qla24xx_fabric_logout
,
2048 .calc_req_entries
= NULL
,
2049 .build_iocbs
= NULL
,
2050 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2051 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2053 .write_nvram
= NULL
,
2054 .fw_dump
= qla83xx_fw_dump
,
2055 .beacon_on
= qla24xx_beacon_on
,
2056 .beacon_off
= qla24xx_beacon_off
,
2057 .beacon_blink
= qla83xx_beacon_blink
,
2058 .read_optrom
= qla25xx_read_optrom_data
,
2059 .write_optrom
= qla24xx_write_optrom_data
,
2060 .get_flash_version
= qla24xx_get_flash_version
,
2061 .start_scsi
= qla24xx_dif_start_scsi
,
2062 .abort_isp
= qla2x00_abort_isp
,
2063 .iospace_config
= qla83xx_iospace_config
,
2064 .initialize_adapter
= qla2x00_initialize_adapter
,
2067 static struct isp_operations qlafx00_isp_ops
= {
2068 .pci_config
= qlafx00_pci_config
,
2069 .reset_chip
= qlafx00_soft_reset
,
2070 .chip_diag
= qlafx00_chip_diag
,
2071 .config_rings
= qlafx00_config_rings
,
2072 .reset_adapter
= qlafx00_soft_reset
,
2073 .nvram_config
= NULL
,
2074 .update_fw_options
= NULL
,
2076 .pci_info_str
= qlafx00_pci_info_str
,
2077 .fw_version_str
= qlafx00_fw_version_str
,
2078 .intr_handler
= qlafx00_intr_handler
,
2079 .enable_intrs
= qlafx00_enable_intrs
,
2080 .disable_intrs
= qlafx00_disable_intrs
,
2081 .abort_command
= qlafx00_abort_command
,
2082 .target_reset
= qlafx00_abort_target
,
2083 .lun_reset
= qlafx00_lun_reset
,
2084 .fabric_login
= NULL
,
2085 .fabric_logout
= NULL
,
2086 .calc_req_entries
= NULL
,
2087 .build_iocbs
= NULL
,
2088 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2089 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2090 .read_nvram
= qla24xx_read_nvram_data
,
2091 .write_nvram
= qla24xx_write_nvram_data
,
2093 .beacon_on
= qla24xx_beacon_on
,
2094 .beacon_off
= qla24xx_beacon_off
,
2095 .beacon_blink
= NULL
,
2096 .read_optrom
= qla24xx_read_optrom_data
,
2097 .write_optrom
= qla24xx_write_optrom_data
,
2098 .get_flash_version
= qla24xx_get_flash_version
,
2099 .start_scsi
= qlafx00_start_scsi
,
2100 .abort_isp
= qlafx00_abort_isp
,
2101 .iospace_config
= qlafx00_iospace_config
,
2102 .initialize_adapter
= qlafx00_initialize_adapter
,
2105 static struct isp_operations qla27xx_isp_ops
= {
2106 .pci_config
= qla25xx_pci_config
,
2107 .reset_chip
= qla24xx_reset_chip
,
2108 .chip_diag
= qla24xx_chip_diag
,
2109 .config_rings
= qla24xx_config_rings
,
2110 .reset_adapter
= qla24xx_reset_adapter
,
2111 .nvram_config
= qla81xx_nvram_config
,
2112 .update_fw_options
= qla81xx_update_fw_options
,
2113 .load_risc
= qla81xx_load_risc
,
2114 .pci_info_str
= qla24xx_pci_info_str
,
2115 .fw_version_str
= qla24xx_fw_version_str
,
2116 .intr_handler
= qla24xx_intr_handler
,
2117 .enable_intrs
= qla24xx_enable_intrs
,
2118 .disable_intrs
= qla24xx_disable_intrs
,
2119 .abort_command
= qla24xx_abort_command
,
2120 .target_reset
= qla24xx_abort_target
,
2121 .lun_reset
= qla24xx_lun_reset
,
2122 .fabric_login
= qla24xx_login_fabric
,
2123 .fabric_logout
= qla24xx_fabric_logout
,
2124 .calc_req_entries
= NULL
,
2125 .build_iocbs
= NULL
,
2126 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2127 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2129 .write_nvram
= NULL
,
2130 .fw_dump
= qla27xx_fwdump
,
2131 .beacon_on
= qla24xx_beacon_on
,
2132 .beacon_off
= qla24xx_beacon_off
,
2133 .beacon_blink
= qla83xx_beacon_blink
,
2134 .read_optrom
= qla25xx_read_optrom_data
,
2135 .write_optrom
= qla24xx_write_optrom_data
,
2136 .get_flash_version
= qla24xx_get_flash_version
,
2137 .start_scsi
= qla24xx_dif_start_scsi
,
2138 .abort_isp
= qla2x00_abort_isp
,
2139 .iospace_config
= qla83xx_iospace_config
,
2140 .initialize_adapter
= qla2x00_initialize_adapter
,
2144 qla2x00_set_isp_flags(struct qla_hw_data
*ha
)
2146 ha
->device_type
= DT_EXTENDED_IDS
;
2147 switch (ha
->pdev
->device
) {
2148 case PCI_DEVICE_ID_QLOGIC_ISP2100
:
2149 ha
->device_type
|= DT_ISP2100
;
2150 ha
->device_type
&= ~DT_EXTENDED_IDS
;
2151 ha
->fw_srisc_address
= RISC_START_ADDRESS_2100
;
2153 case PCI_DEVICE_ID_QLOGIC_ISP2200
:
2154 ha
->device_type
|= DT_ISP2200
;
2155 ha
->device_type
&= ~DT_EXTENDED_IDS
;
2156 ha
->fw_srisc_address
= RISC_START_ADDRESS_2100
;
2158 case PCI_DEVICE_ID_QLOGIC_ISP2300
:
2159 ha
->device_type
|= DT_ISP2300
;
2160 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2161 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2163 case PCI_DEVICE_ID_QLOGIC_ISP2312
:
2164 ha
->device_type
|= DT_ISP2312
;
2165 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2166 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2168 case PCI_DEVICE_ID_QLOGIC_ISP2322
:
2169 ha
->device_type
|= DT_ISP2322
;
2170 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2171 if (ha
->pdev
->subsystem_vendor
== 0x1028 &&
2172 ha
->pdev
->subsystem_device
== 0x0170)
2173 ha
->device_type
|= DT_OEM_001
;
2174 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2176 case PCI_DEVICE_ID_QLOGIC_ISP6312
:
2177 ha
->device_type
|= DT_ISP6312
;
2178 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2180 case PCI_DEVICE_ID_QLOGIC_ISP6322
:
2181 ha
->device_type
|= DT_ISP6322
;
2182 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2184 case PCI_DEVICE_ID_QLOGIC_ISP2422
:
2185 ha
->device_type
|= DT_ISP2422
;
2186 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2187 ha
->device_type
|= DT_FWI2
;
2188 ha
->device_type
|= DT_IIDMA
;
2189 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2191 case PCI_DEVICE_ID_QLOGIC_ISP2432
:
2192 ha
->device_type
|= DT_ISP2432
;
2193 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2194 ha
->device_type
|= DT_FWI2
;
2195 ha
->device_type
|= DT_IIDMA
;
2196 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2198 case PCI_DEVICE_ID_QLOGIC_ISP8432
:
2199 ha
->device_type
|= DT_ISP8432
;
2200 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2201 ha
->device_type
|= DT_FWI2
;
2202 ha
->device_type
|= DT_IIDMA
;
2203 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2205 case PCI_DEVICE_ID_QLOGIC_ISP5422
:
2206 ha
->device_type
|= DT_ISP5422
;
2207 ha
->device_type
|= DT_FWI2
;
2208 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2210 case PCI_DEVICE_ID_QLOGIC_ISP5432
:
2211 ha
->device_type
|= DT_ISP5432
;
2212 ha
->device_type
|= DT_FWI2
;
2213 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2215 case PCI_DEVICE_ID_QLOGIC_ISP2532
:
2216 ha
->device_type
|= DT_ISP2532
;
2217 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2218 ha
->device_type
|= DT_FWI2
;
2219 ha
->device_type
|= DT_IIDMA
;
2220 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2222 case PCI_DEVICE_ID_QLOGIC_ISP8001
:
2223 ha
->device_type
|= DT_ISP8001
;
2224 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2225 ha
->device_type
|= DT_FWI2
;
2226 ha
->device_type
|= DT_IIDMA
;
2227 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2229 case PCI_DEVICE_ID_QLOGIC_ISP8021
:
2230 ha
->device_type
|= DT_ISP8021
;
2231 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2232 ha
->device_type
|= DT_FWI2
;
2233 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2234 /* Initialize 82XX ISP flags */
2235 qla82xx_init_flags(ha
);
2237 case PCI_DEVICE_ID_QLOGIC_ISP8044
:
2238 ha
->device_type
|= DT_ISP8044
;
2239 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2240 ha
->device_type
|= DT_FWI2
;
2241 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2242 /* Initialize 82XX ISP flags */
2243 qla82xx_init_flags(ha
);
2245 case PCI_DEVICE_ID_QLOGIC_ISP2031
:
2246 ha
->device_type
|= DT_ISP2031
;
2247 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2248 ha
->device_type
|= DT_FWI2
;
2249 ha
->device_type
|= DT_IIDMA
;
2250 ha
->device_type
|= DT_T10_PI
;
2251 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2253 case PCI_DEVICE_ID_QLOGIC_ISP8031
:
2254 ha
->device_type
|= DT_ISP8031
;
2255 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2256 ha
->device_type
|= DT_FWI2
;
2257 ha
->device_type
|= DT_IIDMA
;
2258 ha
->device_type
|= DT_T10_PI
;
2259 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2261 case PCI_DEVICE_ID_QLOGIC_ISPF001
:
2262 ha
->device_type
|= DT_ISPFX00
;
2264 case PCI_DEVICE_ID_QLOGIC_ISP2071
:
2265 ha
->device_type
|= DT_ISP2071
;
2266 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2267 ha
->device_type
|= DT_FWI2
;
2268 ha
->device_type
|= DT_IIDMA
;
2269 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2274 ha
->port_no
= !(ha
->portnum
& 1);
2276 /* Get adapter physical port no from interrupt pin register. */
2277 pci_read_config_byte(ha
->pdev
, PCI_INTERRUPT_PIN
, &ha
->port_no
);
2281 ha
->port_no
= !(ha
->port_no
& 1);
2284 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x000b,
2285 "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2286 ha
->device_type
, ha
->port_no
, ha
->fw_srisc_address
);
2290 qla2xxx_scan_start(struct Scsi_Host
*shost
)
2292 scsi_qla_host_t
*vha
= shost_priv(shost
);
2294 if (vha
->hw
->flags
.running_gold_fw
)
2297 set_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
);
2298 set_bit(LOCAL_LOOP_UPDATE
, &vha
->dpc_flags
);
2299 set_bit(RSCN_UPDATE
, &vha
->dpc_flags
);
2300 set_bit(NPIV_CONFIG_NEEDED
, &vha
->dpc_flags
);
2304 qla2xxx_scan_finished(struct Scsi_Host
*shost
, unsigned long time
)
2306 scsi_qla_host_t
*vha
= shost_priv(shost
);
2310 if (time
> vha
->hw
->loop_reset_delay
* HZ
)
2313 return atomic_read(&vha
->loop_state
) == LOOP_READY
;
2317 * PCI driver interface
2320 qla2x00_probe_one(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
2323 struct Scsi_Host
*host
;
2324 scsi_qla_host_t
*base_vha
= NULL
;
2325 struct qla_hw_data
*ha
;
2327 char fw_str
[30], wq_name
[30];
2328 struct scsi_host_template
*sht
;
2329 int bars
, mem_only
= 0;
2330 uint16_t req_length
= 0, rsp_length
= 0;
2331 struct req_que
*req
= NULL
;
2332 struct rsp_que
*rsp
= NULL
;
2333 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
| IORESOURCE_IO
);
2334 sht
= &qla2xxx_driver_template
;
2335 if (pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2422
||
2336 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2432
||
2337 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8432
||
2338 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP5422
||
2339 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP5432
||
2340 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2532
||
2341 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8001
||
2342 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8021
||
2343 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2031
||
2344 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8031
||
2345 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISPF001
||
2346 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8044
||
2347 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2071
) {
2348 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2350 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0007,
2351 "Mem only adapter.\n");
2353 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0008,
2354 "Bars=%d.\n", bars
);
2357 if (pci_enable_device_mem(pdev
))
2360 if (pci_enable_device(pdev
))
2364 /* This may fail but that's ok */
2365 pci_enable_pcie_error_reporting(pdev
);
2367 ha
= kzalloc(sizeof(struct qla_hw_data
), GFP_KERNEL
);
2369 ql_log_pci(ql_log_fatal
, pdev
, 0x0009,
2370 "Unable to allocate memory for ha.\n");
2373 ql_dbg_pci(ql_dbg_init
, pdev
, 0x000a,
2374 "Memory allocated for ha=%p.\n", ha
);
2376 ha
->tgt
.enable_class_2
= ql2xenableclass2
;
2378 /* Clear our data area */
2380 ha
->mem_only
= mem_only
;
2381 spin_lock_init(&ha
->hardware_lock
);
2382 spin_lock_init(&ha
->vport_slock
);
2383 mutex_init(&ha
->selflogin_lock
);
2384 mutex_init(&ha
->optrom_mutex
);
2386 /* Set ISP-type information. */
2387 qla2x00_set_isp_flags(ha
);
2389 /* Set EEH reset type to fundamental if required by hba */
2390 if (IS_QLA24XX(ha
) || IS_QLA25XX(ha
) || IS_QLA81XX(ha
) ||
2391 IS_QLA83XX(ha
) || IS_QLA27XX(ha
))
2392 pdev
->needs_freset
= 1;
2394 ha
->prev_topology
= 0;
2395 ha
->init_cb_size
= sizeof(init_cb_t
);
2396 ha
->link_data_rate
= PORT_SPEED_UNKNOWN
;
2397 ha
->optrom_size
= OPTROM_SIZE_2300
;
2399 /* Assign ISP specific operations. */
2400 if (IS_QLA2100(ha
)) {
2401 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2402 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_2100
;
2403 req_length
= REQUEST_ENTRY_CNT_2100
;
2404 rsp_length
= RESPONSE_ENTRY_CNT_2100
;
2405 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2100
;
2406 ha
->gid_list_info_size
= 4;
2407 ha
->flash_conf_off
= ~0;
2408 ha
->flash_data_off
= ~0;
2409 ha
->nvram_conf_off
= ~0;
2410 ha
->nvram_data_off
= ~0;
2411 ha
->isp_ops
= &qla2100_isp_ops
;
2412 } else if (IS_QLA2200(ha
)) {
2413 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2414 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_2200
;
2415 req_length
= REQUEST_ENTRY_CNT_2200
;
2416 rsp_length
= RESPONSE_ENTRY_CNT_2100
;
2417 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2100
;
2418 ha
->gid_list_info_size
= 4;
2419 ha
->flash_conf_off
= ~0;
2420 ha
->flash_data_off
= ~0;
2421 ha
->nvram_conf_off
= ~0;
2422 ha
->nvram_data_off
= ~0;
2423 ha
->isp_ops
= &qla2100_isp_ops
;
2424 } else if (IS_QLA23XX(ha
)) {
2425 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2426 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2427 req_length
= REQUEST_ENTRY_CNT_2200
;
2428 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2429 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2430 ha
->gid_list_info_size
= 6;
2431 if (IS_QLA2322(ha
) || IS_QLA6322(ha
))
2432 ha
->optrom_size
= OPTROM_SIZE_2322
;
2433 ha
->flash_conf_off
= ~0;
2434 ha
->flash_data_off
= ~0;
2435 ha
->nvram_conf_off
= ~0;
2436 ha
->nvram_data_off
= ~0;
2437 ha
->isp_ops
= &qla2300_isp_ops
;
2438 } else if (IS_QLA24XX_TYPE(ha
)) {
2439 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2440 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2441 req_length
= REQUEST_ENTRY_CNT_24XX
;
2442 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2443 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2444 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2445 ha
->init_cb_size
= sizeof(struct mid_init_cb_24xx
);
2446 ha
->gid_list_info_size
= 8;
2447 ha
->optrom_size
= OPTROM_SIZE_24XX
;
2448 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA24XX
;
2449 ha
->isp_ops
= &qla24xx_isp_ops
;
2450 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2451 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2452 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2453 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2454 } else if (IS_QLA25XX(ha
)) {
2455 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2456 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2457 req_length
= REQUEST_ENTRY_CNT_24XX
;
2458 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2459 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2460 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2461 ha
->init_cb_size
= sizeof(struct mid_init_cb_24xx
);
2462 ha
->gid_list_info_size
= 8;
2463 ha
->optrom_size
= OPTROM_SIZE_25XX
;
2464 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2465 ha
->isp_ops
= &qla25xx_isp_ops
;
2466 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2467 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2468 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2469 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2470 } else if (IS_QLA81XX(ha
)) {
2471 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2472 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2473 req_length
= REQUEST_ENTRY_CNT_24XX
;
2474 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2475 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2476 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2477 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2478 ha
->gid_list_info_size
= 8;
2479 ha
->optrom_size
= OPTROM_SIZE_81XX
;
2480 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2481 ha
->isp_ops
= &qla81xx_isp_ops
;
2482 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_81XX
;
2483 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_81XX
;
2484 ha
->nvram_conf_off
= ~0;
2485 ha
->nvram_data_off
= ~0;
2486 } else if (IS_QLA82XX(ha
)) {
2487 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2488 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2489 req_length
= REQUEST_ENTRY_CNT_82XX
;
2490 rsp_length
= RESPONSE_ENTRY_CNT_82XX
;
2491 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2492 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2493 ha
->gid_list_info_size
= 8;
2494 ha
->optrom_size
= OPTROM_SIZE_82XX
;
2495 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2496 ha
->isp_ops
= &qla82xx_isp_ops
;
2497 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2498 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2499 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2500 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2501 } else if (IS_QLA8044(ha
)) {
2502 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2503 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2504 req_length
= REQUEST_ENTRY_CNT_82XX
;
2505 rsp_length
= RESPONSE_ENTRY_CNT_82XX
;
2506 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2507 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2508 ha
->gid_list_info_size
= 8;
2509 ha
->optrom_size
= OPTROM_SIZE_83XX
;
2510 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2511 ha
->isp_ops
= &qla8044_isp_ops
;
2512 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2513 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2514 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2515 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2516 } else if (IS_QLA83XX(ha
)) {
2517 ha
->portnum
= PCI_FUNC(ha
->pdev
->devfn
);
2518 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2519 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2520 req_length
= REQUEST_ENTRY_CNT_24XX
;
2521 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2522 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2523 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2524 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2525 ha
->gid_list_info_size
= 8;
2526 ha
->optrom_size
= OPTROM_SIZE_83XX
;
2527 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2528 ha
->isp_ops
= &qla83xx_isp_ops
;
2529 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_81XX
;
2530 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_81XX
;
2531 ha
->nvram_conf_off
= ~0;
2532 ha
->nvram_data_off
= ~0;
2533 } else if (IS_QLAFX00(ha
)) {
2534 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_FX00
;
2535 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_FX00
;
2536 ha
->aen_mbx_count
= AEN_MAILBOX_REGISTER_COUNT_FX00
;
2537 req_length
= REQUEST_ENTRY_CNT_FX00
;
2538 rsp_length
= RESPONSE_ENTRY_CNT_FX00
;
2539 ha
->isp_ops
= &qlafx00_isp_ops
;
2540 ha
->port_down_retry_count
= 30; /* default value */
2541 ha
->mr
.fw_hbt_cnt
= QLAFX00_HEARTBEAT_INTERVAL
;
2542 ha
->mr
.fw_reset_timer_tick
= QLAFX00_RESET_INTERVAL
;
2543 ha
->mr
.fw_critemp_timer_tick
= QLAFX00_CRITEMP_INTERVAL
;
2544 ha
->mr
.fw_hbt_en
= 1;
2545 ha
->mr
.host_info_resend
= false;
2546 ha
->mr
.hinfo_resend_timer_tick
= QLAFX00_HINFO_RESEND_INTERVAL
;
2547 } else if (IS_QLA27XX(ha
)) {
2548 ha
->portnum
= PCI_FUNC(ha
->pdev
->devfn
);
2549 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2550 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2551 req_length
= REQUEST_ENTRY_CNT_24XX
;
2552 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2553 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2554 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2555 ha
->gid_list_info_size
= 8;
2556 ha
->optrom_size
= OPTROM_SIZE_83XX
;
2557 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2558 ha
->isp_ops
= &qla27xx_isp_ops
;
2559 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_81XX
;
2560 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_81XX
;
2561 ha
->nvram_conf_off
= ~0;
2562 ha
->nvram_data_off
= ~0;
2565 ql_dbg_pci(ql_dbg_init
, pdev
, 0x001e,
2566 "mbx_count=%d, req_length=%d, "
2567 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2568 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2569 "max_fibre_devices=%d.\n",
2570 ha
->mbx_count
, req_length
, rsp_length
, ha
->max_loop_id
,
2571 ha
->init_cb_size
, ha
->gid_list_info_size
, ha
->optrom_size
,
2572 ha
->nvram_npiv_size
, ha
->max_fibre_devices
);
2573 ql_dbg_pci(ql_dbg_init
, pdev
, 0x001f,
2574 "isp_ops=%p, flash_conf_off=%d, "
2575 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2576 ha
->isp_ops
, ha
->flash_conf_off
, ha
->flash_data_off
,
2577 ha
->nvram_conf_off
, ha
->nvram_data_off
);
2579 /* Configure PCI I/O space */
2580 ret
= ha
->isp_ops
->iospace_config(ha
);
2582 goto iospace_config_failed
;
2584 ql_log_pci(ql_log_info
, pdev
, 0x001d,
2585 "Found an ISP%04X irq %d iobase 0x%p.\n",
2586 pdev
->device
, pdev
->irq
, ha
->iobase
);
2587 mutex_init(&ha
->vport_lock
);
2588 init_completion(&ha
->mbx_cmd_comp
);
2589 complete(&ha
->mbx_cmd_comp
);
2590 init_completion(&ha
->mbx_intr_comp
);
2591 init_completion(&ha
->dcbx_comp
);
2592 init_completion(&ha
->lb_portup_comp
);
2594 set_bit(0, (unsigned long *) ha
->vp_idx_map
);
2596 qla2x00_config_dma_addressing(ha
);
2597 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0020,
2598 "64 Bit addressing is %s.\n",
2599 ha
->flags
.enable_64bit_addressing
? "enable" :
2601 ret
= qla2x00_mem_alloc(ha
, req_length
, rsp_length
, &req
, &rsp
);
2603 ql_log_pci(ql_log_fatal
, pdev
, 0x0031,
2604 "Failed to allocate memory for adapter, aborting.\n");
2606 goto probe_hw_failed
;
2609 req
->max_q_depth
= MAX_Q_DEPTH
;
2610 if (ql2xmaxqdepth
!= 0 && ql2xmaxqdepth
<= 0xffffU
)
2611 req
->max_q_depth
= ql2xmaxqdepth
;
2614 base_vha
= qla2x00_create_host(sht
, ha
);
2617 qla2x00_mem_free(ha
);
2618 qla2x00_free_req_que(ha
, req
);
2619 qla2x00_free_rsp_que(ha
, rsp
);
2620 goto probe_hw_failed
;
2623 pci_set_drvdata(pdev
, base_vha
);
2625 host
= base_vha
->host
;
2626 base_vha
->req
= req
;
2627 if (IS_QLA2XXX_MIDTYPE(ha
))
2628 base_vha
->mgmt_svr_loop_id
= 10 + base_vha
->vp_idx
;
2630 base_vha
->mgmt_svr_loop_id
= MANAGEMENT_SERVER
+
2633 /* Setup fcport template structure. */
2634 ha
->mr
.fcport
.vha
= base_vha
;
2635 ha
->mr
.fcport
.port_type
= FCT_UNKNOWN
;
2636 ha
->mr
.fcport
.loop_id
= FC_NO_LOOP_ID
;
2637 qla2x00_set_fcport_state(&ha
->mr
.fcport
, FCS_UNCONFIGURED
);
2638 ha
->mr
.fcport
.supported_classes
= FC_COS_UNSPECIFIED
;
2639 ha
->mr
.fcport
.scan_state
= 1;
2641 /* Set the SG table size based on ISP type */
2642 if (!IS_FWI2_CAPABLE(ha
)) {
2644 host
->sg_tablesize
= 32;
2646 if (!IS_QLA82XX(ha
))
2647 host
->sg_tablesize
= QLA_SG_ALL
;
2649 host
->max_id
= ha
->max_fibre_devices
;
2650 host
->cmd_per_lun
= 3;
2651 host
->unique_id
= host
->host_no
;
2652 if (IS_T10_PI_CAPABLE(ha
) && ql2xenabledif
)
2653 host
->max_cmd_len
= 32;
2655 host
->max_cmd_len
= MAX_CMDSZ
;
2656 host
->max_channel
= MAX_BUSES
- 1;
2657 host
->max_lun
= ql2xmaxlun
;
2658 host
->transportt
= qla2xxx_transport_template
;
2659 sht
->vendor_id
= (SCSI_NL_VID_TYPE_PCI
| PCI_VENDOR_ID_QLOGIC
);
2661 ql_dbg(ql_dbg_init
, base_vha
, 0x0033,
2662 "max_id=%d this_id=%d "
2663 "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2664 "max_lun=%d transportt=%p, vendor_id=%llu.\n", host
->max_id
,
2665 host
->this_id
, host
->cmd_per_lun
, host
->unique_id
,
2666 host
->max_cmd_len
, host
->max_channel
, host
->max_lun
,
2667 host
->transportt
, sht
->vendor_id
);
2670 /* Alloc arrays of request and response ring ptrs */
2671 if (!qla2x00_alloc_queues(ha
, req
, rsp
)) {
2672 ql_log(ql_log_fatal
, base_vha
, 0x003d,
2673 "Failed to allocate memory for queue pointers..."
2675 goto probe_init_failed
;
2678 qlt_probe_one_stage1(base_vha
, ha
);
2680 /* Set up the irqs */
2681 ret
= qla2x00_request_irqs(ha
, rsp
);
2683 goto probe_init_failed
;
2685 pci_save_state(pdev
);
2687 /* Assign back pointers */
2691 if (IS_QLAFX00(ha
)) {
2692 ha
->rsp_q_map
[0] = rsp
;
2693 ha
->req_q_map
[0] = req
;
2694 set_bit(0, ha
->req_qid_map
);
2695 set_bit(0, ha
->rsp_qid_map
);
2698 /* FWI2-capable only. */
2699 req
->req_q_in
= &ha
->iobase
->isp24
.req_q_in
;
2700 req
->req_q_out
= &ha
->iobase
->isp24
.req_q_out
;
2701 rsp
->rsp_q_in
= &ha
->iobase
->isp24
.rsp_q_in
;
2702 rsp
->rsp_q_out
= &ha
->iobase
->isp24
.rsp_q_out
;
2703 if (ha
->mqenable
|| IS_QLA83XX(ha
) || IS_QLA27XX(ha
)) {
2704 req
->req_q_in
= &ha
->mqiobase
->isp25mq
.req_q_in
;
2705 req
->req_q_out
= &ha
->mqiobase
->isp25mq
.req_q_out
;
2706 rsp
->rsp_q_in
= &ha
->mqiobase
->isp25mq
.rsp_q_in
;
2707 rsp
->rsp_q_out
= &ha
->mqiobase
->isp25mq
.rsp_q_out
;
2710 if (IS_QLAFX00(ha
)) {
2711 req
->req_q_in
= &ha
->iobase
->ispfx00
.req_q_in
;
2712 req
->req_q_out
= &ha
->iobase
->ispfx00
.req_q_out
;
2713 rsp
->rsp_q_in
= &ha
->iobase
->ispfx00
.rsp_q_in
;
2714 rsp
->rsp_q_out
= &ha
->iobase
->ispfx00
.rsp_q_out
;
2717 if (IS_P3P_TYPE(ha
)) {
2718 req
->req_q_out
= &ha
->iobase
->isp82
.req_q_out
[0];
2719 rsp
->rsp_q_in
= &ha
->iobase
->isp82
.rsp_q_in
[0];
2720 rsp
->rsp_q_out
= &ha
->iobase
->isp82
.rsp_q_out
[0];
2723 ql_dbg(ql_dbg_multiq
, base_vha
, 0xc009,
2724 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2725 ha
->rsp_q_map
, ha
->req_q_map
, rsp
->req
, req
->rsp
);
2726 ql_dbg(ql_dbg_multiq
, base_vha
, 0xc00a,
2727 "req->req_q_in=%p req->req_q_out=%p "
2728 "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2729 req
->req_q_in
, req
->req_q_out
,
2730 rsp
->rsp_q_in
, rsp
->rsp_q_out
);
2731 ql_dbg(ql_dbg_init
, base_vha
, 0x003e,
2732 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2733 ha
->rsp_q_map
, ha
->req_q_map
, rsp
->req
, req
->rsp
);
2734 ql_dbg(ql_dbg_init
, base_vha
, 0x003f,
2735 "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2736 req
->req_q_in
, req
->req_q_out
, rsp
->rsp_q_in
, rsp
->rsp_q_out
);
2738 if (ha
->isp_ops
->initialize_adapter(base_vha
)) {
2739 ql_log(ql_log_fatal
, base_vha
, 0x00d6,
2740 "Failed to initialize adapter - Adapter flags %x.\n",
2741 base_vha
->device_flags
);
2743 if (IS_QLA82XX(ha
)) {
2744 qla82xx_idc_lock(ha
);
2745 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
2746 QLA8XXX_DEV_FAILED
);
2747 qla82xx_idc_unlock(ha
);
2748 ql_log(ql_log_fatal
, base_vha
, 0x00d7,
2749 "HW State: FAILED.\n");
2750 } else if (IS_QLA8044(ha
)) {
2751 qla8044_idc_lock(ha
);
2752 qla8044_wr_direct(base_vha
,
2753 QLA8044_CRB_DEV_STATE_INDEX
,
2754 QLA8XXX_DEV_FAILED
);
2755 qla8044_idc_unlock(ha
);
2756 ql_log(ql_log_fatal
, base_vha
, 0x0150,
2757 "HW State: FAILED.\n");
2765 host
->can_queue
= QLAFX00_MAX_CANQUEUE
;
2767 host
->can_queue
= req
->num_outstanding_cmds
- 10;
2769 ql_dbg(ql_dbg_init
, base_vha
, 0x0032,
2770 "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2771 host
->can_queue
, base_vha
->req
,
2772 base_vha
->mgmt_svr_loop_id
, host
->sg_tablesize
);
2775 if (qla25xx_setup_mode(base_vha
)) {
2776 ql_log(ql_log_warn
, base_vha
, 0x00ec,
2777 "Failed to create queues, falling back to single queue mode.\n");
2782 if (ha
->flags
.running_gold_fw
)
2786 * Startup the kernel thread for this host adapter
2788 ha
->dpc_thread
= kthread_create(qla2x00_do_dpc
, ha
,
2789 "%s_dpc", base_vha
->host_str
);
2790 if (IS_ERR(ha
->dpc_thread
)) {
2791 ql_log(ql_log_fatal
, base_vha
, 0x00ed,
2792 "Failed to start DPC thread.\n");
2793 ret
= PTR_ERR(ha
->dpc_thread
);
2796 ql_dbg(ql_dbg_init
, base_vha
, 0x00ee,
2797 "DPC thread started successfully.\n");
2800 * If we're not coming up in initiator mode, we might sit for
2801 * a while without waking up the dpc thread, which leads to a
2802 * stuck process warning. So just kick the dpc once here and
2803 * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2805 qla2xxx_wake_dpc(base_vha
);
2807 INIT_WORK(&ha
->board_disable
, qla2x00_disable_board_on_pci_error
);
2809 if (IS_QLA8031(ha
) || IS_MCTP_CAPABLE(ha
)) {
2810 sprintf(wq_name
, "qla2xxx_%lu_dpc_lp_wq", base_vha
->host_no
);
2811 ha
->dpc_lp_wq
= create_singlethread_workqueue(wq_name
);
2812 INIT_WORK(&ha
->idc_aen
, qla83xx_service_idc_aen
);
2814 sprintf(wq_name
, "qla2xxx_%lu_dpc_hp_wq", base_vha
->host_no
);
2815 ha
->dpc_hp_wq
= create_singlethread_workqueue(wq_name
);
2816 INIT_WORK(&ha
->nic_core_reset
, qla83xx_nic_core_reset_work
);
2817 INIT_WORK(&ha
->idc_state_handler
,
2818 qla83xx_idc_state_handler_work
);
2819 INIT_WORK(&ha
->nic_core_unrecoverable
,
2820 qla83xx_nic_core_unrecoverable_work
);
2824 list_add_tail(&base_vha
->list
, &ha
->vp_list
);
2825 base_vha
->host
->irq
= ha
->pdev
->irq
;
2827 /* Initialized the timer */
2828 qla2x00_start_timer(base_vha
, qla2x00_timer
, WATCH_INTERVAL
);
2829 ql_dbg(ql_dbg_init
, base_vha
, 0x00ef,
2830 "Started qla2x00_timer with "
2831 "interval=%d.\n", WATCH_INTERVAL
);
2832 ql_dbg(ql_dbg_init
, base_vha
, 0x00f0,
2833 "Detected hba at address=%p.\n",
2836 if (IS_T10_PI_CAPABLE(ha
) && ql2xenabledif
) {
2837 if (ha
->fw_attributes
& BIT_4
) {
2838 int prot
= 0, guard
;
2839 base_vha
->flags
.difdix_supported
= 1;
2840 ql_dbg(ql_dbg_init
, base_vha
, 0x00f1,
2841 "Registering for DIF/DIX type 1 and 3 protection.\n");
2842 if (ql2xenabledif
== 1)
2843 prot
= SHOST_DIX_TYPE0_PROTECTION
;
2844 scsi_host_set_prot(host
,
2845 prot
| SHOST_DIF_TYPE1_PROTECTION
2846 | SHOST_DIF_TYPE2_PROTECTION
2847 | SHOST_DIF_TYPE3_PROTECTION
2848 | SHOST_DIX_TYPE1_PROTECTION
2849 | SHOST_DIX_TYPE2_PROTECTION
2850 | SHOST_DIX_TYPE3_PROTECTION
);
2852 guard
= SHOST_DIX_GUARD_CRC
;
2854 if (IS_PI_IPGUARD_CAPABLE(ha
) &&
2855 (ql2xenabledif
> 1 || IS_PI_DIFB_DIX0_CAPABLE(ha
)))
2856 guard
|= SHOST_DIX_GUARD_IP
;
2858 scsi_host_set_guard(host
, guard
);
2860 base_vha
->flags
.difdix_supported
= 0;
2863 ha
->isp_ops
->enable_intrs(ha
);
2865 if (IS_QLAFX00(ha
)) {
2866 ret
= qlafx00_fx_disc(base_vha
,
2867 &base_vha
->hw
->mr
.fcport
, FXDISC_GET_CONFIG_INFO
);
2868 host
->sg_tablesize
= (ha
->mr
.extended_io_enabled
) ?
2872 ret
= scsi_add_host(host
, &pdev
->dev
);
2876 base_vha
->flags
.init_done
= 1;
2877 base_vha
->flags
.online
= 1;
2879 ql_dbg(ql_dbg_init
, base_vha
, 0x00f2,
2880 "Init done and hba is online.\n");
2882 if (qla_ini_mode_enabled(base_vha
))
2883 scsi_scan_host(host
);
2885 ql_dbg(ql_dbg_init
, base_vha
, 0x0122,
2886 "skipping scsi_scan_host() for non-initiator port\n");
2888 qla2x00_alloc_sysfs_attr(base_vha
);
2890 if (IS_QLAFX00(ha
)) {
2891 ret
= qlafx00_fx_disc(base_vha
,
2892 &base_vha
->hw
->mr
.fcport
, FXDISC_GET_PORT_INFO
);
2894 /* Register system information */
2895 ret
= qlafx00_fx_disc(base_vha
,
2896 &base_vha
->hw
->mr
.fcport
, FXDISC_REG_HOST_INFO
);
2899 qla2x00_init_host_attr(base_vha
);
2901 qla2x00_dfs_setup(base_vha
);
2903 ql_log(ql_log_info
, base_vha
, 0x00fb,
2904 "QLogic %s - %s.\n", ha
->model_number
, ha
->model_desc
);
2905 ql_log(ql_log_info
, base_vha
, 0x00fc,
2906 "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2907 pdev
->device
, ha
->isp_ops
->pci_info_str(base_vha
, pci_info
),
2908 pci_name(pdev
), ha
->flags
.enable_64bit_addressing
? '+' : '-',
2910 ha
->isp_ops
->fw_version_str(base_vha
, fw_str
));
2912 qlt_add_target(ha
, base_vha
);
2917 qla2x00_free_req_que(ha
, req
);
2918 ha
->req_q_map
[0] = NULL
;
2919 clear_bit(0, ha
->req_qid_map
);
2920 qla2x00_free_rsp_que(ha
, rsp
);
2921 ha
->rsp_q_map
[0] = NULL
;
2922 clear_bit(0, ha
->rsp_qid_map
);
2923 ha
->max_req_queues
= ha
->max_rsp_queues
= 0;
2926 if (base_vha
->timer_active
)
2927 qla2x00_stop_timer(base_vha
);
2928 base_vha
->flags
.online
= 0;
2929 if (ha
->dpc_thread
) {
2930 struct task_struct
*t
= ha
->dpc_thread
;
2932 ha
->dpc_thread
= NULL
;
2936 qla2x00_free_device(base_vha
);
2938 scsi_host_put(base_vha
->host
);
2941 if (IS_QLA82XX(ha
)) {
2942 qla82xx_idc_lock(ha
);
2943 qla82xx_clear_drv_active(ha
);
2944 qla82xx_idc_unlock(ha
);
2946 if (IS_QLA8044(ha
)) {
2947 qla8044_idc_lock(ha
);
2948 qla8044_clear_drv_active(ha
);
2949 qla8044_idc_unlock(ha
);
2951 iospace_config_failed
:
2952 if (IS_P3P_TYPE(ha
)) {
2953 if (!ha
->nx_pcibase
)
2954 iounmap((device_reg_t
*)ha
->nx_pcibase
);
2956 iounmap((device_reg_t
*)ha
->nxdb_wr_ptr
);
2959 iounmap(ha
->iobase
);
2961 iounmap(ha
->cregbase
);
2963 pci_release_selected_regions(ha
->pdev
, ha
->bars
);
2968 pci_disable_device(pdev
);
2973 qla2x00_shutdown(struct pci_dev
*pdev
)
2975 scsi_qla_host_t
*vha
;
2976 struct qla_hw_data
*ha
;
2978 if (!atomic_read(&pdev
->enable_cnt
))
2981 vha
= pci_get_drvdata(pdev
);
2984 /* Notify ISPFX00 firmware */
2986 qlafx00_driver_shutdown(vha
, 20);
2988 /* Turn-off FCE trace */
2989 if (ha
->flags
.fce_enabled
) {
2990 qla2x00_disable_fce_trace(vha
, NULL
, NULL
);
2991 ha
->flags
.fce_enabled
= 0;
2994 /* Turn-off EFT trace */
2996 qla2x00_disable_eft_trace(vha
);
2998 /* Stop currently executing firmware. */
2999 qla2x00_try_to_stop_firmware(vha
);
3001 /* Turn adapter off line */
3002 vha
->flags
.online
= 0;
3004 /* turn-off interrupts on the card */
3005 if (ha
->interrupts_on
) {
3006 vha
->flags
.init_done
= 0;
3007 ha
->isp_ops
->disable_intrs(ha
);
3010 qla2x00_free_irqs(vha
);
3012 qla2x00_free_fw_dump(ha
);
3015 /* Deletes all the virtual ports for a given ha */
3017 qla2x00_delete_all_vps(struct qla_hw_data
*ha
, scsi_qla_host_t
*base_vha
)
3019 struct Scsi_Host
*scsi_host
;
3020 scsi_qla_host_t
*vha
;
3021 unsigned long flags
;
3023 mutex_lock(&ha
->vport_lock
);
3024 while (ha
->cur_vport_count
) {
3025 spin_lock_irqsave(&ha
->vport_slock
, flags
);
3027 BUG_ON(base_vha
->list
.next
== &ha
->vp_list
);
3028 /* This assumes first entry in ha->vp_list is always base vha */
3029 vha
= list_first_entry(&base_vha
->list
, scsi_qla_host_t
, list
);
3030 scsi_host
= scsi_host_get(vha
->host
);
3032 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
3033 mutex_unlock(&ha
->vport_lock
);
3035 fc_vport_terminate(vha
->fc_vport
);
3036 scsi_host_put(vha
->host
);
3038 mutex_lock(&ha
->vport_lock
);
3040 mutex_unlock(&ha
->vport_lock
);
3043 /* Stops all deferred work threads */
3045 qla2x00_destroy_deferred_work(struct qla_hw_data
*ha
)
3047 /* Flush the work queue and remove it */
3049 flush_workqueue(ha
->wq
);
3050 destroy_workqueue(ha
->wq
);
3054 /* Cancel all work and destroy DPC workqueues */
3055 if (ha
->dpc_lp_wq
) {
3056 cancel_work_sync(&ha
->idc_aen
);
3057 destroy_workqueue(ha
->dpc_lp_wq
);
3058 ha
->dpc_lp_wq
= NULL
;
3061 if (ha
->dpc_hp_wq
) {
3062 cancel_work_sync(&ha
->nic_core_reset
);
3063 cancel_work_sync(&ha
->idc_state_handler
);
3064 cancel_work_sync(&ha
->nic_core_unrecoverable
);
3065 destroy_workqueue(ha
->dpc_hp_wq
);
3066 ha
->dpc_hp_wq
= NULL
;
3069 /* Kill the kernel thread for this host */
3070 if (ha
->dpc_thread
) {
3071 struct task_struct
*t
= ha
->dpc_thread
;
3074 * qla2xxx_wake_dpc checks for ->dpc_thread
3075 * so we need to zero it out.
3077 ha
->dpc_thread
= NULL
;
3083 qla2x00_unmap_iobases(struct qla_hw_data
*ha
)
3085 if (IS_QLA82XX(ha
)) {
3087 iounmap((device_reg_t
*)ha
->nx_pcibase
);
3089 iounmap((device_reg_t
*)ha
->nxdb_wr_ptr
);
3092 iounmap(ha
->iobase
);
3095 iounmap(ha
->cregbase
);
3098 iounmap(ha
->mqiobase
);
3100 if ((IS_QLA83XX(ha
) || IS_QLA27XX(ha
)) && ha
->msixbase
)
3101 iounmap(ha
->msixbase
);
3106 qla2x00_clear_drv_active(scsi_qla_host_t
*vha
)
3108 struct qla_hw_data
*ha
= vha
->hw
;
3110 if (IS_QLA8044(ha
)) {
3111 qla8044_idc_lock(ha
);
3112 qla8044_clear_drv_active(ha
);
3113 qla8044_idc_unlock(ha
);
3114 } else if (IS_QLA82XX(ha
)) {
3115 qla82xx_idc_lock(ha
);
3116 qla82xx_clear_drv_active(ha
);
3117 qla82xx_idc_unlock(ha
);
3122 qla2x00_remove_one(struct pci_dev
*pdev
)
3124 scsi_qla_host_t
*base_vha
;
3125 struct qla_hw_data
*ha
;
3128 * If the PCI device is disabled that means that probe failed and any
3129 * resources should be have cleaned up on probe exit.
3131 if (!atomic_read(&pdev
->enable_cnt
))
3134 base_vha
= pci_get_drvdata(pdev
);
3137 set_bit(UNLOADING
, &base_vha
->dpc_flags
);
3140 qlafx00_driver_shutdown(base_vha
, 20);
3142 qla2x00_delete_all_vps(ha
, base_vha
);
3144 if (IS_QLA8031(ha
)) {
3145 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07e,
3146 "Clearing fcoe driver presence.\n");
3147 if (qla83xx_clear_drv_presence(base_vha
) != QLA_SUCCESS
)
3148 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb079,
3149 "Error while clearing DRV-Presence.\n");
3152 qla2x00_abort_all_cmds(base_vha
, DID_NO_CONNECT
<< 16);
3154 qla2x00_dfs_remove(base_vha
);
3156 qla84xx_put_chip(base_vha
);
3159 if (base_vha
->timer_active
)
3160 qla2x00_stop_timer(base_vha
);
3162 base_vha
->flags
.online
= 0;
3164 qla2x00_destroy_deferred_work(ha
);
3166 qlt_remove_target(ha
, base_vha
);
3168 qla2x00_free_sysfs_attr(base_vha
, true);
3170 fc_remove_host(base_vha
->host
);
3172 scsi_remove_host(base_vha
->host
);
3174 qla2x00_free_device(base_vha
);
3176 scsi_host_put(base_vha
->host
);
3178 qla2x00_clear_drv_active(base_vha
);
3180 qla2x00_unmap_iobases(ha
);
3182 pci_release_selected_regions(ha
->pdev
, ha
->bars
);
3186 pci_disable_pcie_error_reporting(pdev
);
3188 pci_disable_device(pdev
);
3192 qla2x00_free_device(scsi_qla_host_t
*vha
)
3194 struct qla_hw_data
*ha
= vha
->hw
;
3196 qla2x00_abort_all_cmds(vha
, DID_NO_CONNECT
<< 16);
3199 if (vha
->timer_active
)
3200 qla2x00_stop_timer(vha
);
3202 qla25xx_delete_queues(vha
);
3204 if (ha
->flags
.fce_enabled
)
3205 qla2x00_disable_fce_trace(vha
, NULL
, NULL
);
3208 qla2x00_disable_eft_trace(vha
);
3210 /* Stop currently executing firmware. */
3211 qla2x00_try_to_stop_firmware(vha
);
3213 vha
->flags
.online
= 0;
3215 /* turn-off interrupts on the card */
3216 if (ha
->interrupts_on
) {
3217 vha
->flags
.init_done
= 0;
3218 ha
->isp_ops
->disable_intrs(ha
);
3221 qla2x00_free_irqs(vha
);
3223 qla2x00_free_fcports(vha
);
3225 qla2x00_mem_free(ha
);
3227 qla82xx_md_free(vha
);
3229 qla2x00_free_queues(ha
);
3232 void qla2x00_free_fcports(struct scsi_qla_host
*vha
)
3234 fc_port_t
*fcport
, *tfcport
;
3236 list_for_each_entry_safe(fcport
, tfcport
, &vha
->vp_fcports
, list
) {
3237 list_del(&fcport
->list
);
3238 qla2x00_clear_loop_id(fcport
);
3245 qla2x00_schedule_rport_del(struct scsi_qla_host
*vha
, fc_port_t
*fcport
,
3248 struct fc_rport
*rport
;
3249 scsi_qla_host_t
*base_vha
;
3250 unsigned long flags
;
3255 rport
= fcport
->rport
;
3257 base_vha
= pci_get_drvdata(vha
->hw
->pdev
);
3258 spin_lock_irqsave(vha
->host
->host_lock
, flags
);
3259 fcport
->drport
= rport
;
3260 spin_unlock_irqrestore(vha
->host
->host_lock
, flags
);
3261 set_bit(FCPORT_UPDATE_NEEDED
, &base_vha
->dpc_flags
);
3262 qla2xxx_wake_dpc(base_vha
);
3264 fc_remote_port_delete(rport
);
3265 qlt_fc_port_deleted(vha
, fcport
);
3270 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3272 * Input: ha = adapter block pointer. fcport = port structure pointer.
3278 void qla2x00_mark_device_lost(scsi_qla_host_t
*vha
, fc_port_t
*fcport
,
3279 int do_login
, int defer
)
3281 if (IS_QLAFX00(vha
->hw
)) {
3282 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3283 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3287 if (atomic_read(&fcport
->state
) == FCS_ONLINE
&&
3288 vha
->vp_idx
== fcport
->vha
->vp_idx
) {
3289 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3290 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3293 * We may need to retry the login, so don't change the state of the
3294 * port but do the retries.
3296 if (atomic_read(&fcport
->state
) != FCS_DEVICE_DEAD
)
3297 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3302 if (fcport
->login_retry
== 0) {
3303 fcport
->login_retry
= vha
->hw
->login_retry_count
;
3304 set_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
);
3306 ql_dbg(ql_dbg_disc
, vha
, 0x2067,
3307 "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
3308 fcport
->port_name
, fcport
->loop_id
, fcport
->login_retry
);
3313 * qla2x00_mark_all_devices_lost
3314 * Updates fcport state when device goes offline.
3317 * ha = adapter block pointer.
3318 * fcport = port structure pointer.
3326 qla2x00_mark_all_devices_lost(scsi_qla_host_t
*vha
, int defer
)
3330 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
3331 if (vha
->vp_idx
!= 0 && vha
->vp_idx
!= fcport
->vha
->vp_idx
)
3335 * No point in marking the device as lost, if the device is
3338 if (atomic_read(&fcport
->state
) == FCS_DEVICE_DEAD
)
3340 if (atomic_read(&fcport
->state
) == FCS_ONLINE
) {
3341 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3343 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3344 else if (vha
->vp_idx
== fcport
->vha
->vp_idx
)
3345 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3352 * Allocates adapter memory.
3359 qla2x00_mem_alloc(struct qla_hw_data
*ha
, uint16_t req_len
, uint16_t rsp_len
,
3360 struct req_que
**req
, struct rsp_que
**rsp
)
3364 ha
->init_cb
= dma_alloc_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
,
3365 &ha
->init_cb_dma
, GFP_KERNEL
);
3369 if (qlt_mem_alloc(ha
) < 0)
3370 goto fail_free_init_cb
;
3372 ha
->gid_list
= dma_alloc_coherent(&ha
->pdev
->dev
,
3373 qla2x00_gid_list_size(ha
), &ha
->gid_list_dma
, GFP_KERNEL
);
3375 goto fail_free_tgt_mem
;
3377 ha
->srb_mempool
= mempool_create_slab_pool(SRB_MIN_REQ
, srb_cachep
);
3378 if (!ha
->srb_mempool
)
3379 goto fail_free_gid_list
;
3381 if (IS_P3P_TYPE(ha
)) {
3382 /* Allocate cache for CT6 Ctx. */
3384 ctx_cachep
= kmem_cache_create("qla2xxx_ctx",
3385 sizeof(struct ct6_dsd
), 0,
3386 SLAB_HWCACHE_ALIGN
, NULL
);
3388 goto fail_free_gid_list
;
3390 ha
->ctx_mempool
= mempool_create_slab_pool(SRB_MIN_REQ
,
3392 if (!ha
->ctx_mempool
)
3393 goto fail_free_srb_mempool
;
3394 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0021,
3395 "ctx_cachep=%p ctx_mempool=%p.\n",
3396 ctx_cachep
, ha
->ctx_mempool
);
3399 /* Get memory for cached NVRAM */
3400 ha
->nvram
= kzalloc(MAX_NVRAM_SIZE
, GFP_KERNEL
);
3402 goto fail_free_ctx_mempool
;
3404 snprintf(name
, sizeof(name
), "%s_%d", QLA2XXX_DRIVER_NAME
,
3406 ha
->s_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
3407 DMA_POOL_SIZE
, 8, 0);
3408 if (!ha
->s_dma_pool
)
3409 goto fail_free_nvram
;
3411 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0022,
3412 "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3413 ha
->init_cb
, ha
->gid_list
, ha
->srb_mempool
, ha
->s_dma_pool
);
3415 if (IS_P3P_TYPE(ha
) || ql2xenabledif
) {
3416 ha
->dl_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
3417 DSD_LIST_DMA_POOL_SIZE
, 8, 0);
3418 if (!ha
->dl_dma_pool
) {
3419 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0023,
3420 "Failed to allocate memory for dl_dma_pool.\n");
3421 goto fail_s_dma_pool
;
3424 ha
->fcp_cmnd_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
3425 FCP_CMND_DMA_POOL_SIZE
, 8, 0);
3426 if (!ha
->fcp_cmnd_dma_pool
) {
3427 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0024,
3428 "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3429 goto fail_dl_dma_pool
;
3431 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0025,
3432 "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3433 ha
->dl_dma_pool
, ha
->fcp_cmnd_dma_pool
);
3436 /* Allocate memory for SNS commands */
3437 if (IS_QLA2100(ha
) || IS_QLA2200(ha
)) {
3438 /* Get consistent memory allocated for SNS commands */
3439 ha
->sns_cmd
= dma_alloc_coherent(&ha
->pdev
->dev
,
3440 sizeof(struct sns_cmd_pkt
), &ha
->sns_cmd_dma
, GFP_KERNEL
);
3443 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0026,
3444 "sns_cmd: %p.\n", ha
->sns_cmd
);
3446 /* Get consistent memory allocated for MS IOCB */
3447 ha
->ms_iocb
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
3451 /* Get consistent memory allocated for CT SNS commands */
3452 ha
->ct_sns
= dma_alloc_coherent(&ha
->pdev
->dev
,
3453 sizeof(struct ct_sns_pkt
), &ha
->ct_sns_dma
, GFP_KERNEL
);
3455 goto fail_free_ms_iocb
;
3456 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0027,
3457 "ms_iocb=%p ct_sns=%p.\n",
3458 ha
->ms_iocb
, ha
->ct_sns
);
3461 /* Allocate memory for request ring */
3462 *req
= kzalloc(sizeof(struct req_que
), GFP_KERNEL
);
3464 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0028,
3465 "Failed to allocate memory for req.\n");
3468 (*req
)->length
= req_len
;
3469 (*req
)->ring
= dma_alloc_coherent(&ha
->pdev
->dev
,
3470 ((*req
)->length
+ 1) * sizeof(request_t
),
3471 &(*req
)->dma
, GFP_KERNEL
);
3472 if (!(*req
)->ring
) {
3473 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0029,
3474 "Failed to allocate memory for req_ring.\n");
3477 /* Allocate memory for response ring */
3478 *rsp
= kzalloc(sizeof(struct rsp_que
), GFP_KERNEL
);
3480 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002a,
3481 "Failed to allocate memory for rsp.\n");
3485 (*rsp
)->length
= rsp_len
;
3486 (*rsp
)->ring
= dma_alloc_coherent(&ha
->pdev
->dev
,
3487 ((*rsp
)->length
+ 1) * sizeof(response_t
),
3488 &(*rsp
)->dma
, GFP_KERNEL
);
3489 if (!(*rsp
)->ring
) {
3490 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002b,
3491 "Failed to allocate memory for rsp_ring.\n");
3496 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002c,
3497 "req=%p req->length=%d req->ring=%p rsp=%p "
3498 "rsp->length=%d rsp->ring=%p.\n",
3499 *req
, (*req
)->length
, (*req
)->ring
, *rsp
, (*rsp
)->length
,
3501 /* Allocate memory for NVRAM data for vports */
3502 if (ha
->nvram_npiv_size
) {
3503 ha
->npiv_info
= kzalloc(sizeof(struct qla_npiv_entry
) *
3504 ha
->nvram_npiv_size
, GFP_KERNEL
);
3505 if (!ha
->npiv_info
) {
3506 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002d,
3507 "Failed to allocate memory for npiv_info.\n");
3508 goto fail_npiv_info
;
3511 ha
->npiv_info
= NULL
;
3513 /* Get consistent memory allocated for EX-INIT-CB. */
3514 if (IS_CNA_CAPABLE(ha
) || IS_QLA2031(ha
) || IS_QLA27XX(ha
)) {
3515 ha
->ex_init_cb
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
3516 &ha
->ex_init_cb_dma
);
3517 if (!ha
->ex_init_cb
)
3518 goto fail_ex_init_cb
;
3519 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002e,
3520 "ex_init_cb=%p.\n", ha
->ex_init_cb
);
3523 INIT_LIST_HEAD(&ha
->gbl_dsd_list
);
3525 /* Get consistent memory allocated for Async Port-Database. */
3526 if (!IS_FWI2_CAPABLE(ha
)) {
3527 ha
->async_pd
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
3531 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002f,
3532 "async_pd=%p.\n", ha
->async_pd
);
3535 INIT_LIST_HEAD(&ha
->vp_list
);
3537 /* Allocate memory for our loop_id bitmap */
3538 ha
->loop_id_map
= kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE
) * sizeof(long),
3540 if (!ha
->loop_id_map
)
3543 qla2x00_set_reserved_loop_ids(ha
);
3544 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0123,
3545 "loop_id_map=%p. \n", ha
->loop_id_map
);
3551 dma_pool_free(ha
->s_dma_pool
, ha
->ex_init_cb
, ha
->ex_init_cb_dma
);
3553 kfree(ha
->npiv_info
);
3555 dma_free_coherent(&ha
->pdev
->dev
, ((*rsp
)->length
+ 1) *
3556 sizeof(response_t
), (*rsp
)->ring
, (*rsp
)->dma
);
3557 (*rsp
)->ring
= NULL
;
3562 dma_free_coherent(&ha
->pdev
->dev
, ((*req
)->length
+ 1) *
3563 sizeof(request_t
), (*req
)->ring
, (*req
)->dma
);
3564 (*req
)->ring
= NULL
;
3569 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct ct_sns_pkt
),
3570 ha
->ct_sns
, ha
->ct_sns_dma
);
3574 dma_pool_free(ha
->s_dma_pool
, ha
->ms_iocb
, ha
->ms_iocb_dma
);
3576 ha
->ms_iocb_dma
= 0;
3578 if (IS_QLA82XX(ha
) || ql2xenabledif
) {
3579 dma_pool_destroy(ha
->fcp_cmnd_dma_pool
);
3580 ha
->fcp_cmnd_dma_pool
= NULL
;
3583 if (IS_QLA82XX(ha
) || ql2xenabledif
) {
3584 dma_pool_destroy(ha
->dl_dma_pool
);
3585 ha
->dl_dma_pool
= NULL
;
3588 dma_pool_destroy(ha
->s_dma_pool
);
3589 ha
->s_dma_pool
= NULL
;
3593 fail_free_ctx_mempool
:
3594 mempool_destroy(ha
->ctx_mempool
);
3595 ha
->ctx_mempool
= NULL
;
3596 fail_free_srb_mempool
:
3597 mempool_destroy(ha
->srb_mempool
);
3598 ha
->srb_mempool
= NULL
;
3600 dma_free_coherent(&ha
->pdev
->dev
, qla2x00_gid_list_size(ha
),
3603 ha
->gid_list
= NULL
;
3604 ha
->gid_list_dma
= 0;
3608 dma_free_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
, ha
->init_cb
,
3611 ha
->init_cb_dma
= 0;
3613 ql_log(ql_log_fatal
, NULL
, 0x0030,
3614 "Memory allocation failure.\n");
3619 * qla2x00_free_fw_dump
3620 * Frees fw dump stuff.
3623 * ha = adapter block pointer
3626 qla2x00_free_fw_dump(struct qla_hw_data
*ha
)
3629 dma_free_coherent(&ha
->pdev
->dev
,
3630 FCE_SIZE
, ha
->fce
, ha
->fce_dma
);
3633 dma_free_coherent(&ha
->pdev
->dev
,
3634 EFT_SIZE
, ha
->eft
, ha
->eft_dma
);
3638 if (ha
->fw_dump_template
)
3639 vfree(ha
->fw_dump_template
);
3646 ha
->fw_dump_reading
= 0;
3648 ha
->fw_dump_len
= 0;
3649 ha
->fw_dump_template
= NULL
;
3650 ha
->fw_dump_template_len
= 0;
3655 * Frees all adapter allocated memory.
3658 * ha = adapter block pointer.
3661 qla2x00_mem_free(struct qla_hw_data
*ha
)
3663 qla2x00_free_fw_dump(ha
);
3666 dma_free_coherent(&ha
->pdev
->dev
, MCTP_DUMP_SIZE
, ha
->mctp_dump
,
3669 if (ha
->srb_mempool
)
3670 mempool_destroy(ha
->srb_mempool
);
3673 dma_free_coherent(&ha
->pdev
->dev
, DCBX_TLV_DATA_SIZE
,
3674 ha
->dcbx_tlv
, ha
->dcbx_tlv_dma
);
3677 dma_free_coherent(&ha
->pdev
->dev
, XGMAC_DATA_SIZE
,
3678 ha
->xgmac_data
, ha
->xgmac_data_dma
);
3681 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct sns_cmd_pkt
),
3682 ha
->sns_cmd
, ha
->sns_cmd_dma
);
3685 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct ct_sns_pkt
),
3686 ha
->ct_sns
, ha
->ct_sns_dma
);
3689 dma_pool_free(ha
->s_dma_pool
, ha
->sfp_data
, ha
->sfp_data_dma
);
3692 dma_pool_free(ha
->s_dma_pool
, ha
->ms_iocb
, ha
->ms_iocb_dma
);
3695 dma_pool_free(ha
->s_dma_pool
,
3696 ha
->ex_init_cb
, ha
->ex_init_cb_dma
);
3699 dma_pool_free(ha
->s_dma_pool
, ha
->async_pd
, ha
->async_pd_dma
);
3702 dma_pool_destroy(ha
->s_dma_pool
);
3705 dma_free_coherent(&ha
->pdev
->dev
, qla2x00_gid_list_size(ha
),
3706 ha
->gid_list
, ha
->gid_list_dma
);
3708 if (IS_QLA82XX(ha
)) {
3709 if (!list_empty(&ha
->gbl_dsd_list
)) {
3710 struct dsd_dma
*dsd_ptr
, *tdsd_ptr
;
3712 /* clean up allocated prev pool */
3713 list_for_each_entry_safe(dsd_ptr
,
3714 tdsd_ptr
, &ha
->gbl_dsd_list
, list
) {
3715 dma_pool_free(ha
->dl_dma_pool
,
3716 dsd_ptr
->dsd_addr
, dsd_ptr
->dsd_list_dma
);
3717 list_del(&dsd_ptr
->list
);
3723 if (ha
->dl_dma_pool
)
3724 dma_pool_destroy(ha
->dl_dma_pool
);
3726 if (ha
->fcp_cmnd_dma_pool
)
3727 dma_pool_destroy(ha
->fcp_cmnd_dma_pool
);
3729 if (ha
->ctx_mempool
)
3730 mempool_destroy(ha
->ctx_mempool
);
3735 dma_free_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
,
3736 ha
->init_cb
, ha
->init_cb_dma
);
3737 vfree(ha
->optrom_buffer
);
3739 kfree(ha
->npiv_info
);
3741 kfree(ha
->loop_id_map
);
3743 ha
->srb_mempool
= NULL
;
3744 ha
->ctx_mempool
= NULL
;
3746 ha
->sns_cmd_dma
= 0;
3750 ha
->ms_iocb_dma
= 0;
3752 ha
->init_cb_dma
= 0;
3753 ha
->ex_init_cb
= NULL
;
3754 ha
->ex_init_cb_dma
= 0;
3755 ha
->async_pd
= NULL
;
3756 ha
->async_pd_dma
= 0;
3758 ha
->s_dma_pool
= NULL
;
3759 ha
->dl_dma_pool
= NULL
;
3760 ha
->fcp_cmnd_dma_pool
= NULL
;
3762 ha
->gid_list
= NULL
;
3763 ha
->gid_list_dma
= 0;
3765 ha
->tgt
.atio_ring
= NULL
;
3766 ha
->tgt
.atio_dma
= 0;
3767 ha
->tgt
.tgt_vp_map
= NULL
;
3770 struct scsi_qla_host
*qla2x00_create_host(struct scsi_host_template
*sht
,
3771 struct qla_hw_data
*ha
)
3773 struct Scsi_Host
*host
;
3774 struct scsi_qla_host
*vha
= NULL
;
3776 host
= scsi_host_alloc(sht
, sizeof(scsi_qla_host_t
));
3778 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0107,
3779 "Failed to allocate host from the scsi layer, aborting.\n");
3783 /* Clear our data area */
3784 vha
= shost_priv(host
);
3785 memset(vha
, 0, sizeof(scsi_qla_host_t
));
3788 vha
->host_no
= host
->host_no
;
3791 INIT_LIST_HEAD(&vha
->vp_fcports
);
3792 INIT_LIST_HEAD(&vha
->work_list
);
3793 INIT_LIST_HEAD(&vha
->list
);
3795 spin_lock_init(&vha
->work_lock
);
3797 sprintf(vha
->host_str
, "%s_%ld", QLA2XXX_DRIVER_NAME
, vha
->host_no
);
3798 ql_dbg(ql_dbg_init
, vha
, 0x0041,
3799 "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3800 vha
->host
, vha
->hw
, vha
,
3801 dev_name(&(ha
->pdev
->dev
)));
3809 static struct qla_work_evt
*
3810 qla2x00_alloc_work(struct scsi_qla_host
*vha
, enum qla_work_type type
)
3812 struct qla_work_evt
*e
;
3815 QLA_VHA_MARK_BUSY(vha
, bail
);
3819 e
= kzalloc(sizeof(struct qla_work_evt
), GFP_ATOMIC
);
3821 QLA_VHA_MARK_NOT_BUSY(vha
);
3825 INIT_LIST_HEAD(&e
->list
);
3827 e
->flags
= QLA_EVT_FLAG_FREE
;
3832 qla2x00_post_work(struct scsi_qla_host
*vha
, struct qla_work_evt
*e
)
3834 unsigned long flags
;
3836 spin_lock_irqsave(&vha
->work_lock
, flags
);
3837 list_add_tail(&e
->list
, &vha
->work_list
);
3838 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
3839 qla2xxx_wake_dpc(vha
);
3845 qla2x00_post_aen_work(struct scsi_qla_host
*vha
, enum fc_host_event_code code
,
3848 struct qla_work_evt
*e
;
3850 e
= qla2x00_alloc_work(vha
, QLA_EVT_AEN
);
3852 return QLA_FUNCTION_FAILED
;
3854 e
->u
.aen
.code
= code
;
3855 e
->u
.aen
.data
= data
;
3856 return qla2x00_post_work(vha
, e
);
3860 qla2x00_post_idc_ack_work(struct scsi_qla_host
*vha
, uint16_t *mb
)
3862 struct qla_work_evt
*e
;
3864 e
= qla2x00_alloc_work(vha
, QLA_EVT_IDC_ACK
);
3866 return QLA_FUNCTION_FAILED
;
3868 memcpy(e
->u
.idc_ack
.mb
, mb
, QLA_IDC_ACK_REGS
* sizeof(uint16_t));
3869 return qla2x00_post_work(vha
, e
);
3872 #define qla2x00_post_async_work(name, type) \
3873 int qla2x00_post_async_##name##_work( \
3874 struct scsi_qla_host *vha, \
3875 fc_port_t *fcport, uint16_t *data) \
3877 struct qla_work_evt *e; \
3879 e = qla2x00_alloc_work(vha, type); \
3881 return QLA_FUNCTION_FAILED; \
3883 e->u.logio.fcport = fcport; \
3885 e->u.logio.data[0] = data[0]; \
3886 e->u.logio.data[1] = data[1]; \
3888 return qla2x00_post_work(vha, e); \
3891 qla2x00_post_async_work(login
, QLA_EVT_ASYNC_LOGIN
);
3892 qla2x00_post_async_work(login_done
, QLA_EVT_ASYNC_LOGIN_DONE
);
3893 qla2x00_post_async_work(logout
, QLA_EVT_ASYNC_LOGOUT
);
3894 qla2x00_post_async_work(logout_done
, QLA_EVT_ASYNC_LOGOUT_DONE
);
3895 qla2x00_post_async_work(adisc
, QLA_EVT_ASYNC_ADISC
);
3896 qla2x00_post_async_work(adisc_done
, QLA_EVT_ASYNC_ADISC_DONE
);
3899 qla2x00_post_uevent_work(struct scsi_qla_host
*vha
, u32 code
)
3901 struct qla_work_evt
*e
;
3903 e
= qla2x00_alloc_work(vha
, QLA_EVT_UEVENT
);
3905 return QLA_FUNCTION_FAILED
;
3907 e
->u
.uevent
.code
= code
;
3908 return qla2x00_post_work(vha
, e
);
3912 qla2x00_uevent_emit(struct scsi_qla_host
*vha
, u32 code
)
3914 char event_string
[40];
3915 char *envp
[] = { event_string
, NULL
};
3918 case QLA_UEVENT_CODE_FW_DUMP
:
3919 snprintf(event_string
, sizeof(event_string
), "FW_DUMP=%ld",
3926 kobject_uevent_env(&vha
->hw
->pdev
->dev
.kobj
, KOBJ_CHANGE
, envp
);
3930 qlafx00_post_aenfx_work(struct scsi_qla_host
*vha
, uint32_t evtcode
,
3931 uint32_t *data
, int cnt
)
3933 struct qla_work_evt
*e
;
3935 e
= qla2x00_alloc_work(vha
, QLA_EVT_AENFX
);
3937 return QLA_FUNCTION_FAILED
;
3939 e
->u
.aenfx
.evtcode
= evtcode
;
3940 e
->u
.aenfx
.count
= cnt
;
3941 memcpy(e
->u
.aenfx
.mbx
, data
, sizeof(*data
) * cnt
);
3942 return qla2x00_post_work(vha
, e
);
3946 qla2x00_do_work(struct scsi_qla_host
*vha
)
3948 struct qla_work_evt
*e
, *tmp
;
3949 unsigned long flags
;
3952 spin_lock_irqsave(&vha
->work_lock
, flags
);
3953 list_splice_init(&vha
->work_list
, &work
);
3954 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
3956 list_for_each_entry_safe(e
, tmp
, &work
, list
) {
3957 list_del_init(&e
->list
);
3961 fc_host_post_event(vha
->host
, fc_get_event_number(),
3962 e
->u
.aen
.code
, e
->u
.aen
.data
);
3964 case QLA_EVT_IDC_ACK
:
3965 qla81xx_idc_ack(vha
, e
->u
.idc_ack
.mb
);
3967 case QLA_EVT_ASYNC_LOGIN
:
3968 qla2x00_async_login(vha
, e
->u
.logio
.fcport
,
3971 case QLA_EVT_ASYNC_LOGIN_DONE
:
3972 qla2x00_async_login_done(vha
, e
->u
.logio
.fcport
,
3975 case QLA_EVT_ASYNC_LOGOUT
:
3976 qla2x00_async_logout(vha
, e
->u
.logio
.fcport
);
3978 case QLA_EVT_ASYNC_LOGOUT_DONE
:
3979 qla2x00_async_logout_done(vha
, e
->u
.logio
.fcport
,
3982 case QLA_EVT_ASYNC_ADISC
:
3983 qla2x00_async_adisc(vha
, e
->u
.logio
.fcport
,
3986 case QLA_EVT_ASYNC_ADISC_DONE
:
3987 qla2x00_async_adisc_done(vha
, e
->u
.logio
.fcport
,
3990 case QLA_EVT_UEVENT
:
3991 qla2x00_uevent_emit(vha
, e
->u
.uevent
.code
);
3994 qlafx00_process_aen(vha
, e
);
3997 if (e
->flags
& QLA_EVT_FLAG_FREE
)
4000 /* For each work completed decrement vha ref count */
4001 QLA_VHA_MARK_NOT_BUSY(vha
);
4005 /* Relogins all the fcports of a vport
4006 * Context: dpc thread
4008 void qla2x00_relogin(struct scsi_qla_host
*vha
)
4012 uint16_t next_loopid
= 0;
4013 struct qla_hw_data
*ha
= vha
->hw
;
4016 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
4018 * If the port is not ONLINE then try to login
4019 * to it if we haven't run out of retries.
4021 if (atomic_read(&fcport
->state
) != FCS_ONLINE
&&
4022 fcport
->login_retry
&& !(fcport
->flags
& FCF_ASYNC_SENT
)) {
4023 fcport
->login_retry
--;
4024 if (fcport
->flags
& FCF_FABRIC_DEVICE
) {
4025 if (fcport
->flags
& FCF_FCP2_DEVICE
)
4026 ha
->isp_ops
->fabric_logout(vha
,
4028 fcport
->d_id
.b
.domain
,
4029 fcport
->d_id
.b
.area
,
4030 fcport
->d_id
.b
.al_pa
);
4032 if (fcport
->loop_id
== FC_NO_LOOP_ID
) {
4033 fcport
->loop_id
= next_loopid
=
4034 ha
->min_external_loopid
;
4035 status
= qla2x00_find_new_loop_id(
4037 if (status
!= QLA_SUCCESS
) {
4038 /* Ran out of IDs to use */
4043 if (IS_ALOGIO_CAPABLE(ha
)) {
4044 fcport
->flags
|= FCF_ASYNC_SENT
;
4046 data
[1] = QLA_LOGIO_LOGIN_RETRIED
;
4047 status
= qla2x00_post_async_login_work(
4049 if (status
== QLA_SUCCESS
)
4051 /* Attempt a retry. */
4054 status
= qla2x00_fabric_login(vha
,
4055 fcport
, &next_loopid
);
4056 if (status
== QLA_SUCCESS
) {
4065 qla2x00_get_port_database(
4067 if (status2
!= QLA_SUCCESS
)
4072 status
= qla2x00_local_device_login(vha
,
4075 if (status
== QLA_SUCCESS
) {
4076 fcport
->old_loop_id
= fcport
->loop_id
;
4078 ql_dbg(ql_dbg_disc
, vha
, 0x2003,
4079 "Port login OK: logged in ID 0x%x.\n",
4082 qla2x00_update_fcport(vha
, fcport
);
4084 } else if (status
== 1) {
4085 set_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
);
4086 /* retry the login again */
4087 ql_dbg(ql_dbg_disc
, vha
, 0x2007,
4088 "Retrying %d login again loop_id 0x%x.\n",
4089 fcport
->login_retry
, fcport
->loop_id
);
4091 fcport
->login_retry
= 0;
4094 if (fcport
->login_retry
== 0 && status
!= QLA_SUCCESS
)
4095 qla2x00_clear_loop_id(fcport
);
4097 if (test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
))
4102 /* Schedule work on any of the dpc-workqueues */
4104 qla83xx_schedule_work(scsi_qla_host_t
*base_vha
, int work_code
)
4106 struct qla_hw_data
*ha
= base_vha
->hw
;
4108 switch (work_code
) {
4109 case MBA_IDC_AEN
: /* 0x8200 */
4111 queue_work(ha
->dpc_lp_wq
, &ha
->idc_aen
);
4114 case QLA83XX_NIC_CORE_RESET
: /* 0x1 */
4115 if (!ha
->flags
.nic_core_reset_hdlr_active
) {
4117 queue_work(ha
->dpc_hp_wq
, &ha
->nic_core_reset
);
4119 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb05e,
4120 "NIC Core reset is already active. Skip "
4121 "scheduling it again.\n");
4123 case QLA83XX_IDC_STATE_HANDLER
: /* 0x2 */
4125 queue_work(ha
->dpc_hp_wq
, &ha
->idc_state_handler
);
4127 case QLA83XX_NIC_CORE_UNRECOVERABLE
: /* 0x3 */
4129 queue_work(ha
->dpc_hp_wq
, &ha
->nic_core_unrecoverable
);
4132 ql_log(ql_log_warn
, base_vha
, 0xb05f,
4133 "Unknow work-code=0x%x.\n", work_code
);
4139 /* Work: Perform NIC Core Unrecoverable state handling */
4141 qla83xx_nic_core_unrecoverable_work(struct work_struct
*work
)
4143 struct qla_hw_data
*ha
=
4144 container_of(work
, struct qla_hw_data
, nic_core_unrecoverable
);
4145 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
4146 uint32_t dev_state
= 0;
4148 qla83xx_idc_lock(base_vha
, 0);
4149 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
4150 qla83xx_reset_ownership(base_vha
);
4151 if (ha
->flags
.nic_core_reset_owner
) {
4152 ha
->flags
.nic_core_reset_owner
= 0;
4153 qla83xx_wr_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
4154 QLA8XXX_DEV_FAILED
);
4155 ql_log(ql_log_info
, base_vha
, 0xb060, "HW State: FAILED.\n");
4156 qla83xx_schedule_work(base_vha
, QLA83XX_IDC_STATE_HANDLER
);
4158 qla83xx_idc_unlock(base_vha
, 0);
4161 /* Work: Execute IDC state handler */
4163 qla83xx_idc_state_handler_work(struct work_struct
*work
)
4165 struct qla_hw_data
*ha
=
4166 container_of(work
, struct qla_hw_data
, idc_state_handler
);
4167 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
4168 uint32_t dev_state
= 0;
4170 qla83xx_idc_lock(base_vha
, 0);
4171 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
4172 if (dev_state
== QLA8XXX_DEV_FAILED
||
4173 dev_state
== QLA8XXX_DEV_NEED_QUIESCENT
)
4174 qla83xx_idc_state_handler(base_vha
);
4175 qla83xx_idc_unlock(base_vha
, 0);
4179 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t
*base_vha
)
4181 int rval
= QLA_SUCCESS
;
4182 unsigned long heart_beat_wait
= jiffies
+ (1 * HZ
);
4183 uint32_t heart_beat_counter1
, heart_beat_counter2
;
4186 if (time_after(jiffies
, heart_beat_wait
)) {
4187 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07c,
4188 "Nic Core f/w is not alive.\n");
4189 rval
= QLA_FUNCTION_FAILED
;
4193 qla83xx_idc_lock(base_vha
, 0);
4194 qla83xx_rd_reg(base_vha
, QLA83XX_FW_HEARTBEAT
,
4195 &heart_beat_counter1
);
4196 qla83xx_idc_unlock(base_vha
, 0);
4198 qla83xx_idc_lock(base_vha
, 0);
4199 qla83xx_rd_reg(base_vha
, QLA83XX_FW_HEARTBEAT
,
4200 &heart_beat_counter2
);
4201 qla83xx_idc_unlock(base_vha
, 0);
4202 } while (heart_beat_counter1
== heart_beat_counter2
);
4207 /* Work: Perform NIC Core Reset handling */
4209 qla83xx_nic_core_reset_work(struct work_struct
*work
)
4211 struct qla_hw_data
*ha
=
4212 container_of(work
, struct qla_hw_data
, nic_core_reset
);
4213 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
4214 uint32_t dev_state
= 0;
4216 if (IS_QLA2031(ha
)) {
4217 if (qla2xxx_mctp_dump(base_vha
) != QLA_SUCCESS
)
4218 ql_log(ql_log_warn
, base_vha
, 0xb081,
4219 "Failed to dump mctp\n");
4223 if (!ha
->flags
.nic_core_reset_hdlr_active
) {
4224 if (qla83xx_check_nic_core_fw_alive(base_vha
) == QLA_SUCCESS
) {
4225 qla83xx_idc_lock(base_vha
, 0);
4226 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
4228 qla83xx_idc_unlock(base_vha
, 0);
4229 if (dev_state
!= QLA8XXX_DEV_NEED_RESET
) {
4230 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07a,
4231 "Nic Core f/w is alive.\n");
4236 ha
->flags
.nic_core_reset_hdlr_active
= 1;
4237 if (qla83xx_nic_core_reset(base_vha
)) {
4238 /* NIC Core reset failed. */
4239 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb061,
4240 "NIC Core reset failed.\n");
4242 ha
->flags
.nic_core_reset_hdlr_active
= 0;
4246 /* Work: Handle 8200 IDC aens */
4248 qla83xx_service_idc_aen(struct work_struct
*work
)
4250 struct qla_hw_data
*ha
=
4251 container_of(work
, struct qla_hw_data
, idc_aen
);
4252 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
4253 uint32_t dev_state
, idc_control
;
4255 qla83xx_idc_lock(base_vha
, 0);
4256 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
4257 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_CONTROL
, &idc_control
);
4258 qla83xx_idc_unlock(base_vha
, 0);
4259 if (dev_state
== QLA8XXX_DEV_NEED_RESET
) {
4260 if (idc_control
& QLA83XX_IDC_GRACEFUL_RESET
) {
4261 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb062,
4262 "Application requested NIC Core Reset.\n");
4263 qla83xx_schedule_work(base_vha
, QLA83XX_NIC_CORE_RESET
);
4264 } else if (qla83xx_check_nic_core_fw_alive(base_vha
) ==
4266 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07b,
4267 "Other protocol driver requested NIC Core Reset.\n");
4268 qla83xx_schedule_work(base_vha
, QLA83XX_NIC_CORE_RESET
);
4270 } else if (dev_state
== QLA8XXX_DEV_FAILED
||
4271 dev_state
== QLA8XXX_DEV_NEED_QUIESCENT
) {
4272 qla83xx_schedule_work(base_vha
, QLA83XX_IDC_STATE_HANDLER
);
4277 qla83xx_wait_logic(void)
4282 if (!in_interrupt()) {
4284 * Wait about 200ms before retrying again.
4285 * This controls the number of retries for single
4291 for (i
= 0; i
< 20; i
++)
4292 cpu_relax(); /* This a nop instr on i386 */
4297 qla83xx_force_lock_recovery(scsi_qla_host_t
*base_vha
)
4301 uint32_t idc_lck_rcvry_stage_mask
= 0x3;
4302 uint32_t idc_lck_rcvry_owner_mask
= 0x3c;
4303 struct qla_hw_data
*ha
= base_vha
->hw
;
4304 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb086,
4305 "Trying force recovery of the IDC lock.\n");
4307 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
, &data
);
4311 if ((data
& idc_lck_rcvry_stage_mask
) > 0) {
4314 data
= (IDC_LOCK_RECOVERY_STAGE1
) | (ha
->portnum
<< 2);
4315 rval
= qla83xx_wr_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
,
4322 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
,
4327 if (((data
& idc_lck_rcvry_owner_mask
) >> 2) == ha
->portnum
) {
4328 data
&= (IDC_LOCK_RECOVERY_STAGE2
|
4329 ~(idc_lck_rcvry_stage_mask
));
4330 rval
= qla83xx_wr_reg(base_vha
,
4331 QLA83XX_IDC_LOCK_RECOVERY
, data
);
4335 /* Forcefully perform IDC UnLock */
4336 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_UNLOCK
,
4340 /* Clear lock-id by setting 0xff */
4341 rval
= qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
4345 /* Clear lock-recovery by setting 0x0 */
4346 rval
= qla83xx_wr_reg(base_vha
,
4347 QLA83XX_IDC_LOCK_RECOVERY
, 0x0);
4358 qla83xx_idc_lock_recovery(scsi_qla_host_t
*base_vha
)
4360 int rval
= QLA_SUCCESS
;
4361 uint32_t o_drv_lockid
, n_drv_lockid
;
4362 unsigned long lock_recovery_timeout
;
4364 lock_recovery_timeout
= jiffies
+ QLA83XX_MAX_LOCK_RECOVERY_WAIT
;
4366 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &o_drv_lockid
);
4370 /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4371 if (time_after_eq(jiffies
, lock_recovery_timeout
)) {
4372 if (qla83xx_force_lock_recovery(base_vha
) == QLA_SUCCESS
)
4375 return QLA_FUNCTION_FAILED
;
4378 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &n_drv_lockid
);
4382 if (o_drv_lockid
== n_drv_lockid
) {
4383 qla83xx_wait_logic();
4393 qla83xx_idc_lock(scsi_qla_host_t
*base_vha
, uint16_t requester_id
)
4395 uint16_t options
= (requester_id
<< 15) | BIT_6
;
4397 uint32_t lock_owner
;
4398 struct qla_hw_data
*ha
= base_vha
->hw
;
4400 /* IDC-lock implementation using driver-lock/lock-id remote registers */
4402 if (qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCK
, &data
)
4405 /* Setting lock-id to our function-number */
4406 qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
4409 qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
4411 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb063,
4412 "Failed to acquire IDC lock, acquired by %d, "
4413 "retrying...\n", lock_owner
);
4415 /* Retry/Perform IDC-Lock recovery */
4416 if (qla83xx_idc_lock_recovery(base_vha
)
4418 qla83xx_wait_logic();
4421 ql_log(ql_log_warn
, base_vha
, 0xb075,
4422 "IDC Lock recovery FAILED.\n");
4429 /* XXX: IDC-lock implementation using access-control mbx */
4431 if (qla83xx_access_control(base_vha
, options
, 0, 0, NULL
)) {
4432 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb072,
4433 "Failed to acquire IDC lock. retrying...\n");
4434 /* Retry/Perform IDC-Lock recovery */
4435 if (qla83xx_idc_lock_recovery(base_vha
) == QLA_SUCCESS
) {
4436 qla83xx_wait_logic();
4439 ql_log(ql_log_warn
, base_vha
, 0xb076,
4440 "IDC Lock recovery FAILED.\n");
4447 qla83xx_idc_unlock(scsi_qla_host_t
*base_vha
, uint16_t requester_id
)
4449 uint16_t options
= (requester_id
<< 15) | BIT_7
, retry
;
4451 struct qla_hw_data
*ha
= base_vha
->hw
;
4453 /* IDC-unlock implementation using driver-unlock/lock-id
4458 if (qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &data
)
4460 if (data
== ha
->portnum
) {
4461 qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_UNLOCK
, &data
);
4462 /* Clearing lock-id by setting 0xff */
4463 qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, 0xff);
4464 } else if (retry
< 10) {
4465 /* SV: XXX: IDC unlock retrying needed here? */
4467 /* Retry for IDC-unlock */
4468 qla83xx_wait_logic();
4470 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb064,
4471 "Failed to release IDC lock, retyring=%d\n", retry
);
4474 } else if (retry
< 10) {
4475 /* Retry for IDC-unlock */
4476 qla83xx_wait_logic();
4478 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb065,
4479 "Failed to read drv-lockid, retyring=%d\n", retry
);
4485 /* XXX: IDC-unlock implementation using access-control mbx */
4488 if (qla83xx_access_control(base_vha
, options
, 0, 0, NULL
)) {
4490 /* Retry for IDC-unlock */
4491 qla83xx_wait_logic();
4493 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb066,
4494 "Failed to release IDC lock, retyring=%d\n", retry
);
4503 __qla83xx_set_drv_presence(scsi_qla_host_t
*vha
)
4505 int rval
= QLA_SUCCESS
;
4506 struct qla_hw_data
*ha
= vha
->hw
;
4507 uint32_t drv_presence
;
4509 rval
= qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
4510 if (rval
== QLA_SUCCESS
) {
4511 drv_presence
|= (1 << ha
->portnum
);
4512 rval
= qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
4520 qla83xx_set_drv_presence(scsi_qla_host_t
*vha
)
4522 int rval
= QLA_SUCCESS
;
4524 qla83xx_idc_lock(vha
, 0);
4525 rval
= __qla83xx_set_drv_presence(vha
);
4526 qla83xx_idc_unlock(vha
, 0);
4532 __qla83xx_clear_drv_presence(scsi_qla_host_t
*vha
)
4534 int rval
= QLA_SUCCESS
;
4535 struct qla_hw_data
*ha
= vha
->hw
;
4536 uint32_t drv_presence
;
4538 rval
= qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
4539 if (rval
== QLA_SUCCESS
) {
4540 drv_presence
&= ~(1 << ha
->portnum
);
4541 rval
= qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
4549 qla83xx_clear_drv_presence(scsi_qla_host_t
*vha
)
4551 int rval
= QLA_SUCCESS
;
4553 qla83xx_idc_lock(vha
, 0);
4554 rval
= __qla83xx_clear_drv_presence(vha
);
4555 qla83xx_idc_unlock(vha
, 0);
4561 qla83xx_need_reset_handler(scsi_qla_host_t
*vha
)
4563 struct qla_hw_data
*ha
= vha
->hw
;
4564 uint32_t drv_ack
, drv_presence
;
4565 unsigned long ack_timeout
;
4567 /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4568 ack_timeout
= jiffies
+ (ha
->fcoe_reset_timeout
* HZ
);
4570 qla83xx_rd_reg(vha
, QLA83XX_IDC_DRIVER_ACK
, &drv_ack
);
4571 qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
4572 if ((drv_ack
& drv_presence
) == drv_presence
)
4575 if (time_after_eq(jiffies
, ack_timeout
)) {
4576 ql_log(ql_log_warn
, vha
, 0xb067,
4577 "RESET ACK TIMEOUT! drv_presence=0x%x "
4578 "drv_ack=0x%x\n", drv_presence
, drv_ack
);
4580 * The function(s) which did not ack in time are forced
4581 * to withdraw any further participation in the IDC
4584 if (drv_ack
!= drv_presence
)
4585 qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
4590 qla83xx_idc_unlock(vha
, 0);
4592 qla83xx_idc_lock(vha
, 0);
4595 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_COLD
);
4596 ql_log(ql_log_info
, vha
, 0xb068, "HW State: COLD/RE-INIT.\n");
4600 qla83xx_device_bootstrap(scsi_qla_host_t
*vha
)
4602 int rval
= QLA_SUCCESS
;
4603 uint32_t idc_control
;
4605 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_INITIALIZING
);
4606 ql_log(ql_log_info
, vha
, 0xb069, "HW State: INITIALIZING.\n");
4608 /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4609 __qla83xx_get_idc_control(vha
, &idc_control
);
4610 idc_control
&= ~QLA83XX_IDC_GRACEFUL_RESET
;
4611 __qla83xx_set_idc_control(vha
, 0);
4613 qla83xx_idc_unlock(vha
, 0);
4614 rval
= qla83xx_restart_nic_firmware(vha
);
4615 qla83xx_idc_lock(vha
, 0);
4617 if (rval
!= QLA_SUCCESS
) {
4618 ql_log(ql_log_fatal
, vha
, 0xb06a,
4619 "Failed to restart NIC f/w.\n");
4620 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_FAILED
);
4621 ql_log(ql_log_info
, vha
, 0xb06b, "HW State: FAILED.\n");
4623 ql_dbg(ql_dbg_p3p
, vha
, 0xb06c,
4624 "Success in restarting nic f/w.\n");
4625 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_READY
);
4626 ql_log(ql_log_info
, vha
, 0xb06d, "HW State: READY.\n");
4632 /* Assumes idc_lock always held on entry */
4634 qla83xx_idc_state_handler(scsi_qla_host_t
*base_vha
)
4636 struct qla_hw_data
*ha
= base_vha
->hw
;
4637 int rval
= QLA_SUCCESS
;
4638 unsigned long dev_init_timeout
;
4641 /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4642 dev_init_timeout
= jiffies
+ (ha
->fcoe_dev_init_timeout
* HZ
);
4646 if (time_after_eq(jiffies
, dev_init_timeout
)) {
4647 ql_log(ql_log_warn
, base_vha
, 0xb06e,
4648 "Initialization TIMEOUT!\n");
4649 /* Init timeout. Disable further NIC Core
4652 qla83xx_wr_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
4653 QLA8XXX_DEV_FAILED
);
4654 ql_log(ql_log_info
, base_vha
, 0xb06f,
4655 "HW State: FAILED.\n");
4658 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
4659 switch (dev_state
) {
4660 case QLA8XXX_DEV_READY
:
4661 if (ha
->flags
.nic_core_reset_owner
)
4662 qla83xx_idc_audit(base_vha
,
4663 IDC_AUDIT_COMPLETION
);
4664 ha
->flags
.nic_core_reset_owner
= 0;
4665 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb070,
4666 "Reset_owner reset by 0x%x.\n",
4669 case QLA8XXX_DEV_COLD
:
4670 if (ha
->flags
.nic_core_reset_owner
)
4671 rval
= qla83xx_device_bootstrap(base_vha
);
4673 /* Wait for AEN to change device-state */
4674 qla83xx_idc_unlock(base_vha
, 0);
4676 qla83xx_idc_lock(base_vha
, 0);
4679 case QLA8XXX_DEV_INITIALIZING
:
4680 /* Wait for AEN to change device-state */
4681 qla83xx_idc_unlock(base_vha
, 0);
4683 qla83xx_idc_lock(base_vha
, 0);
4685 case QLA8XXX_DEV_NEED_RESET
:
4686 if (!ql2xdontresethba
&& ha
->flags
.nic_core_reset_owner
)
4687 qla83xx_need_reset_handler(base_vha
);
4689 /* Wait for AEN to change device-state */
4690 qla83xx_idc_unlock(base_vha
, 0);
4692 qla83xx_idc_lock(base_vha
, 0);
4694 /* reset timeout value after need reset handler */
4695 dev_init_timeout
= jiffies
+
4696 (ha
->fcoe_dev_init_timeout
* HZ
);
4698 case QLA8XXX_DEV_NEED_QUIESCENT
:
4699 /* XXX: DEBUG for now */
4700 qla83xx_idc_unlock(base_vha
, 0);
4702 qla83xx_idc_lock(base_vha
, 0);
4704 case QLA8XXX_DEV_QUIESCENT
:
4705 /* XXX: DEBUG for now */
4706 if (ha
->flags
.quiesce_owner
)
4709 qla83xx_idc_unlock(base_vha
, 0);
4711 qla83xx_idc_lock(base_vha
, 0);
4712 dev_init_timeout
= jiffies
+
4713 (ha
->fcoe_dev_init_timeout
* HZ
);
4715 case QLA8XXX_DEV_FAILED
:
4716 if (ha
->flags
.nic_core_reset_owner
)
4717 qla83xx_idc_audit(base_vha
,
4718 IDC_AUDIT_COMPLETION
);
4719 ha
->flags
.nic_core_reset_owner
= 0;
4720 __qla83xx_clear_drv_presence(base_vha
);
4721 qla83xx_idc_unlock(base_vha
, 0);
4722 qla8xxx_dev_failed_handler(base_vha
);
4723 rval
= QLA_FUNCTION_FAILED
;
4724 qla83xx_idc_lock(base_vha
, 0);
4726 case QLA8XXX_BAD_VALUE
:
4727 qla83xx_idc_unlock(base_vha
, 0);
4729 qla83xx_idc_lock(base_vha
, 0);
4732 ql_log(ql_log_warn
, base_vha
, 0xb071,
4733 "Unknow Device State: %x.\n", dev_state
);
4734 qla83xx_idc_unlock(base_vha
, 0);
4735 qla8xxx_dev_failed_handler(base_vha
);
4736 rval
= QLA_FUNCTION_FAILED
;
4737 qla83xx_idc_lock(base_vha
, 0);
4747 qla2x00_disable_board_on_pci_error(struct work_struct
*work
)
4749 struct qla_hw_data
*ha
= container_of(work
, struct qla_hw_data
,
4751 struct pci_dev
*pdev
= ha
->pdev
;
4752 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
4754 ql_log(ql_log_warn
, base_vha
, 0x015b,
4755 "Disabling adapter.\n");
4757 set_bit(UNLOADING
, &base_vha
->dpc_flags
);
4759 qla2x00_delete_all_vps(ha
, base_vha
);
4761 qla2x00_abort_all_cmds(base_vha
, DID_NO_CONNECT
<< 16);
4763 qla2x00_dfs_remove(base_vha
);
4765 qla84xx_put_chip(base_vha
);
4767 if (base_vha
->timer_active
)
4768 qla2x00_stop_timer(base_vha
);
4770 base_vha
->flags
.online
= 0;
4772 qla2x00_destroy_deferred_work(ha
);
4775 * Do not try to stop beacon blink as it will issue a mailbox
4778 qla2x00_free_sysfs_attr(base_vha
, false);
4780 fc_remove_host(base_vha
->host
);
4782 scsi_remove_host(base_vha
->host
);
4784 base_vha
->flags
.init_done
= 0;
4785 qla25xx_delete_queues(base_vha
);
4786 qla2x00_free_irqs(base_vha
);
4787 qla2x00_free_fcports(base_vha
);
4788 qla2x00_mem_free(ha
);
4789 qla82xx_md_free(base_vha
);
4790 qla2x00_free_queues(ha
);
4792 scsi_host_put(base_vha
->host
);
4794 qla2x00_unmap_iobases(ha
);
4796 pci_release_selected_regions(ha
->pdev
, ha
->bars
);
4800 pci_disable_pcie_error_reporting(pdev
);
4801 pci_disable_device(pdev
);
4802 pci_set_drvdata(pdev
, NULL
);
4806 /**************************************************************************
4808 * This kernel thread is a task that is schedule by the interrupt handler
4809 * to perform the background processing for interrupts.
4812 * This task always run in the context of a kernel thread. It
4813 * is kick-off by the driver's detect code and starts up
4814 * up one per adapter. It immediately goes to sleep and waits for
4815 * some fibre event. When either the interrupt handler or
4816 * the timer routine detects a event it will one of the task
4817 * bits then wake us up.
4818 **************************************************************************/
4820 qla2x00_do_dpc(void *data
)
4823 scsi_qla_host_t
*base_vha
;
4824 struct qla_hw_data
*ha
;
4826 ha
= (struct qla_hw_data
*)data
;
4827 base_vha
= pci_get_drvdata(ha
->pdev
);
4829 set_user_nice(current
, -20);
4831 set_current_state(TASK_INTERRUPTIBLE
);
4832 while (!kthread_should_stop()) {
4833 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4000,
4834 "DPC handler sleeping.\n");
4837 __set_current_state(TASK_RUNNING
);
4839 if (!base_vha
->flags
.init_done
|| ha
->flags
.mbox_busy
)
4842 if (ha
->flags
.eeh_busy
) {
4843 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4003,
4844 "eeh_busy=%d.\n", ha
->flags
.eeh_busy
);
4850 ql_dbg(ql_dbg_dpc
+ ql_dbg_verbose
, base_vha
, 0x4001,
4851 "DPC handler waking up, dpc_flags=0x%lx.\n",
4852 base_vha
->dpc_flags
);
4854 qla2x00_do_work(base_vha
);
4856 if (IS_P3P_TYPE(ha
)) {
4857 if (IS_QLA8044(ha
)) {
4858 if (test_and_clear_bit(ISP_UNRECOVERABLE
,
4859 &base_vha
->dpc_flags
)) {
4860 qla8044_idc_lock(ha
);
4861 qla8044_wr_direct(base_vha
,
4862 QLA8044_CRB_DEV_STATE_INDEX
,
4863 QLA8XXX_DEV_FAILED
);
4864 qla8044_idc_unlock(ha
);
4865 ql_log(ql_log_info
, base_vha
, 0x4004,
4866 "HW State: FAILED.\n");
4867 qla8044_device_state_handler(base_vha
);
4872 if (test_and_clear_bit(ISP_UNRECOVERABLE
,
4873 &base_vha
->dpc_flags
)) {
4874 qla82xx_idc_lock(ha
);
4875 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
4876 QLA8XXX_DEV_FAILED
);
4877 qla82xx_idc_unlock(ha
);
4878 ql_log(ql_log_info
, base_vha
, 0x0151,
4879 "HW State: FAILED.\n");
4880 qla82xx_device_state_handler(base_vha
);
4885 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED
,
4886 &base_vha
->dpc_flags
)) {
4888 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4005,
4889 "FCoE context reset scheduled.\n");
4890 if (!(test_and_set_bit(ABORT_ISP_ACTIVE
,
4891 &base_vha
->dpc_flags
))) {
4892 if (qla82xx_fcoe_ctx_reset(base_vha
)) {
4893 /* FCoE-ctx reset failed.
4894 * Escalate to chip-reset
4896 set_bit(ISP_ABORT_NEEDED
,
4897 &base_vha
->dpc_flags
);
4899 clear_bit(ABORT_ISP_ACTIVE
,
4900 &base_vha
->dpc_flags
);
4903 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4006,
4904 "FCoE context reset end.\n");
4906 } else if (IS_QLAFX00(ha
)) {
4907 if (test_and_clear_bit(ISP_UNRECOVERABLE
,
4908 &base_vha
->dpc_flags
)) {
4909 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4020,
4910 "Firmware Reset Recovery\n");
4911 if (qlafx00_reset_initialize(base_vha
)) {
4912 /* Failed. Abort isp later. */
4913 if (!test_bit(UNLOADING
,
4914 &base_vha
->dpc_flags
))
4915 set_bit(ISP_UNRECOVERABLE
,
4916 &base_vha
->dpc_flags
);
4917 ql_dbg(ql_dbg_dpc
, base_vha
,
4919 "Reset Recovery Failed\n");
4923 if (test_and_clear_bit(FX00_TARGET_SCAN
,
4924 &base_vha
->dpc_flags
)) {
4925 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4022,
4926 "ISPFx00 Target Scan scheduled\n");
4927 if (qlafx00_rescan_isp(base_vha
)) {
4928 if (!test_bit(UNLOADING
,
4929 &base_vha
->dpc_flags
))
4930 set_bit(ISP_UNRECOVERABLE
,
4931 &base_vha
->dpc_flags
);
4932 ql_dbg(ql_dbg_dpc
, base_vha
, 0x401e,
4933 "ISPFx00 Target Scan Failed\n");
4935 ql_dbg(ql_dbg_dpc
, base_vha
, 0x401f,
4936 "ISPFx00 Target Scan End\n");
4938 if (test_and_clear_bit(FX00_HOST_INFO_RESEND
,
4939 &base_vha
->dpc_flags
)) {
4940 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4023,
4941 "ISPFx00 Host Info resend scheduled\n");
4942 qlafx00_fx_disc(base_vha
,
4943 &base_vha
->hw
->mr
.fcport
,
4944 FXDISC_REG_HOST_INFO
);
4948 if (test_and_clear_bit(ISP_ABORT_NEEDED
,
4949 &base_vha
->dpc_flags
)) {
4951 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4007,
4952 "ISP abort scheduled.\n");
4953 if (!(test_and_set_bit(ABORT_ISP_ACTIVE
,
4954 &base_vha
->dpc_flags
))) {
4956 if (ha
->isp_ops
->abort_isp(base_vha
)) {
4957 /* failed. retry later */
4958 set_bit(ISP_ABORT_NEEDED
,
4959 &base_vha
->dpc_flags
);
4961 clear_bit(ABORT_ISP_ACTIVE
,
4962 &base_vha
->dpc_flags
);
4965 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4008,
4966 "ISP abort end.\n");
4969 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED
,
4970 &base_vha
->dpc_flags
)) {
4971 qla2x00_update_fcports(base_vha
);
4974 if (test_bit(SCR_PENDING
, &base_vha
->dpc_flags
)) {
4976 ret
= qla2x00_send_change_request(base_vha
, 0x3, 0);
4977 if (ret
!= QLA_SUCCESS
)
4978 ql_log(ql_log_warn
, base_vha
, 0x121,
4979 "Failed to enable receiving of RSCN "
4980 "requests: 0x%x.\n", ret
);
4981 clear_bit(SCR_PENDING
, &base_vha
->dpc_flags
);
4985 goto loop_resync_check
;
4987 if (test_bit(ISP_QUIESCE_NEEDED
, &base_vha
->dpc_flags
)) {
4988 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4009,
4989 "Quiescence mode scheduled.\n");
4990 if (IS_P3P_TYPE(ha
)) {
4992 qla82xx_device_state_handler(base_vha
);
4994 qla8044_device_state_handler(base_vha
);
4995 clear_bit(ISP_QUIESCE_NEEDED
,
4996 &base_vha
->dpc_flags
);
4997 if (!ha
->flags
.quiesce_owner
) {
4998 qla2x00_perform_loop_resync(base_vha
);
4999 if (IS_QLA82XX(ha
)) {
5000 qla82xx_idc_lock(ha
);
5001 qla82xx_clear_qsnt_ready(
5003 qla82xx_idc_unlock(ha
);
5004 } else if (IS_QLA8044(ha
)) {
5005 qla8044_idc_lock(ha
);
5006 qla8044_clear_qsnt_ready(
5008 qla8044_idc_unlock(ha
);
5012 clear_bit(ISP_QUIESCE_NEEDED
,
5013 &base_vha
->dpc_flags
);
5014 qla2x00_quiesce_io(base_vha
);
5016 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400a,
5017 "Quiescence mode end.\n");
5020 if (test_and_clear_bit(RESET_MARKER_NEEDED
,
5021 &base_vha
->dpc_flags
) &&
5022 (!(test_and_set_bit(RESET_ACTIVE
, &base_vha
->dpc_flags
)))) {
5024 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400b,
5025 "Reset marker scheduled.\n");
5026 qla2x00_rst_aen(base_vha
);
5027 clear_bit(RESET_ACTIVE
, &base_vha
->dpc_flags
);
5028 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400c,
5029 "Reset marker end.\n");
5032 /* Retry each device up to login retry count */
5033 if ((test_and_clear_bit(RELOGIN_NEEDED
,
5034 &base_vha
->dpc_flags
)) &&
5035 !test_bit(LOOP_RESYNC_NEEDED
, &base_vha
->dpc_flags
) &&
5036 atomic_read(&base_vha
->loop_state
) != LOOP_DOWN
) {
5038 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400d,
5039 "Relogin scheduled.\n");
5040 qla2x00_relogin(base_vha
);
5041 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400e,
5045 if (test_and_clear_bit(LOOP_RESYNC_NEEDED
,
5046 &base_vha
->dpc_flags
)) {
5048 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400f,
5049 "Loop resync scheduled.\n");
5051 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE
,
5052 &base_vha
->dpc_flags
))) {
5054 rval
= qla2x00_loop_resync(base_vha
);
5056 clear_bit(LOOP_RESYNC_ACTIVE
,
5057 &base_vha
->dpc_flags
);
5060 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4010,
5061 "Loop resync end.\n");
5067 if (test_bit(NPIV_CONFIG_NEEDED
, &base_vha
->dpc_flags
) &&
5068 atomic_read(&base_vha
->loop_state
) == LOOP_READY
) {
5069 clear_bit(NPIV_CONFIG_NEEDED
, &base_vha
->dpc_flags
);
5070 qla2xxx_flash_npiv_conf(base_vha
);
5074 if (!ha
->interrupts_on
)
5075 ha
->isp_ops
->enable_intrs(ha
);
5077 if (test_and_clear_bit(BEACON_BLINK_NEEDED
,
5078 &base_vha
->dpc_flags
))
5079 ha
->isp_ops
->beacon_blink(base_vha
);
5081 if (!IS_QLAFX00(ha
))
5082 qla2x00_do_dpc_all_vps(base_vha
);
5086 set_current_state(TASK_INTERRUPTIBLE
);
5087 } /* End of while(1) */
5088 __set_current_state(TASK_RUNNING
);
5090 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4011,
5091 "DPC handler exiting.\n");
5094 * Make sure that nobody tries to wake us up again.
5098 /* Cleanup any residual CTX SRBs. */
5099 qla2x00_abort_all_cmds(base_vha
, DID_NO_CONNECT
<< 16);
5105 qla2xxx_wake_dpc(struct scsi_qla_host
*vha
)
5107 struct qla_hw_data
*ha
= vha
->hw
;
5108 struct task_struct
*t
= ha
->dpc_thread
;
5110 if (!test_bit(UNLOADING
, &vha
->dpc_flags
) && t
)
5116 * Processes asynchronous reset.
5119 * ha = adapter block pointer.
5122 qla2x00_rst_aen(scsi_qla_host_t
*vha
)
5124 if (vha
->flags
.online
&& !vha
->flags
.reset_active
&&
5125 !atomic_read(&vha
->loop_down_timer
) &&
5126 !(test_bit(ABORT_ISP_ACTIVE
, &vha
->dpc_flags
))) {
5128 clear_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
);
5131 * Issue marker command only when we are going to start
5134 vha
->marker_needed
= 1;
5135 } while (!atomic_read(&vha
->loop_down_timer
) &&
5136 (test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
)));
5140 /**************************************************************************
5146 * Context: Interrupt
5147 ***************************************************************************/
5149 qla2x00_timer(scsi_qla_host_t
*vha
)
5151 unsigned long cpu_flags
= 0;
5156 struct qla_hw_data
*ha
= vha
->hw
;
5157 struct req_que
*req
;
5159 if (ha
->flags
.eeh_busy
) {
5160 ql_dbg(ql_dbg_timer
, vha
, 0x6000,
5161 "EEH = %d, restarting timer.\n",
5162 ha
->flags
.eeh_busy
);
5163 qla2x00_restart_timer(vha
, WATCH_INTERVAL
);
5168 * Hardware read to raise pending EEH errors during mailbox waits. If
5169 * the read returns -1 then disable the board.
5171 if (!pci_channel_offline(ha
->pdev
)) {
5172 pci_read_config_word(ha
->pdev
, PCI_VENDOR_ID
, &w
);
5175 * Schedule this on the default system workqueue so that
5176 * all the adapter workqueues and the DPC thread can be
5179 schedule_work(&ha
->board_disable
);
5182 /* Make sure qla82xx_watchdog is run only for physical port */
5183 if (!vha
->vp_idx
&& IS_P3P_TYPE(ha
)) {
5184 if (test_bit(ISP_QUIESCE_NEEDED
, &vha
->dpc_flags
))
5187 qla82xx_watchdog(vha
);
5188 else if (IS_QLA8044(ha
))
5189 qla8044_watchdog(vha
);
5192 if (!vha
->vp_idx
&& IS_QLAFX00(ha
))
5193 qlafx00_timer_routine(vha
);
5195 /* Loop down handler. */
5196 if (atomic_read(&vha
->loop_down_timer
) > 0 &&
5197 !(test_bit(ABORT_ISP_ACTIVE
, &vha
->dpc_flags
)) &&
5198 !(test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
))
5199 && vha
->flags
.online
) {
5201 if (atomic_read(&vha
->loop_down_timer
) ==
5202 vha
->loop_down_abort_time
) {
5204 ql_log(ql_log_info
, vha
, 0x6008,
5205 "Loop down - aborting the queues before time expires.\n");
5207 if (!IS_QLA2100(ha
) && vha
->link_down_timeout
)
5208 atomic_set(&vha
->loop_state
, LOOP_DEAD
);
5211 * Schedule an ISP abort to return any FCP2-device
5214 /* NPIV - scan physical port only */
5216 spin_lock_irqsave(&ha
->hardware_lock
,
5218 req
= ha
->req_q_map
[0];
5220 index
< req
->num_outstanding_cmds
;
5224 sp
= req
->outstanding_cmds
[index
];
5227 if (sp
->type
!= SRB_SCSI_CMD
)
5230 if (!(sfcp
->flags
& FCF_FCP2_DEVICE
))
5234 set_bit(FCOE_CTX_RESET_NEEDED
,
5237 set_bit(ISP_ABORT_NEEDED
,
5241 spin_unlock_irqrestore(&ha
->hardware_lock
,
5247 /* if the loop has been down for 4 minutes, reinit adapter */
5248 if (atomic_dec_and_test(&vha
->loop_down_timer
) != 0) {
5249 if (!(vha
->device_flags
& DFLG_NO_CABLE
)) {
5250 ql_log(ql_log_warn
, vha
, 0x6009,
5251 "Loop down - aborting ISP.\n");
5254 set_bit(FCOE_CTX_RESET_NEEDED
,
5257 set_bit(ISP_ABORT_NEEDED
,
5261 ql_dbg(ql_dbg_timer
, vha
, 0x600a,
5262 "Loop down - seconds remaining %d.\n",
5263 atomic_read(&vha
->loop_down_timer
));
5265 /* Check if beacon LED needs to be blinked for physical host only */
5266 if (!vha
->vp_idx
&& (ha
->beacon_blink_led
== 1)) {
5267 /* There is no beacon_blink function for ISP82xx */
5268 if (!IS_P3P_TYPE(ha
)) {
5269 set_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
);
5274 /* Process any deferred work. */
5275 if (!list_empty(&vha
->work_list
))
5278 /* Schedule the DPC routine if needed */
5279 if ((test_bit(ISP_ABORT_NEEDED
, &vha
->dpc_flags
) ||
5280 test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
) ||
5281 test_bit(FCPORT_UPDATE_NEEDED
, &vha
->dpc_flags
) ||
5283 test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
) ||
5284 test_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
) ||
5285 test_bit(ISP_UNRECOVERABLE
, &vha
->dpc_flags
) ||
5286 test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
) ||
5287 test_bit(VP_DPC_NEEDED
, &vha
->dpc_flags
) ||
5288 test_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
))) {
5289 ql_dbg(ql_dbg_timer
, vha
, 0x600b,
5290 "isp_abort_needed=%d loop_resync_needed=%d "
5291 "fcport_update_needed=%d start_dpc=%d "
5292 "reset_marker_needed=%d",
5293 test_bit(ISP_ABORT_NEEDED
, &vha
->dpc_flags
),
5294 test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
),
5295 test_bit(FCPORT_UPDATE_NEEDED
, &vha
->dpc_flags
),
5297 test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
));
5298 ql_dbg(ql_dbg_timer
, vha
, 0x600c,
5299 "beacon_blink_needed=%d isp_unrecoverable=%d "
5300 "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5301 "relogin_needed=%d.\n",
5302 test_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
),
5303 test_bit(ISP_UNRECOVERABLE
, &vha
->dpc_flags
),
5304 test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
),
5305 test_bit(VP_DPC_NEEDED
, &vha
->dpc_flags
),
5306 test_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
));
5307 qla2xxx_wake_dpc(vha
);
5310 qla2x00_restart_timer(vha
, WATCH_INTERVAL
);
5313 /* Firmware interface routines. */
5316 #define FW_ISP21XX 0
5317 #define FW_ISP22XX 1
5318 #define FW_ISP2300 2
5319 #define FW_ISP2322 3
5320 #define FW_ISP24XX 4
5321 #define FW_ISP25XX 5
5322 #define FW_ISP81XX 6
5323 #define FW_ISP82XX 7
5324 #define FW_ISP2031 8
5325 #define FW_ISP8031 9
5326 #define FW_ISP2071 10
5328 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5329 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5330 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5331 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5332 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5333 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5334 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5335 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5336 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5337 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5338 #define FW_FILE_ISP2071 "ql2700_fw.bin"
5341 static DEFINE_MUTEX(qla_fw_lock
);
5343 static struct fw_blob qla_fw_blobs
[FW_BLOBS
] = {
5344 { .name
= FW_FILE_ISP21XX
, .segs
= { 0x1000, 0 }, },
5345 { .name
= FW_FILE_ISP22XX
, .segs
= { 0x1000, 0 }, },
5346 { .name
= FW_FILE_ISP2300
, .segs
= { 0x800, 0 }, },
5347 { .name
= FW_FILE_ISP2322
, .segs
= { 0x800, 0x1c000, 0x1e000, 0 }, },
5348 { .name
= FW_FILE_ISP24XX
, },
5349 { .name
= FW_FILE_ISP25XX
, },
5350 { .name
= FW_FILE_ISP81XX
, },
5351 { .name
= FW_FILE_ISP82XX
, },
5352 { .name
= FW_FILE_ISP2031
, },
5353 { .name
= FW_FILE_ISP8031
, },
5354 { .name
= FW_FILE_ISP2071
, },
5358 qla2x00_request_firmware(scsi_qla_host_t
*vha
)
5360 struct qla_hw_data
*ha
= vha
->hw
;
5361 struct fw_blob
*blob
;
5363 if (IS_QLA2100(ha
)) {
5364 blob
= &qla_fw_blobs
[FW_ISP21XX
];
5365 } else if (IS_QLA2200(ha
)) {
5366 blob
= &qla_fw_blobs
[FW_ISP22XX
];
5367 } else if (IS_QLA2300(ha
) || IS_QLA2312(ha
) || IS_QLA6312(ha
)) {
5368 blob
= &qla_fw_blobs
[FW_ISP2300
];
5369 } else if (IS_QLA2322(ha
) || IS_QLA6322(ha
)) {
5370 blob
= &qla_fw_blobs
[FW_ISP2322
];
5371 } else if (IS_QLA24XX_TYPE(ha
)) {
5372 blob
= &qla_fw_blobs
[FW_ISP24XX
];
5373 } else if (IS_QLA25XX(ha
)) {
5374 blob
= &qla_fw_blobs
[FW_ISP25XX
];
5375 } else if (IS_QLA81XX(ha
)) {
5376 blob
= &qla_fw_blobs
[FW_ISP81XX
];
5377 } else if (IS_QLA82XX(ha
)) {
5378 blob
= &qla_fw_blobs
[FW_ISP82XX
];
5379 } else if (IS_QLA2031(ha
)) {
5380 blob
= &qla_fw_blobs
[FW_ISP2031
];
5381 } else if (IS_QLA8031(ha
)) {
5382 blob
= &qla_fw_blobs
[FW_ISP8031
];
5383 } else if (IS_QLA2071(ha
)) {
5384 blob
= &qla_fw_blobs
[FW_ISP2071
];
5389 mutex_lock(&qla_fw_lock
);
5393 if (request_firmware(&blob
->fw
, blob
->name
, &ha
->pdev
->dev
)) {
5394 ql_log(ql_log_warn
, vha
, 0x0063,
5395 "Failed to load firmware image (%s).\n", blob
->name
);
5402 mutex_unlock(&qla_fw_lock
);
5407 qla2x00_release_firmware(void)
5411 mutex_lock(&qla_fw_lock
);
5412 for (idx
= 0; idx
< FW_BLOBS
; idx
++)
5413 release_firmware(qla_fw_blobs
[idx
].fw
);
5414 mutex_unlock(&qla_fw_lock
);
5417 static pci_ers_result_t
5418 qla2xxx_pci_error_detected(struct pci_dev
*pdev
, pci_channel_state_t state
)
5420 scsi_qla_host_t
*vha
= pci_get_drvdata(pdev
);
5421 struct qla_hw_data
*ha
= vha
->hw
;
5423 ql_dbg(ql_dbg_aer
, vha
, 0x9000,
5424 "PCI error detected, state %x.\n", state
);
5427 case pci_channel_io_normal
:
5428 ha
->flags
.eeh_busy
= 0;
5429 return PCI_ERS_RESULT_CAN_RECOVER
;
5430 case pci_channel_io_frozen
:
5431 ha
->flags
.eeh_busy
= 1;
5432 /* For ISP82XX complete any pending mailbox cmd */
5433 if (IS_QLA82XX(ha
)) {
5434 ha
->flags
.isp82xx_fw_hung
= 1;
5435 ql_dbg(ql_dbg_aer
, vha
, 0x9001, "Pci channel io frozen\n");
5436 qla82xx_clear_pending_mbx(vha
);
5438 qla2x00_free_irqs(vha
);
5439 pci_disable_device(pdev
);
5440 /* Return back all IOs */
5441 qla2x00_abort_all_cmds(vha
, DID_RESET
<< 16);
5442 return PCI_ERS_RESULT_NEED_RESET
;
5443 case pci_channel_io_perm_failure
:
5444 ha
->flags
.pci_channel_io_perm_failure
= 1;
5445 qla2x00_abort_all_cmds(vha
, DID_NO_CONNECT
<< 16);
5446 return PCI_ERS_RESULT_DISCONNECT
;
5448 return PCI_ERS_RESULT_NEED_RESET
;
5451 static pci_ers_result_t
5452 qla2xxx_pci_mmio_enabled(struct pci_dev
*pdev
)
5454 int risc_paused
= 0;
5456 unsigned long flags
;
5457 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
5458 struct qla_hw_data
*ha
= base_vha
->hw
;
5459 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
5460 struct device_reg_24xx __iomem
*reg24
= &ha
->iobase
->isp24
;
5463 return PCI_ERS_RESULT_RECOVERED
;
5465 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
5466 if (IS_QLA2100(ha
) || IS_QLA2200(ha
)){
5467 stat
= RD_REG_DWORD(®
->hccr
);
5468 if (stat
& HCCR_RISC_PAUSE
)
5470 } else if (IS_QLA23XX(ha
)) {
5471 stat
= RD_REG_DWORD(®
->u
.isp2300
.host_status
);
5472 if (stat
& HSR_RISC_PAUSED
)
5474 } else if (IS_FWI2_CAPABLE(ha
)) {
5475 stat
= RD_REG_DWORD(®24
->host_status
);
5476 if (stat
& HSRX_RISC_PAUSED
)
5479 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
5482 ql_log(ql_log_info
, base_vha
, 0x9003,
5483 "RISC paused -- mmio_enabled, Dumping firmware.\n");
5484 ha
->isp_ops
->fw_dump(base_vha
, 0);
5486 return PCI_ERS_RESULT_NEED_RESET
;
5488 return PCI_ERS_RESULT_RECOVERED
;
5492 qla82xx_error_recovery(scsi_qla_host_t
*base_vha
)
5494 uint32_t rval
= QLA_FUNCTION_FAILED
;
5495 uint32_t drv_active
= 0;
5496 struct qla_hw_data
*ha
= base_vha
->hw
;
5498 struct pci_dev
*other_pdev
= NULL
;
5500 ql_dbg(ql_dbg_aer
, base_vha
, 0x9006,
5501 "Entered %s.\n", __func__
);
5503 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
5505 if (base_vha
->flags
.online
) {
5506 /* Abort all outstanding commands,
5507 * so as to be requeued later */
5508 qla2x00_abort_isp_cleanup(base_vha
);
5512 fn
= PCI_FUNC(ha
->pdev
->devfn
);
5515 ql_dbg(ql_dbg_aer
, base_vha
, 0x9007,
5516 "Finding pci device at function = 0x%x.\n", fn
);
5518 pci_get_domain_bus_and_slot(pci_domain_nr(ha
->pdev
->bus
),
5519 ha
->pdev
->bus
->number
, PCI_DEVFN(PCI_SLOT(ha
->pdev
->devfn
),
5524 if (atomic_read(&other_pdev
->enable_cnt
)) {
5525 ql_dbg(ql_dbg_aer
, base_vha
, 0x9008,
5526 "Found PCI func available and enable at 0x%x.\n",
5528 pci_dev_put(other_pdev
);
5531 pci_dev_put(other_pdev
);
5536 ql_dbg(ql_dbg_aer
, base_vha
, 0x9009,
5537 "This devfn is reset owner = 0x%x.\n",
5539 qla82xx_idc_lock(ha
);
5541 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
5542 QLA8XXX_DEV_INITIALIZING
);
5544 qla82xx_wr_32(ha
, QLA82XX_CRB_DRV_IDC_VERSION
,
5545 QLA82XX_IDC_VERSION
);
5547 drv_active
= qla82xx_rd_32(ha
, QLA82XX_CRB_DRV_ACTIVE
);
5548 ql_dbg(ql_dbg_aer
, base_vha
, 0x900a,
5549 "drv_active = 0x%x.\n", drv_active
);
5551 qla82xx_idc_unlock(ha
);
5552 /* Reset if device is not already reset
5553 * drv_active would be 0 if a reset has already been done
5556 rval
= qla82xx_start_firmware(base_vha
);
5559 qla82xx_idc_lock(ha
);
5561 if (rval
!= QLA_SUCCESS
) {
5562 ql_log(ql_log_info
, base_vha
, 0x900b,
5563 "HW State: FAILED.\n");
5564 qla82xx_clear_drv_active(ha
);
5565 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
5566 QLA8XXX_DEV_FAILED
);
5568 ql_log(ql_log_info
, base_vha
, 0x900c,
5569 "HW State: READY.\n");
5570 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
5572 qla82xx_idc_unlock(ha
);
5573 ha
->flags
.isp82xx_fw_hung
= 0;
5574 rval
= qla82xx_restart_isp(base_vha
);
5575 qla82xx_idc_lock(ha
);
5576 /* Clear driver state register */
5577 qla82xx_wr_32(ha
, QLA82XX_CRB_DRV_STATE
, 0);
5578 qla82xx_set_drv_active(base_vha
);
5580 qla82xx_idc_unlock(ha
);
5582 ql_dbg(ql_dbg_aer
, base_vha
, 0x900d,
5583 "This devfn is not reset owner = 0x%x.\n",
5585 if ((qla82xx_rd_32(ha
, QLA82XX_CRB_DEV_STATE
) ==
5586 QLA8XXX_DEV_READY
)) {
5587 ha
->flags
.isp82xx_fw_hung
= 0;
5588 rval
= qla82xx_restart_isp(base_vha
);
5589 qla82xx_idc_lock(ha
);
5590 qla82xx_set_drv_active(base_vha
);
5591 qla82xx_idc_unlock(ha
);
5594 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
5599 static pci_ers_result_t
5600 qla2xxx_pci_slot_reset(struct pci_dev
*pdev
)
5602 pci_ers_result_t ret
= PCI_ERS_RESULT_DISCONNECT
;
5603 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
5604 struct qla_hw_data
*ha
= base_vha
->hw
;
5605 struct rsp_que
*rsp
;
5606 int rc
, retries
= 10;
5608 ql_dbg(ql_dbg_aer
, base_vha
, 0x9004,
5611 /* Workaround: qla2xxx driver which access hardware earlier
5612 * needs error state to be pci_channel_io_online.
5613 * Otherwise mailbox command timesout.
5615 pdev
->error_state
= pci_channel_io_normal
;
5617 pci_restore_state(pdev
);
5619 /* pci_restore_state() clears the saved_state flag of the device
5620 * save restored state which resets saved_state flag
5622 pci_save_state(pdev
);
5625 rc
= pci_enable_device_mem(pdev
);
5627 rc
= pci_enable_device(pdev
);
5630 ql_log(ql_log_warn
, base_vha
, 0x9005,
5631 "Can't re-enable PCI device after reset.\n");
5632 goto exit_slot_reset
;
5635 rsp
= ha
->rsp_q_map
[0];
5636 if (qla2x00_request_irqs(ha
, rsp
))
5637 goto exit_slot_reset
;
5639 if (ha
->isp_ops
->pci_config(base_vha
))
5640 goto exit_slot_reset
;
5642 if (IS_QLA82XX(ha
)) {
5643 if (qla82xx_error_recovery(base_vha
) == QLA_SUCCESS
) {
5644 ret
= PCI_ERS_RESULT_RECOVERED
;
5645 goto exit_slot_reset
;
5647 goto exit_slot_reset
;
5650 while (ha
->flags
.mbox_busy
&& retries
--)
5653 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
5654 if (ha
->isp_ops
->abort_isp(base_vha
) == QLA_SUCCESS
)
5655 ret
= PCI_ERS_RESULT_RECOVERED
;
5656 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
5660 ql_dbg(ql_dbg_aer
, base_vha
, 0x900e,
5661 "slot_reset return %x.\n", ret
);
5667 qla2xxx_pci_resume(struct pci_dev
*pdev
)
5669 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
5670 struct qla_hw_data
*ha
= base_vha
->hw
;
5673 ql_dbg(ql_dbg_aer
, base_vha
, 0x900f,
5676 ret
= qla2x00_wait_for_hba_online(base_vha
);
5677 if (ret
!= QLA_SUCCESS
) {
5678 ql_log(ql_log_fatal
, base_vha
, 0x9002,
5679 "The device failed to resume I/O from slot/link_reset.\n");
5682 pci_cleanup_aer_uncorrect_error_status(pdev
);
5684 ha
->flags
.eeh_busy
= 0;
5687 static const struct pci_error_handlers qla2xxx_err_handler
= {
5688 .error_detected
= qla2xxx_pci_error_detected
,
5689 .mmio_enabled
= qla2xxx_pci_mmio_enabled
,
5690 .slot_reset
= qla2xxx_pci_slot_reset
,
5691 .resume
= qla2xxx_pci_resume
,
5694 static struct pci_device_id qla2xxx_pci_tbl
[] = {
5695 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2100
) },
5696 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2200
) },
5697 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2300
) },
5698 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2312
) },
5699 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2322
) },
5700 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP6312
) },
5701 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP6322
) },
5702 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2422
) },
5703 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2432
) },
5704 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8432
) },
5705 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP5422
) },
5706 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP5432
) },
5707 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2532
) },
5708 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2031
) },
5709 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8001
) },
5710 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8021
) },
5711 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8031
) },
5712 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISPF001
) },
5713 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8044
) },
5714 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2071
) },
5717 MODULE_DEVICE_TABLE(pci
, qla2xxx_pci_tbl
);
5719 static struct pci_driver qla2xxx_pci_driver
= {
5720 .name
= QLA2XXX_DRIVER_NAME
,
5722 .owner
= THIS_MODULE
,
5724 .id_table
= qla2xxx_pci_tbl
,
5725 .probe
= qla2x00_probe_one
,
5726 .remove
= qla2x00_remove_one
,
5727 .shutdown
= qla2x00_shutdown
,
5728 .err_handler
= &qla2xxx_err_handler
,
5731 static const struct file_operations apidev_fops
= {
5732 .owner
= THIS_MODULE
,
5733 .llseek
= noop_llseek
,
5737 * qla2x00_module_init - Module initialization.
5740 qla2x00_module_init(void)
5744 /* Allocate cache for SRBs. */
5745 srb_cachep
= kmem_cache_create("qla2xxx_srbs", sizeof(srb_t
), 0,
5746 SLAB_HWCACHE_ALIGN
, NULL
);
5747 if (srb_cachep
== NULL
) {
5748 ql_log(ql_log_fatal
, NULL
, 0x0001,
5749 "Unable to allocate SRB cache...Failing load!.\n");
5753 /* Initialize target kmem_cache and mem_pools */
5756 kmem_cache_destroy(srb_cachep
);
5758 } else if (ret
> 0) {
5760 * If initiator mode is explictly disabled by qlt_init(),
5761 * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5762 * performing scsi_scan_target() during LOOP UP event.
5764 qla2xxx_transport_functions
.disable_target_scan
= 1;
5765 qla2xxx_transport_vport_functions
.disable_target_scan
= 1;
5768 /* Derive version string. */
5769 strcpy(qla2x00_version_str
, QLA2XXX_VERSION
);
5770 if (ql2xextended_error_logging
)
5771 strcat(qla2x00_version_str
, "-debug");
5773 qla2xxx_transport_template
=
5774 fc_attach_transport(&qla2xxx_transport_functions
);
5775 if (!qla2xxx_transport_template
) {
5776 kmem_cache_destroy(srb_cachep
);
5777 ql_log(ql_log_fatal
, NULL
, 0x0002,
5778 "fc_attach_transport failed...Failing load!.\n");
5783 apidev_major
= register_chrdev(0, QLA2XXX_APIDEV
, &apidev_fops
);
5784 if (apidev_major
< 0) {
5785 ql_log(ql_log_fatal
, NULL
, 0x0003,
5786 "Unable to register char device %s.\n", QLA2XXX_APIDEV
);
5789 qla2xxx_transport_vport_template
=
5790 fc_attach_transport(&qla2xxx_transport_vport_functions
);
5791 if (!qla2xxx_transport_vport_template
) {
5792 kmem_cache_destroy(srb_cachep
);
5794 fc_release_transport(qla2xxx_transport_template
);
5795 ql_log(ql_log_fatal
, NULL
, 0x0004,
5796 "fc_attach_transport vport failed...Failing load!.\n");
5799 ql_log(ql_log_info
, NULL
, 0x0005,
5800 "QLogic Fibre Channel HBA Driver: %s.\n",
5801 qla2x00_version_str
);
5802 ret
= pci_register_driver(&qla2xxx_pci_driver
);
5804 kmem_cache_destroy(srb_cachep
);
5806 fc_release_transport(qla2xxx_transport_template
);
5807 fc_release_transport(qla2xxx_transport_vport_template
);
5808 ql_log(ql_log_fatal
, NULL
, 0x0006,
5809 "pci_register_driver failed...ret=%d Failing load!.\n",
5816 * qla2x00_module_exit - Module cleanup.
5819 qla2x00_module_exit(void)
5821 unregister_chrdev(apidev_major
, QLA2XXX_APIDEV
);
5822 pci_unregister_driver(&qla2xxx_pci_driver
);
5823 qla2x00_release_firmware();
5824 kmem_cache_destroy(srb_cachep
);
5827 kmem_cache_destroy(ctx_cachep
);
5828 fc_release_transport(qla2xxx_transport_template
);
5829 fc_release_transport(qla2xxx_transport_vport_template
);
5832 module_init(qla2x00_module_init
);
5833 module_exit(qla2x00_module_exit
);
5835 MODULE_AUTHOR("QLogic Corporation");
5836 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5837 MODULE_LICENSE("GPL");
5838 MODULE_VERSION(QLA2XXX_VERSION
);
5839 MODULE_FIRMWARE(FW_FILE_ISP21XX
);
5840 MODULE_FIRMWARE(FW_FILE_ISP22XX
);
5841 MODULE_FIRMWARE(FW_FILE_ISP2300
);
5842 MODULE_FIRMWARE(FW_FILE_ISP2322
);
5843 MODULE_FIRMWARE(FW_FILE_ISP24XX
);
5844 MODULE_FIRMWARE(FW_FILE_ISP25XX
);