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[SCSI] qla2xxx: Fix qla24xx revision check while enabling interrupts.
[mirror_ubuntu-jammy-kernel.git] / drivers / scsi / qla2xxx / qla_os.c
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2011 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8
9 #include <linux/moduleparam.h>
10 #include <linux/vmalloc.h>
11 #include <linux/delay.h>
12 #include <linux/kthread.h>
13 #include <linux/mutex.h>
14 #include <linux/kobject.h>
15 #include <linux/slab.h>
16
17 #include <scsi/scsi_tcq.h>
18 #include <scsi/scsicam.h>
19 #include <scsi/scsi_transport.h>
20 #include <scsi/scsi_transport_fc.h>
21
22 /*
23 * Driver version
24 */
25 char qla2x00_version_str[40];
26
27 static int apidev_major;
28
29 /*
30 * SRB allocation cache
31 */
32 static struct kmem_cache *srb_cachep;
33
34 /*
35 * CT6 CTX allocation cache
36 */
37 static struct kmem_cache *ctx_cachep;
38 /*
39 * error level for logging
40 */
41 int ql_errlev = ql_log_all;
42
43 int ql2xlogintimeout = 20;
44 module_param(ql2xlogintimeout, int, S_IRUGO);
45 MODULE_PARM_DESC(ql2xlogintimeout,
46 "Login timeout value in seconds.");
47
48 int qlport_down_retry;
49 module_param(qlport_down_retry, int, S_IRUGO);
50 MODULE_PARM_DESC(qlport_down_retry,
51 "Maximum number of command retries to a port that returns "
52 "a PORT-DOWN status.");
53
54 int ql2xplogiabsentdevice;
55 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
56 MODULE_PARM_DESC(ql2xplogiabsentdevice,
57 "Option to enable PLOGI to devices that are not present after "
58 "a Fabric scan. This is needed for several broken switches. "
59 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
60
61 int ql2xloginretrycount = 0;
62 module_param(ql2xloginretrycount, int, S_IRUGO);
63 MODULE_PARM_DESC(ql2xloginretrycount,
64 "Specify an alternate value for the NVRAM login retry count.");
65
66 int ql2xallocfwdump = 1;
67 module_param(ql2xallocfwdump, int, S_IRUGO);
68 MODULE_PARM_DESC(ql2xallocfwdump,
69 "Option to enable allocation of memory for a firmware dump "
70 "during HBA initialization. Memory allocation requirements "
71 "vary by ISP type. Default is 1 - allocate memory.");
72
73 int ql2xextended_error_logging;
74 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
75 MODULE_PARM_DESC(ql2xextended_error_logging,
76 "Option to enable extended error logging,\n"
77 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n"
78 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
79 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n"
80 "\t\t0x02000000 - Async events. 0x01000000 - Timer routines.\n"
81 "\t\t0x00800000 - User space. 0x00400000 - Task Management.\n"
82 "\t\t0x00200000 - AER/EEH. 0x00100000 - Multi Q.\n"
83 "\t\t0x00080000 - P3P Specific. 0x00040000 - Virtual Port.\n"
84 "\t\t0x00020000 - Buffer Dump. 0x00010000 - Misc.\n"
85 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
86 "\t\tDo LOGICAL OR of the value to enable more than one level");
87
88 int ql2xshiftctondsd = 6;
89 module_param(ql2xshiftctondsd, int, S_IRUGO);
90 MODULE_PARM_DESC(ql2xshiftctondsd,
91 "Set to control shifting of command type processing "
92 "based on total number of SG elements.");
93
94 static void qla2x00_free_device(scsi_qla_host_t *);
95
96 int ql2xfdmienable=1;
97 module_param(ql2xfdmienable, int, S_IRUGO);
98 MODULE_PARM_DESC(ql2xfdmienable,
99 "Enables FDMI registrations. "
100 "0 - no FDMI. Default is 1 - perform FDMI.");
101
102 #define MAX_Q_DEPTH 32
103 static int ql2xmaxqdepth = MAX_Q_DEPTH;
104 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
105 MODULE_PARM_DESC(ql2xmaxqdepth,
106 "Maximum queue depth to report for target devices.");
107
108 /* Do not change the value of this after module load */
109 int ql2xenabledif = 0;
110 module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
111 MODULE_PARM_DESC(ql2xenabledif,
112 " Enable T10-CRC-DIF "
113 " Default is 0 - No DIF Support. 1 - Enable it"
114 ", 2 - Enable DIF for all types, except Type 0.");
115
116 int ql2xenablehba_err_chk = 2;
117 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
118 MODULE_PARM_DESC(ql2xenablehba_err_chk,
119 " Enable T10-CRC-DIF Error isolation by HBA:\n"
120 " Default is 1.\n"
121 " 0 -- Error isolation disabled\n"
122 " 1 -- Error isolation enabled only for DIX Type 0\n"
123 " 2 -- Error isolation enabled for all Types\n");
124
125 int ql2xiidmaenable=1;
126 module_param(ql2xiidmaenable, int, S_IRUGO);
127 MODULE_PARM_DESC(ql2xiidmaenable,
128 "Enables iIDMA settings "
129 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
130
131 int ql2xmaxqueues = 1;
132 module_param(ql2xmaxqueues, int, S_IRUGO);
133 MODULE_PARM_DESC(ql2xmaxqueues,
134 "Enables MQ settings "
135 "Default is 1 for single queue. Set it to number "
136 "of queues in MQ mode.");
137
138 int ql2xmultique_tag;
139 module_param(ql2xmultique_tag, int, S_IRUGO);
140 MODULE_PARM_DESC(ql2xmultique_tag,
141 "Enables CPU affinity settings for the driver "
142 "Default is 0 for no affinity of request and response IO. "
143 "Set it to 1 to turn on the cpu affinity.");
144
145 int ql2xfwloadbin;
146 module_param(ql2xfwloadbin, int, S_IRUGO);
147 MODULE_PARM_DESC(ql2xfwloadbin,
148 "Option to specify location from which to load ISP firmware:.\n"
149 " 2 -- load firmware via the request_firmware() (hotplug).\n"
150 " interface.\n"
151 " 1 -- load firmware from flash.\n"
152 " 0 -- use default semantics.\n");
153
154 int ql2xetsenable;
155 module_param(ql2xetsenable, int, S_IRUGO);
156 MODULE_PARM_DESC(ql2xetsenable,
157 "Enables firmware ETS burst."
158 "Default is 0 - skip ETS enablement.");
159
160 int ql2xdbwr = 1;
161 module_param(ql2xdbwr, int, S_IRUGO);
162 MODULE_PARM_DESC(ql2xdbwr,
163 "Option to specify scheme for request queue posting.\n"
164 " 0 -- Regular doorbell.\n"
165 " 1 -- CAMRAM doorbell (faster).\n");
166
167 int ql2xtargetreset = 1;
168 module_param(ql2xtargetreset, int, S_IRUGO);
169 MODULE_PARM_DESC(ql2xtargetreset,
170 "Enable target reset."
171 "Default is 1 - use hw defaults.");
172
173 int ql2xgffidenable;
174 module_param(ql2xgffidenable, int, S_IRUGO);
175 MODULE_PARM_DESC(ql2xgffidenable,
176 "Enables GFF_ID checks of port type. "
177 "Default is 0 - Do not use GFF_ID information.");
178
179 int ql2xasynctmfenable;
180 module_param(ql2xasynctmfenable, int, S_IRUGO);
181 MODULE_PARM_DESC(ql2xasynctmfenable,
182 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
183 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
184
185 int ql2xdontresethba;
186 module_param(ql2xdontresethba, int, S_IRUGO);
187 MODULE_PARM_DESC(ql2xdontresethba,
188 "Option to specify reset behaviour.\n"
189 " 0 (Default) -- Reset on failure.\n"
190 " 1 -- Do not reset on failure.\n");
191
192 uint ql2xmaxlun = MAX_LUNS;
193 module_param(ql2xmaxlun, uint, S_IRUGO);
194 MODULE_PARM_DESC(ql2xmaxlun,
195 "Defines the maximum LU number to register with the SCSI "
196 "midlayer. Default is 65535.");
197
198 /*
199 * SCSI host template entry points
200 */
201 static int qla2xxx_slave_configure(struct scsi_device * device);
202 static int qla2xxx_slave_alloc(struct scsi_device *);
203 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
204 static void qla2xxx_scan_start(struct Scsi_Host *);
205 static void qla2xxx_slave_destroy(struct scsi_device *);
206 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
207 static int qla2xxx_eh_abort(struct scsi_cmnd *);
208 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
209 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
210 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
211 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
212
213 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
214 static int qla2x00_change_queue_type(struct scsi_device *, int);
215
216 struct scsi_host_template qla2xxx_driver_template = {
217 .module = THIS_MODULE,
218 .name = QLA2XXX_DRIVER_NAME,
219 .queuecommand = qla2xxx_queuecommand,
220
221 .eh_abort_handler = qla2xxx_eh_abort,
222 .eh_device_reset_handler = qla2xxx_eh_device_reset,
223 .eh_target_reset_handler = qla2xxx_eh_target_reset,
224 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
225 .eh_host_reset_handler = qla2xxx_eh_host_reset,
226
227 .slave_configure = qla2xxx_slave_configure,
228
229 .slave_alloc = qla2xxx_slave_alloc,
230 .slave_destroy = qla2xxx_slave_destroy,
231 .scan_finished = qla2xxx_scan_finished,
232 .scan_start = qla2xxx_scan_start,
233 .change_queue_depth = qla2x00_change_queue_depth,
234 .change_queue_type = qla2x00_change_queue_type,
235 .this_id = -1,
236 .cmd_per_lun = 3,
237 .use_clustering = ENABLE_CLUSTERING,
238 .sg_tablesize = SG_ALL,
239
240 .max_sectors = 0xFFFF,
241 .shost_attrs = qla2x00_host_attrs,
242 };
243
244 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
245 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
246
247 /* TODO Convert to inlines
248 *
249 * Timer routines
250 */
251
252 __inline__ void
253 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
254 {
255 init_timer(&vha->timer);
256 vha->timer.expires = jiffies + interval * HZ;
257 vha->timer.data = (unsigned long)vha;
258 vha->timer.function = (void (*)(unsigned long))func;
259 add_timer(&vha->timer);
260 vha->timer_active = 1;
261 }
262
263 static inline void
264 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
265 {
266 /* Currently used for 82XX only. */
267 if (vha->device_flags & DFLG_DEV_FAILED) {
268 ql_dbg(ql_dbg_timer, vha, 0x600d,
269 "Device in a failed state, returning.\n");
270 return;
271 }
272
273 mod_timer(&vha->timer, jiffies + interval * HZ);
274 }
275
276 static __inline__ void
277 qla2x00_stop_timer(scsi_qla_host_t *vha)
278 {
279 del_timer_sync(&vha->timer);
280 vha->timer_active = 0;
281 }
282
283 static int qla2x00_do_dpc(void *data);
284
285 static void qla2x00_rst_aen(scsi_qla_host_t *);
286
287 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
288 struct req_que **, struct rsp_que **);
289 static void qla2x00_free_fw_dump(struct qla_hw_data *);
290 static void qla2x00_mem_free(struct qla_hw_data *);
291 static void qla2x00_sp_free_dma(srb_t *);
292
293 /* -------------------------------------------------------------------------- */
294 static int qla2x00_alloc_queues(struct qla_hw_data *ha)
295 {
296 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
297 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
298 GFP_KERNEL);
299 if (!ha->req_q_map) {
300 ql_log(ql_log_fatal, vha, 0x003b,
301 "Unable to allocate memory for request queue ptrs.\n");
302 goto fail_req_map;
303 }
304
305 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
306 GFP_KERNEL);
307 if (!ha->rsp_q_map) {
308 ql_log(ql_log_fatal, vha, 0x003c,
309 "Unable to allocate memory for response queue ptrs.\n");
310 goto fail_rsp_map;
311 }
312 set_bit(0, ha->rsp_qid_map);
313 set_bit(0, ha->req_qid_map);
314 return 1;
315
316 fail_rsp_map:
317 kfree(ha->req_q_map);
318 ha->req_q_map = NULL;
319 fail_req_map:
320 return -ENOMEM;
321 }
322
323 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
324 {
325 if (req && req->ring)
326 dma_free_coherent(&ha->pdev->dev,
327 (req->length + 1) * sizeof(request_t),
328 req->ring, req->dma);
329
330 kfree(req);
331 req = NULL;
332 }
333
334 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
335 {
336 if (rsp && rsp->ring)
337 dma_free_coherent(&ha->pdev->dev,
338 (rsp->length + 1) * sizeof(response_t),
339 rsp->ring, rsp->dma);
340
341 kfree(rsp);
342 rsp = NULL;
343 }
344
345 static void qla2x00_free_queues(struct qla_hw_data *ha)
346 {
347 struct req_que *req;
348 struct rsp_que *rsp;
349 int cnt;
350
351 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
352 req = ha->req_q_map[cnt];
353 qla2x00_free_req_que(ha, req);
354 }
355 kfree(ha->req_q_map);
356 ha->req_q_map = NULL;
357
358 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
359 rsp = ha->rsp_q_map[cnt];
360 qla2x00_free_rsp_que(ha, rsp);
361 }
362 kfree(ha->rsp_q_map);
363 ha->rsp_q_map = NULL;
364 }
365
366 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
367 {
368 uint16_t options = 0;
369 int ques, req, ret;
370 struct qla_hw_data *ha = vha->hw;
371
372 if (!(ha->fw_attributes & BIT_6)) {
373 ql_log(ql_log_warn, vha, 0x00d8,
374 "Firmware is not multi-queue capable.\n");
375 goto fail;
376 }
377 if (ql2xmultique_tag) {
378 /* create a request queue for IO */
379 options |= BIT_7;
380 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
381 QLA_DEFAULT_QUE_QOS);
382 if (!req) {
383 ql_log(ql_log_warn, vha, 0x00e0,
384 "Failed to create request queue.\n");
385 goto fail;
386 }
387 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
388 vha->req = ha->req_q_map[req];
389 options |= BIT_1;
390 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
391 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
392 if (!ret) {
393 ql_log(ql_log_warn, vha, 0x00e8,
394 "Failed to create response queue.\n");
395 goto fail2;
396 }
397 }
398 ha->flags.cpu_affinity_enabled = 1;
399 ql_dbg(ql_dbg_multiq, vha, 0xc007,
400 "CPU affinity mode enalbed, "
401 "no. of response queues:%d no. of request queues:%d.\n",
402 ha->max_rsp_queues, ha->max_req_queues);
403 ql_dbg(ql_dbg_init, vha, 0x00e9,
404 "CPU affinity mode enalbed, "
405 "no. of response queues:%d no. of request queues:%d.\n",
406 ha->max_rsp_queues, ha->max_req_queues);
407 }
408 return 0;
409 fail2:
410 qla25xx_delete_queues(vha);
411 destroy_workqueue(ha->wq);
412 ha->wq = NULL;
413 fail:
414 ha->mqenable = 0;
415 kfree(ha->req_q_map);
416 kfree(ha->rsp_q_map);
417 ha->max_req_queues = ha->max_rsp_queues = 1;
418 return 1;
419 }
420
421 static char *
422 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
423 {
424 struct qla_hw_data *ha = vha->hw;
425 static char *pci_bus_modes[] = {
426 "33", "66", "100", "133",
427 };
428 uint16_t pci_bus;
429
430 strcpy(str, "PCI");
431 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
432 if (pci_bus) {
433 strcat(str, "-X (");
434 strcat(str, pci_bus_modes[pci_bus]);
435 } else {
436 pci_bus = (ha->pci_attr & BIT_8) >> 8;
437 strcat(str, " (");
438 strcat(str, pci_bus_modes[pci_bus]);
439 }
440 strcat(str, " MHz)");
441
442 return (str);
443 }
444
445 static char *
446 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
447 {
448 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
449 struct qla_hw_data *ha = vha->hw;
450 uint32_t pci_bus;
451 int pcie_reg;
452
453 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
454 if (pcie_reg) {
455 char lwstr[6];
456 uint16_t pcie_lstat, lspeed, lwidth;
457
458 pcie_reg += 0x12;
459 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
460 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
461 lwidth = (pcie_lstat &
462 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
463
464 strcpy(str, "PCIe (");
465 if (lspeed == 1)
466 strcat(str, "2.5GT/s ");
467 else if (lspeed == 2)
468 strcat(str, "5.0GT/s ");
469 else
470 strcat(str, "<unknown> ");
471 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
472 strcat(str, lwstr);
473
474 return str;
475 }
476
477 strcpy(str, "PCI");
478 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
479 if (pci_bus == 0 || pci_bus == 8) {
480 strcat(str, " (");
481 strcat(str, pci_bus_modes[pci_bus >> 3]);
482 } else {
483 strcat(str, "-X ");
484 if (pci_bus & BIT_2)
485 strcat(str, "Mode 2");
486 else
487 strcat(str, "Mode 1");
488 strcat(str, " (");
489 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
490 }
491 strcat(str, " MHz)");
492
493 return str;
494 }
495
496 static char *
497 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
498 {
499 char un_str[10];
500 struct qla_hw_data *ha = vha->hw;
501
502 sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
503 ha->fw_minor_version,
504 ha->fw_subminor_version);
505
506 if (ha->fw_attributes & BIT_9) {
507 strcat(str, "FLX");
508 return (str);
509 }
510
511 switch (ha->fw_attributes & 0xFF) {
512 case 0x7:
513 strcat(str, "EF");
514 break;
515 case 0x17:
516 strcat(str, "TP");
517 break;
518 case 0x37:
519 strcat(str, "IP");
520 break;
521 case 0x77:
522 strcat(str, "VI");
523 break;
524 default:
525 sprintf(un_str, "(%x)", ha->fw_attributes);
526 strcat(str, un_str);
527 break;
528 }
529 if (ha->fw_attributes & 0x100)
530 strcat(str, "X");
531
532 return (str);
533 }
534
535 static char *
536 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
537 {
538 struct qla_hw_data *ha = vha->hw;
539
540 sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
541 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
542 return str;
543 }
544
545 static inline srb_t *
546 qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
547 struct scsi_cmnd *cmd)
548 {
549 srb_t *sp;
550 struct qla_hw_data *ha = vha->hw;
551
552 sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
553 if (!sp) {
554 ql_log(ql_log_warn, vha, 0x3006,
555 "Memory allocation failed for sp.\n");
556 return sp;
557 }
558
559 atomic_set(&sp->ref_count, 1);
560 sp->fcport = fcport;
561 sp->cmd = cmd;
562 sp->flags = 0;
563 CMD_SP(cmd) = (void *)sp;
564 sp->ctx = NULL;
565
566 return sp;
567 }
568
569 static int
570 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
571 {
572 scsi_qla_host_t *vha = shost_priv(host);
573 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
574 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
575 struct qla_hw_data *ha = vha->hw;
576 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
577 srb_t *sp;
578 int rval;
579
580 if (ha->flags.eeh_busy) {
581 if (ha->flags.pci_channel_io_perm_failure) {
582 ql_dbg(ql_dbg_io, vha, 0x3001,
583 "PCI Channel IO permanent failure, exiting "
584 "cmd=%p.\n", cmd);
585 cmd->result = DID_NO_CONNECT << 16;
586 } else {
587 ql_dbg(ql_dbg_io, vha, 0x3002,
588 "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
589 cmd->result = DID_REQUEUE << 16;
590 }
591 goto qc24_fail_command;
592 }
593
594 rval = fc_remote_port_chkready(rport);
595 if (rval) {
596 cmd->result = rval;
597 ql_dbg(ql_dbg_io, vha, 0x3003,
598 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
599 cmd, rval);
600 goto qc24_fail_command;
601 }
602
603 if (!vha->flags.difdix_supported &&
604 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
605 ql_dbg(ql_dbg_io, vha, 0x3004,
606 "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
607 cmd);
608 cmd->result = DID_NO_CONNECT << 16;
609 goto qc24_fail_command;
610 }
611 if (atomic_read(&fcport->state) != FCS_ONLINE) {
612 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
613 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
614 ql_dbg(ql_dbg_io, vha, 0x3005,
615 "Returning DNC, fcport_state=%d loop_state=%d.\n",
616 atomic_read(&fcport->state),
617 atomic_read(&base_vha->loop_state));
618 cmd->result = DID_NO_CONNECT << 16;
619 goto qc24_fail_command;
620 }
621 goto qc24_target_busy;
622 }
623
624 sp = qla2x00_get_new_sp(base_vha, fcport, cmd);
625 if (!sp)
626 goto qc24_host_busy;
627
628 rval = ha->isp_ops->start_scsi(sp);
629 if (rval != QLA_SUCCESS) {
630 ql_dbg(ql_dbg_io, vha, 0x3013,
631 "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
632 goto qc24_host_busy_free_sp;
633 }
634
635 return 0;
636
637 qc24_host_busy_free_sp:
638 qla2x00_sp_free_dma(sp);
639 mempool_free(sp, ha->srb_mempool);
640
641 qc24_host_busy:
642 return SCSI_MLQUEUE_HOST_BUSY;
643
644 qc24_target_busy:
645 return SCSI_MLQUEUE_TARGET_BUSY;
646
647 qc24_fail_command:
648 cmd->scsi_done(cmd);
649
650 return 0;
651 }
652
653 /*
654 * qla2x00_eh_wait_on_command
655 * Waits for the command to be returned by the Firmware for some
656 * max time.
657 *
658 * Input:
659 * cmd = Scsi Command to wait on.
660 *
661 * Return:
662 * Not Found : 0
663 * Found : 1
664 */
665 static int
666 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
667 {
668 #define ABORT_POLLING_PERIOD 1000
669 #define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
670 unsigned long wait_iter = ABORT_WAIT_ITER;
671 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
672 struct qla_hw_data *ha = vha->hw;
673 int ret = QLA_SUCCESS;
674
675 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
676 ql_dbg(ql_dbg_taskm, vha, 0x8005,
677 "Return:eh_wait.\n");
678 return ret;
679 }
680
681 while (CMD_SP(cmd) && wait_iter--) {
682 msleep(ABORT_POLLING_PERIOD);
683 }
684 if (CMD_SP(cmd))
685 ret = QLA_FUNCTION_FAILED;
686
687 return ret;
688 }
689
690 /*
691 * qla2x00_wait_for_hba_online
692 * Wait till the HBA is online after going through
693 * <= MAX_RETRIES_OF_ISP_ABORT or
694 * finally HBA is disabled ie marked offline
695 *
696 * Input:
697 * ha - pointer to host adapter structure
698 *
699 * Note:
700 * Does context switching-Release SPIN_LOCK
701 * (if any) before calling this routine.
702 *
703 * Return:
704 * Success (Adapter is online) : 0
705 * Failed (Adapter is offline/disabled) : 1
706 */
707 int
708 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
709 {
710 int return_status;
711 unsigned long wait_online;
712 struct qla_hw_data *ha = vha->hw;
713 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
714
715 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
716 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
717 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
718 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
719 ha->dpc_active) && time_before(jiffies, wait_online)) {
720
721 msleep(1000);
722 }
723 if (base_vha->flags.online)
724 return_status = QLA_SUCCESS;
725 else
726 return_status = QLA_FUNCTION_FAILED;
727
728 return (return_status);
729 }
730
731 /*
732 * qla2x00_wait_for_reset_ready
733 * Wait till the HBA is online after going through
734 * <= MAX_RETRIES_OF_ISP_ABORT or
735 * finally HBA is disabled ie marked offline or flash
736 * operations are in progress.
737 *
738 * Input:
739 * ha - pointer to host adapter structure
740 *
741 * Note:
742 * Does context switching-Release SPIN_LOCK
743 * (if any) before calling this routine.
744 *
745 * Return:
746 * Success (Adapter is online/no flash ops) : 0
747 * Failed (Adapter is offline/disabled/flash ops in progress) : 1
748 */
749 static int
750 qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
751 {
752 int return_status;
753 unsigned long wait_online;
754 struct qla_hw_data *ha = vha->hw;
755 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
756
757 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
758 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
759 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
760 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
761 ha->optrom_state != QLA_SWAITING ||
762 ha->dpc_active) && time_before(jiffies, wait_online))
763 msleep(1000);
764
765 if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING)
766 return_status = QLA_SUCCESS;
767 else
768 return_status = QLA_FUNCTION_FAILED;
769
770 ql_dbg(ql_dbg_taskm, vha, 0x8019,
771 "%s return status=%d.\n", __func__, return_status);
772
773 return return_status;
774 }
775
776 int
777 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
778 {
779 int return_status;
780 unsigned long wait_reset;
781 struct qla_hw_data *ha = vha->hw;
782 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
783
784 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
785 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
786 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
787 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
788 ha->dpc_active) && time_before(jiffies, wait_reset)) {
789
790 msleep(1000);
791
792 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
793 ha->flags.chip_reset_done)
794 break;
795 }
796 if (ha->flags.chip_reset_done)
797 return_status = QLA_SUCCESS;
798 else
799 return_status = QLA_FUNCTION_FAILED;
800
801 return return_status;
802 }
803
804 /*
805 * qla2x00_wait_for_loop_ready
806 * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
807 * to be in LOOP_READY state.
808 * Input:
809 * ha - pointer to host adapter structure
810 *
811 * Note:
812 * Does context switching-Release SPIN_LOCK
813 * (if any) before calling this routine.
814 *
815 *
816 * Return:
817 * Success (LOOP_READY) : 0
818 * Failed (LOOP_NOT_READY) : 1
819 */
820 static inline int
821 qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
822 {
823 int return_status = QLA_SUCCESS;
824 unsigned long loop_timeout ;
825 struct qla_hw_data *ha = vha->hw;
826 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
827
828 /* wait for 5 min at the max for loop to be ready */
829 loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
830
831 while ((!atomic_read(&base_vha->loop_down_timer) &&
832 atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
833 atomic_read(&base_vha->loop_state) != LOOP_READY) {
834 if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
835 return_status = QLA_FUNCTION_FAILED;
836 break;
837 }
838 msleep(1000);
839 if (time_after_eq(jiffies, loop_timeout)) {
840 return_status = QLA_FUNCTION_FAILED;
841 break;
842 }
843 }
844 return (return_status);
845 }
846
847 static void
848 sp_get(struct srb *sp)
849 {
850 atomic_inc(&sp->ref_count);
851 }
852
853 /**************************************************************************
854 * qla2xxx_eh_abort
855 *
856 * Description:
857 * The abort function will abort the specified command.
858 *
859 * Input:
860 * cmd = Linux SCSI command packet to be aborted.
861 *
862 * Returns:
863 * Either SUCCESS or FAILED.
864 *
865 * Note:
866 * Only return FAILED if command not returned by firmware.
867 **************************************************************************/
868 static int
869 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
870 {
871 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
872 srb_t *sp;
873 int ret;
874 unsigned int id, lun;
875 unsigned long flags;
876 int wait = 0;
877 struct qla_hw_data *ha = vha->hw;
878
879 ql_dbg(ql_dbg_taskm, vha, 0x8000,
880 "Entered %s for cmd=%p.\n", __func__, cmd);
881 if (!CMD_SP(cmd))
882 return SUCCESS;
883
884 ret = fc_block_scsi_eh(cmd);
885 ql_dbg(ql_dbg_taskm, vha, 0x8001,
886 "Return value of fc_block_scsi_eh=%d.\n", ret);
887 if (ret != 0)
888 return ret;
889 ret = SUCCESS;
890
891 id = cmd->device->id;
892 lun = cmd->device->lun;
893
894 spin_lock_irqsave(&ha->hardware_lock, flags);
895 sp = (srb_t *) CMD_SP(cmd);
896 if (!sp) {
897 spin_unlock_irqrestore(&ha->hardware_lock, flags);
898 return SUCCESS;
899 }
900
901 ql_dbg(ql_dbg_taskm, vha, 0x8002,
902 "Aborting sp=%p cmd=%p from RISC ", sp, cmd);
903
904 /* Get a reference to the sp and drop the lock.*/
905 sp_get(sp);
906
907 spin_unlock_irqrestore(&ha->hardware_lock, flags);
908 if (ha->isp_ops->abort_command(sp)) {
909 ql_dbg(ql_dbg_taskm, vha, 0x8003,
910 "Abort command mbx failed for cmd=%p.\n", cmd);
911 } else {
912 ql_dbg(ql_dbg_taskm, vha, 0x8004,
913 "Abort command mbx success.\n");
914 wait = 1;
915 }
916 qla2x00_sp_compl(ha, sp);
917
918 /* Wait for the command to be returned. */
919 if (wait) {
920 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
921 ql_log(ql_log_warn, vha, 0x8006,
922 "Abort handler timed out for cmd=%p.\n", cmd);
923 ret = FAILED;
924 }
925 }
926
927 ql_log(ql_log_info, vha, 0x801c,
928 "Abort command issued -- %d %x.\n", wait, ret);
929
930 return ret;
931 }
932
933 int
934 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
935 unsigned int l, enum nexus_wait_type type)
936 {
937 int cnt, match, status;
938 unsigned long flags;
939 struct qla_hw_data *ha = vha->hw;
940 struct req_que *req;
941 srb_t *sp;
942
943 status = QLA_SUCCESS;
944
945 spin_lock_irqsave(&ha->hardware_lock, flags);
946 req = vha->req;
947 for (cnt = 1; status == QLA_SUCCESS &&
948 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
949 sp = req->outstanding_cmds[cnt];
950 if (!sp)
951 continue;
952 if ((sp->ctx) && !IS_PROT_IO(sp))
953 continue;
954 if (vha->vp_idx != sp->fcport->vha->vp_idx)
955 continue;
956 match = 0;
957 switch (type) {
958 case WAIT_HOST:
959 match = 1;
960 break;
961 case WAIT_TARGET:
962 match = sp->cmd->device->id == t;
963 break;
964 case WAIT_LUN:
965 match = (sp->cmd->device->id == t &&
966 sp->cmd->device->lun == l);
967 break;
968 }
969 if (!match)
970 continue;
971
972 spin_unlock_irqrestore(&ha->hardware_lock, flags);
973 status = qla2x00_eh_wait_on_command(sp->cmd);
974 spin_lock_irqsave(&ha->hardware_lock, flags);
975 }
976 spin_unlock_irqrestore(&ha->hardware_lock, flags);
977
978 return status;
979 }
980
981 static char *reset_errors[] = {
982 "HBA not online",
983 "HBA not ready",
984 "Task management failed",
985 "Waiting for command completions",
986 };
987
988 static int
989 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
990 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
991 {
992 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
993 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
994 int err;
995
996 if (!fcport) {
997 ql_log(ql_log_warn, vha, 0x8007,
998 "fcport is NULL.\n");
999 return FAILED;
1000 }
1001
1002 err = fc_block_scsi_eh(cmd);
1003 ql_dbg(ql_dbg_taskm, vha, 0x8008,
1004 "fc_block_scsi_eh ret=%d.\n", err);
1005 if (err != 0)
1006 return err;
1007
1008 ql_log(ql_log_info, vha, 0x8009,
1009 "%s RESET ISSUED for id %d lun %d cmd=%p.\n", name,
1010 cmd->device->id, cmd->device->lun, cmd);
1011
1012 err = 0;
1013 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1014 ql_log(ql_log_warn, vha, 0x800a,
1015 "Wait for hba online failed for cmd=%p.\n", cmd);
1016 goto eh_reset_failed;
1017 }
1018 err = 1;
1019 if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS) {
1020 ql_log(ql_log_warn, vha, 0x800b,
1021 "Wait for loop ready failed for cmd=%p.\n", cmd);
1022 goto eh_reset_failed;
1023 }
1024 err = 2;
1025 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1026 != QLA_SUCCESS) {
1027 ql_log(ql_log_warn, vha, 0x800c,
1028 "do_reset failed for cmd=%p.\n", cmd);
1029 goto eh_reset_failed;
1030 }
1031 err = 3;
1032 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1033 cmd->device->lun, type) != QLA_SUCCESS) {
1034 ql_log(ql_log_warn, vha, 0x800d,
1035 "wait for peding cmds failed for cmd=%p.\n", cmd);
1036 goto eh_reset_failed;
1037 }
1038
1039 ql_log(ql_log_info, vha, 0x800e,
1040 "%s RESET SUCCEEDED for id %d lun %d cmd=%p.\n", name,
1041 cmd->device->id, cmd->device->lun, cmd);
1042
1043 return SUCCESS;
1044
1045 eh_reset_failed:
1046 ql_log(ql_log_info, vha, 0x800f,
1047 "%s RESET FAILED: %s for id %d lun %d cmd=%p.\n", name,
1048 reset_errors[err], cmd->device->id, cmd->device->lun);
1049 return FAILED;
1050 }
1051
1052 static int
1053 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1054 {
1055 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1056 struct qla_hw_data *ha = vha->hw;
1057
1058 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1059 ha->isp_ops->lun_reset);
1060 }
1061
1062 static int
1063 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1064 {
1065 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1066 struct qla_hw_data *ha = vha->hw;
1067
1068 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1069 ha->isp_ops->target_reset);
1070 }
1071
1072 /**************************************************************************
1073 * qla2xxx_eh_bus_reset
1074 *
1075 * Description:
1076 * The bus reset function will reset the bus and abort any executing
1077 * commands.
1078 *
1079 * Input:
1080 * cmd = Linux SCSI command packet of the command that cause the
1081 * bus reset.
1082 *
1083 * Returns:
1084 * SUCCESS/FAILURE (defined as macro in scsi.h).
1085 *
1086 **************************************************************************/
1087 static int
1088 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1089 {
1090 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1091 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1092 int ret = FAILED;
1093 unsigned int id, lun;
1094
1095 id = cmd->device->id;
1096 lun = cmd->device->lun;
1097
1098 if (!fcport) {
1099 ql_log(ql_log_warn, vha, 0x8010,
1100 "fcport is NULL.\n");
1101 return ret;
1102 }
1103
1104 ret = fc_block_scsi_eh(cmd);
1105 ql_dbg(ql_dbg_taskm, vha, 0x8011,
1106 "fc_block_scsi_eh ret=%d.\n", ret);
1107 if (ret != 0)
1108 return ret;
1109 ret = FAILED;
1110
1111 ql_log(ql_log_info, vha, 0x8012,
1112 "BUS RESET ISSUED for id %d lun %d.\n", id, lun);
1113
1114 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1115 ql_log(ql_log_fatal, vha, 0x8013,
1116 "Wait for hba online failed board disabled.\n");
1117 goto eh_bus_reset_done;
1118 }
1119
1120 if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
1121 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1122 ret = SUCCESS;
1123 }
1124 if (ret == FAILED)
1125 goto eh_bus_reset_done;
1126
1127 /* Flush outstanding commands. */
1128 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1129 QLA_SUCCESS) {
1130 ql_log(ql_log_warn, vha, 0x8014,
1131 "Wait for pending commands failed.\n");
1132 ret = FAILED;
1133 }
1134
1135 eh_bus_reset_done:
1136 ql_log(ql_log_warn, vha, 0x802b,
1137 "BUS RESET %s.\n", (ret == FAILED) ? "FAILED" : "SUCCEDED");
1138
1139 return ret;
1140 }
1141
1142 /**************************************************************************
1143 * qla2xxx_eh_host_reset
1144 *
1145 * Description:
1146 * The reset function will reset the Adapter.
1147 *
1148 * Input:
1149 * cmd = Linux SCSI command packet of the command that cause the
1150 * adapter reset.
1151 *
1152 * Returns:
1153 * Either SUCCESS or FAILED.
1154 *
1155 * Note:
1156 **************************************************************************/
1157 static int
1158 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1159 {
1160 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1161 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1162 struct qla_hw_data *ha = vha->hw;
1163 int ret = FAILED;
1164 unsigned int id, lun;
1165 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1166
1167 id = cmd->device->id;
1168 lun = cmd->device->lun;
1169
1170 if (!fcport) {
1171 ql_log(ql_log_warn, vha, 0x8016,
1172 "fcport is NULL.\n");
1173 return ret;
1174 }
1175
1176 ret = fc_block_scsi_eh(cmd);
1177 ql_dbg(ql_dbg_taskm, vha, 0x8017,
1178 "fc_block_scsi_eh ret=%d.\n", ret);
1179 if (ret != 0)
1180 return ret;
1181 ret = FAILED;
1182
1183 ql_log(ql_log_info, vha, 0x8018,
1184 "ADAPTER RESET ISSUED for id %d lun %d.\n", id, lun);
1185
1186 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1187 goto eh_host_reset_lock;
1188
1189 /*
1190 * Fixme-may be dpc thread is active and processing
1191 * loop_resync,so wait a while for it to
1192 * be completed and then issue big hammer.Otherwise
1193 * it may cause I/O failure as big hammer marks the
1194 * devices as lost kicking of the port_down_timer
1195 * while dpc is stuck for the mailbox to complete.
1196 */
1197 qla2x00_wait_for_loop_ready(vha);
1198 if (vha != base_vha) {
1199 if (qla2x00_vp_abort_isp(vha))
1200 goto eh_host_reset_lock;
1201 } else {
1202 if (IS_QLA82XX(vha->hw)) {
1203 if (!qla82xx_fcoe_ctx_reset(vha)) {
1204 /* Ctx reset success */
1205 ret = SUCCESS;
1206 goto eh_host_reset_lock;
1207 }
1208 /* fall thru if ctx reset failed */
1209 }
1210 if (ha->wq)
1211 flush_workqueue(ha->wq);
1212
1213 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1214 if (ha->isp_ops->abort_isp(base_vha)) {
1215 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1216 /* failed. schedule dpc to try */
1217 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1218
1219 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1220 ql_log(ql_log_warn, vha, 0x802a,
1221 "wait for hba online failed.\n");
1222 goto eh_host_reset_lock;
1223 }
1224 }
1225 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1226 }
1227
1228 /* Waiting for command to be returned to OS.*/
1229 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1230 QLA_SUCCESS)
1231 ret = SUCCESS;
1232
1233 eh_host_reset_lock:
1234 qla_printk(KERN_INFO, ha, "%s: reset %s.\n", __func__,
1235 (ret == FAILED) ? "failed" : "succeeded");
1236
1237 return ret;
1238 }
1239
1240 /*
1241 * qla2x00_loop_reset
1242 * Issue loop reset.
1243 *
1244 * Input:
1245 * ha = adapter block pointer.
1246 *
1247 * Returns:
1248 * 0 = success
1249 */
1250 int
1251 qla2x00_loop_reset(scsi_qla_host_t *vha)
1252 {
1253 int ret;
1254 struct fc_port *fcport;
1255 struct qla_hw_data *ha = vha->hw;
1256
1257 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1258 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1259 if (fcport->port_type != FCT_TARGET)
1260 continue;
1261
1262 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1263 if (ret != QLA_SUCCESS) {
1264 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1265 "Bus Reset failed: Target Reset=%d "
1266 "d_id=%x.\n", ret, fcport->d_id.b24);
1267 }
1268 }
1269 }
1270
1271 if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
1272 ret = qla2x00_full_login_lip(vha);
1273 if (ret != QLA_SUCCESS) {
1274 ql_dbg(ql_dbg_taskm, vha, 0x802d,
1275 "full_login_lip=%d.\n", ret);
1276 }
1277 atomic_set(&vha->loop_state, LOOP_DOWN);
1278 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1279 qla2x00_mark_all_devices_lost(vha, 0);
1280 qla2x00_wait_for_loop_ready(vha);
1281 }
1282
1283 if (ha->flags.enable_lip_reset) {
1284 ret = qla2x00_lip_reset(vha);
1285 if (ret != QLA_SUCCESS) {
1286 ql_dbg(ql_dbg_taskm, vha, 0x802e,
1287 "lip_reset failed (%d).\n", ret);
1288 } else
1289 qla2x00_wait_for_loop_ready(vha);
1290 }
1291
1292 /* Issue marker command only when we are going to start the I/O */
1293 vha->marker_needed = 1;
1294
1295 return QLA_SUCCESS;
1296 }
1297
1298 void
1299 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1300 {
1301 int que, cnt;
1302 unsigned long flags;
1303 srb_t *sp;
1304 struct srb_ctx *ctx;
1305 struct qla_hw_data *ha = vha->hw;
1306 struct req_que *req;
1307
1308 spin_lock_irqsave(&ha->hardware_lock, flags);
1309 for (que = 0; que < ha->max_req_queues; que++) {
1310 req = ha->req_q_map[que];
1311 if (!req)
1312 continue;
1313 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1314 sp = req->outstanding_cmds[cnt];
1315 if (sp) {
1316 req->outstanding_cmds[cnt] = NULL;
1317 if (!sp->ctx ||
1318 (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
1319 IS_PROT_IO(sp)) {
1320 sp->cmd->result = res;
1321 qla2x00_sp_compl(ha, sp);
1322 } else {
1323 ctx = sp->ctx;
1324 if (ctx->type == SRB_LOGIN_CMD ||
1325 ctx->type == SRB_LOGOUT_CMD) {
1326 ctx->u.iocb_cmd->free(sp);
1327 } else {
1328 struct fc_bsg_job *bsg_job =
1329 ctx->u.bsg_job;
1330 if (bsg_job->request->msgcode
1331 == FC_BSG_HST_CT)
1332 kfree(sp->fcport);
1333 bsg_job->req->errors = 0;
1334 bsg_job->reply->result = res;
1335 bsg_job->job_done(bsg_job);
1336 kfree(sp->ctx);
1337 mempool_free(sp,
1338 ha->srb_mempool);
1339 }
1340 }
1341 }
1342 }
1343 }
1344 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1345 }
1346
1347 static int
1348 qla2xxx_slave_alloc(struct scsi_device *sdev)
1349 {
1350 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1351
1352 if (!rport || fc_remote_port_chkready(rport))
1353 return -ENXIO;
1354
1355 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1356
1357 return 0;
1358 }
1359
1360 static int
1361 qla2xxx_slave_configure(struct scsi_device *sdev)
1362 {
1363 scsi_qla_host_t *vha = shost_priv(sdev->host);
1364 struct req_que *req = vha->req;
1365
1366 if (sdev->tagged_supported)
1367 scsi_activate_tcq(sdev, req->max_q_depth);
1368 else
1369 scsi_deactivate_tcq(sdev, req->max_q_depth);
1370 return 0;
1371 }
1372
1373 static void
1374 qla2xxx_slave_destroy(struct scsi_device *sdev)
1375 {
1376 sdev->hostdata = NULL;
1377 }
1378
1379 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1380 {
1381 fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1382
1383 if (!scsi_track_queue_full(sdev, qdepth))
1384 return;
1385
1386 ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1387 "Queue depth adjusted-down "
1388 "to %d for scsi(%ld:%d:%d:%d).\n",
1389 sdev->queue_depth, fcport->vha->host_no,
1390 sdev->channel, sdev->id, sdev->lun);
1391 }
1392
1393 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1394 {
1395 fc_port_t *fcport = sdev->hostdata;
1396 struct scsi_qla_host *vha = fcport->vha;
1397 struct req_que *req = NULL;
1398
1399 req = vha->req;
1400 if (!req)
1401 return;
1402
1403 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1404 return;
1405
1406 if (sdev->ordered_tags)
1407 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1408 else
1409 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1410
1411 ql_dbg(ql_dbg_io, vha, 0x302a,
1412 "Queue depth adjusted-up to %d for "
1413 "scsi(%ld:%d:%d:%d).\n",
1414 sdev->queue_depth, fcport->vha->host_no,
1415 sdev->channel, sdev->id, sdev->lun);
1416 }
1417
1418 static int
1419 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1420 {
1421 switch (reason) {
1422 case SCSI_QDEPTH_DEFAULT:
1423 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1424 break;
1425 case SCSI_QDEPTH_QFULL:
1426 qla2x00_handle_queue_full(sdev, qdepth);
1427 break;
1428 case SCSI_QDEPTH_RAMP_UP:
1429 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1430 break;
1431 default:
1432 return -EOPNOTSUPP;
1433 }
1434
1435 return sdev->queue_depth;
1436 }
1437
1438 static int
1439 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1440 {
1441 if (sdev->tagged_supported) {
1442 scsi_set_tag_type(sdev, tag_type);
1443 if (tag_type)
1444 scsi_activate_tcq(sdev, sdev->queue_depth);
1445 else
1446 scsi_deactivate_tcq(sdev, sdev->queue_depth);
1447 } else
1448 tag_type = 0;
1449
1450 return tag_type;
1451 }
1452
1453 /**
1454 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1455 * @ha: HA context
1456 *
1457 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1458 * supported addressing method.
1459 */
1460 static void
1461 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1462 {
1463 /* Assume a 32bit DMA mask. */
1464 ha->flags.enable_64bit_addressing = 0;
1465
1466 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1467 /* Any upper-dword bits set? */
1468 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1469 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1470 /* Ok, a 64bit DMA mask is applicable. */
1471 ha->flags.enable_64bit_addressing = 1;
1472 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1473 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1474 return;
1475 }
1476 }
1477
1478 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1479 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1480 }
1481
1482 static void
1483 qla2x00_enable_intrs(struct qla_hw_data *ha)
1484 {
1485 unsigned long flags = 0;
1486 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1487
1488 spin_lock_irqsave(&ha->hardware_lock, flags);
1489 ha->interrupts_on = 1;
1490 /* enable risc and host interrupts */
1491 WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1492 RD_REG_WORD(&reg->ictrl);
1493 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1494
1495 }
1496
1497 static void
1498 qla2x00_disable_intrs(struct qla_hw_data *ha)
1499 {
1500 unsigned long flags = 0;
1501 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1502
1503 spin_lock_irqsave(&ha->hardware_lock, flags);
1504 ha->interrupts_on = 0;
1505 /* disable risc and host interrupts */
1506 WRT_REG_WORD(&reg->ictrl, 0);
1507 RD_REG_WORD(&reg->ictrl);
1508 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1509 }
1510
1511 static void
1512 qla24xx_enable_intrs(struct qla_hw_data *ha)
1513 {
1514 unsigned long flags = 0;
1515 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1516
1517 spin_lock_irqsave(&ha->hardware_lock, flags);
1518 ha->interrupts_on = 1;
1519 WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1520 RD_REG_DWORD(&reg->ictrl);
1521 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1522 }
1523
1524 static void
1525 qla24xx_disable_intrs(struct qla_hw_data *ha)
1526 {
1527 unsigned long flags = 0;
1528 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1529
1530 if (IS_NOPOLLING_TYPE(ha))
1531 return;
1532 spin_lock_irqsave(&ha->hardware_lock, flags);
1533 ha->interrupts_on = 0;
1534 WRT_REG_DWORD(&reg->ictrl, 0);
1535 RD_REG_DWORD(&reg->ictrl);
1536 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1537 }
1538
1539 static struct isp_operations qla2100_isp_ops = {
1540 .pci_config = qla2100_pci_config,
1541 .reset_chip = qla2x00_reset_chip,
1542 .chip_diag = qla2x00_chip_diag,
1543 .config_rings = qla2x00_config_rings,
1544 .reset_adapter = qla2x00_reset_adapter,
1545 .nvram_config = qla2x00_nvram_config,
1546 .update_fw_options = qla2x00_update_fw_options,
1547 .load_risc = qla2x00_load_risc,
1548 .pci_info_str = qla2x00_pci_info_str,
1549 .fw_version_str = qla2x00_fw_version_str,
1550 .intr_handler = qla2100_intr_handler,
1551 .enable_intrs = qla2x00_enable_intrs,
1552 .disable_intrs = qla2x00_disable_intrs,
1553 .abort_command = qla2x00_abort_command,
1554 .target_reset = qla2x00_abort_target,
1555 .lun_reset = qla2x00_lun_reset,
1556 .fabric_login = qla2x00_login_fabric,
1557 .fabric_logout = qla2x00_fabric_logout,
1558 .calc_req_entries = qla2x00_calc_iocbs_32,
1559 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1560 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1561 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1562 .read_nvram = qla2x00_read_nvram_data,
1563 .write_nvram = qla2x00_write_nvram_data,
1564 .fw_dump = qla2100_fw_dump,
1565 .beacon_on = NULL,
1566 .beacon_off = NULL,
1567 .beacon_blink = NULL,
1568 .read_optrom = qla2x00_read_optrom_data,
1569 .write_optrom = qla2x00_write_optrom_data,
1570 .get_flash_version = qla2x00_get_flash_version,
1571 .start_scsi = qla2x00_start_scsi,
1572 .abort_isp = qla2x00_abort_isp,
1573 };
1574
1575 static struct isp_operations qla2300_isp_ops = {
1576 .pci_config = qla2300_pci_config,
1577 .reset_chip = qla2x00_reset_chip,
1578 .chip_diag = qla2x00_chip_diag,
1579 .config_rings = qla2x00_config_rings,
1580 .reset_adapter = qla2x00_reset_adapter,
1581 .nvram_config = qla2x00_nvram_config,
1582 .update_fw_options = qla2x00_update_fw_options,
1583 .load_risc = qla2x00_load_risc,
1584 .pci_info_str = qla2x00_pci_info_str,
1585 .fw_version_str = qla2x00_fw_version_str,
1586 .intr_handler = qla2300_intr_handler,
1587 .enable_intrs = qla2x00_enable_intrs,
1588 .disable_intrs = qla2x00_disable_intrs,
1589 .abort_command = qla2x00_abort_command,
1590 .target_reset = qla2x00_abort_target,
1591 .lun_reset = qla2x00_lun_reset,
1592 .fabric_login = qla2x00_login_fabric,
1593 .fabric_logout = qla2x00_fabric_logout,
1594 .calc_req_entries = qla2x00_calc_iocbs_32,
1595 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1596 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1597 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1598 .read_nvram = qla2x00_read_nvram_data,
1599 .write_nvram = qla2x00_write_nvram_data,
1600 .fw_dump = qla2300_fw_dump,
1601 .beacon_on = qla2x00_beacon_on,
1602 .beacon_off = qla2x00_beacon_off,
1603 .beacon_blink = qla2x00_beacon_blink,
1604 .read_optrom = qla2x00_read_optrom_data,
1605 .write_optrom = qla2x00_write_optrom_data,
1606 .get_flash_version = qla2x00_get_flash_version,
1607 .start_scsi = qla2x00_start_scsi,
1608 .abort_isp = qla2x00_abort_isp,
1609 };
1610
1611 static struct isp_operations qla24xx_isp_ops = {
1612 .pci_config = qla24xx_pci_config,
1613 .reset_chip = qla24xx_reset_chip,
1614 .chip_diag = qla24xx_chip_diag,
1615 .config_rings = qla24xx_config_rings,
1616 .reset_adapter = qla24xx_reset_adapter,
1617 .nvram_config = qla24xx_nvram_config,
1618 .update_fw_options = qla24xx_update_fw_options,
1619 .load_risc = qla24xx_load_risc,
1620 .pci_info_str = qla24xx_pci_info_str,
1621 .fw_version_str = qla24xx_fw_version_str,
1622 .intr_handler = qla24xx_intr_handler,
1623 .enable_intrs = qla24xx_enable_intrs,
1624 .disable_intrs = qla24xx_disable_intrs,
1625 .abort_command = qla24xx_abort_command,
1626 .target_reset = qla24xx_abort_target,
1627 .lun_reset = qla24xx_lun_reset,
1628 .fabric_login = qla24xx_login_fabric,
1629 .fabric_logout = qla24xx_fabric_logout,
1630 .calc_req_entries = NULL,
1631 .build_iocbs = NULL,
1632 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1633 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1634 .read_nvram = qla24xx_read_nvram_data,
1635 .write_nvram = qla24xx_write_nvram_data,
1636 .fw_dump = qla24xx_fw_dump,
1637 .beacon_on = qla24xx_beacon_on,
1638 .beacon_off = qla24xx_beacon_off,
1639 .beacon_blink = qla24xx_beacon_blink,
1640 .read_optrom = qla24xx_read_optrom_data,
1641 .write_optrom = qla24xx_write_optrom_data,
1642 .get_flash_version = qla24xx_get_flash_version,
1643 .start_scsi = qla24xx_start_scsi,
1644 .abort_isp = qla2x00_abort_isp,
1645 };
1646
1647 static struct isp_operations qla25xx_isp_ops = {
1648 .pci_config = qla25xx_pci_config,
1649 .reset_chip = qla24xx_reset_chip,
1650 .chip_diag = qla24xx_chip_diag,
1651 .config_rings = qla24xx_config_rings,
1652 .reset_adapter = qla24xx_reset_adapter,
1653 .nvram_config = qla24xx_nvram_config,
1654 .update_fw_options = qla24xx_update_fw_options,
1655 .load_risc = qla24xx_load_risc,
1656 .pci_info_str = qla24xx_pci_info_str,
1657 .fw_version_str = qla24xx_fw_version_str,
1658 .intr_handler = qla24xx_intr_handler,
1659 .enable_intrs = qla24xx_enable_intrs,
1660 .disable_intrs = qla24xx_disable_intrs,
1661 .abort_command = qla24xx_abort_command,
1662 .target_reset = qla24xx_abort_target,
1663 .lun_reset = qla24xx_lun_reset,
1664 .fabric_login = qla24xx_login_fabric,
1665 .fabric_logout = qla24xx_fabric_logout,
1666 .calc_req_entries = NULL,
1667 .build_iocbs = NULL,
1668 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1669 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1670 .read_nvram = qla25xx_read_nvram_data,
1671 .write_nvram = qla25xx_write_nvram_data,
1672 .fw_dump = qla25xx_fw_dump,
1673 .beacon_on = qla24xx_beacon_on,
1674 .beacon_off = qla24xx_beacon_off,
1675 .beacon_blink = qla24xx_beacon_blink,
1676 .read_optrom = qla25xx_read_optrom_data,
1677 .write_optrom = qla24xx_write_optrom_data,
1678 .get_flash_version = qla24xx_get_flash_version,
1679 .start_scsi = qla24xx_dif_start_scsi,
1680 .abort_isp = qla2x00_abort_isp,
1681 };
1682
1683 static struct isp_operations qla81xx_isp_ops = {
1684 .pci_config = qla25xx_pci_config,
1685 .reset_chip = qla24xx_reset_chip,
1686 .chip_diag = qla24xx_chip_diag,
1687 .config_rings = qla24xx_config_rings,
1688 .reset_adapter = qla24xx_reset_adapter,
1689 .nvram_config = qla81xx_nvram_config,
1690 .update_fw_options = qla81xx_update_fw_options,
1691 .load_risc = qla81xx_load_risc,
1692 .pci_info_str = qla24xx_pci_info_str,
1693 .fw_version_str = qla24xx_fw_version_str,
1694 .intr_handler = qla24xx_intr_handler,
1695 .enable_intrs = qla24xx_enable_intrs,
1696 .disable_intrs = qla24xx_disable_intrs,
1697 .abort_command = qla24xx_abort_command,
1698 .target_reset = qla24xx_abort_target,
1699 .lun_reset = qla24xx_lun_reset,
1700 .fabric_login = qla24xx_login_fabric,
1701 .fabric_logout = qla24xx_fabric_logout,
1702 .calc_req_entries = NULL,
1703 .build_iocbs = NULL,
1704 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1705 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1706 .read_nvram = NULL,
1707 .write_nvram = NULL,
1708 .fw_dump = qla81xx_fw_dump,
1709 .beacon_on = qla24xx_beacon_on,
1710 .beacon_off = qla24xx_beacon_off,
1711 .beacon_blink = qla24xx_beacon_blink,
1712 .read_optrom = qla25xx_read_optrom_data,
1713 .write_optrom = qla24xx_write_optrom_data,
1714 .get_flash_version = qla24xx_get_flash_version,
1715 .start_scsi = qla24xx_dif_start_scsi,
1716 .abort_isp = qla2x00_abort_isp,
1717 };
1718
1719 static struct isp_operations qla82xx_isp_ops = {
1720 .pci_config = qla82xx_pci_config,
1721 .reset_chip = qla82xx_reset_chip,
1722 .chip_diag = qla24xx_chip_diag,
1723 .config_rings = qla82xx_config_rings,
1724 .reset_adapter = qla24xx_reset_adapter,
1725 .nvram_config = qla81xx_nvram_config,
1726 .update_fw_options = qla24xx_update_fw_options,
1727 .load_risc = qla82xx_load_risc,
1728 .pci_info_str = qla82xx_pci_info_str,
1729 .fw_version_str = qla24xx_fw_version_str,
1730 .intr_handler = qla82xx_intr_handler,
1731 .enable_intrs = qla82xx_enable_intrs,
1732 .disable_intrs = qla82xx_disable_intrs,
1733 .abort_command = qla24xx_abort_command,
1734 .target_reset = qla24xx_abort_target,
1735 .lun_reset = qla24xx_lun_reset,
1736 .fabric_login = qla24xx_login_fabric,
1737 .fabric_logout = qla24xx_fabric_logout,
1738 .calc_req_entries = NULL,
1739 .build_iocbs = NULL,
1740 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1741 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1742 .read_nvram = qla24xx_read_nvram_data,
1743 .write_nvram = qla24xx_write_nvram_data,
1744 .fw_dump = qla24xx_fw_dump,
1745 .beacon_on = qla24xx_beacon_on,
1746 .beacon_off = qla24xx_beacon_off,
1747 .beacon_blink = qla24xx_beacon_blink,
1748 .read_optrom = qla82xx_read_optrom_data,
1749 .write_optrom = qla82xx_write_optrom_data,
1750 .get_flash_version = qla24xx_get_flash_version,
1751 .start_scsi = qla82xx_start_scsi,
1752 .abort_isp = qla82xx_abort_isp,
1753 };
1754
1755 static inline void
1756 qla2x00_set_isp_flags(struct qla_hw_data *ha)
1757 {
1758 ha->device_type = DT_EXTENDED_IDS;
1759 switch (ha->pdev->device) {
1760 case PCI_DEVICE_ID_QLOGIC_ISP2100:
1761 ha->device_type |= DT_ISP2100;
1762 ha->device_type &= ~DT_EXTENDED_IDS;
1763 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
1764 break;
1765 case PCI_DEVICE_ID_QLOGIC_ISP2200:
1766 ha->device_type |= DT_ISP2200;
1767 ha->device_type &= ~DT_EXTENDED_IDS;
1768 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
1769 break;
1770 case PCI_DEVICE_ID_QLOGIC_ISP2300:
1771 ha->device_type |= DT_ISP2300;
1772 ha->device_type |= DT_ZIO_SUPPORTED;
1773 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1774 break;
1775 case PCI_DEVICE_ID_QLOGIC_ISP2312:
1776 ha->device_type |= DT_ISP2312;
1777 ha->device_type |= DT_ZIO_SUPPORTED;
1778 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1779 break;
1780 case PCI_DEVICE_ID_QLOGIC_ISP2322:
1781 ha->device_type |= DT_ISP2322;
1782 ha->device_type |= DT_ZIO_SUPPORTED;
1783 if (ha->pdev->subsystem_vendor == 0x1028 &&
1784 ha->pdev->subsystem_device == 0x0170)
1785 ha->device_type |= DT_OEM_001;
1786 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1787 break;
1788 case PCI_DEVICE_ID_QLOGIC_ISP6312:
1789 ha->device_type |= DT_ISP6312;
1790 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1791 break;
1792 case PCI_DEVICE_ID_QLOGIC_ISP6322:
1793 ha->device_type |= DT_ISP6322;
1794 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1795 break;
1796 case PCI_DEVICE_ID_QLOGIC_ISP2422:
1797 ha->device_type |= DT_ISP2422;
1798 ha->device_type |= DT_ZIO_SUPPORTED;
1799 ha->device_type |= DT_FWI2;
1800 ha->device_type |= DT_IIDMA;
1801 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1802 break;
1803 case PCI_DEVICE_ID_QLOGIC_ISP2432:
1804 ha->device_type |= DT_ISP2432;
1805 ha->device_type |= DT_ZIO_SUPPORTED;
1806 ha->device_type |= DT_FWI2;
1807 ha->device_type |= DT_IIDMA;
1808 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1809 break;
1810 case PCI_DEVICE_ID_QLOGIC_ISP8432:
1811 ha->device_type |= DT_ISP8432;
1812 ha->device_type |= DT_ZIO_SUPPORTED;
1813 ha->device_type |= DT_FWI2;
1814 ha->device_type |= DT_IIDMA;
1815 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1816 break;
1817 case PCI_DEVICE_ID_QLOGIC_ISP5422:
1818 ha->device_type |= DT_ISP5422;
1819 ha->device_type |= DT_FWI2;
1820 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1821 break;
1822 case PCI_DEVICE_ID_QLOGIC_ISP5432:
1823 ha->device_type |= DT_ISP5432;
1824 ha->device_type |= DT_FWI2;
1825 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1826 break;
1827 case PCI_DEVICE_ID_QLOGIC_ISP2532:
1828 ha->device_type |= DT_ISP2532;
1829 ha->device_type |= DT_ZIO_SUPPORTED;
1830 ha->device_type |= DT_FWI2;
1831 ha->device_type |= DT_IIDMA;
1832 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1833 break;
1834 case PCI_DEVICE_ID_QLOGIC_ISP8001:
1835 ha->device_type |= DT_ISP8001;
1836 ha->device_type |= DT_ZIO_SUPPORTED;
1837 ha->device_type |= DT_FWI2;
1838 ha->device_type |= DT_IIDMA;
1839 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1840 break;
1841 case PCI_DEVICE_ID_QLOGIC_ISP8021:
1842 ha->device_type |= DT_ISP8021;
1843 ha->device_type |= DT_ZIO_SUPPORTED;
1844 ha->device_type |= DT_FWI2;
1845 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1846 /* Initialize 82XX ISP flags */
1847 qla82xx_init_flags(ha);
1848 break;
1849 }
1850
1851 if (IS_QLA82XX(ha))
1852 ha->port_no = !(ha->portnum & 1);
1853 else
1854 /* Get adapter physical port no from interrupt pin register. */
1855 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
1856
1857 if (ha->port_no & 1)
1858 ha->flags.port0 = 1;
1859 else
1860 ha->flags.port0 = 0;
1861 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
1862 "device_type=0x%x port=%d fw_srisc_address=%p.\n",
1863 ha->device_type, ha->flags.port0, ha->fw_srisc_address);
1864 }
1865
1866 static int
1867 qla2x00_iospace_config(struct qla_hw_data *ha)
1868 {
1869 resource_size_t pio;
1870 uint16_t msix;
1871 int cpus;
1872
1873 if (IS_QLA82XX(ha))
1874 return qla82xx_iospace_config(ha);
1875
1876 if (pci_request_selected_regions(ha->pdev, ha->bars,
1877 QLA2XXX_DRIVER_NAME)) {
1878 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1879 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1880 pci_name(ha->pdev));
1881 goto iospace_error_exit;
1882 }
1883 if (!(ha->bars & 1))
1884 goto skip_pio;
1885
1886 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1887 pio = pci_resource_start(ha->pdev, 0);
1888 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1889 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1890 ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1891 "Invalid pci I/O region size (%s).\n",
1892 pci_name(ha->pdev));
1893 pio = 0;
1894 }
1895 } else {
1896 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1897 "Region #0 no a PIO resource (%s).\n",
1898 pci_name(ha->pdev));
1899 pio = 0;
1900 }
1901 ha->pio_address = pio;
1902 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1903 "PIO address=%p.\n",
1904 ha->pio_address);
1905
1906 skip_pio:
1907 /* Use MMIO operations for all accesses. */
1908 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1909 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1910 "Region #1 not an MMIO resource (%s), aborting.\n",
1911 pci_name(ha->pdev));
1912 goto iospace_error_exit;
1913 }
1914 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1915 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1916 "Invalid PCI mem region size (%s), aborting.\n",
1917 pci_name(ha->pdev));
1918 goto iospace_error_exit;
1919 }
1920
1921 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1922 if (!ha->iobase) {
1923 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1924 "Cannot remap MMIO (%s), aborting.\n",
1925 pci_name(ha->pdev));
1926 goto iospace_error_exit;
1927 }
1928
1929 /* Determine queue resources */
1930 ha->max_req_queues = ha->max_rsp_queues = 1;
1931 if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1932 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1933 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1934 goto mqiobase_exit;
1935
1936 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1937 pci_resource_len(ha->pdev, 3));
1938 if (ha->mqiobase) {
1939 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1940 "MQIO Base=%p.\n", ha->mqiobase);
1941 /* Read MSIX vector size of the board */
1942 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1943 ha->msix_count = msix;
1944 /* Max queues are bounded by available msix vectors */
1945 /* queue 0 uses two msix vectors */
1946 if (ql2xmultique_tag) {
1947 cpus = num_online_cpus();
1948 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1949 (cpus + 1) : (ha->msix_count - 1);
1950 ha->max_req_queues = 2;
1951 } else if (ql2xmaxqueues > 1) {
1952 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1953 QLA_MQ_SIZE : ql2xmaxqueues;
1954 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1955 "QoS mode set, max no of request queues:%d.\n",
1956 ha->max_req_queues);
1957 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1958 "QoS mode set, max no of request queues:%d.\n",
1959 ha->max_req_queues);
1960 }
1961 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1962 "MSI-X vector count: %d.\n", msix);
1963 } else
1964 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1965 "BAR 3 not enabled.\n");
1966
1967 mqiobase_exit:
1968 ha->msix_count = ha->max_rsp_queues + 1;
1969 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1970 "MSIX Count:%d.\n", ha->msix_count);
1971 return (0);
1972
1973 iospace_error_exit:
1974 return (-ENOMEM);
1975 }
1976
1977 static void
1978 qla2xxx_scan_start(struct Scsi_Host *shost)
1979 {
1980 scsi_qla_host_t *vha = shost_priv(shost);
1981
1982 if (vha->hw->flags.running_gold_fw)
1983 return;
1984
1985 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1986 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1987 set_bit(RSCN_UPDATE, &vha->dpc_flags);
1988 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
1989 }
1990
1991 static int
1992 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
1993 {
1994 scsi_qla_host_t *vha = shost_priv(shost);
1995
1996 if (!vha->host)
1997 return 1;
1998 if (time > vha->hw->loop_reset_delay * HZ)
1999 return 1;
2000
2001 return atomic_read(&vha->loop_state) == LOOP_READY;
2002 }
2003
2004 /*
2005 * PCI driver interface
2006 */
2007 static int __devinit
2008 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2009 {
2010 int ret = -ENODEV;
2011 struct Scsi_Host *host;
2012 scsi_qla_host_t *base_vha = NULL;
2013 struct qla_hw_data *ha;
2014 char pci_info[30];
2015 char fw_str[30];
2016 struct scsi_host_template *sht;
2017 int bars, max_id, mem_only = 0;
2018 uint16_t req_length = 0, rsp_length = 0;
2019 struct req_que *req = NULL;
2020 struct rsp_que *rsp = NULL;
2021
2022 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2023 sht = &qla2xxx_driver_template;
2024 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2025 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2026 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2027 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2028 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2029 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2030 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2031 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
2032 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2033 mem_only = 1;
2034 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2035 "Mem only adapter.\n");
2036 }
2037 ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2038 "Bars=%d.\n", bars);
2039
2040 if (mem_only) {
2041 if (pci_enable_device_mem(pdev))
2042 goto probe_out;
2043 } else {
2044 if (pci_enable_device(pdev))
2045 goto probe_out;
2046 }
2047
2048 /* This may fail but that's ok */
2049 pci_enable_pcie_error_reporting(pdev);
2050
2051 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2052 if (!ha) {
2053 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2054 "Unable to allocate memory for ha.\n");
2055 goto probe_out;
2056 }
2057 ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2058 "Memory allocated for ha=%p.\n", ha);
2059 ha->pdev = pdev;
2060
2061 /* Clear our data area */
2062 ha->bars = bars;
2063 ha->mem_only = mem_only;
2064 spin_lock_init(&ha->hardware_lock);
2065 spin_lock_init(&ha->vport_slock);
2066
2067 /* Set ISP-type information. */
2068 qla2x00_set_isp_flags(ha);
2069
2070 /* Set EEH reset type to fundamental if required by hba */
2071 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
2072 pdev->needs_freset = 1;
2073 }
2074
2075 /* Configure PCI I/O space */
2076 ret = qla2x00_iospace_config(ha);
2077 if (ret)
2078 goto probe_hw_failed;
2079
2080 ql_log_pci(ql_log_info, pdev, 0x001d,
2081 "Found an ISP%04X irq %d iobase 0x%p.\n",
2082 pdev->device, pdev->irq, ha->iobase);
2083 ha->prev_topology = 0;
2084 ha->init_cb_size = sizeof(init_cb_t);
2085 ha->link_data_rate = PORT_SPEED_UNKNOWN;
2086 ha->optrom_size = OPTROM_SIZE_2300;
2087
2088 /* Assign ISP specific operations. */
2089 max_id = MAX_TARGETS_2200;
2090 if (IS_QLA2100(ha)) {
2091 max_id = MAX_TARGETS_2100;
2092 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2093 req_length = REQUEST_ENTRY_CNT_2100;
2094 rsp_length = RESPONSE_ENTRY_CNT_2100;
2095 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2096 ha->gid_list_info_size = 4;
2097 ha->flash_conf_off = ~0;
2098 ha->flash_data_off = ~0;
2099 ha->nvram_conf_off = ~0;
2100 ha->nvram_data_off = ~0;
2101 ha->isp_ops = &qla2100_isp_ops;
2102 } else if (IS_QLA2200(ha)) {
2103 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2104 req_length = REQUEST_ENTRY_CNT_2200;
2105 rsp_length = RESPONSE_ENTRY_CNT_2100;
2106 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2107 ha->gid_list_info_size = 4;
2108 ha->flash_conf_off = ~0;
2109 ha->flash_data_off = ~0;
2110 ha->nvram_conf_off = ~0;
2111 ha->nvram_data_off = ~0;
2112 ha->isp_ops = &qla2100_isp_ops;
2113 } else if (IS_QLA23XX(ha)) {
2114 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2115 req_length = REQUEST_ENTRY_CNT_2200;
2116 rsp_length = RESPONSE_ENTRY_CNT_2300;
2117 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2118 ha->gid_list_info_size = 6;
2119 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2120 ha->optrom_size = OPTROM_SIZE_2322;
2121 ha->flash_conf_off = ~0;
2122 ha->flash_data_off = ~0;
2123 ha->nvram_conf_off = ~0;
2124 ha->nvram_data_off = ~0;
2125 ha->isp_ops = &qla2300_isp_ops;
2126 } else if (IS_QLA24XX_TYPE(ha)) {
2127 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2128 req_length = REQUEST_ENTRY_CNT_24XX;
2129 rsp_length = RESPONSE_ENTRY_CNT_2300;
2130 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2131 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2132 ha->gid_list_info_size = 8;
2133 ha->optrom_size = OPTROM_SIZE_24XX;
2134 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2135 ha->isp_ops = &qla24xx_isp_ops;
2136 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2137 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2138 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2139 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2140 } else if (IS_QLA25XX(ha)) {
2141 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2142 req_length = REQUEST_ENTRY_CNT_24XX;
2143 rsp_length = RESPONSE_ENTRY_CNT_2300;
2144 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2145 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2146 ha->gid_list_info_size = 8;
2147 ha->optrom_size = OPTROM_SIZE_25XX;
2148 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2149 ha->isp_ops = &qla25xx_isp_ops;
2150 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2151 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2152 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2153 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2154 } else if (IS_QLA81XX(ha)) {
2155 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2156 req_length = REQUEST_ENTRY_CNT_24XX;
2157 rsp_length = RESPONSE_ENTRY_CNT_2300;
2158 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2159 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2160 ha->gid_list_info_size = 8;
2161 ha->optrom_size = OPTROM_SIZE_81XX;
2162 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2163 ha->isp_ops = &qla81xx_isp_ops;
2164 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2165 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2166 ha->nvram_conf_off = ~0;
2167 ha->nvram_data_off = ~0;
2168 } else if (IS_QLA82XX(ha)) {
2169 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2170 req_length = REQUEST_ENTRY_CNT_82XX;
2171 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2172 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2173 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2174 ha->gid_list_info_size = 8;
2175 ha->optrom_size = OPTROM_SIZE_82XX;
2176 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2177 ha->isp_ops = &qla82xx_isp_ops;
2178 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2179 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2180 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2181 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2182 }
2183 ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2184 "mbx_count=%d, req_length=%d, "
2185 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2186 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, .\n",
2187 ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2188 ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2189 ha->nvram_npiv_size);
2190 ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2191 "isp_ops=%p, flash_conf_off=%d, "
2192 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2193 ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2194 ha->nvram_conf_off, ha->nvram_data_off);
2195 mutex_init(&ha->vport_lock);
2196 init_completion(&ha->mbx_cmd_comp);
2197 complete(&ha->mbx_cmd_comp);
2198 init_completion(&ha->mbx_intr_comp);
2199 init_completion(&ha->dcbx_comp);
2200
2201 set_bit(0, (unsigned long *) ha->vp_idx_map);
2202
2203 qla2x00_config_dma_addressing(ha);
2204 ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2205 "64 Bit addressing is %s.\n",
2206 ha->flags.enable_64bit_addressing ? "enable" :
2207 "disable");
2208 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2209 if (!ret) {
2210 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2211 "Failed to allocate memory for adapter, aborting.\n");
2212
2213 goto probe_hw_failed;
2214 }
2215
2216 req->max_q_depth = MAX_Q_DEPTH;
2217 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2218 req->max_q_depth = ql2xmaxqdepth;
2219
2220
2221 base_vha = qla2x00_create_host(sht, ha);
2222 if (!base_vha) {
2223 ret = -ENOMEM;
2224 qla2x00_mem_free(ha);
2225 qla2x00_free_req_que(ha, req);
2226 qla2x00_free_rsp_que(ha, rsp);
2227 goto probe_hw_failed;
2228 }
2229
2230 pci_set_drvdata(pdev, base_vha);
2231
2232 host = base_vha->host;
2233 base_vha->req = req;
2234 host->can_queue = req->length + 128;
2235 if (IS_QLA2XXX_MIDTYPE(ha))
2236 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2237 else
2238 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2239 base_vha->vp_idx;
2240
2241 /* Set the SG table size based on ISP type */
2242 if (!IS_FWI2_CAPABLE(ha)) {
2243 if (IS_QLA2100(ha))
2244 host->sg_tablesize = 32;
2245 } else {
2246 if (!IS_QLA82XX(ha))
2247 host->sg_tablesize = QLA_SG_ALL;
2248 }
2249 ql_dbg(ql_dbg_init, base_vha, 0x0032,
2250 "can_queue=%d, req=%p, "
2251 "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2252 host->can_queue, base_vha->req,
2253 base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2254 host->max_id = max_id;
2255 host->this_id = 255;
2256 host->cmd_per_lun = 3;
2257 host->unique_id = host->host_no;
2258 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2259 host->max_cmd_len = 32;
2260 else
2261 host->max_cmd_len = MAX_CMDSZ;
2262 host->max_channel = MAX_BUSES - 1;
2263 host->max_lun = ql2xmaxlun;
2264 host->transportt = qla2xxx_transport_template;
2265 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2266
2267 ql_dbg(ql_dbg_init, base_vha, 0x0033,
2268 "max_id=%d this_id=%d "
2269 "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2270 "max_lun=%d transportt=%p, vendor_id=%d.\n", host->max_id,
2271 host->this_id, host->cmd_per_lun, host->unique_id,
2272 host->max_cmd_len, host->max_channel, host->max_lun,
2273 host->transportt, sht->vendor_id);
2274
2275 /* Set up the irqs */
2276 ret = qla2x00_request_irqs(ha, rsp);
2277 if (ret)
2278 goto probe_init_failed;
2279
2280 pci_save_state(pdev);
2281
2282 /* Alloc arrays of request and response ring ptrs */
2283 que_init:
2284 if (!qla2x00_alloc_queues(ha)) {
2285 ql_log(ql_log_fatal, base_vha, 0x003d,
2286 "Failed to allocate memory for queue pointers.. aborting.\n");
2287 goto probe_init_failed;
2288 }
2289
2290 ha->rsp_q_map[0] = rsp;
2291 ha->req_q_map[0] = req;
2292 rsp->req = req;
2293 req->rsp = rsp;
2294 set_bit(0, ha->req_qid_map);
2295 set_bit(0, ha->rsp_qid_map);
2296 /* FWI2-capable only. */
2297 req->req_q_in = &ha->iobase->isp24.req_q_in;
2298 req->req_q_out = &ha->iobase->isp24.req_q_out;
2299 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2300 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2301 if (ha->mqenable) {
2302 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2303 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2304 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2305 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
2306 }
2307
2308 if (IS_QLA82XX(ha)) {
2309 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2310 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2311 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2312 }
2313
2314 ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2315 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2316 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2317 ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2318 "req->req_q_in=%p req->req_q_out=%p "
2319 "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2320 req->req_q_in, req->req_q_out,
2321 rsp->rsp_q_in, rsp->rsp_q_out);
2322 ql_dbg(ql_dbg_init, base_vha, 0x003e,
2323 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2324 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2325 ql_dbg(ql_dbg_init, base_vha, 0x003f,
2326 "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2327 req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2328
2329 if (qla2x00_initialize_adapter(base_vha)) {
2330 ql_log(ql_log_fatal, base_vha, 0x00d6,
2331 "Failed to initialize adapter - Adapter flags %x.\n",
2332 base_vha->device_flags);
2333
2334 if (IS_QLA82XX(ha)) {
2335 qla82xx_idc_lock(ha);
2336 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2337 QLA82XX_DEV_FAILED);
2338 qla82xx_idc_unlock(ha);
2339 ql_log(ql_log_fatal, base_vha, 0x00d7,
2340 "HW State: FAILED.\n");
2341 }
2342
2343 ret = -ENODEV;
2344 goto probe_failed;
2345 }
2346
2347 if (ha->mqenable) {
2348 if (qla25xx_setup_mode(base_vha)) {
2349 ql_log(ql_log_warn, base_vha, 0x00ec,
2350 "Failed to create queues, falling back to single queue mode.\n");
2351 goto que_init;
2352 }
2353 }
2354
2355 if (ha->flags.running_gold_fw)
2356 goto skip_dpc;
2357
2358 /*
2359 * Startup the kernel thread for this host adapter
2360 */
2361 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2362 "%s_dpc", base_vha->host_str);
2363 if (IS_ERR(ha->dpc_thread)) {
2364 ql_log(ql_log_fatal, base_vha, 0x00ed,
2365 "Failed to start DPC thread.\n");
2366 ret = PTR_ERR(ha->dpc_thread);
2367 goto probe_failed;
2368 }
2369 ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2370 "DPC thread started successfully.\n");
2371
2372 skip_dpc:
2373 list_add_tail(&base_vha->list, &ha->vp_list);
2374 base_vha->host->irq = ha->pdev->irq;
2375
2376 /* Initialized the timer */
2377 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2378 ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2379 "Started qla2x00_timer with "
2380 "interval=%d.\n", WATCH_INTERVAL);
2381 ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2382 "Detected hba at address=%p.\n",
2383 ha);
2384
2385 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2386 if (ha->fw_attributes & BIT_4) {
2387 int prot = 0;
2388 base_vha->flags.difdix_supported = 1;
2389 ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2390 "Registering for DIF/DIX type 1 and 3 protection.\n");
2391 if (ql2xenabledif == 1)
2392 prot = SHOST_DIX_TYPE0_PROTECTION;
2393 scsi_host_set_prot(host,
2394 prot | SHOST_DIF_TYPE1_PROTECTION
2395 | SHOST_DIF_TYPE2_PROTECTION
2396 | SHOST_DIF_TYPE3_PROTECTION
2397 | SHOST_DIX_TYPE1_PROTECTION
2398 | SHOST_DIX_TYPE2_PROTECTION
2399 | SHOST_DIX_TYPE3_PROTECTION);
2400 scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
2401 } else
2402 base_vha->flags.difdix_supported = 0;
2403 }
2404
2405 ha->isp_ops->enable_intrs(ha);
2406
2407 ret = scsi_add_host(host, &pdev->dev);
2408 if (ret)
2409 goto probe_failed;
2410
2411 base_vha->flags.init_done = 1;
2412 base_vha->flags.online = 1;
2413
2414 ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2415 "Init done and hba is online.\n");
2416
2417 scsi_scan_host(host);
2418
2419 qla2x00_alloc_sysfs_attr(base_vha);
2420
2421 qla2x00_init_host_attr(base_vha);
2422
2423 qla2x00_dfs_setup(base_vha);
2424
2425 ql_log(ql_log_info, base_vha, 0x00fa,
2426 "QLogic Fibre Channed HBA Driver: %s.\n",
2427 qla2x00_version_str);
2428 ql_log(ql_log_info, base_vha, 0x00fb,
2429 "QLogic %s - %s.\n",
2430 ha->model_number, ha->model_desc ? ha->model_desc : "");
2431 ql_log(ql_log_info, base_vha, 0x00fc,
2432 "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2433 pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2434 pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2435 base_vha->host_no,
2436 ha->isp_ops->fw_version_str(base_vha, fw_str));
2437
2438 return 0;
2439
2440 probe_init_failed:
2441 qla2x00_free_req_que(ha, req);
2442 qla2x00_free_rsp_que(ha, rsp);
2443 ha->max_req_queues = ha->max_rsp_queues = 0;
2444
2445 probe_failed:
2446 if (base_vha->timer_active)
2447 qla2x00_stop_timer(base_vha);
2448 base_vha->flags.online = 0;
2449 if (ha->dpc_thread) {
2450 struct task_struct *t = ha->dpc_thread;
2451
2452 ha->dpc_thread = NULL;
2453 kthread_stop(t);
2454 }
2455
2456 qla2x00_free_device(base_vha);
2457
2458 scsi_host_put(base_vha->host);
2459
2460 probe_hw_failed:
2461 if (IS_QLA82XX(ha)) {
2462 qla82xx_idc_lock(ha);
2463 qla82xx_clear_drv_active(ha);
2464 qla82xx_idc_unlock(ha);
2465 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2466 if (!ql2xdbwr)
2467 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2468 } else {
2469 if (ha->iobase)
2470 iounmap(ha->iobase);
2471 }
2472 pci_release_selected_regions(ha->pdev, ha->bars);
2473 kfree(ha);
2474 ha = NULL;
2475
2476 probe_out:
2477 pci_disable_device(pdev);
2478 return ret;
2479 }
2480
2481 static void
2482 qla2x00_shutdown(struct pci_dev *pdev)
2483 {
2484 scsi_qla_host_t *vha;
2485 struct qla_hw_data *ha;
2486
2487 vha = pci_get_drvdata(pdev);
2488 ha = vha->hw;
2489
2490 /* Turn-off FCE trace */
2491 if (ha->flags.fce_enabled) {
2492 qla2x00_disable_fce_trace(vha, NULL, NULL);
2493 ha->flags.fce_enabled = 0;
2494 }
2495
2496 /* Turn-off EFT trace */
2497 if (ha->eft)
2498 qla2x00_disable_eft_trace(vha);
2499
2500 /* Stop currently executing firmware. */
2501 qla2x00_try_to_stop_firmware(vha);
2502
2503 /* Turn adapter off line */
2504 vha->flags.online = 0;
2505
2506 /* turn-off interrupts on the card */
2507 if (ha->interrupts_on) {
2508 vha->flags.init_done = 0;
2509 ha->isp_ops->disable_intrs(ha);
2510 }
2511
2512 qla2x00_free_irqs(vha);
2513
2514 qla2x00_free_fw_dump(ha);
2515 }
2516
2517 static void
2518 qla2x00_remove_one(struct pci_dev *pdev)
2519 {
2520 scsi_qla_host_t *base_vha, *vha;
2521 struct qla_hw_data *ha;
2522 unsigned long flags;
2523
2524 base_vha = pci_get_drvdata(pdev);
2525 ha = base_vha->hw;
2526
2527 mutex_lock(&ha->vport_lock);
2528 while (ha->cur_vport_count) {
2529 struct Scsi_Host *scsi_host;
2530
2531 spin_lock_irqsave(&ha->vport_slock, flags);
2532
2533 BUG_ON(base_vha->list.next == &ha->vp_list);
2534 /* This assumes first entry in ha->vp_list is always base vha */
2535 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2536 scsi_host = scsi_host_get(vha->host);
2537
2538 spin_unlock_irqrestore(&ha->vport_slock, flags);
2539 mutex_unlock(&ha->vport_lock);
2540
2541 fc_vport_terminate(vha->fc_vport);
2542 scsi_host_put(vha->host);
2543
2544 mutex_lock(&ha->vport_lock);
2545 }
2546 mutex_unlock(&ha->vport_lock);
2547
2548 set_bit(UNLOADING, &base_vha->dpc_flags);
2549
2550 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2551
2552 qla2x00_dfs_remove(base_vha);
2553
2554 qla84xx_put_chip(base_vha);
2555
2556 /* Disable timer */
2557 if (base_vha->timer_active)
2558 qla2x00_stop_timer(base_vha);
2559
2560 base_vha->flags.online = 0;
2561
2562 /* Flush the work queue and remove it */
2563 if (ha->wq) {
2564 flush_workqueue(ha->wq);
2565 destroy_workqueue(ha->wq);
2566 ha->wq = NULL;
2567 }
2568
2569 /* Kill the kernel thread for this host */
2570 if (ha->dpc_thread) {
2571 struct task_struct *t = ha->dpc_thread;
2572
2573 /*
2574 * qla2xxx_wake_dpc checks for ->dpc_thread
2575 * so we need to zero it out.
2576 */
2577 ha->dpc_thread = NULL;
2578 kthread_stop(t);
2579 }
2580
2581 qla2x00_free_sysfs_attr(base_vha);
2582
2583 fc_remove_host(base_vha->host);
2584
2585 scsi_remove_host(base_vha->host);
2586
2587 qla2x00_free_device(base_vha);
2588
2589 scsi_host_put(base_vha->host);
2590
2591 if (IS_QLA82XX(ha)) {
2592 qla82xx_idc_lock(ha);
2593 qla82xx_clear_drv_active(ha);
2594 qla82xx_idc_unlock(ha);
2595
2596 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2597 if (!ql2xdbwr)
2598 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2599 } else {
2600 if (ha->iobase)
2601 iounmap(ha->iobase);
2602
2603 if (ha->mqiobase)
2604 iounmap(ha->mqiobase);
2605 }
2606
2607 pci_release_selected_regions(ha->pdev, ha->bars);
2608 kfree(ha);
2609 ha = NULL;
2610
2611 pci_disable_pcie_error_reporting(pdev);
2612
2613 pci_disable_device(pdev);
2614 pci_set_drvdata(pdev, NULL);
2615 }
2616
2617 static void
2618 qla2x00_free_device(scsi_qla_host_t *vha)
2619 {
2620 struct qla_hw_data *ha = vha->hw;
2621
2622 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2623
2624 /* Disable timer */
2625 if (vha->timer_active)
2626 qla2x00_stop_timer(vha);
2627
2628 /* Kill the kernel thread for this host */
2629 if (ha->dpc_thread) {
2630 struct task_struct *t = ha->dpc_thread;
2631
2632 /*
2633 * qla2xxx_wake_dpc checks for ->dpc_thread
2634 * so we need to zero it out.
2635 */
2636 ha->dpc_thread = NULL;
2637 kthread_stop(t);
2638 }
2639
2640 qla25xx_delete_queues(vha);
2641
2642 if (ha->flags.fce_enabled)
2643 qla2x00_disable_fce_trace(vha, NULL, NULL);
2644
2645 if (ha->eft)
2646 qla2x00_disable_eft_trace(vha);
2647
2648 /* Stop currently executing firmware. */
2649 qla2x00_try_to_stop_firmware(vha);
2650
2651 vha->flags.online = 0;
2652
2653 /* turn-off interrupts on the card */
2654 if (ha->interrupts_on) {
2655 vha->flags.init_done = 0;
2656 ha->isp_ops->disable_intrs(ha);
2657 }
2658
2659 qla2x00_free_irqs(vha);
2660
2661 qla2x00_free_fcports(vha);
2662
2663 qla2x00_mem_free(ha);
2664
2665 qla2x00_free_queues(ha);
2666 }
2667
2668 void qla2x00_free_fcports(struct scsi_qla_host *vha)
2669 {
2670 fc_port_t *fcport, *tfcport;
2671
2672 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
2673 list_del(&fcport->list);
2674 kfree(fcport);
2675 fcport = NULL;
2676 }
2677 }
2678
2679 static inline void
2680 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
2681 int defer)
2682 {
2683 struct fc_rport *rport;
2684 scsi_qla_host_t *base_vha;
2685 unsigned long flags;
2686
2687 if (!fcport->rport)
2688 return;
2689
2690 rport = fcport->rport;
2691 if (defer) {
2692 base_vha = pci_get_drvdata(vha->hw->pdev);
2693 spin_lock_irqsave(vha->host->host_lock, flags);
2694 fcport->drport = rport;
2695 spin_unlock_irqrestore(vha->host->host_lock, flags);
2696 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
2697 qla2xxx_wake_dpc(base_vha);
2698 } else
2699 fc_remote_port_delete(rport);
2700 }
2701
2702 /*
2703 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
2704 *
2705 * Input: ha = adapter block pointer. fcport = port structure pointer.
2706 *
2707 * Return: None.
2708 *
2709 * Context:
2710 */
2711 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
2712 int do_login, int defer)
2713 {
2714 if (atomic_read(&fcport->state) == FCS_ONLINE &&
2715 vha->vp_idx == fcport->vp_idx) {
2716 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2717 qla2x00_schedule_rport_del(vha, fcport, defer);
2718 }
2719 /*
2720 * We may need to retry the login, so don't change the state of the
2721 * port but do the retries.
2722 */
2723 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
2724 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2725
2726 if (!do_login)
2727 return;
2728
2729 if (fcport->login_retry == 0) {
2730 fcport->login_retry = vha->hw->login_retry_count;
2731 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2732
2733 ql_dbg(ql_dbg_disc, vha, 0x2067,
2734 "Port login retry "
2735 "%02x%02x%02x%02x%02x%02x%02x%02x, "
2736 "id = 0x%04x retry cnt=%d.\n",
2737 fcport->port_name[0], fcport->port_name[1],
2738 fcport->port_name[2], fcport->port_name[3],
2739 fcport->port_name[4], fcport->port_name[5],
2740 fcport->port_name[6], fcport->port_name[7],
2741 fcport->loop_id, fcport->login_retry);
2742 }
2743 }
2744
2745 /*
2746 * qla2x00_mark_all_devices_lost
2747 * Updates fcport state when device goes offline.
2748 *
2749 * Input:
2750 * ha = adapter block pointer.
2751 * fcport = port structure pointer.
2752 *
2753 * Return:
2754 * None.
2755 *
2756 * Context:
2757 */
2758 void
2759 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
2760 {
2761 fc_port_t *fcport;
2762
2763 list_for_each_entry(fcport, &vha->vp_fcports, list) {
2764 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
2765 continue;
2766
2767 /*
2768 * No point in marking the device as lost, if the device is
2769 * already DEAD.
2770 */
2771 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
2772 continue;
2773 if (atomic_read(&fcport->state) == FCS_ONLINE) {
2774 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2775 if (defer)
2776 qla2x00_schedule_rport_del(vha, fcport, defer);
2777 else if (vha->vp_idx == fcport->vp_idx)
2778 qla2x00_schedule_rport_del(vha, fcport, defer);
2779 }
2780 }
2781 }
2782
2783 /*
2784 * qla2x00_mem_alloc
2785 * Allocates adapter memory.
2786 *
2787 * Returns:
2788 * 0 = success.
2789 * !0 = failure.
2790 */
2791 static int
2792 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2793 struct req_que **req, struct rsp_que **rsp)
2794 {
2795 char name[16];
2796
2797 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
2798 &ha->init_cb_dma, GFP_KERNEL);
2799 if (!ha->init_cb)
2800 goto fail;
2801
2802 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
2803 &ha->gid_list_dma, GFP_KERNEL);
2804 if (!ha->gid_list)
2805 goto fail_free_init_cb;
2806
2807 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
2808 if (!ha->srb_mempool)
2809 goto fail_free_gid_list;
2810
2811 if (IS_QLA82XX(ha)) {
2812 /* Allocate cache for CT6 Ctx. */
2813 if (!ctx_cachep) {
2814 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
2815 sizeof(struct ct6_dsd), 0,
2816 SLAB_HWCACHE_ALIGN, NULL);
2817 if (!ctx_cachep)
2818 goto fail_free_gid_list;
2819 }
2820 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
2821 ctx_cachep);
2822 if (!ha->ctx_mempool)
2823 goto fail_free_srb_mempool;
2824 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
2825 "ctx_cachep=%p ctx_mempool=%p.\n",
2826 ctx_cachep, ha->ctx_mempool);
2827 }
2828
2829 /* Get memory for cached NVRAM */
2830 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
2831 if (!ha->nvram)
2832 goto fail_free_ctx_mempool;
2833
2834 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
2835 ha->pdev->device);
2836 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2837 DMA_POOL_SIZE, 8, 0);
2838 if (!ha->s_dma_pool)
2839 goto fail_free_nvram;
2840
2841 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
2842 "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
2843 ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
2844
2845 if (IS_QLA82XX(ha) || ql2xenabledif) {
2846 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2847 DSD_LIST_DMA_POOL_SIZE, 8, 0);
2848 if (!ha->dl_dma_pool) {
2849 ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
2850 "Failed to allocate memory for dl_dma_pool.\n");
2851 goto fail_s_dma_pool;
2852 }
2853
2854 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2855 FCP_CMND_DMA_POOL_SIZE, 8, 0);
2856 if (!ha->fcp_cmnd_dma_pool) {
2857 ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
2858 "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
2859 goto fail_dl_dma_pool;
2860 }
2861 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
2862 "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
2863 ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
2864 }
2865
2866 /* Allocate memory for SNS commands */
2867 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2868 /* Get consistent memory allocated for SNS commands */
2869 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
2870 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
2871 if (!ha->sns_cmd)
2872 goto fail_dma_pool;
2873 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
2874 "sns_cmd.\n", ha->sns_cmd);
2875 } else {
2876 /* Get consistent memory allocated for MS IOCB */
2877 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2878 &ha->ms_iocb_dma);
2879 if (!ha->ms_iocb)
2880 goto fail_dma_pool;
2881 /* Get consistent memory allocated for CT SNS commands */
2882 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
2883 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
2884 if (!ha->ct_sns)
2885 goto fail_free_ms_iocb;
2886 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
2887 "ms_iocb=%p ct_sns=%p.\n",
2888 ha->ms_iocb, ha->ct_sns);
2889 }
2890
2891 /* Allocate memory for request ring */
2892 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
2893 if (!*req) {
2894 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
2895 "Failed to allocate memory for req.\n");
2896 goto fail_req;
2897 }
2898 (*req)->length = req_len;
2899 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
2900 ((*req)->length + 1) * sizeof(request_t),
2901 &(*req)->dma, GFP_KERNEL);
2902 if (!(*req)->ring) {
2903 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
2904 "Failed to allocate memory for req_ring.\n");
2905 goto fail_req_ring;
2906 }
2907 /* Allocate memory for response ring */
2908 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
2909 if (!*rsp) {
2910 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
2911 "Failed to allocate memory for rsp.\n");
2912 goto fail_rsp;
2913 }
2914 (*rsp)->hw = ha;
2915 (*rsp)->length = rsp_len;
2916 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
2917 ((*rsp)->length + 1) * sizeof(response_t),
2918 &(*rsp)->dma, GFP_KERNEL);
2919 if (!(*rsp)->ring) {
2920 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
2921 "Failed to allocate memory for rsp_ring.\n");
2922 goto fail_rsp_ring;
2923 }
2924 (*req)->rsp = *rsp;
2925 (*rsp)->req = *req;
2926 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
2927 "req=%p req->length=%d req->ring=%p rsp=%p "
2928 "rsp->length=%d rsp->ring=%p.\n",
2929 *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
2930 (*rsp)->ring);
2931 /* Allocate memory for NVRAM data for vports */
2932 if (ha->nvram_npiv_size) {
2933 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
2934 ha->nvram_npiv_size, GFP_KERNEL);
2935 if (!ha->npiv_info) {
2936 ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
2937 "Failed to allocate memory for npiv_info.\n");
2938 goto fail_npiv_info;
2939 }
2940 } else
2941 ha->npiv_info = NULL;
2942
2943 /* Get consistent memory allocated for EX-INIT-CB. */
2944 if (IS_QLA8XXX_TYPE(ha)) {
2945 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2946 &ha->ex_init_cb_dma);
2947 if (!ha->ex_init_cb)
2948 goto fail_ex_init_cb;
2949 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
2950 "ex_init_cb=%p.\n", ha->ex_init_cb);
2951 }
2952
2953 INIT_LIST_HEAD(&ha->gbl_dsd_list);
2954
2955 /* Get consistent memory allocated for Async Port-Database. */
2956 if (!IS_FWI2_CAPABLE(ha)) {
2957 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2958 &ha->async_pd_dma);
2959 if (!ha->async_pd)
2960 goto fail_async_pd;
2961 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
2962 "async_pd=%p.\n", ha->async_pd);
2963 }
2964
2965 INIT_LIST_HEAD(&ha->vp_list);
2966 return 1;
2967
2968 fail_async_pd:
2969 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
2970 fail_ex_init_cb:
2971 kfree(ha->npiv_info);
2972 fail_npiv_info:
2973 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
2974 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
2975 (*rsp)->ring = NULL;
2976 (*rsp)->dma = 0;
2977 fail_rsp_ring:
2978 kfree(*rsp);
2979 fail_rsp:
2980 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
2981 sizeof(request_t), (*req)->ring, (*req)->dma);
2982 (*req)->ring = NULL;
2983 (*req)->dma = 0;
2984 fail_req_ring:
2985 kfree(*req);
2986 fail_req:
2987 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
2988 ha->ct_sns, ha->ct_sns_dma);
2989 ha->ct_sns = NULL;
2990 ha->ct_sns_dma = 0;
2991 fail_free_ms_iocb:
2992 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2993 ha->ms_iocb = NULL;
2994 ha->ms_iocb_dma = 0;
2995 fail_dma_pool:
2996 if (IS_QLA82XX(ha) || ql2xenabledif) {
2997 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2998 ha->fcp_cmnd_dma_pool = NULL;
2999 }
3000 fail_dl_dma_pool:
3001 if (IS_QLA82XX(ha) || ql2xenabledif) {
3002 dma_pool_destroy(ha->dl_dma_pool);
3003 ha->dl_dma_pool = NULL;
3004 }
3005 fail_s_dma_pool:
3006 dma_pool_destroy(ha->s_dma_pool);
3007 ha->s_dma_pool = NULL;
3008 fail_free_nvram:
3009 kfree(ha->nvram);
3010 ha->nvram = NULL;
3011 fail_free_ctx_mempool:
3012 mempool_destroy(ha->ctx_mempool);
3013 ha->ctx_mempool = NULL;
3014 fail_free_srb_mempool:
3015 mempool_destroy(ha->srb_mempool);
3016 ha->srb_mempool = NULL;
3017 fail_free_gid_list:
3018 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
3019 ha->gid_list_dma);
3020 ha->gid_list = NULL;
3021 ha->gid_list_dma = 0;
3022 fail_free_init_cb:
3023 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3024 ha->init_cb_dma);
3025 ha->init_cb = NULL;
3026 ha->init_cb_dma = 0;
3027 fail:
3028 ql_log(ql_log_fatal, NULL, 0x0030,
3029 "Memory allocation failure.\n");
3030 return -ENOMEM;
3031 }
3032
3033 /*
3034 * qla2x00_free_fw_dump
3035 * Frees fw dump stuff.
3036 *
3037 * Input:
3038 * ha = adapter block pointer.
3039 */
3040 static void
3041 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3042 {
3043 if (ha->fce)
3044 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
3045 ha->fce_dma);
3046
3047 if (ha->fw_dump) {
3048 if (ha->eft)
3049 dma_free_coherent(&ha->pdev->dev,
3050 ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
3051 vfree(ha->fw_dump);
3052 }
3053 ha->fce = NULL;
3054 ha->fce_dma = 0;
3055 ha->eft = NULL;
3056 ha->eft_dma = 0;
3057 ha->fw_dump = NULL;
3058 ha->fw_dumped = 0;
3059 ha->fw_dump_reading = 0;
3060 }
3061
3062 /*
3063 * qla2x00_mem_free
3064 * Frees all adapter allocated memory.
3065 *
3066 * Input:
3067 * ha = adapter block pointer.
3068 */
3069 static void
3070 qla2x00_mem_free(struct qla_hw_data *ha)
3071 {
3072 qla2x00_free_fw_dump(ha);
3073
3074 if (ha->srb_mempool)
3075 mempool_destroy(ha->srb_mempool);
3076
3077 if (ha->dcbx_tlv)
3078 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3079 ha->dcbx_tlv, ha->dcbx_tlv_dma);
3080
3081 if (ha->xgmac_data)
3082 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3083 ha->xgmac_data, ha->xgmac_data_dma);
3084
3085 if (ha->sns_cmd)
3086 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3087 ha->sns_cmd, ha->sns_cmd_dma);
3088
3089 if (ha->ct_sns)
3090 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3091 ha->ct_sns, ha->ct_sns_dma);
3092
3093 if (ha->sfp_data)
3094 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3095
3096 if (ha->edc_data)
3097 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
3098
3099 if (ha->ms_iocb)
3100 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3101
3102 if (ha->ex_init_cb)
3103 dma_pool_free(ha->s_dma_pool,
3104 ha->ex_init_cb, ha->ex_init_cb_dma);
3105
3106 if (ha->async_pd)
3107 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3108
3109 if (ha->s_dma_pool)
3110 dma_pool_destroy(ha->s_dma_pool);
3111
3112 if (ha->gid_list)
3113 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
3114 ha->gid_list_dma);
3115
3116 if (IS_QLA82XX(ha)) {
3117 if (!list_empty(&ha->gbl_dsd_list)) {
3118 struct dsd_dma *dsd_ptr, *tdsd_ptr;
3119
3120 /* clean up allocated prev pool */
3121 list_for_each_entry_safe(dsd_ptr,
3122 tdsd_ptr, &ha->gbl_dsd_list, list) {
3123 dma_pool_free(ha->dl_dma_pool,
3124 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3125 list_del(&dsd_ptr->list);
3126 kfree(dsd_ptr);
3127 }
3128 }
3129 }
3130
3131 if (ha->dl_dma_pool)
3132 dma_pool_destroy(ha->dl_dma_pool);
3133
3134 if (ha->fcp_cmnd_dma_pool)
3135 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3136
3137 if (ha->ctx_mempool)
3138 mempool_destroy(ha->ctx_mempool);
3139
3140 if (ha->init_cb)
3141 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3142 ha->init_cb, ha->init_cb_dma);
3143 vfree(ha->optrom_buffer);
3144 kfree(ha->nvram);
3145 kfree(ha->npiv_info);
3146
3147 ha->srb_mempool = NULL;
3148 ha->ctx_mempool = NULL;
3149 ha->sns_cmd = NULL;
3150 ha->sns_cmd_dma = 0;
3151 ha->ct_sns = NULL;
3152 ha->ct_sns_dma = 0;
3153 ha->ms_iocb = NULL;
3154 ha->ms_iocb_dma = 0;
3155 ha->init_cb = NULL;
3156 ha->init_cb_dma = 0;
3157 ha->ex_init_cb = NULL;
3158 ha->ex_init_cb_dma = 0;
3159 ha->async_pd = NULL;
3160 ha->async_pd_dma = 0;
3161
3162 ha->s_dma_pool = NULL;
3163 ha->dl_dma_pool = NULL;
3164 ha->fcp_cmnd_dma_pool = NULL;
3165
3166 ha->gid_list = NULL;
3167 ha->gid_list_dma = 0;
3168 }
3169
3170 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3171 struct qla_hw_data *ha)
3172 {
3173 struct Scsi_Host *host;
3174 struct scsi_qla_host *vha = NULL;
3175
3176 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3177 if (host == NULL) {
3178 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3179 "Failed to allocate host from the scsi layer, aborting.\n");
3180 goto fail;
3181 }
3182
3183 /* Clear our data area */
3184 vha = shost_priv(host);
3185 memset(vha, 0, sizeof(scsi_qla_host_t));
3186
3187 vha->host = host;
3188 vha->host_no = host->host_no;
3189 vha->hw = ha;
3190
3191 INIT_LIST_HEAD(&vha->vp_fcports);
3192 INIT_LIST_HEAD(&vha->work_list);
3193 INIT_LIST_HEAD(&vha->list);
3194
3195 spin_lock_init(&vha->work_lock);
3196
3197 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3198 ql_dbg(ql_dbg_init, vha, 0x0041,
3199 "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3200 vha->host, vha->hw, vha,
3201 dev_name(&(ha->pdev->dev)));
3202
3203 return vha;
3204
3205 fail:
3206 return vha;
3207 }
3208
3209 static struct qla_work_evt *
3210 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3211 {
3212 struct qla_work_evt *e;
3213 uint8_t bail;
3214
3215 QLA_VHA_MARK_BUSY(vha, bail);
3216 if (bail)
3217 return NULL;
3218
3219 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3220 if (!e) {
3221 QLA_VHA_MARK_NOT_BUSY(vha);
3222 return NULL;
3223 }
3224
3225 INIT_LIST_HEAD(&e->list);
3226 e->type = type;
3227 e->flags = QLA_EVT_FLAG_FREE;
3228 return e;
3229 }
3230
3231 static int
3232 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3233 {
3234 unsigned long flags;
3235
3236 spin_lock_irqsave(&vha->work_lock, flags);
3237 list_add_tail(&e->list, &vha->work_list);
3238 spin_unlock_irqrestore(&vha->work_lock, flags);
3239 qla2xxx_wake_dpc(vha);
3240
3241 return QLA_SUCCESS;
3242 }
3243
3244 int
3245 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3246 u32 data)
3247 {
3248 struct qla_work_evt *e;
3249
3250 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3251 if (!e)
3252 return QLA_FUNCTION_FAILED;
3253
3254 e->u.aen.code = code;
3255 e->u.aen.data = data;
3256 return qla2x00_post_work(vha, e);
3257 }
3258
3259 int
3260 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3261 {
3262 struct qla_work_evt *e;
3263
3264 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3265 if (!e)
3266 return QLA_FUNCTION_FAILED;
3267
3268 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3269 return qla2x00_post_work(vha, e);
3270 }
3271
3272 #define qla2x00_post_async_work(name, type) \
3273 int qla2x00_post_async_##name##_work( \
3274 struct scsi_qla_host *vha, \
3275 fc_port_t *fcport, uint16_t *data) \
3276 { \
3277 struct qla_work_evt *e; \
3278 \
3279 e = qla2x00_alloc_work(vha, type); \
3280 if (!e) \
3281 return QLA_FUNCTION_FAILED; \
3282 \
3283 e->u.logio.fcport = fcport; \
3284 if (data) { \
3285 e->u.logio.data[0] = data[0]; \
3286 e->u.logio.data[1] = data[1]; \
3287 } \
3288 return qla2x00_post_work(vha, e); \
3289 }
3290
3291 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3292 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3293 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3294 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3295 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3296 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3297
3298 int
3299 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3300 {
3301 struct qla_work_evt *e;
3302
3303 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3304 if (!e)
3305 return QLA_FUNCTION_FAILED;
3306
3307 e->u.uevent.code = code;
3308 return qla2x00_post_work(vha, e);
3309 }
3310
3311 static void
3312 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3313 {
3314 char event_string[40];
3315 char *envp[] = { event_string, NULL };
3316
3317 switch (code) {
3318 case QLA_UEVENT_CODE_FW_DUMP:
3319 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3320 vha->host_no);
3321 break;
3322 default:
3323 /* do nothing */
3324 break;
3325 }
3326 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3327 }
3328
3329 void
3330 qla2x00_do_work(struct scsi_qla_host *vha)
3331 {
3332 struct qla_work_evt *e, *tmp;
3333 unsigned long flags;
3334 LIST_HEAD(work);
3335
3336 spin_lock_irqsave(&vha->work_lock, flags);
3337 list_splice_init(&vha->work_list, &work);
3338 spin_unlock_irqrestore(&vha->work_lock, flags);
3339
3340 list_for_each_entry_safe(e, tmp, &work, list) {
3341 list_del_init(&e->list);
3342
3343 switch (e->type) {
3344 case QLA_EVT_AEN:
3345 fc_host_post_event(vha->host, fc_get_event_number(),
3346 e->u.aen.code, e->u.aen.data);
3347 break;
3348 case QLA_EVT_IDC_ACK:
3349 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3350 break;
3351 case QLA_EVT_ASYNC_LOGIN:
3352 qla2x00_async_login(vha, e->u.logio.fcport,
3353 e->u.logio.data);
3354 break;
3355 case QLA_EVT_ASYNC_LOGIN_DONE:
3356 qla2x00_async_login_done(vha, e->u.logio.fcport,
3357 e->u.logio.data);
3358 break;
3359 case QLA_EVT_ASYNC_LOGOUT:
3360 qla2x00_async_logout(vha, e->u.logio.fcport);
3361 break;
3362 case QLA_EVT_ASYNC_LOGOUT_DONE:
3363 qla2x00_async_logout_done(vha, e->u.logio.fcport,
3364 e->u.logio.data);
3365 break;
3366 case QLA_EVT_ASYNC_ADISC:
3367 qla2x00_async_adisc(vha, e->u.logio.fcport,
3368 e->u.logio.data);
3369 break;
3370 case QLA_EVT_ASYNC_ADISC_DONE:
3371 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3372 e->u.logio.data);
3373 break;
3374 case QLA_EVT_UEVENT:
3375 qla2x00_uevent_emit(vha, e->u.uevent.code);
3376 break;
3377 }
3378 if (e->flags & QLA_EVT_FLAG_FREE)
3379 kfree(e);
3380
3381 /* For each work completed decrement vha ref count */
3382 QLA_VHA_MARK_NOT_BUSY(vha);
3383 }
3384 }
3385
3386 /* Relogins all the fcports of a vport
3387 * Context: dpc thread
3388 */
3389 void qla2x00_relogin(struct scsi_qla_host *vha)
3390 {
3391 fc_port_t *fcport;
3392 int status;
3393 uint16_t next_loopid = 0;
3394 struct qla_hw_data *ha = vha->hw;
3395 uint16_t data[2];
3396
3397 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3398 /*
3399 * If the port is not ONLINE then try to login
3400 * to it if we haven't run out of retries.
3401 */
3402 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3403 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3404 fcport->login_retry--;
3405 if (fcport->flags & FCF_FABRIC_DEVICE) {
3406 if (fcport->flags & FCF_FCP2_DEVICE)
3407 ha->isp_ops->fabric_logout(vha,
3408 fcport->loop_id,
3409 fcport->d_id.b.domain,
3410 fcport->d_id.b.area,
3411 fcport->d_id.b.al_pa);
3412
3413 if (fcport->loop_id == FC_NO_LOOP_ID) {
3414 fcport->loop_id = next_loopid =
3415 ha->min_external_loopid;
3416 status = qla2x00_find_new_loop_id(
3417 vha, fcport);
3418 if (status != QLA_SUCCESS) {
3419 /* Ran out of IDs to use */
3420 break;
3421 }
3422 }
3423
3424 if (IS_ALOGIO_CAPABLE(ha)) {
3425 fcport->flags |= FCF_ASYNC_SENT;
3426 data[0] = 0;
3427 data[1] = QLA_LOGIO_LOGIN_RETRIED;
3428 status = qla2x00_post_async_login_work(
3429 vha, fcport, data);
3430 if (status == QLA_SUCCESS)
3431 continue;
3432 /* Attempt a retry. */
3433 status = 1;
3434 } else
3435 status = qla2x00_fabric_login(vha,
3436 fcport, &next_loopid);
3437 } else
3438 status = qla2x00_local_device_login(vha,
3439 fcport);
3440
3441 if (status == QLA_SUCCESS) {
3442 fcport->old_loop_id = fcport->loop_id;
3443
3444 ql_dbg(ql_dbg_disc, vha, 0x2003,
3445 "Port login OK: logged in ID 0x%x.\n",
3446 fcport->loop_id);
3447
3448 qla2x00_update_fcport(vha, fcport);
3449
3450 } else if (status == 1) {
3451 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3452 /* retry the login again */
3453 ql_dbg(ql_dbg_disc, vha, 0x2007,
3454 "Retrying %d login again loop_id 0x%x.\n",
3455 fcport->login_retry, fcport->loop_id);
3456 } else {
3457 fcport->login_retry = 0;
3458 }
3459
3460 if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3461 fcport->loop_id = FC_NO_LOOP_ID;
3462 }
3463 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3464 break;
3465 }
3466 }
3467
3468 /**************************************************************************
3469 * qla2x00_do_dpc
3470 * This kernel thread is a task that is schedule by the interrupt handler
3471 * to perform the background processing for interrupts.
3472 *
3473 * Notes:
3474 * This task always run in the context of a kernel thread. It
3475 * is kick-off by the driver's detect code and starts up
3476 * up one per adapter. It immediately goes to sleep and waits for
3477 * some fibre event. When either the interrupt handler or
3478 * the timer routine detects a event it will one of the task
3479 * bits then wake us up.
3480 **************************************************************************/
3481 static int
3482 qla2x00_do_dpc(void *data)
3483 {
3484 int rval;
3485 scsi_qla_host_t *base_vha;
3486 struct qla_hw_data *ha;
3487
3488 ha = (struct qla_hw_data *)data;
3489 base_vha = pci_get_drvdata(ha->pdev);
3490
3491 set_user_nice(current, -20);
3492
3493 set_current_state(TASK_INTERRUPTIBLE);
3494 while (!kthread_should_stop()) {
3495 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
3496 "DPC handler sleeping.\n");
3497
3498 schedule();
3499 __set_current_state(TASK_RUNNING);
3500
3501 ql_dbg(ql_dbg_dpc, base_vha, 0x4001,
3502 "DPC handler waking up.\n");
3503 ql_dbg(ql_dbg_dpc, base_vha, 0x4002,
3504 "dpc_flags=0x%lx.\n", base_vha->dpc_flags);
3505
3506 /* Initialization not yet finished. Don't do anything yet. */
3507 if (!base_vha->flags.init_done)
3508 continue;
3509
3510 if (ha->flags.eeh_busy) {
3511 ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
3512 "eeh_busy=%d.\n", ha->flags.eeh_busy);
3513 continue;
3514 }
3515
3516 ha->dpc_active = 1;
3517
3518 if (ha->flags.mbox_busy) {
3519 ha->dpc_active = 0;
3520 continue;
3521 }
3522
3523 qla2x00_do_work(base_vha);
3524
3525 if (IS_QLA82XX(ha)) {
3526 if (test_and_clear_bit(ISP_UNRECOVERABLE,
3527 &base_vha->dpc_flags)) {
3528 qla82xx_idc_lock(ha);
3529 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3530 QLA82XX_DEV_FAILED);
3531 qla82xx_idc_unlock(ha);
3532 ql_log(ql_log_info, base_vha, 0x4004,
3533 "HW State: FAILED.\n");
3534 qla82xx_device_state_handler(base_vha);
3535 continue;
3536 }
3537
3538 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
3539 &base_vha->dpc_flags)) {
3540
3541 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
3542 "FCoE context reset scheduled.\n");
3543 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3544 &base_vha->dpc_flags))) {
3545 if (qla82xx_fcoe_ctx_reset(base_vha)) {
3546 /* FCoE-ctx reset failed.
3547 * Escalate to chip-reset
3548 */
3549 set_bit(ISP_ABORT_NEEDED,
3550 &base_vha->dpc_flags);
3551 }
3552 clear_bit(ABORT_ISP_ACTIVE,
3553 &base_vha->dpc_flags);
3554 }
3555
3556 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
3557 "FCoE context reset end.\n");
3558 }
3559 }
3560
3561 if (test_and_clear_bit(ISP_ABORT_NEEDED,
3562 &base_vha->dpc_flags)) {
3563
3564 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
3565 "ISP abort scheduled.\n");
3566 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3567 &base_vha->dpc_flags))) {
3568
3569 if (ha->isp_ops->abort_isp(base_vha)) {
3570 /* failed. retry later */
3571 set_bit(ISP_ABORT_NEEDED,
3572 &base_vha->dpc_flags);
3573 }
3574 clear_bit(ABORT_ISP_ACTIVE,
3575 &base_vha->dpc_flags);
3576 }
3577
3578 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
3579 "ISP abort end.\n");
3580 }
3581
3582 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
3583 qla2x00_update_fcports(base_vha);
3584 clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3585 }
3586
3587 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
3588 ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
3589 "Quiescence mode scheduled.\n");
3590 qla82xx_device_state_handler(base_vha);
3591 clear_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags);
3592 if (!ha->flags.quiesce_owner) {
3593 qla2x00_perform_loop_resync(base_vha);
3594
3595 qla82xx_idc_lock(ha);
3596 qla82xx_clear_qsnt_ready(base_vha);
3597 qla82xx_idc_unlock(ha);
3598 }
3599 ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
3600 "Quiescence mode end.\n");
3601 }
3602
3603 if (test_and_clear_bit(RESET_MARKER_NEEDED,
3604 &base_vha->dpc_flags) &&
3605 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
3606
3607 ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
3608 "Reset marker scheduled.\n");
3609 qla2x00_rst_aen(base_vha);
3610 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
3611 ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
3612 "Reset marker end.\n");
3613 }
3614
3615 /* Retry each device up to login retry count */
3616 if ((test_and_clear_bit(RELOGIN_NEEDED,
3617 &base_vha->dpc_flags)) &&
3618 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
3619 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
3620
3621 ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
3622 "Relogin scheduled.\n");
3623 qla2x00_relogin(base_vha);
3624 ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
3625 "Relogin end.\n");
3626 }
3627
3628 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
3629 &base_vha->dpc_flags)) {
3630
3631 ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
3632 "Loop resync scheduled.\n");
3633
3634 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
3635 &base_vha->dpc_flags))) {
3636
3637 rval = qla2x00_loop_resync(base_vha);
3638
3639 clear_bit(LOOP_RESYNC_ACTIVE,
3640 &base_vha->dpc_flags);
3641 }
3642
3643 ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
3644 "Loop resync end.\n");
3645 }
3646
3647 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
3648 atomic_read(&base_vha->loop_state) == LOOP_READY) {
3649 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
3650 qla2xxx_flash_npiv_conf(base_vha);
3651 }
3652
3653 if (!ha->interrupts_on)
3654 ha->isp_ops->enable_intrs(ha);
3655
3656 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
3657 &base_vha->dpc_flags))
3658 ha->isp_ops->beacon_blink(base_vha);
3659
3660 qla2x00_do_dpc_all_vps(base_vha);
3661
3662 ha->dpc_active = 0;
3663 set_current_state(TASK_INTERRUPTIBLE);
3664 } /* End of while(1) */
3665 __set_current_state(TASK_RUNNING);
3666
3667 ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
3668 "DPC handler exiting.\n");
3669
3670 /*
3671 * Make sure that nobody tries to wake us up again.
3672 */
3673 ha->dpc_active = 0;
3674
3675 /* Cleanup any residual CTX SRBs. */
3676 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3677
3678 return 0;
3679 }
3680
3681 void
3682 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
3683 {
3684 struct qla_hw_data *ha = vha->hw;
3685 struct task_struct *t = ha->dpc_thread;
3686
3687 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
3688 wake_up_process(t);
3689 }
3690
3691 /*
3692 * qla2x00_rst_aen
3693 * Processes asynchronous reset.
3694 *
3695 * Input:
3696 * ha = adapter block pointer.
3697 */
3698 static void
3699 qla2x00_rst_aen(scsi_qla_host_t *vha)
3700 {
3701 if (vha->flags.online && !vha->flags.reset_active &&
3702 !atomic_read(&vha->loop_down_timer) &&
3703 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
3704 do {
3705 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
3706
3707 /*
3708 * Issue marker command only when we are going to start
3709 * the I/O.
3710 */
3711 vha->marker_needed = 1;
3712 } while (!atomic_read(&vha->loop_down_timer) &&
3713 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
3714 }
3715 }
3716
3717 static void
3718 qla2x00_sp_free_dma(srb_t *sp)
3719 {
3720 struct scsi_cmnd *cmd = sp->cmd;
3721 struct qla_hw_data *ha = sp->fcport->vha->hw;
3722
3723 if (sp->flags & SRB_DMA_VALID) {
3724 scsi_dma_unmap(cmd);
3725 sp->flags &= ~SRB_DMA_VALID;
3726 }
3727
3728 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
3729 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
3730 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
3731 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
3732 }
3733
3734 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
3735 /* List assured to be having elements */
3736 qla2x00_clean_dsd_pool(ha, sp);
3737 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
3738 }
3739
3740 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
3741 dma_pool_free(ha->dl_dma_pool, sp->ctx,
3742 ((struct crc_context *)sp->ctx)->crc_ctx_dma);
3743 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
3744 }
3745
3746 CMD_SP(cmd) = NULL;
3747 }
3748
3749 static void
3750 qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp)
3751 {
3752 struct scsi_cmnd *cmd = sp->cmd;
3753
3754 qla2x00_sp_free_dma(sp);
3755
3756 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
3757 struct ct6_dsd *ctx = sp->ctx;
3758 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
3759 ctx->fcp_cmnd_dma);
3760 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
3761 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
3762 ha->gbl_dsd_avail += ctx->dsd_use_cnt;
3763 mempool_free(sp->ctx, ha->ctx_mempool);
3764 sp->ctx = NULL;
3765 }
3766
3767 mempool_free(sp, ha->srb_mempool);
3768 cmd->scsi_done(cmd);
3769 }
3770
3771 void
3772 qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
3773 {
3774 if (atomic_read(&sp->ref_count) == 0) {
3775 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
3776 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
3777 sp, sp->cmd);
3778 if (ql2xextended_error_logging & ql_dbg_io)
3779 BUG();
3780 return;
3781 }
3782 if (!atomic_dec_and_test(&sp->ref_count))
3783 return;
3784 qla2x00_sp_final_compl(ha, sp);
3785 }
3786
3787 /**************************************************************************
3788 * qla2x00_timer
3789 *
3790 * Description:
3791 * One second timer
3792 *
3793 * Context: Interrupt
3794 ***************************************************************************/
3795 void
3796 qla2x00_timer(scsi_qla_host_t *vha)
3797 {
3798 unsigned long cpu_flags = 0;
3799 int start_dpc = 0;
3800 int index;
3801 srb_t *sp;
3802 uint16_t w;
3803 struct qla_hw_data *ha = vha->hw;
3804 struct req_que *req;
3805
3806 if (ha->flags.eeh_busy) {
3807 ql_dbg(ql_dbg_timer, vha, 0x6000,
3808 "EEH = %d, restarting timer.\n",
3809 ha->flags.eeh_busy);
3810 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3811 return;
3812 }
3813
3814 /* Hardware read to raise pending EEH errors during mailbox waits. */
3815 if (!pci_channel_offline(ha->pdev))
3816 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
3817
3818 /* Make sure qla82xx_watchdog is run only for physical port */
3819 if (!vha->vp_idx && IS_QLA82XX(ha)) {
3820 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
3821 start_dpc++;
3822 qla82xx_watchdog(vha);
3823 }
3824
3825 /* Loop down handler. */
3826 if (atomic_read(&vha->loop_down_timer) > 0 &&
3827 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
3828 !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
3829 && vha->flags.online) {
3830
3831 if (atomic_read(&vha->loop_down_timer) ==
3832 vha->loop_down_abort_time) {
3833
3834 ql_log(ql_log_info, vha, 0x6008,
3835 "Loop down - aborting the queues before time expires.\n");
3836
3837 if (!IS_QLA2100(ha) && vha->link_down_timeout)
3838 atomic_set(&vha->loop_state, LOOP_DEAD);
3839
3840 /*
3841 * Schedule an ISP abort to return any FCP2-device
3842 * commands.
3843 */
3844 /* NPIV - scan physical port only */
3845 if (!vha->vp_idx) {
3846 spin_lock_irqsave(&ha->hardware_lock,
3847 cpu_flags);
3848 req = ha->req_q_map[0];
3849 for (index = 1;
3850 index < MAX_OUTSTANDING_COMMANDS;
3851 index++) {
3852 fc_port_t *sfcp;
3853
3854 sp = req->outstanding_cmds[index];
3855 if (!sp)
3856 continue;
3857 if (sp->ctx && !IS_PROT_IO(sp))
3858 continue;
3859 sfcp = sp->fcport;
3860 if (!(sfcp->flags & FCF_FCP2_DEVICE))
3861 continue;
3862
3863 if (IS_QLA82XX(ha))
3864 set_bit(FCOE_CTX_RESET_NEEDED,
3865 &vha->dpc_flags);
3866 else
3867 set_bit(ISP_ABORT_NEEDED,
3868 &vha->dpc_flags);
3869 break;
3870 }
3871 spin_unlock_irqrestore(&ha->hardware_lock,
3872 cpu_flags);
3873 }
3874 start_dpc++;
3875 }
3876
3877 /* if the loop has been down for 4 minutes, reinit adapter */
3878 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
3879 if (!(vha->device_flags & DFLG_NO_CABLE)) {
3880 ql_log(ql_log_warn, vha, 0x6009,
3881 "Loop down - aborting ISP.\n");
3882
3883 if (IS_QLA82XX(ha))
3884 set_bit(FCOE_CTX_RESET_NEEDED,
3885 &vha->dpc_flags);
3886 else
3887 set_bit(ISP_ABORT_NEEDED,
3888 &vha->dpc_flags);
3889 }
3890 }
3891 ql_dbg(ql_dbg_timer, vha, 0x600a,
3892 "Loop down - seconds remaining %d.\n",
3893 atomic_read(&vha->loop_down_timer));
3894 }
3895
3896 /* Check if beacon LED needs to be blinked for physical host only */
3897 if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
3898 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
3899 start_dpc++;
3900 }
3901
3902 /* Process any deferred work. */
3903 if (!list_empty(&vha->work_list))
3904 start_dpc++;
3905
3906 /* Schedule the DPC routine if needed */
3907 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
3908 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
3909 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
3910 start_dpc ||
3911 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
3912 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
3913 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
3914 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
3915 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
3916 test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
3917 ql_dbg(ql_dbg_timer, vha, 0x600b,
3918 "isp_abort_needed=%d loop_resync_needed=%d "
3919 "fcport_update_needed=%d start_dpc=%d "
3920 "reset_marker_needed=%d",
3921 test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
3922 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
3923 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
3924 start_dpc,
3925 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
3926 ql_dbg(ql_dbg_timer, vha, 0x600c,
3927 "beacon_blink_needed=%d isp_unrecoverable=%d "
3928 "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
3929 "relogin_needed=%d.\n",
3930 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
3931 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
3932 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
3933 test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
3934 test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
3935 qla2xxx_wake_dpc(vha);
3936 }
3937
3938 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3939 }
3940
3941 /* Firmware interface routines. */
3942
3943 #define FW_BLOBS 8
3944 #define FW_ISP21XX 0
3945 #define FW_ISP22XX 1
3946 #define FW_ISP2300 2
3947 #define FW_ISP2322 3
3948 #define FW_ISP24XX 4
3949 #define FW_ISP25XX 5
3950 #define FW_ISP81XX 6
3951 #define FW_ISP82XX 7
3952
3953 #define FW_FILE_ISP21XX "ql2100_fw.bin"
3954 #define FW_FILE_ISP22XX "ql2200_fw.bin"
3955 #define FW_FILE_ISP2300 "ql2300_fw.bin"
3956 #define FW_FILE_ISP2322 "ql2322_fw.bin"
3957 #define FW_FILE_ISP24XX "ql2400_fw.bin"
3958 #define FW_FILE_ISP25XX "ql2500_fw.bin"
3959 #define FW_FILE_ISP81XX "ql8100_fw.bin"
3960 #define FW_FILE_ISP82XX "ql8200_fw.bin"
3961
3962 static DEFINE_MUTEX(qla_fw_lock);
3963
3964 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
3965 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
3966 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
3967 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
3968 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
3969 { .name = FW_FILE_ISP24XX, },
3970 { .name = FW_FILE_ISP25XX, },
3971 { .name = FW_FILE_ISP81XX, },
3972 { .name = FW_FILE_ISP82XX, },
3973 };
3974
3975 struct fw_blob *
3976 qla2x00_request_firmware(scsi_qla_host_t *vha)
3977 {
3978 struct qla_hw_data *ha = vha->hw;
3979 struct fw_blob *blob;
3980
3981 blob = NULL;
3982 if (IS_QLA2100(ha)) {
3983 blob = &qla_fw_blobs[FW_ISP21XX];
3984 } else if (IS_QLA2200(ha)) {
3985 blob = &qla_fw_blobs[FW_ISP22XX];
3986 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3987 blob = &qla_fw_blobs[FW_ISP2300];
3988 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
3989 blob = &qla_fw_blobs[FW_ISP2322];
3990 } else if (IS_QLA24XX_TYPE(ha)) {
3991 blob = &qla_fw_blobs[FW_ISP24XX];
3992 } else if (IS_QLA25XX(ha)) {
3993 blob = &qla_fw_blobs[FW_ISP25XX];
3994 } else if (IS_QLA81XX(ha)) {
3995 blob = &qla_fw_blobs[FW_ISP81XX];
3996 } else if (IS_QLA82XX(ha)) {
3997 blob = &qla_fw_blobs[FW_ISP82XX];
3998 }
3999
4000 mutex_lock(&qla_fw_lock);
4001 if (blob->fw)
4002 goto out;
4003
4004 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
4005 ql_log(ql_log_warn, vha, 0x0063,
4006 "Failed to load firmware image (%s).\n", blob->name);
4007 blob->fw = NULL;
4008 blob = NULL;
4009 goto out;
4010 }
4011
4012 out:
4013 mutex_unlock(&qla_fw_lock);
4014 return blob;
4015 }
4016
4017 static void
4018 qla2x00_release_firmware(void)
4019 {
4020 int idx;
4021
4022 mutex_lock(&qla_fw_lock);
4023 for (idx = 0; idx < FW_BLOBS; idx++)
4024 if (qla_fw_blobs[idx].fw)
4025 release_firmware(qla_fw_blobs[idx].fw);
4026 mutex_unlock(&qla_fw_lock);
4027 }
4028
4029 static pci_ers_result_t
4030 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4031 {
4032 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
4033 struct qla_hw_data *ha = vha->hw;
4034
4035 ql_dbg(ql_dbg_aer, vha, 0x9000,
4036 "PCI error detected, state %x.\n", state);
4037
4038 switch (state) {
4039 case pci_channel_io_normal:
4040 ha->flags.eeh_busy = 0;
4041 return PCI_ERS_RESULT_CAN_RECOVER;
4042 case pci_channel_io_frozen:
4043 ha->flags.eeh_busy = 1;
4044 /* For ISP82XX complete any pending mailbox cmd */
4045 if (IS_QLA82XX(ha)) {
4046 ha->flags.isp82xx_fw_hung = 1;
4047 if (ha->flags.mbox_busy) {
4048 ha->flags.mbox_int = 1;
4049 ql_dbg(ql_dbg_aer, vha, 0x9001,
4050 "Due to pci channel io frozen, doing premature "
4051 "completion of mbx command.\n");
4052 complete(&ha->mbx_intr_comp);
4053 }
4054 }
4055 qla2x00_free_irqs(vha);
4056 pci_disable_device(pdev);
4057 /* Return back all IOs */
4058 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
4059 return PCI_ERS_RESULT_NEED_RESET;
4060 case pci_channel_io_perm_failure:
4061 ha->flags.pci_channel_io_perm_failure = 1;
4062 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
4063 return PCI_ERS_RESULT_DISCONNECT;
4064 }
4065 return PCI_ERS_RESULT_NEED_RESET;
4066 }
4067
4068 static pci_ers_result_t
4069 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
4070 {
4071 int risc_paused = 0;
4072 uint32_t stat;
4073 unsigned long flags;
4074 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4075 struct qla_hw_data *ha = base_vha->hw;
4076 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4077 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
4078
4079 if (IS_QLA82XX(ha))
4080 return PCI_ERS_RESULT_RECOVERED;
4081
4082 spin_lock_irqsave(&ha->hardware_lock, flags);
4083 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
4084 stat = RD_REG_DWORD(&reg->hccr);
4085 if (stat & HCCR_RISC_PAUSE)
4086 risc_paused = 1;
4087 } else if (IS_QLA23XX(ha)) {
4088 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
4089 if (stat & HSR_RISC_PAUSED)
4090 risc_paused = 1;
4091 } else if (IS_FWI2_CAPABLE(ha)) {
4092 stat = RD_REG_DWORD(&reg24->host_status);
4093 if (stat & HSRX_RISC_PAUSED)
4094 risc_paused = 1;
4095 }
4096 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4097
4098 if (risc_paused) {
4099 ql_log(ql_log_info, base_vha, 0x9003,
4100 "RISC paused -- mmio_enabled, Dumping firmware.\n");
4101 ha->isp_ops->fw_dump(base_vha, 0);
4102
4103 return PCI_ERS_RESULT_NEED_RESET;
4104 } else
4105 return PCI_ERS_RESULT_RECOVERED;
4106 }
4107
4108 uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha)
4109 {
4110 uint32_t rval = QLA_FUNCTION_FAILED;
4111 uint32_t drv_active = 0;
4112 struct qla_hw_data *ha = base_vha->hw;
4113 int fn;
4114 struct pci_dev *other_pdev = NULL;
4115
4116 ql_dbg(ql_dbg_aer, base_vha, 0x9006,
4117 "Entered %s.\n", __func__);
4118
4119 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4120
4121 if (base_vha->flags.online) {
4122 /* Abort all outstanding commands,
4123 * so as to be requeued later */
4124 qla2x00_abort_isp_cleanup(base_vha);
4125 }
4126
4127
4128 fn = PCI_FUNC(ha->pdev->devfn);
4129 while (fn > 0) {
4130 fn--;
4131 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
4132 "Finding pci device at function = 0x%x.\n", fn);
4133 other_pdev =
4134 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
4135 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
4136 fn));
4137
4138 if (!other_pdev)
4139 continue;
4140 if (atomic_read(&other_pdev->enable_cnt)) {
4141 ql_dbg(ql_dbg_aer, base_vha, 0x9008,
4142 "Found PCI func available and enable at 0x%x.\n",
4143 fn);
4144 pci_dev_put(other_pdev);
4145 break;
4146 }
4147 pci_dev_put(other_pdev);
4148 }
4149
4150 if (!fn) {
4151 /* Reset owner */
4152 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
4153 "This devfn is reset owner = 0x%x.\n",
4154 ha->pdev->devfn);
4155 qla82xx_idc_lock(ha);
4156
4157 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4158 QLA82XX_DEV_INITIALIZING);
4159
4160 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
4161 QLA82XX_IDC_VERSION);
4162
4163 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
4164 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
4165 "drv_active = 0x%x.\n", drv_active);
4166
4167 qla82xx_idc_unlock(ha);
4168 /* Reset if device is not already reset
4169 * drv_active would be 0 if a reset has already been done
4170 */
4171 if (drv_active)
4172 rval = qla82xx_start_firmware(base_vha);
4173 else
4174 rval = QLA_SUCCESS;
4175 qla82xx_idc_lock(ha);
4176
4177 if (rval != QLA_SUCCESS) {
4178 ql_log(ql_log_info, base_vha, 0x900b,
4179 "HW State: FAILED.\n");
4180 qla82xx_clear_drv_active(ha);
4181 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4182 QLA82XX_DEV_FAILED);
4183 } else {
4184 ql_log(ql_log_info, base_vha, 0x900c,
4185 "HW State: READY.\n");
4186 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4187 QLA82XX_DEV_READY);
4188 qla82xx_idc_unlock(ha);
4189 ha->flags.isp82xx_fw_hung = 0;
4190 rval = qla82xx_restart_isp(base_vha);
4191 qla82xx_idc_lock(ha);
4192 /* Clear driver state register */
4193 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
4194 qla82xx_set_drv_active(base_vha);
4195 }
4196 qla82xx_idc_unlock(ha);
4197 } else {
4198 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
4199 "This devfn is not reset owner = 0x%x.\n",
4200 ha->pdev->devfn);
4201 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
4202 QLA82XX_DEV_READY)) {
4203 ha->flags.isp82xx_fw_hung = 0;
4204 rval = qla82xx_restart_isp(base_vha);
4205 qla82xx_idc_lock(ha);
4206 qla82xx_set_drv_active(base_vha);
4207 qla82xx_idc_unlock(ha);
4208 }
4209 }
4210 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4211
4212 return rval;
4213 }
4214
4215 static pci_ers_result_t
4216 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
4217 {
4218 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
4219 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4220 struct qla_hw_data *ha = base_vha->hw;
4221 struct rsp_que *rsp;
4222 int rc, retries = 10;
4223
4224 ql_dbg(ql_dbg_aer, base_vha, 0x9004,
4225 "Slot Reset.\n");
4226
4227 /* Workaround: qla2xxx driver which access hardware earlier
4228 * needs error state to be pci_channel_io_online.
4229 * Otherwise mailbox command timesout.
4230 */
4231 pdev->error_state = pci_channel_io_normal;
4232
4233 pci_restore_state(pdev);
4234
4235 /* pci_restore_state() clears the saved_state flag of the device
4236 * save restored state which resets saved_state flag
4237 */
4238 pci_save_state(pdev);
4239
4240 if (ha->mem_only)
4241 rc = pci_enable_device_mem(pdev);
4242 else
4243 rc = pci_enable_device(pdev);
4244
4245 if (rc) {
4246 ql_log(ql_log_warn, base_vha, 0x9005,
4247 "Can't re-enable PCI device after reset.\n");
4248 goto exit_slot_reset;
4249 }
4250
4251 rsp = ha->rsp_q_map[0];
4252 if (qla2x00_request_irqs(ha, rsp))
4253 goto exit_slot_reset;
4254
4255 if (ha->isp_ops->pci_config(base_vha))
4256 goto exit_slot_reset;
4257
4258 if (IS_QLA82XX(ha)) {
4259 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
4260 ret = PCI_ERS_RESULT_RECOVERED;
4261 goto exit_slot_reset;
4262 } else
4263 goto exit_slot_reset;
4264 }
4265
4266 while (ha->flags.mbox_busy && retries--)
4267 msleep(1000);
4268
4269 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4270 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
4271 ret = PCI_ERS_RESULT_RECOVERED;
4272 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4273
4274
4275 exit_slot_reset:
4276 ql_dbg(ql_dbg_aer, base_vha, 0x900e,
4277 "slot_reset return %x.\n", ret);
4278
4279 return ret;
4280 }
4281
4282 static void
4283 qla2xxx_pci_resume(struct pci_dev *pdev)
4284 {
4285 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4286 struct qla_hw_data *ha = base_vha->hw;
4287 int ret;
4288
4289 ql_dbg(ql_dbg_aer, base_vha, 0x900f,
4290 "pci_resume.\n");
4291
4292 ret = qla2x00_wait_for_hba_online(base_vha);
4293 if (ret != QLA_SUCCESS) {
4294 ql_log(ql_log_fatal, base_vha, 0x9002,
4295 "The device failed to resume I/O from slot/link_reset.\n");
4296 }
4297
4298 pci_cleanup_aer_uncorrect_error_status(pdev);
4299
4300 ha->flags.eeh_busy = 0;
4301 }
4302
4303 static struct pci_error_handlers qla2xxx_err_handler = {
4304 .error_detected = qla2xxx_pci_error_detected,
4305 .mmio_enabled = qla2xxx_pci_mmio_enabled,
4306 .slot_reset = qla2xxx_pci_slot_reset,
4307 .resume = qla2xxx_pci_resume,
4308 };
4309
4310 static struct pci_device_id qla2xxx_pci_tbl[] = {
4311 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
4312 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
4313 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
4314 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
4315 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
4316 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
4317 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
4318 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
4319 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
4320 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
4321 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
4322 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
4323 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
4324 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
4325 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
4326 { 0 },
4327 };
4328 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
4329
4330 static struct pci_driver qla2xxx_pci_driver = {
4331 .name = QLA2XXX_DRIVER_NAME,
4332 .driver = {
4333 .owner = THIS_MODULE,
4334 },
4335 .id_table = qla2xxx_pci_tbl,
4336 .probe = qla2x00_probe_one,
4337 .remove = qla2x00_remove_one,
4338 .shutdown = qla2x00_shutdown,
4339 .err_handler = &qla2xxx_err_handler,
4340 };
4341
4342 static struct file_operations apidev_fops = {
4343 .owner = THIS_MODULE,
4344 .llseek = noop_llseek,
4345 };
4346
4347 /**
4348 * qla2x00_module_init - Module initialization.
4349 **/
4350 static int __init
4351 qla2x00_module_init(void)
4352 {
4353 int ret = 0;
4354
4355 /* Allocate cache for SRBs. */
4356 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
4357 SLAB_HWCACHE_ALIGN, NULL);
4358 if (srb_cachep == NULL) {
4359 ql_log(ql_log_fatal, NULL, 0x0001,
4360 "Unable to allocate SRB cache...Failing load!.\n");
4361 return -ENOMEM;
4362 }
4363
4364 /* Derive version string. */
4365 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
4366 if (ql2xextended_error_logging)
4367 strcat(qla2x00_version_str, "-debug");
4368
4369 qla2xxx_transport_template =
4370 fc_attach_transport(&qla2xxx_transport_functions);
4371 if (!qla2xxx_transport_template) {
4372 kmem_cache_destroy(srb_cachep);
4373 ql_log(ql_log_fatal, NULL, 0x0002,
4374 "fc_attach_transport failed...Failing load!.\n");
4375 return -ENODEV;
4376 }
4377
4378 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
4379 if (apidev_major < 0) {
4380 ql_log(ql_log_fatal, NULL, 0x0003,
4381 "Unable to register char device %s.\n", QLA2XXX_APIDEV);
4382 }
4383
4384 qla2xxx_transport_vport_template =
4385 fc_attach_transport(&qla2xxx_transport_vport_functions);
4386 if (!qla2xxx_transport_vport_template) {
4387 kmem_cache_destroy(srb_cachep);
4388 fc_release_transport(qla2xxx_transport_template);
4389 ql_log(ql_log_fatal, NULL, 0x0004,
4390 "fc_attach_transport vport failed...Failing load!.\n");
4391 return -ENODEV;
4392 }
4393 ql_log(ql_log_info, NULL, 0x0005,
4394 "QLogic Fibre Channel HBA Driver: %s.\n",
4395 qla2x00_version_str);
4396 ret = pci_register_driver(&qla2xxx_pci_driver);
4397 if (ret) {
4398 kmem_cache_destroy(srb_cachep);
4399 fc_release_transport(qla2xxx_transport_template);
4400 fc_release_transport(qla2xxx_transport_vport_template);
4401 ql_log(ql_log_fatal, NULL, 0x0006,
4402 "pci_register_driver failed...ret=%d Failing load!.\n",
4403 ret);
4404 }
4405 return ret;
4406 }
4407
4408 /**
4409 * qla2x00_module_exit - Module cleanup.
4410 **/
4411 static void __exit
4412 qla2x00_module_exit(void)
4413 {
4414 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
4415 pci_unregister_driver(&qla2xxx_pci_driver);
4416 qla2x00_release_firmware();
4417 kmem_cache_destroy(srb_cachep);
4418 if (ctx_cachep)
4419 kmem_cache_destroy(ctx_cachep);
4420 fc_release_transport(qla2xxx_transport_template);
4421 fc_release_transport(qla2xxx_transport_vport_template);
4422 }
4423
4424 module_init(qla2x00_module_init);
4425 module_exit(qla2x00_module_exit);
4426
4427 MODULE_AUTHOR("QLogic Corporation");
4428 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
4429 MODULE_LICENSE("GPL");
4430 MODULE_VERSION(QLA2XXX_VERSION);
4431 MODULE_FIRMWARE(FW_FILE_ISP21XX);
4432 MODULE_FIRMWARE(FW_FILE_ISP22XX);
4433 MODULE_FIRMWARE(FW_FILE_ISP2300);
4434 MODULE_FIRMWARE(FW_FILE_ISP2322);
4435 MODULE_FIRMWARE(FW_FILE_ISP24XX);
4436 MODULE_FIRMWARE(FW_FILE_ISP25XX);
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