]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/blob - drivers/scsi/qla4xxx/ql4_mbx.c
projects / mirror_ubuntu-hirsute-kernel.git / blob
? search:


eaf21852887cbdfa174a18bd09af40136c12481c
[mirror_ubuntu-hirsute-kernel.git] / drivers / scsi / qla4xxx / ql4_mbx.c
1 /*
2 * QLogic iSCSI HBA Driver
3 * Copyright (c) 2003-2010 QLogic Corporation
4 *
5 * See LICENSE.qla4xxx for copyright and licensing details.
6 */
7
8 #include "ql4_def.h"
9 #include "ql4_glbl.h"
10 #include "ql4_dbg.h"
11 #include "ql4_inline.h"
12
13
14 /**
15 * qla4xxx_mailbox_command - issues mailbox commands
16 * @ha: Pointer to host adapter structure.
17 * @inCount: number of mailbox registers to load.
18 * @outCount: number of mailbox registers to return.
19 * @mbx_cmd: data pointer for mailbox in registers.
20 * @mbx_sts: data pointer for mailbox out registers.
21 *
22 * This routine issue mailbox commands and waits for completion.
23 * If outCount is 0, this routine completes successfully WITHOUT waiting
24 * for the mailbox command to complete.
25 **/
26 int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
27 uint8_t outCount, uint32_t *mbx_cmd,
28 uint32_t *mbx_sts)
29 {
30 int status = QLA_ERROR;
31 uint8_t i;
32 u_long wait_count;
33 uint32_t intr_status;
34 unsigned long flags = 0;
35 uint32_t dev_state;
36
37 /* Make sure that pointers are valid */
38 if (!mbx_cmd || !mbx_sts) {
39 DEBUG2(printk("scsi%ld: %s: Invalid mbx_cmd or mbx_sts "
40 "pointer\n", ha->host_no, __func__));
41 return status;
42 }
43
44 if (is_qla40XX(ha)) {
45 if (test_bit(AF_HA_REMOVAL, &ha->flags)) {
46 DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: "
47 "prematurely completing mbx cmd as "
48 "adapter removal detected\n",
49 ha->host_no, __func__));
50 return status;
51 }
52 }
53
54 if (is_qla8022(ha)) {
55 if (test_bit(AF_FW_RECOVERY, &ha->flags)) {
56 DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: "
57 "prematurely completing mbx cmd as firmware "
58 "recovery detected\n", ha->host_no, __func__));
59 return status;
60 }
61 /* Do not send any mbx cmd if h/w is in failed state*/
62 qla4_8xxx_idc_lock(ha);
63 dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE);
64 qla4_8xxx_idc_unlock(ha);
65 if (dev_state == QLA82XX_DEV_FAILED) {
66 ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: H/W is in "
67 "failed state, do not send any mailbox commands\n",
68 ha->host_no, __func__);
69 return status;
70 }
71 }
72
73 if ((is_aer_supported(ha)) &&
74 (test_bit(AF_PCI_CHANNEL_IO_PERM_FAILURE, &ha->flags))) {
75 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: Perm failure on EEH, "
76 "timeout MBX Exiting.\n", ha->host_no, __func__));
77 return status;
78 }
79
80 /* Mailbox code active */
81 wait_count = MBOX_TOV * 100;
82
83 while (wait_count--) {
84 mutex_lock(&ha->mbox_sem);
85 if (!test_bit(AF_MBOX_COMMAND, &ha->flags)) {
86 set_bit(AF_MBOX_COMMAND, &ha->flags);
87 mutex_unlock(&ha->mbox_sem);
88 break;
89 }
90 mutex_unlock(&ha->mbox_sem);
91 if (!wait_count) {
92 DEBUG2(printk("scsi%ld: %s: mbox_sem failed\n",
93 ha->host_no, __func__));
94 return status;
95 }
96 msleep(10);
97 }
98
99 spin_lock_irqsave(&ha->hardware_lock, flags);
100
101 ha->mbox_status_count = outCount;
102 for (i = 0; i < outCount; i++)
103 ha->mbox_status[i] = 0;
104
105 if (is_qla8022(ha)) {
106 /* Load all mailbox registers, except mailbox 0. */
107 DEBUG5(
108 printk("scsi%ld: %s: Cmd ", ha->host_no, __func__);
109 for (i = 0; i < inCount; i++)
110 printk("mb%d=%04x ", i, mbx_cmd[i]);
111 printk("\n"));
112
113 for (i = 1; i < inCount; i++)
114 writel(mbx_cmd[i], &ha->qla4_8xxx_reg->mailbox_in[i]);
115 writel(mbx_cmd[0], &ha->qla4_8xxx_reg->mailbox_in[0]);
116 readl(&ha->qla4_8xxx_reg->mailbox_in[0]);
117 writel(HINT_MBX_INT_PENDING, &ha->qla4_8xxx_reg->hint);
118 } else {
119 /* Load all mailbox registers, except mailbox 0. */
120 for (i = 1; i < inCount; i++)
121 writel(mbx_cmd[i], &ha->reg->mailbox[i]);
122
123 /* Wakeup firmware */
124 writel(mbx_cmd[0], &ha->reg->mailbox[0]);
125 readl(&ha->reg->mailbox[0]);
126 writel(set_rmask(CSR_INTR_RISC), &ha->reg->ctrl_status);
127 readl(&ha->reg->ctrl_status);
128 }
129
130 spin_unlock_irqrestore(&ha->hardware_lock, flags);
131
132 /* Wait for completion */
133
134 /*
135 * If we don't want status, don't wait for the mailbox command to
136 * complete. For example, MBOX_CMD_RESET_FW doesn't return status,
137 * you must poll the inbound Interrupt Mask for completion.
138 */
139 if (outCount == 0) {
140 status = QLA_SUCCESS;
141 goto mbox_exit;
142 }
143
144 /*
145 * Wait for completion: Poll or completion queue
146 */
147 if (test_bit(AF_IRQ_ATTACHED, &ha->flags) &&
148 test_bit(AF_INTERRUPTS_ON, &ha->flags) &&
149 test_bit(AF_ONLINE, &ha->flags) &&
150 !test_bit(AF_HA_REMOVAL, &ha->flags)) {
151 /* Do not poll for completion. Use completion queue */
152 set_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags);
153 wait_for_completion_timeout(&ha->mbx_intr_comp, MBOX_TOV * HZ);
154 clear_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags);
155 } else {
156 /* Poll for command to complete */
157 wait_count = jiffies + MBOX_TOV * HZ;
158 while (test_bit(AF_MBOX_COMMAND_DONE, &ha->flags) == 0) {
159 if (time_after_eq(jiffies, wait_count))
160 break;
161
162 /*
163 * Service the interrupt.
164 * The ISR will save the mailbox status registers
165 * to a temporary storage location in the adapter
166 * structure.
167 */
168
169 spin_lock_irqsave(&ha->hardware_lock, flags);
170 if (is_qla8022(ha)) {
171 intr_status =
172 readl(&ha->qla4_8xxx_reg->host_int);
173 if (intr_status & ISRX_82XX_RISC_INT) {
174 ha->mbox_status_count = outCount;
175 intr_status =
176 readl(&ha->qla4_8xxx_reg->host_status);
177 ha->isp_ops->interrupt_service_routine(
178 ha, intr_status);
179 if (test_bit(AF_INTERRUPTS_ON,
180 &ha->flags) &&
181 test_bit(AF_INTx_ENABLED,
182 &ha->flags))
183 qla4_8xxx_wr_32(ha,
184 ha->nx_legacy_intr.tgt_mask_reg,
185 0xfbff);
186 }
187 } else {
188 intr_status = readl(&ha->reg->ctrl_status);
189 if (intr_status & INTR_PENDING) {
190 /*
191 * Service the interrupt.
192 * The ISR will save the mailbox status
193 * registers to a temporary storage
194 * location in the adapter structure.
195 */
196 ha->mbox_status_count = outCount;
197 ha->isp_ops->interrupt_service_routine(
198 ha, intr_status);
199 }
200 }
201 spin_unlock_irqrestore(&ha->hardware_lock, flags);
202 msleep(10);
203 }
204 }
205
206 /* Check for mailbox timeout. */
207 if (!test_bit(AF_MBOX_COMMAND_DONE, &ha->flags)) {
208 if (is_qla8022(ha) &&
209 test_bit(AF_FW_RECOVERY, &ha->flags)) {
210 DEBUG2(ql4_printk(KERN_INFO, ha,
211 "scsi%ld: %s: prematurely completing mbx cmd as "
212 "firmware recovery detected\n",
213 ha->host_no, __func__));
214 goto mbox_exit;
215 }
216 DEBUG2(printk("scsi%ld: Mailbox Cmd 0x%08X timed out ...,"
217 " Scheduling Adapter Reset\n", ha->host_no,
218 mbx_cmd[0]));
219 ha->mailbox_timeout_count++;
220 mbx_sts[0] = (-1);
221 set_bit(DPC_RESET_HA, &ha->dpc_flags);
222 if (is_qla8022(ha)) {
223 ql4_printk(KERN_INFO, ha,
224 "disabling pause transmit on port 0 & 1.\n");
225 qla4_8xxx_wr_32(ha, QLA82XX_CRB_NIU + 0x98,
226 CRB_NIU_XG_PAUSE_CTL_P0 |
227 CRB_NIU_XG_PAUSE_CTL_P1);
228 }
229 goto mbox_exit;
230 }
231
232 /*
233 * Copy the mailbox out registers to the caller's mailbox in/out
234 * structure.
235 */
236 spin_lock_irqsave(&ha->hardware_lock, flags);
237 for (i = 0; i < outCount; i++)
238 mbx_sts[i] = ha->mbox_status[i];
239
240 /* Set return status and error flags (if applicable). */
241 switch (ha->mbox_status[0]) {
242 case MBOX_STS_COMMAND_COMPLETE:
243 status = QLA_SUCCESS;
244 break;
245
246 case MBOX_STS_INTERMEDIATE_COMPLETION:
247 status = QLA_SUCCESS;
248 break;
249
250 case MBOX_STS_BUSY:
251 DEBUG2( printk("scsi%ld: %s: Cmd = %08X, ISP BUSY\n",
252 ha->host_no, __func__, mbx_cmd[0]));
253 ha->mailbox_timeout_count++;
254 break;
255
256 default:
257 DEBUG2(printk("scsi%ld: %s: **** FAILED, cmd = %08X, "
258 "sts = %08X ****\n", ha->host_no, __func__,
259 mbx_cmd[0], mbx_sts[0]));
260 break;
261 }
262 spin_unlock_irqrestore(&ha->hardware_lock, flags);
263
264 mbox_exit:
265 mutex_lock(&ha->mbox_sem);
266 clear_bit(AF_MBOX_COMMAND, &ha->flags);
267 mutex_unlock(&ha->mbox_sem);
268 clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
269
270 return status;
271 }
272
273 void qla4xxx_mailbox_premature_completion(struct scsi_qla_host *ha)
274 {
275 set_bit(AF_FW_RECOVERY, &ha->flags);
276 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: set FW RECOVERY!\n",
277 ha->host_no, __func__);
278
279 if (test_bit(AF_MBOX_COMMAND, &ha->flags)) {
280 if (test_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags)) {
281 complete(&ha->mbx_intr_comp);
282 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw "
283 "recovery, doing premature completion of "
284 "mbx cmd\n", ha->host_no, __func__);
285
286 } else {
287 set_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
288 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw "
289 "recovery, doing premature completion of "
290 "polling mbx cmd\n", ha->host_no, __func__);
291 }
292 }
293 }
294
295 static uint8_t
296 qla4xxx_set_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
297 uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma)
298 {
299 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
300 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
301
302 if (is_qla8022(ha))
303 qla4_8xxx_wr_32(ha, ha->nx_db_wr_ptr, 0);
304
305 mbox_cmd[0] = MBOX_CMD_INITIALIZE_FIRMWARE;
306 mbox_cmd[1] = 0;
307 mbox_cmd[2] = LSDW(init_fw_cb_dma);
308 mbox_cmd[3] = MSDW(init_fw_cb_dma);
309 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
310 mbox_cmd[5] = (IFCB_VER_MAX << 8) | IFCB_VER_MIN;
311
312 if (qla4xxx_mailbox_command(ha, 6, 6, mbox_cmd, mbox_sts) !=
313 QLA_SUCCESS) {
314 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: "
315 "MBOX_CMD_INITIALIZE_FIRMWARE"
316 " failed w/ status %04X\n",
317 ha->host_no, __func__, mbox_sts[0]));
318 return QLA_ERROR;
319 }
320 return QLA_SUCCESS;
321 }
322
323 uint8_t
324 qla4xxx_get_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
325 uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma)
326 {
327 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
328 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
329 mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK;
330 mbox_cmd[2] = LSDW(init_fw_cb_dma);
331 mbox_cmd[3] = MSDW(init_fw_cb_dma);
332 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
333
334 if (qla4xxx_mailbox_command(ha, 5, 5, mbox_cmd, mbox_sts) !=
335 QLA_SUCCESS) {
336 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: "
337 "MBOX_CMD_GET_INIT_FW_CTRL_BLOCK"
338 " failed w/ status %04X\n",
339 ha->host_no, __func__, mbox_sts[0]));
340 return QLA_ERROR;
341 }
342 return QLA_SUCCESS;
343 }
344
345 static void
346 qla4xxx_update_local_ip(struct scsi_qla_host *ha,
347 struct addr_ctrl_blk *init_fw_cb)
348 {
349 ha->ip_config.tcp_options = le16_to_cpu(init_fw_cb->ipv4_tcp_opts);
350 ha->ip_config.ipv4_options = le16_to_cpu(init_fw_cb->ipv4_ip_opts);
351 ha->ip_config.ipv4_addr_state =
352 le16_to_cpu(init_fw_cb->ipv4_addr_state);
353 ha->ip_config.eth_mtu_size =
354 le16_to_cpu(init_fw_cb->eth_mtu_size);
355 ha->ip_config.ipv4_port = le16_to_cpu(init_fw_cb->ipv4_port);
356
357 if (ha->acb_version == ACB_SUPPORTED) {
358 ha->ip_config.ipv6_options = le16_to_cpu(init_fw_cb->ipv6_opts);
359 ha->ip_config.ipv6_addl_options =
360 le16_to_cpu(init_fw_cb->ipv6_addtl_opts);
361 }
362
363 /* Save IPv4 Address Info */
364 memcpy(ha->ip_config.ip_address, init_fw_cb->ipv4_addr,
365 min(sizeof(ha->ip_config.ip_address),
366 sizeof(init_fw_cb->ipv4_addr)));
367 memcpy(ha->ip_config.subnet_mask, init_fw_cb->ipv4_subnet,
368 min(sizeof(ha->ip_config.subnet_mask),
369 sizeof(init_fw_cb->ipv4_subnet)));
370 memcpy(ha->ip_config.gateway, init_fw_cb->ipv4_gw_addr,
371 min(sizeof(ha->ip_config.gateway),
372 sizeof(init_fw_cb->ipv4_gw_addr)));
373
374 ha->ip_config.ipv4_vlan_tag = be16_to_cpu(init_fw_cb->ipv4_vlan_tag);
375
376 if (is_ipv6_enabled(ha)) {
377 /* Save IPv6 Address */
378 ha->ip_config.ipv6_link_local_state =
379 le16_to_cpu(init_fw_cb->ipv6_lnk_lcl_addr_state);
380 ha->ip_config.ipv6_addr0_state =
381 le16_to_cpu(init_fw_cb->ipv6_addr0_state);
382 ha->ip_config.ipv6_addr1_state =
383 le16_to_cpu(init_fw_cb->ipv6_addr1_state);
384 ha->ip_config.ipv6_default_router_state =
385 le16_to_cpu(init_fw_cb->ipv6_dflt_rtr_state);
386 ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[0] = 0xFE;
387 ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[1] = 0x80;
388
389 memcpy(&ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[8],
390 init_fw_cb->ipv6_if_id,
391 min(sizeof(ha->ip_config.ipv6_link_local_addr)/2,
392 sizeof(init_fw_cb->ipv6_if_id)));
393 memcpy(&ha->ip_config.ipv6_addr0, init_fw_cb->ipv6_addr0,
394 min(sizeof(ha->ip_config.ipv6_addr0),
395 sizeof(init_fw_cb->ipv6_addr0)));
396 memcpy(&ha->ip_config.ipv6_addr1, init_fw_cb->ipv6_addr1,
397 min(sizeof(ha->ip_config.ipv6_addr1),
398 sizeof(init_fw_cb->ipv6_addr1)));
399 memcpy(&ha->ip_config.ipv6_default_router_addr,
400 init_fw_cb->ipv6_dflt_rtr_addr,
401 min(sizeof(ha->ip_config.ipv6_default_router_addr),
402 sizeof(init_fw_cb->ipv6_dflt_rtr_addr)));
403 ha->ip_config.ipv6_vlan_tag =
404 be16_to_cpu(init_fw_cb->ipv6_vlan_tag);
405 ha->ip_config.ipv6_port = le16_to_cpu(init_fw_cb->ipv6_port);
406 }
407 }
408
409 uint8_t
410 qla4xxx_update_local_ifcb(struct scsi_qla_host *ha,
411 uint32_t *mbox_cmd,
412 uint32_t *mbox_sts,
413 struct addr_ctrl_blk *init_fw_cb,
414 dma_addr_t init_fw_cb_dma)
415 {
416 if (qla4xxx_get_ifcb(ha, mbox_cmd, mbox_sts, init_fw_cb_dma)
417 != QLA_SUCCESS) {
418 DEBUG2(printk(KERN_WARNING
419 "scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
420 ha->host_no, __func__));
421 return QLA_ERROR;
422 }
423
424 DEBUG2(qla4xxx_dump_buffer(init_fw_cb, sizeof(struct addr_ctrl_blk)));
425
426 /* Save some info in adapter structure. */
427 ha->acb_version = init_fw_cb->acb_version;
428 ha->firmware_options = le16_to_cpu(init_fw_cb->fw_options);
429 ha->heartbeat_interval = init_fw_cb->hb_interval;
430 memcpy(ha->name_string, init_fw_cb->iscsi_name,
431 min(sizeof(ha->name_string),
432 sizeof(init_fw_cb->iscsi_name)));
433 ha->def_timeout = le16_to_cpu(init_fw_cb->def_timeout);
434 /*memcpy(ha->alias, init_fw_cb->Alias,
435 min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/
436
437 qla4xxx_update_local_ip(ha, init_fw_cb);
438
439 return QLA_SUCCESS;
440 }
441
442 /**
443 * qla4xxx_initialize_fw_cb - initializes firmware control block.
444 * @ha: Pointer to host adapter structure.
445 **/
446 int qla4xxx_initialize_fw_cb(struct scsi_qla_host * ha)
447 {
448 struct addr_ctrl_blk *init_fw_cb;
449 dma_addr_t init_fw_cb_dma;
450 uint32_t mbox_cmd[MBOX_REG_COUNT];
451 uint32_t mbox_sts[MBOX_REG_COUNT];
452 int status = QLA_ERROR;
453
454 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
455 sizeof(struct addr_ctrl_blk),
456 &init_fw_cb_dma, GFP_KERNEL);
457 if (init_fw_cb == NULL) {
458 DEBUG2(printk("scsi%ld: %s: Unable to alloc init_cb\n",
459 ha->host_no, __func__));
460 goto exit_init_fw_cb_no_free;
461 }
462 memset(init_fw_cb, 0, sizeof(struct addr_ctrl_blk));
463
464 /* Get Initialize Firmware Control Block. */
465 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
466 memset(&mbox_sts, 0, sizeof(mbox_sts));
467
468 if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) !=
469 QLA_SUCCESS) {
470 dma_free_coherent(&ha->pdev->dev,
471 sizeof(struct addr_ctrl_blk),
472 init_fw_cb, init_fw_cb_dma);
473 goto exit_init_fw_cb;
474 }
475
476 /* Initialize request and response queues. */
477 qla4xxx_init_rings(ha);
478
479 /* Fill in the request and response queue information. */
480 init_fw_cb->rqq_consumer_idx = cpu_to_le16(ha->request_out);
481 init_fw_cb->compq_producer_idx = cpu_to_le16(ha->response_in);
482 init_fw_cb->rqq_len = __constant_cpu_to_le16(REQUEST_QUEUE_DEPTH);
483 init_fw_cb->compq_len = __constant_cpu_to_le16(RESPONSE_QUEUE_DEPTH);
484 init_fw_cb->rqq_addr_lo = cpu_to_le32(LSDW(ha->request_dma));
485 init_fw_cb->rqq_addr_hi = cpu_to_le32(MSDW(ha->request_dma));
486 init_fw_cb->compq_addr_lo = cpu_to_le32(LSDW(ha->response_dma));
487 init_fw_cb->compq_addr_hi = cpu_to_le32(MSDW(ha->response_dma));
488 init_fw_cb->shdwreg_addr_lo = cpu_to_le32(LSDW(ha->shadow_regs_dma));
489 init_fw_cb->shdwreg_addr_hi = cpu_to_le32(MSDW(ha->shadow_regs_dma));
490
491 /* Set up required options. */
492 init_fw_cb->fw_options |=
493 __constant_cpu_to_le16(FWOPT_SESSION_MODE |
494 FWOPT_INITIATOR_MODE);
495
496 if (is_qla8022(ha))
497 init_fw_cb->fw_options |=
498 __constant_cpu_to_le16(FWOPT_ENABLE_CRBDB);
499
500 init_fw_cb->fw_options &= __constant_cpu_to_le16(~FWOPT_TARGET_MODE);
501
502 init_fw_cb->add_fw_options = 0;
503 init_fw_cb->add_fw_options |=
504 __constant_cpu_to_le16(ADFWOPT_SERIALIZE_TASK_MGMT);
505 init_fw_cb->add_fw_options |=
506 __constant_cpu_to_le16(ADFWOPT_AUTOCONN_DISABLE);
507
508 if (qla4xxx_set_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma)
509 != QLA_SUCCESS) {
510 DEBUG2(printk(KERN_WARNING
511 "scsi%ld: %s: Failed to set init_fw_ctrl_blk\n",
512 ha->host_no, __func__));
513 goto exit_init_fw_cb;
514 }
515
516 if (qla4xxx_update_local_ifcb(ha, &mbox_cmd[0], &mbox_sts[0],
517 init_fw_cb, init_fw_cb_dma) != QLA_SUCCESS) {
518 DEBUG2(printk("scsi%ld: %s: Failed to update local ifcb\n",
519 ha->host_no, __func__));
520 goto exit_init_fw_cb;
521 }
522 status = QLA_SUCCESS;
523
524 exit_init_fw_cb:
525 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk),
526 init_fw_cb, init_fw_cb_dma);
527 exit_init_fw_cb_no_free:
528 return status;
529 }
530
531 /**
532 * qla4xxx_get_dhcp_ip_address - gets HBA ip address via DHCP
533 * @ha: Pointer to host adapter structure.
534 **/
535 int qla4xxx_get_dhcp_ip_address(struct scsi_qla_host * ha)
536 {
537 struct addr_ctrl_blk *init_fw_cb;
538 dma_addr_t init_fw_cb_dma;
539 uint32_t mbox_cmd[MBOX_REG_COUNT];
540 uint32_t mbox_sts[MBOX_REG_COUNT];
541
542 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
543 sizeof(struct addr_ctrl_blk),
544 &init_fw_cb_dma, GFP_KERNEL);
545 if (init_fw_cb == NULL) {
546 printk("scsi%ld: %s: Unable to alloc init_cb\n", ha->host_no,
547 __func__);
548 return QLA_ERROR;
549 }
550
551 /* Get Initialize Firmware Control Block. */
552 memset(init_fw_cb, 0, sizeof(struct addr_ctrl_blk));
553 if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) !=
554 QLA_SUCCESS) {
555 DEBUG2(printk("scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
556 ha->host_no, __func__));
557 dma_free_coherent(&ha->pdev->dev,
558 sizeof(struct addr_ctrl_blk),
559 init_fw_cb, init_fw_cb_dma);
560 return QLA_ERROR;
561 }
562
563 /* Save IP Address. */
564 qla4xxx_update_local_ip(ha, init_fw_cb);
565 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk),
566 init_fw_cb, init_fw_cb_dma);
567
568 return QLA_SUCCESS;
569 }
570
571 /**
572 * qla4xxx_get_firmware_state - gets firmware state of HBA
573 * @ha: Pointer to host adapter structure.
574 **/
575 int qla4xxx_get_firmware_state(struct scsi_qla_host * ha)
576 {
577 uint32_t mbox_cmd[MBOX_REG_COUNT];
578 uint32_t mbox_sts[MBOX_REG_COUNT];
579
580 /* Get firmware version */
581 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
582 memset(&mbox_sts, 0, sizeof(mbox_sts));
583
584 mbox_cmd[0] = MBOX_CMD_GET_FW_STATE;
585
586 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 4, &mbox_cmd[0], &mbox_sts[0]) !=
587 QLA_SUCCESS) {
588 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATE failed w/ "
589 "status %04X\n", ha->host_no, __func__,
590 mbox_sts[0]));
591 return QLA_ERROR;
592 }
593 ha->firmware_state = mbox_sts[1];
594 ha->board_id = mbox_sts[2];
595 ha->addl_fw_state = mbox_sts[3];
596 DEBUG2(printk("scsi%ld: %s firmware_state=0x%x\n",
597 ha->host_no, __func__, ha->firmware_state);)
598
599 return QLA_SUCCESS;
600 }
601
602 /**
603 * qla4xxx_get_firmware_status - retrieves firmware status
604 * @ha: Pointer to host adapter structure.
605 **/
606 int qla4xxx_get_firmware_status(struct scsi_qla_host * ha)
607 {
608 uint32_t mbox_cmd[MBOX_REG_COUNT];
609 uint32_t mbox_sts[MBOX_REG_COUNT];
610
611 /* Get firmware version */
612 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
613 memset(&mbox_sts, 0, sizeof(mbox_sts));
614
615 mbox_cmd[0] = MBOX_CMD_GET_FW_STATUS;
616
617 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) !=
618 QLA_SUCCESS) {
619 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATUS failed w/ "
620 "status %04X\n", ha->host_no, __func__,
621 mbox_sts[0]));
622 return QLA_ERROR;
623 }
624
625 ql4_printk(KERN_INFO, ha, "%ld firmare IOCBs available (%d).\n",
626 ha->host_no, mbox_sts[2]);
627
628 return QLA_SUCCESS;
629 }
630
631 /**
632 * qla4xxx_get_fwddb_entry - retrieves firmware ddb entry
633 * @ha: Pointer to host adapter structure.
634 * @fw_ddb_index: Firmware's device database index
635 * @fw_ddb_entry: Pointer to firmware's device database entry structure
636 * @num_valid_ddb_entries: Pointer to number of valid ddb entries
637 * @next_ddb_index: Pointer to next valid device database index
638 * @fw_ddb_device_state: Pointer to device state
639 **/
640 int qla4xxx_get_fwddb_entry(struct scsi_qla_host *ha,
641 uint16_t fw_ddb_index,
642 struct dev_db_entry *fw_ddb_entry,
643 dma_addr_t fw_ddb_entry_dma,
644 uint32_t *num_valid_ddb_entries,
645 uint32_t *next_ddb_index,
646 uint32_t *fw_ddb_device_state,
647 uint32_t *conn_err_detail,
648 uint16_t *tcp_source_port_num,
649 uint16_t *connection_id)
650 {
651 int status = QLA_ERROR;
652 uint16_t options;
653 uint32_t mbox_cmd[MBOX_REG_COUNT];
654 uint32_t mbox_sts[MBOX_REG_COUNT];
655
656 /* Make sure the device index is valid */
657 if (fw_ddb_index >= MAX_DDB_ENTRIES) {
658 DEBUG2(printk("scsi%ld: %s: ddb [%d] out of range.\n",
659 ha->host_no, __func__, fw_ddb_index));
660 goto exit_get_fwddb;
661 }
662 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
663 memset(&mbox_sts, 0, sizeof(mbox_sts));
664 if (fw_ddb_entry)
665 memset(fw_ddb_entry, 0, sizeof(struct dev_db_entry));
666
667 mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY;
668 mbox_cmd[1] = (uint32_t) fw_ddb_index;
669 mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
670 mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
671 mbox_cmd[4] = sizeof(struct dev_db_entry);
672
673 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 7, &mbox_cmd[0], &mbox_sts[0]) ==
674 QLA_ERROR) {
675 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_DATABASE_ENTRY failed"
676 " with status 0x%04X\n", ha->host_no, __func__,
677 mbox_sts[0]));
678 goto exit_get_fwddb;
679 }
680 if (fw_ddb_index != mbox_sts[1]) {
681 DEBUG2(printk("scsi%ld: %s: ddb mismatch [%d] != [%d].\n",
682 ha->host_no, __func__, fw_ddb_index,
683 mbox_sts[1]));
684 goto exit_get_fwddb;
685 }
686 if (fw_ddb_entry) {
687 options = le16_to_cpu(fw_ddb_entry->options);
688 if (options & DDB_OPT_IPV6_DEVICE) {
689 ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d "
690 "Next %d State %04x ConnErr %08x %pI6 "
691 ":%04d \"%s\"\n", __func__, fw_ddb_index,
692 mbox_sts[0], mbox_sts[2], mbox_sts[3],
693 mbox_sts[4], mbox_sts[5],
694 fw_ddb_entry->ip_addr,
695 le16_to_cpu(fw_ddb_entry->port),
696 fw_ddb_entry->iscsi_name);
697 } else {
698 ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d "
699 "Next %d State %04x ConnErr %08x %pI4 "
700 ":%04d \"%s\"\n", __func__, fw_ddb_index,
701 mbox_sts[0], mbox_sts[2], mbox_sts[3],
702 mbox_sts[4], mbox_sts[5],
703 fw_ddb_entry->ip_addr,
704 le16_to_cpu(fw_ddb_entry->port),
705 fw_ddb_entry->iscsi_name);
706 }
707 }
708 if (num_valid_ddb_entries)
709 *num_valid_ddb_entries = mbox_sts[2];
710 if (next_ddb_index)
711 *next_ddb_index = mbox_sts[3];
712 if (fw_ddb_device_state)
713 *fw_ddb_device_state = mbox_sts[4];
714
715 /*
716 * RA: This mailbox has been changed to pass connection error and
717 * details. Its true for ISP4010 as per Version E - Not sure when it
718 * was changed. Get the time2wait from the fw_dd_entry field :
719 * default_time2wait which we call it as minTime2Wait DEV_DB_ENTRY
720 * struct.
721 */
722 if (conn_err_detail)
723 *conn_err_detail = mbox_sts[5];
724 if (tcp_source_port_num)
725 *tcp_source_port_num = (uint16_t) (mbox_sts[6] >> 16);
726 if (connection_id)
727 *connection_id = (uint16_t) mbox_sts[6] & 0x00FF;
728 status = QLA_SUCCESS;
729
730 exit_get_fwddb:
731 return status;
732 }
733
734 int qla4xxx_conn_open(struct scsi_qla_host *ha, uint16_t fw_ddb_index)
735 {
736 uint32_t mbox_cmd[MBOX_REG_COUNT];
737 uint32_t mbox_sts[MBOX_REG_COUNT];
738 int status;
739
740 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
741 memset(&mbox_sts, 0, sizeof(mbox_sts));
742
743 mbox_cmd[0] = MBOX_CMD_CONN_OPEN;
744 mbox_cmd[1] = fw_ddb_index;
745
746 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0],
747 &mbox_sts[0]);
748 DEBUG2(ql4_printk(KERN_INFO, ha,
749 "%s: status = %d mbx0 = 0x%x mbx1 = 0x%x\n",
750 __func__, status, mbox_sts[0], mbox_sts[1]));
751 return status;
752 }
753
754 /**
755 * qla4xxx_set_fwddb_entry - sets a ddb entry.
756 * @ha: Pointer to host adapter structure.
757 * @fw_ddb_index: Firmware's device database index
758 * @fw_ddb_entry_dma: dma address of ddb entry
759 * @mbx_sts: mailbox 0 to be returned or NULL
760 *
761 * This routine initializes or updates the adapter's device database
762 * entry for the specified device.
763 **/
764 int qla4xxx_set_ddb_entry(struct scsi_qla_host * ha, uint16_t fw_ddb_index,
765 dma_addr_t fw_ddb_entry_dma, uint32_t *mbx_sts)
766 {
767 uint32_t mbox_cmd[MBOX_REG_COUNT];
768 uint32_t mbox_sts[MBOX_REG_COUNT];
769 int status;
770
771 /* Do not wait for completion. The firmware will send us an
772 * ASTS_DATABASE_CHANGED (0x8014) to notify us of the login status.
773 */
774 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
775 memset(&mbox_sts, 0, sizeof(mbox_sts));
776
777 mbox_cmd[0] = MBOX_CMD_SET_DATABASE_ENTRY;
778 mbox_cmd[1] = (uint32_t) fw_ddb_index;
779 mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
780 mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
781 mbox_cmd[4] = sizeof(struct dev_db_entry);
782
783 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0],
784 &mbox_sts[0]);
785 if (mbx_sts)
786 *mbx_sts = mbox_sts[0];
787 DEBUG2(printk("scsi%ld: %s: status=%d mbx0=0x%x mbx4=0x%x\n",
788 ha->host_no, __func__, status, mbox_sts[0], mbox_sts[4]);)
789
790 return status;
791 }
792
793 int qla4xxx_session_logout_ddb(struct scsi_qla_host *ha,
794 struct ddb_entry *ddb_entry, int options)
795 {
796 int status;
797 uint32_t mbox_cmd[MBOX_REG_COUNT];
798 uint32_t mbox_sts[MBOX_REG_COUNT];
799
800 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
801 memset(&mbox_sts, 0, sizeof(mbox_sts));
802
803 mbox_cmd[0] = MBOX_CMD_CONN_CLOSE_SESS_LOGOUT;
804 mbox_cmd[1] = ddb_entry->fw_ddb_index;
805 mbox_cmd[3] = options;
806
807 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0],
808 &mbox_sts[0]);
809 if (status != QLA_SUCCESS) {
810 DEBUG2(ql4_printk(KERN_INFO, ha,
811 "%s: MBOX_CMD_CONN_CLOSE_SESS_LOGOUT "
812 "failed sts %04X %04X", __func__,
813 mbox_sts[0], mbox_sts[1]));
814 }
815
816 return status;
817 }
818
819 /**
820 * qla4xxx_get_crash_record - retrieves crash record.
821 * @ha: Pointer to host adapter structure.
822 *
823 * This routine retrieves a crash record from the QLA4010 after an 8002h aen.
824 **/
825 void qla4xxx_get_crash_record(struct scsi_qla_host * ha)
826 {
827 uint32_t mbox_cmd[MBOX_REG_COUNT];
828 uint32_t mbox_sts[MBOX_REG_COUNT];
829 struct crash_record *crash_record = NULL;
830 dma_addr_t crash_record_dma = 0;
831 uint32_t crash_record_size = 0;
832
833 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
834 memset(&mbox_sts, 0, sizeof(mbox_cmd));
835
836 /* Get size of crash record. */
837 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
838
839 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
840 QLA_SUCCESS) {
841 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve size!\n",
842 ha->host_no, __func__));
843 goto exit_get_crash_record;
844 }
845 crash_record_size = mbox_sts[4];
846 if (crash_record_size == 0) {
847 DEBUG2(printk("scsi%ld: %s: ERROR: Crash record size is 0!\n",
848 ha->host_no, __func__));
849 goto exit_get_crash_record;
850 }
851
852 /* Alloc Memory for Crash Record. */
853 crash_record = dma_alloc_coherent(&ha->pdev->dev, crash_record_size,
854 &crash_record_dma, GFP_KERNEL);
855 if (crash_record == NULL)
856 goto exit_get_crash_record;
857
858 /* Get Crash Record. */
859 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
860 memset(&mbox_sts, 0, sizeof(mbox_cmd));
861
862 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
863 mbox_cmd[2] = LSDW(crash_record_dma);
864 mbox_cmd[3] = MSDW(crash_record_dma);
865 mbox_cmd[4] = crash_record_size;
866
867 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
868 QLA_SUCCESS)
869 goto exit_get_crash_record;
870
871 /* Dump Crash Record. */
872
873 exit_get_crash_record:
874 if (crash_record)
875 dma_free_coherent(&ha->pdev->dev, crash_record_size,
876 crash_record, crash_record_dma);
877 }
878
879 /**
880 * qla4xxx_get_conn_event_log - retrieves connection event log
881 * @ha: Pointer to host adapter structure.
882 **/
883 void qla4xxx_get_conn_event_log(struct scsi_qla_host * ha)
884 {
885 uint32_t mbox_cmd[MBOX_REG_COUNT];
886 uint32_t mbox_sts[MBOX_REG_COUNT];
887 struct conn_event_log_entry *event_log = NULL;
888 dma_addr_t event_log_dma = 0;
889 uint32_t event_log_size = 0;
890 uint32_t num_valid_entries;
891 uint32_t oldest_entry = 0;
892 uint32_t max_event_log_entries;
893 uint8_t i;
894
895 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
896 memset(&mbox_sts, 0, sizeof(mbox_cmd));
897
898 /* Get size of crash record. */
899 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
900
901 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
902 QLA_SUCCESS)
903 goto exit_get_event_log;
904
905 event_log_size = mbox_sts[4];
906 if (event_log_size == 0)
907 goto exit_get_event_log;
908
909 /* Alloc Memory for Crash Record. */
910 event_log = dma_alloc_coherent(&ha->pdev->dev, event_log_size,
911 &event_log_dma, GFP_KERNEL);
912 if (event_log == NULL)
913 goto exit_get_event_log;
914
915 /* Get Crash Record. */
916 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
917 memset(&mbox_sts, 0, sizeof(mbox_cmd));
918
919 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
920 mbox_cmd[2] = LSDW(event_log_dma);
921 mbox_cmd[3] = MSDW(event_log_dma);
922
923 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
924 QLA_SUCCESS) {
925 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve event "
926 "log!\n", ha->host_no, __func__));
927 goto exit_get_event_log;
928 }
929
930 /* Dump Event Log. */
931 num_valid_entries = mbox_sts[1];
932
933 max_event_log_entries = event_log_size /
934 sizeof(struct conn_event_log_entry);
935
936 if (num_valid_entries > max_event_log_entries)
937 oldest_entry = num_valid_entries % max_event_log_entries;
938
939 DEBUG3(printk("scsi%ld: Connection Event Log Dump (%d entries):\n",
940 ha->host_no, num_valid_entries));
941
942 if (ql4xextended_error_logging == 3) {
943 if (oldest_entry == 0) {
944 /* Circular Buffer has not wrapped around */
945 for (i=0; i < num_valid_entries; i++) {
946 qla4xxx_dump_buffer((uint8_t *)event_log+
947 (i*sizeof(*event_log)),
948 sizeof(*event_log));
949 }
950 }
951 else {
952 /* Circular Buffer has wrapped around -
953 * display accordingly*/
954 for (i=oldest_entry; i < max_event_log_entries; i++) {
955 qla4xxx_dump_buffer((uint8_t *)event_log+
956 (i*sizeof(*event_log)),
957 sizeof(*event_log));
958 }
959 for (i=0; i < oldest_entry; i++) {
960 qla4xxx_dump_buffer((uint8_t *)event_log+
961 (i*sizeof(*event_log)),
962 sizeof(*event_log));
963 }
964 }
965 }
966
967 exit_get_event_log:
968 if (event_log)
969 dma_free_coherent(&ha->pdev->dev, event_log_size, event_log,
970 event_log_dma);
971 }
972
973 /**
974 * qla4xxx_abort_task - issues Abort Task
975 * @ha: Pointer to host adapter structure.
976 * @srb: Pointer to srb entry
977 *
978 * This routine performs a LUN RESET on the specified target/lun.
979 * The caller must ensure that the ddb_entry and lun_entry pointers
980 * are valid before calling this routine.
981 **/
982 int qla4xxx_abort_task(struct scsi_qla_host *ha, struct srb *srb)
983 {
984 uint32_t mbox_cmd[MBOX_REG_COUNT];
985 uint32_t mbox_sts[MBOX_REG_COUNT];
986 struct scsi_cmnd *cmd = srb->cmd;
987 int status = QLA_SUCCESS;
988 unsigned long flags = 0;
989 uint32_t index;
990
991 /*
992 * Send abort task command to ISP, so that the ISP will return
993 * request with ABORT status
994 */
995 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
996 memset(&mbox_sts, 0, sizeof(mbox_sts));
997
998 spin_lock_irqsave(&ha->hardware_lock, flags);
999 index = (unsigned long)(unsigned char *)cmd->host_scribble;
1000 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1001
1002 /* Firmware already posted completion on response queue */
1003 if (index == MAX_SRBS)
1004 return status;
1005
1006 mbox_cmd[0] = MBOX_CMD_ABORT_TASK;
1007 mbox_cmd[1] = srb->ddb->fw_ddb_index;
1008 mbox_cmd[2] = index;
1009 /* Immediate Command Enable */
1010 mbox_cmd[5] = 0x01;
1011
1012 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0],
1013 &mbox_sts[0]);
1014 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE) {
1015 status = QLA_ERROR;
1016
1017 DEBUG2(printk(KERN_WARNING "scsi%ld:%d:%d: abort task FAILED: "
1018 "mbx0=%04X, mb1=%04X, mb2=%04X, mb3=%04X, mb4=%04X\n",
1019 ha->host_no, cmd->device->id, cmd->device->lun, mbox_sts[0],
1020 mbox_sts[1], mbox_sts[2], mbox_sts[3], mbox_sts[4]));
1021 }
1022
1023 return status;
1024 }
1025
1026 /**
1027 * qla4xxx_reset_lun - issues LUN Reset
1028 * @ha: Pointer to host adapter structure.
1029 * @ddb_entry: Pointer to device database entry
1030 * @lun: lun number
1031 *
1032 * This routine performs a LUN RESET on the specified target/lun.
1033 * The caller must ensure that the ddb_entry and lun_entry pointers
1034 * are valid before calling this routine.
1035 **/
1036 int qla4xxx_reset_lun(struct scsi_qla_host * ha, struct ddb_entry * ddb_entry,
1037 int lun)
1038 {
1039 uint32_t mbox_cmd[MBOX_REG_COUNT];
1040 uint32_t mbox_sts[MBOX_REG_COUNT];
1041 int status = QLA_SUCCESS;
1042
1043 DEBUG2(printk("scsi%ld:%d:%d: lun reset issued\n", ha->host_no,
1044 ddb_entry->fw_ddb_index, lun));
1045
1046 /*
1047 * Send lun reset command to ISP, so that the ISP will return all
1048 * outstanding requests with RESET status
1049 */
1050 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1051 memset(&mbox_sts, 0, sizeof(mbox_sts));
1052
1053 mbox_cmd[0] = MBOX_CMD_LUN_RESET;
1054 mbox_cmd[1] = ddb_entry->fw_ddb_index;
1055 mbox_cmd[2] = lun << 8;
1056 mbox_cmd[5] = 0x01; /* Immediate Command Enable */
1057
1058 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]);
1059 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
1060 mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
1061 status = QLA_ERROR;
1062
1063 return status;
1064 }
1065
1066 /**
1067 * qla4xxx_reset_target - issues target Reset
1068 * @ha: Pointer to host adapter structure.
1069 * @db_entry: Pointer to device database entry
1070 * @un_entry: Pointer to lun entry structure
1071 *
1072 * This routine performs a TARGET RESET on the specified target.
1073 * The caller must ensure that the ddb_entry pointers
1074 * are valid before calling this routine.
1075 **/
1076 int qla4xxx_reset_target(struct scsi_qla_host *ha,
1077 struct ddb_entry *ddb_entry)
1078 {
1079 uint32_t mbox_cmd[MBOX_REG_COUNT];
1080 uint32_t mbox_sts[MBOX_REG_COUNT];
1081 int status = QLA_SUCCESS;
1082
1083 DEBUG2(printk("scsi%ld:%d: target reset issued\n", ha->host_no,
1084 ddb_entry->fw_ddb_index));
1085
1086 /*
1087 * Send target reset command to ISP, so that the ISP will return all
1088 * outstanding requests with RESET status
1089 */
1090 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1091 memset(&mbox_sts, 0, sizeof(mbox_sts));
1092
1093 mbox_cmd[0] = MBOX_CMD_TARGET_WARM_RESET;
1094 mbox_cmd[1] = ddb_entry->fw_ddb_index;
1095 mbox_cmd[5] = 0x01; /* Immediate Command Enable */
1096
1097 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1098 &mbox_sts[0]);
1099 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
1100 mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
1101 status = QLA_ERROR;
1102
1103 return status;
1104 }
1105
1106 int qla4xxx_get_flash(struct scsi_qla_host * ha, dma_addr_t dma_addr,
1107 uint32_t offset, uint32_t len)
1108 {
1109 uint32_t mbox_cmd[MBOX_REG_COUNT];
1110 uint32_t mbox_sts[MBOX_REG_COUNT];
1111
1112 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1113 memset(&mbox_sts, 0, sizeof(mbox_sts));
1114
1115 mbox_cmd[0] = MBOX_CMD_READ_FLASH;
1116 mbox_cmd[1] = LSDW(dma_addr);
1117 mbox_cmd[2] = MSDW(dma_addr);
1118 mbox_cmd[3] = offset;
1119 mbox_cmd[4] = len;
1120
1121 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0], &mbox_sts[0]) !=
1122 QLA_SUCCESS) {
1123 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_READ_FLASH, failed w/ "
1124 "status %04X %04X, offset %08x, len %08x\n", ha->host_no,
1125 __func__, mbox_sts[0], mbox_sts[1], offset, len));
1126 return QLA_ERROR;
1127 }
1128 return QLA_SUCCESS;
1129 }
1130
1131 /**
1132 * qla4xxx_about_firmware - gets FW, iscsi draft and boot loader version
1133 * @ha: Pointer to host adapter structure.
1134 *
1135 * Retrieves the FW version, iSCSI draft version & bootloader version of HBA.
1136 * Mailboxes 2 & 3 may hold an address for data. Make sure that we write 0 to
1137 * those mailboxes, if unused.
1138 **/
1139 int qla4xxx_about_firmware(struct scsi_qla_host *ha)
1140 {
1141 struct about_fw_info *about_fw = NULL;
1142 dma_addr_t about_fw_dma;
1143 uint32_t mbox_cmd[MBOX_REG_COUNT];
1144 uint32_t mbox_sts[MBOX_REG_COUNT];
1145 int status = QLA_ERROR;
1146
1147 about_fw = dma_alloc_coherent(&ha->pdev->dev,
1148 sizeof(struct about_fw_info),
1149 &about_fw_dma, GFP_KERNEL);
1150 if (!about_fw) {
1151 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: Unable to alloc memory "
1152 "for about_fw\n", __func__));
1153 return status;
1154 }
1155
1156 memset(about_fw, 0, sizeof(struct about_fw_info));
1157 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1158 memset(&mbox_sts, 0, sizeof(mbox_sts));
1159
1160 mbox_cmd[0] = MBOX_CMD_ABOUT_FW;
1161 mbox_cmd[2] = LSDW(about_fw_dma);
1162 mbox_cmd[3] = MSDW(about_fw_dma);
1163 mbox_cmd[4] = sizeof(struct about_fw_info);
1164
1165 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT,
1166 &mbox_cmd[0], &mbox_sts[0]);
1167 if (status != QLA_SUCCESS) {
1168 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_ABOUT_FW "
1169 "failed w/ status %04X\n", __func__,
1170 mbox_sts[0]));
1171 goto exit_about_fw;
1172 }
1173
1174 /* Save version information. */
1175 ha->firmware_version[0] = le16_to_cpu(about_fw->fw_major);
1176 ha->firmware_version[1] = le16_to_cpu(about_fw->fw_minor);
1177 ha->patch_number = le16_to_cpu(about_fw->fw_patch);
1178 ha->build_number = le16_to_cpu(about_fw->fw_build);
1179 ha->iscsi_major = le16_to_cpu(about_fw->iscsi_major);
1180 ha->iscsi_minor = le16_to_cpu(about_fw->iscsi_minor);
1181 ha->bootload_major = le16_to_cpu(about_fw->bootload_major);
1182 ha->bootload_minor = le16_to_cpu(about_fw->bootload_minor);
1183 ha->bootload_patch = le16_to_cpu(about_fw->bootload_patch);
1184 ha->bootload_build = le16_to_cpu(about_fw->bootload_build);
1185 status = QLA_SUCCESS;
1186
1187 exit_about_fw:
1188 dma_free_coherent(&ha->pdev->dev, sizeof(struct about_fw_info),
1189 about_fw, about_fw_dma);
1190 return status;
1191 }
1192
1193 static int qla4xxx_get_default_ddb(struct scsi_qla_host *ha, uint32_t options,
1194 dma_addr_t dma_addr)
1195 {
1196 uint32_t mbox_cmd[MBOX_REG_COUNT];
1197 uint32_t mbox_sts[MBOX_REG_COUNT];
1198
1199 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1200 memset(&mbox_sts, 0, sizeof(mbox_sts));
1201
1202 mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY_DEFAULTS;
1203 mbox_cmd[1] = options;
1204 mbox_cmd[2] = LSDW(dma_addr);
1205 mbox_cmd[3] = MSDW(dma_addr);
1206
1207 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
1208 QLA_SUCCESS) {
1209 DEBUG2(printk("scsi%ld: %s: failed status %04X\n",
1210 ha->host_no, __func__, mbox_sts[0]));
1211 return QLA_ERROR;
1212 }
1213 return QLA_SUCCESS;
1214 }
1215
1216 int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t ddb_index,
1217 uint32_t *mbx_sts)
1218 {
1219 int status;
1220 uint32_t mbox_cmd[MBOX_REG_COUNT];
1221 uint32_t mbox_sts[MBOX_REG_COUNT];
1222
1223 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1224 memset(&mbox_sts, 0, sizeof(mbox_sts));
1225
1226 mbox_cmd[0] = MBOX_CMD_REQUEST_DATABASE_ENTRY;
1227 mbox_cmd[1] = ddb_index;
1228
1229 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1230 &mbox_sts[0]);
1231 if (status != QLA_SUCCESS) {
1232 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n",
1233 __func__, mbox_sts[0]));
1234 }
1235
1236 *mbx_sts = mbox_sts[0];
1237 return status;
1238 }
1239
1240 int qla4xxx_clear_ddb_entry(struct scsi_qla_host *ha, uint32_t ddb_index)
1241 {
1242 int status;
1243 uint32_t mbox_cmd[MBOX_REG_COUNT];
1244 uint32_t mbox_sts[MBOX_REG_COUNT];
1245
1246 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1247 memset(&mbox_sts, 0, sizeof(mbox_sts));
1248
1249 mbox_cmd[0] = MBOX_CMD_CLEAR_DATABASE_ENTRY;
1250 mbox_cmd[1] = ddb_index;
1251
1252 status = qla4xxx_mailbox_command(ha, 2, 1, &mbox_cmd[0],
1253 &mbox_sts[0]);
1254 if (status != QLA_SUCCESS) {
1255 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n",
1256 __func__, mbox_sts[0]));
1257 }
1258
1259 return status;
1260 }
1261
1262 int qla4xxx_set_flash(struct scsi_qla_host *ha, dma_addr_t dma_addr,
1263 uint32_t offset, uint32_t length, uint32_t options)
1264 {
1265 uint32_t mbox_cmd[MBOX_REG_COUNT];
1266 uint32_t mbox_sts[MBOX_REG_COUNT];
1267 int status = QLA_SUCCESS;
1268
1269 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1270 memset(&mbox_sts, 0, sizeof(mbox_sts));
1271
1272 mbox_cmd[0] = MBOX_CMD_WRITE_FLASH;
1273 mbox_cmd[1] = LSDW(dma_addr);
1274 mbox_cmd[2] = MSDW(dma_addr);
1275 mbox_cmd[3] = offset;
1276 mbox_cmd[4] = length;
1277 mbox_cmd[5] = options;
1278
1279 status = qla4xxx_mailbox_command(ha, 6, 2, &mbox_cmd[0], &mbox_sts[0]);
1280 if (status != QLA_SUCCESS) {
1281 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_WRITE_FLASH "
1282 "failed w/ status %04X, mbx1 %04X\n",
1283 __func__, mbox_sts[0], mbox_sts[1]));
1284 }
1285 return status;
1286 }
1287
1288 int qla4xxx_bootdb_by_index(struct scsi_qla_host *ha,
1289 struct dev_db_entry *fw_ddb_entry,
1290 dma_addr_t fw_ddb_entry_dma, uint16_t ddb_index)
1291 {
1292 uint32_t dev_db_start_offset = FLASH_OFFSET_DB_INFO;
1293 uint32_t dev_db_end_offset;
1294 int status = QLA_ERROR;
1295
1296 memset(fw_ddb_entry, 0, sizeof(*fw_ddb_entry));
1297
1298 dev_db_start_offset += (ddb_index * sizeof(*fw_ddb_entry));
1299 dev_db_end_offset = FLASH_OFFSET_DB_END;
1300
1301 if (dev_db_start_offset > dev_db_end_offset) {
1302 DEBUG2(ql4_printk(KERN_ERR, ha,
1303 "%s:Invalid DDB index %d", __func__,
1304 ddb_index));
1305 goto exit_bootdb_failed;
1306 }
1307
1308 if (qla4xxx_get_flash(ha, fw_ddb_entry_dma, dev_db_start_offset,
1309 sizeof(*fw_ddb_entry)) != QLA_SUCCESS) {
1310 ql4_printk(KERN_ERR, ha, "scsi%ld: %s: Get Flash"
1311 "failed\n", ha->host_no, __func__);
1312 goto exit_bootdb_failed;
1313 }
1314
1315 if (fw_ddb_entry->cookie == DDB_VALID_COOKIE)
1316 status = QLA_SUCCESS;
1317
1318 exit_bootdb_failed:
1319 return status;
1320 }
1321
1322 int qla4xxx_get_chap(struct scsi_qla_host *ha, char *username, char *password,
1323 uint16_t idx)
1324 {
1325 int ret = 0;
1326 int rval = QLA_ERROR;
1327 uint32_t offset = 0, chap_size;
1328 struct ql4_chap_table *chap_table;
1329 dma_addr_t chap_dma;
1330
1331 chap_table = dma_pool_alloc(ha->chap_dma_pool, GFP_KERNEL, &chap_dma);
1332 if (chap_table == NULL) {
1333 ret = -ENOMEM;
1334 goto exit_get_chap;
1335 }
1336
1337 chap_size = sizeof(struct ql4_chap_table);
1338 memset(chap_table, 0, chap_size);
1339
1340 if (is_qla40XX(ha))
1341 offset = FLASH_CHAP_OFFSET | (idx * chap_size);
1342 else {
1343 offset = FLASH_RAW_ACCESS_ADDR + (ha->hw.flt_region_chap << 2);
1344 /* flt_chap_size is CHAP table size for both ports
1345 * so divide it by 2 to calculate the offset for second port
1346 */
1347 if (ha->port_num == 1)
1348 offset += (ha->hw.flt_chap_size / 2);
1349 offset += (idx * chap_size);
1350 }
1351
1352 rval = qla4xxx_get_flash(ha, chap_dma, offset, chap_size);
1353 if (rval != QLA_SUCCESS) {
1354 ret = -EINVAL;
1355 goto exit_get_chap;
1356 }
1357
1358 DEBUG2(ql4_printk(KERN_INFO, ha, "Chap Cookie: x%x\n",
1359 __le16_to_cpu(chap_table->cookie)));
1360
1361 if (__le16_to_cpu(chap_table->cookie) != CHAP_VALID_COOKIE) {
1362 ql4_printk(KERN_ERR, ha, "No valid chap entry found\n");
1363 goto exit_get_chap;
1364 }
1365
1366 strncpy(password, chap_table->secret, QL4_CHAP_MAX_SECRET_LEN);
1367 strncpy(username, chap_table->name, QL4_CHAP_MAX_NAME_LEN);
1368 chap_table->cookie = __constant_cpu_to_le16(CHAP_VALID_COOKIE);
1369
1370 exit_get_chap:
1371 dma_pool_free(ha->chap_dma_pool, chap_table, chap_dma);
1372 return ret;
1373 }
1374
1375 static int qla4xxx_set_chap(struct scsi_qla_host *ha, char *username,
1376 char *password, uint16_t idx, int bidi)
1377 {
1378 int ret = 0;
1379 int rval = QLA_ERROR;
1380 uint32_t offset = 0;
1381 struct ql4_chap_table *chap_table;
1382 dma_addr_t chap_dma;
1383
1384 chap_table = dma_pool_alloc(ha->chap_dma_pool, GFP_KERNEL, &chap_dma);
1385 if (chap_table == NULL) {
1386 ret = -ENOMEM;
1387 goto exit_set_chap;
1388 }
1389
1390 memset(chap_table, 0, sizeof(struct ql4_chap_table));
1391 if (bidi)
1392 chap_table->flags |= BIT_6; /* peer */
1393 else
1394 chap_table->flags |= BIT_7; /* local */
1395 chap_table->secret_len = strlen(password);
1396 strncpy(chap_table->secret, password, MAX_CHAP_SECRET_LEN);
1397 strncpy(chap_table->name, username, MAX_CHAP_NAME_LEN);
1398 chap_table->cookie = __constant_cpu_to_le16(CHAP_VALID_COOKIE);
1399 offset = FLASH_CHAP_OFFSET | (idx * sizeof(struct ql4_chap_table));
1400 rval = qla4xxx_set_flash(ha, chap_dma, offset,
1401 sizeof(struct ql4_chap_table),
1402 FLASH_OPT_RMW_COMMIT);
1403
1404 if (rval == QLA_SUCCESS && ha->chap_list) {
1405 /* Update ha chap_list cache */
1406 memcpy((struct ql4_chap_table *)ha->chap_list + idx,
1407 chap_table, sizeof(struct ql4_chap_table));
1408 }
1409 dma_pool_free(ha->chap_dma_pool, chap_table, chap_dma);
1410 if (rval != QLA_SUCCESS)
1411 ret = -EINVAL;
1412
1413 exit_set_chap:
1414 return ret;
1415 }
1416
1417 /**
1418 * qla4xxx_get_chap_index - Get chap index given username and secret
1419 * @ha: pointer to adapter structure
1420 * @username: CHAP username to be searched
1421 * @password: CHAP password to be searched
1422 * @bidi: Is this a BIDI CHAP
1423 * @chap_index: CHAP index to be returned
1424 *
1425 * Match the username and password in the chap_list, return the index if a
1426 * match is found. If a match is not found then add the entry in FLASH and
1427 * return the index at which entry is written in the FLASH.
1428 **/
1429 static int qla4xxx_get_chap_index(struct scsi_qla_host *ha, char *username,
1430 char *password, int bidi, uint16_t *chap_index)
1431 {
1432 int i, rval;
1433 int free_index = -1;
1434 int found_index = 0;
1435 int max_chap_entries = 0;
1436 struct ql4_chap_table *chap_table;
1437
1438 if (is_qla8022(ha))
1439 max_chap_entries = (ha->hw.flt_chap_size / 2) /
1440 sizeof(struct ql4_chap_table);
1441 else
1442 max_chap_entries = MAX_CHAP_ENTRIES_40XX;
1443
1444 if (!ha->chap_list) {
1445 ql4_printk(KERN_ERR, ha, "Do not have CHAP table cache\n");
1446 return QLA_ERROR;
1447 }
1448
1449 mutex_lock(&ha->chap_sem);
1450 for (i = 0; i < max_chap_entries; i++) {
1451 chap_table = (struct ql4_chap_table *)ha->chap_list + i;
1452 if (chap_table->cookie !=
1453 __constant_cpu_to_le16(CHAP_VALID_COOKIE)) {
1454 if (i > MAX_RESRV_CHAP_IDX && free_index == -1)
1455 free_index = i;
1456 continue;
1457 }
1458 if (bidi) {
1459 if (chap_table->flags & BIT_7)
1460 continue;
1461 } else {
1462 if (chap_table->flags & BIT_6)
1463 continue;
1464 }
1465 if (!strncmp(chap_table->secret, password,
1466 MAX_CHAP_SECRET_LEN) &&
1467 !strncmp(chap_table->name, username,
1468 MAX_CHAP_NAME_LEN)) {
1469 *chap_index = i;
1470 found_index = 1;
1471 break;
1472 }
1473 }
1474
1475 /* If chap entry is not present and a free index is available then
1476 * write the entry in flash
1477 */
1478 if (!found_index && free_index != -1) {
1479 rval = qla4xxx_set_chap(ha, username, password,
1480 free_index, bidi);
1481 if (!rval) {
1482 *chap_index = free_index;
1483 found_index = 1;
1484 }
1485 }
1486
1487 mutex_unlock(&ha->chap_sem);
1488
1489 if (found_index)
1490 return QLA_SUCCESS;
1491 return QLA_ERROR;
1492 }
1493
1494 int qla4xxx_conn_close_sess_logout(struct scsi_qla_host *ha,
1495 uint16_t fw_ddb_index,
1496 uint16_t connection_id,
1497 uint16_t option)
1498 {
1499 uint32_t mbox_cmd[MBOX_REG_COUNT];
1500 uint32_t mbox_sts[MBOX_REG_COUNT];
1501 int status = QLA_SUCCESS;
1502
1503 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1504 memset(&mbox_sts, 0, sizeof(mbox_sts));
1505
1506 mbox_cmd[0] = MBOX_CMD_CONN_CLOSE_SESS_LOGOUT;
1507 mbox_cmd[1] = fw_ddb_index;
1508 mbox_cmd[2] = connection_id;
1509 mbox_cmd[3] = option;
1510
1511 status = qla4xxx_mailbox_command(ha, 4, 2, &mbox_cmd[0], &mbox_sts[0]);
1512 if (status != QLA_SUCCESS) {
1513 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_CONN_CLOSE "
1514 "option %04x failed w/ status %04X %04X\n",
1515 __func__, option, mbox_sts[0], mbox_sts[1]));
1516 }
1517 return status;
1518 }
1519
1520 int qla4xxx_disable_acb(struct scsi_qla_host *ha)
1521 {
1522 uint32_t mbox_cmd[MBOX_REG_COUNT];
1523 uint32_t mbox_sts[MBOX_REG_COUNT];
1524 int status = QLA_SUCCESS;
1525
1526 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1527 memset(&mbox_sts, 0, sizeof(mbox_sts));
1528
1529 mbox_cmd[0] = MBOX_CMD_DISABLE_ACB;
1530
1531 status = qla4xxx_mailbox_command(ha, 8, 5, &mbox_cmd[0], &mbox_sts[0]);
1532 if (status != QLA_SUCCESS) {
1533 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_DISABLE_ACB "
1534 "failed w/ status %04X %04X %04X", __func__,
1535 mbox_sts[0], mbox_sts[1], mbox_sts[2]));
1536 }
1537 return status;
1538 }
1539
1540 int qla4xxx_get_acb(struct scsi_qla_host *ha, dma_addr_t acb_dma,
1541 uint32_t acb_type, uint32_t len)
1542 {
1543 uint32_t mbox_cmd[MBOX_REG_COUNT];
1544 uint32_t mbox_sts[MBOX_REG_COUNT];
1545 int status = QLA_SUCCESS;
1546
1547 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1548 memset(&mbox_sts, 0, sizeof(mbox_sts));
1549
1550 mbox_cmd[0] = MBOX_CMD_GET_ACB;
1551 mbox_cmd[1] = acb_type;
1552 mbox_cmd[2] = LSDW(acb_dma);
1553 mbox_cmd[3] = MSDW(acb_dma);
1554 mbox_cmd[4] = len;
1555
1556 status = qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]);
1557 if (status != QLA_SUCCESS) {
1558 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_GET_ACB "
1559 "failed w/ status %04X\n", __func__,
1560 mbox_sts[0]));
1561 }
1562 return status;
1563 }
1564
1565 int qla4xxx_set_acb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
1566 uint32_t *mbox_sts, dma_addr_t acb_dma)
1567 {
1568 int status = QLA_SUCCESS;
1569
1570 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
1571 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
1572 mbox_cmd[0] = MBOX_CMD_SET_ACB;
1573 mbox_cmd[1] = 0; /* Primary ACB */
1574 mbox_cmd[2] = LSDW(acb_dma);
1575 mbox_cmd[3] = MSDW(acb_dma);
1576 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
1577
1578 status = qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]);
1579 if (status != QLA_SUCCESS) {
1580 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_SET_ACB "
1581 "failed w/ status %04X\n", __func__,
1582 mbox_sts[0]));
1583 }
1584 return status;
1585 }
1586
1587 int qla4xxx_set_param_ddbentry(struct scsi_qla_host *ha,
1588 struct ddb_entry *ddb_entry,
1589 struct iscsi_cls_conn *cls_conn,
1590 uint32_t *mbx_sts)
1591 {
1592 struct dev_db_entry *fw_ddb_entry;
1593 struct iscsi_conn *conn;
1594 struct iscsi_session *sess;
1595 struct qla_conn *qla_conn;
1596 struct sockaddr *dst_addr;
1597 dma_addr_t fw_ddb_entry_dma;
1598 int status = QLA_SUCCESS;
1599 int rval = 0;
1600 struct sockaddr_in *addr;
1601 struct sockaddr_in6 *addr6;
1602 char *ip;
1603 uint16_t iscsi_opts = 0;
1604 uint32_t options = 0;
1605 uint16_t idx;
1606
1607 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
1608 &fw_ddb_entry_dma, GFP_KERNEL);
1609 if (!fw_ddb_entry) {
1610 DEBUG2(ql4_printk(KERN_ERR, ha,
1611 "%s: Unable to allocate dma buffer.\n",
1612 __func__));
1613 rval = -ENOMEM;
1614 goto exit_set_param_no_free;
1615 }
1616
1617 conn = cls_conn->dd_data;
1618 qla_conn = conn->dd_data;
1619 sess = conn->session;
1620 dst_addr = &qla_conn->qla_ep->dst_addr;
1621
1622 if (dst_addr->sa_family == AF_INET6)
1623 options |= IPV6_DEFAULT_DDB_ENTRY;
1624
1625 status = qla4xxx_get_default_ddb(ha, options, fw_ddb_entry_dma);
1626 if (status == QLA_ERROR) {
1627 rval = -EINVAL;
1628 goto exit_set_param;
1629 }
1630
1631 iscsi_opts = le16_to_cpu(fw_ddb_entry->iscsi_options);
1632 memset(fw_ddb_entry->iscsi_alias, 0, sizeof(fw_ddb_entry->iscsi_alias));
1633
1634 memset(fw_ddb_entry->iscsi_name, 0, sizeof(fw_ddb_entry->iscsi_name));
1635
1636 if (sess->targetname != NULL) {
1637 memcpy(fw_ddb_entry->iscsi_name, sess->targetname,
1638 min(strlen(sess->targetname),
1639 sizeof(fw_ddb_entry->iscsi_name)));
1640 }
1641
1642 memset(fw_ddb_entry->ip_addr, 0, sizeof(fw_ddb_entry->ip_addr));
1643 memset(fw_ddb_entry->tgt_addr, 0, sizeof(fw_ddb_entry->tgt_addr));
1644
1645 fw_ddb_entry->options = DDB_OPT_TARGET | DDB_OPT_AUTO_SENDTGTS_DISABLE;
1646
1647 if (dst_addr->sa_family == AF_INET) {
1648 addr = (struct sockaddr_in *)dst_addr;
1649 ip = (char *)&addr->sin_addr;
1650 memcpy(fw_ddb_entry->ip_addr, ip, IP_ADDR_LEN);
1651 fw_ddb_entry->port = cpu_to_le16(ntohs(addr->sin_port));
1652 DEBUG2(ql4_printk(KERN_INFO, ha,
1653 "%s: Destination Address [%pI4]: index [%d]\n",
1654 __func__, fw_ddb_entry->ip_addr,
1655 ddb_entry->fw_ddb_index));
1656 } else if (dst_addr->sa_family == AF_INET6) {
1657 addr6 = (struct sockaddr_in6 *)dst_addr;
1658 ip = (char *)&addr6->sin6_addr;
1659 memcpy(fw_ddb_entry->ip_addr, ip, IPv6_ADDR_LEN);
1660 fw_ddb_entry->port = cpu_to_le16(ntohs(addr6->sin6_port));
1661 fw_ddb_entry->options |= DDB_OPT_IPV6_DEVICE;
1662 DEBUG2(ql4_printk(KERN_INFO, ha,
1663 "%s: Destination Address [%pI6]: index [%d]\n",
1664 __func__, fw_ddb_entry->ip_addr,
1665 ddb_entry->fw_ddb_index));
1666 } else {
1667 ql4_printk(KERN_ERR, ha,
1668 "%s: Failed to get IP Address\n",
1669 __func__);
1670 rval = -EINVAL;
1671 goto exit_set_param;
1672 }
1673
1674 /* CHAP */
1675 if (sess->username != NULL && sess->password != NULL) {
1676 if (strlen(sess->username) && strlen(sess->password)) {
1677 iscsi_opts |= BIT_7;
1678
1679 rval = qla4xxx_get_chap_index(ha, sess->username,
1680 sess->password,
1681 LOCAL_CHAP, &idx);
1682 if (rval)
1683 goto exit_set_param;
1684
1685 fw_ddb_entry->chap_tbl_idx = cpu_to_le16(idx);
1686 }
1687 }
1688
1689 if (sess->username_in != NULL && sess->password_in != NULL) {
1690 /* Check if BIDI CHAP */
1691 if (strlen(sess->username_in) && strlen(sess->password_in)) {
1692 iscsi_opts |= BIT_4;
1693
1694 rval = qla4xxx_get_chap_index(ha, sess->username_in,
1695 sess->password_in,
1696 BIDI_CHAP, &idx);
1697 if (rval)
1698 goto exit_set_param;
1699 }
1700 }
1701
1702 if (sess->initial_r2t_en)
1703 iscsi_opts |= BIT_10;
1704
1705 if (sess->imm_data_en)
1706 iscsi_opts |= BIT_11;
1707
1708 fw_ddb_entry->iscsi_options = cpu_to_le16(iscsi_opts);
1709
1710 if (conn->max_recv_dlength)
1711 fw_ddb_entry->iscsi_max_rcv_data_seg_len =
1712 __constant_cpu_to_le16((conn->max_recv_dlength / BYTE_UNITS));
1713
1714 if (sess->max_r2t)
1715 fw_ddb_entry->iscsi_max_outsnd_r2t = cpu_to_le16(sess->max_r2t);
1716
1717 if (sess->first_burst)
1718 fw_ddb_entry->iscsi_first_burst_len =
1719 __constant_cpu_to_le16((sess->first_burst / BYTE_UNITS));
1720
1721 if (sess->max_burst)
1722 fw_ddb_entry->iscsi_max_burst_len =
1723 __constant_cpu_to_le16((sess->max_burst / BYTE_UNITS));
1724
1725 if (sess->time2wait)
1726 fw_ddb_entry->iscsi_def_time2wait =
1727 cpu_to_le16(sess->time2wait);
1728
1729 if (sess->time2retain)
1730 fw_ddb_entry->iscsi_def_time2retain =
1731 cpu_to_le16(sess->time2retain);
1732
1733 status = qla4xxx_set_ddb_entry(ha, ddb_entry->fw_ddb_index,
1734 fw_ddb_entry_dma, mbx_sts);
1735
1736 if (status != QLA_SUCCESS)
1737 rval = -EINVAL;
1738 exit_set_param:
1739 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
1740 fw_ddb_entry, fw_ddb_entry_dma);
1741 exit_set_param_no_free:
1742 return rval;
1743 }
1744
1745 int qla4xxx_get_mgmt_data(struct scsi_qla_host *ha, uint16_t fw_ddb_index,
1746 uint16_t stats_size, dma_addr_t stats_dma)
1747 {
1748 int status = QLA_SUCCESS;
1749 uint32_t mbox_cmd[MBOX_REG_COUNT];
1750 uint32_t mbox_sts[MBOX_REG_COUNT];
1751
1752 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
1753 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
1754 mbox_cmd[0] = MBOX_CMD_GET_MANAGEMENT_DATA;
1755 mbox_cmd[1] = fw_ddb_index;
1756 mbox_cmd[2] = LSDW(stats_dma);
1757 mbox_cmd[3] = MSDW(stats_dma);
1758 mbox_cmd[4] = stats_size;
1759
1760 status = qla4xxx_mailbox_command(ha, 5, 1, &mbox_cmd[0], &mbox_sts[0]);
1761 if (status != QLA_SUCCESS) {
1762 DEBUG2(ql4_printk(KERN_WARNING, ha,
1763 "%s: MBOX_CMD_GET_MANAGEMENT_DATA "
1764 "failed w/ status %04X\n", __func__,
1765 mbox_sts[0]));
1766 }
1767 return status;
1768 }
1769
1770 int qla4xxx_get_ip_state(struct scsi_qla_host *ha, uint32_t acb_idx,
1771 uint32_t ip_idx, uint32_t *sts)
1772 {
1773 uint32_t mbox_cmd[MBOX_REG_COUNT];
1774 uint32_t mbox_sts[MBOX_REG_COUNT];
1775 int status = QLA_SUCCESS;
1776
1777 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1778 memset(&mbox_sts, 0, sizeof(mbox_sts));
1779 mbox_cmd[0] = MBOX_CMD_GET_IP_ADDR_STATE;
1780 mbox_cmd[1] = acb_idx;
1781 mbox_cmd[2] = ip_idx;
1782
1783 status = qla4xxx_mailbox_command(ha, 3, 8, &mbox_cmd[0], &mbox_sts[0]);
1784 if (status != QLA_SUCCESS) {
1785 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: "
1786 "MBOX_CMD_GET_IP_ADDR_STATE failed w/ "
1787 "status %04X\n", __func__, mbox_sts[0]));
1788 }
1789 memcpy(sts, mbox_sts, sizeof(mbox_sts));
1790 return status;
1791 }
1792
1793 int qla4xxx_get_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
1794 uint32_t offset, uint32_t size)
1795 {
1796 int status = QLA_SUCCESS;
1797 uint32_t mbox_cmd[MBOX_REG_COUNT];
1798 uint32_t mbox_sts[MBOX_REG_COUNT];
1799
1800 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1801 memset(&mbox_sts, 0, sizeof(mbox_sts));
1802
1803 mbox_cmd[0] = MBOX_CMD_GET_NVRAM;
1804 mbox_cmd[1] = LSDW(nvram_dma);
1805 mbox_cmd[2] = MSDW(nvram_dma);
1806 mbox_cmd[3] = offset;
1807 mbox_cmd[4] = size;
1808
1809 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1810 &mbox_sts[0]);
1811 if (status != QLA_SUCCESS) {
1812 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
1813 "status %04X\n", ha->host_no, __func__,
1814 mbox_sts[0]));
1815 }
1816 return status;
1817 }
1818
1819 int qla4xxx_set_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
1820 uint32_t offset, uint32_t size)
1821 {
1822 int status = QLA_SUCCESS;
1823 uint32_t mbox_cmd[MBOX_REG_COUNT];
1824 uint32_t mbox_sts[MBOX_REG_COUNT];
1825
1826 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1827 memset(&mbox_sts, 0, sizeof(mbox_sts));
1828
1829 mbox_cmd[0] = MBOX_CMD_SET_NVRAM;
1830 mbox_cmd[1] = LSDW(nvram_dma);
1831 mbox_cmd[2] = MSDW(nvram_dma);
1832 mbox_cmd[3] = offset;
1833 mbox_cmd[4] = size;
1834
1835 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1836 &mbox_sts[0]);
1837 if (status != QLA_SUCCESS) {
1838 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
1839 "status %04X\n", ha->host_no, __func__,
1840 mbox_sts[0]));
1841 }
1842 return status;
1843 }
1844
1845 int qla4xxx_restore_factory_defaults(struct scsi_qla_host *ha,
1846 uint32_t region, uint32_t field0,
1847 uint32_t field1)
1848 {
1849 int status = QLA_SUCCESS;
1850 uint32_t mbox_cmd[MBOX_REG_COUNT];
1851 uint32_t mbox_sts[MBOX_REG_COUNT];
1852
1853 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1854 memset(&mbox_sts, 0, sizeof(mbox_sts));
1855
1856 mbox_cmd[0] = MBOX_CMD_RESTORE_FACTORY_DEFAULTS;
1857 mbox_cmd[3] = region;
1858 mbox_cmd[4] = field0;
1859 mbox_cmd[5] = field1;
1860
1861 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0],
1862 &mbox_sts[0]);
1863 if (status != QLA_SUCCESS) {
1864 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
1865 "status %04X\n", ha->host_no, __func__,
1866 mbox_sts[0]));
1867 }
1868 return status;
1869 }
Ubuntu Hirsute Linux kernel mirror